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net: phy: mscc: Enable RMII clock output for VSC8541 PHY

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Set RMII reference clock output to enabled (1) by default for VSC8541
PHY in RMII mode. The RMII specification requires a 50MHz reference
clock, and many board designs expect the PHY to provide this clock to
the MAC controller.

Previously, the driver defaulted rmii_clk_out to 0 (disabled) for all
interface modes, which caused the PHY to not output the required 50MHz
clock. This resulted in MAC-PHY communication failures and prevented
network operations like DHCP from working on RMII-configured boards.

This change alligns with the hardware power-up default behavior and
aligns with both the generic PHY driver and Linux MSCC PHY driver
implementations.

Signed-off-by: Pranav Tilak <pranav.vinaytilak@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260129081054.1703479-1-pranav.vinaytilak@amd.com
This commit is contained in:
Pranav Tilak
2026-01-29 13:40:54 +05:30
committed by Michal Simek
parent 85bbd16750
commit ce6fc049b7
1 changed files with 1 additions and 1 deletions
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2
drivers/net/phy/mscc.c
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@@ -1388,7 +1388,7 @@ static int vsc8541_config(struct phy_device *phydev)
return -EINVAL;
}
/* Default RMII Clk Output to 0=OFF/1=ON */
rmii_clk_out = 0;
rmii_clk_out = 1;
retval = vsc8531_vsc8541_clk_skew_config(phydev);
if (retval != 0)