Mirrors/u-boot
1
0
Fork 0
mirror of https://source.denx.de/u-boot/u-boot.git synced 2026-06-13 15:03:58 +03:00
Code Issues Packages Projects Releases Wiki Activity

arm64: imx8ulp: Split SRAM0 mapping to isolate the SCMI shared memory as non-cacheable

Browse Source 
This patch splits the 2MB SRAM0 mapping into three regions:
- 0x22000000~0x2201f000: cacheable normal memory
- 0x2201f000~0x22020000: non-cacheable device memory
- 0x22020000~0x22200000: cacheable normal memory

The change ensures the SCMI shared memory is non-cacheable, which
avoids cache-related issues after removing
mmu_set_region_dcache_behaviour() from scmi_dt_get_smt_buffer().

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
This commit is contained in:
Alice Guo
2025-11-03 15:36:54 +08:00
committed by Fabio Estevam
parent f008af59af
commit de5ae3e43c
1 changed files with 16 additions and 1 deletions
Download Patch File Download Diff File Expand all files Collapse all files

17
arch/arm/mach-imx/imx8ulp/soc.c
View File

@@ -384,7 +384,22 @@ static struct mm_region imx8ulp_arm64_mem_map[] = {
/* SRAM0 (align with 2M) */
.virt = 0x22000000UL,
.phys = 0x22000000UL,
.size = 0x200000UL,
.size = 0x1f000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_OUTER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
/* SCMI shared memory buffer must be mapped as non-cacheable. */
.virt = 0x2201f000UL,
.phys = 0x2201f000UL,
.size = 0x1000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
.virt = 0x22020000UL,
.phys = 0x22020000UL,
.size = 0x1e0000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_OUTER_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN