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clk: sunxi: Extend DM_RESET selection to SPL

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The sunxi clock driver exposes a reset controller, so it selects the
reset controller framework. Ensure that dependency is also satisfied
when building the driver for the SPL.

Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Samuel Holland
2021-09-11 14:45:31 -05:00
committed by Andre Przywara
parent 0ec88323da
commit e0c628d728
1 changed files with 1 additions and 0 deletions
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drivers/clk/sunxi/Kconfig
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@@ -2,6 +2,7 @@ config CLK_SUNXI
bool "Clock support for Allwinner SoCs"
depends on CLK && ARCH_SUNXI
select DM_RESET
select SPL_DM_RESET if SPL_CLK
default y
help
This enables support for common clock driver API on Allwinner