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arm64: zynqmp: Assign TSU clock frequency for KR260

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Set TSU clock frequency as 250MHz (minimum when running at 1G) on
KR260 CC to allow PTP functionality.

Signed-off-by: Harini Katakam <harini.katakam@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/d065b5c2c6450910bf57d104d65946111493caaa.1688992653.git.michal.simek@amd.com
This commit is contained in:
Harini Katakam
2023-07-10 14:37:30 +02:00
committed by Michal Simek
parent d95fc99a74
commit f668961485
3 changed files with 8 additions and 0 deletions
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4
arch/arm/dts/zynqmp-clk-ccf.dtsi
View File

@@ -169,24 +169,28 @@
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM0_REF>,
<&zynqmp_clk GEM0_TX>, <&zynqmp_clk GEM0_RX>,
<&zynqmp_clk GEM_TSU>;
assigned-clocks = <&zynqmp_clk GEM_TSU>;
};
&gem1 {
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM1_REF>,
<&zynqmp_clk GEM1_TX>, <&zynqmp_clk GEM1_RX>,
<&zynqmp_clk GEM_TSU>;
assigned-clocks = <&zynqmp_clk GEM_TSU>;
};
&gem2 {
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM2_REF>,
<&zynqmp_clk GEM2_TX>, <&zynqmp_clk GEM2_RX>,
<&zynqmp_clk GEM_TSU>;
assigned-clocks = <&zynqmp_clk GEM_TSU>;
};
&gem3 {
clocks = <&zynqmp_clk LPD_LSBUS>, <&zynqmp_clk GEM3_REF>,
<&zynqmp_clk GEM3_TX>, <&zynqmp_clk GEM3_RX>,
<&zynqmp_clk GEM_TSU>;
assigned-clocks = <&zynqmp_clk GEM_TSU>;
};
&gpio {

2
arch/arm/dts/zynqmp-sck-kr-g-revA.dts
View File

@@ -188,6 +188,7 @@
phy-handle = <&phy0>;
phy-mode = "sgmii";
is-internal-pcspma;
assigned-clock-rates = <250000000>;
};
&gem1 { /* mdio mio50/51, gem mio38 - mio49 */
@@ -196,6 +197,7 @@
pinctrl-0 = <&pinctrl_gem1_default>;
phy-handle = <&phy1>;
phy-mode = "rgmii-id";
assigned-clock-rates = <250000000>;
mdio: mdio {
#address-cells = <1>;

2
arch/arm/dts/zynqmp-sck-kr-g-revB.dts
View File

@@ -188,6 +188,7 @@
phy-handle = <&phy0>;
phy-mode = "sgmii";
is-internal-pcspma;
assigned-clock-rates = <250000000>;
};
&gem1 { /* mdio mio50/51, gem mio38 - mio49 */
@@ -196,6 +197,7 @@
pinctrl-0 = <&pinctrl_gem1_default>;
phy-handle = <&phy1>;
phy-mode = "rgmii-id";
assigned-clock-rates = <250000000>;
mdio: mdio {
#address-cells = <1>;