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synced 2026-06-13 15:03:58 +03:00
imx9: scmi: Support iMX95/94/952 secondary boot
When ROM boots from secondary container set, SPL should select correct offset to load u-boot-atf container. The implementation uses ROM passover information: 1) For non-eMMC boot partition device, use image offset in ROM passover data to get u-boot-atf container offset. 2) For eMMC boot partition device, use boot stage (secondary) in ROM passover data to select correct eMMC boot partition for u-boot-atf container. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
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@@ -23,7 +23,9 @@ int low_drive_freq_update(void *blob);
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enum imx9_soc_voltage_mode soc_target_voltage_mode(void);
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int get_reset_reason(bool sys, bool lm);
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u8 imx95_detect_secondary_image_boot(void);
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int scmi_get_boot_device_offset(unsigned long *img_off);
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int scmi_get_boot_stage(u8 *stage);
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u8 scmi_get_imgset_sel(void);
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#define is_voltage_mode(mode) (soc_target_voltage_mode() == (mode))
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@@ -225,15 +225,9 @@ static bool check_secondary_cnt_set(unsigned long *set_off)
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}
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}
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}
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#elif IS_ENABLED(CONFIG_IMX95)
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u8 img_set_sel = imx95_detect_secondary_image_boot();
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*set_off = img_set_sel ? 0x400000 : 0;
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return !!img_set_sel;
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#else
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return false;
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#endif
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return false;
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}
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static unsigned long get_boot_device_offset(void *dev, int dev_type)
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@@ -246,6 +240,14 @@ static unsigned long get_boot_device_offset(void *dev, int dev_type)
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return offset;
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}
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#if IS_ENABLED(CONFIG_ARCH_IMX9) && IS_ENABLED(CONFIG_SCMI_FIRMWARE)
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int ret;
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ret = scmi_get_boot_device_offset(&offset);
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if (!ret)
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return offset;
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/* fall back to boot from primary set if get rom passover failed */
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#endif
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sec_boot = check_secondary_cnt_set(&sec_set_off);
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if (sec_boot)
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printf("Secondary set selected\n");
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@@ -372,10 +374,17 @@ int spl_mmc_emmc_boot_partition(struct mmc *mmc)
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part = EXT_CSD_EXTRACT_BOOT_PART(mmc->part_config);
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if (part == EMMC_BOOT_PART_BOOT1 || part == EMMC_BOOT_PART_BOOT2) {
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unsigned long sec_set_off = 0;
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bool sec_boot = false;
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#if IS_ENABLED(CONFIG_ARCH_IMX9) && IS_ENABLED(CONFIG_SCMI_FIRMWARE)
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u8 stage;
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int ret;
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ret = scmi_get_boot_stage(&stage);
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if (!ret)
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sec_boot = (stage == 0x9);
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#else
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unsigned long sec_set_off = 0;
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sec_boot = check_secondary_cnt_set(&sec_set_off);
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#endif
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if (sec_boot)
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part = (part == EMMC_BOOT_PART_BOOT1) ? EMMC_HWPART_BOOT2 : EMMC_HWPART_BOOT1;
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} else if (part == EMMC_BOOT_PART_USER) {
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@@ -745,8 +745,31 @@ void build_info(void)
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puts("\n");
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}
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#if IS_ENABLED(CONFIG_IMX95)
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u8 imx95_detect_secondary_image_boot(void)
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int scmi_get_boot_device_offset(unsigned long *img_off)
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{
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int ret;
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rom_passover_t rom_data = {0};
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ret = scmi_get_rom_data(&rom_data);
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if (!ret)
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*img_off = rom_data.img_ofs;
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return 0;
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}
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int scmi_get_boot_stage(u8 *stage)
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{
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int ret;
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rom_passover_t rom_data = {0};
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ret = scmi_get_rom_data(&rom_data);
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if (!ret)
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*stage = rom_data.boot_stage;
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return ret;
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}
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u8 scmi_get_imgset_sel(void)
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{
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rom_passover_t rdata = { 0 };
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int ret = scmi_get_rom_data(&rdata);
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@@ -759,9 +782,8 @@ u8 imx95_detect_secondary_image_boot(void)
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int boot_mode_getprisec(void)
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{
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return !!imx95_detect_secondary_image_boot();
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return !!scmi_get_imgset_sel();
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}
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#endif
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int arch_misc_init(void)
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{
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