- Add USB Hub (USB5744) management support for ten64
- Various DT fixes for ls1088a
- Fix dead default for SYS_L3_SIZE for powerpc
This commit is contained in:
Tom Rini
2026-05-06 08:43:32 -06:00
30 changed files with 201 additions and 486 deletions

View File

@@ -1549,7 +1549,8 @@ void lmb_arch_add_memory(void)
gd->arch.resv_ram < ram_start + ram_size)
ram_size = gd->arch.resv_ram - ram_start;
#endif
lmb_add(ram_start, ram_size);
if (ram_size > 0)
lmb_add(ram_start, ram_size);
}
}
#endif

View File

@@ -17,7 +17,7 @@
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
dflash0: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -25,7 +25,7 @@
spi-max-frequency = <1000000>; /* input clock */
};
dflash1: sst25wf040b {
dflash1: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -33,7 +33,7 @@
reg = <1>;
};
dflash2: en25s64 {
dflash2: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -48,7 +48,7 @@
clocks = <&sysclk>;
};
dspi0: dspi@2100000 {
dspi0: spi@2100000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -178,7 +178,7 @@
clocks = <&clockgen 4 0>;
};
qspi: quadspi@1550000 {
qspi: spi@1550000 {
compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;

View File

@@ -26,29 +26,29 @@
bus-num = <0>;
status = "okay";
dflash0: sst25wf040b {
dflash0: sst25wf040b@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash1: en25s64 {
dflash1: en25s64@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash2: n25q128a {
dflash2: n25q128a@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
@@ -60,29 +60,29 @@
bus-num = <0>;
status = "okay";
dflash3: sst25wf040b {
dflash3: sst25wf040b@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash4: en25s64 {
dflash4: en25s64@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash5: n25q128a {
dflash5: n25q128a@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
@@ -94,10 +94,10 @@
bus-num = <0>;
status = "okay";
dflash8: en25s64 {
dflash8: en25s64@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;

View File

@@ -21,7 +21,7 @@
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
dflash0: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -31,7 +31,7 @@
reg = <0>;
};
dflash1: sst25wf040b {
dflash1: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -41,7 +41,7 @@
reg = <1>;
};
dflash2: en25s64 {
dflash2: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -28,7 +28,7 @@
bus-num = <0>;
status = "okay";
dspiflash: n25q12a {
dspiflash: n25q12a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -54,7 +54,7 @@
clocks = <&sysclk>;
};
dspi0: dspi@2100000 {
dspi0: spi@2100000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -67,7 +67,7 @@
status = "disabled";
};
dspi1: dspi@2110000 {
dspi1: spi@2110000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -306,7 +306,7 @@
clock-names = "ipg";
status = "disabled";
};
qspi: quadspi@1550000 {
qspi: spi@1550000 {
compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;

View File

@@ -21,7 +21,7 @@
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
dflash0: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -31,7 +31,7 @@
reg = <0>;
};
dflash1: sst25wf040b {
dflash1: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -41,7 +41,7 @@
reg = <1>;
};
dflash2: en25s64 {
dflash2: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -54,7 +54,7 @@
clocks = <&sysclk>;
};
dspi0: dspi@2100000 {
dspi0: spi@2100000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -67,7 +67,7 @@
status = "disabled";
};
dspi1: dspi@2110000 {
dspi1: spi@2110000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -311,7 +311,7 @@
status = "disabled";
};
qspi: quadspi@1550000 {
qspi: spi@1550000 {
compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;

View File

@@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2024 NXP
*
*/
#include <config.h>
#include "fsl-ls1088a-qds-u-boot.dtsi"

View File

@@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2024 NXP
*
*/
#include <config.h>
#include "fsl-ls1088a-qds-u-boot.dtsi"

View File

@@ -144,7 +144,7 @@
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
dflash0: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -152,7 +152,7 @@
spi-max-frequency = <1000000>; /* input clock */
};
dflash1: sst25wf040b {
dflash1: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -160,7 +160,7 @@
reg = <1>;
};
dflash2: en25s64 {
dflash2: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -18,11 +18,3 @@
ethernet9 = &dpmac1;
};
};
&i2c0 {
uc: board-controller@7e {
compatible = "traverse,ten64-controller";
reg = <0x7e>;
};
};

View File

@@ -1,388 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for Traverse Technologies Ten64
* (LS1088A) board
* Based on fsl-ls1088a-rdb.dts
* Copyright 2017-2020 NXP
* Copyright 2019-2023 Traverse Technologies
*
* Author: Mathew McBride <matt@traverse.com.au>
*/
/dts-v1/;
#include "fsl-ls1088a.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
model = "Traverse Ten64";
compatible = "traverse,ten64", "fsl,ls1088a";
aliases {
serial0 = &duart0;
serial1 = &duart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
buttons {
compatible = "gpio-keys";
/* Fired by system controller when
* external power off (e.g ATX Power Button)
* asserted
*/
button-powerdn {
label = "External Power Down";
gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
};
/* Rear Panel 'ADMIN' button (GPIO_H) */
button-admin {
label = "ADMIN button";
gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
led-0 {
label = "ten64:green:sfp1:down";
gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
};
led-1 {
label = "ten64:green:sfp2:up";
gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
};
led-2 {
label = "ten64:admin";
gpios = <&sfpgpio 12 GPIO_ACTIVE_HIGH>;
};
};
sfp_xg0: dpmac2-sfp {
compatible = "sff,sfp";
i2c-bus = <&sfplower_i2c>;
tx-fault-gpios = <&sfpgpio 0 GPIO_ACTIVE_HIGH>;
tx-disable-gpios = <&sfpgpio 1 GPIO_ACTIVE_HIGH>;
mod-def0-gpios = <&sfpgpio 2 GPIO_ACTIVE_LOW>;
los-gpios = <&sfpgpio 3 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2000>;
};
sfp_xg1: dpmac1-sfp {
compatible = "sff,sfp";
i2c-bus = <&sfpupper_i2c>;
tx-fault-gpios = <&sfpgpio 4 GPIO_ACTIVE_HIGH>;
tx-disable-gpios = <&sfpgpio 5 GPIO_ACTIVE_HIGH>;
mod-def0-gpios = <&sfpgpio 6 GPIO_ACTIVE_LOW>;
los-gpios = <&sfpgpio 7 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <2000>;
};
};
/* XG1 - Upper SFP */
&dpmac1 {
sfp = <&sfp_xg1>;
pcs-handle = <&pcs1>;
phy-connection-type = "10gbase-r";
managed = "in-band-status";
};
/* XG0 - Lower SFP */
&dpmac2 {
sfp = <&sfp_xg0>;
pcs-handle = <&pcs2>;
phy-connection-type = "10gbase-r";
managed = "in-band-status";
};
/* DPMAC3..6 is GE4 to GE8 */
&dpmac3 {
phy-handle = <&mdio1_phy5>;
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs3_0>;
};
&dpmac4 {
phy-handle = <&mdio1_phy6>;
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs3_1>;
};
&dpmac5 {
phy-handle = <&mdio1_phy7>;
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs3_2>;
};
&dpmac6 {
phy-handle = <&mdio1_phy8>;
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs3_3>;
};
/* DPMAC7..10 is GE0 to GE3 */
&dpmac7 {
phy-handle = <&mdio1_phy1>;
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs7_0>;
};
&dpmac8 {
phy-handle = <&mdio1_phy2>;
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs7_1>;
};
&dpmac9 {
phy-handle = <&mdio1_phy3>;
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs7_2>;
};
&dpmac10 {
phy-handle = <&mdio1_phy4>;
phy-connection-type = "qsgmii";
managed = "in-band-status";
pcs-handle = <&pcs7_3>;
};
&duart0 {
status = "okay";
};
&duart1 {
status = "okay";
};
&emdio1 {
status = "okay";
mdio1_phy5: ethernet-phy@c {
reg = <0xc>;
};
mdio1_phy6: ethernet-phy@d {
reg = <0xd>;
};
mdio1_phy7: ethernet-phy@e {
reg = <0xe>;
};
mdio1_phy8: ethernet-phy@f {
reg = <0xf>;
};
mdio1_phy1: ethernet-phy@1c {
reg = <0x1c>;
};
mdio1_phy2: ethernet-phy@1d {
reg = <0x1d>;
};
mdio1_phy3: ethernet-phy@1e {
reg = <0x1e>;
};
mdio1_phy4: ethernet-phy@1f {
reg = <0x1f>;
};
};
&esdhc {
status = "okay";
};
&i2c0 {
status = "okay";
sfpgpio: gpio@76 {
compatible = "ti,tca9539";
reg = <0x76>;
#gpio-cells = <2>;
gpio-controller;
admin_led_lower {
gpio-hog;
gpios = <13 GPIO_ACTIVE_HIGH>;
output-low;
};
};
at97sc: tpm@29 {
compatible = "atmel,at97sc3204t";
reg = <0x29>;
};
};
&i2c2 {
status = "okay";
rx8035: rtc@32 {
compatible = "epson,rx8035";
reg = <0x32>;
};
};
&i2c3 {
status = "okay";
i2c-mux@70 {
compatible = "nxp,pca9540";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x70>;
sfpupper_i2c: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
sfplower_i2c: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
};
};
&pcs_mdio1 {
status = "okay";
};
&pcs_mdio2 {
status = "okay";
};
&pcs_mdio3 {
status = "okay";
};
&pcs_mdio7 {
status = "okay";
};
&qspi {
status = "okay";
en25s64: flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <20000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "bl2";
reg = <0 0x100000>;
};
partition@100000 {
label = "bl3";
reg = <0x100000 0x200000>;
};
partition@300000 {
label = "mcfirmware";
reg = <0x300000 0x200000>;
};
partition@500000 {
label = "ubootenv";
reg = <0x500000 0x80000>;
};
partition@580000 {
label = "dpl";
reg = <0x580000 0x40000>;
};
partition@5C0000 {
label = "dpc";
reg = <0x5C0000 0x40000>;
};
partition@600000 {
label = "devicetree";
reg = <0x600000 0x40000>;
};
};
};
nand: flash@1 {
compatible = "spi-nand";
#address-cells = <1>;
#size-cells = <1>;
reg = <1>;
spi-max-frequency = <20000000>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
/* reserved for future boot direct from NAND flash
* (this would use the same layout as the 8MiB NOR flash)
*/
partition@0 {
label = "nand-boot-reserved";
reg = <0 0x800000>;
};
/* recovery / install environment */
partition@800000 {
label = "recovery";
reg = <0x800000 0x2000000>;
};
/* ubia (first OpenWrt) - a/b names to prevent confusion with ubi0/1/etc. */
partition@2800000 {
label = "ubia";
reg = <0x2800000 0x6C00000>;
};
/* ubib (second OpenWrt) */
partition@9400000 {
label = "ubib";
reg = <0x9400000 0x6C00000>;
};
};
};
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};

View File

@@ -55,9 +55,14 @@
&usb0 {
compatible = "fsl,layerscape-dwc3", "snps,dwc3";
status = "okay";
};
&usb1 {
compatible = "fsl,layerscape-dwc3", "snps,dwc3";
status = "okay";
};
&esdhc {
status = "okay";
};

View File

@@ -978,51 +978,61 @@
dpmac1: ethernet@1 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <1>;
status = "disabled";
};
dpmac2: ethernet@2 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <2>;
status = "disabled";
};
dpmac3: ethernet@3 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <3>;
status = "disabled";
};
dpmac4: ethernet@4 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <4>;
status = "disabled";
};
dpmac5: ethernet@5 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <5>;
status = "disabled";
};
dpmac6: ethernet@6 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <6>;
status = "disabled";
};
dpmac7: ethernet@7 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <7>;
status = "disabled";
};
dpmac8: ethernet@8 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <8>;
status = "disabled";
};
dpmac9: ethernet@9 {
compatible = "fsl,qoriq-mc-dpmac";
reg = <9>;
status = "disabled";
};
dpmac10: ethernet@a {
compatible = "fsl,qoriq-mc-dpmac";
reg = <0xa>;
status = "disabled";
};
};
};

View File

@@ -31,7 +31,7 @@
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
dflash0: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -40,7 +40,7 @@
spi-cpha;
reg = <0>;
};
dflash1: sst25wf040b {
dflash1: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
@@ -49,7 +49,7 @@
spi-cpha;
reg = <1>;
};
dflash2: en25s64 {
dflash2: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -22,7 +22,7 @@
bus-num = <0>;
status = "okay";
dflash0: n25q512a {
dflash0: n25q512a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -118,7 +118,7 @@
interrupts = <0 35 0x4>; /* Level high type */
};
dspi: dspi@2100000 {
dspi: spi@2100000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -127,7 +127,7 @@
spi-num-chipselects = <6>;
};
qspi: quadspi@1550000 {
qspi: spi@1550000 {
compatible = "fsl,ls2080a-qspi";
#address-cells = <1>;
#size-cells = <0>;

View File

@@ -25,7 +25,7 @@
bus-num = <0>;
status = "okay";
dflash0: n25q512a {
dflash0: n25q512a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -113,7 +113,7 @@
bus-num = <0>;
status = "okay";
dflash0: n25q512a {
dflash0: n25q512a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";

View File

@@ -31,28 +31,28 @@
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
dflash0: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash1: sst25wf040b {
dflash1: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash2: en25s64 {
dflash2: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
@@ -64,28 +64,28 @@
bus-num = <0>;
status = "okay";
dflash3: n25q128a {
dflash3: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash4: sst25wf040b {
dflash4: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash5: en25s64 {
dflash5: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
@@ -97,28 +97,28 @@
bus-num = <0>;
status = "okay";
dflash6: n25q128a {
dflash6: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash7: sst25wf040b {
dflash7: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash8: en25s64 {
dflash8: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;

View File

@@ -134,7 +134,7 @@
<1 10 0x8>; /* Hypervisor PPI, active-low */
};
fspi: flexspi@20c0000 {
fspi: spi@20c0000 {
compatible = "nxp,lx2160a-fspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -221,7 +221,7 @@
status = "disabled";
};
dspi0: dspi@2100000 {
dspi0: spi@2100000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -230,7 +230,7 @@
spi-num-chipselects = <6>;
};
dspi1: dspi@2110000 {
dspi1: spi@2110000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -239,7 +239,7 @@
spi-num-chipselects = <6>;
};
dspi2: dspi@2120000 {
dspi2: spi@2120000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;

View File

@@ -41,28 +41,28 @@
bus-num = <0>;
status = "okay";
dflash0: n25q128a {
dflash0: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash1: sst25wf040b {
dflash1: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash2: en25s64 {
dflash2: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
@@ -74,28 +74,28 @@
bus-num = <0>;
status = "okay";
dflash3: n25q128a {
dflash3: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash4: sst25wf040b {
dflash4: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash5: en25s64 {
dflash5: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
@@ -107,28 +107,28 @@
bus-num = <0>;
status = "okay";
dflash6: n25q128a {
dflash6: n25q128a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <0>;
};
dflash7: sst25wf040b {
dflash7: sst25wf040b@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;
reg = <1>;
};
dflash8: en25s64 {
dflash8: en25s64@2 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <3000000>;
spi-cpol;
spi-cpha;

View File

@@ -173,7 +173,7 @@
status = "okay";
flash@0 {
compatible = "spi-flash";
compatible = "jedec,spi-nor";
spi-max-frequency = <20000000>;
reg = <0>;
};

View File

@@ -205,7 +205,7 @@
clocks = <&sysclk>;
};
dspi0: dspi@2100000 {
dspi0: spi@2100000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -218,7 +218,7 @@
status = "disabled";
};
dspi1: dspi@2110000 {
dspi1: spi@2110000 {
compatible = "fsl,vf610-dspi";
#address-cells = <1>;
#size-cells = <0>;
@@ -231,7 +231,7 @@
status = "disabled";
};
qspi: quadspi@1550000 {
qspi: spi@1550000 {
compatible = "fsl,ls1021a-qspi";
#address-cells = <1>;
#size-cells = <0>;

View File

@@ -1,3 +1,5 @@
#include <linux/types.h>
#ifdef CONFIG_GPIO_EXTRA_HEADER
#include <asm/arch/gpio.h>
#endif

View File

@@ -1375,7 +1375,7 @@ config SYS_L3_SIZE
int
default 262144 if SYS_L3_SIZE_256KB
default 524288 if SYS_L3_SIZE_512KB
default 1048576 if SYS_L3_SIZE_512KB
default 1048576 if SYS_L3_SIZE_1024KB
config SYS_PPC64
bool

View File

@@ -186,6 +186,58 @@ void fdt_fixup_board_enet(void *fdt)
fdt_status_fail(fdt, offset);
}
/* The onboard USB hub driver (microchip,usb5744)
* can cause a disconnect-reconnect loop if the operating system
* attempts to re-initialise the hub after U-Boot has already done it.
* (This process only needs to be done once per system RESET cycle)
*
* To avoid this condition, make the hub topology invisible
* to the operating system.
* It is also required to remove the hub on boards
* without it (RevD).
*
* The USB hub fixup may fail for legitimate reasons:
* 1. FDT has already been fixed. For example, the control
* FDT previously modified by board_fix_fdt is
* re-used for bootflow.
* 2. The FDT blob is based on an older version
* without the hub topology, such as older OpenWrt
* FIT images with their own device tree.
*/
int fdt_fixup_usb_hub(void *fdt)
{
int usb1_hub2744_offset, usb1_hub5744_offset;
int i2c_usb5744_offset;
int err;
usb1_hub2744_offset = fdt_path_offset(fdt, "/soc/usb@3110000/hub@1");
if (usb1_hub2744_offset < 0)
return usb1_hub2744_offset;
err = fdt_del_node(fdt, usb1_hub2744_offset);
if (err)
return err;
usb1_hub5744_offset = fdt_path_offset(fdt, "/soc/usb@3110000/hub@2");
if (usb1_hub5744_offset < 0)
return usb1_hub5744_offset;
err = fdt_del_node(fdt, usb1_hub5744_offset);
if (err)
return err;
i2c_usb5744_offset = fdt_path_offset(fdt, "/soc/i2c@2000000/usb-hub@2d");
if (i2c_usb5744_offset < 0)
return i2c_usb5744_offset;
err = fdt_setprop_string(fdt, i2c_usb5744_offset, "status", "disabled");
if (err)
return err;
return 0;
}
/* Called after SoC board_late_init in fsl-layerscape/soc.c */
int fsl_board_late_init(void)
{
@@ -251,6 +303,24 @@ int ft_board_setup(void *blob, struct bd_info *bd)
fdt_fixup_icid(blob);
/* This fixup may fail for legitimate
* reasons (see comments for fdt_fixup_usb_hub).
* Hence, errors with it are silently ignored.
*/
fdt_fixup_usb_hub(blob);
return 0;
}
/* board_fix_fdt: fixup function for internal (U-Boot) FDT */
int board_fix_fdt(void *fdt)
{
u32 board_rev = ten64_get_board_rev();
/* Delete USB Hub references in U-Boot's FDT on
* boards without one.
*/
if (board_rev == TEN64_BOARD_REV_D)
fdt_fixup_usb_hub(fdt);
return 0;
}

View File

@@ -7,7 +7,7 @@ CONFIG_ENV_SIZE=0x80000
CONFIG_ENV_OFFSET=0x500000
CONFIG_ENV_SECT_SIZE=0x80000
CONFIG_DM_GPIO=y
CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-ten64"
CONFIG_DEFAULT_DEVICE_TREE="freescale/fsl-ls1088a-ten64"
CONFIG_QSPI_AHB_INIT=y
CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT=y
CONFIG_SEC_FIRMWARE_ARMV8_PSCI=y
@@ -21,8 +21,10 @@ CONFIG_FIT_VERBOSE=y
CONFIG_BOOTSTD_FULL=y
CONFIG_BOOTSTD_BOOTCOMMAND=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_OF_BOARD_FIXUP=y
CONFIG_OF_BOARD_SETUP=y
CONFIG_OF_STDOUT_VIA_ALIAS=y
CONFIG_OF_UPSTREAM=y
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/ram0 earlycon=uart8250,mmio,0x21c0500 ramdisk_size=0x3000000 default_hugepagesz=2m hugepagesz=2m hugepages=256"
CONFIG_SYS_PBSIZE=532
@@ -88,7 +90,10 @@ CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
CONFIG_FSL_QSPI=y
CONFIG_TPM_ATMEL_TWI=y
CONFIG_USE_PREBOOT=y
CONFIG_PREBOOT="usb start"
CONFIG_USB=y
CONFIG_USB_ONBOARD_HUB=y
CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y