Commit Graph

28401 Commits

Author SHA1 Message Date
Tom Rini
817653c53d Merge tag 'u-boot-stm32-20260430' of https://source.denx.de/u-boot/custodians/u-boot-stm
- arm; stm32mp2: Factorize TAMP_FWU_BOOT_IDX_MASK/OFFSET definition
- arm: stm32mp: Drop unnecessary BOARD_EARLY_INIT_F usage
- board: stm32mp25: support dynamic A/B bank bootup
- board: stm32pm1: Fix board_check_usb_power()
- clk: stm32: Add STM32MP23 support
- video: stm32: dsi: fix unchecked return values
- video: support Rocktech RK050HR345-CT106A panel
- Remove non-existent STM32_RESET flag
2026-04-30 09:10:18 -06:00
Dario Binacchi
49e78d1256 video: support Rocktech RK050HR345-CT106A panel
Add support for the Rocktech RK050HR345-CT106A RGB panel. This model
uses an Ilitek ILI9806E controller over the SPI bus for initialization
and register configuration only.

The driver is designed to be easily extensible to support other panels
with different sequences and timings by providing a specific descriptor
structure for each model.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:12 +02:00
Dario Binacchi
723e0360ee spi: stm32: extend support to STM32MP25
The SPI IP in this platform is fully compatible with the current driver
implementation, requiring only a new compatible string.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:11 +02:00
Dario Binacchi
011feb0028 spi: stm32: add support for bits-per-word setting
Implement the set_wordlen operation to allow dynamic bus width
configuration. This is required for peripherals with non-standard
requirements, such as display panels that need 9-bit word transfers
during the initialization and setup phase.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:11 +02:00
Dario Binacchi
dd5002856a spi: stm32: add stm32_spi_is_enabled() helper
Add a helper to check the SPE (SPI Enable) bit and replace the
open-coded bitwise check in stm32_spi_stopxfer() with this helper to
improve readability and consistency.

This is also a preparatory step for future driver updates that require
checking the SPI enable state across different code paths.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:11 +02:00
Dario Binacchi
17c022271d spi: stm32: clean up buffer length assignment
Remove redundant divisions by using the already available xferlen
variable for setting the rx/tx buffer lengths.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:11 +02:00
Dario Binacchi
ab5c0191e1 test: spi: add sandbox_spi_get_wordlen interface
Add the sandbox_spi_get_wordlen() public interface to retrieve the
internal word length state of the sandbox SPI device.

This is intended for use in sandbox SPI test cases to verify that
the word length is correctly propagated from the SPI uclass to
the driver.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
2026-04-30 08:01:11 +02:00
Dario Binacchi
fa1801abc7 spi: sandbox_spi: support wordlen setup
The driver currently ignores the word length configuration. Implement
the set_wordlen operation to store and track the current word length.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
2026-04-30 08:01:11 +02:00
Dario Binacchi
7b879ddbc5 spi: add support for bits-per-word setting
Allow dynamic configuration of the SPI word length. This is required
for controllers and slaves that need to operate with non-standard
word lengths, such as 9-bit wide transfers.

Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
Reviewed-by: Simon Glass <simon.glass@canonical.com>
2026-04-30 08:01:11 +02:00
Patrice Chotard
5a379cca5b clk: stm32: Add STM32MP23 support
Add STM32MP23 support.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Raphaël Gallais-Pou <rgallaispou@gmail.com>
2026-04-30 08:01:11 +02:00
Patrice Chotard
c8f7b41730 spi: add STM32MP23 OSPI support
Add STM32MP23 OSPI support.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:11 +02:00
Raphael Gallais-Pou
51678d9479 video: stm32: dsi: fix unchecked return values
Fix the following errors yielded by Coverity Scan:

CID 644836:         Error handling issues  (CHECKED_RETURN)
Calling device_chld_unbind without checking return value (as is done elsewhere 6 out of 7 times)
CID 644834:         Error handling issues  (CHECKED_RETURN)
Calling device_chld_remove without checking return value (as is done elsewhere 4 out of 5 times).

Link: https://lore.kernel.org/r/20260309212331.GF1388590@bill-the-cat/
Fixes: a6d047c0a8 ("video: stm32: remove all child of DSI bridge when its probe failed")

Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2026-04-30 08:01:11 +02:00
Julien Stephan
a97c82bfdf power: pmic: mtk-pwrap: add MT8195 support
Add mt8195 support.

Support comes directly from commit e88edc977b00 ("soc: mediatek: pwrap:
add pwrap driver for MT8195 SoC") from the Linux Kernel.

Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-8-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:27:05 -05:00
Julien Stephan
e262eb4cfe power: pmic: mtk-pwrap: use tabs for alignment
Fix mt8188_regs definition to use tabs instead of spaces for alignment
to be consistent with other definitions.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Signed-off-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-7-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:26:52 -05:00
David Lechner
df660cc7b2 power: pmic: mtk-pwrap: use pmic compatible to select child info
Change the logic for selecting pmic_children_info to use the compatible
string from the devicetree instead of expecting the pwrap (part of the
MCU) to correspond to the separate PMIC chip.

In addition to being more correct, it also saves a few lines of code for
each MCU type that is added by dropping the enum and type field.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-6-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:26:48 -05:00
David Lechner
27fdacf420 power: pmic: mtk-pwrap: remove interrupt related code
Remove the interrupt related code in mtk-pwrap driver. This was just
enabling interrupts without any handler.

Even if we did have a handler, the only thing we could do is log a
message. Since U-Boot isn't long running, this likely wouldn't be very
useful.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-5-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:16:01 -05:00
David Lechner
b60d1c5262 power: pmic: mtk-pwrap: drop PWRAP_SLV_CAP_DUALIO on mt6359
Drop the PWRAP_SLV_CAP_DUALIO flag from the mt6359 PMIC definition. The
mt6359p variant of the PMIC does support dual I/O.

Prior to this change, the driver would attempt to write to the
PWRAP_DEW_DIO_EN register, which was not defined, so would write
register 0 (DONE2).

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-4-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:08:18 -05:00
David Lechner
8c5f5ef2c9 power: pmic: mtk-pwrap: add init capability flag
Add a PWRAP_CAP_INIT capability flag to specify if it is safe to call
pwrap_init() or not. Not all targets define the registers accessed
by pwrap_init(). In that case, it is expected that an earlier bootloader
has already initialized the PMIC. If not, we now return an error instead
of trying to access undefined registers.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-3-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:08:18 -05:00
David Lechner
3996c20956 power: pmic: mtk-pwrap: add PWRAP_CAP_WDT_SRC flag
Add a PWRAP_CAP_WDT_SRC flag to indicate if a PMIC wrapper has a WDT_SRC
or not. Then use this to conditionally enable the watchdog timer.

Prior to this change, since the register was not defined, it defaulted
to 0, so the wrong register (DONE2) was being written to.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-2-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:08:18 -05:00
David Lechner
98116c0ef8 power: pmic: mtk-pwrap: fix file description
Fix the comment at the start of the file to accurately describe what
this file does. The old description was likely copied from the related
regulator driver.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260409-mtk-pmic-fixes-v2-1-73e83aa6345b@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-29 09:08:18 -05:00
Meiker Gao
6c881e9980 spi: mtk_snor: Remove status register write procedure in probe()
Remove status register write procedure in probe(). This is handled in
spi-nor-core by the SPI_NOR_HAS_LOCK flag.

Signed-off-by: Meiker Gao <ot_meiker.gao@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-8-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:16:32 -05:00
Macpaul Lin
28bd639677 spi: mtk_snor: fix zeroed data in DMA read bounce path
Implement proper bounce buffer handling for the read path to fix zeroed
data when using DMA. In the bounce path, map the bounce buffer with
dma_map_single(), perform DMA using bounce_dma, then copy data from the
bounce buffer to the user buffer, and finally unmap with
dma_unmap_single().

Signed-off-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-7-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:11:19 -05:00
Noah.Shen
1cfcd7100d spi: mtk_snor: support newer SOCs
Add support for some newer SOCs. New compatible strings are added to the
lookup table. Some SOCs also need a extra bit clocked out as a hardware
quirk, so a new capability structure and code is added to support that.

Signed-off-by: Noah.Shen <noah.shen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-6-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:11:19 -05:00
Noah.Shen
78950bb207 spi: mtk-snor: add bounds checking in mtk_snor_cmd_program()
Add bounds checking of the various lengths in mtk_snor_cmd_program() to
prevent reading or writing registers out of bounds.

Signed-off-by: Noah.Shen <noah.shen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-5-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:11:19 -05:00
Noah.Shen
55944a68d5 spi: mtk_snor: check return value of mtk_snor_cmd_exec()
Always check the return value of mtk_snor_cmd_exec() and propagate the
error.

Signed-off-by: Noah.Shen <noah.shen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-4-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:11:19 -05:00
Noah.Shen
3b0a037052 spi: mtk_snor: conditionally copy tx/rx data
Only write out data for OUT command and read in data for IN commands.

Signed-off-by: Noah.Shen <noah.shen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-3-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:11:19 -05:00
Noah.Shen
4eac47d4eb spi: mtk_snor: avoid alloc in mtk_snor_cmd_program()
Rework mtk_snor_cmd_program() to avoid allocating a temporary buffer
for tx data. This improves performance a bit by avoiding the need to
allocate memory and copy data an extra time.

Signed-off-by: Noah.Shen <noah.shen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-2-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:11:19 -05:00
Noah.Shen
4f9842e479 spi: mtk_snor: clean up comments
Avoid use of C++-style comments and fix multi-line comment style.

Signed-off-by: Noah.Shen <noah.shen@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260406-mtk-spi-nor-improvements-v1-1-66f675cbbd3e@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 13:11:19 -05:00
ht.lin
8436dd6b0e mmc: mtk-sd: fix msdc cmd ready check
Correct the check condition in msdc_cmd_is_ready() for MSDC_PS_DAT0
polling. Without this change, it may not be able to detect if the SD
controller is busy correctly for issuing the command.

Fixes: d24b693959 ("mmc: mtk-sd: add SD/MMC host controller driver for MT7623 SoC")
Signed-off-by: ht.lin <ht.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260421-mmc-mtk-sd-fixes-v1-3-5b840c546af2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 10:45:07 -05:00
David Lechner
93f67d893b mmc: mtk-sd: enable async_fifo_crcsts on mt8189
Enable the async_fifo_crcsts option for mediatek,mt8189-mmc compatible.

Without this option, writing will fail in HS200 mode.

Fixes: b3d16267b5 ("mmc: mtk-sd: add mediatek,mt8189-mmc compatible")
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260421-mmc-mtk-sd-fixes-v1-2-5b840c546af2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 10:45:07 -05:00
David Lechner
336602a2f9 mmc: mtk-sd: enable DMA on mediatek,mt8189-mmc
Enable DMA on mediatek,mt8189-mmc compatible. The issue that was
preventing DMA from working correctly was fixed by the
get_effective_memsize() implementation in commit a7c682565b ("arm:
mediatek: add support of MT8189 SoC family").

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260421-mmc-mtk-sd-fixes-v1-1-5b840c546af2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-04-28 10:45:07 -05:00
Tom Rini
9b04bda886 Merge patch series "scsi: Replace SYNC_CACHE with FUA for scsi write"
Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com> says:

This series replaces the SYNC_CACHE approach with FUA (Force Unit
Access) to prevent data loss during board resets while avoiding
system hangs during large sparse image flashing operations.

The previous SYNC_CACHE implementation caused timeouts and hangs
when flashing large sparse images because it issued cache sync
commands after every write operation. The FUA approach achieves
the same data integrity goal by setting the FUA bit in
WRITE10 commands.

Link: https://lore.kernel.org/r/20260416-enable_fua-v3-0-84508de2bfd9@oss.qualcomm.com
2026-04-27 13:44:11 -06:00
Aswin Murugan
4b42c59a34 scsi: Enable FUA bit in WRITE10 commands
Enable the Force Unit Access (FUA) bit in SCSI WRITE10 commands to
ensure writes bypass the device's volatile cache and go directly to
non-volatile storage. This provides write-through behavior that prevents
data loss during board resets.

Reviewed-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-27 13:44:06 -06:00
Balaji Selvanathan
34a44dad74 Revert "scsi: sync cache on write"
While the SYNC_CACHE approach prevents data loss during board resets,
it causes system hangs during large sparse image flashing operations.
This will be replaced with a FUA (Force Unit Access) approach in future
commit, which achieves the same data integrity goal more efficiently.

This reverts commit ffe4e6ab42.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-04-27 13:44:06 -06:00
Tom Rini
96c8b9c4ce Merge patch series "net: migrate NO_NET out of the networking stack choice"
Quentin Schulz <foss+uboot@0leil.net> says:

This migrates the net options away from the main Kconfig to net/Kconfig,
rename the current NET option to NET_LEGACY to really highlight what it
is and hopefully encourage more people to use lwIP, add a new NET
menuconfig (but keep NO_NET as an alias to NET=n for now) which then
allows us to replace all the "if legacy_stack || lwip_stack" checks with
"if net_support" which is easier to read and maintain.

The only doubt I have is wrt SYS_RX_ETH_BUFFER which seems to be needed
for now even when no network is configured? Likely due to
include/net-common.h with PKTBUFSRX?

No change in behavior is intended. Only change in defconfig including
other defconfigs where NO_NET=y or NET is not set, in which case NO_NET
is not set or NET=y should be set in the top defconfig. Similar change
required for config fragments. See commit log in patch adding NET
menuconfig for details.

This was tested based on 70fd0c3bb7 ("x86: there is no
CONFIG_UBOOT_ROMSIZE_KB_12288"), from within the GitLab CI container
trini/u-boot-gitlab-ci-runner:noble-20251013-23Jan2026 and set up
similarly as in "build all platforms in a single job" GitLab CI job.

 #!/usr/bin/env bash
 set -o pipefail
 set -eux

 ARGS="-BvelPEWM --reproducible-builds --step 0"
 ./tools/buildman/buildman -o ${O} --force-build $ARGS -CE $*
 ./tools/buildman/buildman -o ${O} $ARGS -Ssd $*

O=../build/u-boot/ ../u-boot.sh -b master^..b4/net-kconfig |& tee ../log.txt

I can't really decipher the log.txt, but there's no line starting with
+ which would be an error according to tools/buildman/builder.py help
text. Additionally, because I started the script with set -e set and
because buildman has an exit code != 0 when it fails to build a board,
and I have the summary printed (which is the second buildman call), I
believe it means all builds passed.

The summary is the following:
   aarch64: (for 537/537 boards) all +0.0 rodata +0.0
            uniphier_v8    : all +1 rodata +1
               u-boot: add: 0/0, grow: 1/0 bytes: 1/0 (1)
                 function                                   old     new   delta
                 data_gz                                  10640   10641      +1
       arm: (for 733/733 boards) all -0.0 rodata -0.0
            uniphier_v7    : all -1 rodata -1
               u-boot: add: 0/0, grow: 0/-1 bytes: 0/-1 (-1)
                 function                                   old     new   delta
                 data_gz                                  11919   11918      -1
            opos6uldev     : all -3 rodata -3
               u-boot: add: 0/0, grow: 0/-1 bytes: 0/-3 (-3)
                 function                                   old     new   delta
                 data_gz                                  18778   18775      -3
            uniphier_ld4_sld8: all -3 rodata -3
               u-boot: add: 0/0, grow: 0/-1 bytes: 0/-3 (-3)
                 function                                   old     new   delta
                 data_gz                                  11276   11273      -3
            stemmy         : all -20 rodata -20
               u-boot: add: 0/0, grow: 0/-1 bytes: 0/-20 (-20)
                 function                                   old     new   delta
                 data_gz                                  15783   15763     -20

As far as I could tell this data_gz is an automatically generated array
when CONFIG_CMD_CONFIG is enabled. It is the compressed .config stored
in binary form. Because I'm changing the name of symbols, replacing a
menu with a menuconfig, additional text makes it to .config and the
"# Networking" section in .config disappears.

Here is the diff for the 5 defconfigs listed above, generated with:

for f in build/*-m; do
	diff --unified=0 $f/.config $(dirname $f)/$(basename -a -s '-m' $f)/.config
done

(-m is the build directory for master, and without the suffix, it's the
top commit of this series)

"""
 --- build/opos6uldev-m/.config	2026-04-20 10:53:49.804528526 +0200
 +++ build/opos6uldev/.config	2026-04-20 11:03:37.430242767 +0200
 @@ -970,4 +969,0 @@
 -
 -#
 -# Networking
 -#
 @@ -975,0 +972 @@
 +CONFIG_NET_LEGACY=y
 --- build/stemmy-m/.config	2026-04-20 11:01:33.653698123 +0200
 +++ build/stemmy/.config	2026-04-20 11:04:53.452577311 +0200
 @@ -733,4 +732,0 @@
 -
 -#
 -# Networking
 -#
 @@ -738,2 +733,0 @@
 -# CONFIG_NET is not set
 -# CONFIG_NET_LWIP is not set
 --- build/uniphier_ld4_sld8-m/.config	2026-04-20 11:00:41.605469071 +0200
 +++ build/uniphier_ld4_sld8/.config	2026-04-20 11:04:22.226439899 +0200
 @@ -997,4 +996,0 @@
 -
 -#
 -# Networking
 -#
 @@ -1002,0 +999 @@
 +CONFIG_NET_LEGACY=y
 --- build/uniphier_v7-m/.config	2026-04-20 10:53:04.019307319 +0200
 +++ build/uniphier_v7/.config	2026-04-20 11:03:01.688085486 +0200
 @@ -1004,4 +1003,0 @@
 -
 -#
 -# Networking
 -#
 @@ -1009,0 +1006 @@
 +CONFIG_NET_LEGACY=y
 --- build/uniphier_v8-m/.config	2026-04-20 10:43:05.614441175 +0200
 +++ build/uniphier_v8/.config	2026-04-20 10:41:03.214852130 +0200
 @@ -875,4 +874,0 @@
 -
 -#
 -# Networking
 -#
 @@ -880,0 +877 @@
 +CONFIG_NET_LEGACY=y
"""

This is fine:
- Networking menu doesn't exist anymore so "#\n# Networking\n#\n" won't
  be in .config anymore.
- opos6uldev, uniphier_ld4_sld8, uniphier_v7 and uniphier_v8 all have
  (old) CONFIG_NET enabled, (new) CONFIG_NET will still be set but
  CONFIG_NET_LEGACY also needs to be defined now to reflect the stack
  choice (even if default),
- stemmy has CONFIG_NO_NET set, which means CONFIG_NET and
  CONFIG_NET_LWIP are not reachable anymore hence why they don't need to
  be part of .config,

GitLab CI was run on this series (well, not exactly, but it's only
changes to the git logs that were made):
https://source.denx.de/u-boot/contributors/qschulz/u-boot/-/pipelines/29849

It passes.

Link: https://lore.kernel.org/r/20260420-net-kconfig-v1-0-9900002d8e72@cherry.de
2026-04-27 11:28:25 -06:00
Quentin Schulz
95d66d2eb0 simplify NET_LEGACY || NET_LWIP condition with NET condition
Since the move to make NET a menuconfig and NO_NET a synonym of NET=n,
when NET is enabled, NET_LEGACY || NET_LWIP is necessarily true, so
let's simplify the various checks across the codebase.

SPL_NET_LWIP doesn't exist but SPL_NET_LEGACY is an alias for SPL_NET so
the proper symbol is still defined in SPL whenever needed.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-04-27 11:26:40 -06:00
Quentin Schulz
b8cd444225 rename NET to NET_LEGACY
Highlight that NET really is the legacy networking stack by renaming the
option to NET_LEGACY.

This requires us to add an SPL_NET_LEGACY alias to SPL_NET as otherwise
CONFIG_IS_ENABLED(NET_LEGACY) will not work for SPL.

The "depends on !NET_LWIP" for SPL_NET clearly highlights that it is
using the legacy networking app so this seems fine to do.

This also has the benefit of removing potential confusion on NET being a
specific networking stack instead of "any" network stack.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2026-04-27 11:26:40 -06:00
Christian Pötzsch
bb4142af7e virtio: add support for SIZE_MAX & SEG_MAX features
Some virtio implementations may forward the virtio requests directly to
the underlying hw. The hw may have some restrictions in how many and how
big the requests can be. Therefore, the corresponding virtio device will
announce this limitations with the SIZE_MAX & SEG_MAX feature.

Add support for those features. Split an io request into multiple virtio
requests if more than seg_max segments would be used. Also split a
single buffer request into multiple segments if the buffer is bigger
then size_max.

Signed-off-by: Christian Pötzsch <christian.poetzsch@kernkonzept.com>
Signed-off-by: Adam Lackorzynski <adam@l4re.org>
2026-04-27 11:11:54 -06:00
Maximilian Brune
6ab5b5d280 pci: correct PCI device enumeration to include all functions on device 0
Currently the implementation does not just skip all devices beside
device 0, it also skips all functions (besides 0) on device 0. This
broke basically all AMD platforms, since they have a lot of internal SOC
devices behind these functions.

This was detected, because the XHCI controller and therefore the USB
devices were not found by u-boot on AMD/crater platform.

PCI_MASK_BUS() returns both device and function bits, so it skips any
bdf where either device > 0 or function > 0. Using PCI_DEV() extracts
only the device number, matching the intent in only_one_child().
It therefore now checks all functions on device 0 (Linux does the same).

I build tested u-boot as coreboot payload and run it on a recent x86 AMD
platform. Devices like the XHCI controller are now found again.

Fixes: fbde868ba4 ("pci: skip unnecessary PCIe scanning")
Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CC: Tom Rini <trini@konsulko.com>
CC: Andrew Goodbody <andrew.goodbody@linaro.org>
CC: George McCollister <george.mccollister@konsulko.com>
CC: Simon Glass <sjg@chromium.org>
2026-04-27 11:11:08 -06:00
Tom Rini
e0991f42aa Merge branch 'casey/qcom-main-13Apr2026' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
Various Qualcomm additions this cycle:
* USB superspeed support for 1 platform
* Initial support for the Milos platform and the Fairphone Gen 6
  (chainloaded from ABL)
* Improved support for booting with OP-TEE on supported platforms
* Initial basic power domain support

Notably there is a generic change to the device core, missing power
domains will no longer cause a device to fail probe and instead will
just print a warning. This shouldn't affect any existing platforms.
2026-04-27 08:05:40 -06:00
Tom Rini
1a4cb8dc03 Merge tag 'u-boot-ufs-20260427' of https://source.denx.de/u-boot/custodians/u-boot-ufs
- Update line reset configuration for rcar-gen5
- core: Fix heap corruption due to out of bounds write
- rockchip: Make use of controller resets
2026-04-27 08:04:22 -06:00
Tom Rini
ee35366a64 Merge tag 'u-boot-amlogic-next-20260427' of https://source.denx.de/u-boot/custodians/u-boot-amlogic
- enable EFI Capsule on Disk (+ sysreset fixup/cleanup)
- do not fail when setting SD_EMMC_x_CLK0 on GX/G12
2026-04-27 08:04:06 -06:00
Luca Weiss
50154283d7 gpio: qcom: Support GPIOs on PM7550 PMIC
The GPIOs on PM7550 work fine using the qcom_spmi_gpio driver and
enables the use of the Volume Up button on the Fairphone (Gen. 6)
smartphone.

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-5-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Luca Weiss
d23376cb7c regulator: qcom-rpmh-regulator: add support for PM7550 regulators
Add the PM7550 regulator data found on Qualcomm Milos devices.
The tables are imported from the Linux driver (tag v7.0-rc4). The SMPS
regulators were not added now.

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-4-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Luca Weiss
a0c9ff699f phy: qcom: Add Milos to QMP UFS PHY driver
Import the configuration for the Milos SoC from Linux (tag v7.0-rc4).

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-3-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Luca Weiss
0661dc3305 clk/qcom: Add Milos clock driver
Add Clock driver for the GCC block found in the Milos SoC.

The qcom-snps-eusb2-hsphy driver requires the TCXO frequency ("ref"
clock), so we need to pass that as well.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-2-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Luca Weiss
8e4fd3d1c3 drivers: pinctrl: Add Qualcomm Milos TLMM driver
Add support for TLMM pin controller block (Top Level Mode Multiplexer)
on Milos SoC, with support for special pins.

Correct pin configuration is required for working debug UART and eMMC/SD
cards.

Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Link: https://patch.msgid.link/20260318-milos-bringup-v2-1-650b91dd75d8@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Ajit Singh
16a16b55ce clk: qcom: sc7280: add missing SDCC1 clocks
Add GCC_SDCC1_AHB_CLK and GCC_SDCC1_APPS_CLK gate clocks.
Required on platforms where SDCC1 is used for eMMC.

Link: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit?id=a3cc092196ef63570c8744c3ac88c3c6c67ab44b

Signed-off-by: Ajit Singh <blfizzyy@gmail.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://patch.msgid.link/20260226193217.82657-1-blfizzyy@gmail.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Sumit Garg
3eefe12b4b tee: optee: Export OP-TEE message UID check API
OP-TEE message UID check API can be useful to know whether OP-TEE
is enabled on not assuming the corresponding SMC call is properly
handled if OP-TEE is not supported.

This API can be used by platform code to know OP-TEE presence and
on that basis OP-TEE DT node can be added as part of DT fixups for
the OP-TEE driver probe to happen for both U-Boot and Linux.

Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20260127062341.723966-2-sumit.garg@kernel.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00
Varadarajan Narayanan
32825eaddc sysreset: Implement PSCI based reset to EDL mode for QCOM SoCs
Implement request_arg() sysreset_op for QCOM SoCs that use
PSCI to reset to EDL (Emergency Download) mode.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Signed-off-by: Varadarajan Narayanan <varadarajan.narayanan@oss.qualcomm.com>
Link: https://patch.msgid.link/20260121063920.1500293-4-varadarajan.narayanan@oss.qualcomm.com
[casey: add missing ARM_SMCCC depends to kconfig to fix CI allyesconfig]
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2026-04-27 12:38:44 +02:00