Commit Graph

105882 Commits

Author SHA1 Message Date
Chris Packham
2ea4d3f8a5 watchdog: orion_wdt: Add support for armada-xp
Update the orion_wdt.c to support armada-xp and similar SoCs. The WDT
block used in armada-xp is fairly close to the armada-380 with just a
few differences that can be handled based on the compatible property.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <stefan.roese@mailbox.org>
2026-06-09 11:51:19 +02:00
Tom Rini
e91911169b Merge tag 'v2026.07-rc4' into next
Prepare v2026.07-rc4
2026-06-08 15:28:18 -06:00
Tom Rini
1296a428c6 Prepare v2026.07-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
v2026.07-rc4
2026-06-08 13:43:04 -06:00
Frank Böwingloh
6d7171bcfe smbios: Fix wrong sysinfo ID for Type 3 enclosure asset tag
smbios_write_type3() uses SYSID_SM_BASEBOARD_ASSET_TAG (Type 2) instead
of SYSID_SM_ENCLOSURE_ASSET_TAG (Type 3) for the enclosure asset tag.
This causes the enclosure's asset tag to be read from the baseboard
sysinfo field rather than the enclosure-specific one.

Fixes: bcf456dd ("smbios: add detailed smbios information")

Signed-off-by: Frank Böwingloh <f.boewingloh@beckhoff.com>
Cc: Raymond Mao <raymondmaoca@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Raymond Mao <raymondmaoca@gmail.com>
2026-06-08 13:29:03 -06:00
Marek Vasut
3dd149ba17 lmb: Rename LMB_LIMIT_DMA_BELOW_4G to LMB_LIMIT_DMA_BELOW_RAM_TOP
Rename LMB_LIMIT_DMA_BELOW_4G to LMB_LIMIT_DMA_BELOW_RAM_TOP
to make the Kconfig option more descriptive. No functional
change.

Suggested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2026-06-08 13:28:49 -06:00
Tom Rini
5d4d6e331d Merge tag 'xilinx-for-v2026.10-rc1-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
AMD/Xilinx/FPGA changes for v2026.10-rc1 v2

zynqmp:
- Clean up USB gadget configuration

mbv:
- Reduce SPL size

versal:
- Add support for A/B capsule update

versal2:
- Add support for A/B capsule update

reset:
- Introduce reset_reset_bulk() generic interface
- zynqmp: Implement reset_reset_bulk() interface

spi:
- cadence: Switch to reset_reset_bulk() interface
2026-06-08 08:36:57 -06:00
Michal Simek
8efa173b38 reset: zynqmp: Implement rst_reset using PM_RESET_ACTION_PULSE
Implement the rst_reset operation in the ZynqMP reset driver to use
PM_RESET_ACTION_PULSE. This allows the reset controller to perform
a reset pulse in a single firmware call instead of separate assert
and deassert calls.

This matches the Linux kernel implementation of zynqmp_reset_reset().

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/be77d6f1b60f591ef626c14229d85c5cab867967.1779709539.git.michal.simek@amd.com
2026-06-08 10:50:06 +02:00
Michal Simek
f59b7a010e spi: cadence: Use reset_reset_bulk() for proper reset cycling
Use the new reset_reset_bulk() API to properly cycle reset signals
during probe instead of just deasserting them. This ensures the
controller is properly reset before initialization.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/92e614075d2c4820d3e4485aa0bdda11efd1f7ca.1779709539.git.michal.simek@amd.com
2026-06-08 10:50:06 +02:00
Michal Simek
4e3f64c7cc reset: sandbox: Cover reset_reset() fallback with second sandbox provider
Add a sandbox reset controller compatible string
"sandbox,reset-ctl-fallback-only" that reuses the existing sandbox assert,
deassert, request, and free helpers but omits rst_reset. That forces
reset_reset() through the core assert / udelay / deassert fallback.

Extend the reset-ctl-test DT node with a fifth reset line named "fallback"
that points at the new provider, and add dm_test_reset_reset_fallback_path
which verifies sandbox_reset_get_count() stays zero (rst_reset is never
invoked) while the line ends deasserted after reset_reset().

This complements the existing rst_reset coverage on sandbox,reset-ctl and
matches the approach of using a separate controller to exercise the
fallback path in unit tests.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/c1d40db6e2332a8b23ba842385b3f8c3d0290109.1779709539.git.michal.simek@amd.com
2026-06-08 10:50:06 +02:00
Michal Simek
724d3cafe3 reset: Add sandbox tests for reset_reset() and reset_reset_bulk()
Add DM test coverage for the new reset_reset() and reset_reset_bulk()
API functions.
The sandbox reset driver implements rst_reset so these tests exercise that
op (not the assert/udelay/deassert fallback in reset_reset()).
reset_reset_bulk() calls reset_reset() on each bulk entry in order, so each
line's rst_reset runs in sequence.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/be5411daf0de8eb64fbddf06e8ad82f50066e811.1779709539.git.michal.simek@amd.com
2026-06-08 10:50:06 +02:00
Michal Simek
19f7def264 reset: Add reset_reset() and reset_reset_bulk() API
Add reset_reset() and reset_reset_bulk() functions to the reset
controller API. These functions assert and then deassert reset signals
in a single call, providing a convenient way to pulse/toggle a reset
line.

This mimics the Linux kernel's reset_control_reset() and
reset_control_bulk_reset() APIs. The new functions are useful for
drivers that need to cycle a reset line during initialization or
error recovery but with also passing delay parameter.

If a driver implements the rst_reset op, it will be called directly
with the delay parameter. Otherwise, the reset core performs
reset_assert(), optional udelay(), and reset_deassert() as fallback.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/55ddd313c9e7b2d4dc79ab36bdd0040f871610f6.1779709539.git.michal.simek@amd.com
2026-06-08 10:50:06 +02:00
Padmarao Begari
4706bd0208 configs: amd: Enable capsule update and DFU support
Enable EFI capsule update configs (EFI_RUNTIME_UPDATE_CAPSULE,
EFI_CAPSULE_ON_DISK, EFI_CAPSULE_ON_DISK_EARLY, and
EFI_CAPSULE_FIRMWARE_RAW) and DFU backend configs (DFU_MMC,
DFU_MTD, DFU_SF) for the Versal Gen 2 virtual platform. Increase
SYS_MALLOC_LEN, SYS_MALLOC_F_LEN and SYS_INIT_SP_BSS_OFFSET to
accommodate capsule update buffer requirements.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260514103845.1761891-1-padmarao.begari@amd.com
2026-06-08 10:50:06 +02:00
Padmarao Begari
de6b77c22f configs: xilinx: Enable DFU MTD support
Enable CONFIG_DFU_MTD and CONFIG_DM_MTD to support DFU transfers
over MTD partitions, required for FWU multi-bank update using
NOR flash.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260514102601.1759779-7-padmarao.begari@amd.com
2026-06-08 10:50:06 +02:00
Padmarao Begari
edccbc53af board: xilinx: Add FWU boot index support
Add fwu_plat_get_alt_num() and fwu_plat_get_bootidx() platform
callbacks required for FWU multi-bank update on Versal and Versal
Gen 2. The boot index is read from the PMC Global PGGS4 register
which is populated by PLM with a magic number and boot partition
index. Uses firmware IOCTL when CONFIG_ZYNQMP_FIRMWARE is enabled,
otherwise falls back to direct MMIO read.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260514102601.1759779-6-padmarao.begari@amd.com
2026-06-08 10:50:05 +02:00
Padmarao Begari
818c06faa1 board: amd: Add capsule and FWU support
Add configure_capsule_updates() supporting MMC, SD and QSPI/OSPI
boot modes for DFU string generation. Add set_dfu_alt_info() for
FWU multi-bank mode to generate DFU alt info from NOR flash MTD
partitions. Add XILINX_BOOT_IMAGE_GUID for the capsule updatable
firmware image.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260514102601.1759779-5-padmarao.begari@amd.com
2026-06-08 10:50:05 +02:00
Padmarao Begari
371a6c1744 board: xilinx: Add capsule and FWU support
Guard configure_capsule_updates() so it is skipped when FWU
multi-bank update is enabled. Add set_dfu_alt_info() for FWU
multi-bank mode to generate DFU alt info dynamically from NOR
flash MTD partitions using fwu_gen_alt_info_from_mtd().

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260514102601.1759779-4-padmarao.begari@amd.com
2026-06-08 10:50:05 +02:00
Padmarao Begari
f2390069d4 firmware: zynqmp: Add PMC PGGS register read API
Add zynqmp_pm_get_pmc_global_pggs_reg() to read PMC Global PGGS3
and PGGS4 registers via firmware IOCTL. Supports IOCTL_READ_PGGS
as the preferred path and falls back to IOCTL_READ_REG for older
PLM firmware versions that do not support IOCTL_READ_PGGS.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260514102601.1759779-3-padmarao.begari@amd.com
2026-06-08 10:50:05 +02:00
Padmarao Begari
7188742e7e arm64: xilinx: Add PMC PGGS3 and PGGS4 registers
Add PMC Global PGGS3 and PGGS4 register defines to Versal and
Versal Gen 2 hardware headers. These registers hold boot index
and boot metadata required for FWU multi-bank update support.

Signed-off-by: Padmarao Begari <padmarao.begari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260514102601.1759779-2-padmarao.begari@amd.com
2026-06-08 10:50:05 +02:00
Michal Simek
472ea8b621 xilinx: mbv: Allow compiler to optimize inlining in SPL
Enable CONFIG_SPL_OPTIMIZE_INLINING to let the compiler decide which
functions marked 'inline' to actually inline, rather than forcing all of
them. This reduces SPL code size by allowing the compiler to eliminate
unnecessary code duplication.

   spl/u-boot-spl: all -872 text -872

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/09f2a62099abf561b91b0d3692714f0f29057d31.1777550623.git.michal.simek@amd.com
2026-06-08 08:02:39 +02:00
Michal Simek
62a49635b0 xilinx: mbv: Disable AVAILABLE_HARTS
The MicroBlaze V platform has only a single hart, so multi-hart
enumeration support is unnecessary. Disable CONFIG_AVAILABLE_HARTS
to reduce code size.

   all -121 data -12 text -109
   spl/u-boot-spl: all -68 data -4 text -64

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/511c3c05d29479a4d1410a902cc01963113c4e1a.1777550623.git.michal.simek@amd.com
2026-06-08 08:02:39 +02:00
Pranav Sanwal
38831cce70 board: zynqmp: Remove hardcoded USB ethernet initialization
usb_ether_init() called in board_late_init() when CONFIG_USB_ETHER
was enabled without CONFIG_USB_GADGET_DOWNLOAD.
This makes USB ethernet gadget a fixed default, with no way to opt
out at runtime without a rebuild.

Remove the hardcoded call. If USB ethernet gadget functionality is
needed, it can be added via the preboot environment variable.

Signed-off-by: Pranav Sanwal <pranav.sanwal@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260430093427.1852145-3-pranav.sanwal@amd.com
2026-06-08 08:02:39 +02:00
Pranav Sanwal
e81bb069a4 configs: zynqmp: Enable USB gadget download support
USB_GADGET_DOWNLOAD enables the g_dnl composite gadget framework,
allowing other functions to operate over the USB peripheral
interface.

Signed-off-by: Pranav Sanwal <pranav.sanwal@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/20260430093427.1852145-2-pranav.sanwal@amd.com
2026-06-08 08:02:39 +02:00
Tom Rini
9e87893c24 Merge tag 'u-boot-imx-next-20260605' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/30357

- Several conversions to OF_UPSTREAM.
- Improvements for TQMa6UL boards.
- Add iMX8MP UltraLite Part CPU type.
2026-06-05 11:37:51 -06:00
Tom Rini
b8b7761e89 Merge patch series "rtc: pcf85036: improve spec coherence and extend features"
Alexander Feilke <alexander.feilke@ew.tq-group.com> says:

This series fixes some spec inconsistencies and oversimplifications in the initial
PCF85063 support, and adds some missing features from mainline linux v6.19.

[trini: Make a minor correction to the Kconfig help that Alexander
        Sverdlin noted in review]
Signed-off-by: Tom Rini <trini@konsulko.com>
Link: https://lore.kernel.org/r/20260522153929.2472552-1-Alexander.Feilke@ew.tq-group.com
2026-06-05 10:14:24 -06:00
Alexander Feilke
8294d86b1d drivers: Kconfig: rtc_pcf85063: note unsupported chip features
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-06-05 10:14:24 -06:00
Alexander Feilke
059174b955 rtc: pcf85063: add power loss detection during probe
Retrofit from upstream linux to try resetting the device after power loss.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-06-05 10:14:24 -06:00
Alexander Feilke
d8f535cd8f rtc: pcf85063: support loading quartz-load capacitance from device tree
Use previously ignored quartz-load-femtofarads property from device tree
to set load capacitance. If missing, leave the device unconfigured
as a default might have been set. force_cap is left out for now but
can be retrofitted in the future as there may be different hardware
without the 12.500pF flag.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-06-05 10:14:24 -06:00
Alexander Feilke
2b6de25797 rtc: pcf85063: keep the divider chain in reset during set_time
Sync from upstream linux v6.19.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-06-05 10:14:24 -06:00
Alexander Feilke
49754d293e rtc: pcf85063: add missing register definitions
Sync definitions from upstream linux v6.19.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-06-05 10:14:24 -06:00
Alexander Feilke
1f04246641 rtc: pcf85063: add support for NXP PCF85063 family
Supported devices:

- generic PCF85063 / PCF85063TP (no alarm regs)
- PCF85063A / PCF85073A (alarm regs)

Tested with TQMa8MPxL SOM from TQ-Systems GmbH.

Also add missing .data field to rv8263 which represents the number
of available registers (= linux `pcf85063_config.max_register + 1`).

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-06-05 10:14:24 -06:00
Alexander Feilke
8763c0169d rtc: pcf85063: adjust date format to adhere to the rtc_time spec
The rtc_time documentation in rtc_def.h notes a differences
to the common "struct time" that specifies tm_mon as 1 ... 12
and tm_year as year since 0. Also trim register values to valid bits.

Fixes: 1c2a2253f7 ("drivers: rtc: add PCF85063 support")

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-06-05 10:14:24 -06:00
Markus Niebel
3bf0e5d90c cmd: date: validate date using rtc_month_days()
The old check accepted day 0 as well as Feb 29th in non-leap years.
With this change, both day and month 0 are rejected, and the local day
limit logic is now handled by rtc_month_days(), which correctly accounts
for month length and leap years.

In the 'MMDDhhmm' format case, tm_year is not initialized by mk_date().
The leap-year calculation in rtc_month_days() therefore depends on the
value provided by the caller, which do_date() does, via dm_rtc_get().
This is pre-existing behaviour, but is now made more explicit.

Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-06-05 10:14:24 -06:00
Alexander Feilke
58545b0106 cmd_date: make mk_date() static
Use static as this function is not used externally.

Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-06-05 10:14:24 -06:00
Peng Fan
3782bf8a0a cpu: imx8_cpu: fix the mpidr check
The mpidr's type is u32, however dev_read_addr returns a value with type
fdt_addr_t(phys_addr_t) which is 64bit long. So the check never fail.

This patch we still keep mpidr as u32 type, because i.MX8 only has max
two cluster, the higher 32bit will always be 0. Use a variable addr
to do the check, if check pass, assign the lower 32 bit to plat->mpidr.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
2026-06-05 12:57:02 -03:00
Ye Li
d0a62df753 cpu: imx8_cpu: Add iMX8MP UltraLite Part cpu type
iMX8MP UltraLite part is missed in the cpu type print

Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2026-06-05 12:57:02 -03:00
Alexander Feilke
33d46e7079 boards: tqma7: call tq-sysinfo setup
Probe TQ sysinfo drivers to print device info from eeprom during boot.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-06-05 12:56:32 -03:00
Alexander Feilke
0a3ccbdd25 arm: dts: tqma7: integrate tq,eeprom sysinfo driver
Add sysinfo node for tq,eeprom sysinfo driver.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-06-05 12:56:32 -03:00
Alexander Feilke
3880ac196b arm: dts: tqma7: add eeprom nvmem-layout
TQMa7 has board-information located in EEPROM at offset 0x20.
Add necessary nodes and properties for nvmem-cells.

Revert this commit once the upstream linux device trees are
accepted and synchronized.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-06-05 12:56:32 -03:00
Nora Schiffer
d57090e980 board: tq: common: add sysinfo setup helper
Add a setup helper based on the tq_eeprom sysinfo driver
and set up the U-Boot environment.

Signed-off-by: Nora Schiffer <nora.schiffer@ew.tq-group.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-06-05 12:56:32 -03:00
Nora Schiffer
a30556bc42 sysinfo: tq_eeprom: new driver
Introduce a sysinfo driver that can be instantiated from the device,
which will provide information from the EEPROM found on all TQ-Systems
SoMs.

Signed-off-by: Nora Schiffer <nora.schiffer@ew.tq-group.com>
Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-06-05 12:56:32 -03:00
Nora Schiffer
0ef21dd37d sysinfo: add sysinfo_get_and_detect() helper
sysinfo_detect() is commonly called after sysinfo_get(). Make the API a
bit more convenient to use by introducing a helper.

Signed-off-by: Nora Schiffer <nora.schiffer@ew.tq-group.com>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2026-06-05 12:56:32 -03:00
Nora Schiffer
fa03ee371d sysinfo: uclass: use sysinfo_priv size for per_device_auto
Reference the struct itself for the size as it is more robust,
even if it contains just a bool at the moment.

Signed-off-by: Nora Schiffer <nora.schiffer@ew.tq-group.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-06-05 12:56:32 -03:00
Marek Vasut
79b5f41d57 arm: imx9: Fix broken formatting
Fix ad-hoc tabs and spaces use, convert to tabs. Drop bogus duplicate
asterisk from non-kerneldoc code comments. No functional change.

Signed-off-by: Marek Vasut <marex@nabladev.com>
2026-06-05 12:55:56 -03:00
Alexander Sverdlin
e80108c966 clk: imx: don't build i.MX/RTxxxx code for all users of CCF
When commit 1d7993d1d0
("clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: v5.1.12)")
introduced the parts of Linux Common Clock Framework, it was done for i.MX6
only and even had "depends on SPL_CLK_IMX6Q" conditions. Since commit
ccab06689a ("clk: imx: expose CCF entry for all") the framework can be
reused with SoCs of other vendors (say, TI), but NXP SoC-specific code is
still being build. It is especially problematic for size-constrained SPL
images on TI AM62x.

Make the build of the i.MX/RTxxxx code not only dependent on
CONFIG_$(PHASE_)CLK_CCF, but also on CONFIG_MACH_IMX options which shall
cover the i.MX platform users.

This saves 2264 bytes on 32-bit ARM platforms [using CCF].

Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
2026-06-05 12:55:39 -03:00
Frieder Schrempf
0757f40c89 imx: kontron-sl-mx6ul: Enable I2C support
Enable the driver to support using I2C interfaces.

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2026-06-05 12:55:12 -03:00
Francois Berder
4feabb2b8a arch: imx9: Fix blk_dwrite/blk_derase error checking
blk_dwrite/blk_derase returns the number of blocks
written/erased. The existing check allowed partial
writes or partial erase to be considered successful.
Fix error handling of blk_dwrite/blk_derase by checking
that return value corresponds to the number of blocks
written/erased.

Signed-off-by: Francois Berder <fberder@outlook.fr>
2026-06-05 12:54:55 -03:00
Ye Li
dfd83eab76 arm: imx8mp: Add new variant parts support
iMX8MP added 4 new variant parts for low cost industrial and HMI.
The parts disabled HIFI DSP and ISP while other functions are enabled.

Part number:
  - MIMX8ML2DVNLZAB and MIMX8ML2CVNKZAB (2-core)
  - MIMX8ML5DVNLZAB and MIMX8ML5CVNKZAB (4-core)

Signed-off-by: Ye Li <ye.li@nxp.com>
2026-06-05 09:00:00 -03:00
Alexander Feilke
76b12586eb board: tqma7: update fastboot env
Replace magic value with documented variable.
While at it, restrict fastboot env guard to USB
as its the only supported fastboot method.

Fixes d000ce5efe ("board: tqma7: add code for u-boot with spl")

Signed-off-by: Alexander Feilke <alexander.feilke@ew.tq-group.com>
2026-06-05 08:59:25 -03:00
Lyrix liu
2d47fbc31d arm: gic-v3-its: Fix LPI pending table size calculation
The variable `pend_tab_total_sz` is calculated using the macro
`LPI_PENDBASE_SZ`, which depends on the global variable `lpi_id_bits`.

However, `lpi_id_bits` is initialized later in the function based on
the GICD_TYPER register. This results in `pend_tab_total_sz` being
calculated with an uninitialized `lpi_id_bits` value (0), This leads
to the LPI pending tables being mapped with an incorrect size.

Fixes: 60b9b47d29 ("Revert "arch: arm: use dt and UCLASS_SYSCON to get gic lpi details"")
Signed-off-by: Lyrix liu <lyrix.liu@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
2026-06-05 08:59:01 -03:00
Max Merchel
35c47a1eab configs: add defconfigs for TQMa6UL[L]x[L] SOM on MBa6ULx baseboard
work around ERR11115:
The lower part of the OCRAM is unusable on i.MX6UL mask revision 2N52P
with date code before 9/22/2017. Adjust CONFIG_SPL_TEXT_BASE and
CONFIG_SPL_MAX_SIZE accordingly to fix boot on these SoCs.

Signed-off-by: Max Merchel <Max.Merchel@ew.tq-group.com>
2026-06-05 08:58:43 -03:00