Commit Graph

102729 Commits

Author SHA1 Message Date
Jonas Karlman
5587232db2 board: rockchip: Add Radxa ROCK 4D
The Radxa ROCK 4D is a compact single-board computer (SBC) featuring
numerous top-tier functions, features, and expansion options.

Equipped with the Rockchip RK3576 or RK3576J SoC, the ROCK 4D boasts an
octa-core CPU (4x Cortex-A72 + 4x Cortex-A53), Mali-G52 GPU, and a
powerful 6 TOPS NPU, making it ideal for AI and multimedia tasks.

Features tested on a Radxa ROCK 4D v1.112:
- SPI Flash boot
- Ethernet
- PCIe/NVMe
- USB host

ROCK 4D boards with SPI Flash is configured to boot from FSPI0->UFS->USB,
or directly from USB when the MASKROM button is pressed, booting
directly from SD-card is not possible on these boards.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-02 12:14:09 -06:00
Jonas Karlman
7f4192d990 rockchip: rk3576: Add SPI Flash boot support
The bootsource ids reported by BootROM of RK3576 for SPI NOR and USB
differs slightly compared to prior SoCs:

- Booting from sfc0 (ROCK 4D) report the normal bootsource id 0x3.
- Booting from sfc1 M1 (NanoPi M5) report a new bootsource id 0x23.
- Booting from sfc1 M0 has not been tested (no board using this config).
- Booting from USB report a new bootsource id 0x81.

Add a RK3576 specific read_brom_bootsource_id() function to help decode
the new bootsource id values and the required boot_devices mapping of
sfc0 and sfc1 to help support booting from SPI flash on RK3576.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-02 12:14:09 -06:00
Jonas Karlman
dfe242921e rockchip: rk3528: Implement read_brom_bootsource_id()
The bootsource ids reported by BootROM of RK3528 for e.g. USB differs
compared to prior SoCs:

- Booting from USB report a new bootsource id 0x81.

Add a RK3528 specific read_brom_bootsource_id() function to help decode
this new bootsource id value to help support booting from USB on RK3528.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-02 12:14:09 -06:00
Jonas Karlman
99a9b6ba6c rockchip: spl: Add a read_brom_bootsource_id() helper
The bootsource ids reported by BootROM of RK3528 and RK3576 for e.g.
SPI NOR and USB differs slightly compared to prior SoCs:

- Booting from sfc0 (ROCK 4D) report the normal bootsource id 0x3.
- Booting from sfc1 M1 (NanoPi M5) report a new bootsource id 0x23.
- Booting from sfc1 M0 has not been tested (no board using this config).
- Booting from USB report a new bootsource id 0x81 on RK3528 and RK3576.

Add a helper function to read the bootsource id. This helper function
will be used to translate the new values to the common BROM_BOOTSOURCE
enum values on RK3528 and RK3576.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-02 12:14:09 -06:00
Jon Lin
c769855be2 spi: rockchip_sfc: Support sclk_x2 version
SFC after version 8 supports dtr mode, so the IO is the binary output of
the controller clock.

Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-02 12:14:09 -06:00
Jonas Karlman
a1c24ef06a rockchip: rk3528-radxa-e20c: Drop eMMC HS200 prop from board u-boot.dtsi
The commit f8cb3fde93 ("arm: dts: rockchip: Fix eMMC write on RK3528")
added a missing mmc-hs200-1_8v prop to boart u-boot.dtsi.

Remove this boart u-boot.dtsi mmc-hs200-1_8v prop now that the board dt
from dts/upstream after the v6.17-dts sync includes this prop.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-02 12:14:09 -06:00
Jonas Karlman
a187a9aab6 arm: dts: rockchip: Include OTP in U-Boot pre-reloc phase for RK3326
Update rk3326-u-boot.dtsi to include OTP in U-Boot pre-reloc phase for
checkboard() to be able to read information about the running SoC model
and variant from OTP and print it during boot:

  U-Boot 2025.07 (Jul 13 2025 - 10:07:16 +0000)

  Model: ODROID-GO Super
  SoC:   RK3326
  DRAM:  1 GiB (total 1022 MiB)

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-02 12:14:09 -06:00
Jonas Karlman
3df0f44b11 rockchip: odroid-go2: Add myself as a reviewer
I have the ORDOID-GO Super variant of this board. Add myself as a
reviewer to help review future patches targeting this device.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-02 12:14:09 -06:00
Jonas Karlman
964ab000c7 rockchip: odroid-go2: Enable more commands
Enable the default commands and some more useful commands that can be
useful to determin the state of the board from U-Boot CLI.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-02 12:14:09 -06:00
Jonas Karlman
6ad770ba88 rockchip: odroid-go2: Turn on the blue LED at boot
Use default-state prop to ensure that the blue heartbeat LED turns on
at boot to inticate that U-Boot proper has been reached.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-02 12:14:09 -06:00
Jonas Karlman
8aae95153a rockchip: odroid-go2: Enable RockUSB, button, LED and RNG support
Enable Kconfig options to support RockUSB, buttons, LEDs and RNG
featured on the board or SoC.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-02 12:14:09 -06:00
Jonas Karlman
b032ac74ac rockchip: odroid-go2: Use env from same storage FIT was loaded from
Change to dynamically select what storage media to use for the U-Boot
environment depending on from what storage media the FIT images was
loaded from, fall back to use env from nowhere.

  U-Boot SPL 2025.07 (Jul 13 2025 - 10:07:16 +0000)
  Trying to boot from MMC1
  ...
  Loading Environment from MMC... Reading from MMC(0)...

or

  U-Boot SPL 2025.07 (Jul 13 2025 - 10:07:16 +0000)
  Trying to boot from SPI
  ...
  Loading Environment from SPIFlash...

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-02 12:14:09 -06:00
Jonas Karlman
b3438ed24f rockchip: odroid-go2: Select board FDT from FIT in SPL
Include FDTs for all three board variants in the FIT image and adjust
the board selection code to use correct FDT in U-Boot proper.

E.g. use the odroid-go3 DT for a ODROID-GO Super device:

  U-Boot 2025.07 (Jul 13 2025 - 10:07:16 +0000)

  Model: ODROID-GO Super
  DRAM:  1 GiB (total 1022 MiB)
  PMIC:  RK817 (on=0x80, off=0x08)

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-02 12:14:03 -06:00
Jonas Karlman
1a267cbc0d rockchip: odroid-go2: Add support for SPI flash boot
The ODROID GO2 devices come with onboard SPI flash, add support for
using the SPI flash.

The BootROM seem to expect the IDBlock at 64 KiB offset compared to the
typical 32 KiB offset from start of SPI flash used by other SoCs.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-01 21:17:43 +08:00
Jonas Karlman
3a253b259b rockchip: odroid-go2: Use power off at power plug-in event
Include the RK817 PMIC in SPL and enable Kconfig options to power off
the handheld gaming device when it was powered on due to a power cable
plug-in event:

  DDR3, 333MHz
  BW=32 Col=10 Bk=8 CS0 Row=15 CS=1 Die BW=16 Size=1024MB
  out
  Power Off due to plug-in event

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-01 21:17:43 +08:00
Jonas Karlman
dedc70f58c rockchip: odroid-go2: Include pinctrl for sdmmc, sfc and uart in SPL
Include pinctrl nodes and props for sdmmc, sfc and uart in SPL to ensure
pins are configured according to the device tree.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-01 21:17:43 +08:00
Jonas Karlman
28fa983c58 rockchip: odroid-go2: Update Kconfig options for SPL
Drop SPL_DRIVERS_MISC, it is not needed/used on these devices.

Enable SPL_FIT_SIGNATURE to ensure the integrity of the FIT images
that are loaded into memory.

Change SPL_MAX_SIZE to 256 KiB, similar to other SoCs where TF-A is
loaded at 0x40000 offset from start of DRAM.

Enable SPL_DM_SEQ_ALIAS to ensure device aliases are applied in SPL.

Drop use of SPL_TINY_MEMSET, there is plenty room for the normal memset.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-01 21:17:43 +08:00
Jonas Karlman
45e9b5de86 rockchip: odroid-go2: Remove unsupported Kconfig options
The handheld gaming devices that this defconfig tagets does not contain
an Ethernet port, remove Ethernet related Kconfig options.

They also do not contain any pwm-regulator in their DTs, remove the
PWM regulator related Kconfig option.

Display/video is not supported in U-Boot, remove all display/video
related Kconfig options.

There is no real functional change expected with these options removed.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-01 21:17:43 +08:00
Jonas Karlman
bf6c7cce09 rockchip: odroid-go2: Move SoC common overrides into a SoC u-boot.dtsi
Add a new common rk3326-u-boot.dtsi and move the SoC common overrides
into it.

This should not contain any changes other than a possible reorder of
nodes and props.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-01 21:17:43 +08:00
Jonas Karlman
e338dc015b rockchip: odroid-go2: Use appropriate bootph props
GPIO devices are needed in U-Boot proper phase, sdmmc and sfc devices
are needed in SPL and pre-reloc phase.

Update bootph- props to match what boot phase devices are needed at.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-01 21:17:43 +08:00
Jonas Karlman
17c86993df rockchip: odroid-go2: Remove u-boot.dtsi props already defined
DTs from dts/upstream already contain aliases for i2c, mmc and serial.

Remove the aliases and status=okay that are already defined in upstream
board or SoC DT.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-01 21:17:43 +08:00
Jonas Karlman
cffc0de78e rockchip: odroid-go2: Remove incorrect re-defined spi0 alias
The alias spi0 is incorrectly being re-defined in board u-boot.dtsi to
the SPI flash controller instead of the actual spi0 controller.

SPI flash support is currently not working on odroid-go2 due to missing
Kconfig options and other required device tree changes.

Remove the re-defined alias for spi0 to allow use of the real spi0,
proper SPI flash support is introduced in a later patch.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-01 21:17:43 +08:00
Jonas Karlman
786a85e81d rockchip: odroid-go2: Remove cru assigned-clocks override
Remove the cru assigned-clocks override now that SCLK_GPU is supported
by the clock driver.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-01 21:17:43 +08:00
Jonas Karlman
70a2168569 clk: px30: Allow use of GPU and WIFI_PMU in assigned-clocks
Add dummy implementation of set_rate for SCLK_GPU and SCLK_WIFI_PMU to
allow use of dts/upstream assigned-clocks in cru and pmucru nodes.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-11-01 21:17:42 +08:00
Tom Rini
62b45e82bd Merge tag 'u-boot-imx-master-20251030' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/28092

- Fix a i.MX6ULL regression related to the REFTOP_VBGADJ setting.
- Shrink SPL size for the Liebherr BTT board.
- Add suppot for Toradex SMARC iMX95.
- Fix Aquila imx95 0098 Product ID.
2025-10-31 07:53:16 -06:00
Yegor Yefremov
2ab70b3b48 bus: ti-sysc: select CLK driver
ti-sysc.c includes clk.h and requires its functionality to
manage clocks.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2025-10-30 12:32:12 -06:00
Tom Rini
08bf42e1fa Merge tag 'qcom-for-2026.01-rc2' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
A variety of Qualcomm features/fixes for this cycle, notably with a few
new platforms gaining support:

* Initial support for SDM670 (similar to SDM845), SM6350, and SM7150
  platforms is added
* USB and UART issues on MSM8916 are addressed (improving stability/
  reliability)
* Firmware loading is implemented for the GENI serial engine, this is
  used on some platforms to load firmware for i2c/spi/uart to work

Some additional patches like binman support for building MBN files still
need some additional work.

CI: 8ef6ac07b3/pipelines
2025-10-30 11:06:44 -06:00
George Chan
934647d49c usb: gadget: Introduce usb gadget vendor/product default id for ARCH_QCOM
Currently vendor/product id are both 0, and that might not as we want.
Set to some arbitrary known value that we can make it work more smoothly.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Acked-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: George Chan <gchan9527@gmail.com>
Link: https://patch.msgid.link/20251021-sc7180-minor-v1-2-9fe33c73365e@gmail.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-10-30 11:06:29 -06:00
George Chan
5d6042ce3f iommu: qcom-smmu: Introduce sc7180 compatible string
Add basic compatible string for sc7180 family soc.

Signed-off-by: Vitalii Skorkin <nikroks@mainlining.org>
Co-developed-by: George Chan <gchan9527@gmail.com>
Signed-off-by: George Chan <gchan9527@gmail.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20251021-sc7180-minor-v1-1-9fe33c73365e@gmail.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-10-30 11:04:51 -06:00
Stephan Gerhold
ed733d40ec usb: host: ehci-msm: Register ULPI PHY through NOP wrapper
The UCLASS_USB device is removed and rebound each time you run "usb stop"
followed by "usb start", or when you switch between USB device and USB host
mode. Unfortunately, this causes issues with the current ehci-msm driver:

In ehci_usb_remove() we call generic_shutdown_phy(), but at that point the
ULPI PHY we registered in ehci_usb_of_bind() was already removed again by
the DM core.

Fix this by adding a UCLASS_NOP driver that keeps the PHY driver bound
permanently, and then just re-probe the actual USB part.

Reported-by: Jianfeng Zhu <JianfengA.Zhu@sony.com>
Closes: https://lore.kernel.org/u-boot/OSQPR04MB774067EBEEADD714EFE18C2A90882@OSQPR04MB7740.apcprd04.prod.outlook.com/
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Tested-by: Sam Day <me@samcday.com>
Link: https://patch.msgid.link/20250407-ehci-msm-fixes-v1-6-f8b30eb05d07@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-10-30 11:04:51 -06:00
Stephan Gerhold
f5ff016b44 usb: host: ehci-msm: Drop redundant EHCI register writes
ehci_unregister() already clears the CMD_RUN bit with more careful checks.
It also ensures that we only do this in case we were actually in USB host
(rather than USB device) mode. It's not clear what the extra register
writes in the Qualcomm-specific ehci-msm driver are supposed to do, so just
drop them.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Tested-by: Sam Day <me@samcday.com>
Link: https://patch.msgid.link/20250407-ehci-msm-fixes-v1-5-f8b30eb05d07@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-10-30 11:04:51 -06:00
Stephan Gerhold
c45a043d8a usb: host: ehci-msm: Use clk bulk helpers
The enable order for the clocks does not matter much, we just need to
enable all the USB clocks. Use the clk bulk helpers to simplify the code.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Tested-by: Sam Day <me@samcday.com>
Link: https://patch.msgid.link/20250407-ehci-msm-fixes-v1-4-f8b30eb05d07@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-10-30 11:04:51 -06:00
Stephan Gerhold
2faabff358 usb: host: ehci-msm: Disable clocks after all register accesses
We need the USB clocks to do accesses like
  wait_for_bit_le32(&ehci->usbcmd, CMD_RESET, ...)
so we should disable them only after all of them are done.

At the moment this works only because the clock driver doesn't actually
disabling these clocks in U-Boot.

Fixes: 9b3a9f896e ("ehci: msm: bring up iface + core clocks")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Tested-by: Sam Day <me@samcday.com>
Link: https://patch.msgid.link/20250407-ehci-msm-fixes-v1-3-f8b30eb05d07@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-10-30 11:04:51 -06:00
Stephan Gerhold
e4e47da7e8 usb: host: echi-msm: Drop ulpi definitions
These are unused.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Tested-by: Sam Day <me@samcday.com>
Link: https://patch.msgid.link/20250407-ehci-msm-fixes-v1-2-f8b30eb05d07@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-10-30 11:04:51 -06:00
Stephan Gerhold
fef8c84b57 usb: host: ehci-msm: Fix pointer check
dev_read_addr_ptr() returns a null pointer on error, not FDT_ADDR_T_NONE.

Fixes: 2be1130a93 ("usb: ehci-msm: Use dev interface to get device address")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Tested-by: Sam Day <me@samcday.com>
Link: https://patch.msgid.link/20250407-ehci-msm-fixes-v1-1-f8b30eb05d07@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-10-30 11:04:51 -06:00
Casey Connolly
cd44b44e59 configs: qcom_*: enable QCOM_GENI where needed
Enable the GENI MISC driver which is required for many Qualcomm
platforms.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20250714-geni-load-fw-v5-8-5abbc0d29838@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-30 11:04:51 -06:00
Casey Connolly
3a65430b54 serial: msm-geni: implement firmware loading
Teach the GENI UART driver to load firmware, similar to i2c.

This is primarily intended for non-debug UARTs, but since we don't
support using these as the console we abort probe for now.

Remove duplicated register macros that are in the common geni-se header.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20250714-geni-load-fw-v5-7-5abbc0d29838@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-30 11:04:51 -06:00
Stephen Boyd
c57419811a serial: msm-geni: Enable SE clk in probe
Enable the serial engine clk in probe so that this driver can work on
platforms that don't already initialize the clk for this device before
this driver runs. This fixes a problem I see on Coreboot platforms like
Trogdor where the UART hardware isn't enabled by coreboot unless the
serial console build is used.

Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Link: https://patch.msgid.link/20250714-geni-load-fw-v5-6-5abbc0d29838@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-30 11:04:51 -06:00
Casey Connolly
9887944c4f clk/qcom: sc7280: add uart5 and uart7 clocks
Allow us to power up UART7 so we can load the QUP firmware, this is used
for bluetooth on RB3 Gen 2 and possibly other boards.

Additionally add the UART5 clocks so we can adjust baud rate for UART

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20250714-geni-load-fw-v5-5-5abbc0d29838@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-30 11:04:51 -06:00
Casey Connolly
10f28bc7ae i2c: geni: load firmware if required
Load firmware for the peripheral if necessary.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20250714-geni-load-fw-v5-4-5abbc0d29838@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-30 11:04:51 -06:00
Casey Connolly
b95df6ed8c misc: introduce Qcom GENI wrapper
Qualcomm peripherals like UART, SPI, I2C, etc are all exposed under a
common GENI Serial Engine wrapper device. Replace the stub driver we use
for this currently with a full-on misc device and implement support for
loading peripheral firmware.

Each of the peripherals has it's own protocol-specific firmware, this is
stored on the internal storage of the device with a well-known partition
type GUID.

To support this, GENI will bind peripherals in two stages. First the
ones that already have firmware loaded (such as the serial port) are
bound in the typical way. But devices that require firmware loading are
deferred until EVT_LAST_STAGE_INIT. At this point we can be sure that
the storage device is available, so we load the firmware and then bind
and probe the remaining children.

Child devices are expected to determine if firmware loading is necessary
and call qcom_geni_load_firmware().

Since Linux currently doesn't support loading firmware (and firmware may
not be available), we probe all GENI peripherals to ensure that they
always load firmware if necessary.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20250714-geni-load-fw-v5-3-5abbc0d29838@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-30 11:04:51 -06:00
Casey Connolly
f3e73dc94b i2c: geni: fix error message wording in clk_disable
Correct the error messages so they accurately describe that we failed to
disable the clocks, not to enable them.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20250714-geni-load-fw-v5-2-5abbc0d29838@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-30 11:04:51 -06:00
Casey Connolly
ada314a7ca configs: qualcomm: use fragments for debug UART
The QCM6490 and QCS9100 targets always enable debug UART, but this is
not really optimal for typical users.

Move these debug UART options to config fragments so that they aren't
enabled by default.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://patch.msgid.link/20250722-b4-qcom-tooling-improvements-v5-6-df143f1247fc@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-30 11:04:51 -06:00
Jens Reidel
077ae372da clk/stub: add sc7180-rpmh clock
Stub the RPMh clock controller on SC7180.

Signed-off-by: Jens Reidel <adrian@mainlining.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250826231752.60633-1-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-30 11:04:51 -06:00
Danila Tikhonov
30eb854a56 configs: qcom_defconfig: Enable SM7150 GCC and Pinctrl
Enable the necessary drivers so that SM7150 devices can boot with
qcom_defconfig.

Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Signed-off-by: Jens Reidel <adrian@mainlining.org>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250831004602.699953-5-adrian@mainlining.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-30 11:04:27 -06:00
Fabio Estevam
087277fc76 imx8mp_evk: Fix typo on maintainer's name
My last name was misspelled. Fix it.

Fixes: ae09edaeec ("imx8mp_evk: Add myself to MAINTAINERS")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
2025-10-30 12:40:47 -03:00
Ye Li
f7a0afb544 imx: Revert "imx: mx6ull: fix REFTOP_VBGADJ setting" and fix comments
The change in commit c1af358cf5 ("imx: mx6ull: fix REFTOP_VBGADJ
setting") is not correct. According to latest i.MX6ULL fuse table,
the REFTOP_TRIM[2:0] fuse is defined as below. So the previous codes
are correct, only need to fix the comments.

Set the REFTOP_VBGADJ field in PMU_MISC0 register based on the
REFTOP_TRIM fuse:
'000" - set REFTOP_VBGADJ[2:0] to 3'b000
'001" - set REFTOP_VBGADJ[2:0] to 3'b001
'010" - set REFTOP_VBGADJ[2:0] to 3'b010
'011" - set REFTOP_VBGADJ[2:0] to 3'b011
'100" - set REFTOP_VBGADJ[2:0] to 3'b100
'101" - set REFTOP_VBGADJ[2:0] to 3'b101
'110" - set REFTOP_VBGADJ[2:0] to 3'b110
'111" - set REFTOP_VBGADJ[2:0] to 3'b111

Sven Schwermer reported:

"These are the symptoms: Very few of the thousands of devices that we
manufacture (< 1%) fail to decompress a large XZ archive once in Linux
userspace. We have not found any form of memory testing or other load
that reproduces this issue. Reverting the offending patch fixes this
behavior on the affected devices."

Revert the offending commit to fix the regression.

Reported-by: Sven Schwermer <u-boot@schwermer.no>
Signed-off-by: Ye Li <ye.li@nxp.com>
[fabio: Fixed checkpatch warning and added Sven's report]
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-10-30 12:40:15 -03:00
João Paulo Gonçalves
ff0540fcfe board: toradex: add Toradex SMARC iMX95
Add support for the Toradex SMARC iMX95.

Link: https://www.toradex.com/computer-on-modules/smarc-arm-family/nxp-imx95
Link: https://www.toradex.com/products/carrier-board/smarc-development-board-kit
Signed-off-by: João Paulo Gonçalves <joao.goncalves@toradex.com>
Co-developed-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Co-developed-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Co-developed-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
2025-10-30 12:39:57 -03:00
Emanuele Ghidoli
f6f319f035 arm: imx8: select ARCH_MISC_INIT if FSL_CAAM is enabled
Commit 2a7acc865b ("configs: colibri-imx8x: enable RNG support for KASLR")
enables FSL_CAAM which requires initialization in arch_misc_init().
The ARCH_MISC_INIT configuration was added to the relevant defconfig.

Commit d0ed963690 ("global: Make ARCH_MISC_INIT a selected symbol")
changed ARCH_MISC_INIT to require explicit selection by the developer.
With this change the colibri-imx8x defconfig is no longer sufficient to
enable ARCH_MISC_INIT when FSL_CAAM is selected.

Add the necessary selection to automatically enable ARCH_MISC_INIT when
FSL_CAAM is enabled on i.MX8 platforms.

Fixes: d0ed963690 ("global: Make ARCH_MISC_INIT a selected symbol")
Signed-off-by: Emanuele Ghidoli <emanuele.ghidoli@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-10-30 12:39:28 -03:00
Rasmus Villemoes
4772cf97f0 liebherr: btt: shrink spl_board_init
This board is very tight on space in SPL; in fact with my compiler it
ends up just exactly on the wrong side:

spl/u-boot-spl.bin exceeds file size limit:
  limit:  0xa000 bytes
  actual: 0xa014 bytes
  excess: 0x14 bytes

The repeated "lookup and request" pattern in spl_board_init() suggests
a low-hanging fruit for reducing the code size. This reduces the
object size of spl/board/liebherr/btt/btt.o by 300 bytes.

I've left the lack of error handling as-is; there isn't really
anything to do if it fails, so I suppose the printfs are the best that
can be done.

Signed-off-by: Rasmus Villemoes <ravi@prevas.dk>
2025-10-30 12:39:12 -03:00