Linux kernel Documentation/devicetree/bindings/gpio/gpio.txt define the
format of the gpio-ranges prop as:
The format is: <[pin controller phandle], [GPIO controller offset],
[pin controller offset], [number of pins]>;
Example:
gpio-ranges = <&foo 0 20 10>, <&bar 10 50 20>;
This means:
- pins 20..29 on pin controller "foo" is mapped to GPIO line 0..9 and
- pins 50..69 on pin controller "bar" is mapped to GPIO line 10..29
For this example, a call to pinctrl_gpio_get_pinctrl_and_offset() using
offset 10 incorrectly return pin controller "foo" instead of "bar".
Fix this by using an exclusive range check.
Fixes: d0bb00adcc ("pinctrl: fix pinctrl_gpio_get_pinctrl_and_offset for gpio-ranges array")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quanyang Wang <quanyang.wang@windriver.com>
Add defconfig for AM68 SK R5 and A72 configuration.
This includes and modifies the AM68 EVM defconfigs:
j721s2_evm_r5_defconfig -> am68_sk_r5_defconfig
j721s2_evm_a72_defconfig -> am68_sk_a72_defconfig
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Create an SoC R5 dtsi file that could be used at board level R5 files. This
would help in keeping the SoC level changes in sync across board files.
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Currently AM68 SK boots with J721s2 R5 DTS and then later changes to
AM68 SK DT during runtime.
To split the support of J721s2 and AM68, sync AM68 R5 DT with J721s2 R5
DT as that contains some essential node changes for booting up AM68
using AM68 R5 DT.
secure_proxy_sa3 and secure_proxy_mcu node changes are required for
establishing contact with ROM and TIFS running on SMS M4 core,
respectively, and the addition of new power domain helps in holding A72
cluster in reset for configuration of firewalls.
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Switch to using bootstd. Note that with this change, we will stop using
distro_bootcmd and instead depend entirely on bootflow method of
starting the system up.
Also config_distro_bootcmd.h header file that is no longer needed in
j721s2_evm.h.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Add explicit boot_targets to indicate the specific boot sequence to
follow.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Signed-off-by: Manorit Chawdhry <m-chawdhry@ti.com>
Buffers must not have an unclean cache before being used for DMA - a
pending write-back may corrupt the next dev-to-mem transfer otherwise.
This was consistently noticeable during long TFTP transfers, when an ARP
request is answered by U-Boot in the middle of the transfer:
As U-Boot's arp_receive() reuses the receive buffer to prepare its
reply packet, the beginning of one of the next incoming TFTP packets
is overwritten by the ARP reply. The corrupted packet is ignored, but
the TFTP transfer stalls for a few seconds until a timeout is detected
and a retransmit is triggered.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Tested-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
net.h is needed for PKTBUFSRX. Without this definition, the driver will
always use 4 RX buffers, causing am65-cpsw-nuss initialization to fail
when a higher number of buffers is requested.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
The eth-uclass state machine doesn't prevent imbalanced start()/stop()
calls - to the contrary, it even provides eth_init_state_only() and
eth_halt_state_only() functions that change the state without any calls
into the driver. This means that the driver must be robust against
duplicate start() and stop() calls as well as send/recv calls while the
interface is down.
We decide not to print error messages but just to return an error in the
latter case, as trying to send packets on a disabled interface commonly
happens when the netconsole is still active after the Ethernet has been
halted during bootm.
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Add AM62a remote proc firmware names to environment variables for
loading of C7x DSP and R5F processors.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
AM62A has a R5F core in MCU voltage domain.
Extend support for R5F remote proc driver on AM62A with compatible
strings.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
AM62A SoC has a single C71x DSP subsystem with analytics engine in
main voltage domain. Extend support to AM62A with compatible strings.
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Martyn Welch <martyn.welch@collabora.com> says:
This series adds DFU support for TI AM62 SK and beagleplay boards.
I have picked this series up from Sjoerd due to time constraints.
Since the last revision:
* Removed dwc3 mode setting in favour of reinstating forced peripheral
mode for usb0
* Use of config fragments for both r5 and a53 DFU configuration to
reduce duplication
* Typographical improvements to documentation
We plan to also submit the dts changes to linux so that those can be
dropped again in the near future (hopefully)
DFU mode on a beagleplay can be used via the Type-C connector by holding
the USR switch while powering on.
Configuration is already provided as fragments for both the A53 and R5
u-boot parts. Include the am62x_a53_usbdfu.config config. The
am62x_r5_usbdfu.config fragment needs to be added should DFU boot be
required as this will disable booting from persistent storage due to
binary size constraints.
Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Provide config fragments to enable USB host as well as USB gadget and DFU
support for a53 and r5. This relevant fragment is included into the
am62x EVM a53 defconfig. For the r5, due to the smaller available size,
the config fragment also disables support for persistent storage to free
up space for USB support. This fragment needs to be included is DFU
booting is desired.
The CONFIG_DFU_SF option is placed in the defconfig rather than the
fragment as this is known not to be supported on all boards that can
support DFU.
Signed-off-by: Sjoerd Simons <sjoerd@collabora.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
- A few zfs fixes, ARMv8 timer cleanups, support more algorithms with
the nuvoton crypto driver, virtio + env in filesystem fix, K3 code
cleanup and warning fix in gen_compile_commands.
Since Python 3.12 unrecognised escape sequences trigger a SyntaxWarning.
Convert the '\#' string to a raw string so the backslash is correctly
used as a literal.
Ported from Linux commit dae4a0171e25 ("gen_compile_commands: fix invalid
escape sequence warning").
This updates the script to be in-line with Linux 6.9-rc6.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: João Marcos Costa <jmcosta944@gmail.com>
Specifying a file in an EXT4 or FAT partition on a virtio device as
environment location failed because virtio hadn't been initialized by
the time the environment was loaded. This patch mirrors commit
54ee5ae841 ("Add SCSI scan for ENV in EXT4 or FAT") in issue and
fix, just for a different kind of block device.
The additional include in include/virtio.h is needed so all functions
called there are defined, the alternative would have been to include
dm/device.h separately in the env/ sources.
Checkpatch suggests using "if (IS_ENABLED(CONFIG...))" instead of
"#if defined(CONFIG_...)", I'm sticking to the style of the existing
code here.
Signed-off-by: Fiona Klute <fiona.klute@gmx.de>
CC: Joe Hershberger <joe.hershberger@ni.com>
CC: Bin Meng <bmeng.cn@gmail.com>
CC: Rogier Stam <rogier@unrailed.org>
Polling cntpct_el0 in a tight loop for delays is inefficient.
This is particularly apparent on Arm FVPs, which do not simulate
real time, meaning that a 1s sleep can take a couple of orders
of magnitude longer to execute in wall time.
If running at EL2 or above (where CNTHCTL_EL2 is available), enable
the cntpct_el0 event stream temporarily and use wfe to implement
the delay more efficiently. The event period is chosen as a
trade-off between efficiency and the fact that Arm FVPs do not
typically simulate real time.
This is only implemented for Armv8 boards, where an architectural
timer exists, and only enabled by default for the ARCH_VEXPRESS64
board family.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
The sev() and wfe() asm macros are currently defined only for
mach-exynos. As these are common Arm instructions, move them to the
common asm/system.h header file, for both Armv7 and Armv8, so they
can be used by other machines.
wfe may theoretically trigger a context switch if an interrupt occurs
so add a memory barrier to this call.
Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com>
Reviewed-by: Andre Przywara<andre.przywara@arm.com>
The 2 bytes 0xffff is too short for being a PowerPC instruction, resulting
in an error similar to:
/tmp/ccW8yjie.s: Assembler messages:
/tmp/ccW8yjie.s: Error: unaligned opcodes detected in executable segment
/tmp/ccW8yjie.s:223: Error: instruction address is not a multiple of 4
make[2]: *** [/tmp/ccyF4HIC.mk:17: /tmp/ccCKUFuF.ltrans5.ltrans.o] Error 1
Signed-off-by: WHR <msl0000023508@gmail.com>
In order to prevent crashing due to infinite recursion and actually
decompress the requested data, call the zlib function 'uncompress'
instead.
Signed-off-by: WHR <msl0000023508@gmail.com>
Currently no features are implemented, only the zpool version 5000 that
indicating the features support, is recognized. Since it is possible for
OpenZFS to create a pool with features support enabled, but without
enabling any actual feature, this change enables U-Boot to read such
pools.
Signed-off-by: WHR <msl0000023508@gmail.com>
MD Danish Anwar <danishanwar@ti.com> says:
This series adds AM64x related compatibles to PRUSS and PRU_RPROC drivers.
This series is a prerequisite for ICSSG Ethernet driver.
Once Support for AM64x is added to PRUSS and PRU_RPROC driver, I'll send
another series to enable ICSSG Ethernet driver for AM64x as well.
Let's provide get_boot_device() for AM64, similar to what we did
in commit 2f9095e2bf ("arm: mach-k3: am625: Provide a way to obtain boot
device for non SPLs") for AM62.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Add support for AM64x by adding it's compatible in pruss driver.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Add support for AM64x PRU cores by adding compatibles for AM64x.
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
J7200 has SR1.0 and SR2.0 having three variants of each GP, HS-FS and
HS-SE. Current build does not generate HS-SE SR1.0 and HS-FS SR1.0 so
add support for them.
Reported-by: Suman Anna <s-anna@ti.com>
Reported-by: Aniket Limaye <a-limaye@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
J721E has SR1.1 and SR2.0 having three variants of each GP, HS-FS and
HS-SE. Current build does not generate HS-FS SR1.1 so add support for
them.
Reported-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Enable CONFIG_BOARD_LATE_INIT to use PHYTECs common board_late_init()
to set handy environment variables for u-boot.
Also, resync after savedefconfig.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Environment handling code can be reused across all our K3 based SoMs.
Instead of adding the same code for every new SoM, move it to a common
board.c file.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Currently we have the option to tell the console code that we should
ignore the SPL banner. We also have an option to say that we can see it
a second time, and ignore it. However, some platforms such as TI AM64x
will have us see the SPL banner three times. Rather than add an
"spl3_skipped" option, rework the code. By default we expect to see the
banner once, but boards can specify seeing it as many times as they
expect to.
Signed-off-by: Tom Rini <trini@konsulko.com>
This driver support the Synopsys Designware Ethernet 10G
IP block refer from the driver dwc_eth_qos.
The driver MAC register mapping is different between
Synopsys QoS IP and Synopsys 10G IP, and thus new file
is created meant for Sysnopsys 10G IP.
The dwc_eth_xgmac_socfpga.c is specific to a device family,
the driver support the specific configuration used in
Intel SoC FPGA Agilex5.
This driver is extensible for other device family to use.
Signed-off-by: Boon Khai Ng <boon.khai.ng@intel.com>
Greg Malysa <greg.malysa@timesys.com> says:
This series adds support for the ADI SC5xx machine type and includes two
core drivers that are required for being able to boot any board--a UART
driver, the gptimer driver which is used as a clock reference (CNTVCNT
is not supported on the armv7 sc5xx SoCs) and the clock tree driver. Our
corresponding Linux support relies on u-boot configuring the clocks
correctly before booting, so it is not possible to boot any board
without the CGU/CDU configuration happening here. There are also no
board files, device trees, or defconfigs included here, but some common
definitions that will be used to build board files currently are. The
sc5xx SoCs themselves include many armv7 families (sc57x, sc58x, and
sc594) all using an ARM Cortex-A5, and one armv8 family (sc598) indended
to be a drop-in replacement for the SC594 in terms of peripherals, with
a Cortex-A55 instead.
Some of the configuration code in dmcinit and clkinit is quite scary and
causes a lot of checkpatch violations. It is modified from code
initially provided by ADI, but it has not been fully rewritten. There's
a question of how important it is to clean up this code--it has some
quality violations, but it has been in use (including in production) for
over two years and is known to work for performing the low level SoC
initialization, while a rewrite might introduce timing or sequence bugs
that could take a significant amount of time to detect in the future.
