Commit Graph

403 Commits

Author SHA1 Message Date
Jonas Schwöbel
e69e2dc7f5 board: microsoft: add Microsoft Surface 2 support
Surface 2 is a Surface-series Windows RT hybrid tablet computer created by
Microsoft. Surface 2 uses a 1.7 GHz quad-core Nvidia Tegra 4 chipset with
2 GB of RAM, features 10.6 inch FullHD ClearType HD screen with 16:9 aspect
ratio and 32/64 GB of internal memory that can be supplemented with a
microSDXC card giving up to 64 GB of additional storage.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-08-20 16:22:49 +03:00
Ion Agorria
c55cbaf133 board: samsung: add Samsung Galaxy R (GT-I9103) and Captivate Glide (SGH-i927) support
The Galaxy R (GT-I9103) and Captivate Glide (SGH-i927) are both Tegra 2
based Samsung smartphones released in 2011. They both feature 1 GB of RAM
and 8 GB of expandable flash memory. The key difference is that the
Captivate Glide has an OLED panel (contrary to LCD in Galaxy R) and a
QWERTY keyboard in form factor of a slider.

Signed-off-by: Ion Agorria <ion@agorria.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-08-01 08:46:53 +03:00
Svyatoslav Ryhel
d564f395bc board: chagall: add Pegatron Chagall support
The Pegatron Chagall (originally built by Pegatron, but later rebranded by
other vendors under names Fujitsu Stylistic M532, Olivetti Olipad 3,
Siragon 4N, Realpad Bunaken, DNS AirTab P110w / P110g etc) is a mostly
business-oriented tablet sold in 2012 in different variants, mostly in
Europe, with slight differences in storage size (16GB/32GB) and presence
of built-in cellular modem.

Tested-by: Raffaele Tranquillini <raffaele.tranquillini@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-08-01 08:43:41 +03:00
Ion Agorria
0106f051d7 ARM: tegra: Use AES engine for crypto functions
Previously software based AES encryption was used with previously known
device specific keys (SBK), now that we have AES driver we can simply
delegate this to the engine without prior knowledge of the key (assuming
it is still loaded).

Signed-off-by: Ion Agorria <ion@agorria.com>
2025-08-01 08:43:41 +03:00
Ion Agorria
f230bc6cf7 ARM: tegra: Add LP0 support for ODM production
Now that we have working AES engine driver we can request the warmboot code
to be encrypted and signed  with SBK if the device requires so. This
unlocks LP0 support for most devices in the wild as they use ODM Production
Secure.

We are not aware of any "ODM Production Open" device nor have access to
thus this has not been tested on one, merely added for completeness.

Signed-off-by: Ion Agorria <ion@agorria.com>
2025-08-01 08:43:41 +03:00
Ion Agorria
aaf4c26187 ARM: tegra: Relocate fuse code from warmboot file
Move a set of helpers used in warmboot code to more appropriate AP and FUSE
locations.

Signed-off-by: Ion Agorria <ion@agorria.com>
2025-08-01 08:43:41 +03:00
Simon Glass
f73450918d spl: Rename jump_to_image_no_args()
This function is currently a misnomer at times as we have cases where it
passes arguments to the image. In preparation for making that be a more
common case rename this function to jump_to_image(...). In order to do
this, rename jump_to_image in board_init_r(...) to jumper so that we do
not have a conflict.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Reword the commit message, adding missing cases of
        jump_to_image_no_args()]
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-13 13:22:53 -06:00
Tom Rini
d786c6b69f Merge patch series "Audit include list for include/[a-m]*.h"
Tom Rini <trini@konsulko.com> says:

Hey all,

Related to my other series I've posted recently on cleaning up some
headers, this series here is the result of at least lightly auditing the
#includes used in include/[a-m]*.h. This ignores subdirectories, as at
least in part I think the top-level includes we've constructed are the
most likely places to have some extra transitive include paths. I'm sure
there's exceptions and I'll likely audit deeper once this first pass is
done. This only gets as far as "include/m*.h" because I didn't want this
to get too big. This also sets aside <miiphy.h> and <phy.h>. While
miiphy.h does not directly need <phy.h> there are *so* many users and I
think I had half of the tree just about not building when I first tried.
It might be worth further investigation, but it might just be OK as-is.

Link: https://lore.kernel.org/r/20250521230119.2084088-1-trini@konsulko.com
2025-06-02 17:43:56 -06:00
Tom Rini
824f8f52a1 global: Cleanup usage of "ETH_ALEN"
The value of "ETH_ALEN" is defined to 6 in <linux/if_ether.h>. This file
is included in <net.h>. In the places where we had ETH_ALEN but no
direct include of <net.h>, add <linux/if_ether.h>. In the places where
we had a custom name used, make use of ETH_ALEN instead.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:16 -06:00
Simon Glass
433e86abea tegra: Include env.h to permit reading the environment
This file reads from the environment but does not include the correct
header. Update it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-05-29 08:30:25 -06:00
Tom Rini
60e313d5c6 global: Add <linux/string.h> instead of long indirect include path
In a number of cases we have C files which rely on a chain of indirect
include paths to get <linux/string.h> to be included via <command.h>. To
facilitate cleaning up <command.h> make this code directly include
<linux/string.h>.

Signed-off-by: Tom Rini <trini@konsulko.com>
---
Cc: Andrew Davis <afd@ti.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Dai Okamura <okamura.dai@socionext.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Francesco Dolcini <francesco.dolcini@toradex.com>
Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Cc: Jens Wiklander <jens.wiklander@linaro.org>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Shengzhou Liu <Shengzhou.Liu@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Stefano Babic <sbabic@nabladev.com>
Cc: Svyatoslav Ryhel <clamor95@gmail.com>
Cc: Thierry Reding <treding@nvidia.com>
Cc: William Zhang <william.zhang@broadcom.com>
2025-05-14 12:15:31 -06:00
Svyatoslav Ryhel
d5b9b7aa03 ARM: tegra: drop CONFIG_DISABLE_SDMMC1_EARLY
This was a temporary workaround for the Tegra210 Jetson Nano board. It is
not used by any device anymore, so let's remove it.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:31:13 +03:00
Svyatoslav Ryhel
66c4ac31ca ARM: tegra: set default SYS_CONFIG_NAME from SoC Kconfig
Since most boards now use the same generic device config header, move its
setup to SoC Kconfig instead of setting SYS_CONFIG_NAME in each board's
Kconfig.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:31:13 +03:00
Svyatoslav Ryhel
94b395cc2d ARM: tegra: add PRAM Kconfig option
Wrap CFG_PRAM with Kconfig option.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:31:12 +03:00
Svyatoslav Ryhel
24e578cbac board: lg: star: add Optimus 2X P990 support
The LG Optimus 2X is a touchscreen-based, slate-sized smartphone designed
and manufactured by LG that runs the Android operating system. The
Optimus 2X features a 4" WVGA display, an Nvidia Tegra 2 dual-core chip,
512 MB of RAM and extendable 8 GB of internal storage. UART-B is default
debug port.

Tested-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-05-08 08:30:53 +03:00
Artur Kowalski
427dd4dd27 ARM: tegra20: add funcmux for exposing UART over uSD slot on Tegra 20
UART-A can be exposed through uSD, this was tested on Transformer T20
but should work on all Ventana-based boards.

TX is exported on SDD pingroup corresponding to uSD CLK pin
RX is exported on SDB which is CMD pin in uSD slot

Signed-off-by: Artur Kowalski <arturkow2000@gmail.com>
Reviewed-by: Svyatoslav Ryhel <clamor95@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12 11:12:06 +03:00
Svyatoslav Ryhel
b12931d7de board: nvidia: tegratab: add Nvidia Tegra Note 7 support
The Tegra Note 7 is a mini tablet computer and the second Tegra 4
based mobile device designed by Nvidia that runs the Android operating
system. The Tegra Note has a 7" IPS display with 1280 x 800 (217 ppi)
resolution. The 1 GB of RAM and 16 GB of internal memory can be
supplemented with a microSDXC card giving up to 64 GB of additional
storage.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12 11:12:06 +03:00
Svyatoslav Ryhel
00d4996a82 board: asus: transformer: add ASUS Transformer Pad TF701T support
The ASUS Transformer Pad TF701T is an Android tablet computer made by
ASUS, successor to the ASUS Transformer Pad Infinity. The tablet includes
a Tegra 4 T114 processor clocked at 1.9 GHz, and an upgraded 2560×1600
pixel resolution screen, increasing the pixel density to 300 PPI and
a mobile dock. Transformers (t114) board derives from Nvidia Macallan
development board.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12 11:12:06 +03:00
Svyatoslav Ryhel
69dffab941 ARM: tegra114: clock: avoid touching DISP clocks on init
The clock initialization routine sets the DISP* clock parent to PLLC,
resulting in DC failure in the case when PLLD was previously configured.
This issue disrupts chainloading and to prevent failures caused by DISP*
clock parent conflicts, clock initialization should not modify DISP*. The
DC driver handles DISP* configuration.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12 11:12:06 +03:00
Svyatoslav Ryhel
ee3462160c ARM: tegra: convert CFG_TEGRA_BOARD_STRING into Kconfig option
Convert CFG_TEGRA_BOARD_STRING into Kconfig option and move it into device
board Kconfig.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12 09:48:30 +03:00
Svyatoslav Ryhel
11bf63c230 ARM: tegra: board: set CFG_SYS_NS16550_COM1 according to TEGRA_ENABLE_UART
Link CFG_SYS_NS16550_COM1 value to chosen CONFIG_TEGRA_ENABLE_UART Tegra
wide. Remove all CFG_SYS_NS16550_COM1 from device headers.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12 09:48:30 +03:00
Svyatoslav Ryhel
645350ed4b board: motorola: add Atrix 4G MB860 and Droid X2 MB870 support
The Motorola Atrix 4G (MB860) and Droid X2 (MB870) both featured a
dual-core NVIDIA Tegra 2 AP20H processor clocked at 1GHz, coupled with 1GB
of DDR2 RAM. Storage consisted of 16GB of internal flash memory, expandable
via microSD. The display was a 4.0-inch TFT LCD with a resolution of
960x540 pixels (qHD). The devices originally ran on Android up to 2.3
(Gingerbread).

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12 09:46:53 +03:00
Svyatoslav Ryhel
212757af3a ARM: tegra: clock: fix PLLD2 info table entry on Tegra124 and Tegra210
Historically, PLLD2 mirrored PLLD's layout on Tegra30 and 114. However,
with the introduction of Tegra124, this changed. This layout alteration was
not considered, and it now requires a corrective action to prevent future
complications.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12 09:42:35 +03:00
Svyatoslav Ryhel
0edc47ba73 ARM: tegra: clock: take in account PLLD/D2 enable bit on clock_set_rate
PLLD and PLLD2 clocks possess a unique enable bit within their
miscellaneous register. Take this into account when using clock_set_rate
function.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-04-12 09:42:35 +03:00
Tom Rini
302b41d539 Kbuild: Always use $(PHASE_)
It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our
Makefiles as part of the macros to determine when to do something in our
Makefiles based on what phase of the build we are in. For consistency,
bring this down to a single macro and use "$(PHASE_)" only.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-04-11 12:16:44 -06:00
Svyatoslav Ryhel
03f61b1539 board: ouya: add Ouya Game Console support
The Ouya microconsole is build on Nvidia Tegra 3 (T33) SoC, featuring a
quad-core 1.7 GHz ARM Cortex-A9 CPU and a ULP GeForce GPU, paired with 1GB
of DDR3 RAM and 8GB of internal flash storage. Running a modified Android
4.1 (Jelly Bean) OS with a custom launcher, it aimed for open-source gaming
via a digital storefront.

This implementation is mostly based on upstream Linux device tree and
fragments of work done by previous developers.

Co-developed-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-03-19 11:04:41 +02:00
Jonas Schwöbel
dbc27c2462 ARM: tegra: clock: fix PLLD/PLLD2 related clock calculations
While PLLD/D2 is the nominal parent clock, all derived clocks are generated
from its single output, plld_out0, which is PLLD/D2 divided by two. Direct
use of PLLD/D2 is absent in peripheral clock configurations. Therefore,
clock derivation formulas must take in account this division.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-03-11 17:39:52 +02:00
Svyatoslav Ryhel
d41adba553 board: xiaomi: mocha: add Xiaomi Mi Pad A0101 support
The Mi Pad is a tablet computer based on Nvidia Tegra K1 SoC which
originally ran the Android operating system. The Mi Pad has a 7.9" IPS
display with 1536 x 2048 (324 ppi) resolution. 2 GB of RAM and 16/64 GB of
internal memory that can be supplemented with a microSDXC card giving up to
128 GB of additional storage.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-03-11 17:38:38 +02:00
Svyatoslav Ryhel
892e97c0e1 ARM: tegra124: implement BCT patching
This function allows updating bootloader from u-boot
on production devices without need in host PC.

Be aware! It works only with re-crypt BCT and AES
encrypted devices.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-02-26 13:08:20 +02:00
Svyatoslav Ryhel
ad3ec11b39 board: acer: picasso: add Acer Iconia Tab A500 support
The Acer Iconia A500 is a tablet computer designed, developed and
marketed by Acer Inc. It is powered by 1 GHz Nvidia Tegra 2 processor
and 1GB DDR2 RAM. The A500 is sold with 64 GB, although both 16 GB
and 32 GB models are available.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-02-16 19:11:43 +02:00
Svyatoslav Ryhel
c3d8c206dc ARM: tegra210: clock: implement PLLD2 support
PLLD2 is a simple clock (controlled by 2 registers) and appears starting
from T30. Primary use of PLLD2 is as main HDMI clock parent.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-02-12 10:35:17 +02:00
Svyatoslav Ryhel
e4f5741c6d ARM: tegra124: clock: implement PLLD2 support
PLLD2 is a simple clock (controlled by 2 registers) and appears starting
from T30. Primary use of PLLD2 is as main HDMI clock parent.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-02-12 10:35:17 +02:00
Tom Rini
0569ca6856 drivers/mmc/Kconfig: Make DM_MMC a hidden symbol
At this point in time, DM is always enabled. So if MMC is enabled, it
should select DM_MMC. No drivers need to depend on DM_MMC being enabled
now, so remove that from dependency lists. This now means that a number
of platforms which select'd DM_MMC need to select MMC instead. This also
fixes a migration problem with espresso7420 in that MMC is built again
with the platform.

Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-01-20 19:26:25 -06:00
Tom Rini
82686e678e Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra
Assorted Tegra enhancements. Merged with the recent XPL_BUILD changes,
resolve some whitespace issues and fix the name of the new apalis-tk1
env file by Tom.

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-10-13 10:43:24 -06:00
Ion Agorria
539633805d arm: tegra: add AP20 and AP20H SKU
Add previously undocumented SKU - AP20H found in LG Optimus 2X (P990).
Correct existing T20_7 name as it's proper name is AP20.

Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:24:15 +03:00
Ion Agorria
2b323dce57 arm: tegra: fix typo in logging functions
Change %02X to %02x since it always displayed 00 otherwise.

Signed-off-by: Ion Agorria <ion@agorria.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:24:15 +03:00
Svyatoslav Ryhel
539800bf92 ARM: tegra: board2: add common dtb reselect logic
Add common logic for dynamic dtb switch and DM reload if board
features multi-dtb support.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:20:26 +03:00
Jonas Schwöbel
b515d7ae0d Tegra30: Add funcmux for UART over SD slot
Tegra 3 has UART-E exposable via SD card slot which may be
handy for debugging. This change only adds funcmux part, to
use UART-E on the device you additionally would need:
- set stdout-path to serial@70006400 (uarte)
- configure sdmmc1_dat3_py4 and sdmmc1_dat2_py5 pinmux for
  uarte
- disable or remove sdhci@7800000 node
- enable CONFIG_TEGRA_ENABLE_UARTE in defconfig
- set CFG_SYS_NS16550_COM to NV_PA_APB_UARTE_BASE in device
  header

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-10-13 17:20:26 +03:00
Tom Rini
47e544f576 Merge patch series "Tidy up use of 'SPL' and CONFIG_SPL_BUILD"
Simon Glass <sjg@chromium.org> says:

When the SPL build-phase was first created it was designed to solve a
particular problem (the need to init SDRAM so that U-Boot proper could
be loaded). It has since expanded to become an important part of U-Boot,
with three phases now present: TPL, VPL and SPL

Due to this history, the term 'SPL' is used to mean both a particular
phase (the one before U-Boot proper) and all the non-proper phases.
This has become confusing.

For a similar reason CONFIG_SPL_BUILD is set to 'y' for all 'SPL'
phases, not just SPL. So code which can only be compiled for actual SPL,
for example, must use something like this:

   #if defined(CONFIG_SPL_BUILD) && !defined(CONFIG_TPL_BUILD)

In Makefiles we have similar issues. SPL_ has been used as a variable
which expands to either SPL_ or nothing, to chose between options like
CONFIG_BLK and CONFIG_SPL_BLK. When TPL appeared, a new SPL_TPL variable
was created which expanded to 'SPL_', 'TPL_' or nothing. Later it was
updated to support 'VPL_' as well.

This series starts a change in terminology and usage to resolve the
above issues:

- The word 'xPL' is used instead of 'SPL' to mean a non-proper build
- A new CONFIG_XPL_BUILD define indicates that the current build is an
  'xPL' build
- The existing CONFIG_SPL_BUILD is changed to mean SPL; it is not now
  defined for TPL and VPL phases
- The existing SPL_ Makefile variable is renamed to SPL_
- The existing SPL_TPL Makefile variable is renamed to PHASE_

It should be noted that xpl_phase() can generally be used instead of
the above CONFIGs without a code-space or run-time penalty.

This series does not attempt to convert all of U-Boot to use this new
terminology but it makes a start. In particular, renaming spl.h and
common/spl seems like a bridge too far at this point.

The series is fully bisectable. It has also been checked to ensure there
are no code-size changes on any commit.
2024-10-11 12:23:25 -06:00
Simon Glass
c46760d596 global: Rename SPL_ to XPL_
Use XPL_ as the symbol to indicate an SPL build. This means that SPL_ is
no-longer set.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:48 -06:00
Simon Glass
bef9fdbed2 arch: Use CONFIG_XPL_BUILD instead of CONFIG_SPL_BUILD
Use the new symbol to refer to any 'SPL' build, including TPL and VPL

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:47 -06:00
Simon Glass
0e01334fc1 tegra: Drop dependency on SPL_BUILD
SPL_BUILD is not a Kconfig symbol so perhaps the intent here is to
use SPL instead. But that changes the output size.

So drop the dependency on !SPL_BUILD since it does nothing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-10-11 11:44:46 -06:00
Marek Vasut
6f52feee28 power: regulator: Drop regulators_enable_boot_on/off()
Both regulators_enable_boot_on/off() are unused and superseded by
regulator uclass regulator_post_probe(). Remove both functions.

Signed-off-by: Marek Vasut <marex@denx.de>
2024-09-30 19:19:07 -06:00
Simon Glass
7d08262ec3 global_data: Remove pci_ram_top
This field is set but not used. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26 14:05:38 -06:00
Jonas Schwöbel
f6fb6b2608 board: lenovo: ideapad-yoga-11: add Lenovo Ideapad Yoga 11 support
The Lenovo IdeaPad Yoga 11 is a hybrid laptop/tablet Windows RT-based
computer released in late 2012. The device uses a 1.3 GHz quad-core
Nvidia Tegra 3 chipset with 2 GB of RAM, features a 11.6 inch 1366x768
screen and 32/64 GB of internal memory that can be supplemented with
a microSDXC card slot, full size SD card slot and 2 full size USB 2.0
ports.

Tested-by: Jethro Bull <jethrob@hotmail.com>
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-07-05 10:18:36 +03:00
Jonas Schwöbel
3486fd0739 board: microsoft: surface-rt: add Microsoft Surface RT support
Surface RT is a hybrid tablet computer developed and manufactured
by Microsoft and shipped with Windows RT. The tablet uses a 1.3 GHz
quad-core Nvidia Tegra 3 chipset with 2 GB of RAM, features 10.8
inch 1366x768 screen and 32/64 GB of internal memory that can be
supplemented with a microSDXC card giving up to 200 GB of
additional storage.

Tested-by: Jethro Bull <jethrob@hotmail.com>
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-07-05 10:18:36 +03:00
Svyatoslav Ryhel
2c4a399682 board: wexler: qc750: add WEXLER Tab 7t support
WEXLER Tab 7t is a mini tablet computer developed by WEXLER that
runs the Android operating system. The device features a 7.0-inch
(180 mm) HD display, an Nvidia Tegra 3 quad-core chip, 1 GB of RAM,
8, 16 or 32 GB of storage that can be supplemented with a microSDXC
card giving up to 64 GB of additional storage and a full size USB
port.

Tested-by: Maksim Kurnosenko <asusx2@mail.ru>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-07-05 10:18:36 +03:00
Svyatoslav Ryhel
28144ba8d0 board: asus: transformer: add ASUS Transformer T20 family support
The Asus Eee Pad Transformer family are 2-in-1 detachable/slider
tablets developed by Asus that run the Android operating system.
The Eee Pad Transformers feature a 10.1-inch (260 mm) display,
an Nvidia Tegra 2 dual-core chip, 1 GB of RAM, and 16/32 GB of storage.
Transformers board derives from Nvidia Ventana development board.

This patch brings support for all 3 known T20 Transformers:
- Asus Eee Pad Transformer TF101
- Asus Eee Pad Transformer TF101G
- Asus Eee Pad Slider SL101

Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101
Tested-by: Antoni Aloy Torrens <aaloytorrens@gmail.com> # ASUS TF101
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-07-05 10:18:35 +03:00
Svyatoslav Ryhel
bd356e05cd arm: tegra20: bct: add missing <vsprintf.h>
Fixes implicit declaration of function 'hextoul'

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-07-05 10:16:52 +03:00
Tom Rini
03de305ec4 Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"
As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-20 13:35:03 -06:00