The bitshift in GEM_CLK_CTRL register is five bits, not two. There are
four bits for each GEM, and one bit reserved in between.
This has caused that using more than one GEM is impossible,
additionally corrupting the GEM0's configuration, leaving GEM0
unusable as well (ie. if GEM0 and GEM1 are used, GEM1 configuration is
going to write to GEM0's registers wrong value, leaving GEM0 unusable)
Signed-off-by: Frantisek Bohacek <rutherther@ditigal.xyz>
Link: https://lore.kernel.org/r/20250522060703.4863-1-rutherther@ditigal.xyz
Signed-off-by: Michal Simek <michal.simek@amd.com>
Introduce the BSH SystemMaster (SMM) M2B board. Notably, the M2B is
designed to leverage the existing device tree of its predecessor, the M2.
The primary distinction arises from memory incompatibilities with the M2.
To address this, we've implemented a configuration system that allows for
selective inclusion of the desired memory components.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Enable the clock framework on the m2 platform.
This helps to increase the NAND controller performance.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The clock driver allows to boost the NAND performance
controller. Make changes to let it use the new clock driver
=> time nand read ${loadaddr} kernel
NAND read: device 0 offset 0x500000, size 0x800000
8388608 bytes read: OK
time: 0.488 seconds
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Make simple the clock registration and enable and allow later
to add support for other platforms
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
The GW74xx D revision has added a M2SKT_WDIS2# GPIO which routes to the
W_DISABLE2# pin of the M.2 socket.
Add the iomux and a line name for this and rename the existing
m2_wdis# signal to m2_wdis1#.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Append the optional board configuration string to the model info.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Update the model string representation for the Venice-Flex product
family (GW8xxx).
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The Gateworks Flexible Socket Adapters adapt common
busses such as SDIO/UART/USB/PCI to various connectors
such as M.2 B-Key, M.2 E-Key, M.2 M-Key, and MiniPCIe.
Each FSA has an EEPROM onboard describing its details as well as an
optional port-expander for configurable GPIO's.
Add support for identifying the FSA's and configuring their
details such as user description and GPIO's:
- enable pca953x, pca954x and eeprom support for communicating
with the I2C eeprom and gpio port expander on the FSA
- add FSA detection support
- add FSA gpio configuration support
Each FSA is identified in the device-tree by an alias to it's I2C
bus where an eeprom@54 node must exist as well as an gpio@20 node
for an io-expander. These nodes must be enabled so that
they can be probed to determine if they are actually present in
the system. If not present or not enabled the gpio expander can
not be used. This also requires livetree as the gpio expander
node if not present must be disabled.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The Gateworks GW82XX-2X is an ARM based single board computer (SBC)
comprised of the i.MX8M Plus based gw702x SoM and the gw82xx
baseboard featuring:
- i.MX8M Plus SoC
- LPDDR4 DRAM
- eMMC FLASH
- Gateworks System Controller (GSC)
- microSD (1.8V/3.3V Capable)
- panel status bi-color LED
- pushbutton switch
- fan controller with tachometer
- USB Type-C connector
- PCIe switch
- 2x GbE RJ45 connectors
- multi-protocol RS232/RS485/RS422 Serial ports
- 2x Flexible Socket Adapters with SDIO/UART/USB/PCIe
(for M.2 and miniPCIe expansion)
- 2x isolated CAN
- GPS
- accelerometer
- magnetometer
- off-board connectors for: SPI, GPIO, I2C, ADC
- Wide range DC power input
- support for 802.3at PoE (via adapter)
Add support for it by providing its device-tree.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Flip the logic used to determine if a board has the proper hardware to
support enabling the GSC voltage supervisor so that we do not need to
keep adding new models to the list.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The venice family of baseboards which is normally GW7xxx
is being expanded to GW8xxx so we need to use the baseboard
number instead of the som.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The GW7901-SP486 with the exception of the -C revision has 2GB DRAM
loaded but incorrectly specifies 1GB in the EEPROM. Adjust the DRAM size
to account for this.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The GW7902/GW7903/GW7904 have an alternate databus layout affecting a few
of the DDRC and DDR PHY registers.
The 512MB configuration used this alternate bus layout. Change
the 512MB config to the standard bus configuration and add a generic
function to patch the DDRC/PHY configs for the alternate bus layout.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Move the determination of the dram timings into the soc-specific files.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Enable support for working with General Partition Tables via the 'gpt'
command. Also enable support for generating random UUID's for GPT.
See: doc/README.gpt for examples
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
enable cat, xxd, and the ability for setexpr to return values in
variables which are all useful for scripting.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Bring in recent expo enhancements:
- multi-line text
- highlighting of menu items
- rationalisation of menu and expo code
- support for object alignment
- editable strings
- various bug fixes and tweaks
This also includes some required abuf improvements.
Commit 21e7fa0e3a ("image: android: handle ramdisk default address")
changed the default behavior for header versions less than or equal to 2.
The ramdisk address (img_data.ramdisk_ptr) is only assigned to *rd_data
if the physical load address (img_data.ramdisk_addr) is equal to 0 or
the Android default ramdisk address.
/* Ramdisk can be used in-place, use current ptr */
if (img_data.ramdisk_addr == 0 ||
img_data.ramdisk_addr == ANDROID_IMAGE_DEFAULT_RAMDISK_ADDR) {
*rd_data = img_data.ramdisk_ptr;
} else {
ramdisk_ptr = img_data.ramdisk_addr;
*rd_data = ramdisk_ptr;
memcpy((void *)(ramdisk_ptr), (void *)img_data.ramdisk_ptr,
img_data.ramdisk_size);
}
When the img_data.ramdisk_addr and the img_data.kernel_addr are the same
*rd_data needs to be assigned to the ramdisk address (ramdisk_ptr), not
the physical address (ramdisk_addr).
As a result of the current behavior, we can no longer boot a kernel on
the Renesas R-Car S4 board.
Add an additional check to the if clause so that the ramdisk address is
assigned when the kernel address and the ramdisk address are the same,
restoring the previous default behavior.
Fixes: 21e7fa0e3a ("image: android: handle ramdisk default address")
Signed-off-by: Eddie Kovsky <ekovsky@redhat.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org> # khadas vim3
When building with only bootz command, without bootm, images pointer
inside bootm_info structure is not initialized. And since this structure
is stored in stack, the generated error is kind of random, but most of
the time this will generate: "ramdisk - allocation error".
Also, after analysis, this problem could occur with the command booti,
if the command bootm is disabled.
Currently bootm_init() is called by: do_bootz(), do_bootm(), do_booti()
and by do_stm32prog(). And all of these commands execute bootm_run_states()
which access the images pointer stored into bootm_info structure.
So, to fix this issue, just do the assignment unconditionally.
Fixes: c2211ff651 ("bootm: Add more fields to bootm_info")
Signed-off-by: Benjamin ROBIN <dev@benjarobin.fr>
Reviewed-by: Tom Rini <trini@konsulko.com>
When lwIP (CONFIG_NET_LWIP) is used instead of legacy stack (CONFIG_NET),
environment flags support associated with network was not built: restore
support of "i" and "m" environment flags.
Signed-off-by: Benjamin ROBIN <dev@benjarobin.fr>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Adriano Cordova <adrianox@gmail.com> says:
Enable HTTP server in CI to support HTTP tests in pytest
QEMU does not emulate an HTTP server, unlike other services like DHCP or TFTP.
To enable HTTP tests during CI runs, start a simple Python HTTP server
on port 80. This allows tests that require HTTP access to run.
The HTTP server is launched on the host. For QEMU environments launched
with '-netdev,user' this means that the HTTP server runs together with DHCP
at 10.0.2.2. HTTP testing needs to be explicitly enabled with
env__efi_helloworld_net_http_test_skip = False.
We also default `WGET=y` in `ARCH_QEMU` configurations so that these HTTP
tests are included automatically when using QEMU in CI.
Link: https://lore.kernel.org/r/20250516085256.30386-1-adriano.cordova@canonical.com
The original commit always generated linker list entries with the same
entry variable name, because _function passed to ll_entry_declare() is
not a variable and therefore was interpreted as fixed string. Change it
to _type which is a variable and which does allow generation of multiple
unique linker list entries, one for each U_BOOT_FIT_LOADABLE_HANDLER().
Fixes: d7be50921e ("image: Add FIT image loadable section custom processing")
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
There are a few differences between how the test.py stage invokes
test.py and how the sjg-lab stage invokes test.py. As a start of making
both the code and the output and artifacts similar, this updates the
sjg-lab stage with the following:
- Pass "-ra" so that we get the summary information in the job
- Make use of TEST_PY_EXTRA for passing "--capture=tee-sys"
- Re-order some of the arguments to be the same order when possible.
And most importantly:
- Create and save as an artifact the junitxml output.
The last part here is the kind of test result information that in the
future we should determine how to archive for future reference.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini <trini@konsulko.com> says:
In a private thread, Simon asked about what's needed to get PowerPC
migrated to DM_SERIAL. I went and took a look, and to complete the
entire DM_SERIAL migration (excluding SPL/TPL) we're actually nearly
there. This series first migrates PowerPC (and some NXP Layerscape
boards that share history more clearly with PowerPC parts), with the
biggest change being to make sure we still use the correct legacy
drivers in SPL/TPL (where SPL is extremely constrained). With that out
of the way, I looked at what was left. With two exceptions, it's
platforms which can be trivially enabled for conversion, and so we do
that.
Link: https://lore.kernel.org/r/20250502201226.1369013-1-trini@konsulko.com
This converts almost all of the remaining non-DM_SERIAL users to enable
DM_SERIAL. These are platforms where there have long been other SoC
boards that have switched and so it's been a matter of inertia keeping
these from being converted. Do so now.
Signed-off-by: Tom Rini <trini@konsulko.com>
Migrate the few ARM Layerscape platforms that had not been switched
along with all remaining PowerPC platforms to DM_SERIAL. For PowerPC,
this means that platforms which use SPL/TPL, keeping the non-DM serial
driver enabled there as they do not use DM. We also rework the guards
on how to define CFG_SYS_NS16550_CLK so that this is mostly in one place
now.
Signed-off-by: Tom Rini <trini@konsulko.com>
The expo now has all that is needed to apply a suitable theme, so drop
this unnecessary code. Any further tweaks can be added to the generic
expo code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Apply the theme, calculate dimensions, highlight the menu and arrange
the scene correctly, so that everything is ready to go when the expo
is rendered.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some callers may wish to add items later as they are discovered. Split
the setup code into its own function, to permit this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than returning a bootflow, return the index of the bootflow. This
will allow callers to do their own translation to bootflows or some
other data structure.
Also return a special code when the user tries to move the pointer, so
that the caller can cancel the boot-menu timeout, if this is in use.
Signed-off-by: Simon Glass <sjg@chromium.org>
