Commit Graph

98977 Commits

Author SHA1 Message Date
Stephan Gerhold
49f2e9780b board: dragonboard410c: Drop reflash functionality
This is broken ever since we switched to using U-Boot as first stage
bootloader. Since no one seems to test this actively, let's just drop this
entirely. There are other tools available for re-flashing the DB410c.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-5-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11 15:32:22 +02:00
Stephan Gerhold
f7d3009b39 board: dragonboard410c: Drop UNSTUFF_BITS() macro
This was originally taken from Linux, but at this point it's an inline
function upstream and no longer a macro. Given that we just want to extract
the serial number from the MMC CID, let's just inline that specifically.
This is also the style used in the MMC core code within U-Boot.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-4-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11 15:32:21 +02:00
Stephan Gerhold
2cc2dc2336 board: dragonboard410c: Fix BD address
local-bd-address in the device tree needs to be formatted with the least
significant byte first (i.e. little endian). We're not doing this when
adding it to the DT, which means the MAC address ends up being reversed in
Linux. Fix this by reversing the array before setting it in the DT.

We're also flipping the wrong bit when generating the BD address. Before
reversing the array, the least significant bit is in the last byte.

Fixes: ff06dc2403 ("db410: alter WLAN/BT MAC address fixup")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-3-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11 15:32:21 +02:00
Stephan Gerhold
c53664c681 board: dragonboard410c: Fix RAM size
DB410c has exactly 1 GiB of RAM. Some of it is reserved, but this is
described separately in the DT.

This was fixed before in commit 1d667227ea ("board: dragonboard410c: Fix
PHYS_SDRAM_1_SIZE"), but was reintroduced when DB410c was converted to use
the upstream device tree.

Note that there are variants of apq8016-sbc with 2 GiB RAM (e.g. the
Geniatech DB4). They need the WIP SMEM memory map parsing [1] to use the
full amount of RAM.

[1]: https://lore.kernel.org/u-boot/20241124-b4-modernise-smem-v1-0-b7852c11b67c@linaro.org/T/

Fixes: ed8fbd2889 ("dts: msm8916: replace with upstream DTS")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-2-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11 15:32:21 +02:00
Stephan Gerhold
fa9eb2f1e6 mach-snapdragon: Fix EL2 boot on DragonBoard 410c
The workaround for the "PSCI bug" on DragonBoard 410c implemented in
arch/arm/mach-snapdragon/include/mach/boot0.h clobbers the x0 register
by storing the CurrentEL in there. When running in EL1, the mode switch
sequence implemented there later clears the register again, but this is
skipped when U-Boot is booted in EL2.

This causes crashes in the mach-snapdragon board_fdt_blob_setup() later,
because the invalid address stored in x0 gets dereferenced to check if it
points to a valid DTB.

We can't rely on having a valid values in the CPU registers for the first
stage bootloader configuration on DB410c, and nothing would place a DTB
there anyway. Skip selecting the SAVE_PREV_BL_FDT_ADDR option for the boot0
hook case to avoid crashing with the clobbered register value.

Fixes: 059d526af3 ("mach-snapdragon: generalise board support")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407-db410c-fixes-v1-1-524aefbc8bb4@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11 15:32:21 +02:00
Caleb Connolly
91ba4976c0 pinctrl: qcom: handle reserved ranges
Some Qualcomm boards feature reserved ranges of pins which are protected
by firmware. Attempting to read or write any registers associated with
these pins results the board resetting.

Add support for parsing these ranges from devicetree and ensure that the
pinctrl and GPIO drivers don't try to interact with these pins.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250410-topic-sm8x50-pinctrl-reserved-ranges-v2-1-654488392b9a@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11 15:30:21 +02:00
Caleb Connolly
9c607005c5 button: make button_get_by_label() case insensitive
This function is already doing a fuzzy match, since there are no
guarantees that a given label is unique.

Ignoring case makes it much easier to catch "Volume down" or "Volume
Down" in board-agnostic code.

Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish
Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-6-f52e57d3b8c6@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11 15:28:14 +02:00
Caleb Connolly
8f5685d5d3 button: qcom-pmic: prettify and standardise button labels
Boards using gpio-keys for volume buttons label them "Volume Down",
let's match that here, and make the power button nicer too.

This simplifies configuring button_cmds in a board-agnostic way.

Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish
Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-5-f52e57d3b8c6@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11 15:28:14 +02:00
Caleb Connolly
4509f81839 doc: board/qualcomm: describe phone support and bringup
Add some documentation which attempts to describe Qualcomm smartphone
support with the qcom-phone.config fragment, as well as a high level
debugging guide for diagnosing U-Boot issues when UART and framebuffer
are unavailable.

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish
Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci
Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-4-f52e57d3b8c6@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11 15:28:14 +02:00
Caleb Connolly
aa5ef3c0a7 bootretry: check for bootretry variable changes
To enable more complex sequencing of the bootmenu, autoboot, and
bootretry, handle changes to the bootretry variable between tries. This
makes it possible to turn bootretry off (e.g. to drop to a shell) and
then back on again.

This makes it possible to have a persistent bootmenu (the only way to
navigate U-Boot on devices like smartphones which lack a physical
keyboard) by having bootcmd be defined to launch the bootmenu. This
allows for menu options like enabling USB mass storage gadget to return
back to the boot menu once the gadget is shut down.

Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish
Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci
Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-3-f52e57d3b8c6@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11 15:28:14 +02:00
Caleb Connolly
657e19f8f2 cli_hush: support running bootcmd on boot retry
Introduce a new config option: RETRY_BOOTCMD. When enabled this causes
hush shell to re-run "bootcmd" when the auto-boot counter times out.

Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish
Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci
Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-2-f52e57d3b8c6@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11 15:28:14 +02:00
Caleb Connolly
fd775fb7af board/qualcomm: introduce phone config
Phones don't have keyboards! Introduce a phone-specific config fragment
and associated environment file to make U-Boot more useful on these
devices. This allows for navigating via the buttons and enabling
various USB gadget modes or displaying info about U-Boot.

Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Danila Tikhonov <danila@jiaxyga.com> # google-sunfish
Tested-by: Jens Reidel <adrian@mainlining.org> # xiaomi-davinci
Link: https://lore.kernel.org/r/20250331-qcom-phones-v4-1-f52e57d3b8c6@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11 15:28:14 +02:00
Alexey Minnekhanov
b4420a0c9e drivers: pinctrl: Add Qualcomm SDM630/660 TLMM driver
Add support for TLMM pin controller block (Top Level Mode
Multiplexer) on SDM630/660 SoCs, with support for special pins.

Correct pin configuration is required for working debug UART
and eMMC/SD cards.

SDM630 and SDM660 TLMM blocks are the same.

Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250331155531.3638165-1-alexeymin@postmarketos.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11 15:25:51 +02:00
Neil Armstrong
8803cd6dd7 gpio: msm: return correct value return for special output pins
When a special pin is output only, the current code would return 0,
but if the pin is output only we can get the output value.

Try to return the output value and in all the other cases return
an error instead of 0.

Fixes: f9bb539460 ("gpio: msm: add support for special pins")
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250401-topic-sm8x50-msm-gpio-special-fixes-v1-2-a1148a02bb16@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11 15:24:54 +02:00
Neil Armstrong
0708bdd34d gpio: msm: fix get_function return for special pins
The get_function callback wrongly returns 0 for special pins,
return the appropriate pin function by probing into the special
pins data fields to find if the pin is gpio capable.

Fixes: f9bb539460 ("gpio: msm: add support for special pins")
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250401-topic-sm8x50-msm-gpio-special-fixes-v1-1-a1148a02bb16@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-11 15:24:54 +02:00
Sumit Garg
45acd9d2d4 phy: phy-qcom-qusb2: Fix USB PHY power on sequence
Recent addition of support for SDM660 inadvertently broke USB PHY power
on sequence on RB1/RB2 and others with following error:

starting USB...
Bus usb@4e00000: QUSB2PHY pll lock failed: status reg = 0
qcom-qusb2-phy phy@1613000: PHY: Failed to power on phy@1613000: -16.
Can't power on PHY0
probe failed, error -16
No USB controllers found

The root cause was the addition of flag se_clk_scheme_default which was
configured correctly for SDM660 but incorrect for all other supported
SoC. Fix that by properly assignment as per upstream Linux driver.

Fixes: 475497dc3c15 ("phy: Add SDM660 support to Qualcomm QUSB2 phy")
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by:
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250410080027.208674-3-sumit.garg@kernel.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:12 +02:00
Sumit Garg
49cf3b2913 qcom_defconfig: Disable MMC HS200 mode support
Currently the msm_sdhci doesn't yet support DLL configurations which are
required to enable bus speeds greater that 100MHz. So disable HS200 mode
support as of now as it requires bus speeds of 200MHz.

This should fix eMMC issues reported on RB1/RB2 although it should fix
issues for all Qcom platforms but it's not seen there as mostly SD cards
available don't support HS200 mode. The SD cards usually works in high
speed mode whose performance remains unaffected by this change. It only
affects RB1/RB2 as eMMC flash on these support HS200 mode but the U-Boot
driver currently is incapable of supporting that.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250410080027.208674-2-sumit.garg@kernel.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:12 +02:00
Jorge Ramirez-Ortiz
adb79d3082 configs: dragonboard820: updates
Configure GPIO and CLK_STUBS
CLK_STUBS is required for MMC initialization

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407175617.3494506-5-jorge.ramirez@oss.qualcomm.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:12 +02:00
Jorge Ramirez-Ortiz
7afddbee3b clk: stub: add qcom,glink-smd-rpm
Add support for the resource power manager clocks over SMD/GLINK to be
stubbed.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250407175617.3494506-4-jorge.ramirez@oss.qualcomm.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:11 +02:00
Jorge Ramirez-Ortiz
8fc48d1a01 clk/qcom: apq8096: fix the sdhci clock
Select the right clock for sdhci.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez@oss.qualcomm.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250407175617.3494506-3-jorge.ramirez@oss.qualcomm.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:11 +02:00
Jorge Ramirez-Ortiz
1561b01a08 clk/qcom: apq8096: fix set rate for the uart clock
The function should return a valid rate.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407175617.3494506-2-jorge.ramirez@oss.qualcomm.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:11 +02:00
Jorge Ramirez-Ortiz
f933b5a704 board: qualcomm: dragonboard820c: update readme
Update build instructions.

Be sure to use the u-boot-nodtb.bin image, as the Snapdragon platform
prioritizes the embedded Device Tree Blob (DTB) when present, rather
than the external one. The external DTB—modified by LK—is the version
required by the DB820c.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org>
Reviewed-by:
Link: https://lore.kernel.org/r/20250407175617.3494506-1-jorge.ramirez@oss.qualcomm.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:11 +02:00
Caleb Connolly
c5e05651b1 hmibsc_defconfig: disable DM_USB_GADGET
As with the db410c this breaks linking as it conflicts with the USB
controller used by these platforms.

This fixes building after DM_USB_GADGET was enabled by default for
mach-snapdragon.

Fixes: 7235dbedfce3 (mach-snapdragon: enable DM_USB_GADGET by default)
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250402142812.368168-1-caleb.connolly@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:11 +02:00
Caleb Connolly
602ceb0c92 mach-snapdragon: of_fixup: fix condition check in ft_board_setup()
The fdt_node_check_compatible() function returns 0 on success which is
pretty confusing, and we were using it wrong!

Invert the condition check and refactor things to be more readable.

Additionally, add the check for the RB1 which needs the same fixup as
the RB2.

Reported-by: Sam Day <me@samcday.com>
Fixes: e64503f1fc ("mach-snapdragon: implement ft_board_setup() for USB role selection")
Tested-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Tested-by: Sam Day <me@samcday.com>
Link: https://lore.kernel.org/r/20250331104327.321339-1-caleb.connolly@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:10 +02:00
Neil Armstrong
5b233442af spmi: msm: correctly handle multiple mapping entries
On v5 & v7 controllers, multiple mapping for different
Execution Environment exists, if the mapping owner is for
a different Execution Environment we can only read and
not write any data.

To allow us to find a Write mapping for our Execution
Environment, we can overwritte a mapping if we encounter
a new one which we own.

Implement this logic, the result is the same mapping
table as in Linux.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: caleb.connolly@linaro.org # sdm845
Link: https://lore.kernel.org/r/20250328-topic-sm8x50-spmi-fix-v1-4-a7548d3aef0d@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:10 +02:00
Neil Armstrong
69400a696c spmi: msm: introduce SPMI_CHANNEL_VALID flag
Introduce the SPMI_CHANNEL_VALID flag so we can check if
a mapping exists for a SPMI command.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: caleb.connolly@linaro.org # sdm845
Link: https://lore.kernel.org/r/20250328-topic-sm8x50-spmi-fix-v1-3-a7548d3aef0d@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:10 +02:00
Neil Armstrong
f252350623 spmi: msm: factor out channel mapping for v5 & v7
The handling of the table mapping for V5 & V7 needs more work
to handle the duplicate read-only & read-write mappings,
so to make code cleaner add a switch/case and move the
v5 & v7 mapping handler in a separate function.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: caleb.connolly@linaro.org # sdm845
Link: https://lore.kernel.org/r/20250328-topic-sm8x50-spmi-fix-v1-2-a7548d3aef0d@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:10 +02:00
Neil Armstrong
1a02b7aa58 spmi: msm: use real number of channels for v5 & v7
The SPMI_MAX_CHANNELS_Vx are only the maximum channels supported
by the controller, but the real number of channels mapped on this
system can be read from a register, so take this info.

This allows no to overlap on the second controller present on
the V7 SPMI arbiter, otherwise we would also parse the mapping
of the second SPMI bus and we would bet the wrong IDs.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: caleb.connolly@linaro.org # sdm845
Link: https://lore.kernel.org/r/20250328-topic-sm8x50-spmi-fix-v1-1-a7548d3aef0d@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:10 +02:00
Caleb Connolly
2c1462e38b clk/qcom: sc7280: add missing UFS and MMC clocks
These are all usually enabled, hence we don't (yet) bother configuring
their RCG src clocks.

Add them to remove the errors about missing clocks when the UFS and MMC
drivers probe.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250317-sc7280-mmc-ufs-clocks-v1-2-38e05c16511b@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:10 +02:00
Varadarajan Narayanan
55fee70fb0 qcom_defconfig: enable pinctrl for SA8775P
Enable the pinctrl driver for SA8775P

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250324080504.2385747-2-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:09 +02:00
Varadarajan Narayanan
5effb1e625 pinctrl: qcom: add driver for SA8775P SoC
Add pinctrl and GPIO driver for SA8775P. Driver code is based on the
similar U-Boot and Linux drivers.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250324080504.2385747-1-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:09 +02:00
Varadarajan Narayanan
b2f89b33d3 regulator: qcom-rpmh-regulator: add support for pmm8654 regulators
Add the PMC8380 regulator data found on the Qualcomm SA8775P platform.
The tables are imported from the Linux driver.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250324113030.2597986-1-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:09 +02:00
Rui Miguel Silva
925efba579 power: regulator: add qcom-usb-vbus
Add regulator driver that allow some Qualcomm PMIC to
feed VBUS output to peripherals that are connected.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Acked-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250227094911.497219-3-rui.silva@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:09 +02:00
Rui Miguel Silva
1542c090ee mach-snapdragon: of_fixup: fix property length at writing
The length of a property includes '\0' in a string type one, so
the length passed by needs to have that in account, if not,
when getting the property value it will fail because it
has the wrong size.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Tested-by: caleb.connolly@linaro.org # db845c
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250227094911.497219-2-rui.silva@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:09 +02:00
Caleb Connolly
32ad75f787 qcom_defconfig: enable fastboot
Enable fastboot support over USB, using MMC as the backend. This will be
the internal eMMC on devices that have it, or the sdcard slot on devices
with UFS (if available).

We don't use a fixed address for the fastboot buffer because it's
allocated at runtime per-board. Entering fastboot mode should be done by
executing "run fastboot" or manually running:

fastboot -l $fastboot_addr_r usb 0

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250324-sdm845-fixes-fastboot-v1-4-d177a10f336d@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:09 +02:00
Caleb Connolly
520f26425b mach-snapdragon: enable DM_USB_GADGET by default
This is required for gadget modes to work on most platforms. It must be
disabled for dragonboard410c since that doesn't use dwc3. USB on other
MSM8916 platforms isn't supported by qcom_defconfig anyway.

Link: https://lore.kernel.org/r/20250324-sdm845-fixes-fastboot-v1-3-d177a10f336d@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:08 +02:00
Caleb Connolly
c8db6bdba6 clk/qcom: sdm845: add GCC_AGGRE_UFS_PHY_AXI_CLK
Missing for UFS.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250324-sdm845-fixes-fastboot-v1-2-d177a10f336d@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:08 +02:00
Caleb Connolly
7c07628e5b clk/stub: add sdm845 rpmh clock
Necessary for UFS to successfully probe all clocks.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250324-sdm845-fixes-fastboot-v1-1-d177a10f336d@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:08 +02:00
Sam Day
ec8209d04a clk/qcom: sdm845: add missing USB3 clocks
These are necessary for USB gadget to come up properly, now that
qcom_gate_clk_en fails on unknown clocks.

Signed-off-by: Sam Day <me@samcday.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250319-sdm845-usb-clocks-v1-1-ddea854f62ec@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:08 +02:00
Alexey Minnekhanov
ec2850e40c phy: Add SDM660 support to Qualcomm QUSB2 phy
Imported from Linux driver.

Note that already existing but previously unused member of
struct qusb2_phy::has_se_clk_scheme is now utilized for it's
purpose.

Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250325083713.2425430-1-alexeymin@postmarketos.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:08 +02:00
Caleb Connolly
a6c88ca805 qcom_defconfig: enable OF_UPSTREAM_BUILD_VENDOR
A single U-Boot binary can be run on many different Qualcomm boards just
by booting with a different DTB.

Simplify the build process for this by enabling OF_UPSTREAM_BUILD_VENDOR
so that all the DTBs will be available after building U-Boot once.

Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Acked-by: Christopher Obbard <christopher.obbard@linaro.org>
Link: https://lore.kernel.org/r/20250328104011.1837872-1-caleb.connolly@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-04-10 15:43:08 +02:00
Tom Rini
8a2cf6307a CI: Disable evb-ast2600
Currently, this platform is failing in CI due to seemingly platform
specific reasons. For now, remove it from CI until the maintainers have
a chance to look in to it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-04-09 18:34:08 -06:00
Tom Rini
1f0281294d Merge patch series "Annotate switch/case fallthrough cases"
Andre Przywara <andre.przywara@arm.com> says:

C's implicit fallthrough behaviour in switch/case statements can lead to
subtle bugs. Quite some while ago many compilers introduced warnings in
those cases, requiring intentional fallthrough's to be annotated.

So far we were not enabling that compiler option, so many ambiguities
and some bugs in the code went unnoticed.

This series adds the required annotations in code paths that the first
stage of the U-Boot CI covers. There is a large number of cases left
in the libbz2 code. The usage of switch/case is borderline insane there,
labels are hidden in macros, and there are no breaks, but just goto's.
Upstream still uses very similar code, without any annotations. I still
am not 100% sure those are meant to fall through or not, and plan to do
further investigations, but didn't want to hold the rest of the patches
back. You can see for yourself by applying patch 18/18 and building for
sandbox64, for instance.

Because of this we cannot quite enable the warning in the Makefile yet,
but those fixes are worth regardless, and be it to increase readability.

Please note that those patches do not fix anything, really, they just add
those fallthrough annotations, so the series is not really critical.

Link: https://lore.kernel.org/r/20250327153313.2105227-1-andre.przywara@arm.com
2025-04-08 16:24:12 -06:00
Andre Przywara
9ce2986e7e cmd: spl: annotate switch/case fallthrough
The argument parsing in the SPL configuration command uses an implicit
switch/case fallthrough when dealing with a different number of
arguments.

Add our "fallthrough;" statement-like macro before the respective labels
in the bootm code, to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-04-08 16:23:51 -06:00
Andre Przywara
d29a90c8ce cmd: pmic: annotate switch/case fallthrough
The argument parsing code in the pmic command uses an implicit switch/case
fallthrough to handle the common part of having one or two arguments.

Add our "fallthrough;" statement-like macro before the second branch in
the parsing code, to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-04-08 16:23:51 -06:00
Andre Przywara
3f61113c27 mtd: rawnand: nand_base: annotate switch/case fallthrough
The raw NAND flash code uses an implicit switch/case fallthrough to
share code when dealing with different ECC modes, and also when handling
some read command.

Add our "fallthrough;" statement-like macro before the respective labels
in the NAND code, to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.

This copies the fallthrough annotations that the original kernel code
gained, before this function got refactored there.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Michael Trimrachi <michael@amarulasolutions.com>
2025-04-08 16:23:51 -06:00
Andre Przywara
452dfcc3b4 mtd: spi-nor-tiny: annotate switch/case fallthrough
The SPI NOR code uses an implicit switch/case fallthrough when checking
different vendors to determine how to deal with extended addressig modes.

Add our "fallthrough;" statement-like macro before some label in the
4-byte addressing mode code, to avoid a warning when GCC's
-Wimplicit-fallthrough warning option is enabled.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-04-08 16:23:51 -06:00
Andre Przywara
bc3e28e11b arm: mach-k3: am62p: annotate switch/case fallthrough
The MMC boot mode selection for the TI AM62P series of SoCs uses an
implicit switch/case fallthrough for falling back to some default
boot mode.

Add our "fallthrough;" statement-like macro before the default branch in
the code, to avoid a warning when GCC's -Wimplicit-fallthrough warning
option is enabled.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-04-08 16:23:51 -06:00
Andre Przywara
64bc012458 mtd: ubi: annotate fallthrough
The UBI code uses an implicit switch/case fallthrough when handling two
related cases of bad header errors. Also there is a switch/case for unit
prefix handling (G/M/K), which accumulates multiplications.

Add our "fallthrough;" statement-like macro before the respective labels
in both cases, to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2025-04-08 16:23:51 -06:00
Andre Przywara
960d3d933d net: e1000: annotate switch/case fallthrough
The E1000 driver uses an implicit switch/case fallthrough for sharing
some code supporting different PHYs.

Add our "fallthrough;" statement-like macro before the two labels in
e1000_set_phy_type(), to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2025-04-08 16:23:51 -06:00