While the code was removed in commit 3766a249a3 ("fs: drop reiserfs")
this reference in the Makefile was missed. Remove it now.
Fixes: 3766a249a3 ("fs: drop reiserfs")
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Some device trees may not have a reserved-memory node. Rather than
exiting early we should create a new reserved-memory node along with
the memory carveout for the firmware we (U-Boot) have placed.
Signed-off-by: Bryan Brattlof <bb@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.
Signed-off-by: Tom Rini <trini@konsulko.com>
HOSTCFLAGS of some tools components (image-host, rsa-sign and
ecdsa-libcrypto) depend on the directory where openssl is installed.
Add them via pkg-config.
This fixes a potential build failure in tools when openssl in installed
in varied directories.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
VPL has the same needs as TPL in situations where the stack is at the
top of SRAM. Add an option for this and implement it for arm
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that we have the same option for SPL and TPL, simplify the logic for
determining the initial stack.
Note that this changes behaviour as current SPL_STACK is a fallback for
TPL. However, that was likely unintended and can be handled with Kconfig
defaults if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Suggested-by: Tom Rini <trini@konsulko.com>
At present there is a hex value SPL_STACK which both determines whether
SPL has its own initial stack and the hex value of that stack.
Split off the former into SPL_HAVE_INIT_STACK with SPL_STACK depending
on that and only providing the latter.
Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Resync defconfig files]
The most common word for features that make a platform work is to use
'HAVE_xxx'. Rename this option to match.
Update the help to use the word 'phase' rather than 'stage', since
that is the current terminology. Also clarify that, absent this setting,
the stack pointer generally comes from the value used by U-Boot proper,
rather than SPL.
Move the option just above TPL_STACK which depends on it.
Signed-off-by: Simon Glass <sjg@chromium.org>
The sc5xx machine code includes implementations of board_init and
board_early_init_f which should not be included in the base soc support
code, as they should be implemented by a board where necessary.
This removes the default empty implementations of both from mach-sc5xx.
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
The arm library includes an implementation of bss_clear that is already
called from crt0.S. This re-clearing of BSS should not be performed in
the machine code and should therefore be removed.
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Update the DDR Configurations for AM62Px SK according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Update the DDR Configurations for AM62Ax SK according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Update the DDR Configurations for AM62x LP SK according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Update the DDR Configurations for AM62x SK according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
Update the DDR Configurations for AM64x EVM according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.
Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/25112
- Add drivers for MFD STM32 TIMERS and STM32 PWM and enable them on stm32mp135f-dk
- Restrict _debug_uart_init() usage in STM32 serial driver
- Add support for environment in eMMC on STM32MP13xx DHCOR SoM
- Introduce DH STM32MP15xx DHSOM board specific defconfigs
- Fix CONFIG_BOOTCOUNT_ALTBOOTCMD update on DH STM32MP1 DHSOM
- Update maintainer for board stm32f746-disco
- Fix Linux cmdline for stm32f769-disco
- Cleanup in stm32f***-u-boot.dtsi and in board_late_init() by removing
legacy led and button management.
Build the imx code singing tool from source instead of relying on the
distro to provide the tool.
Use the debian/unstable branch because the default branch is outdated.
The binary is supposed to be build with docker, work around that by selecting
the correct Makefile directly.
Also append the description and add a link to documentation.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add optional argument make_path to build_from git. The new argument
allows specifying the path to a Makefile in case it is not in the root
of the git repo.
Also adjust the corresponding test.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add optional argument git_branch to build_from_git. The new argument
allows specifying which branch of the repo to use.
Signed-off-by: Leonard Anderweit <l.anderweit@phytec.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Greg Malysa <malysagreg@gmail.com> says:
This series adds all of the supported peripheral drivers for the sc5xx
series of SoCs from Analog Devices and other drivers that are used by
the evaluation kits, such as a GPIO expander used by the EZLITE carrier
boards. This series passes gitlab CI tests.
Link: https://lore.kernel.org/r/20250226173150.13198-1-malysagreg@gmail.com
This adds the necessary dt-bindings and documentation to use the ADI
SC5xx pinctrl driver in a device tree. It is not yet available upstream
in the Linux kernel. Eventually, it will be moved there.
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Enable PCI enumeration by default to get the Bochs display driver up
and running before the boot medium is scanned.
This is just to enhance the user-experience while booting the machine.
TEST: U-Boot logo, version, log output and the U-Boot shell is visible
on the display device.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
qemu's sbsa-ref is always using a 64bit CPU and the PCI prefetch MMIO
window is located above 4GiB, thus always enable SYS_PCI_64BIT.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Legacy PCI devices, like qemu's Bochs VGA device, are allowed to have
prefetchable 32-bit BARs, while PCIe devices are not allowed to have
32-bit prefetchable BARs. Typically prefetchable BARs are 64-bit and
typically the prefetch MMIO window is also 64-bit and placed above
4GiB, as it's the case on qemu sbsa-ref.
Currently the U-Boot code assumes that prefetchable BARs are
64-bit BARs and always tries to assign them into the prefetch
MMIO window.
When a 32-bit BAR is marked as prefetch, but the prefetch area is
not within the first 4GiB of the address space, then downgrade the
BAR and place it in the non-prefetch MMIO window.
For prefetch BARs there's no downside on being placed in non prefetch
MMIO areas, besides the possible slower performance when a driver tries
to map it Write-Combine.
TEST: Fixes pci_auto on QEMU sbsa-ref fails to autoconfigure BAR0.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Since commit 948da7773e ("arm: Add new config option ARCH_VERY_EARLY_INIT")
debug_uart_init() is called respectively in crt0.S and crt0_64.S.
That means that _debug_uart_init() is called for all STM32MP platforms
even for those which doesn't support SPL_BUILD.
So restrict _debug_uart_init() execution for platforms which can have
SPL_BUILD enabled (STM32MP1 platform only).
It's more needed to call debug_uart_init() in stm32mp1/cpu.c.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Vikas has left STMicroelectronics several years ago.
Put myself as maintainer of stm32f746-disco board.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
The pwm source TIM1_CH3N channel (on PE12) in inverted polarity mode
will be used to manage the brightness of the panel backlight on
STM32MP135F-DK.
Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Enable the following configs:
* CONFIG_MFD_STM32_TIMERS: enables support for the STM32 multifunction
timer
* CONFIG_DM_PWM: enables support for pulse-width modulation devices
* CONFIG_CMD_PWM: enables 'pwm' command to control PWM channels
* CONFIG_PWM_STM32: enables support for the STM32 PWM devices
Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add driver to support pwm on STM32MP1X SoCs. The PWM signal is generated
using a multifuntion timer which provide a pwm feature. Clock rate and
addresses are retrieved from the multifunction timer driver.
Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Add support for STM32MP timer multi-function driver.
These timers can be use as counter, trigger or pwm generator.
This driver will be used to manage the main resources of the timer to
provide them to the functionnalities which need these ones.
Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
