Commit Graph

99478 Commits

Author SHA1 Message Date
Jernej Skrabec
7a087f5ddd sunxi: h6: dram: split dram_para struct
This change is same as in commit 78aa00c38e ("sunxi: H616: dram: split
struct dram_para"), but for H6. This is needed in order to extract
common code between H6 and H616 later.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2025-04-28 12:45:32 -06:00
Jernej Skrabec
236c0d8124 sunxi: H6: DRAM: Constify function parameters
Constify parameters for two reasons:
- Allow more compile time optimizations
- It will allow later sharing of common code with H616 (when it will be
  rearranged some more)

Commit does same kind of changes as commit 457e2cd665 ("sunxi: H616:
dram: const-ify DRAM function parameters")

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2025-04-28 12:44:31 -06:00
Jernej Skrabec
2bee17dcaa sunxi: H6: Remove useless DRAM timings parameter
This is just cosmetic fix for later easier rework.

Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2025-04-26 12:01:26 +01:00
Tom Rini
5a0a93a768 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscv
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/25940

- riscv: lib: Simplify FDT retrieving process
- board: k1: pinctrl: Add pinctrl support for bananapi-f3
- binman: riscv: Fix binman_sym functionality
- board: starfive: visionfive2: Reorder board detection logic
- board: starfive: Add DeepComputing FML13V01 support
2025-04-25 13:13:17 -06:00
Tom Rini
7a9c9b5655 Merge tag 'efi-2025-07-rc1-3' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request efi-2025-07-rc1-3

Documentation:

* add documentation for the DeepComputing FML13V01
* fix typos

UEFI:

* build with HII configuration protocol
* print image load address in StartImage

Boards:

* qemu-riscv raise CONFIG_NR_DRAM_BANKS
* add support for the DeepComputing FML13V01 board via
  starfive_visionfive2_defconfig
* add UNIT_TESTS to big-endian Malta boards
2025-04-25 13:11:40 -06:00
Heinrich Schuchardt
0ded463849 configs: add UNIT_TESTS to big-endian Malta boards
We currently only run the unit tests on low-endian boards.
We should run them on big-endian, too.

Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-04-25 17:33:20 +02:00
Heinrich Schuchardt
fcfe4e7ac0 doc: jh7110: describe debug UART
Provide the settings for using the debug UART in SPL.

Reviewed-by: E Shattow <e@freeshell.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-04-25 17:32:08 +02:00
Heinrich Schuchardt
8cb4a42396 doc: starfive: use jh7110_common.rst
To avoid duplicate maintenance just include jh7110_common.rst to describe
the usage of the different boot sources.

Reviewed-by: E Shattow <e@freeshell.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-04-25 17:32:08 +02:00
Heinrich Schuchardt
7441206279 doc: starfive: use consistent formatting
Always use ---- for the H2 level.

Reviewed-by: E Shattow <e@freeshell.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-04-25 17:32:08 +02:00
Heinrich Schuchardt
612e832a9c doc: add DeepComputing FML13V01 documentation
Describe building U-Boot for the board and booting.

Carve out common information for JH7110 boards into an include.

Reviewed-by: E Shattow <e@freeshell.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-04-25 17:32:08 +02:00
Heinrich Schuchardt
62dad88db2 board: starfive: spl: support DeepComputing FML13V01
On the DeepComputing Framework motherboard (FML13V01) choose the matching
FIT configuration.

Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: E Shattow <e@freeshell.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-04-25 17:32:08 +02:00
Heinrich Schuchardt
c5e8f34769 board: starfive: DeepComputing FML13V01 fdt selection
We support all JH7110 boards with starfive_visionfive2_defconfig.
The relevant device-tree is selected at runtime based on EEPROM data.

Support setting $fdtfile to the file name of the DeepComputing Framework
motherboard (FML13V01) device-tree.

Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: E Shattow <e@freeshell.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-04-25 17:32:08 +02:00
Heinrich Schuchardt
7125924a62 riscv: dts: jh7110: add DeepComputing FML13V01 device-tree
Add the u-boot device-tree include needed to support the
DeepComputing Framework motherboard (FML13V01).

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: E Shattow <e@freeshell.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-04-25 17:32:08 +02:00
Heinrich Schuchardt
872b55d42a configs: add jh7110-deepcomputing-fml13v01 to VF2 defconfig
The DeepComputing Framework motherboard is a JH7110 device support by the
upstream kernel. Add its device-tree to the list of device-trees to be
included into the starfive_visionfive_defconfig.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: E Shattow <e@freeshell.de>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-04-25 17:32:08 +02:00
Heinrich Schuchardt
4b6f71668c configs: qemu-riscv raise CONFIG_NR_DRAM_BANKS
The number of memory banks in QEMU is not bounded by 1.

In this example we have two banks:

    qemu-system-riscv64 \
    -machine virt \
    -nographic \
    -m 8192 \
    -smp 8,sockets=2,cores=4,threads=1 \
    -numa node,cpus=0-3,mem=4096 \
    -numa node,cpus=4-7,mem=4096 \
    -kernel u-boot

As we will see RISC-V NUMA systems using U-Boot
we should be able to emulate these.

Use the default value defined in /Kconfig as 4.

Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-04-25 17:31:44 +02:00
Aristo Chen
393123adad doc: fix typo 'to'
Fix typo from "to" to "do"

Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-04-25 17:30:15 +02:00
Aristo Chen
06d7bd9c06 doc: fix typo commnad
fix typo from "commnad" to "command"

Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
2025-04-25 17:29:09 +02:00
Aristo Chen
5bf00b576d doc: arch: arm64: fix typos
Fix typo from "recommened" to "recommended"

Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
2025-04-25 17:28:22 +02:00
Aristo Chen
e4ead99950 doc: remove duplicated "commands"
The "commands" are duplicated, so remove one of them

Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-04-25 17:28:10 +02:00
Heinrich Schuchardt
db3f4905bf efi_loader: print image load address in StartImage
When starting image add the image load address to the debug output.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-25 17:27:49 +02:00
Heinrich Schuchardt
ac040ae58d efi_loader: build with HII configuration protocol
Without the HII configuration protocol the debug version of the UEFI shell
cannot be used.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-04-25 17:26:39 +02:00
E Shattow
5ac699efe9 board: starfive: visionfive2: Order board detection logic to match config
Refactor inside-out EEPROM-checking logic to better match the board-seeking
callback and ordered list of targets from starfive_visionfive2_config since
the JH7110 OF_UPSTREAM migration.

Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-04-25 17:04:09 +08:00
E Shattow
84028132af doc: board: starfive: visionfive2: add missing format command to Flashing
Signed-off-by: E Shattow <e@freeshell.de>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-04-25 16:40:02 +08:00
Heinrich Schuchardt
95c1bb5f55 doc: jh7110: describe debug UART
Provide the settings for using the debug UART in SPL.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E Shattow <e@freeshell.de>
2025-04-25 16:39:34 +08:00
Heinrich Schuchardt
f0b86c4dd1 doc: starfive: use jh7110_common.rst
To avoid duplicate maintenance just include jh7110_common.rst to describe
the usage of the different boot sources.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E Shattow <e@freeshell.de>
2025-04-25 16:39:34 +08:00
Heinrich Schuchardt
39b558c416 doc: starfive: use consistent formatting
Always use ---- for the H2 level.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E Shattow <e@freeshell.de>
2025-04-25 16:39:34 +08:00
Heinrich Schuchardt
9b0a451b9e doc: add DeepComputing FML13V01 documentation
Describe building U-Boot for the board and booting.

Carve out common information for JH7110 boards into an include.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E Shattow <e@freeshell.de>
2025-04-25 16:39:34 +08:00
Heinrich Schuchardt
26cd7afcce board: starfive: spl: support DeepComputing FML13V01
On the DeepComputing Framework motherboard (FML13V01) choose the matching
FIT configuration.

Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E Shattow <e@freeshell.de>
2025-04-25 16:39:34 +08:00
Heinrich Schuchardt
3de6e675ed board: starfive: DeepComputing FML13V01 fdt selection
We support all JH7110 boards with starfive_visionfive2_defconfig.
The relevant device-tree is selected at runtime based on EEPROM data.

Support setting $fdtfile to the file name of the DeepComputing Framework
motherboard (FML13V01) device-tree.

Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E Shattow <e@freeshell.de>
2025-04-25 16:39:34 +08:00
Heinrich Schuchardt
d4bcf3b417 riscv: dts: jh7110: add DeepComputing FML13V01 device-tree
Add the u-boot device-tree include needed to support the
DeepComputing Framework motherboard (FML13V01).

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E Shattow <e@freeshell.de>
2025-04-25 16:39:34 +08:00
Heinrich Schuchardt
ccb1769e85 configs: add jh7110-deepcomputing-fml13v01 to VF2 defconfig
The DeepComputing Framework motherboard is a JH7110 device support by the
upstream kernel. Add its device-tree to the list of device-trees to be
included into the starfive_visionfive_defconfig.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E Shattow <e@freeshell.de>
2025-04-25 16:39:34 +08:00
Yao Zi
d3c597f08a riscv: Provide __image_copy_{start_end} symbols in linkerscript
Binman looks for __image_copy_start to determine the base address of an
entry if elf-base-sym isn't specified, which is missing in RISC-V port.
This causes binman skips RISC-V SPL entries without filling addresses
into its .binman_sym_table section.

This patch defines __image_copy_start in linkerscript of both SPL and
proper U-Boot to ensure binman_sym functions correctly with the default
binman.dtsi. The paired symbol, __image_copy_end, is introduced as well
for completeness.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-04-25 16:31:29 +08:00
Yao Zi
97b433b4e3 riscv: dts: starfive: Prevent binman from relocating symbols in SPL
SPL and proper U-Boot are split into two images with default binman
configuration of StarFive VisionFive 2, thus proper U-Boot symbols
cannot be found in the SPL image. This fixes errors like

  Section '/binman/spl-img': Symbol '_binman_u_boot_any_prop_size'
    in entry '/binman/spl-img/mkimage/u-boot-spl/u-boot-spl-nodtb':
      Entry 'u-boot-any' not found in list (u-boot-spl-nodtb,
      u-boot-spl-dtb,u-boot-spl,mkimage,spl-img)

Fixes: 90602e779d ("riscv: dts: starfive: generate u-boot-spl.bin.normal.out")
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Yao Zi <ziyao@disroot.org>
2025-04-25 16:31:29 +08:00
Yao Zi
efe9c12322 riscv: dts: binman.dtsi: Switch to u-boot-nodtb entry for proper U-Boot
Switch to u-boot-nodtb entry which precisely represents a proper U-Boot
and could be matched with u_boot_any. This allows RISC-V ports that make
use of binman to be built without disabling SPL_BINMAN_UBOOT_SYMBOLS
explicitly, which is set to y by default.

Fixes: 0784510f74 ("riscv: sifive: unleashed: Switch to use binman to generate u-boot.itb")
Suggested-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-04-25 16:31:29 +08:00
Heinrich Schuchardt
5c8e1c46b1 configs: qemu-riscv raise CONFIG_NR_DRAM_BANKS
The number of memory banks in QEMU is not bounded by 1.

In this example we have two banks:

    qemu-system-riscv64 \
    -machine virt \
    -nographic \
    -m 8192 \
    -smp 8,sockets=2,cores=4,threads=1 \
    -numa node,cpus=0-3,mem=4096 \
    -numa node,cpus=4-7,mem=4096 \
    -kernel u-boot

As we will see RISC-V NUMA systems using U-Boot
we should be able to emulate these.

Use the default value defined in /Kconfig as 4.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-04-25 16:31:29 +08:00
Minda Chen
107df8b3b1 MAINTAINERS: visionfive2: Add match N: starfive pattern
Add match N:starfive pattern to visionfive2 board. Now
starfive pattern just related to JH7110 IC.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2025-04-25 16:31:29 +08:00
Huan Zhou
cffe38b7b3 config: Enable pinctrl in bananapi-f3
Add pinctrl support in bananapi-f3 platform

Signed-off-by: Huan Zhou <me@per1cycle.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-04-25 16:31:29 +08:00
Huan Zhou
d1cea78af4 riscv: dts: k1: add pinctrl property in dts.
Add pinctrl node in device tree and update
in bananapi f3 dts.

Signed-off-by: Huan Zhou <me@per1cycle.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-04-25 16:31:29 +08:00
Yao Zi
a7bc58409f board: sifive: Remove dead board_fdt_blob_setup
CONFIG_OF_BOARD isn't enabled on SiFive Unleashed and Unmatched, thus
board_fdt_blob_setup is actually dead code on these platforms. Let's
remove it.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-04-25 16:30:54 +08:00
Yao Zi
41cb90a27a board: starfive: Remove duplicated board_fdt_blob_setup
The default version should work for Starfive VisionFive 2.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-04-25 16:30:54 +08:00
Yao Zi
1ec65b26cf board: qemu: riscv: Remove duplicated board_fdt_blob_setup
The default version should work for RISC-V QEMU.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-04-25 16:30:54 +08:00
Yao Zi
d0969a6b64 riscv: lib: Add a default implementation of board_fdt_blob_setup
It's common for S-Mode proper U-Boot to retrieve a FDT blob along with
taking control from SBI firmware. Add a weak version of
board_fdt_blob_setup to make use of it by default, avoiding copy-pasting
similar functions among boards.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-04-25 16:30:54 +08:00
Mattijs Korpershoek
9d3f1ebaf8 tools/make_pip: Use venv when invoking pip
Recent Ubuntu versions (24.04+) disallow pip by default when
installing packages. The recommended approach is to use a virtual
environment (venv) instead.
Because of this, "make pip" is failing on such versions.

To prepare CI container migration to Ubuntu 24.04, use a venv in the
make_pip script.

Note: This has been reported on [1]

[1] https://source.denx.de/u-boot/custodians/u-boot-dm/-/issues/37

Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-04-24 16:30:37 -06:00
Tom Rini
1c2979af36 CI: Update to latest containers
This changes to using "venv" rather than "virtualenv" for Python
sandboxing.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-04-24 16:30:26 -06:00
Tom Rini
efd00b0345 python: Use and refer to the venv module rather than virtualenv
Using some form of sandbox with Python modules is a long standing best
practice with the language. There are a number of ways to have a Python
sandbox be created. At this point in time, it seems the Python community
is moving towards using the "venv" module provided with Python rather
than a separate tool. To match that we make the following changes:

- Refer to a "Python sandbox" rather than virtualenv in comments, etc.
- Install the python3-venv module in our container and not virtualenv.
- In our CI files, invoke "python -m venv" rather than "virtualenv".
- In documentation, tell users to install python3-venv and not
  virtualenv.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-04-24 15:37:27 -06:00
Tom Rini
10f4836511 Merge patch series "Add PCIe support for TI AM64 SoC"
Hrushikesh Salunke <h-salunke@ti.com> says:

TI's AM64 SoC has a single instance of Cadence PCIe Controller. This
series enables support for PCIe in AM64 SoC and to configure it in
Root-Complex mode of operation.

Link: https://lore.kernel.org/r/20250416120830.138965-1-h-salunke@ti.com
2025-04-24 10:46:17 -06:00
Hrushikesh Salunke
f4baa55c5b configs: am64x_evm_a53_defconfig: Enable configs for PCIe support
TI's AM64 SoC has single instance of PCIe Controller namely PCIe0 which
is Cadence PCIe Controller. To support PCIe functionality with PCIe0
instance in Root-Complex mode enable corresponding configs. Also enable
configs to support NVMe over PCIe.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2025-04-24 10:45:49 -06:00
Hrushikesh Salunke
a478d0f05b pci: pcie_cdns_ti: Enable PCIe root-complex mode in AM64 SoC
TI's AM64 SoC has single instance of PCIe Controller namely PCIe0 which
is Cadence PCIe Controller. Add support to configure PCIe0 in Root-
Complex mode of operation.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2025-04-24 10:45:49 -06:00
Hrushikesh Salunke
29602a5290 pci: pcie_cdns_ti: Include linux/sizes.h header
Driver uses macro SZ_4G to configure inbound base address register.
The macro is used without including the header file in which it is
defined. Fix this.

Fixes: 59ad548009 ("pci: Add TI K3 Cadence PCIe Controller")
Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2025-04-24 10:45:49 -06:00
Tom Rini
629f089387 Merge patch series "arm: mach-k3: remove some firewalls left over by ROM"
Bryan Brattlof <bb@ti.com> says:

This small series is here to remove some firewalls setup by ROM during
their boot and clean things up for Linux later on. Ideally this would be
a simple call to remove_fwl_configs() however the location of the
firewall is problematic (could potentially crash the core) when we're
currently executing from the memory region protected by the firewall.

So we need to introduce a function which allows us to disable specific
firewall regions and skip others to ensure boot stability.

Link: https://lore.kernel.org/r/20250414-firewalls-v1-0-89090085c08b@ti.com
2025-04-24 10:45:41 -06:00