If an Unexpected exception is thrown in a test, an undefined variable
error is reported. Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 85d7dae377 ("test: Detect dead connections")
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
If a BootFail exception is thrown in a test, it is not handled
correctly. Use the correct fixture variable 'ubman_fix' to resolve this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: d9ed4b75ad ("test/py: Drop u_boot_ prefix on test files")
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
When the toradex-smarc-imx8mp_defconfig file was first added, SPL_STACK
was set to 0x960000, but SPL_HAVE_INIT_STACK wasn't enabled.
This led to SPL_STACK being correctly dropped in commit 25fefa05d7
("configs: Resync with savedefconfig"), since SPL_HAVE_INIT_STACK was
missing, which ended up making the board not boot.
Fix this by adding SPL_STACK back and making sure SPL_HAVE_INIT_STACK is
enabled.
Fixes: dde53eae88 ("board: toradex: add Toradex SMARC iMX8MP")
Signed-off-by: Hiago De Franco <hiago.franco@toradex.com>
Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com>
After enabling some options to support EEPROM read in SPL
(CONFIG_SPL_I2C_EEPROM), the following error appears:
alloc space exhausted
Increasing SYS_MALLOC_F_LEN from 8kB to 64kB fixes the problem.
But instead of manually increasing the value, adopt method used in
commit ce3f23404c ("board: bsh: imx8mn_bsh_smm_s2/s2pro: enlarge
CONFIG_SPL_SYS_MALLOC_F_LEN"):
Dropping CONFIG_SPL_SYS_MALLOC_F_LEN option allows it to be set to the
default value of CONFIG_SYS_MALLOC_F_LEN, which is set by default to 64kB
(0x10000) on i.MX8M platforms.
Suggested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
i.MX91 device tree still not landed in linux kernel, so drop OF_UPSTREAM
and move the device tree files to arch/arm/dts
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
When doing the investigation for commit 53bb8fdea1 ("mmc: Kconfig:
Correct dependencies SDHCI ADMA options") I missed the implications of
MMC_SDHCI_ADMA_HELPERS. The problem is that FSL_ESDHC via the
FSL_ESDHC_SUPPORT_ADMA2 option will also enable these helper functions.
This in turn means the correct dependency here is
MMC_SDHCI_ADMA_HELPERS and not *MMC_SDHCI_ADMA.
Reported-by: Heiko Thiery <heiko.thiery@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Backported from kernel
commit e07db28eea38 ("kbuild: fix single target build for external module")
It's worth noting that crmodverdir is empty for U-Boot.
Just backport it to make diffing easier
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Backported from kernel
commit 059bc9fc375e ("kbuild: make 'archprepare' depend on 'scripts'")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Backported from kernel
commit e00d88804814 ("kbuild: mark prepare0 as PHONY to fix external module build")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Backported from kernel
commit 156e7cbb3ef5 ("kbuild: do not overwrite .gitignore in output directory")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Backported from kernel
commit b89f25ea7892 ("kbuild: use -Werror=implicit-... instead of -Werror-implicit-..."
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Backported from kernel
commit ba97df45581f ("kbuild: use assignment instead of define ... endef for filechk_* rules")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Quentin Schulz <foss+uboot@0leil.net> says:
Out of all the dev_read_*_default functions, only two do not properly
use the type as argument and return type: dev_read_u32_default and
dev_read_s32_default. They both use int instead of u32/s32.
Considering that it's generally not guaranteed that an int is 4 bytes
but also for consistency sake, let's have them use the expected type.
Note that I have not tested this, just stumbled upon that inconsistency
by chance.
Link: https://lore.kernel.org/r/20250528-dev_read_x32_default-v1-0-6ab1734dd7a2@cherry.de
dev_read_s32_default is for getting an s32 from a Device Tree property
and allows to take a default value if that property is missing.
Considering it calls ofnode_read_u32_default which takes a u32 and
returns a u32, it should do the same instead of using an int, especially
considering that int size is typically architecture-specific, as opposed
to s32/u32.
s32 and u32 being the same size, dev_read_s32* functions calling
ofnode_read_u32_default shouldn't be an issue (at the type level at
least) as the information will be stored appropriately in 4B regardless
of the sign.
This incidentally matches all other dev_read_*_default functions.
Fixes: a1b17e4f4c ("dm: core: Add a function to read into a unsigned int")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
dev_read_u32_default is for getting a u32 from a Device Tree property
and allows to take a default value if that property is missing.
Considering it calls ofnode_read_u32_default which takes a u32 and
returns a u32, it should do the same instead of using an int, especially
considering that int size is typically architecture-specific, as opposed
to u32.
This incidentally matches all other dev_read_*_default functions (except
dev_read_s32_default which will be tackled in the next commit).
Fixes: 47a0fd3bad ("dm: core: Implement live tree 'read' functions")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/26607
- Add clock and reset drivers support for STM32MP25
- Add STM32H747-Discovery board support
- Add tamp_nvram driver
- Add SPL support and clock tree init to STM32MP13 RCC driver
- Add STM32MP13xx ram support
- Add support for STM32 Image V2.0 for STM32MP13xx
- Fix SYSRAM size on STM32MP13xx
- Fix DBGMCU macro on STM32MP13xx
- Auto-detect ROM API table on STM32MP15xx
TAMP backup registers will be exposed as nvmem cells.
Each registers ([0..127] for STM32MP2, [0..31] for STM32MP1) could be
exposed as nvmem cells under the nvram node in device tree
Signed-off-by: Simeon Marijon <simeon.marijon@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Add support for generating STM32 Image V2.0, which is used by STM32MP13xx.
The image header layout is similar to STM32MP15xx STM32 Image V1.0, but is
different enough to justify duplicate functions to generate the v2 image.
This code at least attempts to align the V1 and V2 image handling where
possible.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Add support for configuring DRAM controller on STM32MP13xx SoC.
The DRAM controller is basically identical to the DWC controller
on STM32MP15xx SoC, except the bus width is reduced from 32bit to
16bit and a few registers and bits are therefore not present.
Handle the difference by factoring these parts out. Use IS_ENABLE()
as much as possible to assure code which is not enabled on builds
for a single SoC gets compiled out. Handle the different offset of
RCC_DDRITFCR register and missing DDRC2 clock the same way.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Add SPL support and clock tree init to STM32MP13 RCC driver. This
consists of two parts, make SCMI into an optional dependency and
add clock tree initialization. The SCMI dependency is made optional
first by registering the few core clock provided by SCMI clock as
fixed clock, and second by letting the clock core parse out the
clock configuration from SoC registers. The clock initialization
code is derived from STM32MP15xx clock tree initialization code,
which is almost identical, except for the use of new PLL2000 for
PLL1 on STM32MP13xx .
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
The ROM API table location is passed to the SPL by BootROM in register r0,
make use of this, store the content of r0 and later use it to access the
ROM API table to determine current boot device.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The DBGMCU block is available at address 0x50081000 both on STM32MP13xx
and on STM32MP15xx . There is no reason to limit the DBGMCU macro being
set only on STM32MP15xx , remove the ifdeffery.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
The STM32MP13xx has only 128 kiB of SYSRAM starting at address 0x2ffe0000 .
The STM32MP15xx has 256 kiB of SYSRAM starting at address 0x2ffc0000 . Make
sure both SoCs configure ARMV7_SECURE_BASE correctly . Define the SYSRAM
base in stm32.h to be consistent with the STM32MP15xx macro.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Due activation of SCMI, we need to increase SYS_MALLOC_F_LEN value
to avoid following message:
U-Boot 2025.04-01224-g75b77a2a6d31-dirty (Apr 25 2025 - 11:23:30 +0200)
alloc space exhausted ptr 400040 limit 400000
alloc space exhausted ptr 400020 limit 400000
alloc space exhausted ptr 400060 limit 400000
alloc space exhausted ptr 400060 limit 400000
Set SYS_MALLOC_F_LEN to 0x60000 to fix this issue.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Due SCMI update to protocol v2.0, we need to increase
SYS_MALLOC_F_LEN value to avoid following message:
alloc space exhausted ptr 200040 limit 200000
Set SYS_MALLOC_F_LEN to 0x210000 to fix this issue.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Implement STM32MP25 reset drivers using stm32-core-reset API.
This reset stm32-reset-core API and will be able to use DT binding
index started from 0.
This patch also moves legacy reset into stm32 directory reset.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
In RCC the ops of the CCF registered CLK device can be called directly,
this patch avoid recursive call of clk_ function done by CCF clock
framework which update the clock information, for example
clk_enable is called 2 times, clkp->enable_count is increased 2 times.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Each clock identifier needs to be unique when CCF is activated,
and it is not respected today by SCMI clock driver.
This patch supports a unique clk id by using the uclass API
clk_get_id() / dev_clk_dm() and by activating by default
CONFIG_CLK_AUTO_ID with CCF which adds an offset to the SCMI
clock identifiers.
After this patch, the SCMI clock driver can coexist with other
clock provider without conflict, they can share internal identifier
[0..N] defined in their binding and the clock ID = 0
(reserved for dummy clock) is no more used.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
