SoCFPGA updates for v2025.10:
CI: https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/27762
This pull request brings a set of updates across SoCFPGA platforms
covering Agilex5, Agilex7, N5X, and Stratix10. The changes include:
* Agilex5 enhancements:
- USB3.1 enablement and DWC3 host driver support
- System Manager register configuration for USB3
- Watchdog timeout increase and SDMMC clock API integration
- dcache handling improvements in SMC mailbox path
- Enable SPL_SYS_DCACHE_OFF in defconfig
* Clock driver improvements:
- Introduce dt-bindings header for Agilex clocks
- Add enable/disable API and EMAC clock selection fixes
- Replace manual shifts with FIELD_GET usage
* DDR updates:
- IOSSM mailbox compatibility check
- Correct DDR calibration status handling
* Device tree changes:
- Agilex5: disable cache allocation for reads
- Stratix10: add NAND IP node
- Enable driver model watchdog
- Enable USB3.1 node for Agilex5
* Config cleanups:
- Simplify Agilex7 VAB defconfig
- Remove obsolete SYS_BOOTM_LEN from N5X VAB config
- Enable CRC32 support for SoCFPGA
- Increase USB hub debounce timeout
Overall this set improves reliability of DDR and cache flows,
adds missing USB and MMC features for Agilex5, and refines clock
and configuration handling across platforms.
This patch set has been tested on Agilex 5 devkit, and Agilex devkit.
After switching our boards to standard boot, we observed that the
kernel hangs when booting with the "script" boot method over the
network.
The original scriptaddr value was copied from ti_common.env and
remained unused for some time. On phycore-am62x and phycore-am62ax,
however, this address conflicts with the current location where
ATF is loaded (CONFIG_K3_ATF_LOAD_ADDR).
Move scriptaddr to 0x89100000, directly after fdtoverlay_addr_r.
The phycore-am64x is not affected by this issue, but we update it
as well to keep all phycore-am6xx boards consistent.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Anshul Dalal <anshuld@ti.com>
Add rauc to bootmeths variable if BOOTMETH_RAUC is enabled.
This is setting a proper default for RAUC enabled systems.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Martin Schwan <m.schwan@phytec.de>
Allows run-time control over watchdog auto-start and the timeout via
setting the environment variable watchdog_timeout_ms. A value of zero
means "do not start". Use CONFIG_WATCHDOG_TIMEOUT_MSECS as initial value.
Users can enable the watchdog to monitor the boot process until userspace
or OS takes over to serve the watchdog.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Commit 86acdce2ba ("common: add config for board_init() call")
introduced CONFIG_BOARD_INIT option. This option can be disabled for the
boards where board_init() function is not needed. Remove empty
board_init() calls for all boards where it's possible, and disable
CONFIG_BOARD_INIT in all related defconfigs.
This cleanup was made semi-automatically using these scripts: [1].
No functional change, but the binary size for the modified boards is
reduced a bit.
[1] https://github.com/joe-skb7/uboot-convert-scripts/tree/master/remove-board-init
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Tested-by: Adam Ford <aford173@gmail.com> #imx8mm_beacon
Tested-by: Bryan Brattlof <bb@ti.com>
Acked-by: Peng Fan <peng.fan@nxp.com> #NXP boards
With the latest TIFS firmware, an additional virtual interrupt and
event is reserved for TIFS usage on am62x and am62ax devices.
Update the rm-cfg to reflect this new reservation.
Based on commit 87720385ab ("board: ti: rm-cfg: Update rm-cfg to
reflect new resource reservation").
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
As part of our migration to the standard boot process, configure the
default values for the bootmeths and boot_targets environment variables.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Add fit_addr_r to the environment to allow us to boot from a FIT image.
Signed-off-by: Nathan Morrisson <nmorrisson@phytec.com>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
The write_host_id is the last element here and order does matter. This
may have gone unnoticed before as by default all elements are 0, but
if this is updated to a different host, it will not work. Update
the order so write_host_id is the last element in all current secure
board configs.
Reported-by: Prashant Shivhare <p-shivhare@ti.com>
Signed-off-by: Andrew Davis <afd@ti.com>
Provide a defconfig for booting the phycore-am62x via Ethernet.
We need a separate defconfig because the AM62x has not enough internal
SRAM to support all boot sources.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
TI's k3_dfu.env includes redundant dfu_alt_info_* data, some of which
is incompatible with our board configuration. Replace it with a custom
variant that better aligns with our setup, ensuring correct offsets and
eliminating unnecessary entries.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Provide a common part for our K3 based boards including general details
about environment handling and EFI capsule updates.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Increase the maximum Image size from 23 MB to 26 MB by moving the
initramfs start address up. This gives us a bigger ranger to
provide kernel images which are not stripped down too much.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
With commit 22ce56a3eb ("ram: k3-ddrss: Add k3_ddrss_ddr_bank_base_size_calc()
to solve 'calculations restricted to 32 bits' issue") we need to provide the
detected RAM size in the device tree node prio to K3 DDRSS driver probe.
This is done by calling fdt_fixup_memory_banks() in do_board_detect().
After probing, call into k3-ddrss driver to fixup device tree and resize
the available amount of DDR if ECC is enabled.
A third fixup is required from A53 SPL to take the fixup
as done from R5 SPL and apply it to DT passed to A53 U-boot,
which in turn passes this to the OS.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Introduce CONFIG_PHYTEC_K3_DDR_PATCH to make DDR timing patch code
optional for PHYTEC K3 boards. This allows better control over which
boards receive DDR timing patches, rather than compiling the code for
all boards with K3_DDRSS enabled.
Also enable the feature by default for PHYCORE_AM62X_R5.
Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Daniel Schultz <d.schultz@phytec.de> says:
This patch stack extends the phyCORE-AM62x/AM64x U-Boot by following boot
sources:
- Load U-Boot with USB DFU
- Load a Linux and initramfs from OSPI/QSPI NOR flash
- Load a Linux and rootfs from Network
Moreover, it adds required changes to the environment to boot an A/B
system with RAUC and includes some minor fixes.
Include the boot logic to boot via Network or from a OSPI/QSPI
NOR flash. Moreover, set all required variables to both boot
methods to the environment.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
By moving the earlycon definition into a dedicated variable, it's
easier to change these values in case the kernel should print on
a different serial interface.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
There is no need to reread the EEPROM multiple times in different stages
to detect the RAM size. We can do this once at an early stage and let
higher stages decode memory nodes using fdtdec.
Make sure to pass fixup memory nodes before passing to u-boot stage.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Pull in ti/k3_dfu.env for dfu_alt_info_ram in SPL stage.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Daniel Schultz <d.schultz@phytec.de>
Use content of EEPROM to detect the actual RAM size and adjust
DDR timings, size and banks accordingly.
Also enable the SoM detection per default in the defconfigs.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: John Ma <jma@phytec.com>
Introduce fdt_apply_ddrss_timings_patch() to allow board code to
override DDR settings in the device tree prior to DDRSS driver probing.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: John Ma <jma@phytec.com>
Environment handling code can be reused across all our K3 based SoMs.
Instead of adding the same code for every new SoM, move it to a common
board.c file.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Daniel Schultz <d.schultz@phytec.de> says:
This patch series extends PHYTEC's SOM detection by minor
fixes, a generic helper function and a new valid flag.
Moreover, it adds a module to provide access to the SOM
detection for our TI AM6 products.
Add all functions to read each SOM option from the EEPROM
image and detect whether it's the correct product for this
image.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
The phycore-am62x can be migrated to OF_UPSTREAM.
Drop redundant device tree files, update MAINTAINERS and
defconfig's DEFAULT_DEVICE_TREE for ti vendor prefix accordingly.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Select environment location based on the device we boot from.
Also, introduce a "boot" variable that represents the current boot
device and can be used by scripts.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Clean up all configuration files to adhere to yamllint rules.
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
[trini: Update more yaml files added since this was posted]
Signed-off-by: Tom Rini <trini@konsulko.com>
Suggested-by: Nishanth Menon <nm@ti.com>
