This driver requires some mach-at91 specific header files in order to build.
Express that requirement in Kconfig as well.
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
A few of the platform specific DWC3 host glue drivers cannot build
without access to some platform specific header files. Express those
requirements in Kconfig as well.
Reviewed-by: Marek Vasut <marek.vasut@mailbox.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
R-Car V4H Reference Manual R19UH0186EJ0130 Rev.1.30 Apr. 21, 2025 page 585
Figure 9.3.2 Software Reset flow (B) indicates that for peripherals in HSC
domain, after reset has been asserted by writing a matching reset bit into
register SRCR, it is mandatory to wait 1ms.
Because it is the controller driver which can determine whether or not the
controller is in HSC domain based on its compatible string, add the missing
delay into the controller driver.
This 1ms delay is documented on R-Car V4H and V4M, it is currently unclear
whether S4 is affected as well. This patch does apply the extra delay on
R-Car S4 as well.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Assure the reset is latched and the core is ready for DBI access.
On R-Car V4H, the PCIe reset is asynchronized and does not take
effect immediately, but needs a short time to complete. In case
DBI access happens in that short time, that access generates an
SError. Make sure that condition can never happen, read back the
state of the reset which should turn the asynchronized reset into
synchronized one, and wait a little over 1ms to add additional
safety margin.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
R-Car V4H Reference Manual R19UH0186EJ0130 Rev.1.30 Apr. 21, 2025 page 4581
Figure 104.3b Initial Setting of PCIEC(example), third quarter of the figure
indicates that register 0xf8 should be polled until bit 18 becomes set to 1.
Register 0xf8 bit 18 is 0 immediately after write to PCIERSTCTRL1 and is set
to 1 in less than 1 ms afterward. The current readl_poll_timeout() break
condition is inverted and returns when register 0xf8 bit 18 is set to 0,
which in most cases means immediately. In case CONFIG_DEBUG_LOCK_ALLOC=y ,
the timing changes just enough for the first readl_poll_timeout() poll to
already read register 0xf8 bit 18 as 1 and afterward never read register
0xf8 bit 18 as 0, which leads to timeout and failure to start the PCIe
controller.
Fix this by inverting the poll condition to match the reference manual
initialization sequence.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
On the RZG2L platform, the advised
TF-A (https://github.com/renesas-rz/rzg_trusted-firmware-a/tree/v2.5/rzg2l)
does not pass any DTB blob to U-Boot.
On the other hand, the RZG2L part of U-Boot expects a DTB to be passed. It
means that if one flashes the latest TF-A as well as the mainline U-Boot,
it will crash trying to dereference the NULL DTB pointer before outputing
anything.
Check if the DTB pointer is NULL before trying to use it.
Signed-off-by: Mathieu Othacehe <othacehe@gnu.org>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
This was apparently not built for several years: Since a2535243e0,
optee_copy_fdt_nodes implicitly works against the U-Boot dt. We
therefore have to tweak its reference before using the function and
restore things afterwards.
If it had been built, actually trying it out would have failed next: We
need CONFIG_OPTEE_LIB to actually build the function that is primarily
being tested here. And we need to re-initialize target fdt, now that the
tests may run in random order.
Fixes: a2535243e0 ("lib: optee: migration optee_copy_fdt_nodes for OF_LIVE support")
Fixes: ba2feaf414 ("test: Split optee tests into three functions")
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
The sandbox time offset is intended to be controlled via the U-Boot
environment, not the host process environment. Update os_get_time_offset()
to use env_get() instead of the libc getenv().
Leave other getenv() uses (e.g. U_BOOT_PERSISTENT_DATA_DIR,
UBOOT_SB_FUZZ_TEST) unchanged, since those refer to host environment
variables needed by sandbox tests.
Signed-off-by: Osama Abdelkader <osama.abdelkader@gmail.com>
The android boot header is page aligned but the current code made the
assumption that the header was always smaller than the current header
format.
When the page_size is defined as 2048, as this is the case with the
cuttlefish target, the current code sets the end of the header in the
middle of it as the v3 and v4 headers are respectively 2112 and 2128
bytes long.
Fix that by aligning to page_size
Fixes: 1115027d2f ("android: boot: update android_image_get_data to support v3, v4")
Signed-off-by: Guillaume Ranquet <ranquet.guillaume@gmail.com>
Fix a couple of style issues reported by checkpatch.pl:
- Replace `#ifdef CONFIG_MMC_TRACE` with `#if IS_ENABLED(CONFIG_MMC_TRACE)`
to follow the preferred kernel style for config-dependent branches.
- Drop explicit zero initialization of a static variable.
No functional change intended.
Signed-off-by: Bhimeswararao Matsa <bhimeswararao.matsa@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
In regulator_list_autoset there is a test for ret being non-zero and
error being zero but it uses the binary '&' instead of the logical '&&'
which could well lead to unexpected results. Correct this to use the
logical '&&' instead.
This issue found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This reverts commit 4d84fa1261, reversing
changes made to b82a1fa7dd.
I had missed some feedback on this series from earlier, and we have
since had reports of regressions due to this as well. For now, revert
this.
Signed-off-by: Tom Rini <trini@konsulko.com>
The error message in phytec_get_product_name() was missing a newline,
causing log output to be concatenated with subsequent messages. Add
the newline to improve readability.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
After switching our boards to standard boot, we observed that the
kernel hangs when booting with the "script" boot method over the
network.
The original scriptaddr value was copied from ti_common.env and
remained unused for some time. On phycore-am62x and phycore-am62ax,
however, this address conflicts with the current location where
ATF is loaded (CONFIG_K3_ATF_LOAD_ADDR).
Move scriptaddr to 0x89100000, directly after fdtoverlay_addr_r.
The phycore-am64x is not affected by this issue, but we update it
as well to keep all phycore-am6xx boards consistent.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Anshul Dalal <anshuld@ti.com>
Aristo Chen <jj251510319013@gmail.com> says:
This patch series enhances FIT image robustness by adding **memory
region overlap detection** to `mkimage` and fixing existing overlaps
in DTS files and `binman` tests.
The primary goal is to prevent runtime memory corruption from
conflicting load addresses in FIT images.
Key Changes:
1. `mkimage` Overlap Detection: A new validation in
`tools/fit_image.c` checks for overlapping load addresses
within FIT configurations. `mkimage` now errors out with
detailed info on conflicts, preventing bad FIT image creation.
2. New Test Case: A Python test verifies the new detection.
It intentionally creates an overlap (kernel and FDT)
to confirm correct error handling.
3. Fixes for Existing Overlaps:
* Board DTS (k3-am6xx): Adjusted load addresses for TI
firmware stubs to prevent conflicts. This resolves
previously undetected overlaps.
* `binman` Tests: Fixed several tests. U-Boot load
addresses were shifted to avoid ATF conflicts. A new
linker script for TEE ELF sections ensures distinct
memory layouts.
4. Documentation: Added guidance for developers on how to
determine ELF load addresses using readelf, linker scripts,
and objdump when working with binman FIT images.
Impact:
This series improves FIT image reliability by catching overlaps
at build time, helping developers resolve issues before runtime
failures.
Link: https://lore.kernel.org/r/20250914110021.4103-1-aristo.chen@canonical.com
Add documentation to help users understand how to determine where ELF
files will be loaded when using binman's 'fit,load' property. This
addresses the common confusion about how load addresses are determined
from ELF files.
The documentation explains three methods:
1. Using readelf to examine program headers
2. Checking the linker script (.lds file)
3. Using objdump to see section addresses
Also includes a specific example from binman tests showing how
elf_sections.lds sets ATF load address to 0x00000010 and
elf_sections_tee.lds sets TEE load address to 0x00100010 to avoid
memory overlap conflicts.
This helps users debug memory layout conflicts more efficiently when
working with FIT images containing multiple ELF components.
Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
Add a new test case to verify that mkimage properly detects and reports
memory region overlaps in FIT image configurations.
The test creates a FIT image with kernel and FDT components that have
the same load address (0x40000), which should trigger the overlap
detection logic and cause mkimage to fail with an appropriate error
message.
Test verifies:
- mkimage returns non-zero exit code when overlap is detected
- Error message contains "Error: Overlap detected:"
- Error message identifies the specific overlapping components
(kernel@1 and fdt@1)
This test ensures the overlap detection feature works correctly and
prevents deployment of FIT images with conflicting memory layouts
that could cause runtime failures.
Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
This patch adds a validation step in mkimage to detect memory region
overlaps between images specified in the same configuration of a
FIT image. If any overlaps are found, the tool prints an error and
aborts the build.
This helps prevent runtime memory corruption caused by conflicting
load addresses between images.
Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
Fix memory overlaps in FIT image configurations for TI AM62x and AM64x
PHYCore and SK boards.
The overlaps occurred in two categories:
1. TI firmware stub images (tifsstub-hs, tifsstub-fs, tifsstub-gp):
These mutually exclusive firmware variants were incorrectly assigned
the same load address within FIT configurations, causing overlap
detection to fail. Adjust addresses with 64KB spacing:
- tifsstub-hs: Keep original address
- tifsstub-fs: Move to +64KB offset
- tifsstub-gp: Move to +128KB offset
2. Device tree overlay images (som-no-rtc, som-no-spi, som-no-eth):
These overlay files had insufficient spacing between load addresses,
causing actual memory overlaps. Increase spacing to 8KB boundaries
to accommodate overlay sizes safely.
An upcoming commit will validate if the memory region is overlapped
Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
Fix one binman test that has memory region overlap issue, the test case
needed to be updated to use non-overlapping memory layouts.
* Tests fixed:
- testFitSplitElf
* Changes made:
1. ELF section layouts: added elf_sections_tee.lds with different
address for TEE to avoid overlap with ATF address defined in
elf_sections.lds
2. Makefile to properly build elf_sections_tee binary
3. Updat ftest.py to use separate ELF files for TEE vs ATF components
in split-elf operations.
An upcoming commit will validate if the memory region is overlapped
Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
Fix three binman tests that has memory region overlap issue, the test
cases needed to be updated to use non-overlapping memory layouts.
* Tests fixed:
- testFitFirmwareLoadables
- testFitSignSimple
- testFitSignNoSignatureNodes
* Changes made:
Updated DTB test files to change U-Boot load addresses from 0x0 to
0x2000 to avoid overlapping with ATF in the 0x10-0xfc range:
- 276_fit_firmware_loadables.dts
- 340_fit_signature.dts
- 342_fit_signature.dts
An upcoming commit will validate if the memory region is overlapped
Signed-off-by: Aristo Chen <aristo.chen@canonical.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Per a private email, drop Luka Perkov from MAINTAINERS entries.
Reviewed-by: Tony Dinh <mibodhi@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
OP-TEE configs are enabled by default, change the doc to no longer
declare OP-TEE as optional. Also remove CFG_TEE_BENCHMARK as it is no
longer present in optee_os.
Further, phycore-imx8mm and imx8mm-phygate-tauri-l use different build
instructions, so dissolve the common file for building OP-TEE.
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Enable OP-TEE config and RNG by default.
Set OP-TEE load address to end of 1GiB RAM for phycore-imx8mp and
phycore-imx8mm as the boards support a 1GiB RAM variant (although not
yet upstreamed for phycore-imx8mm).
The imx8mm-phygate-tauri-l board only supports 2GiB, so the default at
the end of 2GiB is sufficient.
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Yannic Moog <y.moog@phytec.de>
Following the work done in commit 7f39ad5a ("clk: imx6q: Add definition
for IMX6QDL_CLK_PWM1"), this commit adds definitions for PWM2, PWM3, and
PWM4 clocks. Allowing one to use these PWM modules together with DM_CLK.
Note that the solution was verified only against PWM3.
Signed-off-by: Ricardo Simoes <ricardo.simoes@pt.bosch.com>
Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
Fix support for i.MX93 voltage modes on phyCORE-i.MX93 SoM boards.
First of all, Kconfig option CONFIG_IMX9_LOW_DRIVE_MODE is gone since
commit c9efcad237 ("imx93_evk: Remove CONFIG_IMX9_LOW_DRIVE_MODE and
ld defconfig") and was replaced by runtime detection mechanism. Thus
lets use is_voltage_mode() instead of Kconfig to detect CPU type and
select proper voltage mode.
Secondly, 1400MHz ND mode (Nominal Drive) requiring 0.85V BUCK voltage
was not supported with current power_init_board() PMIC settings. Add
check also for this CPU type and set BUCK voltage accordingly.
Last but not least, add printf() printouts about PMIC voltage mode to
the console. This makes it more apparent and verbose about voltage mode
in use. Also our internal tests depend on this printout to catch issues
with i.MX93 CPU types and set PMIC voltage modes.
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
The LPCG number on iMX93 and iMX91 is 127 not 122. The wrong
value is used in ccm_reg structure and Coverity reports several
issues as out-of-bounds write.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
According to latest ELE Get FW version API, the FW version word is defined
as below. The patch version only has 4 bits and minor version has 12 bits.
However, the codes use 8 bits for patch version and minor version. Add the
patch to fix the issue.
ELE firmware version
[31] - When set indicates a dirty build.
[30] - Reserved
[29:28] - Hotfix version.
[27] - When set, indicate that ELE FW is authenticated and operational.
[26:25] - Reserved
[24] - When set, indicate that an alternative FW is running.
[23:16] - Indicate the major version. This byte is checked against the
version set in the fuses to determine if the FW execution can be authorized
[15:4] - Indicate the minor version.
[3:0] - Indicate the patch version.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The ELE MU driver needs to be probed at init_r phase as well because
some ELE APIs will be called.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
se_desc loop check is wrong, it relies on the desc always has
the expected name to end of the loop. It works because the device tree
has the expected name as of now, but this may not be always true.
Drop se_desc by moving the check into probe and fix the loop check.
Reported-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Allow to flash a board using NXP UUU utility:
- Enable fastboot support on USB.
- Add fastboot partition aliases with names used by UUU. Also add extra
environment variables used by UUU.
- Set 'dofastboot' environment variable based on boot device
configuration, allowing to automatically enter fastboot when booting
from USB.
Signed-off-by: Mathieu Dubois-Briand <mathieu.dubois-briand@bootlin.com>
We have to explicitly assign HSIOPLL_VCO as HSIOPLL parent. So when
enabling HSIOPLL, its parent HSIOPLL_VCO will be enabled firstly.
Signed-off-by: Ye Li <ye.li@nxp.com>
clk_set_rate returns the actual clock rate, When assigned clock rate is
higher than 0x7FFFFFFF, the return value will be recognized as error.
Change to IS_ERR_VALUE to check the return value.
Signed-off-by: Ye Li <ye.li@nxp.com>
Add iMX95 blkctrl clock driver which implements clocks for HSIOMIX
blkctrl and LVDS blkctrl.
Since multiple blkctrl device for different blkctrl may be enabled,
and each has dedicated clock id from 0. We must enable CLK_AUTO_ID
to avoid conflict on clock id.
Signed-off-by: Ye Li <ye.li@nxp.com>
Adding iMX95/iMX94 support to the dw driver. Follow kernel driver
stype to use flags to distinguish the characteristic of different
platforms.
Signed-off-by: Ye Li <ye.li@nxp.com>
