Commit Graph

101967 Commits

Author SHA1 Message Date
Luca Weiss
13043a2339 doc: board/qualcomm: Replace buildman build instructions
This command does not work as described in this doc, so replace it with
a regular make with qcom_defconfig, as already used for other
defconfigs.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250611-qualcomm-doc-update-v1-2-5cf8cd94974d@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:51 -06:00
Luca Weiss
6746e81ba6 doc: board/qualcomm: Fix commands for compilation missing CROSS_COMPILE
One needs to set CROSS_COMPILE also for the actual compilation, not just
for the kconfig step, otherwise the host arch compiler would be used.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250611-qualcomm-doc-update-v1-1-5cf8cd94974d@fairphone.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:51 -06:00
Caleb Connolly
5df87251c2 qcom_defconfig: enable capsule update support
We can now correctly identify which partition U-Boot is flashed to
between uefi, xbl, and boot (including A/B support) so enable capsule
update support for all boards.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250411-b4-qcom-capsule-update-improvements-v2-4-27f6b2fcc4a9@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:51 -06:00
Caleb Connolly
b946a9ff1b dfu: scsi: don't call scsi_scan()
Calling scsi_scan() results in all the block devices (and EFI block
devices) being destroyed and re-created. This breaks the EFI filesystem
drivers during capsule update.

Remove the call, since boards really should be calling scsi_scan()
themselves during board_init().

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250411-b4-qcom-capsule-update-improvements-v2-3-27f6b2fcc4a9@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:51 -06:00
Caleb Connolly
fe80a5f800 mach-snapdragon: CapsuleUpdate: support all boot methods
Expand capsule update support to correctly identify which partition
U-Boot is flashed to (between xbl, uefi, and boot including A/B
variants).

Use qcom_boot_source to determine if we were chainloaded from ABL,
meaning U-Boot is on the boot partition, otherwise we assume uefi if
it's available, finally leaving the xbl partition.

Set a different fw_name based on the target partition to prevent GUID
collisions, since a board may support U-Boot flashed to boot or XBL we
need to differentiate them since the U-Boot binary must be built
differently.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250411-b4-qcom-capsule-update-improvements-v2-2-27f6b2fcc4a9@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:51 -06:00
Caleb Connolly
35cdb4676e mach-snapdragon: track boot source
Keep track of whether we were loaded via ABL or if U-Boot is running as
a first-stage bootloader.

For now we set this based on if we have a valid external FDT or not,
since it isn't possible to chainload U-Boot from ABL without there being
an external FDT.

This will be used to inform the capsule update logic which partition
U-Boot is flashed to.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250411-b4-qcom-capsule-update-improvements-v2-1-27f6b2fcc4a9@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:51 -06:00
Aswin Murugan
32f0291900 board: qualcomm: Add MAINTAINERS entries for Dragonwing platforms
Added MAINTAINERS entries for the Qualcomm Dragonwing platforms, following
the discussion in the referenced thread.
https://lore.kernel.org/u-boot/20250603192206.GK1382132@bill-the-cat/

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Acked-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Acked-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250610093732.2060702-1-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:51 -06:00
George Chan
a43ba5497f mach-snapdragon: Enhance android image handling memory footprint
In order to unzipped kernel from androidboot img, extra memory for
loadaddr is needed. So once fastboot is enabled fastboot memory also
share with loadaddr.

That can balance with memory constrain soc and android usecase.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: George Chan <gchan9527@gmail.com>
Link: https://lore.kernel.org/r/20250518-android-boot-v3-3-02c8768e131f@gmail.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:51 -06:00
George Chan
ca2a038346 mach-snapdragon: Enable workaround of ignoring androidboot addr
Enable the workaround for whole snapdragon family.

Suggested-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: George Chan <gchan9527@gmail.com>
Link: https://lore.kernel.org/r/20250518-android-boot-v3-2-02c8768e131f@gmail.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:51 -06:00
George Chan
e122850933 boot/image-android: Workaround kernel/ramdisk invalid addr
Some androidboot image have invalid kernel/ramdisk load addr,
force to ignore those value and use loadaddr instead.

There is a concern on exposing the whole memory to image loading is
dangerous. Also, since it's not always possible to change the load
addr by repacking the boot.img (mainly due to AVB signature mismatch),
we need a way to use kernel_addr_r and ramdisk_addr_r.

Suggested-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Tested-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: George Chan <gchan9527@gmail.com>
Link: https://lore.kernel.org/r/20250518-android-boot-v3-1-02c8768e131f@gmail.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:51 -06:00
Casey Connolly
482fc6a82a board: qualcomm: add a MAINTAINERS file
Add a MAINTAINERS file for assigning maintainership of a particular
Qualcomm platform or board (if board specific files exist). It is
intended to supplement the treewide ARM SNAPDRAGON maintainers with
folks who have a more specific interest.

Add an initial entry for the QCS6490 platform which powers the RB3 Gen 2 board.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250604113452.1075503-2-casey.connolly@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:51 -06:00
Aswin Murugan
caac92ad28 configs: add qcom_qcs615_defconfig
Introduce a defconfig for QCS615 based boards.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250521035324.1182833-6-aswin.murugan@oss.qualcomm.com
[casey: fix subject msg]
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:51 -06:00
Aswin Murugan
ddb3c75774 qcom_defconfig: Enable QCS615 clock driver
Enable the QCS615 clock driver in Qualcomm defconfig.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250521035324.1182833-5-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:51 -06:00
Aswin Murugan
4add840e7e clk/qcom: qcs615: Add GCC clock driver for QCS615
Port Linux's gcc-qcs615.c driver to U-Boot for basic bring-up.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250521035324.1182833-4-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:51 -06:00
Aswin Murugan
d9dd486c5b phy: qcom: Enable QMP UFS PHY driver for QCS615
Enable QMP phy for QCS615, referenced from Linux.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250521035324.1182833-3-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:49 -06:00
Aswin Murugan
abe2faf426 dts: qcs615-ride-u-boot.dtsi: Add memory entry to bootup
Added the memory entry to bootup.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250521035324.1182833-2-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:49 -06:00
Balaji Selvanathan
5afb01b2ab configs: add qcom_qcs8300_defconfig
Introduce a defconfig for QCS8300 based boards.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-7-quic_bselvana@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:49 -06:00
Balaji Selvanathan
1c6f9b4558 qcom_defconfig: Enable QCS8300 clock driver
Enable the QCS8300 clock driver in Qualcomm defconfig.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-6-quic_bselvana@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:49 -06:00
Balaji Selvanathan
b661d7c96b phy: qcom: Enable QMP UFS PHY driver for QCS8300
Enable QMP phy for QCS8300, referenced from Linux.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-5-quic_bselvana@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:23 -06:00
Balaji Selvanathan
57f232607b clk/qcom: qcs8300: Add GCC clock driver for QCS8300
* Port Linux's gcc-qcs8300.c driver to U-Boot for basic bring-up.

* Enable QCS8300 clocks in qcom_defconfig.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-4-quic_bselvana@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:03 -06:00
Balaji Selvanathan
8e29f5adcc dts: qcs8300-ride-u-boot.dtsi: Add memory entry to bootup
Added the memory entry to bootup.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-3-quic_bselvana@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:03 -06:00
Balaji Selvanathan
e71cfbbae6 doc: board: qualcomm: document Dragonwing board building/flashing
Introducing documentation support for Qualcomm Dragonwing series
boards. Documents the build and flashing steps.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250529154931.1879976-2-quic_bselvana@quicinc.com
[Casey: add dragonwing to board/qualcomm/index.rst]
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:03 -06:00
Sumit Garg
787ef52288 mach-snapdragon: of_fixup: Drop USB dr_mode override for RB1/2
The default DIP switch configuration on RB1/2 is to enable flashing
support via USB type-c port either using QDL or fastboot. It's just
cumbersome to get the host mode working in U-Boot via DIP switch toggle
when you need the flashing capability using the type-c port.

So instead lets enable fastboot in U-Boot for RB1/2 boards which is
more useful in the default board DIP switch configuration. This let's
us to drop dr_mode DT fixup.

Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250516130854.606067-1-sumit.garg@kernel.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:54:03 -06:00
Aswin Murugan
ddc527ac43 gpio: msm_gpio: return correct value for gpio read
In the current implementation, the GPIO read operation considers
both the input and outbut bits (bits 0 and 1). It should only consider
the state of input bit, i.e bit 0. To address this, mask input bit
alone and read it.

Signed-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250508113646.1462518-1-aswin.murugan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-24 07:53:33 -06:00
Alice Guo
f3ee5872bf tools: imx8image: Fix the value passed to dcd_skip of build_container()
The value passed to dcd_skip of build_container() should be obtained by
parsing .cfg file, and should not be fixed to false. For i.MX8QXP, dcd
data needs to be skipped, in which case dcd_skip should be true.

Fixes: 5f28a6599f01("tools: imx8image: add i.MX95 support")

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reported-by: Enric Balletbo i Serra <eballetb@redhat.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2025-06-24 07:50:12 -06:00
Andre Przywara
babf74be60 sunxi: H616: add support for YuzukiHD Chameleon board
The Chameleon board is an OpenHardware devboard made by YuzukiTsuru,
featuring an Allwinner H616 SoC. The form factor resembles the Raspberry
Pi Model A boards, though it differs significantly in its features.
Apart from the usual peripherals of those kind of boards (SD card, eMMC,
WiFi, HDMI), it features four USB-C 2.0 ports.

Add a defconfig for the board, the DRAM parameters have been extracted
from the firmware shipped with the board.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2025-06-24 13:44:52 +01:00
Andre Przywara
63c9c69780 arm64: dts: allwinner: h616: add YuzukiHD Chameleon support
The Chameleon board is an OpenHardware devboard made by YuzukiTsuru.
The form factor resembles the Raspberry Pi Model A boards, though it
differs significantly in its features:

  - Allwinner H618 SoC (4 * Arm Cortex-A53 cores, 1MB L2 cache, 1.4 GHz)
  - between 512MiB and 2GiB DDR3 DRAM
  - up to 128 GiB eMMC flash
  - AXP313a PMIC
  - 100 Mbit/s Ethernet pins on a header
  - XR829 WIFI+Bluetooth chip
  - 4 * USB 2.0 USB-C ports
  - microSD card slot
  - 3.5mm A/V port

Add the devicetree describing the board's peripherals and their
connections.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20250307005712.16828-16-andre.przywara@arm.com
Signed-off-by: Chen-Yu Tsai <wens@csie.org>

[ upstream commit: f4a6b0f7200f8629f4138f1094ce654ab75df41e ]

(cherry picked from commit 3a879d878553d57057ce0a7096bfbf1eb077f6dc)
2025-06-24 13:44:52 +01:00
Andre Przywara
be5038f168 sunxi: add support for Liontron H-A133L board
The Liontron H-A133L is an industrial development board based on the
Allwinner A133 SoC. It uses LPDDR4 DRAM, eMMC, and an AXP707 PMIC.

Add a defconfig with the required DRAM settings.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2025-06-24 13:44:48 +01:00
Andre Przywara
1cc93d42b2 arm64: dts: allwinner: a100: add Liontron H-A133L board support
The H-A133L board is an industrial development board made by Liontron.
It contains a number of dedicated JST connectors, to connect external
peripherals. It features:

- Allwinner A133 SoC (4 * Arm Cortex-A53 cores at up to 1.6 GHz)
- 1 GiB, 2 GiB or 4 GiB of LPDDR4 DRAM
- between 16 and 128 GiB eMMC flash
- AXP707 PMIC (compatible to AXP803)
- 100 Mbit/s RJ45 Ethernet socket, using an JLSemi JL1101 PHY
- XR829 WIFI+Bluetooth chip
- 2 * USB 2.0 USB-A ports, plus three sets of USB pins on connectors
  (connected via a USB hub connected to USB1 on the SoC)
- microSD card slot
- 3.5mm A/V port
- 12V power supply
- connectors for an LVDS or MIPI-DSI panel

Add the devicetree describing the board's peripherals and their
connections.

Despite being a devboard, the manufacturer does not publish a schematic
(I asked), so the PMIC rail assignments were bases on BSP dumps,
educated guesses and some experimentation. Dropping the always-on
property from any of the rails carrying it will make the board hang as
soon as the kernel turns off unused regulators.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://patch.msgid.link/20250505164729.18175-4-andre.przywara@arm.com
[wens@csie.org: fix property in &usbphy; fix comment typo in &usb_otg]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>

[ upstream commit: a3cd12acb7b74d9b243cd893209972fc657d0bd3 ]

(cherry picked from commit 4062957c0797752dcf8b71f99c7aa47301c70aac)
2025-06-24 01:59:10 +01:00
Andre Przywara
2b2783a1c0 arm64: dts: allwinner: a100: set maximum MMC frequency
The manual for the Allwinner A133 SoC mentions that the maximum
supported MMC frequency is 150 MHz, for all of the MMC devices.

Describe that in the DT entry, to help drivers setting the right
interface frequency.

Fixes: fcfbb8d9ec58 ("arm64: allwinner: a100: Add MMC related nodes")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Link: https://patch.msgid.link/20250505202416.23753-1-andre.przywara@arm.com
Signed-off-by: Chen-Yu Tsai <wens@csie.org>

[ upstream commit: d8f10550448b03d3c5c6d9392119205c65ebfc89 ]

(cherry picked from commit 85e37e6a8a002eb231df8209478d7ff2b134a451)
2025-06-24 01:59:09 +01:00
Andre Przywara
fb4c3b2a04 sunxi: add support for the Allwinner A100/A133 SoC
The Allwinner A100 SoC has been around for a while, mostly on cheap
tablets, but didn't generate much interest in the community so far.
There were some efforts by two Allwinner employees in 2020, which led
to basic upstream Linux support for that SoC, although this momentum
dried up pretty quickly, leaving a lot of peripherals unsupported.

The A100 was silently replaced with the seemingly identical Allwinner
A133, which is reportedly a better bin of the A100. So far we assume
that both are compatible from a software perspective. There are some
more devices with the A133 out there now, so people are working on
filling the gaps, and adding U-Boot (and TF-A) support.

Based on the just added pinctrl, clock and DRAM support, this adds the
missing bits, mostly addresses and values for the SPL.

The A133 seems to be an predecessor to the H6, so we can share a lot of
code with that (and the H616 code), and just need to adjust some details.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2025-06-24 01:59:09 +01:00
Cody Eksal
7a337270c0 sunxi: A133: add DRAM init code
This adds preliminary support for the DRAM controller in the Allwinner
A100/A133 SoCs.
This is work in progress, and has rough edges, but works on at least
three different boards. It contains support for DDR4 and LPDDR4.

Signed-off-by: Cody Eksal <masterr3c0rd@epochal.quest>
[Andre: formatting fixes, adapt to mainline, drop unused parameters,
	remove struct struct sunxi_mctl_com_reg, hardcode MR registers,
	switch to mctl_check_pattern(), remove simple DRAM check]
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2025-06-24 01:59:09 +01:00
Tom Rini
184e7d0bb2 Merge tag 'v2025.07-rc5' into next
Prepare v2025.07-rc5

With this merge, tighten up the LTO_FLAGS removal we added to not
trigger on ARMv7 (which is Thumb-2 and should be fine).
2025-06-23 16:15:23 -06:00
Tom Rini
fb4a488eb9 Prepare v2025.07-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
v2025.07-rc5
2025-06-23 14:10:06 -06:00
Jerome Forissier
410d59095a arm: kirkwood: fix freeze on boot
Commit 6fe50e3950 ("arm: asm/system.h: mrc and mcr need .arm if
__thumb2__ is not set") is not a proper fix for the LTO link error
mentioned in its description. It causes 32-bit arm instructions to be
mixed with thumb instructions, which the Kirkwood SoCs do not support.
For example, board_init_r() is mostly generated in Thumb-1 mode as
expected since the build flags contain -mthumb -mthumb-interwork. The
MCR instruction corresponding to writefr_extra_feature_reg() is also
correcly emitted as a 32-bit ARM instruction (it cannot be encoded in
Thumb-1 anyways). The problem is, the compiler inlines the MCR without
generating the BX or BLX instruction which are needed to transition
between the ARM and the Thumb-1 states. From the objdump output:

006186a0 <board_init_r>:
board_init_r():
/home/jerome/work/u-boot/common/board_r.c:799
  6186a0:       b5f0            push    {r4, r5, r6, r7, lr}
  6186a2:       b0ab            sub     sp, #172        @ 0xac
get_gd():
/home/jerome/work/u-boot/./arch/arm/include/asm/global_data.h:127
  6186a4:       464a            mov     r2, r9
...
/home/jerome/work/u-boot/arch/arm/mach-kirkwood/cpu.c:242
  619aae:       9b15            ldr     r3, [sp, #84]   @ 0x54
writefr_extra_feature_reg():
/home/jerome/work/u-boot/./arch/arm/include/asm/arch/cpu.h:100
  619ab0:       ee2f3f11        mcr     15, 1, r3, cr15, cr1, {0}
                ^^^^^^^^
                32-bit ARM instruction

Further investigation is needed to understand how to fix the issue so
that the code size is minimal for all boards. In the mean time, this
fix disables LTO for the two problematic files (common/board_f.c and
common/board_r.c). This makes the Kirkwood-based boards bootable again.
The binary size is increased by 1048 bytes which is perfectly
acceptable.

Fixes: 6fe50e3950 ("arm: asm/system.h: mrc and mcr need .arm if __thumb2__ is not set")
Reported-by: Tony Dinh <mibodhi@gmail.com>
Tested-by: Tony Dinh <mibodhi@gmail.com>
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-23 14:04:40 -06:00
Balaji Selvanathan
35811a7b0d drivers: watchdog: qcom: Add timeout configuration support in watchdog
This patch enhances the Qualcomm watchdog driver by introducing
support for dynamic timeout configuration. Specifically:

- Calculates and sets the bark and bite timeout values based on
  the clock rate and the requested timeout in milliseconds.
- Adds retrieval of the watchdog clock rate during probe using
  the common clock framework.
- Adds a default timeout value for ARCH_SNAPDRAGON
  in WATCHDOG_TIMEOUT_MSECS.

These changes improve the configurability and accuracy of the
watchdog timer on Qualcomm platforms.

This work builds upon the previous submission:
https://lore.kernel.org/all/20250422-b4-qcom-wdt-v3-1-730d4d5a858d@paulsajna.com/

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250527124926.128413-1-balaji.selvanathan@oss.qualcomm.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-23 18:50:39 +02:00
Casey Connolly
530764de9f watchdog: qcom: introduce qcom-wdt driver
Some Qualcomm device vendors decide to turn the watchdog on in the
bootloader, resulting in the device being reset if it isn't petted every
~30 seconds. Introduce a driver to keep the watchdog happy and prevent this
annoying behaviour.

Signed-off-by: Paul Sajna <hello@paulsajna.com>
Co-authored-by: Paul Sajna <hello@paulsajna.com>
Tested-by: Paul Sajna <hello@paulsajna.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250422-b4-qcom-wdt-v3-1-730d4d5a858d@paulsajna.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-23 18:50:38 +02:00
Varadarajan Narayanan
cb99e1257b configs: add qcom_ipq5424_mmc_defconfig
Introduce a defconfig for the Qualcomm IPQ5424 SoC based RDPs.
Presently supports eMMC.

Per the flash memory layout, U-Boot size cannot exceed 756KB. With this
defconfig, u-boot.mbn size is ~480KB.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-7-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-23 18:50:21 +02:00
Varadarajan Narayanan
c4aa86c04f pinctrl: qcom: Add ipq5424 pinctrl driver
Add pinctrl driver for the TLMM block found in the ipq5424 SoC.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-6-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-23 18:50:21 +02:00
Varadarajan Narayanan
d7fb15c17d clk/qcom: add initial clock driver for ipq5424
Add initial set of clocks and resets for enabling U-Boot on ipq5424
based RDP platforms.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-5-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-23 18:50:21 +02:00
Varadarajan Narayanan
c1363633c6 doc: board/qualcomm: Update RDP signing instructions
IPQ5424 expects U-Boot to have MBN version 7 header. The qtestsign tool
presently documented doesn't support v7. Hence update the instructions
to use a different tool that can support both v6 and v7.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-4-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-23 18:50:21 +02:00
Varadarajan Narayanan
9997cc261a dts: ipq5424-rdp466-u-boot: add override dtsi
Add initial support for the IPQ5424 MMC based RDP platforms.
Define memory layout statically.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250304110105.2762124-3-quic_varada@quicinc.com
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-23 18:50:21 +02:00
Tom Rini
1be8d14c85 Merge patch series "rsa and fit_check_sign build fix for v2025.07-rc"
Shiji Yang <yangshiji66@outlook.com> says:

This patchset fixes some compilation errors that I caught in version
v2025.07-rc4 and branch next. If they are acceptable, please apply
them to the master branch. If anyone has a better way to fix these
issues, it's fine to ignore this patchset.

Link: https://lore.kernel.org/r/OSBPR01MB16702ED24460D23A7ED63440BC7DA@OSBPR01MB1670.jpnprd01.prod.outlook.com
2025-06-22 10:16:43 -06:00
Shiji Yang
1989eb65c5 tools/fit_check_sign: make the module dependent on CONFIG_FIT_SIGNATURE
The function definition of fit_check_sign() is guarded by
"#ifdef CONFIG_FIT_SIGNATURE" in "tools/image-host.c". If we try
to build it without CONFIG_FIT_SIGNATURE, we will get an error:

/usr/bin/ld: tools/fit_check_sign.o: in function `main':
fit_check_sign.c:(.text.startup+0x165): undefined reference to `fit_check_sign'
collect2: error: ld returned 1 exit status

Fixes: 9c79c8fe70 ("tools/fit_check_sign: make key optional")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
2025-06-22 10:16:39 -06:00
Shiji Yang
961e260cdc lib: rsa: fix compilation error without openssl
The symbol TOOLS_IMAGE_PRE_LOAD doesn't depend on TOOLS_LIBCRYPTO.
If we choose to build tools without openssl, rsa_verify_openssl()
will attempt to call the unavailable openssl library functions.

Fixes: 942c8c8e66 ("rsa: Add rsa_verify_openssl() to use openssl for host builds")
Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
2025-06-22 10:16:39 -06:00
Baruch Siach
9d169ac973 net: designware: fix bus address dereference
Device bus address might not be valid for direct access when the bus
address and CPU address are not the same. Use dev_bus_to_phys() to
translate bus address back to CPU address.

Fixes: 3d98b8c504 ("net: designware: Invalidate RX buffer cache before freeing the DMA descriptor")
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2025-06-22 10:16:29 -06:00
Sam Protsenko
c08cecf2d7 board: samsung: e850-96: Load LDFW in board_late_init()
As stated in 5e847f7729 ("efi_loader: call efi_init_early() earlier"):

    efi_init_early() creates an event hook for block device probing.
    It has to be called before any block device is probed.

Indeed, efi_bl_init() registers EVT_DM_POST_PROBE event, which calls
efi_disk_probe() whenever any block device is probed. And to make that
hook work, the initialization of all block devices was put after
efi_init_early() in initcall_run_r():

    INITCALL(efi_init_early);
    INITCALL(initr_nand);
    INITCALL(initr_onenand);
    INITCALL(initr_mmc);

Because LDFW firmware is being read from MMC, attempt to load LDFW in
board_init() causes MMC driver to be probed. And because board_init() is
executed before efi_init_early(), the hook mentioned above won't work
for MMC devices anymore. So EFI disk objects won't be created, which in
turn makes the EFI subsystem non-functional, showing next symptoms:
  - 'efidebug dh' output is empty
  - attempt to add boot devices in 'eficonfig' shows this message:
    "No block device found!"
  - 'bootefi selftest $fdtcontroladdr' shows this warning:
    "Cannot persist EFI variables without system partition"
  - booting GRUB with 'bootefi' runs minimal GRUB shell which doesn't
    see any block devices as well, probably because EFI vars weren't
    passed

Load LDFW in board_late_init() instead, as it's called after
efi_init_early(). This fixes the described problem and makes it possible
to run EFI apps like GRUB correctly, add entries in 'eficonfig', and
makes 'efivar --list' command in Linux rootfs actually show EFI
variables.

The only user of LDFW at the moment is the TRNG driver, and it's probed
later, only when it's going to be used (e.g. on "rng" command). So it's
fine to load LDFW in board_late_init(). Now the corresponding call order
will look like this:

    efi_init_early()
    initr_mmc()
      mmc_probe()
        EVT_DM_POST_PROBE -> efi_disk_probe()
    board_late_init()
      load_ldfw() -> fs_read(), blk_dread()
    exynos_trng_probe()

Fixes: ccfd8de541 ("board: samsung: e850-96: Report LDFW loading failures")
Fixes: f04e58cc97 ("board: samsung: e850-96: Load LDFW firmware on board init")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2025-06-22 10:16:23 -06:00
Tom Rini
8420cafc00 Merge tag 'doc-2025-07-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request doc-2025-07-rc5

* in wget documentation remove erroneous note about CAs
2025-06-21 12:09:40 -06:00
Jerome Forissier
820bbf1d46 doc: cmd: wget: remove erroneous note
The note about U-Boot not being able to verify server certificates is
false now that WGET_CACERT and WGET_BUILTIN_CACERT have been added.
Remove it.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2025-06-21 19:03:42 +02:00
Tony Dinh
418acf8c78 arm: kirkwood: Maintainer for RaidSonic ICY BOX ib62x0 board
Add me as  maintainer for the RaidSonic ICY BOX ib62x0.

Signed-off-by: Tony Dinh <mibodhi@gmail.com>
2025-06-21 10:55:48 -06:00