Commit Graph

101967 Commits

Author SHA1 Message Date
Anis Chali
5451504256 pinctrl: gpio: sx150x: add Semtech SX150x I2C GPIO expander and pinctrl driver
implement a driver to use semtech pinctrl and
 gpio expander, this driver is adapted from a
 existent linux driver that is written by
 Gregory Bean <gbean@codeaurora.org>.

Signed-off-by: Anis Chali <chalianis1@gmail.com>
2025-06-03 17:18:03 -06:00
Anton Moryakov
a4fb99ce4e tools: fix handle leak in ifdtool.c
Prevent file descriptor leaks by properly closing 'fd' and 'new_fd'
when fstat() or write() operations fail.

- Added close(fd) before return in open_for_read() if fstat() fails.
- Added close(new_fd) before return in write_image() if write() fails.
- No close needed if open() fails (fd == -1 is invalid).

Signed-off-by: Anton Moryakov <ant.v.moryakov@gmail.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-06-03 17:18:02 -06:00
Tom Rini
fdc0dcbb2c Merge tag 'qcom-more-for-2025.07' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
More Qualcomm fixes for 2025.07

* Adjust fdtfile logic to support more boards
* Support linux,code variable in qcom-pmic button driver
* Minor CLK API adjustments and apq8096/msm8916 fixes
* vbus regulator register fixes
* dragonboard410c KASLR support and other fixes
2025-06-03 09:00:52 -06:00
Tom Rini
d786c6b69f Merge patch series "Audit include list for include/[a-m]*.h"
Tom Rini <trini@konsulko.com> says:

Hey all,

Related to my other series I've posted recently on cleaning up some
headers, this series here is the result of at least lightly auditing the
#includes used in include/[a-m]*.h. This ignores subdirectories, as at
least in part I think the top-level includes we've constructed are the
most likely places to have some extra transitive include paths. I'm sure
there's exceptions and I'll likely audit deeper once this first pass is
done. This only gets as far as "include/m*.h" because I didn't want this
to get too big. This also sets aside <miiphy.h> and <phy.h>. While
miiphy.h does not directly need <phy.h> there are *so* many users and I
think I had half of the tree just about not building when I first tried.
It might be worth further investigation, but it might just be OK as-is.

Link: https://lore.kernel.org/r/20250521230119.2084088-1-trini@konsulko.com
2025-06-02 17:43:56 -06:00
Tom Rini
824f8f52a1 global: Cleanup usage of "ETH_ALEN"
The value of "ETH_ALEN" is defined to 6 in <linux/if_ether.h>. This file
is included in <net.h>. In the places where we had ETH_ALEN but no
direct include of <net.h>, add <linux/if_ether.h>. In the places where
we had a custom name used, make use of ETH_ALEN instead.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:16 -06:00
Tom Rini
2266595bf8 include/mtd.h: Cleanup usage
There are only a few things found in <mtd.h> today. Go through and audit
the C files which include <mtd.h> and remove it when not required. Then,
add it to the files which had either missed it or had an indirect
inclusion of it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:16 -06:00
Tom Rini
2cf46de9b6 include/mmc.h: Audit include list
This file does not need <linux/sizes.h> nor <linux/compiler.h> so remove
them. This exposes however that a number of other files had been relying
on this implicit include for <linux/sizes.h> so add that where needed.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:16 -06:00
Tom Rini
d81b57a3cc include/ide.h: Cleanup usage
At this point in time, <ide.h> provides the IDE_BUS macro and the
function prototype for ide_set_reset, which is used with IDE_RESET. The
only files which should include this header are the ones that either use
that macro or that function. Remove <blk.h> from <ide.h> and remove
<ide.h> from places which do not need it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:16 -06:00
Tom Rini
43d76dc7df include/fat.h: Audit include list
This file does not need <asm/cache.h> so remove it. However the file
common/spl/spl_fat.c does need it, so add it there.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:15 -06:00
Tom Rini
40d5f55331 include/efi_loader.h, include/efi_tcg2.h: Audit include list
In include/efi_loader.h we do not directly need <log.h>, <part_efi.h>,
<pe.h> nor <linux/oid_registry.h> so remove them. In include/efi_tcg2.h
we make use of <part_efi.h> but did not include it, so add it directly.

Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Tested-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:15 -06:00
Tom Rini
8f3c64a535 include/dwmmc.h: Audit include list
This file does not need <asm/cache.h> so remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:15 -06:00
Tom Rini
ddf050a5d6 include/dw_hdmi.h: Audit include list
This file does not need <edid.h> so remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:15 -06:00
Tom Rini
1585d92a05 include/dfu.h: Audit include list
This file does not need a forward declaration of 'struct list_head' as
it includes <linux/list.h> so remove it.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:15 -06:00
Tom Rini
cad8e20333 include/compiler.h: Audit include list
This file does not need <time.h> so remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:15 -06:00
Tom Rini
ef560b42ec include/cbfs.h: Audit include list
This file does not need <compiler.h> but does directly need
<linux/types.h>.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:15 -06:00
Tom Rini
5d14fca77a include/cadence-nand.h: Audit include list
This file does not need <linux/mtd/mtd.h> but does directly need
<linux/types.h>.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:15 -06:00
Tom Rini
5bbc8b5c55 include/bootstd.h: Audit include list
This file does not need <linux/list.h> so remove it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:15 -06:00
Tom Rini
48703b2d6b include/bootflow.h: Audit include list
This file does not need <linux/list.h> but does directly need
<linux/types.h>.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:15 -06:00
Tom Rini
377c75f8c5 include/bios_emul.h: Audit include list
This file does not need <pc.h> but does directly need
<linux/types.h>. Furthermore, arch/x86/lib/bios.c was getting <pci.h>
via <bios_emul.h> so add it there.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:15 -06:00
Tom Rini
6a891bb78c include/arm_ffa.h: Audit include list
This file does not need <linux/printk.h> but does directly need
<linux/types.h>.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:15 -06:00
Tom Rini
a510bc2c9a include/ahci.h: Audit include list
This file does not need <pci.h> but does directly need <linux/types.h>.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 17:26:15 -06:00
Marek Vasut
52caad0d14 ARM: Align image end to 8 bytes to fit DT alignment
Align U-Boot image end to 8 bytes to make sure DT alignment requirement
is fulfilled. This fixes a possible failure in fdt_find_separate() in
case the U-Boot image is aligned to 4 Bytes and DT is appended at the
end at already 8 Byte aligned offset.

Link: https://source.denx.de/u-boot/u-boot/-/issues/30
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
2025-06-02 17:25:35 -06:00
Patrick Rudolph
d1555de5fa arm/dts/qemu-sbsa: Fix interrupt
Change the vcpumntirq in the GICv3 node from SPI to PPI.

Prevents Linux from complaining:
'[Firmware Bug]: CPU interface incapable of MMIO access'

Fixes: 6d722894fd "board: emulation: Add QEMU sbsa support"

Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
2025-06-02 14:58:46 -06:00
Tom Rini
afb3ab64cb scripts/spelling.txt: Sync script with kernel v6.15
Keep spelling.txt in sync with the version from kernel v6.15.

Reported-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Yao Zi <ziyao@disroot.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-06-02 10:26:04 -06:00
Sumit Garg
14315b73a8 mach-snapdragon: Update fdtfile logic to work for RB1 and RB2
RB1 and RB2 have three root compatibles where the last one can't be used
to decode fdtfile name (qcm* vs qrb*). So rather just rely on the first
compatible to retrieve the SoC name.

Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250505124333.12344-1-sumit.garg@kernel.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-02 18:20:40 +02:00
Alexey Minnekhanov
c92bf21e73 button: qcom-pmic: allow to specify code in devicetree
Most device vendors put "Volume Down" button onto PMIC RESIN.
But Sony is special: see
dts/upstream/src/arm64/qcom/sdm630-sony-xperia-nile.dtsi or [1].
They put "Volume Down" on PMIC GPIO 7 where others usually put
"Volume Up", and KEY_VOLUMEUP is inside &pon_resin.

Currently if you boot U-Boot on such Sony device, you end up
with 2 "Volume Down" buttons, and no "Volume Up", which makes
navigating menu problematic.

Support reading devicetree "linux,code" property and override
statically defined button code & label based on that.

[1] https://elixir.bootlin.com/linux/v6.15-rc3/source/arch/
arm64/boot/dts/qcom/sdm630-sony-xperia-nile.dtsi#L263

Signed-off-by: Alexey Minnekhanov <alexeymin@postmarketos.org>
Signed-off-by: Alexey Minnekhanov <alexeymin@minlexx.ru>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250424014811.3809818-1-alexeymin@minlexx.ru
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-02 18:20:33 +02:00
Stephan Gerhold
1079d4bf2e clk: qcom: apq8016: Fix SDCC clock warnings
As of commit dc8754e8e4 ("clk/qcom: apq8016: improve clk_enable logging")
there are now warnings in the U-Boot console on DragonBoard 410c:

  apq8016_clk_enable: unknown clk id 122
  apq8016_clk_enable: unknown clk id 123
  apq8016_clk_enable: unknown clk id 124
  apq8016_clk_enable: unknown clk id 125

This is because we don't implement enable() properly for the SDCC clocks.
Currently they are being enabled as part of set_rate().

Fix this by moving the enable calls out of the apq8016_clk_init_sdc()
function and convert them to the equivalent GATE_CLK_POLLED() definitions.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250424-apq8016-clock-fixes2-v2-6-fcc371c9e45f@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-02 18:20:16 +02:00
Stephan Gerhold
9d9bac00bc clk: qcom: apq8016: Convert GATE_CLK() to GATE_CLK_POLLED()
Convert the usages of GATE_CLK() in clock-apq8016 to GATE_CLK_POLLED() to
make sure that we poll the status when enabling clocks:

 - PRNG_AHB_CLK is a vote clock, so we poll a different register address.
 - The USB clocks are simple branches, so enable/poll is the same register.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250424-apq8016-clock-fixes2-v2-5-fcc371c9e45f@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-02 18:20:15 +02:00
Stephan Gerhold
6c049ed993 clk: qcom: Allow polling for clock status in qcom_gate_clk_en()
GATE_CLK() in its current state is unsafe: A simple write to the clock
enable register does not guarantee that the clock is immediately running.
Without polling the clock status, we may issue writes to registers before
the necessary clocks start running. This doesn't seem to cause issues in
U-Boot at the moment, but for example removing the CLK_OFF polling in TF-A
for the SMMU clocks on DB410c reliably triggers an exception during boot.

Make it possible to poll the branch clock status register, by adding a new
GATE_CLK_POLLED() macro that takes the extra register address. Existing
usages work just as before, without polling the clock status. Ideally all
usages should be updated to specify the correct poll address in the future.

The Qualcomm naming for these clocks is "branch" and not "gate", but let's
keep the existing naming for now to avoid confusion until all others
drivers have been converted.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250424-apq8016-clock-fixes2-v2-4-fcc371c9e45f@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-02 18:20:15 +02:00
Stephan Gerhold
94e57ba201 clk: qcom: Use setbits_le32() for qcom_gate_clk_en()
The other clock enable functions in clock-qcom.c use setbits_le32() to
read/modify/write the enable registers. Use the same for qcom_gate_clk_en()
to simplify the code a bit.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250424-apq8016-clock-fixes2-v2-3-fcc371c9e45f@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-02 18:20:15 +02:00
Stephan Gerhold
409da8c493 clk: qcom: Move qcom_gate_clk_en() to C file
This avoids having to inline it separately into every single clock driver,
when U-Boot is built with support for multiple SoCs.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250424-apq8016-clock-fixes2-v2-2-fcc371c9e45f@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-02 18:20:15 +02:00
Stephan Gerhold
3d9e6d42ca clk: qcom: apq8016: Fix SDCC clock addresses
The SDCC_...(n) macros in clock-apq8016.c result in the wrong addresses:

 - SDCC1: SDCC_APPS_CBCR(0) = ((0 * 0x1000) + 0x41018) = 0x41018
   Should be 0x42018, this is an invalid register close to the USB clocks.
 - SDCC2: SDCC_APPS_CBCR(1) = ((1 * 0x1000) + 0x41018) = 0x42018
   Should be 0x43018, this is the SDCC1 clock.

When we try to enable SDCC2, we actually end up enabling SDCC1. When we try
to enable SDCC1, we just issue some broken register writes.

This hasn't caused any trouble so far, because the boot firmware is keeping
both SDCC clocks running. However, if these clocks are disabled when
entering U-Boot, MMC initialization is failing.

Fix this by using the proper offset for the macros. The SDCC_CMD_RCGR() was
already correct, but change it the same way for consistency.

Fixes: 085921368b ("arm: Add support for Qualcomm Snapdragon family")
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250424-apq8016-clock-fixes2-v2-1-fcc371c9e45f@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-02 18:20:15 +02:00
Rui Miguel Silva
eb2c63ddcc power: qcom_vbus_regulator: add and fix support for pmic variants
Fix and add support for different pmic variants pm8x50b to handle
the vbus regulator.

Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org>
Link: https://lore.kernel.org/r/20250412174157.104419-1-rui.silva@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-02 18:20:00 +02:00
Stephan Gerhold
792ccccb46 board: dragonboard410c: Enable support for KASLR in Linux
When booting Linux, there is currently the following warning in the console
when using the default dragonboard410c_defconfig:

  [    0.000000] KASLR disabled due to lack of seed

Fix this by enabling DM_RNG and RNG_MSM in the defconfig to generate the
KASLR seed:

  [    0.000000] KASLR enabled

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by:
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250417-db410c-fixes2-v1-3-76ad994da152@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-02 18:19:27 +02:00
Stephan Gerhold
036b54c720 board: dragonboard410c: Drop custom reduced malloc size
At the moment, the dragonboard410c_defconfig specifies a custom
SYS_MALLOC_LEN, lower than the default for Qualcomm boards defined in
arch/arm/mach-snapdragon/Kconfig. It looks like it's too low, since
flashing larger sparse partition images using Fastboot fails with:

  FAILED (remote: 'Malloc failed for: CHUNK_TYPE_RAW')

We are not really that memory-constrained for U-Boot on DB410c, so fix
this by just dropping the custom malloc size and using the default.

Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by:
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250417-db410c-fixes2-v1-2-76ad994da152@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-02 18:19:27 +02:00
Stephan Gerhold
b28fee5cc2 board: dragonboard410c: Fix button cmd name
Commit 359e1d4a57 ("board: dragonboard410c: Use button_cmd instead of
custom code") was made in parallel with commit 8f5685d5d3 ("button:
qcom-pmic: prettify and standardise button labels"), which changed the
default button label from "vol_down" to "Volume Down". This is causing
errors in the console during boot now:

  No button labelled 'vol_down'

Fix this by using the new label.

Fixes: 359e1d4a57 ("board: dragonboard410c: Use button_cmd instead of custom code")
Fixes: 8f5685d5d3 ("button: qcom-pmic: prettify and standardise button labels")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by:
Reviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250417-db410c-fixes2-v1-1-76ad994da152@linaro.org
Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
2025-06-02 18:19:27 +02:00
Tom Rini
d45b1d4ac9 Merge tag 'u-boot-dfu-next-20250602' of https://source.denx.de/u-boot/custodians/u-boot-dfu into next
u-boot-dfu-20250602

CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/26466

Usb gadget:
dwc2: Fix incorrect ULPI_UTMI_SEL bit setting
dwc2: Fix HBstLen setting for external DMA mode
dwc2: Various refactors to get the code closer to Linux
dwc2: Support reset logic for v4.20a
2025-06-02 08:43:10 -06:00
Tom Rini
716422b3d8 Merge tag 'i2cfixes-for-2025.07-rc4' of https://source.denx.de/u-boot/custodians/u-boot-i2c
i2c bugfixes for v2025.07-rc4
- designware_i2c: fix globally wrong return value -1 into -ETIMEDOUT
  in driver, which leaded in silent errors as a timeout resulted in
  an uninitialized value being returned, potentially causing
  unexpected behavior.
2025-06-02 08:42:04 -06:00
Tom Rini
6f657c64c9 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-riscv
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/26455

Thanks Conor and Yao for catching this issue.

- Revert "RISC-V 32/64 images support" to fix compatibility issue
2025-06-02 08:40:37 -06:00
Wojciech Szamocki
ec7b49c410 i2c: designware_i2c Return -ETIMEDOUT for timeout errors
Change the return value for timeout errors in i2c-designware from 1 to
-ETIMEDOUT. Returning errors as negative values is standard practice in the
u-boot, which enhances error handling consistency across the codebase.

The current behavior can lead to silent errors when functions check for
negative return values to identify errors. For example, in
`dm_i2c_reg_read` from i2c-uclass.c, a timeout results in an uninitialized
value being returned, potentially causing unexpected behavior.

Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Wojciech Szamocki <wojciech.szamocki@nokia.com>
Signed-off-by: Wojciech Szamocki <wojciech.szamocki@nokia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2025-06-02 11:02:58 +02:00
Mayuresh Chitale
31e215fde8 Revert "riscv: image: Add new image type for RV64"
This reverts commit 14a4792a71 as
discussed in [1].

[1] https://lists.denx.de/pipermail/u-boot/2025-May/590841.html

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-06-02 16:18:33 +08:00
Mayuresh Chitale
29a2025d77 Revert "riscv: Select appropriate image type"
This reverts commit 027a316828 as
discussed in [1].

[1] https://lists.denx.de/pipermail/u-boot/2025-May/590841.html

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-06-02 16:17:55 +08:00
Mayuresh Chitale
04fcd9a56b Revert "booti/bootm: riscv: Verify image arch type"
This reverts commit 37b0b22d8b as
discussed in [1].

[1] https://lists.denx.de/pipermail/u-boot/2025-May/590841.html

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-06-02 16:17:21 +08:00
Junhui Liu
42911f61b7 usb: dwc2: Refactor register operations with clrsetbits macros
Refactor DWC2 USB gadget driver to replace manual read-modify-write
operations with `clrsetbits_le32`, `setbits_le32`, and `clrbits_le32`
macros, which simplify the code and improve readability.

Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/r/20250126-dwc2-clrsetbits-refactor-v1-1-68c27e1b6f84@pigmoral.tech
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2025-06-02 10:02:46 +02:00
Kongyang Liu
bd88148a1b usb: dwc2: Replace uint<x>_t types with u<x>
Updates all instances of uint8_t, uint16_t, and uint32_t to u8, u16, and
u32 respectively, ensuring consistent use of kernel-preferred types and
resolving checkpatch.pl warnings.

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20250110-dwc2-dev-v4-8-987f4fd6f8b2@pigmoral.tech
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2025-06-02 09:57:43 +02:00
Kongyang Liu
c5d685b899 usb: dwc2: Unify flush and reset logic with v4.20a support
This patch merges flush and reset logic for both host and gadget code
into a common set of functions, reducing duplication. It also adds support
for the updated reset logic to compatible with core version since v4.20a.

This patch mainly refers to the patch in the kernel.
link: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=65dc2e725286106f99c6f6b78e3d9c52c15f3a9c

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Link: https://lore.kernel.org/r/20250110-dwc2-dev-v4-7-987f4fd6f8b2@pigmoral.tech
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2025-06-02 09:57:43 +02:00
Kongyang Liu
24b0e2604e usb: dwc2: Extract macro definitions to common header
Some macros are shared between host and gadget code, causing duplicated
definitions. Move DWC2 macro definitions from host and gadget code into a
common header to reduce duplication.

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20250110-dwc2-dev-v4-6-987f4fd6f8b2@pigmoral.tech
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2025-06-02 09:57:25 +02:00
Kongyang Liu
6def014bba usb: dwc2: Align macros with Linux kernel definitions
Update the DWC2 macros to match those used in the Linux kernel, making
it easier to synchronize updates with kernel. Also removed some unused
macros to cleanup the code.

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Link: https://lore.kernel.org/r/20250110-dwc2-dev-v4-5-987f4fd6f8b2@pigmoral.tech
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2025-06-02 09:57:25 +02:00
Kongyang Liu
a5699130f4 usb: dwc2: Clean up with bitfield macros
Use FIELD_PREP, FIELD_GET, BIT, and GENMASK macros to standardize bit
manipulation across the DWC2 code, improving readability and
maintainability without altering functionality.

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Link: https://lore.kernel.org/r/20250110-dwc2-dev-v4-4-987f4fd6f8b2@pigmoral.tech
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2025-06-02 09:57:25 +02:00
Kongyang Liu
bd6ef5097d usb: dwc2: Fix HBstLen setting for external DMA mode
The loop used to calculate HBstLen for extern DMA mode does not produce
the correct result according to the datasheet [1]. Replacing that loop
with a direct calculation using LOG2 to correctly assign the burst length
in the GAHBCFG register for external DMA mode.

[1] https://rockchip.fr/RK312X%20TRM/chapter-26-usb-otg-2-0.pdf#page=24

Signed-off-by: Kongyang Liu <seashell11234455@gmail.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Link: https://lore.kernel.org/r/20250110-dwc2-dev-v4-3-987f4fd6f8b2@pigmoral.tech
Signed-off-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
2025-06-02 09:57:25 +02:00