Commit Graph

28176 Commits

Author SHA1 Message Date
David Lechner
ca0d2abc27 clk: mediatek: mt7981: convert CLK_XTAL to CLK_PAD_CLK40M
Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.

This will eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-5-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:03:48 -05:00
David Lechner
57a3c93336 clk: mediatek: mt7629: convert CLK_XTAL to CLK_PAD_CLK40M
Replace all uses of CLK_XTAL with CLK_PAD_CLK40M.

This will eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-4-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:03:45 -05:00
David Lechner
284025cc6e clk: mediatek: mt7623: convert CLK_XTAL to CLK_PAD_CLK26M
Replace all uses of CLK_XTAL with CLK_PAD_CLK26M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-3-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:03:40 -05:00
David Lechner
bd07ed2064 clk: mediatek: mt7622: convert CLK_XTAL to CLK_PAD_CLK25M
Replace all uses of CLK_XTAL with CLK_PAD_CLK25M.

This avoids declaring the same parent clock two different ways and will
eventually let us remove CLK_PARENT_XTAL completely.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-2-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:03:36 -05:00
David Lechner
39b6394831 clk: mediatek: replace xtal2_rate with struct mtk_parent
Replace the hard-coded xtal rate for PLL parents with struct mtk_parent.

This avoids declaring the same clock rate in multiple places and will
allow future drivers to use an arbitrary clock.

The variable is renamed to something that better indicate what the field
is actually used for.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260310-clk-mtk-parent-cleanup-v1-1-66175ca8f637@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 11:03:29 -05:00
David Lechner
6bbfa8fba5 clk: mediatek: mt8195: use ext_clock_rates
Convert the mt8195 clock driver to use ext_clock_rates.

Now that we have the ext_clock_rates feature and also mux clock parents
have been converted to struct mtk_parent, we can remove the hack of
adding "missing" topckgen clocks. Instead we can use the proper parents.

The topckgen ID map is still needed though because the upstream
dt-bindings didn't use the conventional number ordering by clock type
for these.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260309-clk-mtk-mt8188-drop-extra-top-clocks-v1-2-6ee4743a8465@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:47:15 -05:00
David Lechner
f7d48558cf clk: mediatek: mt8188: use ext_clock_rates
Convert the mt8188 clock driver to use ext_clock_rates.

Now that we have the ext_clock_rates feature and also mux clock parents
have been converted to struct mtk_parent, we can remove the hack of
adding "missing" topckgen clocks. Instead we can use the proper parents.

The topckgen ID map is still needed though because the upstream
dt-bindings didn't use the conventional number ordering by clock type
for these.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260309-clk-mtk-mt8188-drop-extra-top-clocks-v1-1-6ee4743a8465@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:47:15 -05:00
David Lechner
de935cb519 clk: mediatek: mt8365: drop topckgen map
Drop the clock ID map for MT8365 TOPCKGEN clocks.

Previously, we didn't have the EXT clock feature, so we needed the map.
Now we can replace it with the new feature to avoid the map.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260303-mtk-clk-8365-drop-map-v1-1-17f81c375290@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:47:15 -05:00
David Lechner
256499eebf clk: mediatek: refactor duplicate *_mux_get_rate()
Refactor two identical functions for getting mux clock rates. The
functions are renamed and moved to the section of the code that contains
other common functions.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-16-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
84c89c2529 clk: mediatek: remove CLK_PARENT_MIXED flag
Remove CLK_PARENT_MIXED and all dead code paths related to it.

All mux clocks have been converted to use struct mtk_parent (the
parent_flags field of the parent/parent_flags union). Use of this
struct was indicated by CLK_PARENT_MIXED. Now, this is always the case
and we can drop the flag and the union. All MUX_MIXED* macros are
change to use the equivalent MUX* macros since we no longer need to
set the flag.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-15-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
a56b24bf58 clk: mediatek: remove use of CLK_BYPASS_XTAL flag
Remove the CLK_BYPASS_XTAL flag completely.

It was a bit of a hack that was meant to handle mux clocks that had
mixed parents (e.g. XTAL and TOPCKGEN). The idea was that if you didn't
have CLK_XTAL as a parent, then you were supposed to add the
CLK_BYPASS_XTAL flag to the clock tree. There are likely a number of
drivers missing this since it is not intuitive.

In the meantime, we have introduced the CLK_PARENT_MIXED flag which
handles this more robustly. All of the affected drivers (the ones
without CLK_BYPASS_XTAL) have been updated to use CLK_PARENT_MIXED, so
the CLK_BYPASS_XTAL flag is no longer needed on other drivers.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-14-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
cc8738cadc clk: mediatek: mt8518: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-13-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
585748a716 clk: mediatek: mt8516: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-12-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
e4ade301ca clk: mediatek: mt8512: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-11-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
ec7f2425a1 clk: mediatek: mt8365: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-10-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
3c46c551fa clk: mediatek: mt8195: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-9-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
d632daabdc clk: mediatek: mt8188: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-8-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
326d9c01f8 clk: mediatek: mt8183: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-7-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
a2d600dba3 clk: mediatek: mt7988: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-6-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
1ed05de4ab clk: mediatek: mt7987: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-5-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
8fd90b148f clk: mediatek: mt7981: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-4-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
5e145c0448 clk: mediatek: mt7629: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-3-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
b3455b3986 clk: mediatek: mt7623: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-2-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
David Lechner
c4173429db clk: mediatek: mt7622: convert to struct mtk_parent
Convert all parent clock arrays to use struct mtk_parent. This will
allow us to simplify core code later by having only one possible data
type for mux parent arrays.

Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260317-clk-mtk-unify-mux-parents-v3-1-a4760f5b0a80@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-24 09:34:48 -05:00
Tom Rini
5600255dfc Merge tag 'fsl-qoriq-next-2026-03-23' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next
CI: https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq/-/pipelines/29614

- Kconfig update for SCMI_FIRMWARE
- Add SCMI pinctrl driver
2026-03-23 09:16:21 -06:00
David Lechner
9936e1083d dm: regulator: fix missing quote in error message
Fix a missing closing quote in the error message when a regulator name
is not unique.

Signed-off-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-03-23 11:28:01 +08:00
Han Xu
67fc505228 mmc: Add support for eMMC 5.1B specification
Add support for eMMC specification version 5.1B by defining
MMC_VERSION_5_1B and including it in the version array.

eMMC 5.1B (JESD84-B51B) is a minor revision of the 5.1 specification
that primarily addresses MDT (Manufacturing Date) adjustment for dates
beyond 2025. This aligns with the Linux kernel commit 9996707822f82
("mmc: core: Adjust MDT beyond 2025").

Since the manufacturing date field is not currently used in U-Boot,
this change has no functional impact beyond proper device recognition.
It allows the driver to correctly identify and initialize eMMC devices
that report version 5.1B in their Extended CSD register.

Signed-off-by: Han Xu <han.xu@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-03-23 11:27:52 +08:00
Dan Carpenter
0cb160f1b6 scmi: pinctrl: add pinctrl driver for SCMI
This driver adds the base support of pinctrl over SCMI.  The driver
does two main things.  First, it allows you to configure the initial
pin states.  Secondly, it's used a base to build a GPIO driver on
top of it.

To configure the states then add a pinmux config to the scmi_pinctrl
section:

        scmi_pinctrl: protocol@19 {
                reg = <0x19>;
                pinmux1: pinmux_test {
                        pinmux = <0 1 0xFFFFFFFF 18 1
                                  0 2 0xFFFFFFFF 18 1
                                  0 3 0xFFFFFFFF 18 1>;
                        function = "f_gpio1";
                        groups = "grp_1", "grp_3";
                };
        };

Under linux the pinctrl subsystem will parse the function and group
properties and use that to handle muxing.  However, under u-boot the
pin muxing is done using the "pinmux" property, which feeds raw SCMI
pinctrl PINCTRL_SETTINGS_CONFIGURE commands to the server.  The
numbers are: selector, identifier, function_id, config_type, and
config_value.  In the example above, it sets pins 1, 2, and 3 to 1.
The linux-kernel ignores this pinmux property.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-03-23 10:58:20 +08:00
Dan Carpenter
264cbb1871 scmi: pinctrl: add pinctrl message IDs
Add all the pinctrl message IDs.  I renamed SCMI_MSG_PINCTRL_CONFIG_SET
to SCMI_PINCTRL_SETTINGS_CONFIGURE so the naming matches the spec better.

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Linus Walleij <linusw@kernel.org>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-03-23 10:58:20 +08:00
Tom Rini
80bdc86db5 scmi: Rework SCMI_FIRMWARE implementation
As exposed by "make randconfig", how we have SCMI_FIRMWARE today is
incomplete, and in one case, used incorrectly. First, SCMI_FIRMWARE has
a build-time dependency on OF_CONTROL being enabled, so add that.
Second, RESET_SCMI depends on SCMI_FIRMWARE being enabled, it should not
select that symbol. In turn, a number of platforms need to now enable
SCMI_FIRMWARE explicitly and not rely on RESET_SCMI to enable it for
them.

Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Anshul Dalal <anshuld@ti.com>
Acked-by: Michal Simek <michal.simek@amd.com> # Versal Gen 2
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2026-03-23 10:55:01 +08:00
Tom Rini
eb00c71050 Merge patch series "bootm: Clean up arch-specific, pre-OS clean-up"
Simon Glass <sjg@chromium.org> says:

Each arch does something slightly different before booting the OS. Some
archs even do different things depending on the CPU type.

It is quite hard to know what actually happens in the final milliseconds
before the OS boot.

This series attempts to start cleaning up U-Boot in this area.

The basic intent is to create a new bootm_final() function which can be
called by all archs. It provides some flags for a couple of necessary
variations but otherwise it is generic.

All architectures are converted over to use this new function.

board_quiesce_devices() is moved into bootm_final() so that all archs
benefit from it.

This series fixes a bug in device_remove() is fixed where removing a
parent with specialised flags (e.g. DM_REMOVE_ACTIVE_ALL) could leave
children activated, since they do not match the flags. This fixes is
needed to avoid bootm_final() causing test failures on sandbox.

Future work could take this a little further:
- Convert EFI loader to use the same function
- Improve comments for cleanup_before_linux() across architectures
- Support fake-run tracing on all archs

Link: https://lore.kernel.org/r/20260306023638.2678886-1-sjg@chromium.org
2026-03-18 18:36:50 -06:00
Simon Glass
3632b5d63c dm: Remove children when parent is removed by flags
When dm_remove_devices_active() removes devices using specialised flags
like DM_REMOVE_ACTIVE_ALL, a parent device may match (e.g. MMC has
DM_FLAG_OS_PREPARE) while its children do not. This deactivates the
parent but leaves children activated, an inconsistent state.

Later, when uclass_destroy() calls device_remove() with DM_REMOVE_NORMAL
on the already-deactivated parent, it returns early without touching the
children. The subsequent device_unbind() then fails because the children
are still activated.

Fix this by dropping only the DM_REMOVE_ACTIVE_ALL requirement for child
removal when the parent is being removed. This ensures children are
removed along with their parent, while still preserving other flags like
DM_REMOVE_NON_VITAL so that vital devices remain protected.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 13:17:33 -06:00
Simon Glass
714dd2252d dm: Move flags_remove() check before child removal
Move the flags_remove() call before device_chld_remove() and save the
result in a separate variable. This is just a refactoring with no
behaviour change, preparing for the next commit which needs to know
whether the parent will be removed before deciding how to remove its
children.

Signed-off-by: Simon Glass <simon.glass@canonical.com>
2026-03-18 13:17:33 -06:00
Tom Rini
28608c8087 Merge patch series "led: remove legacy API"
Quentin Schulz <quentin.schulz@cherry.de> says:

This migrates the last user of the legacy LED API, IMX233-OLinuXino and
net/bootp.c, to the modern LED framework.

I do have concern about being able to use BOOTP in SPL? In which case, I
should probably add an additional check on CONFIG_IS_ENABLED(LED) in
addition to IS_ENABLED(CONFIG_LED_BOOT)?

I haven't tested this as I do not own an IMX233-OLinuXino, so please
give this a try if you own this device.

Then, since there's no user left of this legacy API, it is entirely
removed.

Link: https://lore.kernel.org/r/20251120-legacy-led-removal-v1-0-369d44338358@cherry.de
2026-03-18 13:13:57 -06:00
Quentin Schulz
fcbf81694c led: remove legacy API
No user of the legacy LED API anymore (except Sunxi with the PinePhone
but that is now a Sunxi-specific implementation), so let's remove
anything related.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2026-03-18 13:07:36 -06:00
Tom Rini
24db98cdf9 Merge tag 'u-boot-imx-next-20260318' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/29557

- Add support for i.MX952.
- Add support for XPI1 on imx943_evk.
2026-03-18 08:45:37 -06:00
Tom Rini
eb53af2b4a Merge tag 'mediatek-for-next-2026-03-17' of https://source.denx.de/u-boot/custodians/u-boot-mediatek into next
- A fix for mt8188 clock oscillator rates.
- New driver for mt8189 clocks.
- The rest is a first wave of a larger effort to refactor and clean up the
  mediatek clocks to replace various hacks that built up over time with
  something that is easier to understand and maintain.
2026-03-18 08:37:41 -06:00
Tom Rini
fac5bce2a1 Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/29548
- board: starfive: Add Xunlong OrangePi RV
- board: starfive: Add VisionFive 2 Lite
- board: beagle: Add BeagleV-Fire
2026-03-18 08:37:03 -06:00
David Lechner
142c805d47 clk: mediatek: set CLK_PARENT_XTAL on fixed factor clocks
Explicitly set the CLK_PARENT_XTAL flag for fixed factor clocks.

Prior to this, it was assumed that clock ID 0 was CLK_XTAL and other
IDs used a different clock tree when no parent was explicitly set.
Making the parent explicit will allow us to remove this confusing
behavior in the future.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260306-clk-mtk-remove-clk-bypass-xtal-flag-v2-8-b253b49f17b2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 17:28:43 -05:00
David Lechner
7595833599 clk: mediatek: move common PARENT macros to header
Move repeated *_PARENT() macros from chip-specific .c files to the
common mtk-clk.h file.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260306-clk-mtk-remove-clk-bypass-xtal-flag-v2-4-b253b49f17b2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 17:28:43 -05:00
David Lechner
4e184ff5a0 clk: mediatek: add MUX_GATE_MIXED macros
Add new MUX_GATE_MIXED and MUX_GATE_MIXED_FLAGS macros for mixed parent
muxes that have a gate. These will be used in a few drivers where we
already have this type of mux clocks.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260306-clk-mtk-remove-clk-bypass-xtal-flag-v2-3-b253b49f17b2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 17:28:43 -05:00
David Lechner
e40978fff3 clk: mediatek: rename CLK_DOMAIN_SCPSYS
Rename CLK_DOMAIN_SCPSYS to CLK_MUX_DOMAIN_SCPSYS to make it more clear
that this flag only applies to MUX clocks and not other clock types.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260306-clk-mtk-remove-clk-bypass-xtal-flag-v2-2-b253b49f17b2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 17:28:43 -05:00
David Lechner
f922929828 clk: mediatek: rename HAVE_RST_BAR
Rename HAVE_RST_BAR to CLK_PLL_HAVE_RST_BAR. This makes it more clear
that this flag only applies to PLL clocks. Also add a blank line between
CLK_PLL_HAVE_RST_BAR and the CLK_MUX_ macros to keep the grouping of the
flags consistent.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260306-clk-mtk-remove-clk-bypass-xtal-flag-v2-1-b253b49f17b2@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 17:28:43 -05:00
Chris Chen
4cce6acace clk: mediatek: add clock driver for MT8189
Add new clock driver for MedaiTek MT8189 and compatible SoCs.

Signed-off-by: Chris Chen <chris-qj.chen@mediatek.com>
Co-developed-by: David Lechner <dlechner@baylibre.com>
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-7-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 16:35:02 -05:00
David Lechner
9776543804 clk: mediatek: add MUX_MIXED_CLR_SET_UPD_FLAGS() macro
Add a new MUX_MIXED_CLR_SET_UPD_FLAGS() macro. This is the same as
MUX_CLR_SET_UPD_FLAGS() except that it uses the parent_flags member
of the union instead of parent.

This will be needed by the incoming mt8189 clock driver.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Reviewed-by: Macpaul Lin <macpaul.lin@mediatek.com>
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-5-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 16:34:50 -05:00
David Lechner
b6d11f69ac clk: mediatek: add CLK_PARENT_EXT
Add support for external clock parent type in MediaTek clock driver to
allow multiple external clock sources.

This is intended to eventually replace CLK_PARENT_XTAL which only allows
a single external clock source. Replacing CLK_PARENT_XTAL is not trivial
since it would required touching all chip-specific drivers. So that is
saved for another day.

Before this change, the only way to add additional external clocks was
to use a clock ID mapping and add the external clock in the fixed clocks
portion of the CLK_PARENT_TOPCKGEN clocks. After this change, such hacks
are no longer necessary and external clocks can be added in a cleaner
way.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-4-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 16:34:47 -05:00
David Lechner
d09876c4f6 clk: mediatek: add mtk_clk_id_is_* helper functions
Add helper functions to check if a clock ID corresponds to a particular
clock type (mux, gate, fdiv). This simplifies the code and makes it more
readable.

Additionally, it removes the restriction that fdivs_offs < muxes_offs <
gates_offs by making the checking more strict in some places. This will
allow future drivers to not have to define a mapping to meet this
requirement.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-3-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 16:34:44 -05:00
David Lechner
00d0ff7f81 clk: mediatek: refactor parent rate lookup functions
Refactor duplicate parent rate lookup code into a common function.

Instead of relying on rules like X is always the parent of Y, we use
the driver ops pointer to make sure we are actually getting the correct
parent clock device. This allows the same function to be called from
different clock types and will allow future chip-specific clock drivers
to not have to follow the rules as strictly.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-2-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 16:34:35 -05:00
David Lechner
5d24726581 clk: mediatek: use correct struct type for infrasys clocks
Fix the private data type struct type in a couple of infrasys clock
functions.

struct mtk_cg_priv is a superset of struct mtk_clk_priv and has the same
layout at the beginning so there was no compile errors or runtime bugs.
This could only be found by inspecting the code.

Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260303-mtk-mt8189-clocks-v4-1-ee85f8dd2f0d@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 16:34:27 -05:00
David Lechner
4f821825c8 clk: mediatek: mt8188: fix CLK_TOP_CLK{13,26}M rates
Change CLK_TOP_CLK13M rate from 130_000_000 to 13_000_000 and
CLK_TOP_CLK26M rate from 260_000_000 to 26_000_000. As the names
suggest, these clocks are 13/26 MHz, not 130/260 MHz.

Fixes: 5e9bbbdab0 ("clk: mediatek: mt8188: add missing fixed clock")
Fixes: 11f3cc4632 ("clk: mediatek: add MT8188 clock driver")
Reviewed-by: Julien Stephan <jstephan@baylibre.com>
Tested-by: Julien Stephan <jstephan@baylibre.com>
Link: https://patch.msgid.link/20260305-clk-mtk-fix-mt8188-rates-v2-1-0ce2b5212775@baylibre.com
Signed-off-by: David Lechner <dlechner@baylibre.com>
2026-03-17 16:07:09 -05:00