Commit Graph

102391 Commits

Author SHA1 Message Date
Yao Zi
fde7702c9b riscv: Add Kconfig options to distinguish Zaamo and Zalrsc
Ratified on Apr. 2024, the original RISC-V "A" extension is now split
into two separate extensions, "Zaamo" for atomic operations and "Zalrsc"
for load-reserved/store-conditional instructions.

For now, we've already seen real-world designs implement the Zalrsc
extension only[2]. As U-Boot mainly runs with only one HART, we could
easily support these designs by not using AMO instructions in the
hard-written assembly if necessary, for which this patch introduces two
new Kconfig options to indicate the availability of "Zaamo" and "Zalrsc".

Note that even with this patch, "A" extension is specified in the ISA
string passed to the compiler as long as one of "Zaamo" or "Zalrsc" is
available, since they're only recognized with a quite recent version of
GCC/Clang. The compiler usually doesn't automatically generate atomic
instructions unless the source explicitly instructs it to do so, thus
this should be safe.

Link: d94c64c63e # [1]
Link: https://lore.kernel.org/u-boot/20250729162035.209849-9-uros.stajic@htecgroup.com/ # [2]
Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-09-19 19:22:29 +08:00
Hal Feng
cb1a70a856 pcie: starfive: Remove the redundant print of probe success
The dev_err() is used incorrectly and we don't need the driver
to state probe success.

Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-09-19 19:12:19 +08:00
Heinrich Schuchardt
686b48af6d starfive: avoid NULL dereference in fdt_check_header()
If the u-boot.itb read from SD-card is invalid, fdt_check_header() may be
called with a NULL pointer.

This was observed on an StarFive VisionFive Lite when trying to revover the
board via UART.

Add a missing check in the starfive board code.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: E Shattow <e@freeshell.de>
2025-09-19 19:11:18 +08:00
Randolph Lin
409c73ef63 include: configs: andes: Remove fdt_high env variable
Remove the fdt_high environment variable, as a value of all ones
indicates using the FDT in place. This setting is incorrect for the
current board.

Signed-off-by: Randolph Lin <randolph@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-09-19 19:08:18 +08:00
Yao Zi
0d74bbfda3 dts: th1520: Switch to upstream devicetree
Imply OF_UPSTREAM in platform Kconfig option and adapt existing boards
to use the correct upstream devicetree paths.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-09-19 19:03:57 +08:00
Yao Zi
9d8a4728e1 pinctrl: th1520: Mark driver as DM_FLAG_PRE_RELOC
It's common that UARTs are bound and probed before U-Boot relocation, in
which case the UART's pincontroller and pinconfig must be probed first.
Let's apply DM_FLAG_PRE_RELOC to the driver, allow it to bind before
relocation.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-09-19 19:03:57 +08:00
Yao Zi
fbcf53680b clk: thead: th1520-ap: Mark drivers as DM_FLAG_PRE_RELOC
It's common that UARTs are bound and probed before U-Boot relocation,
in which case the clocks of UART and UART's pincontroller must be
registered first. Let's apply DM_FLAG_PRE_RELOC to the driver, allowing
it to bind before relocation.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-09-19 19:03:57 +08:00
Yao Zi
707e465cb1 configs: th1520_lpi4a: Enlarge SYS_MALLOC_F_LEN to 0x10000
For TH1520, we want clock and pinctrl drivers to bind before relocation
along with the UART which makes use of them, since upstream devicetree
specifies pinctrl properties for the UART.

This requires a large malloc pool before relocation, let's enlarge it.

Signed-off-by: Yao Zi <ziyao@disroot.org>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-09-19 19:03:57 +08:00
Jim Liu
30fbbde2cd arm: nuvoton: remove unused parameter
remove CFG_SYS_BOOTM_LEN parameter

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2025-09-18 18:10:11 -06:00
Marek Vasut
e18a0dec6e boot: Increase kernel size limit to 128 MiB on ARM64/PPC/RV
The ARM64 kernel Image size with LOCKDEP enabled is now around 80 MiB, which
makes it unbootable due to "Image too large: increase CONFIG_SYS_BOOTM_LEN".
Increase the image size limit to 128 MiB to future proof the limit.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-09-18 15:44:43 -06:00
Tom Rini
44ac43c01b Merge patch series "Add support for MediaTek MT7987/MT7988 built-in 2.5Gb ethernet PHY (v4)"
Weijie Gao <weijie.gao@mediatek.com> says:

This patch adds PHY driver for MediaTek MT7987/MT7988 built-in 2.5Gb
ethernet PHY.

[trini: Change 'tristate' Kconfig to 'bool']

Link: https://lore.kernel.org/r/cover.1757315849.git.weijie.gao@mediatek.com
2025-09-18 15:43:56 -06:00
Weijie Gao
32b4c88ff2 MAINTAINERS: update ethernet-related file list for MediaTek ARM platform
Update ethernet-related files for MediaTek ARM platform

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-09-18 15:43:05 -06:00
Weijie Gao
b4b266fc13 net: phy: Add MediaTek built-in 2.5Gb ethernet PHY driver
The MediaTek MT7987/MT7988 SoCs features a built-in 2.5Gb PHY
connected to GMAC1. The PHY supports 10/100/1000/2500 Mbps
full-duplex only.

The PHY requires one or two firmware files. Firmware for MT7988 has
already been added to upstream: mediatek/mt7988/i2p5ge-phy-pmb.bin.
MT7987 has two firmware files which will be add to upstream later:
i2p5ge-phy-pmb.bin and i2p5ge-phy-DSPBitTb.bin.

Environment variable can be set for firmware data loading:
mt7987_i2p5ge_load_pmb_firmware for i2p5ge-phy-pmb.bin
mt7987_i2p5ge_load_dspbit_firmware for i2p5ge-phy-DSPBitTb.bin
mt7988_i2p5ge_load_pmb_firmware for i2p5ge-phy-pmb.bin

This driver allows dedicated weak functions to be overridden by
board to provide the firmware data:
mt7987_i2p5ge_get_fw() for MT7987
mt7988_i2p5ge_get_fw() for MT7988

To enable the PHY, add the following not to device tree:
&eth1 {
	status = "okay";
	phy-mode = "xgmii";
	phy-handle = <&phy15>;

	phy15: ethernet-phy@15 {
		compatible = "ethernet-phy-ieee802.3-c45";
		reg = <15>;
		phy-mode = "xgmii";
	};
};

Signed-off-by: Sky Huang <SkyLake.Huang@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-09-18 15:43:05 -06:00
Weijie Gao
465d76a038 net: mediatek: associate PHY device with dts node specified by phy-handle
Associate PHY device with its device node specified by phy-handle
property. This makes it possible for PHY drivers to read dedicated
information to configure the PHY device.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-09-18 15:43:05 -06:00
Weijie Gao
5b1d3d83d6 misc: fs_loader: allow using long script name in request_firmware_into_buf_via_script()
Use cmd_process() to remove the length limit of script name used for
run_command().

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-09-18 15:43:05 -06:00
Weijie Gao
6358568968 misc: fs_loader: allow returning actual firmware data size in request_firmware_into_buf_via_script()
It's important to return the actual firmware data size as some
firmware files may have no checksum and need the size as the only
way for firmware validation check.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-09-18 15:43:05 -06:00
Patrice Chotard
b8edd54d60 ARM: dts: Add flash0 partitions for stm32mp257f-ev1-u-boot
Add flash0 partitions for stm32mp257f-ev1-u-boot.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-09-18 17:20:39 +02:00
Patrice Chotard
df80866312 configs: stm32mp25: Enable configs flags related to SPI flashes.
Enable configs flags related to SPI flashes.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-09-18 17:20:39 +02:00
Patrice Chotard
01eb0a5838 spi: Add STM32MP2 Octo-SPI driver support
Add STM32 OSPI driver, it supports :
  - support sNOR / sNAND devices.
  - Two functional modes: indirect (read/write) and memory-mapped (read).
  - Single-, dual-, quad-, and octal-SPI communication.
  - Single data rate (SDR).

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-09-18 17:20:39 +02:00
Patrice Chotard
b7328e2f39 memory: Add STM32 Octo Memory Manager driver
Octo Memory Manager driver (OMM) manages:
  - the muxing between 2 OSPI busses and 2 output ports.
    There are 4 possible muxing configurations:
      - direct mode (no multiplexing): OSPI1 output is on port 1 and OSPI2
        output is on port 2
      - OSPI1 and OSPI2 are multiplexed over the same output port 1
      - swapped mode (no multiplexing), OSPI1 output is on port 2,
        OSPI2 output is on port 1
      - OSPI1 and OSPI2 are multiplexed over the same output port 2
  - the split of the memory area shared between the 2 OSPI instances.
  - chip select selection override.
  - the time between 2 transactions in multiplexed mode.
  - check firewall access.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-09-18 17:20:39 +02:00
Patrice Chotard
08ccc1f56c ioport: Add resource check helpers
Add resource_overlaps() and resource_contains() helpers.
Code copied from kernel source.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-09-18 17:20:39 +02:00
Gatien Chevallier
0b5ae33eb3 ARM: stm32mp: replace RIFSC check access APIs
Replace RIFSC check access APIs by grant/release access ones that handle
the RIF semaphores.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-09-18 17:20:34 +02:00
Gatien Chevallier
bb947665f5 ARM: stm32mp: fix RIFSC semaphores acquisition
Fix RIFSC semaphores acquisition by not returning an error when the
current CID already possess the semaphore. Also fix an incorrect mask
for the CID value in the SEMCR register.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-09-18 17:20:30 +02:00
Tom Rini
f28891d444 Merge patch series "board: dhelectronics: Check pointer before access in dh_get_value_from_eeprom_buffer()"
This series from Marek Vasut <marek.vasut@mailbox.org> cleans up some of
the common code between dhelectronics platforms.

Link: https://lore.kernel.org/r/20250907010103.667681-1-marek.vasut@mailbox.org
2025-09-17 09:06:53 -06:00
Marek Vasut
7cd9d2db26 board: dhelectronics: Use isascii() before isprint() in dh_read_eeprom_id_page()
The isprint() checks printability across all 256 characters, some of the
upper 128 characters are printable and produce artifacts on UART. Call
isascii() first to only consider the bottom 7bit ASCII characters as
printable, and then check their printability using isprint(). This fixes
a rare misprint in case the ID page content is uninitialized or corrupted.

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
2025-09-17 09:06:37 -06:00
Marek Vasut
5634cf1afc board: dhelectronics: Check pointer before access in dh_get_value_from_eeprom_buffer()
The eip pointer in dh_get_value_from_eeprom_buffer() might be NULL.
The current NULL pointer check happens too late, after the eip was
accessed in variable assignment. Reorder the two, so the NULL pointer
check happens first, and any access second, otherwise the access may
trigger a hang or other undefined behavior.

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
2025-09-17 09:06:37 -06:00
Tom Rini
eea731b50c Merge tag 'u-boot-imx-master-20250917' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/27660

- Restore the support for the i.MX95 A0 silicon.
2025-09-17 07:54:06 -06:00
Tom Rini
a3ec093512 Merge patch series "Hyperflash boot fixes for j721e/j7200"
Anurag Dutta <a-dutta@ti.com> says:

This series introdues a couple of small fixes that involves
enabling hyperflash at R5 SPL and u-boot proper stage and
Kconfig changes that are required for HBMC boot on j721e/j7200

Test logs:
https://gist.github.com/anuragdutta731/0f56e8d9bdf0cfe3d221c69d09a58704

Link: https://lore.kernel.org/r/20250917094659.3922343-1-a-dutta@ti.com
2025-09-17 07:52:31 -06:00
Anurag Dutta
6d4320d761 arm: dts: k3-j721e-r5-common-proc-board: Enable HBMC in R5 SPL stage
Enable HBMC in the R5 SPL stage

Fixes: c9df79ee64 ("arm: dts: k3-j721e-r5-common: Add HBMC overrides for R5 SPL")
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2025-09-17 07:51:32 -06:00
Anurag Dutta
517744041f configs: j7200_evm_*_defconfig: Enable HBMC and MUX_MMIO at SPL
Add the HBMC and MUX_MMIO configs in the SPL and u-boot proper
stage for successful HBMC boot.

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
2025-09-17 07:51:32 -06:00
Anurag Dutta
96cbe36c0b configs: j721e_evm_r5: Enable HBMC and MUX_MMIO at SPL
Add the HBMC and MUX_MMIO configs in the R5 SPL stage for
successful HBMC boot.

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2025-09-17 07:51:32 -06:00
Anurag Dutta
dd4039e380 mtd: Kconfig: Add SPL_MUX_MMIO dependency to HBMC driver
MUX_MMIO is needed by HBMC in SPL stage. Enable it at SPL as well
as u-boot proper stage.

Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2025-09-17 07:51:32 -06:00
Michal Simek
5b35aa9da1 xilinx: Disable SPL_OS_BOOT for Zynq and ZynqMP
The commit 210702ae6c ("spl: spi: fix falcon mode for spi boot") fixed
the logic of spl_start_uboot() where 0 means OS boot and 1 means u-boot.
Zynq/ZynqMP enable OS_BOOT by default but it was never really be used
that's why disable it to boot via U-Boot phase all the time.

Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-09-17 07:50:05 -06:00
Tom Rini
097ef53d63 Merge tag 'u-boot-stm32-20250917' of https://source.denx.de/u-boot/custodians/u-boot-stm
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/27648

- Fix net suport for STM32MP2
- Fix to prevent hang in clk-stm32-core for STM32MP13
- Fix ethernet init for DH STM32MP1
2025-09-17 07:49:15 -06:00
Anurag Dutta
f6d5bda0e3 board: ti: am57xx: Remove "ti/omap/" from name_fit_config
Commit 649f4a7d3c ("board: ti: am57xx: Set fdtfile from C code
instead of findfdt script") prepends "ti/omap/" to the actual name
of the fdtfile whereas fit image boot needs exact dtb name. So, remove
"ti/omap" from name_fit_config by substituting it with an empty string.

Fixes: 649f4a7d3c ("board: ti: am57xx: Set fdtfile from C code instead of findfdt script")
Signed-off-by: Anurag Dutta <a-dutta@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2025-09-17 07:48:52 -06:00
Alice Guo
b3bbbf5fee imx95_evk: Restore support for i.MX95 A0 silicon
This patch is used to restore support for i.MX95 A0 silicon. To avoid
duplicating defconfig, imx95.config is added and can be shared between
imx95_a0_19x19_evk_defconfig and imx95_19x19_evk_defconfig.

container.cfg and imximage.cfg are used to created .cfgout files that
are be passed to mkimage with -n to build flash.bin. Now they have been
deleted and replaced by adding their content to properties of node which
type is nxp-imx9image under binman node.

Fixes: 9936724aa9 ("imx95_evk: Add i.MX95 B0 support")

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Tested-By: Tim Harvey <tharvey@gateworks.com> # imx95-19x19-evk (rA0)
2025-09-17 08:16:05 -03:00
Alice Guo
5c389e6190 binman: add a new entry type to support .bin file generation for the i.MX95 platform
To support passing specific commands defined in enum imx8image_cmd to
the imx8image_copy_image() function, this patch introduces a new entry
type nxp-imx9image. This entry generates a plain text data file
containing the relevant commands, enabling flexible configuration during
image creation.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
2025-09-17 08:16:04 -03:00
Tom Rini
a209627ed7 Merge patch series "board: dhelectronics: Check pointer before access in dh_get_value_from_eeprom_buffer()"
This series from Marek Vasut <marek.vasut@mailbox.org> cleans up some of
the common code between dhelectronics platforms.

Link: https://lore.kernel.org/r/20250907010103.667681-1-marek.vasut@mailbox.org
2025-09-16 16:14:30 -06:00
Marek Vasut
fd39631643 board: dhelectronics: Use isascii() before isprint() in dh_read_eeprom_id_page()
The isprint() checks printability across all 256 characters, some of the
upper 128 characters are printable and produce artifacts on UART. Call
isascii() first to only consider the bottom 7bit ASCII characters as
printable, and then check their printability using isprint(). This fixes
a rare misprint in case the ID page content is uninitialized or corrupted.

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
2025-09-16 16:14:18 -06:00
Marek Vasut
1c735620e1 board: dhelectronics: Check pointer before access in dh_get_value_from_eeprom_buffer()
The eip pointer in dh_get_value_from_eeprom_buffer() might be NULL.
The current NULL pointer check happens too late, after the eip was
accessed in variable assignment. Reorder the two, so the NULL pointer
check happens first, and any access second, otherwise the access may
trigger a hang or other undefined behavior.

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
2025-09-16 16:14:18 -06:00
Marek Vasut
c6a4b44cdc phy: Reset init count on phy exit failure
In case the PHY exit callback reports failure, reset init_count to 0 anyway,
so the next attempt at PHY initialization might try to reinitialize the PHY
and restore it to normal operation.

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2025-09-16 16:14:03 -06:00
Marek Vasut
27fc6a67a4 thermal: sandbox: Staticize sandbox_thermal_get_temp()
Make sandbox_thermal_get_temp() static, since this is not called
outside of the driver. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-09-16 16:13:05 -06:00
Marek Vasut
7be74f63f7 thermal: Sort the Makefile
Sort the Makefile alphabetically. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-09-16 16:12:54 -06:00
Tom Rini
ab11aca3a1 Merge patch series "Modernize U-Boot code formatting with clang-format"
Javier Tia <javier.tia@linaro.org> says:

This patch series modernizes U-Boot's code formatting infrastructure by
with current Linux kernel practices and providing a more robust and
comprehensive formatting solution.

Link: https://lore.kernel.org/r/20250905205349.127333-1-javier.tia@linaro.org
2025-09-16 13:45:08 -06:00
Javier Tia
a9d997685a doc: Update U-Boot coding style guide with clang-format usage
The U-Boot coding style guide has been updated to include information
about using the `.clang-format` configuration file for automatic code
formatting. This ensures consistent formatting across the entire
codebase and aligns with Linux kernel coding standards. The goal with
introducing a predefined coding style is consistency rather than
personal preference.

The .clang-format file is copied directly from the Linux kernel without
any modifications, ensuring complete compatibility with kernel coding
standards.

Include comprehensive best practices for using clang-format,
specifically guidance on formatting only changed blocks versus entire
files, creating separate formatting-only commits for better code review,
and leveraging git clang-format for targeted formatting. Add examples of
editor integrations. This enhancement will help maintainers and
contributors to easily adhere to U-Boot coding standards.

Signed-off-by: Javier Tia <javier.tia@linaro.org>
2025-09-16 13:45:00 -06:00
Javier Tia
1b5a8ff3fd Lindent: Remove wrapper around indent tool
The Linux kernel has not maintained the same script since 2017-11-01,
and with clang-format included in U-Boot, it is not required anymore.

Signed-off-by: Javier Tia <javier.tia@linaro.org>
2025-09-16 13:45:00 -06:00
Javier Tia
aa711ac815 tools: zynqmp_psu_init_minimize.sh: Switch to clang-format
Replace the use of scripts/Lindent with clang-format in
zynqmp_psu_init_minimize.sh. This change is made to align with the rest
of the codebase that uses clang-format for code formatting. This ensures
consistency across all scripts in terms of code style and formatting.

Tested-by: Michal Simek <michal.simek@amd.com>
Signed-off-by: Javier Tia <javier.tia@linaro.org>
2025-09-16 13:45:00 -06:00
Javier Tia
29f6db89ad clang-format: Add configuration file
Introduce .clang-format configuration file to U-Boot, providing
significant improvements over the existing scripts/Lindent approach for
C code formatting.

Benefits of clang-format over scripts/Lindent:

- More comprehensive formatting rules: While Lindent relies on the basic
  'indent' tool with limited options, clang-format provides extensive
  control over code formatting with 800+ configuration options

- Better handling of complex code structures: clang-format understands
  modern C constructs and handles nested structures, macros, and complex
  expressions more intelligently

- IDE and editor integration: Native support in major development
  environments (VS Code, Vim, Emacs, etc.) enables real-time formatting

- Consistent results across environments: Eliminates variations between
  different versions of 'indent' tool and system configurations

- Active maintenance: clang-format is actively developed and updated,
  unlike the aging 'indent' tool

Alignment with Linux kernel practices:

Continues U-Boot alignment with Linux kernel development practices,
maintaining consistency between these closely related projects. The
Linux kernel adopted clang-format to modernize its code formatting
infrastructure and improve developer experience.

The .clang-format file is based on the Linux kernel configuration,
specifically copied from Linux kernel v6.16 tag, which itself builds
upon the initial introduction in commit d4ef8d3ff005c ("clang-format:
add configuration file").

Signed-off-by: Javier Tia <javier.tia@linaro.org>
2025-09-16 13:45:00 -06:00
Tom Rini
84b4ad629f Merge patch series "Fix ADI driver header dependencies"
Greg Malysa <malysagreg@gmail.com> says:

Between 2025.07 and 2025.10 many header dependency chains were improved,
but this exposed implicit header usage in several of our drivers. This
wasn't discovered before or included in the original fixes because our
drivers are not yet used by any mainline-supported boards, so build
tests did not find them. This series addresses the two build failures
I've encountered while rebasing our work onto 2025.10 and continuing to
prepare the next submission of our board files.

Link: https://lore.kernel.org/r/20250903234205.26787-1-malysagreg@gmail.com
2025-09-16 13:44:39 -06:00
Greg Malysa
2941e4c047 mmc: adi_sdhci: Update headers
As part of the header dependency cleanup between 2025.07 and 2025.10, an
implicit route to obtain SZ_128M from linux/sizes.h was removed. This
adds an explicit reference to linux/sizes.h to fix build failures for
this driver.

Signed-off-by: Greg Malysa <malysagreg@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-09-16 13:44:07 -06:00