Commit Graph

91767 Commits

Author SHA1 Message Date
Quentin Schulz
fff2b0a9ec rockchip: puma-rk3399: MAINTAINERS: use glob for dtses
There are multiple Device Trees in U-Boot git repo for Puma, so let's
make the MAINTAINERS entry match them all.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:15:52 +08:00
Quentin Schulz
642ee26bc8 board: rockchip: add Theobroma-Systems RK3588 Jaguar SBC
JAGUAR is a Single-Board Computer (SBC) based around the rk3588 SoC and
is targeting Autonomous Mobile Robots (AMR).

It features:
 * LPDDR4X (up to 16GB)
 * 1Gbps Ethernet on RJ45 connector (KSZ9031 or KSZ9131)
 * PCIe 3.0 4-lane on M.2 M-key connector
 * PCIe 2.1 1-lane on M.2 E-key
 * USB 2.0 on M.2 E-key
 * 2x USB3 OTG type-c ports with DP Alt-Mode
 * USB2 host port
 * HDMI output
 * 2x camera connectors, each exposing:
   * 2-lane MIPI-CSI
   * 1v2, 1v8, 2v8 power rails
   * I2C bus
   * GPIOs
 * PPS input
 * CAN
 * RS485 UART
 * FAN connector
 * SD card slot
 * eMMC (up to 256GB)
 * RTC backup battery
 * Companion microcontroller
   * ISL1208 RTC emulation
   * AMC6821 PWM emulation
   * On/off buzzer control
 * Secure Element
 * 80-pin Mezzanine connector for daughterboards:
   * GPIOs
   * 1Gbps Ethernet
   * PCIe 2.1 1-lane
   * 2x 2-lane MIPI-CSI
   * ADC channel
   * I2C bus
   * PWM
   * UART
   * SPI
   * SDIO
   * CAN
   * I2S
   * 1v8, 3v3, 5v0, dc-in (12-24V) power rails

The Device Tree comes from next-20240110 Linux kernel.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:15:52 +08:00
Quentin Schulz
70f9212d61 rockchip: rk3588: bind MMC controllers in U-Boot proper pre-reloc
Since commit 9e644284ab ("dm: core: Report bootph-pre-ram/sram node as
pre-reloc after relocation"), bootph-pre-ram doesn't make U-Boot proper
bind the device before relocation.

While this is usually not much of an issue, it is when there's a lookup
for devices by code running before the relocation. Such is the case of
env_init() which calls env_driver_lookup() which calls
env_get_location() which is a weak symbol and may call
arch_env_get_location() also a weak symbol. Those are two functions that
may traverse UCLASS to find some devices (e.g.
board/theobroma-systems/common/common.c:arch_env_get_location()).

This allows something in the env_init() call stack to be able to use
uclasses for SD and eMMC controller on RK3588S/RK3588. This aligns the
behavior with what seems to be all SoCs except RK356x family.

Additionally, if any other env function (e.g. env_load) were to be used
before relocation, this is also required as otherwise it wouldn't be
able to find the MMC device(s).

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:15:52 +08:00
Quentin Schulz
9f5df9a3ef rockchip: include asm/io.h directly in asm/arch-rockchip/hardware.h
The different macros use writel which is defined in asm/io.h, so let's
include the header so users of hardware.h do not need to include
asm/io.h as well.

While at it, remove asm/io.h includes wherever
asm/arch-rockchip/hardware.h is included already.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:15:52 +08:00
Quentin Schulz
eda2c8736e rockchip: migrate hardware.h inclusion into appropriate files
hardware.h is only defining macros which are "wrappers" around writel().

writel() is however not available in hardware.h, <asm/io.h> needs to be
included. This means in order to use the wrappers in hardware.h, one
also needs to include the <asm/io.h> header.

However, this cannot be done currently because hardware.h is included in
include/configs files, which are implicitly included by every code file
by default, which makes the compilation of arch/arm/cpu/armv8/u-boot.lds
fail because ALIGN (the ARM assembly directive) got redefined by some
of the include files coming from <asm.io.h>.

Because nothing in the include/configs file actually use hardware.h,
let's remove the inclusion of hardware.h from the include/configs files
and explicitly add it wherever it is required.

This prepares for the next commit where <asm/io.h> will be included in
hardware.h.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:14:19 +08:00
Quentin Schulz
8ed8517d9e rockchip: rk3588: add constants for some register address spaces
It's one thing to have the register mapped via a well-defined struct but
it's another to be able to make use of it. For that to happen, one needs
to cast the physical address memory of the beginning of the register
address space with the struct. Since this cannot change, let's hardcode
it in the include files so that users do not need to duplicate this line
of code in their own implementation.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:14:19 +08:00
Quentin Schulz
5d710738bb rockchip: rk3588: disable force_jtag by default
Rockchip SoCs can automatically switch between jtag and sdmmc based on
the following rules:
- all the SDMMC pins including SDMMC_DET set as SDMMC function in GRF,
- force_jtag bit in GRF is 1,
- SDMMC_DET is low (no card detected),

Note that the BootROM may mux all SDMMC pins in their SDMMC function or
not, depending on the boot medium that were tried.

Because SDMMC_DET pin is not guaranteed to be used as an SD card card
detect pin, it could be low at boot or even switch at runtime, which
would enable the jtag function and render the SD card unusable.

This is the case for RK3588 Jaguar for example which has an SD card
connector without an SD card card detect signal and has SDMMC_DET
connected to ground.

Because enabling JTAG at runtime could be a security issue and also to
make sure that we have a consistent behavior on all boards by default,
let's disable this force_jtag feature.

However, let's make it easy to reenable it for debugging purposes by
hiding it behind a Kconfig symbol.

Note that soc_con[0] is reserved. But considering that it's way more
user-friendly to access soc_con1 from the TRM with soc_con[1] than
soc_con[0], and that soc_con0 would actually be located at 4 bytes
before soc_con1, let's just make soc_con0 part of the soc_con array.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-03-13 18:14:19 +08:00
Quentin Schulz
74029381cc rockchip: transform rockchip_capsule_update_board_setup into a weak function symbol
There's only one user of rockchip_capsule_update_board_setup, which is
in board.c, and only one board defines it, so instead of having a header
only for one function symbol, let's just use a weak symbol instead.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:14:19 +08:00
Quentin Schulz
08d61f8705 rockchip: merge misc.c into board.c
The functions aren't used anywhere else than in board.c, therefore,
let's not expose them anymore at all.

This merges misc.c and board.c together and removes the functions from
the misc.h header file.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:14:19 +08:00
Quentin Schulz
80cc4bec00 rockchip: theobroma-systems: ringneck: migrate to rockchip_early_misc_init_r
Only setup_boottargets differs from the original misc_init_r from
Rockchip mach code, so let's use rockchip_early_misc_init_r instead of
reimplementing the whole misc_init_r from Rockchip.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:14:19 +08:00
Quentin Schulz
1624d1ecd5 rockchip: theobroma-systems: puma: migrate to rockchip_early_misc_init_r
Only setup_iodomain() and setup_boottargets differ from the original
misc_init_r from Rockchip mach code, so let's use
rockchip_early_misc_init_r instead of reimplementing the whole
misc_init_r from Rockchip.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:14:19 +08:00
Quentin Schulz
7672355fe0 rockchip: pine64: rockpro64: migrate to rockchip_early_misc_init_r
Only setup_iodomain() differs from the original misc_init_r from
Rockchip mach code, so let's use rockchip_early_misc_init_r instead of
reimplementing the whole misc_init_r from Rockchip.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:14:19 +08:00
Quentin Schulz
0312072a5d rockchip: pine64: pinephone-pro: migrate to rockchip_early_misc_init_r
Compared to the original misc_init_r from Rockchip mach code,
setup_iodomain() is added and rockchip_setup_macaddr() is not called.

It is assumed adding rockchip_setup_macaddr() back is fine.
Let's use rockchip_early_misc_init_r instead of reimplementing the whole
misc_init_r from Rockchip (the side effect being that
rockchip_setup_macaddr() is back).

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:14:19 +08:00
Quentin Schulz
f4e626dda8 rockchip: pine64: pinebook-pro: migrate to rockchip_early_misc_init_r
Compared to the original misc_init_r from Rockchip mach code,
setup_iodomain() is added and rockchip_setup_macaddr() is not called.

It is assumed adding rockchip_setup_macaddr() back is fine.
Let's use rockchip_early_misc_init_r instead of reimplementing the whole
misc_init_r from Rockchip (the side effect being that
rockchip_setup_macaddr() is back).

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:14:19 +08:00
Quentin Schulz
d79a9ef4f7 rockchip: google: gru: migrate to rockchip_early_misc_init_r
Only setup_iodomain() differs from the original misc_init_r from
Rockchip mach code, so let's use rockchip_early_misc_init_r instead of
reimplementing the whole misc_init_r from Rockchip.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:14:19 +08:00
Quentin Schulz
7400ed6a1f rockchip: add weak function symbol called at the beginning of misc_init_r
Most Rockchip boards who override misc_init_r do it only to call another
function and keep the rest unchanged. Therefore to allow for less
duplication, let's just add a weak function symbol that is called inside
misc_init_r.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:14:19 +08:00
Quentin Schulz
2871dee833 rockchip: avoid out-of-bounds when computing cpuid
The expected length of the cpuid, as passed with cpuid_length,
determines the size of cpuid_str string. Therefore, care should be taken
to make sure nothing is accessing data out-of-bounds.

Instead of using hardcoded values, derive them from cpuid_length.

Cc: Quentin Schulz <foss+uboot@0leil.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-03-13 18:14:19 +08:00
Tom Rini
20a0ce574d Merge tag 'v2024.04-rc4' into next
Prepare v2024.04-rc4
2024-03-11 15:27:20 -04:00
Tom Rini
f3c979dd00 Prepare v2024.04-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
v2024.04-rc4
2024-03-11 13:11:46 -04:00
Tom Rini
da07a629e1 Merge tag 'u-boot-imx-master-20240311' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
- Use TF-A on imx8mp_beacon to fix boot regression.
- Use latest 6.8 dts for imx8mp_beacon.
- Fix the RAM initialization for phycore_imx8mp PCL-070 rev 1.
- Describe the 0087 i.mx8m mini product variant in tdx-cfg-block.
2024-03-11 09:22:44 -04:00
Tom Rini
b8ed8b1376 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-03-11 09:10:24 -04:00
Adam Ford
4484c7b3c3 arm: dts: imx8mp-beacon-kit: Resync DTS with Linux 6.8
The device tree has evolved over time, so re-sync.  This also
partial reverts one change on the PCIe, because U-Boot doesn't
have a proper driver.  However, since the clock is configured
to generate a 100MHz reference clock by default, a proper driver
isn't really necessary.

Signed-off-by: Adam Ford <aford173@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2024-03-11 08:43:42 -03:00
Joao Paulo Goncalves
12d3257fa2 toradex: tdx-cfg-block: add 0087 i.mx8m mini product variant
Add new product id 0087 Verdin iMX8M Mini Quad 2GB IT.

Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>
2024-03-11 08:43:27 -03:00
Adam Ford
383d4b130c configs: imx8mp_beacon: Fall back to using TF-A
When the board was originally added, it enabled some features which
allowed it to bypass Trusted Firmware, but as the feature set of
Linux grew and more features became available, the U-Boot config
options which bypassed TF-A caused issues, so it needs to return
to the standard operating mode of using TF-A or the system no
longer boots.

Fixes: ab53bd43db ("arm64: imx: Add support for imx8mp-beacon-kit")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2024-03-11 08:43:08 -03:00
Benjamin Hahn
76832300a9 board: phycore_imx8mp: Use 2GHz RAM timings for PCL-070 from pcb_rev 1
We need to differ between PCL-070 and PCM-070. PCL-070 supports 2GHz RAM
timings from pcb rev 1 or newer. PCM-070 supports 2GHz RAM timings from
pcb rev 3 or newer.

Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-03-11 08:42:44 -03:00
Benjamin Hahn
110d321a56 board: phytec: common: phytec_som_detection: Add phytec_get_som_type
Add a function that gets the som_type from the EEPROM.
Add an enum for the som_type.

Signed-off-by: Benjamin Hahn <B.Hahn@phytec.de>
2024-03-11 08:42:44 -03:00
Tom Rini
0981f8900f Merge https://source.denx.de/u-boot/custodians/u-boot-usb
- Singular quirk DT property rename.
2024-03-09 11:29:48 -05:00
Marek Vasut
91e70367a5 net: phy: Use PHY MDIO address from DT if available
In case the PHY is fully described in DT, use PHY MDIO address
from DT directly instead of always using auto-detection. This
also fixes the behavior of 'mdio list' in such DT setup, which
now prints the PHY connected to the MAC correctly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2024-03-09 10:58:48 -05:00
Tom Rini
beedf675b3 Merge branch '2024-03-07-assorted-fixes' into next
- Add phytec am64x platform, update am65-cpsw and a few other assorted
  fixes.
2024-03-07 11:56:35 -05:00
Igor Opaniuk
6ec3f92089 cmd: md5sum: use hash_command
Drop old implementation and use hash_command() instead, as
how it's currently done for crc32 and sha1sum cmds.

Test:
=> md5sum 0x60000000 0x200
md5 for 60000000 ... 600001ff ==> e6bbbe95f5b41996f4a9b9af7bbd4050

Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
2024-03-07 09:23:10 -05:00
Maks Mishin
606867c849 autoboot: Add check for result of malloc_cache_aligned()
Return value of a function 'malloc_cache_aligned'
is dereferenced at autoboot.c:207 without checking for NULL,
but it is usually checked for this function.

Found by RASU JSC.

Signed-off-by: Maks Mishin <maks.mishinFZ@gmail.com>
2024-03-07 07:59:17 -05:00
Yang Xiwen
91febe80c9 serial: pl01x: set baudrate when probing
It is found that when DM is enabled, only generic init function is
called in .probe(). Baudrate is never honored. Add a function call
to .setbrg() when probing so that we can update the baudrate of the
serial device.

Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
2024-03-07 07:59:16 -05:00
Roger Quadros
be2eb3ad8f net: am65-cpsw: cpsw_mdio: Switch to proper DM_MDIO framework
Add a new Kconfig symbol MDIO_TI_CPSW for the CPSW MDIO
driver and build it with proper DM support if enabled.

If MDIO_TI_CPSW is not enabled then we continue to
behave like before.

Clean up MDIO custom handling in am65-cpsw and use
dm_eth_phy_connect() to get the PHY.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Tested-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
2024-03-07 07:59:16 -05:00
Roger Quadros
a0e02c6619 net: mdio: Handle bus level GPIO Reset
Some platforms have bus level Reset controlled
by a GPIO line. If available then handle bus reset
via GPIO.

Signed-off-by: Roger Quadros <rogerq@kernel.org>
2024-03-07 07:59:16 -05:00
Wadim Egorov
9e434756ad doc: board: phytec: Add phyCORE-AM64x
Add documentation for PHYTEC phyCORE-AM64x SoM.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
2024-03-07 07:59:16 -05:00
Wadim Egorov
46b3ff8205 board: phytec: am64x: Add PHYTEC phyCORE-AM64x SoM
Add support for PHYTEC phyCORE-AM64x SoM.

Supported features:
  - 2GB DDR4 RAM
  - eMMC Flash
  - external uSD
  - OSPI NOR Flash
  - debug UART

Product page SoM: https://www.phytec.com/product/phycore-am64x

Device trees were taken from Linux v6.8-rc2.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
2024-03-07 07:59:15 -05:00
Bob Wolff
9522956605 Check curve_name for null to avoid crash
If mixed rsa and ecdsa keys are specified in dtsi, an rsa key can be sent
into the ecdsa verify. Without the ecdsa,curve property, this function will
crash due to lack of checking the null pointer return.

Signed-off-by: Bob Wolff <bob.wolff68@gmail.com>
2024-03-07 07:41:41 -05:00
Tom Rini
6eb682bc7e Merge patch series "Move DRAM address of ATF"
Andrew Davis <afd@ti.com> says:

Explanation for this series is mostly in [4/6]. First 3
patches should be safe to take independent of the last 3.
2024-03-06 09:11:00 -05:00
Andrew Davis
cc0f759ddc arm: mach-k3: Move DRAM address of ATF for AM62/AM62a
The current address of TF-A in DRAM is just below the 512MB address line.
This means if the DRAM in a system is 512MB then TF-A is right at the
end of memory which is often reused, for instance U-Boot relocates itself
here. If a system has less than 512MB then that system wouldn't work at
all as TF-A would fail to load.

To avoid the issues above, move TF-A to the start of DRAM, which doesn't
change from system to system.

As TF-A is position independent, this has no dependency on TF-A. We
also fixup DT as needed when TF-A address is moved, so this change also
has no dependency on Linux and is fully forward/backward compatible.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
2024-03-06 09:09:00 -05:00
Andrew Davis
69a5085219 arm: mach-k3: am62a: Fixup TF-A/OP-TEE reserved-memory node in FDT
The address we load TFA and OP-TEE to is configurable by
CONFIG_K3_{ATF,OPTEE}_LOAD_ADDR, but the DT nodes reserving this memory
are static. Fix that by updating this node when the loaded address
does not match the address in DT.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
2024-03-06 09:09:00 -05:00
Andrew Davis
8b0fc29de0 arm: mach-k3: am62: Fixup TF-A/OP-TEE reserved-memory node in FDT
The address we load TF-A and OP-TEE to is configurable by Kconfig
CONFIG_K3_{ATF,OPTEE}_LOAD_ADDR, but the DT nodes reserving this memory
are often statically defined. As these binaries are dynamically loadable,
and in the case of OP-TEE may not even be loaded at all, hard-coding these
addresses is not a hardware description, but rather a configuration.

If the address that U-Boot loaded TF-A or OP-TEE does not match the
address in hard-coded in DT, then fix that node address. This also handles
the case when no reserved memory for these is provided by DT, which is
more correct as explained above.

Add this fixup function, and enable it for AM62.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2024-03-06 09:09:00 -05:00
Andrew Davis
2dd31aec9b arm: mach-k3: am62: Enable OF_SYSTEM_SETUP for all boards
The fixups provided by ft_system_setup() are applicable for all AM62 based
boards. Select this at the target selection level for all AM62 boards and
remove it from any specific defconfig.

Signed-off-by: Andrew Davis <afd@ti.com>
2024-03-06 09:09:00 -05:00
Andrew Davis
556683944d arm: mach-k3: Add config option for setting OP-TEE address
Much like we have for ATF, OP-TEE has a standard address that we load
it too and run it from. Add a Kconfig item for this to remove some
hard-coding and allow this address to be more easily changed.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2024-03-06 09:09:00 -05:00
Andrew Davis
4129bdfbc1 arm: mach-k3: Add default ATF location for AM62/AM62a
There is a default ATF load address that is used for devices that have
ATF running in SRAM. For AM62 and AM62a, ATF runs from DRAM. Instead
of having to override the address in every defconfig, make add a
default for these ATF in DRAM devices.

Signed-off-by: Andrew Davis <afd@ti.com>
Acked-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2024-03-06 09:09:00 -05:00
Michael Trimarchi
c8a66c35de arm: dts: k3-binman: Make optee optional as requirement
Allow boards that use ti_spl_template to not use optee part in
configuration.
Vendor can have module with 256 Mb of memory and they try to optimize
the available memory just using the essential components.
This change allow to remove tee from configuration without binman
fail.

configurations {
	default = "conf-0";

	conf-0 {
		description = "k3-am62_ccm_m3";
		firmware = "atf";
		loadables = "dm", "spl";
		fdt = "fdt-0";
	};
};

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
2024-03-05 08:40:15 -05:00
Tom Rini
8b4ac58462 Merge patch series "Enable OSPI on j721e"
Jonathan Humphreys <j-humphreys@ti.com> says:

This series enables OSPI storage and boot.
2024-03-05 08:39:54 -05:00
Jonathan Humphreys
383fddf634 arm: dts: k3-j721e-sk: Remove OSPI phypattern partition
The phy calibration pattern partition isn't needed as the Cadence driver isn't
calibrating the phys.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Fixes: 58d61fb5a7 ("arm: dts: k3-j721e-sk: Add initial A72 specific dts support")
2024-03-05 08:39:49 -05:00
Jonathan Humphreys
85aca577f6 arm: mach-k3: j721e: Enable OSPI boot
Add boot ROM XSPI bootmode, and set to BOOT_DEVICE_SPI if detected.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2024-03-05 08:39:49 -05:00
Jonathan Humphreys
5fc08887da configs: j721e: Enable OSPI memory
Set config values to enable OSPI functionality.

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
2024-03-05 08:39:49 -05:00
Tom Rini
ad79c04769 Merge patch series "enable OSPI support on AM64x"
Jonathan Humphreys <j-humphreys@ti.com> says:

This series enables OSPI support for AM64x by setting the proper configs, and DT
entries for SPL.
2024-03-05 08:39:31 -05:00