*** empty log message ***

* MPC823 LCD driver: Fill color map backwards, to allow for steady
  display when Linux takes over

* Patch by Erwin Rol, 27 Feb 2003:
  Add support for RTEMS (this time for real).

* Add support for "bmp info" and "bmp display" commands to load
  bitmap images; this can be used (for example in a "preboot"
  command) to display a splash screen very quickly after poweron.

* Add support for 133 MHz clock on INCA-IP board

CHANGELOG

@@ -1,5 +1,43 @@
 ======================================================================
-Changes since U-Boot 0.2.2:
+Changes for U-Boot 0.3.1:
+======================================================================
+
+* Make sure Block Lock Bits get cleared in R360MPI flash driver
+
+* MPC823 LCD driver: Fill color map backwards, to allow for steady
+  display when Linux takes over
+
+* Patch by Erwin Rol, 27 Feb 2003:
+  Add support for RTEMS (this time for real).
+
+* Add support for "bmp info" and "bmp display" commands to load
+  bitmap images; this can be used (for example in a "preboot"
+  command) to display a splash screen very quickly after poweron.
+
+* Add support for 133 MHz clock on INCA-IP board
+
+* Patch by Lutz Dennig, 10 Apr 2003:
+  Update for R360MPI board
+
+* Add new meaning to "autostart" environment variable:
+  If set to "no", a standalone image passed to the
+  "bootm" command will be copied to the load address
+  (and eventually uncompressed), but NOT be started.
+  This can be used to load and uncompress arbitrary
+  data.
+
+* Patch by Stefan Roese, 10 Apr 2003:
+  Changed DHCP client to use IP address from server option field #54
+  from the OFFER packet in the server option field #54 in the REQUEST
+  packet. This fixes a problem using a Windows 2000 DHCP server,
+  where the DHCP-server is not the TFTP-server.
+
+* Set max brightness for MN11236 displays on TRAB board
+
+* Add support for TQM862L modules
+
+======================================================================
+Changes for U-Boot 0.3.0:
 ======================================================================
 
 * Patch by Arun Dharankar, 4 Apr 2003:

CREDITS

@@ -238,6 +238,10 @@ N: Stefan Roese
 E: stefan.roese@esd-electronics.com
 D: IBM PPC401/403/405GP Support; Windows environment support
 
+N: Erwin Rol
+E: erwin@muffin.org
+D: boot support for RTEMS
+
 N: Neil Russell
 E: caret@c-side.com
 D: Author of LiMon-1.4.2, which contributed some ideas

MAKEALL

@@ -35,8 +35,7 @@ LIST_8xx="	\
 	R360MPI		RPXClassic	RPXlite		RRvision	\
 	SM850		SPD823TS	svm_sc8xx	SXNI855T	\
 	TOP860		TQM823L		TQM823L_LCD	TQM850L		\
-	TQM855L		TQM860L		TQM860L_FEC	TTTech		\
-	v37								\
+	TQM855L		TQM860L		TTTech		v37		\
 "
 
 #########################################################################

Makefile

@@ -337,7 +337,7 @@ TOP860_config:		unconfig
 # All boards can come with 50 MHz (default), 66MHz or 80MHz clock,
 # but only 855 and 860 boards may come with FEC
 # and 823 boards may have LCD support
-xtract_8xx = $(subst _66MHz,,$(subst _80MHz,,$(subst _LCD,,$(subst _FEC,,$(subst _config,,$1)))))
+xtract_8xx = $(subst _66MHz,,$(subst _80MHz,,$(subst _LCD,,$(subst _config,,$1))))
 
 FPS850L_config		\
 FPS860L_config		\
@@ -353,20 +353,13 @@ TQM850L_80MHz_config	\
 TQM855L_config		\
 TQM855L_66MHz_config	\
 TQM855L_80MHz_config	\
-TQM855L_FEC_config	\
-TQM855L_FEC_66MHz_config \
-TQM855L_FEC_80MHz_config \
 TQM860L_config		\
 TQM860L_66MHz_config	\
 TQM860L_80MHz_config	\
-TQM860L_FEC_config	\
-TQM860L_FEC_66MHz_config	\
-TQM860L_FEC_80MHz_config:	unconfig
+TQM862L_config		\
+TQM862L_66MHz_config	\
+TQM862L_80MHz_config:	unconfig
 	@ >include/config.h
-	@[ -z "$(findstring _FEC,$@)" ] || \
-		{ echo "#define CONFIG_FEC_ENET"	>>include/config.h ; \
-		  echo "... with FEC support" ; \
-		}
 	@[ -z "$(findstring _66MHz,$@)" ] || \
 		{ echo "#define CONFIG_66MHz"		>>include/config.h ; \
 		  echo "... with 66MHz system clock" ; \
@@ -746,7 +739,7 @@ clobber:	clean
 		| xargs rm -f
 	rm -f $(OBJS) *.bak tags TAGS
 	rm -fr *.*~
-	rm -f u-boot u-boot.bin u-boot.elf u-boot.srec u-boot.map System.map
+	rm -f u-boot u-boot.bin u-boot.srec u-boot.map System.map
 	rm -f tools/crc32.c tools/environment.c tools/env/crc32.c
 	rm -f tools/inca-swap-bytes cpu/mpc824x/bedbug_603e.c
 	rm -f include/asm/arch include/asm

README

@@ -789,6 +789,18 @@ The following options need to be configured:
 		Normally display is black on white background; define
 		CFG_WHITE_ON_BLACK to get it inverted.
 
+- Spash Screen Support: CONFIG_SPLASH_SCREEN
+
+                If this option is set, the environment is checked for
+                a variable "splashimage". If found, the usual display
+                of logo, copyright and system information on the LCD
+                is supressed and the BMP image at the address
+                specified in "splashimage" is loaded instead. The
+                console is redirected to the "nulldev", too. This
+                allows for a "silent" boot where a splash screen is
+                loaded very quickly after power-on.
+
+
 - Ethernet address:
 		CONFIG_ETHADDR
 		CONFIG_ETH2ADDR
@@ -1918,6 +1930,12 @@ Some configuration options can be set using Environment Variables:
 		  be automatically started (by internally calling
 		  "bootm")
 
+		  If set to "no", a standalone image passed to the
+		  "bootm" command will be copied to the load address
+		  (and eventually uncompressed), but NOT be started.
+		  This can be used to load and uncompress arbitrary
+		  data.
+
   initrd_high	- restrict positioning of initrd images:
 		  If this variable is not set, initrd images will be
 		  copied to the highest possible address in RAM; this

board/incaip/memsetup.S

@@ -49,13 +49,11 @@
 #define MC_LATENCY(value)       0x1038(value)
 #define MC_TREFRESH(value)      0x1040(value)
 
-#if CPU_CLOCK_RATE==150000000   /* 150 MHz clock for the MIPS core */
 #define CGU_MODUL_BASE          0xBF107000
 #define CGU_PLL1CR(value)       0x0008(value)
 #define CGU_DIVCR(value)        0x0010(value)
 #define CGU_MUXCR(value)        0x0014(value)
 #define CGU_PLL1SR(value)       0x000C(value)
-#endif
 
 	.globl	memsetup
 memsetup:
@@ -67,12 +65,12 @@ memsetup:
 	li	t1, 0xA0000041
 	sw	t1, EBU_ADDSEL0(t0)
 
-#if CPU_CLOCK_RATE==150000000   /* 150 MHz clock for the MIPS core */
-	li	t1, 0xA841417E
-	sw	t1, EBU_BUSCON0(t0)   /* value set up by magic flash word */
+#if CPU_CLOCK_RATE==100000000	/* 100 MHz clock for the MIPS core */
+	lw	t1, EBU_BUSCON0(t0)  /* value set up by magic flash word */
 	sw	t1, EBU_BUSCON2(t0)
-#else /* 100 MHz */
-	lw	t1, EBU_BUSCON0(t0)   /* value set up by magic flash word */
+#else /* 150 MHz or 133 MHz */
+	li	t1, 0x8841417E
+	sw	t1, EBU_BUSCON0(t0)
 	sw	t1, EBU_BUSCON2(t0)
 #endif
 
@@ -85,10 +83,10 @@ memsetup:
 	li	t1, 0xBE0000F1
  	sw	t1, EBU_ADDSEL1(t0)
 
-#if CPU_CLOCK_RATE==150000000   /* 150 MHz clock for the MIPS core */
-	li	t1, 0x684143FD
-#else /* 100 MHz */
+#if CPU_CLOCK_RATE==100000000   /* 100 MHz clock for the MIPS core */
 	li	t1, 0x684142BD
+#else /* 150 MHz or 133 MHz */
+	li	t1, 0x684143FD
 #endif
  	sw	t1, EBU_BUSCON1(t0)
 
@@ -105,6 +103,14 @@ b1:
 	beq     t1, zero, b1
 	li      t1, 0x80000001
 	sw      t1, CGU_MUXCR(t0)
+#elif CPU_CLOCK_RATE==133000000	/* 133 MHz clock for the MIPS core */
+	li	t0, CGU_MODUL_BASE
+	li	t1, 0x80000054
+	sw	t1, CGU_DIVCR(t0)
+	li	t1, 0x80000000
+	sw	t1, CGU_MUXCR(t0)
+	li	t1, 0x800B0001
+	sw	t1, CGU_PLL1CR(t0)
 #endif
 
 	/* SDRAM Initialization.

board/purple/Makefile

@@ -0,0 +1,41 @@
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o sconsole.o
+SOBJS	= memsetup.o
+
+$(LIB):	.depend $(OBJS) $(SOBJS)
+	$(AR) crv $@ $^
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################

board/purple/config.mk

@@ -0,0 +1,32 @@
+#
+# (C) Copyright 2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# Purple board with MIPS 5Kc CPU core
+#
+
+# ROM version
+TEXT_BASE = 0xB0000000
+
+# RAM version
+#TEXT_BASE = 0x80100000

board/purple/flash.c

@@ -0,0 +1,596 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/inca-ip.h>
+
+flash_info_t	flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips	*/
+
+typedef unsigned long FLASH_PORT_WIDTH;
+typedef volatile unsigned long FLASH_PORT_WIDTHV;
+
+#define	FLASH_ID_MASK	0xFFFFFFFF
+
+#define FPW	FLASH_PORT_WIDTH
+#define FPWV	FLASH_PORT_WIDTHV
+
+#define ORMASK(size) ((-size) & OR_AM_MSK)
+
+#define FLASH29_REG_ADRS(reg) ((FPWV *)PHYS_FLASH_1 + (reg))
+
+/* FLASH29 command register addresses */
+
+#define FLASH29_REG_FIRST_CYCLE		FLASH29_REG_ADRS (0x1555)
+#define FLASH29_REG_SECOND_CYCLE	FLASH29_REG_ADRS (0x2aaa)
+#define FLASH29_REG_THIRD_CYCLE		FLASH29_REG_ADRS (0x3555)	
+#define	FLASH29_REG_FOURTH_CYCLE	FLASH29_REG_ADRS (0x4555)
+#define	FLASH29_REG_FIFTH_CYCLE		FLASH29_REG_ADRS (0x5aaa)
+#define	FLASH29_REG_SIXTH_CYCLE		FLASH29_REG_ADRS (0x6555)
+
+/* FLASH29 command definitions */
+
+#define	FLASH29_CMD_FIRST		0xaaaaaaaa
+#define	FLASH29_CMD_SECOND		0x55555555
+#define	FLASH29_CMD_FOURTH		0xaaaaaaaa
+#define	FLASH29_CMD_FIFTH		0x55555555
+#define	FLASH29_CMD_SIXTH		0x10101010
+
+#define	FLASH29_CMD_SECTOR		0x30303030
+#define	FLASH29_CMD_PROGRAM		0xa0a0a0a0
+#define	FLASH29_CMD_CHIP_ERASE		0x80808080
+#define	FLASH29_CMD_READ_RESET		0xf0f0f0f0
+#define	FLASH29_CMD_AUTOSELECT		0x90909090
+#define FLASH29_CMD_READ		0x70707070	
+
+#define IN_RAM_CMD_READ		0x1
+#define IN_RAM_CMD_WRITE	0x2
+
+#define FLASH_WRITE_CMD	((ulong)(flash_write_cmd) & 0x7)+0xbf008000
+#define FLASH_READ_CMD  ((ulong)(flash_read_cmd) & 0x7)+0xbf008000
+
+typedef void (*FUNCPTR_CP)(ulong *source, ulong *destination, ulong nlongs);
+typedef void (*FUNCPTR_RD)(int cmd, FPWV * pFA, char * string, int strLen);
+typedef void (*FUNCPTR_WR)(int cmd, FPWV * pFA, FPW value);
+
+static ulong flash_get_size(FPWV *addr, flash_info_t *info);
+static int write_word(flash_info_t *info, FPWV *dest, FPW data);
+static void flash_get_offsets(ulong base, flash_info_t *info);
+static flash_info_t *flash_get_info(ulong base);
+
+static void load_cmd(ulong cmd);
+static ulong in_ram_cmd = 0;
+
+
+/******************************************************************************
+*
+* Don't change the program architecture
+* This architecture assure the program
+* can be relocated to scratch ram
+*/
+static void flash_read_cmd(int cmd, FPWV * pFA, char * string, int strLen)
+{					
+	int i,j;
+	FPW temp,temp1;	
+	FPWV *str;
+
+	str = (FPWV *)string;
+
+	j=  strLen/4;
+	
+	if(cmd == FLASH29_CMD_AUTOSELECT)
+	   {
+            *(FLASH29_REG_FIRST_CYCLE)  = FLASH29_CMD_FIRST;
+            *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND;
+            *(FLASH29_REG_THIRD_CYCLE)  = FLASH29_CMD_AUTOSELECT;
+           }
+
+        if(cmd == FLASH29_CMD_READ)
+           { 
+	    i = 0;		
+	    while(i<j)	
+            {
+		temp = *pFA++;
+		temp1 = *(int *)0xa0000000;
+                *(int *)0xbf0081f8 = temp1 + temp;
+		*str++ = temp;
+		i++;
+	    }  		
+           }
+
+         if(cmd == FLASH29_CMD_READ_RESET) 
+         {
+            *(FLASH29_REG_FIRST_CYCLE)  = FLASH29_CMD_FIRST;
+            *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND;
+            *(FLASH29_REG_THIRD_CYCLE)  = FLASH29_CMD_READ_RESET;
+         } 			 	
+	    	
+	*(int *)0xbf0081f8 = *(int *)0xa0000000;	/* dummy read switch back to sdram interface */	
+}
+
+/******************************************************************************
+*
+* Don't change the program architecture
+* This architecture assure the program
+* can be relocated to scratch ram
+*/
+static void flash_write_cmd(int cmd, FPWV * pFA, FPW value)
+{						
+        *(FLASH29_REG_FIRST_CYCLE)  = FLASH29_CMD_FIRST;
+        *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND;
+
+	if (cmd == FLASH29_CMD_SECTOR)
+	   {
+            *(FLASH29_REG_THIRD_CYCLE)  = FLASH29_CMD_CHIP_ERASE;
+            *(FLASH29_REG_FOURTH_CYCLE) = FLASH29_CMD_FOURTH;
+            *(FLASH29_REG_FIFTH_CYCLE)  = FLASH29_CMD_FIFTH;
+            *pFA		        = FLASH29_CMD_SECTOR;
+           }
+
+        if (cmd == FLASH29_CMD_SIXTH)
+           { 
+            *(FLASH29_REG_THIRD_CYCLE)  = FLASH29_CMD_CHIP_ERASE;
+            *(FLASH29_REG_FOURTH_CYCLE) = FLASH29_CMD_FOURTH;
+            *(FLASH29_REG_FIFTH_CYCLE)  = FLASH29_CMD_FIFTH;
+            *(FLASH29_REG_SIXTH_CYCLE)  = FLASH29_CMD_SIXTH;
+	   }
+
+        if (cmd == FLASH29_CMD_PROGRAM)
+           {
+            *(FLASH29_REG_THIRD_CYCLE)  = FLASH29_CMD_PROGRAM;
+	    *pFA = value;
+           }
+
+        if (cmd == FLASH29_CMD_READ_RESET)    
+           {
+            *(FLASH29_REG_THIRD_CYCLE)  = FLASH29_CMD_READ_RESET;
+           } 			 	
+	    	
+	*(int *)0xbf0081f8 = *(int *)0xa0000000;	/* dummy read switch back to sdram interface */	
+}
+
+static void load_cmd(ulong cmd)
+{
+	ulong *src;
+	ulong *dst;
+	FUNCPTR_CP absEntry;
+	ulong func;
+	 
+	if (in_ram_cmd & cmd) return;
+	
+	if (cmd == IN_RAM_CMD_READ)
+	{
+		func = (ulong)flash_read_cmd;
+	}
+	else
+	{
+		func = (ulong)flash_write_cmd;
+	}
+
+    	src = (ulong *)(func & 0xfffffff8);
+    	dst = (ulong *)0xbf008000;
+    	absEntry = (FUNCPTR_CP)(0xbf0081d0);
+    	absEntry(src,dst,0x38);
+
+        in_ram_cmd = cmd;
+}
+
+/*-----------------------------------------------------------------------
+ * flash_init()
+ *
+ * sets up flash_info and returns size of FLASH (bytes)
+ */
+unsigned long flash_init (void)
+{
+	unsigned long size = 0;
+	int i;
+	 
+        load_cmd(IN_RAM_CMD_READ);
+
+	/* Init: no FLASHes known */
+	for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) {
+		ulong flashbase = PHYS_FLASH_1;
+		ulong * buscon = (ulong *) INCA_IP_EBU_EBU_BUSCON0;
+		
+		/* Disable write protection */
+		*buscon &= ~INCA_IP_EBU_EBU_BUSCON1_WRDIS;
+
+#if 1
+		memset(&flash_info[i], 0, sizeof(flash_info_t));
+#endif
+
+		flash_info[i].size = 
+			flash_get_size((FPW *)flashbase, &flash_info[i]);
+
+		if (flash_info[i].flash_id == FLASH_UNKNOWN) {
+			printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx\n",
+			i, flash_info[i].size);
+		}
+		
+		size += flash_info[i].size;
+	}
+
+#if CFG_MONITOR_BASE >= CFG_FLASH_BASE
+	/* monitor protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+		      CFG_MONITOR_BASE,
+		      CFG_MONITOR_BASE+CFG_MONITOR_LEN-1,
+		      flash_get_info(CFG_MONITOR_BASE));
+#endif
+
+#ifdef	CFG_ENV_IS_IN_FLASH
+	/* ENV protection ON by default */
+	flash_protect(FLAG_PROTECT_SET,
+		      CFG_ENV_ADDR,
+		      CFG_ENV_ADDR+CFG_ENV_SIZE-1,
+		      flash_get_info(CFG_ENV_ADDR));
+#endif
+
+	return size;
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+	int i;
+
+	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD
+		 && (info->flash_id & FLASH_TYPEMASK) == FLASH_AM160B) {
+
+		int bootsect_size[4];	/* number of bytes/boot sector  */
+		int sect_size;		/* number of bytes/regular sector */
+
+		bootsect_size[0] = 0x00008000;
+		bootsect_size[1] = 0x00004000;
+		bootsect_size[2] = 0x00004000;
+		bootsect_size[3] = 0x00010000;
+		sect_size =        0x00020000;
+
+		/* set sector offsets for bottom boot block type	*/
+		for (i = 0; i < info->sector_count; i++) {
+			info->start[i] = base;
+			base += i < 4 ? bootsect_size[i] : sect_size;
+		}
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+static flash_info_t *flash_get_info(ulong base)
+{
+	int i;
+	flash_info_t * info;
+	
+	for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
+		info = & flash_info[i];
+		if (info->start[0] <= base && base < info->start[0] + info->size)
+			break;
+	}
+	
+	return i == CFG_MAX_FLASH_BANKS ? 0 : info;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+void flash_print_info (flash_info_t *info)
+{
+	int i;
+	uchar *boottype;
+	uchar *bootletter;
+	uchar *fmt;
+	uchar botbootletter[] = "B";
+	uchar topbootletter[] = "T";
+	uchar botboottype[] = "bottom boot sector";
+	uchar topboottype[] = "top boot sector";
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_AMD:	printf ("AMD ");		break;
+	case FLASH_MAN_BM:	printf ("BRIGHT MICRO ");	break;
+	case FLASH_MAN_FUJ:	printf ("FUJITSU ");		break;
+	case FLASH_MAN_SST:	printf ("SST ");		break;
+	case FLASH_MAN_STM:	printf ("STM ");		break;
+	case FLASH_MAN_INTEL:	printf ("INTEL ");		break;
+	default:		printf ("Unknown Vendor ");	break;
+	}
+
+	/* check for top or bottom boot, if it applies */
+	if (info->flash_id & FLASH_BTYPE) {
+		boottype = botboottype;
+		bootletter = botbootletter;
+	}
+	else {
+		boottype = topboottype;
+		bootletter = topbootletter;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_AM160B:
+		fmt = "29LV160B%s (16 Mbit, %s)\n";
+		break;
+        case FLASH_28F800C3B:
+        case FLASH_28F800C3T:
+		fmt = "28F800C3%s (8 Mbit, %s)\n";
+		break;
+	case FLASH_INTEL800B:
+	case FLASH_INTEL800T:
+		fmt = "28F800B3%s (8 Mbit, %s)\n";
+		break;
+        case FLASH_28F160C3B:
+        case FLASH_28F160C3T:
+		fmt = "28F160C3%s (16 Mbit, %s)\n";
+		break;
+	case FLASH_INTEL160B:
+	case FLASH_INTEL160T:
+		fmt = "28F160B3%s (16 Mbit, %s)\n";
+		break;
+        case FLASH_28F320C3B:
+        case FLASH_28F320C3T:
+		fmt = "28F320C3%s (32 Mbit, %s)\n";
+		break;
+	case FLASH_INTEL320B:
+	case FLASH_INTEL320T:
+		fmt = "28F320B3%s (32 Mbit, %s)\n";
+		break;
+        case FLASH_28F640C3B:
+        case FLASH_28F640C3T:
+		fmt = "28F640C3%s (64 Mbit, %s)\n";
+		break;
+	case FLASH_INTEL640B:
+	case FLASH_INTEL640T:
+		fmt = "28F640B3%s (64 Mbit, %s)\n";
+		break;
+	default:
+		fmt = "Unknown Chip Type\n";
+		break;
+	}
+
+	printf (fmt, bootletter, boottype);
+
+	printf ("  Size: %ld MB in %d Sectors\n",
+		info->size >> 20,
+		info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+
+	for (i=0; i<info->sector_count; ++i) {
+		if ((i % 5) == 0) {
+			printf ("\n   ");
+		}
+
+		printf (" %08lX%s", info->start[i],
+			info->protect[i] ? " (RO)" : "     ");
+	}
+
+	printf ("\n");
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+
+ulong flash_get_size (FPWV *addr, flash_info_t *info)
+{
+	FUNCPTR_RD absEntry;
+	FPW retValue;	
+	int flag;
+
+        load_cmd(IN_RAM_CMD_READ);
+	absEntry = (FUNCPTR_RD)FLASH_READ_CMD;
+
+	flag = disable_interrupts();
+	absEntry(FLASH29_CMD_AUTOSELECT,0,0,0);
+	if (flag) enable_interrupts();
+	
+	udelay(100);
+
+	flag = disable_interrupts();
+	absEntry(FLASH29_CMD_READ, addr + 1, (char *)&retValue, sizeof(retValue));
+	absEntry(FLASH29_CMD_READ_RESET,0,0,0);
+	if (flag) enable_interrupts();
+
+	udelay(100);
+
+	switch (retValue) {
+
+	case (FPW)AMD_ID_LV160B:
+		info->flash_id += FLASH_AM160B;
+		info->sector_count = 35;
+		info->size = 0x00400000;
+		break;				/* => 8 or 16 MB	*/
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		return (0);			/* => no or unknown flash */
+	}
+
+	flash_get_offsets((ulong)addr, info);
+
+	return (info->size);
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+int	flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	FPWV *addr;
+	int flag, prot, sect;
+	ulong start, now, last;
+	int rcode = 0;
+	FUNCPTR_WR absEntry;
+
+        load_cmd(IN_RAM_CMD_WRITE);
+	absEntry = (FUNCPTR_WR)FLASH_WRITE_CMD;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_AM160B:
+		break;
+	case FLASH_UNKNOWN:
+	default:
+		printf ("Can't erase unknown flash type %08lx - aborted\n",
+			info->flash_id);
+		return 1;
+	}
+
+	prot = 0;
+	for (sect=s_first; sect<=s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	last  = get_timer(0);
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect<=s_last && rcode == 0; sect++) {
+
+		if (info->protect[sect] != 0)	/* protected, skip it */
+			continue;
+
+		/* Disable interrupts which might cause a timeout here */
+		flag = disable_interrupts();
+
+		addr = (FPWV *)(info->start[sect]);
+		absEntry(FLASH29_CMD_SECTOR, addr, 0);
+
+		/* re-enable interrupts if necessary */
+		if (flag)
+			enable_interrupts();
+
+		start = get_timer(0);
+
+		while ((now = get_timer(start)) <= CFG_FLASH_ERASE_TOUT) {
+
+			/* show that we're waiting */
+			if ((get_timer(last)) > CFG_HZ) {/* every second */
+				putc ('.');
+				last = get_timer(0);
+			}
+		}
+
+		flag = disable_interrupts();
+		absEntry(FLASH29_CMD_READ_RESET,0,0);
+		if (flag)
+			enable_interrupts();
+	}
+
+	printf (" done\n");
+	return rcode;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+    FPW data = 0; /* 16 or 32 bit word, matches flash bus width on MPC8XX */
+    int bytes;	  /* number of bytes to program in current word		*/
+    int left;	  /* number of bytes left to program			*/
+    int i, res;
+
+    for (left = cnt, res = 0;
+	 left > 0 && res == 0;
+	 addr += sizeof(data), left -= sizeof(data) - bytes) {
+
+        bytes = addr & (sizeof(data) - 1);
+        addr &= ~(sizeof(data) - 1);
+
+	/* combine source and destination data so can program
+	 * an entire word of 16 or 32 bits
+	 */
+        for (i = 0; i < sizeof(data); i++) {
+            data <<= 8;
+            if (i < bytes || i - bytes >= left )
+		data += *((uchar *)addr + i);
+	    else
+		data += *src++;
+	}
+
+	res = write_word(info, (FPWV *)addr, data);
+    }
+
+    return (res);
+}
+
+static int write_word (flash_info_t *info, FPWV *dest, FPW data)
+{
+    int res = 0;	/* result, assume success	*/
+    FUNCPTR_WR absEntry;
+    int flag;
+
+    /* Check if Flash is (sufficiently) erased */
+    if ((*dest & data) != data) {
+	return (2);
+    }
+
+    if (info->start[0] != PHYS_FLASH_1)
+    {
+	return (3);
+    }
+
+    load_cmd(IN_RAM_CMD_WRITE);
+    absEntry = (FUNCPTR_WR)FLASH_WRITE_CMD;
+
+    flag = disable_interrupts();
+    absEntry(FLASH29_CMD_PROGRAM,dest,data);
+    if (flag) enable_interrupts();
+
+    udelay(100);
+
+    flag = disable_interrupts();
+    absEntry(FLASH29_CMD_READ_RESET,0,0);
+    if (flag) enable_interrupts();
+
+    return (res);
+}

board/purple/memsetup.S

@@ -0,0 +1,35 @@
+/*
+ *  Memory sub-system initialization code for PURPLE development board.
+ *
+ *  Copyright (c) 2003	Wolfgang Denk <wd@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+#include <asm/regdef.h>
+
+
+	.globl	memsetup
+memsetup:
+
+	j	ra
+	nop
+

board/purple/purple.c

@@ -0,0 +1,197 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <asm/inca-ip.h>
+#include <asm/regdef.h>
+#include <asm/mipsregs.h>
+#include <asm/addrspace.h>
+#include <asm/cacheops.h>
+
+#include "sconsole.h"
+
+#define cache_unroll(base,op)	        	\
+	__asm__ __volatile__("	         	\
+		.set noreorder;		        \
+		.set mips3;		        \
+                cache %1, (%0);	                \
+		.set mips0;			\
+		.set reorder"			\
+		:				\
+		: "r" (base),			\
+		  "i" (op));
+
+typedef void (*FUNCPTR)(ulong *source, ulong *destination, ulong nlongs);
+
+extern void	asc_serial_init		(void);
+extern void	asc_serial_putc 	(char);
+extern void	asc_serial_puts 	(const char *);
+extern int	asc_serial_getc 	(void);
+extern int	asc_serial_tstc 	(void);
+extern void	asc_serial_setbrg 	(void);
+
+
+long int initdram(int board_type)
+{
+	/* The only supported number of SDRAM banks is 4.
+	 */
+#define CFG_NB	4
+
+	ulong	cfgpb0	= *INCA_IP_SDRAM_MC_CFGPB0;
+	ulong	cfgdw	= *INCA_IP_SDRAM_MC_CFGDW;
+	int	cols	= cfgpb0 & 0xF;
+	int	rows	= (cfgpb0 & 0xF0) >> 4;
+	int	dw	= cfgdw & 0xF;
+	ulong	size	= (1 << (rows + cols)) * (1 << (dw - 1)) * CFG_NB;
+
+	return size;
+}
+
+int checkboard (void)
+{
+
+	unsigned long chipid = *(unsigned long *)0xB800C800;
+
+	printf ("Board: Purple PLB 2800 chip version %ld, ", chipid & 0xF);
+
+	printf("CPU Speed %d MHz\n", CPU_CLOCK_RATE/1000000);
+
+	return 0;
+}
+
+int misc_init_r (void)
+{
+	asc_serial_init ();
+
+	sconsole_putc   = asc_serial_putc;
+	sconsole_puts   = asc_serial_puts;
+	sconsole_getc   = asc_serial_getc;
+	sconsole_tstc   = asc_serial_tstc;
+	sconsole_setbrg = asc_serial_setbrg;
+
+	sconsole_flush ();
+	return (0);
+}
+
+/*******************************************************************************
+*
+* copydwords - copy one buffer to another a long at a time
+*
+* This routine copies the first <nlongs> longs from <source> to <destination>.
+*/
+static void copydwords (ulong *source, ulong *destination, ulong nlongs)
+{
+	ulong temp,temp1;
+	ulong *dstend = destination + nlongs;
+
+	while (destination < dstend)
+	{
+		temp = *source++;
+		/* dummy read from sdram */
+		temp1 = *(ulong *)0xa0000000;
+		/* avoid optimization from compliler */
+		*(ulong *)0xbf0081f8 = temp1 + temp;
+		*destination++ = temp;
+
+	} 
+}
+
+/*******************************************************************************
+*
+* copyLongs - copy one buffer to another a long at a time
+*
+* This routine copies the first <nlongs> longs from <source> to <destination>.
+*/
+static void copyLongs (ulong *source, ulong *destination, ulong nlongs)
+{
+	FUNCPTR absEntry;
+
+	absEntry = (FUNCPTR)(0xbf008000+((ulong)copydwords & 0x7));
+	absEntry(source, destination, nlongs);
+}
+
+/*******************************************************************************
+*
+* programLoad - load program into ram
+*
+* This routine load copydwords into ram
+*
+*/
+static void programLoad(void)
+{
+	FUNCPTR absEntry;
+	ulong *src,*dst;
+
+	src = (ulong *)(TEXT_BASE + 0x428);
+	dst = (ulong *)0xbf0081d0;
+
+	absEntry = (FUNCPTR)(TEXT_BASE + 0x400);   
+	absEntry(src,dst,0x6);     	
+
+	src = (ulong *)((ulong)copydwords & 0xfffffff8);
+	dst = (ulong *)0xbf008000;
+
+	absEntry(src,dst,0x38);
+}
+
+/*******************************************************************************
+*
+* copy_code - copy u-boot image from flash to RAM
+*
+* This routine is needed to solve flash problems on this board
+*
+*/
+void copy_code (ulong dest_addr)
+{
+	unsigned long start;
+	unsigned long end;
+
+	/* load copydwords into ram
+	 */
+	programLoad();
+
+	/* copy u-boot code
+	 */
+	copyLongs((ulong *)CFG_MONITOR_BASE,
+		  (ulong *)dest_addr,
+		  (CFG_MONITOR_LEN + 3) / 4);
+
+
+	/* flush caches
+	 */
+
+	start = KSEG0;
+	end = start + CFG_DCACHE_SIZE;
+	while(start < end) {
+		cache_unroll(start,Index_Writeback_Inv_D);
+		start += CFG_CACHELINE_SIZE;
+	}
+
+	start = KSEG0;
+	end = start + CFG_ICACHE_SIZE;
+	while(start < end) {
+		cache_unroll(start,Index_Invalidate_I);
+		start += CFG_CACHELINE_SIZE;
+	}
+}

board/purple/sconsole.c

@@ -0,0 +1,125 @@
+/*
+ * (C) Copyright 2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <common.h>
+
+#include "sconsole.h"
+
+void	(*sconsole_putc) (char) = 0;
+void	(*sconsole_puts) (const char *) = 0;
+int	(*sconsole_getc) (void) = 0;
+int	(*sconsole_tstc) (void) = 0;
+void	(*sconsole_setbrg) (void) = 0;
+
+int serial_init (void)
+{
+	sconsole_buffer_t *sb = SCONSOLE_BUFFER;
+
+	sb->pos  = 0;
+	sb->size = 0;
+	sb->max_size = CFG_SCONSOLE_SIZE - sizeof (sconsole_buffer_t);
+
+	return (0);
+}
+
+void serial_putc (char c)
+{
+	if (sconsole_putc) {
+		(*sconsole_putc) (c);
+	} else {
+		sconsole_buffer_t *sb = SCONSOLE_BUFFER;
+
+		if (c) {
+			sb->data[sb->pos++] = c;
+			if (sb->pos == sb->max_size) {
+				sb->pos = 0;
+			}
+			if (sb->size < sb->max_size) {
+				sb->size++;
+			}
+		}
+	}
+}
+
+void serial_puts (const char *s)
+{
+	if (sconsole_puts) {
+		(*sconsole_puts) (s);
+	} else {
+		sconsole_buffer_t *sb = SCONSOLE_BUFFER;
+
+		while (*s) {
+			sb->data[sb->pos++] = *s++;
+			if (sb->pos == sb->max_size) {
+				sb->pos = 0;
+			}
+			if (sb->size < sb->max_size) {
+				sb->size++;
+			}
+		}
+	}
+}
+
+int serial_getc (void)
+{
+	if (sconsole_getc) {
+		return (*sconsole_getc) ();
+	} else {
+		return 0;
+	}
+}
+
+int serial_tstc (void)
+{
+	if (sconsole_tstc) {
+		return (*sconsole_tstc) ();
+	} else {
+		return 0;
+	}
+}
+
+void serial_setbrg (void)
+{
+	if (sconsole_setbrg) {
+		(*sconsole_setbrg) ();
+	}
+}
+
+void sconsole_flush (void)
+{
+	if (sconsole_putc) {
+		sconsole_buffer_t *sb = SCONSOLE_BUFFER;
+		unsigned int end = sb->pos < sb->size
+				? sb->pos + sb->max_size - sb->size
+				: sb->pos - sb->size;
+
+		while (sb->size) {
+			(*sconsole_putc) (sb->data[end++]);
+			if (end == sb->max_size) {
+				end = 0;
+			}
+			sb->size--;
+		}
+	}
+}

board/purple/sconsole.h

@@ -0,0 +1,47 @@
+/*
+ * (C) Copyright 2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _SCONSOLE_H_
+#define _SCONSOLE_H_
+
+#include <config.h>
+
+typedef struct sconsole_buffer_s
+{
+  unsigned long		size;
+  unsigned long		max_size;
+  unsigned long 	pos;
+  char			data [1];
+} sconsole_buffer_t;
+
+#define SCONSOLE_BUFFER		((sconsole_buffer_t *) CFG_SCONSOLE_ADDR)
+
+extern void	(* sconsole_putc) 	(char);
+extern void	(* sconsole_puts) 	(const char *);
+extern int	(* sconsole_getc) 	(void);
+extern int	(* sconsole_tstc) 	(void);
+extern void	(* sconsole_setbrg) 	(void);
+
+extern void	sconsole_flush		(void);
+
+#endif

board/purple/u-boot.lds

@@ -0,0 +1,74 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk Engineering, <wd@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips")
+*/
+OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips")
+OUTPUT_ARCH(mips)
+ENTRY(_start)
+SECTIONS
+{
+        . = 0x00000000;
+
+        . = ALIGN(4);
+	.text       :
+	{
+	  cpu/mips/start.o		(.text)
+	  board/purple/memsetup.o	(.text)
+	  cpu/mips/cache.o		(.text)
+	  common/main.o			(.text)
+	  common/dlmalloc.o		(.text)
+	  common/cmd_boot.o		(.text)
+	  lib_generic/zlib.o		(.text)
+	  . = DEFINED(env_offset) ? env_offset : .;
+	  common/environment.o	(.ppcenv)
+
+	  *(.text)
+	}
+
+        . = ALIGN(4);
+        .rodata  : { *(.rodata) }
+
+        . = ALIGN(4);
+        .data  : { *(.data) }
+
+	. = ALIGN(4);
+	.sdata  : { *(.sdata) }
+
+	_gp = ALIGN(16);
+
+	__got_start = .;
+	.got  : { *(.got) }
+	__got_end = .;
+
+	.sdata  : { *(.sdata) }
+
+	uboot_end_data = .;
+	num_got_entries = (__got_end - __got_start) >> 2;
+
+        . = ALIGN(4);
+	.sbss  : { *(.sbss) }
+        .bss  : { *(.bss) }
+	uboot_end = .;
+}

board/r360mpi/flash.c

@@ -206,6 +206,12 @@ static ulong flash_get_size (FPW * addr, flash_info_t * info)
 {
 	FPW value;
 
+	/* Make sure Block Lock Bits get cleared */
+	addr[0] = (FPW) 0x00FF00FF;
+	addr[0] = (FPW) 0x00600060;
+	addr[0] = (FPW) 0x00D000D0;
+	addr[0] = (FPW) 0x00FF00FF;
+
 	/* Write auto select command: read Manufacturer ID */
 	addr[0x5555] = (FPW) 0x00AA00AA;
 	addr[0x2AAA] = (FPW) 0x00550055;

board/r360mpi/r360mpi.c

@@ -126,12 +126,12 @@ long int initdram (int board_type)
 	memctl->memc_mar = 0x00000088;
 
 	/*
-	 * Map controller bank 1 to the SDRAM bank at
+	 * Map controller bank 2 to the SDRAM bank at
 	 * preliminary address - these have to be modified after the
 	 * SDRAM size has been determined.
 	 */
-	memctl->memc_or1 = CFG_OR1_PRELIM;
-	memctl->memc_br1 = CFG_BR1_PRELIM;
+	memctl->memc_or2 = CFG_OR2_PRELIM;
+	memctl->memc_br2 = CFG_BR2_PRELIM;
 
 	memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE));	/* no refresh yet */
 
@@ -139,9 +139,9 @@ long int initdram (int board_type)
 
 	/* perform SDRAM initializsation sequence */
 
-	memctl->memc_mcr = 0x80002105;	/* SDRAM bank 0 */
+	memctl->memc_mcr = 0x80004105;	/* SDRAM bank 0 */
 	udelay (200);
-	memctl->memc_mcr = 0x80002230;	/* SDRAM bank 0 - execute twice */
+	memctl->memc_mcr = 0x80004230;	/* SDRAM bank 0 - execute twice */
 	udelay (200);
 
 	memctl->memc_mamr |= MAMR_PTAE;	/* enable refresh */
@@ -153,7 +153,7 @@ long int initdram (int board_type)
 	 *
 	 * try 8 column mode
 	 */
-	size8 = dram_size (CFG_MAMR_8COL, (ulong *) SDRAM_BASE1_PRELIM,
+	size8 = dram_size (CFG_MAMR_8COL, (ulong *) SDRAM_BASE2_PRELIM,
 					   SDRAM_MAX_SIZE);
 
 	udelay (1000);
@@ -161,13 +161,13 @@ long int initdram (int board_type)
 	/*
 	 * try 9 column mode
 	 */
-	size9 = dram_size (CFG_MAMR_9COL, (ulong *) SDRAM_BASE1_PRELIM,
+	size9 = dram_size (CFG_MAMR_9COL, (ulong *) SDRAM_BASE2_PRELIM,
 					   SDRAM_MAX_SIZE);
 
 	if (size8 < size9) {		/* leave configuration at 9 columns */
 		size_b0 = size9;
 /*	debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20);	*/
-	} else {					/* back to 8 columns            */
+	} else {			/* back to 8 columns            */
 		size_b0 = size8;
 		memctl->memc_mamr = CFG_MAMR_8COL;
 		udelay (500);
@@ -200,6 +200,47 @@ long int initdram (int board_type)
 
 	udelay (10000);
 
+#ifdef CONFIG_CAN_DRIVER
+	/* Initialize OR3 / BR3 */
+	memctl->memc_or3 = CFG_OR3_CAN;		/* switch GPLB_5 to GPLA_5 */
+	memctl->memc_br3 = CFG_BR3_CAN;
+
+	/* Initialize MBMR */
+	memctl->memc_mbmr = MAMR_GPL_B4DIS;	/* GPL_B4 works as UPWAITB */
+
+	/* Initialize UPMB for CAN: single read */
+	memctl->memc_mdr = 0xFFFFC004;
+	memctl->memc_mcr = 0x0100 | UPMB;
+
+	memctl->memc_mdr = 0x0FFFD004;
+	memctl->memc_mcr = 0x0101 | UPMB;
+
+	memctl->memc_mdr = 0x0FFFC000;
+	memctl->memc_mcr = 0x0102 | UPMB;
+
+	memctl->memc_mdr = 0x3FFFC004;
+	memctl->memc_mcr = 0x0103 | UPMB;
+
+	memctl->memc_mdr = 0xFFFFDC05;
+	memctl->memc_mcr = 0x0104 | UPMB;
+
+	/* Initialize UPMB for CAN: single write */
+	memctl->memc_mdr = 0xFFFCC004;
+	memctl->memc_mcr = 0x0118 | UPMB;
+
+	memctl->memc_mdr = 0xCFFCD004;
+	memctl->memc_mcr = 0x0119 | UPMB;
+
+	memctl->memc_mdr = 0x0FFCC000;
+	memctl->memc_mcr = 0x011A | UPMB;
+
+	memctl->memc_mdr = 0x7FFCC004;
+	memctl->memc_mcr = 0x011B | UPMB;
+
+	memctl->memc_mdr = 0xFFFDCC05;
+	memctl->memc_mcr = 0x011C | UPMB;
+#endif
+
 	return (size_b0);
 }
 
@@ -213,8 +254,8 @@ long int initdram (int board_type)
  * - short between data lines
  */
 
-static long int dram_size (long int mamr_value, long int *base,
-						   long int maxsize)
+static long int dram_size (long int mamr_value,
+			   long int *base, long int maxsize)
 {
 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
 	volatile memctl8xx_t *memctl = &immap->im_memctl;
@@ -257,10 +298,10 @@ static long int dram_size (long int mamr_value, long int *base,
 
 /* ------------------------------------------------------------------------- */
 
-void r360_pwm_write (uchar reg, uchar val)
+void r360_i2c_lcd_write (uchar data0, uchar data1)
 {
-	if (i2c_write (CFG_I2C_PWM_ADDR, reg, 1, &val, 1)) {
-		printf ("Can't write PWM register 0x%02X.\n", reg);
+	if (i2c_write (CFG_I2C_LCD_ADDR, data0, 1, &data1, 1)) {
+		printf("Can't write lcd data 0x%02X 0x%02X.\n", data0, data1);
 	}
 }
 
@@ -271,10 +312,8 @@ void r360_pwm_write (uchar reg, uchar val)
  */
 
 /* Number of bytes returned from Keyboard Controller */
-#define KEYBD_KEY_MAX		20				/* maximum key number */
-#define KEYBD_DATALEN		((KEYBD_KEY_MAX + 7) / 8)	/* normal key scan data */
-
-static uchar kbd_addr = CFG_I2C_KBD_ADDR;
+#define KEYBD_KEY_MAX	16				/* maximum key number */
+#define KEYBD_DATALEN	((KEYBD_KEY_MAX + 7) / 8)	/* normal key scan data */
 
 static uchar *key_match (uchar *);
 
@@ -287,14 +326,14 @@ int misc_init_r (void)
 
 	i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
 
-	i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
+	i2c_read (CFG_I2C_KEY_ADDR, 0, 0, kbd_data, KEYBD_DATALEN);
 
 	for (i = 0; i < KEYBD_DATALEN; ++i) {
 		sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
 	}
 	setenv ("keybd", keybd_env);
 
-	str = strdup (key_match (kbd_data));	/* decode keys */
+	str = strdup (key_match (keybd_env));	/* decode keys */
 
 #ifdef CONFIG_PREBOOT	/* automatically configure "preboot" command on key match */
 	setenv ("preboot", str);	/* set or delete definition */
@@ -324,16 +363,13 @@ int misc_init_r (void)
 static uchar kbd_magic_prefix[] = "key_magic";
 static uchar kbd_command_prefix[] = "key_cmd";
 
-static uchar *key_match (uchar * kbd_data)
+static uchar *key_match (uchar * kbd_str)
 {
-	uchar compare[KEYBD_DATALEN];
 	uchar magic[sizeof (kbd_magic_prefix) + 1];
 	uchar cmd_name[sizeof (kbd_command_prefix) + 1];
-	uchar key_mask;
-	uchar *str, *nxt, *suffix;
+	uchar *str, *suffix;
 	uchar *kbd_magic_keys;
 	char *cmd;
-	int i;
 
 	/*
 	 * The following string defines the characters that can pe appended
@@ -343,62 +379,48 @@ static uchar *key_match (uchar * kbd_data)
 	 * "key_magic" is checked (old behaviour); the string "125" causes
 	 * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
 	 */
-	if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
-		kbd_magic_keys = "";
+	if ((kbd_magic_keys = getenv ("magic_keys")) != NULL) {
+		/* loop over all magic keys;
+		 * use '\0' suffix in case of empty string
+		 */
+		for (suffix = kbd_magic_keys;
+		     *suffix || suffix == kbd_magic_keys;
+		     ++suffix) {
+			sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
 
-	/* loop over all magic keys;
-	 * use '\0' suffix in case of empty string
-	 */
-	for (suffix=kbd_magic_keys; *suffix || suffix==kbd_magic_keys; ++suffix) {
-		sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
 #if 0
-		printf ("### Check magic \"%s\"\n", magic);
+			printf ("### Check magic \"%s\"\n", magic);
 #endif
 
-		memcpy(compare, kbd_data, KEYBD_DATALEN);
+			if ((str = getenv (magic)) != 0) {
 
-		for (str = getenv(magic); str != NULL; str = (*nxt) ? nxt+1 : nxt) {
-			uchar c;
+#if 0
+				printf ("### Compare \"%s\" \"%s\"\n",
+					kbd_str, str);
+#endif
+				if (strcmp (kbd_str, str) == 0) {
+					sprintf (cmd_name, "%s%c",
+						 kbd_command_prefix,
+						 *suffix);
 
-			c = (uchar) simple_strtoul (str, (char **) (&nxt), 16);
-
-			if (str == nxt)				/* invalid character */
-				break;
-
-			if (c >= KEYBD_KEY_MAX)			/* bad key number */
-				goto next_magic;
-
-			key_mask = 0x80 >> (c % 8);
-
-			if (!(compare[c / 8] & key_mask))	/* key not pressed */
-				goto next_magic;
-
-			compare[c / 8] &= ~key_mask;
+					if ((cmd = getenv (cmd_name)) != 0) {
+#if 0
+						printf ("### Set PREBOOT to $(%s): \"%s\"\n",
+							cmd_name, cmd);
+#endif
+						return (cmd);
+					}
+				}
+			}
 		}
-
-		for (i=0; i<KEYBD_DATALEN; i++)
-			if (compare[i])			/* key(s) not released */
-				goto next_magic;
-
-		sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
-
-		cmd = getenv (cmd_name);
-#if 0
-		printf ("### Set PREBOOT to $(%s): \"%s\"\n",
-			cmd_name, cmd ? cmd : "<<NULL>>");
-#endif
-		*kbd_data = *suffix;
-		return (cmd);
-
-	next_magic:;
 	}
 #if 0
 	printf ("### Delete PREBOOT\n");
 #endif
-	*kbd_data = '\0';
+	*kbd_str = '\0';
 	return (NULL);
 }
-#endif							/* CONFIG_PREBOOT */
+#endif	/* CONFIG_PREBOOT */
 
 /* Read Keyboard status */
 int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
@@ -410,7 +432,7 @@ int do_kbd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 	i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
 
 	/* Read keys */
-	i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
+	i2c_read (CFG_I2C_KEY_ADDR, 0, 0, kbd_data, KEYBD_DATALEN);
 
 	puts ("Keys:");
 	for (i = 0; i < KEYBD_DATALEN; ++i) {

board/trab/vfd.c

@@ -486,7 +486,11 @@ int drv_vfd_init(void)
  	/* frame buffer endadr */
 	rLCDSADDR2 = (gd->fb_base + FRAME_BUF_SIZE) >> 1;
 	rLCDSADDR3 = ((256/4));
-	rLCDCON2 = 0x000DC000;
+rLCDCON2 = 0x000DC000;
+	if(gd->vfd_type == VFD_TYPE_MN11236)
+		rLCDCON2 = 37 << 14;	/* MN11236: 38 lines */
+	else
+		rLCDCON2 = 55 << 14;	/* T119C:   56 lines */
 	rLCDCON3 = 0x0051000A;
 	rLCDCON4 = 0x00000001;
 	if (gd->vfd_type && vfd_inv_data)

common/Makefile

@@ -28,7 +28,7 @@ LIB	= libcommon.a
 AOBJS	=
 
 COBJS	= main.o altera.o bedbug.o \
-	  cmd_autoscript.o cmd_bedbug.o cmd_boot.o \
+	  cmd_autoscript.o cmd_bedbug.o cmd_bmp.o cmd_boot.o \
 	  cmd_bootm.o cmd_cache.o cmd_console.o cmd_date.o \
 	  cmd_dcr.o cmd_diag.o cmd_doc.o cmd_nand.o cmd_dtt.o \
 	  cmd_eeprom.o cmd_elf.o cmd_fdc.o cmd_fdos.o cmd_flash.o \

common/cmd_bedbug.c

@@ -56,7 +56,7 @@ void bedbug_init( void )
 #if defined(CONFIG_4xx)
   void bedbug405_init( void );
   bedbug405_init();
-#elif defined(CONFIG_MPC860)
+#elif defined(CONFIG_8xx)
   void bedbug860_init( void );
   bedbug860_init();
 #endif

common/cmd_bmp.c

@@ -0,0 +1,118 @@
+/*
+ * (C) Copyright 2002
+ * Dtlev Zundel, DENX Software Engineering, dzu@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * BMP handling routines
+ */
+
+#include <common.h>
+#include <bmp_layout.h>
+#include <command.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_BMP)
+
+static int bmp_info (ulong addr);
+static int bmp_display (ulong addr);
+
+/*
+ * Subroutine:  do_bmp
+ *
+ * Description: Handler for 'bmp' command..
+ *
+ * Inputs:	argv[1] contains the subcommand
+ *
+ * Return:      None
+ *
+ */
+int do_bmp(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	ulong addr;
+
+	switch (argc) {
+	case 2:		/* use load_addr as default address */
+		addr = load_addr;
+		break;
+	case 3:		/* use argument */
+		addr = simple_strtoul(argv[2], NULL, 16);
+		break;
+	default:
+		printf ("Usage:\n%s\n", cmdtp->usage);
+		return 1;
+	}
+
+	/* Allow for short names
+	 * Adjust length if more sub-commands get added
+	 */
+	if (strncmp(argv[1],"info",1) == 0) {
+		return (bmp_info(addr));
+	} else if (strncmp(argv[1],"display",1) == 0) {
+		return (bmp_display(addr));
+	} else {
+		printf ("Usage:\n%s\n", cmdtp->usage);
+		return 1;
+	}
+}
+
+/*
+ * Subroutine:  bmp_info
+ *
+ * Description: Show information about bmp file in memory
+ *
+ * Inputs:	addr		address of the bmp file
+ *
+ * Return:      None
+ *
+ */
+static int bmp_info(ulong addr)
+{
+	bmp_image_t *bmp=(bmp_image_t *)addr;
+	if (!((bmp->header.signature[0]=='B') &&
+	      (bmp->header.signature[1]=='M'))) {
+		printf("There is no valid bmp file at the given address\n");
+		return(1);
+	}
+	printf("Image size    : %d x %d\n", le32_to_cpu(bmp->header.width),
+	       le32_to_cpu(bmp->header.height));
+	printf("Bits per pixel: %d\n", le16_to_cpu(bmp->header.bit_count));
+	printf("Compression   : %d\n", le32_to_cpu(bmp->header.compression));
+	return(0);
+}
+
+/*
+ * Subroutine:  bmp_display
+ *
+ * Description: Display bmp file located in memory
+ *
+ * Inputs:	addr		address of the bmp file
+ *
+ * Return:      None
+ *
+ */
+static int bmp_display(ulong addr)
+{
+	extern int lcd_display_bitmap (ulong);
+
+	return (lcd_display_bitmap (addr));
+}
+
+#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) */

common/cmd_boot.c

@@ -1000,14 +1000,14 @@ static int k_recv (void)
 		for (;;) {
 			switch (serial_getc ()) {
 			case START_CHAR:	/* start packet */
-				break;
+				goto START;
 			case ETX_CHAR:		/* ^C waiting for packet */
 				return (0);
 			default:
 				;
 			}
 		}
-			
+START:
 		/* get length of packet */
 		sum = 0;
 		new_char = serial_getc ();

common/cmd_bootm.c

@@ -98,6 +98,7 @@ static boot_os_Fcn do_bootm_linux;
 extern boot_os_Fcn do_bootm_linux;
 #endif
 static boot_os_Fcn do_bootm_netbsd;
+static boot_os_Fcn do_bootm_rtems;
 #if (CONFIG_COMMANDS & CFG_CMD_ELF)
 static boot_os_Fcn do_bootm_vxworks;
 static boot_os_Fcn do_bootm_qnxelf;
@@ -287,12 +288,17 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 
 	switch (hdr->ih_type) {
 	case IH_TYPE_STANDALONE:
-		appl = (int (*)(cmd_tbl_t *, int, int, char *[]))ntohl(hdr->ih_ep);
 		if (iflag)
 			enable_interrupts();
 
+		/* load (and uncompress), but don't start if "autostart"
+		 * is set to "no"
+		 */
+		if (((s = getenv("autostart")) != NULL) && (strcmp(s,"no") == 0))
+			return 0;
+		appl = (int (*)(cmd_tbl_t *, int, int, char *[]))ntohl(hdr->ih_ep);
 		(*appl)(cmdtp, flag, argc-1, &argv[1]);
-		break;
+		return 0;
 	case IH_TYPE_KERNEL:
 	case IH_TYPE_MULTI:
 		/* handled below */
@@ -316,6 +322,12 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	    do_bootm_netbsd (cmdtp, flag, argc, argv,
 			     addr, len_ptr, verify);
 	    break;
+	    
+	case IH_OS_RTEMS:
+	    do_bootm_rtems (cmdtp, flag, argc, argv,
+			     addr, len_ptr, verify);
+	    break;
+	     
 #if (CONFIG_COMMANDS & CFG_CMD_ELF)
 	case IH_OS_VXWORKS:
 	    do_bootm_vxworks (cmdtp, flag, argc, argv,
@@ -826,6 +838,7 @@ print_type (image_header_t *hdr)
 	case IH_OS_VXWORKS:	os = "VxWorks";			break;
 	case IH_OS_QNX:		os = "QNX";			break;
 	case IH_OS_U_BOOT:	os = "U-Boot";			break;
+	case IH_OS_RTEMS:	os = "RTEMS";			break;
 	default:		os = "Unknown OS";		break;
 	}
 
@@ -948,6 +961,29 @@ int gunzip(void *dst, int dstlen, unsigned char *src, int *lenp)
 	return (0);
 }
 
+static void
+do_bootm_rtems (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
+		ulong addr, ulong *len_ptr, int verify)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	image_header_t *hdr = &header;
+	void	(*entry_point)(bd_t *);
+
+	entry_point = (void (*)(bd_t *)) hdr->ih_ep;
+
+	printf ("## Transferring control to RTEMS (at address %08lx) ...\n",
+		(ulong)entry_point);
+
+	SHOW_BOOT_PROGRESS (15);
+
+	/*
+	 * RTEMS Parameters:
+	 *   r3: ptr to board info data
+	 */
+
+	(*entry_point ) ( gd->bd );
+}
+
 #if (CONFIG_COMMANDS & CFG_CMD_ELF)
 static void
 do_bootm_vxworks (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],

common/cmd_mii.c

@@ -55,7 +55,7 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 	unsigned short	data;
 	int		rcode = 0;
 
-#ifdef CONFIG_MPC860
+#ifdef CONFIG_8xx
 	mii_init ();
 #endif
 

common/command.c

@@ -72,6 +72,7 @@
 #include <cmd_vfd.h>		/* load a bitmap to the VFDs on TRAB */
 #include <cmd_log.h>
 #include <cmd_fdos.h>
+#include <cmd_bmp.h>
 
 #ifdef CONFIG_AMIGAONEG3SE
 #include <cmd_menu.h>
@@ -231,6 +232,7 @@ cmd_tbl_t cmd_tbl[] = {
 	CMD_TBL_AUTOSCRIPT
 	CMD_TBL_BASE
 	CMD_TBL_BDINFO
+	CMD_TBL_BMP
 #ifdef CONFIG_AMIGAONEG3SE
 	CMD_TBL_BOOTA
 #endif

common/console.c

@@ -355,7 +355,7 @@ int console_init_f (void)
 	return (0);
 }
 
-#ifdef CFG_CONSOLE_IS_IN_ENV
+#if defined(CFG_CONSOLE_IS_IN_ENV) || defined(CONFIG_SPLASH_SCREEN)
 /* search a device */
 device_t *search_device (int flags, char *name)
 {
@@ -374,7 +374,7 @@ device_t *search_device (int flags, char *name)
 	}
 	return dev;
 }
-#endif /* CFG_CONSOLE_IS_IN_ENV */
+#endif /* CFG_CONSOLE_IS_IN_ENV || CONFIG_SPLASH_SCREEN */
 
 #ifdef CFG_CONSOLE_IS_IN_ENV
 /* Called after the relocation - use desired console functions */
@@ -469,6 +469,11 @@ int console_init_r (void)
 	device_t *inputdev = NULL, *outputdev = NULL;
 	int i, items = ListNumItems (devlist);
 
+#ifdef CONFIG_SPLASH_SCREEN
+	/* suppress all output if splash screen is enabled */
+	outputdev = search_device (DEV_FLAGS_OUTPUT, "nulldev");
+#endif
+
 	/* Scan devices looking for input and output devices */
 	for (i = 1;
 	     (i <= items) && ((inputdev == NULL) || (outputdev == NULL));

common/devices.c

@@ -37,6 +37,11 @@ list_t devlist = 0;
 device_t *stdio_devices[] = { NULL, NULL, NULL };
 char *stdio_names[MAX_FILES] = { "stdin", "stdout", "stderr" };
 
+#if defined(CONFIG_SPLASH_SCREEN) && !defined(CFG_DEVICE_NULLDEV)
+#define	CFG_DEVICE_NULLDEV	1
+#endif
+
+
 #ifdef CFG_DEVICE_NULLDEV
 void nulldev_putc(const char c)
 {

common/soft_i2c.c

@@ -83,8 +83,12 @@ static void send_reset(void)
 #endif
 	int j;
 
-	I2C_ACTIVE;
+	I2C_SCL(1);
 	I2C_SDA(1);
+#ifdef	I2C_INIT
+	I2C_INIT;
+#endif
+	I2C_TRISTATE;
 	for(j = 0; j < 9; j++) {
 		I2C_SCL(0);
 		I2C_DELAY;
@@ -262,13 +266,6 @@ static uchar read_byte(int ack)
  */
 void i2c_init (int speed, int slaveaddr)
 {
-#ifdef	CONFIG_8xx
-	volatile immap_t *immr = (immap_t *)CFG_IMMR;
-#endif
-
-#ifdef	I2C_INIT
-	I2C_INIT;
-#endif
 	/*
          * WARNING: Do NOT save speed in a static variable: if the
          * I2C routines are called before RAM is initialized (to read

cpu/mips/cache.S

@@ -250,12 +250,17 @@ dcache_disable:
 * RETURNS: N/A
 *
 */
+#if defined(CONFIG_INCA_IP)
+# define	CACHE_LOCK_SIZE	(CFG_DCACHE_SIZE)
+#elif defined(CONFIG_PURPLE)
+# define	CACHE_LOCK_SIZE	(CFG_DCACHE_SIZE/2)
+#endif
 	.globl	mips_cache_lock
 	.ent	mips_cache_lock
 mips_cache_lock:
-	li	a1, K0BASE - CFG_DCACHE_SIZE/2
+	li	a1, K0BASE - CACHE_LOCK_SIZE
 	addu	a0, a1
-	li	a2, CFG_DCACHE_SIZE/2
+	li	a2, CACHE_LOCK_SIZE
 	li	a3, CFG_CACHELINE_SIZE
 	move	a1, a2
 	icacheop(a0,a1,a2,a3,0x1d)

cpu/mpc8xx/bedbug_860.c

@@ -11,7 +11,7 @@
 #include <bedbug/regs.h>
 #include <bedbug/ppc.h>
 
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) && defined(CONFIG_MPC860)
+#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) && defined(CONFIG_8xx)
 
 #define MAX_BREAK_POINTS 2
 

cpu/mpc8xx/cpu.c

@@ -44,7 +44,7 @@ static char *cpu_warning = "\n         " \
 
 #if ((defined(CONFIG_MPC860) || defined(CONFIG_MPC855)) && \
      !defined(CONFIG_MPC862))
-# ifdef	CONFIG_MPC855
+# ifdef CONFIG_MPC855
 #  define	ID_STR	"PC855"
 # else
 #  define	ID_STR	"PC860"

cpu/mpc8xx/lcd.c

@@ -39,12 +39,10 @@
 /************************************************************************/
 /* ** CONFIG STUFF -- should be moved to board config file		*/
 /************************************************************************/
-#ifndef CONFIG_EDT32F10
 #define CONFIG_LCD_LOGO
 #define LCD_INFO		/* Display Logo, (C) and system info	*/
-#endif
 
-#ifdef CONFIG_V37
+#if defined(CONFIG_V37) || defined(CONFIG_EDT32F10)
 #undef CONFIG_LCD_LOGO
 #undef LCD_INFO
 #endif
@@ -53,6 +51,14 @@
 /* #define CFG_INVERT_COLORS */	/* Not needed - adjust vl_dp instead 	*/
 /************************************************************************/
 
+/************************************************************************/
+/* ** BITMAP DISPLAY SUPPORT  -- should probably be moved elsewhere	*/
+/************************************************************************/
+
+#if (CONFIG_COMMANDS & CFG_CMD_BMP)
+#include <bmp_layout.h>
+#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) */
+
 /************************************************************************/
 /* ** FONT AND LOGO DATA						*/
 /************************************************************************/
@@ -177,6 +183,8 @@ static vidinfo_t panel_info = {
 /*
  * Sharp LQ057Q3DC02 display. Active, color, single scan.
  */
+#define LCD_DF 12
+
 static vidinfo_t panel_info = {
     320, 240, 0, 0, CFG_HIGH, CFG_HIGH, CFG_LOW, CFG_LOW, CFG_HIGH,
     3, 0, 0, 1, 1, 15, 4, 0, 3
@@ -260,11 +268,11 @@ static vidinfo_t panel_info = {
  * Emerging Display Technologies 320x240. Passive, monochrome, single scan.
  */
 #define LCD_BPP		LCD_MONOCHROME
-#define LCD_DF		20
+#define LCD_DF		10
 
 static vidinfo_t panel_info = {
     320, 240, 0, 0, CFG_HIGH, CFG_HIGH, CFG_HIGH, CFG_HIGH, CFG_LOW,
-    LCD_BPP,  0, 0, 0, 0, 0, 15, 0, 0
+    LCD_BPP,  0, 0, 0, 0, 33, 0, 0, 0
 };
 #endif
 /*----------------------------------------------------------------------*/
@@ -977,15 +985,18 @@ static void lcd_enable (void)
     	c |= 0x07;	/* Power on CCFL, Enable CCFL, Chip Enable LCD */
 	pic_write (0x60, c);
     }
-#elif defined(CONFIG_R360MPI)
-    {
-	extern void r360_pwm_write (uchar reg, uchar val);
-
-	r360_pwm_write(8, 1);
-	r360_pwm_write(0, 4);
-	r360_pwm_write(1, 6);
-    }
 #endif /* CONFIG_LWMON */
+
+#if defined(CONFIG_R360MPI)
+    {
+	extern void r360_i2c_lcd_write (uchar data0, uchar data1);
+
+	r360_i2c_lcd_write(0x10, 0x01);
+	r360_i2c_lcd_write(0x20, 0x01);
+	r360_i2c_lcd_write(0x3F, 0xFF);
+	r360_i2c_lcd_write(0x47, 0xFF);
+    }
+#endif /* CONFIG_R360MPI */
 }
 
 /*----------------------------------------------------------------------*/
@@ -1003,10 +1014,12 @@ static void lcd_disable (void)
     }
 #elif defined(CONFIG_R360MPI)
     {
-	extern void r360_pwm_write (uchar reg, uchar val);
+	extern void r360_i2c_lcd_write (uchar data0, uchar data1);
 
-	r360_pwm_write(0, 0);
-	r360_pwm_write(1, 0);
+	r360_i2c_lcd_write(0x10, 0x00);
+	r360_i2c_lcd_write(0x20, 0x00);
+	r360_i2c_lcd_write(0x30, 0x00);
+	r360_i2c_lcd_write(0x40, 0x00);
     }
 #endif /* CONFIG_LWMON */
 	/* Disable the LCD panel */
@@ -1059,6 +1072,100 @@ static void bitmap_plot (int x, int y)
 }
 #endif /* CONFIG_LCD_LOGO */
 
+#if (CONFIG_COMMANDS & CFG_CMD_BMP)
+/*
+ * Display the BMP file located at address bmp_image.
+ * Only uncompressed
+ */
+int lcd_display_bitmap(ulong bmp_image)
+{
+	volatile immap_t *immr = (immap_t *) CFG_IMMR;
+	volatile cpm8xx_t *cp = &(immr->im_cpm);
+	ushort *cmap;
+	ushort i, j;
+	uchar *fb;
+	bmp_image_t *bmp=(bmp_image_t *)bmp_image;
+	uchar *bmap;
+	ushort padded_line;
+	unsigned long width, height;
+	unsigned colors,bpix;
+	unsigned long compression;
+
+	if (!((bmp->header.signature[0]=='B') &&
+	      (bmp->header.signature[1]=='M'))) {
+		printf ("Error: no valid bmp image at %lx\n", bmp_image);
+		return 1;
+	}
+
+	width = le32_to_cpu (bmp->header.width);
+	height = le32_to_cpu (bmp->header.height);
+	colors = 1<<le16_to_cpu (bmp->header.bit_count);
+	compression = le32_to_cpu (bmp->header.compression);
+
+	bpix = NBITS(panel_info.vl_bpix);
+
+	if ((bpix != 1) && (bpix != 8)) {
+		printf ("Error: %d bit/pixel mode not supported by U-Boot\n",
+			bpix);
+		return 1;
+	}
+
+	if (bpix != le16_to_cpu(bmp->header.bit_count)) {
+		printf ("Error: %d bit/pixel mode, but BMP has %d bit/pixel\n",
+			bpix,
+			le16_to_cpu(bmp->header.bit_count));
+		return 1;
+	}
+
+	if (compression!=BMP_BI_RGB) {
+		printf ("Error: compression type %ld not supported\n",
+			compression);
+		return 1;
+	}
+
+	debug ("Display-bmp: %d x %d  with %d colors\n",
+	       width, height, colors);
+
+	if (bpix==8) {
+		/* Fill the entire color map */
+		cmap = (ushort *)&(cp->lcd_cmap[255*sizeof(ushort)]);
+
+		/* Set color map */
+		for (i = 0; i < colors; ++i) {
+			bmp_color_table_entry_t cte = bmp->color_table[i];
+			ushort colreg =
+				((cte.red>>4)   << 8) |
+				((cte.green>>4) << 4) |
+				(cte.blue>>4) ;
+#ifdef	CFG_INVERT_COLORS
+			colreg ^= 0xFFF;
+#endif
+			*cmap-- = colreg;
+		}
+	}
+
+	padded_line = (width&0x3) ? ((width&~0x3)+4) : (width);
+	if (width>panel_info.vl_col)
+		width = panel_info.vl_col;
+	if (height>panel_info.vl_row)
+		height = panel_info.vl_row;
+
+	bmap = (uchar *)bmp + le32_to_cpu (bmp->header.data_offset);
+	fb   = (uchar *)
+		(lcd_base +
+		 (((height>=panel_info.vl_row) ? panel_info.vl_row : height)-1)
+		 * lcd_line_length);
+	for (i = 0; i < height; ++i) {
+		for (j = 0; j < width ; j++)
+			*(fb++)=255-*(bmap++);
+		bmap += (width - padded_line);
+		fb   -= (width + lcd_line_length);
+	}
+
+	return (0);
+}
+#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) */
+
 /*----------------------------------------------------------------------*/
 
 static void *lcd_logo (void)
@@ -1070,6 +1177,19 @@ static void *lcd_logo (void)
 	char temp[32];
 #endif /* LCD_INFO */
 
+#ifdef CONFIG_SPLASH_SCREEN
+	char *s;
+	ulong addr;
+
+	if ((s = getenv("splashimage")) != NULL) {
+		addr = simple_strtoul(s, NULL, 16);
+
+		if (lcd_display_bitmap (addr) == 0) {
+			return ((void *)lcd_base);
+		}
+	}
+#endif	/* CONFIG_SPLASH_SCREEN */
+
 #ifdef CONFIG_LCD_LOGO
 	bitmap_plot (0, 0);
 #endif /* CONFIG_LCD_LOGO */
@@ -1079,7 +1199,7 @@ static void *lcd_logo (void)
 	sprintf (info, "%s (%s - %s) ", U_BOOT_VERSION, __DATE__, __TIME__);
 	lcd_drawchars (LCD_INFO_X, LCD_INFO_Y, info, strlen(info));
 
-	sprintf (info, "(C) 2002 DENX Software Engineering");
+	sprintf (info, "(C) 2003 DENX Software Engineering");
 	lcd_drawchars (LCD_INFO_X, LCD_INFO_Y + VIDEO_FONT_HEIGHT,
 					info, strlen(info));
 

doc/README.Purple

@@ -0,0 +1,52 @@
+Installation Instructions:
+--------------------------
+
+1. Put the s2 switch into the following position:
+
+	 1  0
+	------
+	|x   |
+	|   x|
+	|x   |	
+	|   X|	
+	------
+
+2. Connect to the serial console and to the BDI. Power on. On the
+   serial line, you should see:
+
+	PURPLE@1.2>
+
+3. Type '8'. No echo will be displayed. In response, you should get:
+
+	7A(pass)
+
+4. From BDI, enter command:
+
+	mmw 0xb800d860 0x0042c7ff
+
+5. Then, from BDI:
+
+	erase 0xB0000000
+	erase 0xB0008000
+	erase 0xB000C000
+	erase 0xB0010000
+	erase 0xB0020000
+
+	prog 0xB0000000 <u-boot.bin> bin
+
+6. Power off. Restore the original S2 switch position. Power on.
+   U-Boot should come up.
+
+
+
+Implementation Notes:
+---------------------
+
+Due to the RAM/flash bus arbitration problem the suggested workaround
+had to be implemented. It works okay. On the downside is that you
+can't really check whether 'erase' is complete by polling flash as it
+is usually done. Instead, the flash driver simply waits for a given
+time and assumes that erase then has passed. This behaviour is
+identical to what the VxWorks driver does; also, the same timeout (6
+seconds) was chosen. Note that this timeout applies for each errase
+operation, i. e. per erased sector.

doc/README.commands

@@ -15,6 +15,7 @@ as		2
 autoscr		5
 base		2
 bdinfo		2
+bmp		3
 bootelf		7
 bootm		5
 bootp		5

drivers/Makefile

@@ -33,7 +33,8 @@ OBJS	= 3c589.o 5701rls.o at91rm9200_ether.o \
 	  eepro100.o i8042.o inca-ip_sw.o \
 	  natsemi.o ns16550.o ns8382x.o ns87308.o \
 	  pci.o pci_auto.o pci_indirect.o \
-	  pcnet.o s3c24x0_i2c.o sed13806.o serial.o \
+	  pcnet.o plb2800_eth.o \
+	  s3c24x0_i2c.o sed13806.o serial.o \
 	  smc91111.o smiLynxEM.o sym53c8xx.o \
 	  tigon3.o w83c553f.o
 

drivers/plb2800_eth.c

@@ -0,0 +1,396 @@
+/*
+ * PLB2800 internal switch ethernet driver.
+ *
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) \
+	&& defined(CONFIG_PLB2800_ETHER)
+
+#include <malloc.h>
+#include <net.h>
+#include <asm/addrspace.h>
+
+
+#define NUM_RX_DESC	PKTBUFSRX
+#define TOUT_LOOP	1000000
+
+#define LONG_REF(addr) (*((volatile unsigned long*)addr))
+
+#define CMAC_CRX_CTRL	LONG_REF(0xb800c870)
+#define CMAC_CTX_CTRL	LONG_REF(0xb800c874)
+#define SYS_MAC_ADDR_0	LONG_REF(0xb800c878)
+#define SYS_MAC_ADDR_1	LONG_REF(0xb800c87c)
+#define MIPS_H_MASK	LONG_REF(0xB800C810)
+
+#define MA_LEARN	LONG_REF(0xb8008004)
+#define DA_LOOKUP	LONG_REF(0xb8008008)
+
+#define CMAC_CRX_CTRL_PD	0x00000001
+#define CMAC_CRX_CTRL_CG	0x00000002
+#define CMAC_CRX_CTRL_PL_SHIFT	2
+#define CMAC_CRIT		0x0
+#define CMAC_NON_CRIT		0x1
+#define MBOX_STAT_ID_SHF	28
+#define MBOX_STAT_CP		0x80000000
+#define MBOX_STAT_MB		0x00000001
+#define EN_MA_LEARN		0x02000000
+#define EN_DA_LKUP		0x01000000
+#define MA_DEST_SHF		11 
+#define DA_DEST_SHF		11
+#define DA_STATE_SHF		19
+#define TSTAMP_MS		0x00000000
+#define SW_H_MBOX4_MASK		0x08000000
+#define SW_H_MBOX3_MASK		0x04000000
+#define SW_H_MBOX2_MASK		0x02000000
+#define SW_H_MBOX1_MASK		0x01000000
+
+typedef volatile struct {
+  unsigned int stat;
+  unsigned int cmd;
+  unsigned int cnt;
+  unsigned int adr;
+} mailbox_t;
+
+#define MBOX_REG(mb) ((mailbox_t*)(0xb800c830+(mb<<4)))
+
+typedef volatile struct {
+  unsigned int word0;
+  unsigned int word1;
+  unsigned int word2;
+} mbhdr_t;
+
+#define MBOX_MEM(mb) ((void*)(0xb800a000+((3-mb)<<11)))
+
+
+static int plb2800_eth_init(struct eth_device *dev, bd_t * bis);
+static int plb2800_eth_send(struct eth_device *dev, volatile void *packet,
+						  int length);
+static int plb2800_eth_recv(struct eth_device *dev);
+static void plb2800_eth_halt(struct eth_device *dev);
+
+static void plb2800_set_mac_addr(struct eth_device *dev, unsigned char * addr);
+static unsigned char * plb2800_get_mac_addr(void);
+
+static int rx_new;
+static int mac_addr_set = 0;
+
+
+int plb2800_eth_initialize(bd_t * bis)
+{
+	struct eth_device *dev;
+	ulong temp;
+
+#ifdef DEBUG
+	printf("Entered plb2800_eth_initialize()\n");
+#endif
+
+	if (!(dev = (struct eth_device *) malloc (sizeof *dev)))
+	{
+		printf("Failed to allocate memory\n");
+		return 0;
+	}
+	memset(dev, 0, sizeof(*dev));
+
+	sprintf(dev->name, "PLB2800 Switch");
+	dev->init = plb2800_eth_init;
+	dev->halt = plb2800_eth_halt;
+	dev->send = plb2800_eth_send;
+	dev->recv = plb2800_eth_recv;
+
+	eth_register(dev);
+
+	/* bug fix */ 	
+	*(ulong *)0xb800e800 = 0x838;	
+
+	/* Set MBOX ownership */
+	temp = CMAC_CRIT << MBOX_STAT_ID_SHF;
+	MBOX_REG(0)->stat = temp;
+	MBOX_REG(1)->stat = temp;
+
+	temp = CMAC_NON_CRIT << MBOX_STAT_ID_SHF;	
+	MBOX_REG(2)->stat = temp;
+	MBOX_REG(3)->stat = temp;
+	
+	plb2800_set_mac_addr(dev, plb2800_get_mac_addr());
+
+	/* Disable all Mbox interrupt */
+	temp = MIPS_H_MASK;
+	temp &= ~ (SW_H_MBOX1_MASK | SW_H_MBOX2_MASK | SW_H_MBOX3_MASK | SW_H_MBOX4_MASK) ;			
+	MIPS_H_MASK = temp;
+
+#ifdef DEBUG
+	printf("Leaving plb2800_eth_initialize()\n");
+#endif
+
+	return 1;
+}
+
+static int plb2800_eth_init(struct eth_device *dev, bd_t * bis)
+{
+#ifdef DEBUG
+	printf("Entering plb2800_eth_init()\n");
+#endif
+
+	plb2800_set_mac_addr(dev, dev->enetaddr);
+
+	rx_new = 0;
+
+#ifdef DEBUG
+	printf("Leaving plb2800_eth_init()\n");
+#endif
+
+	return 0;
+}
+
+
+static int plb2800_eth_send(struct eth_device *dev, volatile void *packet,
+						  int length)
+{
+	int                    i;
+	int                    res         = -1;
+	u32                    temp;
+	mailbox_t *            mb          = MBOX_REG(0);
+	char      *            mem         = MBOX_MEM(0);
+
+#ifdef DEBUG
+	printf("Entered plb2800_eth_send()\n");
+#endif
+
+	if (length <= 0)
+	{
+		printf ("%s: bad packet size: %d\n", dev->name, length);
+		goto Done;
+	}
+
+	if (length < 64)
+	{
+		length = 64;
+	}
+
+	temp = CMAC_CRX_CTRL_CG | ((length + 4) << CMAC_CRX_CTRL_PL_SHIFT);
+
+#ifdef DEBUG
+	printf("0 mb->stat = 0x%x\n",  mb->stat);
+#endif
+
+	for(i = 0; mb->stat & (MBOX_STAT_CP | MBOX_STAT_MB); i++)
+	{
+		if (i >= TOUT_LOOP)
+		{
+			printf("%s: tx buffer not ready\n", dev->name);
+			printf("1 mb->stat = 0x%x\n",  mb->stat);
+			goto Done;
+		}
+	}
+
+		/* For some strange reason, memcpy doesn't work, here!
+		 */
+	do
+	{
+		int words = (length >> 2) + 1;
+		unsigned int* dst = (unsigned int*)(mem);
+		unsigned int* src = (unsigned int*)(packet);
+		for (i = 0; i < words; i++)
+		{
+			*dst = *src;
+			dst++;
+			src++;
+		};
+	} while(0);
+
+	CMAC_CRX_CTRL = temp;
+	mb->cmd = MBOX_STAT_CP;
+	
+#ifdef DEBUG
+	printf("2 mb->stat = 0x%x\n",  mb->stat);
+#endif
+
+	res = length;
+Done:
+
+#ifdef DEBUG
+	printf("Leaving plb2800_eth_send()\n");
+#endif
+
+	return res;
+}
+
+
+static int plb2800_eth_recv(struct eth_device *dev)
+{
+	int                    length  = 0;
+	mailbox_t            * mbox    = MBOX_REG(3);
+	unsigned char        * hdr     = MBOX_MEM(3);
+	unsigned int           stat;
+
+#ifdef DEBUG
+	printf("Entered plb2800_eth_recv()\n");
+#endif
+
+	for (;;)
+	{
+		stat = mbox->stat;
+
+		if (!(stat & MBOX_STAT_CP))
+		{
+			break;
+		}
+		
+		length = ((*(hdr + 6) & 0x3f) << 8) + *(hdr + 7);
+		memcpy((void *)NetRxPackets[rx_new], hdr + 12, length);
+
+		stat &= ~MBOX_STAT_CP;
+		mbox->stat = stat;
+#ifdef DEBUG
+		{
+			int i;
+			for (i=0;i<length - 4;i++)
+			{
+				if (i % 16 == 0) printf("\n%04x: ", i);
+				printf("%02X ", NetRxPackets[rx_new][i]);
+			}
+			printf("\n");
+		}
+#endif
+
+		if (length)
+		{
+#ifdef DEBUG
+			printf("Received %d bytes\n", length);
+#endif
+			NetReceive((void*)(NetRxPackets[rx_new]),
+			            length - 4);
+		}
+		else
+		{
+#if 1
+			printf("Zero length!!!\n");
+#endif
+		}
+
+		rx_new = (rx_new + 1) % NUM_RX_DESC;
+	}
+
+#ifdef DEBUG
+	printf("Leaving plb2800_eth_recv()\n");
+#endif
+
+	return length;
+}
+
+
+static void plb2800_eth_halt(struct eth_device *dev)
+{
+#ifdef DEBUG
+	printf("Entered plb2800_eth_halt()\n");
+#endif
+
+#ifdef DEBUG
+	printf("Leaving plb2800_eth_halt()\n");
+#endif
+}
+
+static void plb2800_set_mac_addr(struct eth_device *dev, unsigned char * addr)
+{
+	char packet[60];
+	ulong temp;
+	int ix;
+
+	if (mac_addr_set ||
+	    NULL == addr || memcmp(addr, "\0\0\0\0\0\0", 6) == 0)
+	{
+		return;
+	}
+	
+	/* send one packet through CPU port
+	 * in order to learn system MAC address
+	 */		
+
+	/* Set DA_LOOKUP register */
+	temp = EN_MA_LEARN | (0 << DA_STATE_SHF) | (63 << DA_DEST_SHF); 
+	DA_LOOKUP = temp;
+
+	/* Set MA_LEARN register */
+	temp = 50 << MA_DEST_SHF; 	/* static entry */
+	MA_LEARN = temp;
+
+	/* set destination address */
+	for (ix=0;ix<6;ix++)
+		packet[ix] = 0xff;
+ 
+	/* set source address = system MAC address */
+	for (ix=0;ix<6;ix++)
+		packet[6+ix] = addr[ix];
+
+	/* set type field */
+	packet[12]=0xaa;
+	packet[13]=0x55;
+
+	/* set data field */
+	for(ix=14;ix<60;ix++)
+		packet[ix] = 0x00;
+	
+#ifdef DEBUG
+	for (ix=0;ix<6;ix++)
+		printf("mac_addr[%d]=%02X\n", ix, (unsigned char)packet[6+ix]);
+#endif
+
+	/* set one packet */
+	plb2800_eth_send(dev, packet, sizeof(packet));
+
+	/* delay for a while */
+	for(ix=0;ix<65535;ix++)
+		temp = ~temp;
+
+	/* Set CMAC_CTX_CTRL register */	
+	temp = TSTAMP_MS;	/* no autocast */
+	CMAC_CTX_CTRL = temp;
+         
+	/* Set DA_LOOKUP register */
+	temp = EN_DA_LKUP;
+	DA_LOOKUP = temp;
+
+	mac_addr_set = 1;
+}
+
+static unsigned char * plb2800_get_mac_addr(void)
+{
+	static unsigned char addr[6];
+	char *tmp, *end;
+	int i;
+	
+	tmp = getenv ("ethaddr");
+	if (NULL == tmp) return NULL;
+	
+	for (i=0; i<6; i++) {
+		addr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0;
+		if (tmp)
+			tmp = (*end) ? end+1 : end;
+	}
+
+	return addr;
+}
+
+#endif /* CONFIG_PLB2800_ETHER */

include/bmp_layout.h

@@ -0,0 +1,77 @@
+/* (C) Copyright 2002
+ * Detlev Zundel, DENX Software Engineering, dzu@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/************************************************************************/
+/* ** Layout of a bmp file						*/
+/************************************************************************/
+
+#ifndef _BMP_H_
+#define _BMP_H_
+
+typedef struct bmp_color_table_entry {
+  __u8 blue;
+  __u8 green;
+  __u8 red;
+  __u8 reserved;
+} __attribute__((packed)) bmp_color_table_entry_t;
+
+/* When accessing these fields, remember that they are stored in little
+   endian format, so use linux macros, e.g. le32_to_cpu(width)          */
+
+typedef	struct bmp_header {
+  /* Header */
+  char signature[2];
+  __u32 file_size;
+  __u32 reserved;
+  __u32 data_offset;
+  /* InfoHeader */
+  __u32 size;
+  __u32 width;
+  __u32 height;
+  __u16 planes;
+  __u16 bit_count;
+  __u32 compression;
+  __u32 image_size;
+  __u32 x_pixels_per_m;
+  __u32 y_pixels_per_m;
+  __u32 colors_used;
+  __u32 colors_important;
+  /* ColorTable */
+  
+}  __attribute__((packed)) bmp_header_t;
+
+typedef struct bmp_image {
+  bmp_header_t header;
+  /* We use a zero sized array just as a placeholder for variable
+     sized array */
+  bmp_color_table_entry_t color_table[0];
+} bmp_image_t;
+
+/* Data in the bmp_image is aligned to this length */
+#define BMP_DATA_ALIGN 4
+
+/* Constants for the compression field */
+#define BMP_BI_RGB  0
+#define BMP_BI_RLE8 1
+#define BMP_BI_RLE4 2
+
+#endif /* _BMP_H_ */

include/cmd_bmp.h

@@ -0,0 +1,44 @@
+/* (C) Copyright 2002
+ * Detlev Zundel, DENX Software Engineering, dzu@denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Bitmap display support
+ */
+#ifndef	_CMD_BMP_H
+#define	_CMD_BMP_H
+
+#include <common.h>
+#include <command.h>
+
+
+#if (CONFIG_COMMANDS & CFG_CMD_BMP)
+
+#define CMD_TBL_BMP	MK_CMD_TBL_ENTRY(				\
+	"bmp", 3,	3,	1,	do_bmp,				\
+	"bmp     - manipulate BMP image data\n",			\
+	"\nbmp info <imageAddr>    - display image info\n"		\
+	"bmp display <imageAddr> - display image\n"			\
+),
+int do_bmp (cmd_tbl_t *cmdtp,  int flag, int argc, char *argv[]);
+
+#else
+#define CMD_TBL_BMP
+#endif
+
+#endif	/* _CMD_BMP_H */

include/cmd_confdefs.h

@@ -79,6 +79,7 @@
 #define CFG_CMD_FDOS	0x0000200000000000	/* Floppy DOS support		*/
 #define CFG_CMD_VFD	0x0000400000000000	/* VFD support (TRAB)		*/
 #define CFG_CMD_NAND	0x0000800000000000	/* NAND support        		*/
+#define CFG_CMD_BMP	0x0001000000000000	/* BMP support			*/
 
 #define CFG_CMD_ALL	0xFFFFFFFFFFFFFFFF	/* ALL commands			*/
 
@@ -87,6 +88,7 @@
  */
 #define CFG_CMD_NONSTD (CFG_CMD_ASKENV	| \
 			CFG_CMD_BEDBUG	| \
+			CFG_CMD_BMP	| \
 			CFG_CMD_BSP	| \
 			CFG_CMD_CACHE	| \
 			CFG_CMD_DATE	| \

include/common.h

@@ -75,7 +75,8 @@ typedef	void (interrupt_handler_t)(void *);
 
 /* enable common handling for all TQM8xxL boards */
 #if defined(CONFIG_TQM823L) || defined(CONFIG_TQM850L) || \
-    defined(CONFIG_TQM855L) || defined(CONFIG_TQM860L)
+    defined(CONFIG_TQM855L) || defined(CONFIG_TQM860L) || \
+    defined(CONFIG_TQM862L)
 # ifndef CONFIG_TQM8xxL
 #  define CONFIG_TQM8xxL
 # endif

include/commproc.h

@@ -1362,9 +1362,11 @@ typedef struct scc_enet {
 #define SICR_ENET_CLKRT	((uint)0x00002600)
 #endif	/* CONFIG_MVS v1, CONFIG_TQM823L, CONFIG_TQM850L, etc. */
 
-/***  TQM860L, TQM855L ************************************************/
+/***  TQM855L, TQM860L, TQM862L  **************************************/
 
-#if (defined(CONFIG_TQM860L) || defined(CONFIG_TQM855L))
+#if defined(CONFIG_TQM855L) || \
+    defined(CONFIG_TQM860L) || \
+    defined(CONFIG_TQM862L)
 
 # ifdef CONFIG_SCC1_ENET	/* use SCC for 10Mbps Ethernet	*/
 
@@ -1412,7 +1414,7 @@ typedef struct scc_enet {
 #define PD_MII_MASK	((ushort)0x1FFF)	/* PD 3...15 */
 
 # endif	/* CONFIG_FEC_ENET */
-#endif	/* CONFIG_TQM860L, CONFIG_TQM855L */
+#endif	/* CONFIG_TQM855L, TQM860L, TQM862L */
 
 /***  V37  **********************************************************/
 

include/configs/LANTEC.h

@@ -84,6 +84,7 @@
 #define CONFIG_CMD_NORMAL	(CONFIG_CMD_DFL & ~CFG_CMD_BOOTD)
 #define CONFIG_CMD_GDB		(CONFIG_CMD_NORMAL | CFG_CMD_KGDB)
 #define CONFIG_CMD_FULL		(CFG_CMD_ALL & ~CFG_CMD_BEDBUG	\
+					     & ~CFG_CMD_BMP	\
 					     & ~CFG_CMD_BSP	\
 					     & ~CFG_CMD_DOC	\
 					     & ~CFG_CMD_DTT	\

include/configs/MPC8260ADS.h

@@ -114,6 +114,7 @@
 
 #define CONFIG_COMMANDS		(CFG_CMD_ALL & ~( \
 				 CFG_CMD_BEDBUG | \
+				 CFG_CMD_BMP	| \
 				 CFG_CMD_BSP	| \
 				 CFG_CMD_DATE	| \
 				 CFG_CMD_DOC	| \

include/configs/MPC8266ADS.h

@@ -113,6 +113,7 @@
 
 #define CONFIG_COMMANDS		(CFG_CMD_ALL & ~( \
 				 CFG_CMD_BEDBUG | \
+				 CFG_CMD_BMP	| \
 				 CFG_CMD_BSP	| \
 				 CFG_CMD_DATE	| \
 				 CFG_CMD_DOC	| \

include/configs/R360MPI.h

@@ -40,6 +40,8 @@
 #undef  CONFIG_EDT32F10
 #define CONFIG_SHARP_LQ057Q3DC02
 
+#define	CONFIG_SPLASH_SCREEN
+
 #define MPC8XX_FACT             1		/* Multiply by 1	*/
 #define MPC8XX_XIN              50000000	/* 50 MHz in		*/
 #define CONFIG_8xx_GCLK_FREQ    50000000 /* define if can't use get_gclk_freq */
@@ -47,7 +49,7 @@
 #define	CONFIG_8xx_CONS_SMC1	1	/* Console is on SMC1		*/
 #undef	CONFIG_8xx_CONS_SMC2
 #undef	CONFIG_8xx_CONS_NONE
-#define CONFIG_BAUDRATE		9600	/* console baudrate = 9600bps	*/
+#define CONFIG_BAUDRATE		115200	/* console baudrate in bps	*/
 #if 0
 #define CONFIG_BOOTDELAY	-1	/* autoboot disabled		*/
 #else
@@ -83,7 +85,7 @@
 #endif	/* CONFIG_LCD */
 #endif
 
-#undef	CONFIG_CAN_DRIVER		/* CAN Driver support disabled	*/
+#define	CONFIG_CAN_DRIVER		/* CAN Driver support enabled	*/
 
 #define CONFIG_BOOTP_MASK	(CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
 
@@ -113,11 +115,12 @@
 				else    immr->im_cpm.cp_pbdat &= ~PB_SCL
 #define I2C_DELAY		udelay(50)
 
-#define CFG_I2C_PWM_ADDR	0x58	/* Power management coprocessor */
-#define CFG_I2C_KBD_ADDR	0x50	/* Keyboard coprocessor */
-#define CFG_I2C_TERM_ADDR	0x49	/* Temperature Sensors */
+#define CFG_I2C_LCD_ADDR	0x8	/* LCD Control */
+#define CFG_I2C_KEY_ADDR	0x9	/* Keyboard coprocessor */
+#define CFG_I2C_TEM_ADDR	0x49	/* Temperature Sensors */
 
 #define CONFIG_COMMANDS	      ( CONFIG_CMD_DFL	| \
+				CFG_CMD_BMP	| \
 				CFG_CMD_DHCP	| \
 				CFG_CMD_DATE	| \
 				CFG_CMD_I2C	| \
@@ -232,11 +235,7 @@
  *-----------------------------------------------------------------------
  * PCMCIA config., multi-function pin tri-state
  */
-#ifndef	CONFIG_CAN_DRIVER
 #define CFG_SIUMCR	(SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
-#else	/* we must activate GPL5 in the SIUMCR for CAN */
-#define CFG_SIUMCR	(SIUMCR_DBGC11 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
-#endif	/* CONFIG_CAN_DRIVER */
 
 /*-----------------------------------------------------------------------
  * TBSCR - Time Base Status and Control				11-26
@@ -362,20 +361,31 @@
 
 
 /*
- * BR1 and OR1 (SDRAM)
+ * BR2 and OR2 (SDRAM)
  *
  */
-#define SDRAM_BASE1_PRELIM	0x00000000	/* SDRAM bank #0	*/
+#define SDRAM_BASE2_PRELIM	0x00000000	/* SDRAM bank #0	*/
 #define	SDRAM_MAX_SIZE		0x04000000	/* max 64 MB per bank	*/
 
-#define CFG_PRELIM_OR1_AM	0xF8000000	/* OR addr mask */
+#define CFG_PRELIM_OR2_AM	0xF8000000	/* OR addr mask */
 
 /* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care)	*/
 #define CFG_OR_TIMING_SDRAM	(OR_ACS_DIV1  | OR_CSNT_SAM | \
 				 OR_SCY_0_CLK | OR_G5LS)
 
-#define CFG_OR1_PRELIM	(CFG_PRELIM_OR1_AM | CFG_OR_TIMING_SDRAM )
-#define CFG_BR1_PRELIM	((SDRAM_BASE1_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
+#define CFG_OR2_PRELIM	(CFG_PRELIM_OR2_AM | CFG_OR_TIMING_SDRAM )
+#define CFG_BR2_PRELIM	((SDRAM_BASE2_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
+
+/*
+ * BR3 and OR3 (CAN Controller)
+ */
+#ifdef CONFIG_CAN_DRIVER
+#define CFG_CAN_BASE		0xC0000000	/* CAN base address   */
+#define CFG_CAN_OR_AM		0xFFFF8000	/* 32 kB address mask */
+#define CFG_OR3_CAN		(CFG_CAN_OR_AM | OR_G5LA |OR_BI)
+#define CFG_BR3_CAN		((CFG_CAN_BASE & BR_BA_MSK) | \
+				 BR_PS_8 | BR_MS_UPMB | BR_V)
+#endif	/* CONFIG_CAN_DRIVER */
 
 
 /*

include/configs/TQM862L.h

@@ -0,0 +1,473 @@
+/*
+ * (C) Copyright 2000, 2001, 2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+
+#define CONFIG_MPC860		1
+#define CONFIG_MPC860T		1
+#define CONFIG_MPC862		1
+
+#define CONFIG_TQM862L		1	/* ...on a TQM8xxL module	*/
+
+#define	CONFIG_8xx_CONS_SMC1	1	/* Console is on SMC1		*/
+#undef	CONFIG_8xx_CONS_SMC2
+#undef	CONFIG_8xx_CONS_NONE
+
+#define CONFIG_BAUDRATE		115200	/* console baudrate = 115kbps	*/
+
+#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
+
+#define	CONFIG_CLOCKS_IN_MHZ	1	/* clocks passsed to Linux in MHz */
+
+#define CONFIG_BOARD_TYPES	1	/* support board types		*/
+
+#define CONFIG_PREBOOT	"echo;"	\
+	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+	"echo"
+
+#undef	CONFIG_BOOTARGS
+
+#define	CONFIG_EXTRA_ENV_SETTINGS					\
+	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
+		"nfsroot=$(serverip):$(rootpath)\0"			\
+	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
+	"addip=setenv bootargs $(bootargs) "				\
+		"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"	\
+		":$(hostname):$(netdev):off panic=1\0"			\
+	"flash_nfs=run nfsargs addip;"					\
+		"bootm $(kernel_addr)\0"				\
+	"flash_self=run ramargs addip;"					\
+		"bootm $(kernel_addr) $(ramdisk_addr)\0"		\
+	"net_nfs=tftp 200000 $(bootfile);run nfsargs addip;bootm\0"	\
+	"rootpath=/opt/eldk/ppc_8xx\0"					\
+	"bootfile=/tftpboot/TQM860L/uImage\0"				\
+	"kernel_addr=40040000\0"					\
+	"ramdisk_addr=40100000\0"					\
+	""
+#define CONFIG_BOOTCOMMAND	"run flash_self"
+
+#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
+#undef	CFG_LOADS_BAUD_CHANGE		/* don't allow baudrate change	*/
+
+#undef	CONFIG_WATCHDOG			/* watchdog disabled		*/
+
+#define	CONFIG_STATUS_LED	1	/* Status LED enabled		*/
+
+#undef	CONFIG_CAN_DRIVER		/* CAN Driver support disabled	*/
+
+#define CONFIG_BOOTP_MASK	(CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+
+#define	CONFIG_RTC_MPC8xx		/* use internal RTC of MPC8xx	*/
+
+#define CONFIG_COMMANDS	      ( CONFIG_CMD_DFL	| \
+				CFG_CMD_ASKENV	| \
+				CFG_CMD_DHCP	| \
+				CFG_CMD_IDE	| \
+				CFG_CMD_DATE	)
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+/*
+ * Miscellaneous configurable options
+ */
+#define	CFG_LONGHELP			/* undef to save memory		*/
+#define	CFG_PROMPT		"=> "	/* Monitor Command Prompt	*/
+
+#if 0
+#define	CFG_HUSH_PARSER		1	/* use "hush" command parser	*/
+#endif
+#ifdef	CFG_HUSH_PARSER
+#define	CFG_PROMPT_HUSH_PS2	"> "
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define	CFG_CBSIZE		1024	/* Console I/O Buffer Size	*/
+#else
+#define	CFG_CBSIZE		256	/* Console I/O Buffer Size	*/
+#endif
+#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define	CFG_MAXARGS		16	/* max number of command args	*/
+#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size	*/
+
+#define CFG_MEMTEST_START	0x0400000	/* memtest works on	*/
+#define CFG_MEMTEST_END		0x0C00000	/* 4 ... 12 MB in DRAM	*/
+
+#define	CFG_LOAD_ADDR		0x100000	/* default load address	*/
+
+#define	CFG_HZ			1000	/* decrementer freq: 1 ms ticks	*/
+
+#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+/*-----------------------------------------------------------------------
+ * Internal Memory Mapped Register
+ */
+#define CFG_IMMR		0xFFF00000
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR	CFG_IMMR
+#define	CFG_INIT_RAM_END	0x2F00	/* End of used area in DPRAM	*/
+#define	CFG_GBL_DATA_SIZE	64  /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define	CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define	CFG_SDRAM_BASE		0x00000000
+#define CFG_FLASH_BASE		0x40000000
+#define	CFG_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor	*/
+#define CFG_MONITOR_BASE	CFG_FLASH_BASE
+#define	CFG_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define	CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux	*/
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CFG_MAX_FLASH_BANKS	2	/* max number of memory banks		*/
+#define CFG_MAX_FLASH_SECT	71	/* max number of sectors on one chip	*/
+
+#define CFG_FLASH_ERASE_TOUT	120000	/* Timeout for Flash Erase (in ms)	*/
+#define CFG_FLASH_WRITE_TOUT	500	/* Timeout for Flash Write (in ms)	*/
+
+#define	CFG_ENV_IS_IN_FLASH	1
+#define	CFG_ENV_OFFSET		0x8000	/*   Offset   of Environment Sector	*/
+#define	CFG_ENV_SIZE		0x4000	/* Total Size of Environment Sector	*/
+
+/* Address and size of Redundant Environment Sector	*/
+#define CFG_ENV_OFFSET_REDUND	(CFG_ENV_OFFSET+CFG_ENV_SIZE)
+#define CFG_ENV_SIZE_REDUND	(CFG_ENV_SIZE)
+
+/*-----------------------------------------------------------------------
+ * Hardware Information Block
+ */
+#define CFG_HWINFO_OFFSET	0x0003FFC0	/* offset of HW Info block */
+#define CFG_HWINFO_SIZE		0x00000040	/* size   of HW Info block */
+#define CFG_HWINFO_MAGIC	0x54514D38	/* 'TQM8' */
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE	16	/* For all MPC8xx CPUs			*/
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CACHELINE_SHIFT	4	/* log base 2 of the above value	*/
+#endif
+
+/*-----------------------------------------------------------------------
+ * SYPCR - System Protection Control				11-9
+ * SYPCR can only be written once after reset!
+ *-----------------------------------------------------------------------
+ * Software & Bus Monitor Timer max, Bus Monitor enable, SW Watchdog freeze
+ */
+#if defined(CONFIG_WATCHDOG)
+#define CFG_SYPCR	(SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \
+			 SYPCR_SWE  | SYPCR_SWRI| SYPCR_SWP)
+#else
+#define CFG_SYPCR	(SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP)
+#endif
+
+/*-----------------------------------------------------------------------
+ * SIUMCR - SIU Module Configuration				11-6
+ *-----------------------------------------------------------------------
+ * PCMCIA config., multi-function pin tri-state
+ */
+#ifndef	CONFIG_CAN_DRIVER
+#define CFG_SIUMCR	(SIUMCR_DBGC00 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
+#else	/* we must activate GPL5 in the SIUMCR for CAN */
+#define CFG_SIUMCR	(SIUMCR_DBGC11 | SIUMCR_DBPC00 | SIUMCR_MLRC01)
+#endif	/* CONFIG_CAN_DRIVER */
+
+/*-----------------------------------------------------------------------
+ * TBSCR - Time Base Status and Control				11-26
+ *-----------------------------------------------------------------------
+ * Clear Reference Interrupt Status, Timebase freezing enabled
+ */
+#define CFG_TBSCR	(TBSCR_REFA | TBSCR_REFB | TBSCR_TBF)
+
+/*-----------------------------------------------------------------------
+ * RTCSC - Real-Time Clock Status and Control Register		11-27
+ *-----------------------------------------------------------------------
+ */
+#define CFG_RTCSC	(RTCSC_SEC | RTCSC_ALR | RTCSC_RTF| RTCSC_RTE)
+
+/*-----------------------------------------------------------------------
+ * PISCR - Periodic Interrupt Status and Control		11-31
+ *-----------------------------------------------------------------------
+ * Clear Periodic Interrupt Status, Interrupt Timer freezing enabled
+ */
+#define CFG_PISCR	(PISCR_PS | PISCR_PITF)
+
+/*-----------------------------------------------------------------------
+ * PLPRCR - PLL, Low-Power, and Reset Control Register		15-30
+ *-----------------------------------------------------------------------
+ * Reset PLL lock status sticky bit, timer expired status bit and timer
+ * interrupt status bit
+ *
+ * If this is a 80 MHz CPU, set PLL multiplication factor to 5 (5*16=80)!
+ */
+#ifdef	CONFIG_80MHz	/* for 80 MHz, we use a 16 MHz clock * 5 */
+#define CFG_PLPRCR							\
+		( (5-1)<<PLPRCR_MF_SHIFT | PLPRCR_TEXPS | PLPRCR_TMIST )
+#else			/* up to 50 MHz we use a 1:1 clock */
+#define CFG_PLPRCR	(PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST)
+#endif	/* CONFIG_80MHz */
+
+/*-----------------------------------------------------------------------
+ * SCCR - System Clock and reset Control Register		15-27
+ *-----------------------------------------------------------------------
+ * Set clock output, timebase and RTC source and divider,
+ * power management and some other internal clocks
+ */
+#define SCCR_MASK	SCCR_EBDF11
+#ifdef	CONFIG_80MHz	/* for 80 MHz, we use a 16 MHz clock * 5 */
+#define CFG_SCCR	(/* SCCR_TBS  | */ \
+			 SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
+			 SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
+			 SCCR_DFALCD00)
+#else			/* up to 50 MHz we use a 1:1 clock */
+#define CFG_SCCR	(SCCR_TBS     | \
+			 SCCR_COM00   | SCCR_DFSYNC00 | SCCR_DFBRG00  | \
+			 SCCR_DFNL000 | SCCR_DFNH000  | SCCR_DFLCD000 | \
+			 SCCR_DFALCD00)
+#endif	/* CONFIG_80MHz */
+
+/*-----------------------------------------------------------------------
+ * PCMCIA stuff
+ *-----------------------------------------------------------------------
+ *
+ */
+#define CFG_PCMCIA_MEM_ADDR	(0xE0000000)
+#define CFG_PCMCIA_MEM_SIZE	( 64 << 20 )
+#define CFG_PCMCIA_DMA_ADDR	(0xE4000000)
+#define CFG_PCMCIA_DMA_SIZE	( 64 << 20 )
+#define CFG_PCMCIA_ATTRB_ADDR	(0xE8000000)
+#define CFG_PCMCIA_ATTRB_SIZE	( 64 << 20 )
+#define CFG_PCMCIA_IO_ADDR	(0xEC000000)
+#define CFG_PCMCIA_IO_SIZE	( 64 << 20 )
+
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff (Supports IDE harddisk on PCMCIA Adapter)
+ *-----------------------------------------------------------------------
+ */
+
+#define	CONFIG_IDE_8xx_PCCARD	1	/* Use IDE with PC Card	Adapter	*/
+
+#undef	CONFIG_IDE_8xx_DIRECT		/* Direct IDE    not supported	*/
+#undef	CONFIG_IDE_LED			/* LED   for ide not supported	*/
+#undef	CONFIG_IDE_RESET		/* reset for ide not supported	*/
+
+#define CFG_IDE_MAXBUS		1	/* max. 1 IDE bus		*/
+#define CFG_IDE_MAXDEVICE	1	/* max. 1 drive per IDE bus	*/
+
+#define CFG_ATA_IDE0_OFFSET	0x0000
+
+#define CFG_ATA_BASE_ADDR	CFG_PCMCIA_MEM_ADDR
+
+/* Offset for data I/O			*/
+#define CFG_ATA_DATA_OFFSET	(CFG_PCMCIA_MEM_SIZE + 0x320)
+
+/* Offset for normal register accesses	*/
+#define CFG_ATA_REG_OFFSET	(2 * CFG_PCMCIA_MEM_SIZE + 0x320)
+
+/* Offset for alternate registers	*/
+#define CFG_ATA_ALT_OFFSET	0x0100
+
+/*-----------------------------------------------------------------------
+ *
+ *-----------------------------------------------------------------------
+ *
+ */
+/*#define	CFG_DER	0x2002000F*/
+#define CFG_DER	0
+
+/*
+ * Init Memory Controller:
+ *
+ * BR0/1 and OR0/1 (FLASH)
+ */
+
+#define FLASH_BASE0_PRELIM	0x40000000	/* FLASH bank #0	*/
+#define FLASH_BASE1_PRELIM	0x60000000	/* FLASH bank #0	*/
+
+/* used to re-map FLASH both when starting from SRAM or FLASH:
+ * restrict access enough to keep SRAM working (if any)
+ * but not too much to meddle with FLASH accesses
+ */
+#define CFG_REMAP_OR_AM		0x80000000	/* OR addr mask */
+#define CFG_PRELIM_OR_AM	0xE0000000	/* OR addr mask */
+
+/*
+ * FLASH timing:
+ */
+#if   defined(CONFIG_80MHz)
+/* 80 MHz CPU - 40 MHz bus: ACS = 00, TRLX = 0, CSNT = 1, SCY = 3, EHTR = 1 */
+#define CFG_OR_TIMING_FLASH	(OR_ACS_DIV1  | 0       | OR_CSNT_SAM | \
+				 OR_SCY_3_CLK | OR_EHTR | OR_BI)
+#elif defined(CONFIG_66MHz)
+/* 66 MHz CPU - 66 MHz bus: ACS = 00, TRLX = 1, CSNT = 1, SCY = 3, EHTR = 1 */
+#define CFG_OR_TIMING_FLASH	(OR_ACS_DIV1  | OR_TRLX | OR_CSNT_SAM | \
+				 OR_SCY_3_CLK | OR_EHTR | OR_BI)
+#else		/*   50 MHz */
+/* 50 MHz CPU - 50 MHz bus: ACS = 00, TRLX = 1, CSNT = 1, SCY = 2, EHTR = 1 */
+#define CFG_OR_TIMING_FLASH	(OR_ACS_DIV1  | OR_TRLX | OR_CSNT_SAM | \
+				 OR_SCY_2_CLK | OR_EHTR | OR_BI)
+#endif	/*CONFIG_??MHz */
+
+#define CFG_OR0_REMAP	(CFG_REMAP_OR_AM  | CFG_OR_TIMING_FLASH)
+#define CFG_OR0_PRELIM	(CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH)
+#define CFG_BR0_PRELIM	((FLASH_BASE0_PRELIM & BR_BA_MSK) | BR_V )
+
+#define CFG_OR1_REMAP	CFG_OR0_REMAP
+#define CFG_OR1_PRELIM	CFG_OR0_PRELIM
+#define CFG_BR1_PRELIM	((FLASH_BASE1_PRELIM & BR_BA_MSK) | BR_V )
+
+/*
+ * BR2/3 and OR2/3 (SDRAM)
+ *
+ */
+#define SDRAM_BASE2_PRELIM	0x00000000	/* SDRAM bank #0	*/
+#define SDRAM_BASE3_PRELIM	0x20000000	/* SDRAM bank #1	*/
+#define	SDRAM_MAX_SIZE		0x04000000	/* max 64 MB per bank	*/
+
+/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care)	*/
+#define CFG_OR_TIMING_SDRAM	0x00000A00
+
+#define CFG_OR2_PRELIM	(CFG_PRELIM_OR_AM | CFG_OR_TIMING_SDRAM )
+#define CFG_BR2_PRELIM	((SDRAM_BASE2_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
+
+#ifndef	CONFIG_CAN_DRIVER
+#define	CFG_OR3_PRELIM	CFG_OR2_PRELIM
+#define CFG_BR3_PRELIM	((SDRAM_BASE3_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
+#else	/* CAN uses CS3#, so we can have only one SDRAM bank anyway */
+#define	CFG_CAN_BASE		0xC0000000	/* CAN mapped at 0xC0000000	*/
+#define CFG_CAN_OR_AM		0xFFFF8000	/* 32 kB address mask		*/
+#define CFG_OR3_CAN		(CFG_CAN_OR_AM | OR_G5LA | OR_BI)
+#define CFG_BR3_CAN		((CFG_CAN_BASE & BR_BA_MSK) | \
+					BR_PS_8 | BR_MS_UPMB | BR_V )
+#endif	/* CONFIG_CAN_DRIVER */
+
+/*
+ * Memory Periodic Timer Prescaler
+ *
+ * The Divider for PTA (refresh timer) configuration is based on an
+ * example SDRAM configuration (64 MBit, one bank). The adjustment to
+ * the number of chip selects (NCS) and the actually needed refresh
+ * rate is done by setting MPTPR.
+ *
+ * PTA is calculated from
+ *	PTA = (gclk * Trefresh) / ((2 ^ (2 * DFBRG)) * PTP * NCS)
+ *
+ *	gclk	  CPU clock (not bus clock!)
+ *	Trefresh  Refresh cycle * 4 (four word bursts used)
+ *
+ * 4096  Rows from SDRAM example configuration
+ * 1000  factor s -> ms
+ *   32  PTP (pre-divider from MPTPR) from SDRAM example configuration
+ *    4  Number of refresh cycles per period
+ *   64  Refresh cycle in ms per number of rows
+ * --------------------------------------------
+ * Divider = 4096 * 32 * 1000 / (4 * 64) = 512000
+ *
+ * 50 MHz => 50.000.000 / Divider =  98
+ * 66 Mhz => 66.000.000 / Divider = 129
+ * 80 Mhz => 80.000.000 / Divider = 156
+ */
+#if   defined(CONFIG_80MHz)
+#define CFG_MAMR_PTA		156
+#elif defined(CONFIG_66MHz)
+#define CFG_MAMR_PTA		129
+#else		/*   50 MHz */
+#define CFG_MAMR_PTA		 98
+#endif	/*CONFIG_??MHz */
+
+/*
+ * For 16 MBit, refresh rates could be 31.3 us
+ * (= 64 ms / 2K = 125 / quad bursts).
+ * For a simpler initialization, 15.6 us is used instead.
+ *
+ * #define CFG_MPTPR_2BK_2K	MPTPR_PTP_DIV32		for 2 banks
+ * #define CFG_MPTPR_1BK_2K	MPTPR_PTP_DIV64		for 1 bank
+ */
+#define CFG_MPTPR_2BK_4K	MPTPR_PTP_DIV16		/* setting for 2 banks	*/
+#define CFG_MPTPR_1BK_4K	MPTPR_PTP_DIV32		/* setting for 1 bank	*/
+
+/* refresh rate 7.8 us (= 64 ms / 8K = 31.2 / quad bursts) for 256 MBit		*/
+#define CFG_MPTPR_2BK_8K	MPTPR_PTP_DIV8		/* setting for 2 banks	*/
+#define CFG_MPTPR_1BK_8K	MPTPR_PTP_DIV16		/* setting for 1 bank	*/
+
+/*
+ * MAMR settings for SDRAM
+ */
+
+/* 8 column SDRAM */
+#define CFG_MAMR_8COL	((CFG_MAMR_PTA << MAMR_PTA_SHIFT)  | MAMR_PTAE	    |	\
+			 MAMR_AMA_TYPE_0 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A11 |	\
+			 MAMR_RLFA_1X	 | MAMR_WLFA_1X	   | MAMR_TLFA_4X)
+/* 9 column SDRAM */
+#define CFG_MAMR_9COL	((CFG_MAMR_PTA << MAMR_PTA_SHIFT)  | MAMR_PTAE	    |	\
+			 MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 |	\
+			 MAMR_RLFA_1X	 | MAMR_WLFA_1X	   | MAMR_TLFA_4X)
+
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define	BOOTFLAG_COLD	0x01		/* Normal Power-On: Boot from FLASH	*/
+#define BOOTFLAG_WARM	0x02		/* Software reboot			*/
+
+#define CONFIG_NET_MULTI
+#define CONFIG_SCC1_ENET
+#define CONFIG_FEC_ENET
+#define CONFIG_ETHPRIME		"SCC ETHERNET"
+
+#endif	/* __CONFIG_H */

include/configs/ep8260.h

@@ -270,6 +270,7 @@
 /*
 */
 #define CONFIG_COMMANDS		(	CFG_CMD_ALL     & \
+					~CFG_CMD_BMP	& \
 					~CFG_CMD_BSP    & \
 					~CFG_CMD_DCR    & \
 					~CFG_CMD_DHCP   & \

include/configs/hymod.h

@@ -138,6 +138,7 @@
 
 #define CONFIG_COMMANDS		(CFG_CMD_ALL & ~( \
 					CFG_CMD_BEDBUG	| \
+					CFG_CMD_BMP	| \
 					CFG_CMD_DOC	| \
 					CFG_CMD_ELF	| \
 					CFG_CMD_FDC	| \

include/configs/incaip.h

@@ -31,8 +31,8 @@
 #define CONFIG_MIPS32		1	/* MIPS 4Kc CPU core	*/
 #define CONFIG_INCA_IP		1	/* on a INCA-IP Board	*/
 
-/* allowed values: 100000000 and 150000000 */
-#define CPU_CLOCK_RATE	150000000   /* 150 MHz clock for the MIPS core */
+/* allowed values: 100000000, 133000000, and 150000000 */
+#define CPU_CLOCK_RATE	133000000   /* 133 MHz clock for the MIPS core */
 
 #if CPU_CLOCK_RATE == 100000000
 #define INFINEON_EBU_BOOTCFG	0x20C4	/* CMULT = 4 for 100 MHz */

include/configs/lwmon.h

@@ -76,33 +76,33 @@
 
 #define CONFIG_BOOTCOMMAND	"run flash_self"
 
-#define	CONFIG_EXTRA_ENV_SETTINGS						\
-	"kernel_addr=40080000\0"						\
-	"ramdisk_addr=40280000\0"						\
-	"magic_keys=#3\0"							\
-	"key_magic#=28\0"							\
-	"key_cmd#=setenv addfb setenv bootargs \\$(bootargs) console=tty0\0"	\
-	"key_magic3=3C+3F\0"							\
-	"key_cmd3=echo *** Entering Test Mode ***;" \
-		"setenv add_misc setenv bootargs \\$(bootargs) testmode\0"	\
-	"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath)\0" \
-	"ramargs=setenv bootargs root=/dev/ram rw\0"				\
-	"addfb=setenv bootargs $(bootargs) console=ttyS1,$(baudrate)\0"		\
-	"addip=setenv bootargs $(bootargs) "					\
-		"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off " \
-		"panic=1\0"							\
-	"add_wdt=setenv bootargs $(bootargs) $(wdt_args)\0"			\
-	"add_misc=setenv bootargs $(bootargs) runmode\0"			\
-	"flash_nfs=run nfsargs addip add_wdt addfb add_misc;"	\
-		"bootm $(kernel_addr)\0"					\
-	"flash_self=run ramargs addip add_wdt addfb add_misc;"	\
-		"bootm $(kernel_addr) $(ramdisk_addr)\0"			\
-	"net_nfs=tftp 100000 /tftpboot/uImage.lwmon;"		\
-		"run nfsargs addip add_wdt addfb;bootm\0"	\
-	"rootpath=/opt/eldk/ppc_8xx\0"						\
-	"load=tftp 100000 /tftpboot/u-boot.bin\0"				\
-	"update=protect off 1:0;era 1:0;cp.b 100000 40000000 $(filesize)\0"	\
-	"wdt_args=wdt_8xx=off\0"						\
+#define	CONFIG_EXTRA_ENV_SETTINGS					\
+	"kernel_addr=40080000\0"					\
+	"ramdisk_addr=40280000\0"					\
+	"magic_keys=#3\0"						\
+	"key_magic#=28\0"						\
+	"key_cmd#=setenv addfb setenv 'bootargs $bootargs console=tty0'\0" \
+	"key_magic3=3C+3F\0"						\
+	"key_cmd3=echo *** Entering Test Mode ***;"			\
+		"setenv add_misc 'setenv bootargs $bootargs testmode'\0" \
+	"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$serverip:$rootpath\0" \
+	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
+	"addfb=setenv bootargs $bootargs console=ttyS1,$baudrate\0"	\
+	"addip=setenv bootargs $bootargs "				\
+		"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off " \
+		"panic=1\0"						\
+	"add_wdt=setenv bootargs $bootargs $wdt_args\0"			\
+	"add_misc=setenv bootargs $bootargs runmode\0"			\
+	"flash_nfs=run nfsargs addip add_wdt addfb add_misc;"		\
+		"bootm $kernel_addr\0"					\
+	"flash_self=run ramargs addip add_wdt addfb add_misc;"		\
+		"bootm $kernel_addr $ramdisk_addr\0"			\
+	"net_nfs=tftp 100000 /tftpboot/uImage.lwmon;"			\
+		"run nfsargs addip add_wdt addfb;bootm\0"		\
+	"rootpath=/opt/eldk/ppc_8xx\0"					\
+	"load=tftp 100000 /tftpboot/u-boot.bin\0"			\
+	"update=protect off 1:0;era 1:0;cp.b 100000 40000000 $filesize\0" \
+	"wdt_args=wdt_8xx=off\0"					\
 	"verify=no"
 
 #define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
@@ -153,6 +153,7 @@
 				CFG_CMD_EEPROM	| \
 				CFG_CMD_IDE	| \
 				CFG_CMD_BSP	| \
+				CFG_CMD_BMP	| \
 				CFG_CMD_POST_DIAG )
 #else
 #define CONFIG_COMMANDS	      ( CONFIG_CMD_DFL	| \
@@ -162,6 +163,7 @@
 				CFG_CMD_EEPROM	| \
 				CFG_CMD_IDE	| \
 				CFG_CMD_BSP	| \
+				CFG_CMD_BMP	| \
 				CFG_CMD_POST_DIAG )
 #endif
 #define CONFIG_MAC_PARTITION
@@ -180,10 +182,10 @@
 #define CFG_LONGHELP			/* undef to save memory		*/
 #define CFG_PROMPT	"=> "		/* Monitor Command Prompt	*/
 
-#undef	CFG_HUSH_PARSER			/* enable "hush" shell		*/
+#define	CFG_HUSH_PARSER		1	/* use "hush" command parser	*/
+#endif
 #ifdef	CFG_HUSH_PARSER
 #define	CFG_PROMPT_HUSH_PS2	"> "
-#endif
 
 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
 #define CFG_CBSIZE	1024		/* Console I/O Buffer Size	*/

include/configs/purple.h

@@ -0,0 +1,156 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * This file contains the configuration parameters for the PURPLE board.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_MIPS32		1	/* MIPS 5Kc CPU core	*/
+#define CONFIG_PURPLE		1	/* on a PURPLE Board	*/
+
+#define CPU_CLOCK_RATE	125000000   /* 125 MHz clock for the MIPS core */
+#define ASC_CLOCK_RATE	 62500000   /* 62.5 MHz ASC clock              */
+
+#define INFINEON_EBU_BOOTCFG	0xE0CC
+
+#define CONFIG_STACKSIZE	(128 * 1024)
+
+#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
+
+#define CONFIG_BAUDRATE		19200
+
+/* valid baudrates */
+#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+#define	CONFIG_TIMESTAMP		/* Print image info with timestamp */
+
+#define CONFIG_PREBOOT	"echo;"	\
+	"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+	"echo"
+
+#undef	CONFIG_BOOTARGS
+
+#define	CONFIG_EXTRA_ENV_SETTINGS					\
+	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
+		"nfsroot=$(serverip):$(rootpath)\0"			\
+	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
+	"addip=setenv bootargs $(bootargs) "				\
+		"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"	\
+		":$(hostname):$(netdev):off\0"				\
+	"addmisc=setenv bootargs $(bootargs) "				\
+		"console=ttyS0,$(baudrate) "				\
+		"ethaddr=$(ethaddr) "					\
+		"panic=1\0"						\
+	"flash_nfs=run nfsargs addip addmisc;"				\
+		"bootm $(kernel_addr)\0"				\
+	"flash_self=run ramargs addip addmisc;"				\
+		"bootm $(kernel_addr) $(ramdisk_addr)\0"		\
+	"net_nfs=tftp 80500000 $(bootfile);"				\
+		"run nfsargs addip addmisc;bootm\0"			\
+	"rootpath=/opt/eldk/mips_5KC\0"					\
+	"bootfile=/tftpboot/purple/uImage\0"				\
+	"kernel_addr=B0040000\0"					\
+	"ramdisk_addr=B0100000\0"					\
+	"u-boot=/tftpboot/purple/u-boot.bin\0"				\
+	"load=tftp 80500000 $(u-boot)\0"				\
+	"update=protect off 1:0-4;era 1:0-4;"				\
+		"cp.b 80500000 B0000000 $(filesize)\0"			\
+	""
+#define CONFIG_BOOTCOMMAND	"run flash_self"
+
+#define CONFIG_COMMANDS	(CONFIG_CMD_DFL | CFG_CMD_ELF)
+#include <cmd_confdefs.h>
+
+#define CFG_SDRAM_BASE		0x80000000
+
+#define CFG_INIT_SP_OFFSET      0x400000
+
+#define CFG_MALLOC_LEN		128*1024
+
+#define CFG_BOOTPARAMS_LEN	128*1024
+
+/*
+ * Miscellaneous configurable options
+ */
+#define	CFG_LONGHELP				/* undef to save memory      */
+#define	CFG_PROMPT		"PURPLE # "	/* Monitor Command Prompt    */
+#define	CFG_CBSIZE		256		/* Console I/O Buffer Size   */
+#define	CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)  /* Print Buffer Size */
+#define CFG_HZ			(CPU_CLOCK_RATE/2)
+#define	CFG_MAXARGS		16		/* max number of command args*/
+
+#define	CFG_LOAD_ADDR		0x80500000	/* default load address	*/
+
+#define CFG_MEMTEST_START	0x80200000
+#define CFG_MEMTEST_END		0x80800000
+
+#define	CONFIG_MISC_INIT_R
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+#define CFG_MAX_FLASH_BANKS	1	/* max number of memory banks */
+#define CFG_MAX_FLASH_SECT	(35)	/* max number of sectors on one chip */
+
+#define PHYS_FLASH_1		0xb0000000 /* Flash Bank #1 */
+
+/* The following #defines are needed to get flash environment right */
+#define	CFG_MONITOR_BASE	TEXT_BASE
+#define	CFG_MONITOR_LEN		(192 << 10)
+
+#define CFG_FLASH_BASE		PHYS_FLASH_1
+
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT	(6 * CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT	(6 * CFG_HZ) /* Timeout for Flash Write */
+
+#define	CFG_ENV_IS_IN_FLASH	1
+
+/* Address and size of Primary Environment Sector	*/
+#define CFG_ENV_ADDR		0xB0008000
+#define CFG_ENV_SIZE		0x4000
+
+#define CONFIG_FLASH_32BIT
+#define CONFIG_NR_DRAM_BANKS	1
+
+#define CONFIG_PLB2800_ETHER
+#define CONFIG_NET_MULTI
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_DCACHE_SIZE		16384
+#define CFG_ICACHE_SIZE		16384
+#define CFG_CACHELINE_SIZE	32
+
+/*
+ * Temporary buffer for serial data until the real serial driver
+ * is initialised (memtest will destroy this buffer)
+ */
+#define CFG_SCONSOLE_ADDR     CFG_SDRAM_BASE
+#define CFG_SCONSOLE_SIZE     0x0002000
+
+#endif	/* __CONFIG_H */

include/image.h

@@ -45,6 +45,7 @@
 #define IH_OS_PSOS		15	/* pSOS		*/
 #define IH_OS_QNX		16	/* QNX		*/
 #define IH_OS_U_BOOT		17	/* Firmware	*/
+#define IH_OS_RTEMS		18	/* RTEMS	*/
 
 /*
  * CPU Architecture Codes (supported by Linux)

include/version.h

@@ -24,6 +24,6 @@
 #ifndef	__VERSION_H__
 #define	__VERSION_H__
 
-#define	U_BOOT_VERSION	"U-Boot 0.2.3"
+#define	U_BOOT_VERSION	"U-Boot 0.3.1"
 
 #endif	/* __VERSION_H__ */

net/bootp.c

@@ -56,6 +56,7 @@ ulong		seed1, seed2;
 #if (CONFIG_COMMANDS & CFG_CMD_DHCP)
 dhcp_state_t dhcp_state = INIT;
 unsigned int dhcp_leasetime = 0;
+IPaddr_t NetDHCPServerIP = 0;
 static void DhcpHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len);
 
 /* For Debug */
@@ -716,7 +717,7 @@ static void DhcpOptionsProcess(uchar *popt)
 			case 53:		/* Ignore Message Type Option */
 				break;
 			case 54:
-				NetCopyIP(&NetServerIP, (popt+2));
+				NetCopyIP(&NetDHCPServerIP, (popt+2));
 				break;
 			case 58:		/* Ignore Renewal Time Option */
 				break;
@@ -788,7 +789,7 @@ static void DhcpSendRequestPkt(Bootp_t *bp_offer)
 	 * Copy options from OFFER packet if present
 	 */
 	NetCopyIP(&OfferedIP, &bp->bp_yiaddr);
-	extlen = DhcpExtended(bp->bp_vend, DHCP_REQUEST, NetServerIP, OfferedIP);
+	extlen = DhcpExtended(bp->bp_vend, DHCP_REQUEST, NetDHCPServerIP, OfferedIP);
 
 	pktlen = BOOTP_SIZE - sizeof(bp->bp_vend) + extlen;
 	iplen = BOOTP_HDR_SIZE - sizeof(bp->bp_vend) + extlen;
@@ -832,11 +833,10 @@ DhcpHandler(uchar * pkt, unsigned dest, unsigned src, unsigned len)
 
 			debug ("TRANSITIONING TO REQUESTING STATE\n");
 			dhcp_state = REQUESTING;
-#if 0
+
 			if (NetReadLong((ulong*)&bp->bp_vend[0]) == htonl(BOOTP_VENDOR_MAGIC))
 				DhcpOptionsProcess(&bp->bp_vend[4]);
 
-#endif
 			BootpCopyNetParams(bp);	/* Store net params from reply */
 
 			NetSetTimeout(TIMEOUT * CFG_HZ, BootpTimeout);

post/cache_8xx.S

@@ -27,6 +27,7 @@
     defined(CONFIG_MPC850) || \
     defined(CONFIG_MPC855) || \
     defined(CONFIG_MPC860) || \
+    defined(CONFIG_MPC862) || \
     defined(CONFIG_MPC824X)
 
 #include <post.h>

tools/env/fw_env.c

@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2000
+ * (C) Copyright 2000-2003
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
  *
  * See file CREDITS for list of people who contributed to this
@@ -12,7 +12,7 @@
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
@@ -34,16 +34,16 @@
 #include <linux/mtd/mtd.h>
 #include "fw_env.h"
 
-typedef	unsigned char	uchar;
+typedef unsigned char uchar;
 
 #define	CMD_GETENV	"fw_printenv"
 #define	CMD_SETENV	"fw_setenv"
 
 typedef struct envdev_s {
-	uchar devname[16]; /* Device name */
-	ulong devoff;      /* Device offset */
-	ulong env_size;    /* environment size */
-	ulong erase_size;  /* device erase size */
+	uchar devname[16];		/* Device name */
+	ulong devoff;			/* Device offset */
+	ulong env_size;			/* environment size */
+	ulong erase_size;		/* device erase size */
 } envdev_t;
 
 static envdev_t envdevices[2];
@@ -59,8 +59,8 @@ static int curdev;
 #define ENV_SIZE      getenvsize()
 
 typedef struct environment_s {
-	ulong	crc;		/* CRC32 over data bytes	*/
-	uchar   flags;      /* active or obsolete */
+	ulong crc;			/* CRC32 over data bytes    */
+	uchar flags;			/* active or obsolete */
 	uchar *data;
 } env_t;
 
@@ -77,92 +77,94 @@ static uchar obsolete_flag = 0;
 
 static uchar default_environment[] = {
 #if defined(CONFIG_BOOTARGS)
-	"bootargs="	CONFIG_BOOTARGS			"\0"
+	"bootargs=" CONFIG_BOOTARGS "\0"
 #endif
 #if defined(CONFIG_BOOTCOMMAND)
-	"bootcmd="	CONFIG_BOOTCOMMAND		"\0"
+	"bootcmd=" CONFIG_BOOTCOMMAND "\0"
 #endif
 #if defined(CONFIG_RAMBOOTCOMMAND)
-	"ramboot="	CONFIG_RAMBOOTCOMMAND		"\0"
+	"ramboot=" CONFIG_RAMBOOTCOMMAND "\0"
 #endif
 #if defined(CONFIG_NFSBOOTCOMMAND)
-	"nfsboot="	CONFIG_NFSBOOTCOMMAND		"\0"
+	"nfsboot=" CONFIG_NFSBOOTCOMMAND "\0"
 #endif
 #if defined(CONFIG_BOOTDELAY) && (CONFIG_BOOTDELAY >= 0)
-	"bootdelay="	MK_STR(CONFIG_BOOTDELAY)	"\0"
+	"bootdelay=" MK_STR (CONFIG_BOOTDELAY) "\0"
 #endif
 #if defined(CONFIG_BAUDRATE) && (CONFIG_BAUDRATE >= 0)
-	"baudrate="	MK_STR(CONFIG_BAUDRATE)		"\0"
+	"baudrate=" MK_STR (CONFIG_BAUDRATE) "\0"
 #endif
 #ifdef	CONFIG_LOADS_ECHO
-	"loads_echo="	MK_STR(CONFIG_LOADS_ECHO)	"\0"
+	"loads_echo=" MK_STR (CONFIG_LOADS_ECHO) "\0"
 #endif
 #ifdef	CONFIG_ETHADDR
-	"ethaddr="	MK_STR(CONFIG_ETHADDR)		"\0"
+	"ethaddr=" MK_STR (CONFIG_ETHADDR) "\0"
 #endif
 #ifdef	CONFIG_ETH1ADDR
-	"eth1addr="	MK_STR(CONFIG_ETH1ADDR)		"\0"
+	"eth1addr=" MK_STR (CONFIG_ETH1ADDR) "\0"
 #endif
 #ifdef	CONFIG_ETH2ADDR
-	"eth2addr="	MK_STR(CONFIG_ETH2ADDR)		"\0"
+	"eth2addr=" MK_STR (CONFIG_ETH2ADDR) "\0"
 #endif
 #ifdef	CONFIG_ETHPRIME
-	"ethprime="	CONFIG_ETHPRIME			"\0"
+	"ethprime=" CONFIG_ETHPRIME "\0"
 #endif
 #ifdef	CONFIG_IPADDR
-	"ipaddr="	MK_STR(CONFIG_IPADDR)		"\0"
+	"ipaddr=" MK_STR (CONFIG_IPADDR) "\0"
 #endif
 #ifdef	CONFIG_SERVERIP
-	"serverip="	MK_STR(CONFIG_SERVERIP)		"\0"
+	"serverip=" MK_STR (CONFIG_SERVERIP) "\0"
 #endif
 #ifdef	CFG_AUTOLOAD
-	"autoload="	CFG_AUTOLOAD			"\0"
+	"autoload=" CFG_AUTOLOAD "\0"
 #endif
 #ifdef	CONFIG_ROOTPATH
-	"rootpath="	MK_STR(CONFIG_ROOTPATH)		"\0"
+	"rootpath=" MK_STR (CONFIG_ROOTPATH) "\0"
 #endif
 #ifdef	CONFIG_GATEWAYIP
-	"gatewayip="	MK_STR(CONFIG_GATEWAYIP)	"\0"
+	"gatewayip=" MK_STR (CONFIG_GATEWAYIP) "\0"
 #endif
 #ifdef	CONFIG_NETMASK
-	"netmask="	MK_STR(CONFIG_NETMASK)		"\0"
+	"netmask=" MK_STR (CONFIG_NETMASK) "\0"
 #endif
 #ifdef	CONFIG_HOSTNAME
-	"hostname="	MK_STR(CONFIG_HOSTNAME)		"\0"
+	"hostname=" MK_STR (CONFIG_HOSTNAME) "\0"
 #endif
 #ifdef	CONFIG_BOOTFILE
-	"bootfile="	MK_STR(CONFIG_BOOTFILE)		"\0"
+	"bootfile=" MK_STR (CONFIG_BOOTFILE) "\0"
 #endif
 #ifdef	CONFIG_LOADADDR
-	"loadaddr="	MK_STR(CONFIG_LOADADDR)		"\0"
+	"loadaddr=" MK_STR (CONFIG_LOADADDR) "\0"
 #endif
 #ifdef	CONFIG_PREBOOT
-	"preboot="	CONFIG_PREBOOT			"\0"
+	"preboot=" CONFIG_PREBOOT "\0"
 #endif
 #ifdef	CONFIG_CLOCKS_IN_MHZ
-	"clocks_in_mhz=" "1"				"\0"
+	"clocks_in_mhz=" "1" "\0"
 #endif
 #if defined(CONFIG_PCI_BOOTDELAY) && (CONFIG_PCI_BOOTDELAY > 0)
-	"pcidelay="	MK_STR(CONFIG_PCI_BOOTDELAY)	"\0"
+	"pcidelay=" MK_STR (CONFIG_PCI_BOOTDELAY) "\0"
 #endif
 #ifdef  CONFIG_EXTRA_ENV_SETTINGS
 	CONFIG_EXTRA_ENV_SETTINGS
 #endif
-	"\0"		/* Termimate env_t data with 2 NULs */
+	"\0"			/* Termimate env_t data with 2 NULs */
 };
 
-static int  flash_io (int mode);
-static uchar *envmatch(uchar *s1, uchar *s2);
-static int env_init(void);
-static int parse_config(void);
+static int flash_io (int mode);
+static uchar *envmatch (uchar * s1, uchar * s2);
+static int env_init (void);
+static int parse_config (void);
+
 #if defined(CONFIG_FILE)
-static int get_config(char *);
+static int get_config (char *);
 #endif
-static inline ulong getenvsize(void)
+static inline ulong getenvsize (void)
 {
-	ulong rc = CFG_ENV_SIZE - sizeof(long);
+	ulong rc = CFG_ENV_SIZE - sizeof (long);
+
 	if (HaveRedundEnv)
-		rc -= sizeof(char);
+		rc -= sizeof (char);
 	return rc;
 }
 
@@ -174,20 +176,20 @@ unsigned char *fw_getenv (unsigned char *name)
 {
 	uchar *env, *nxt;
 
-	if (env_init())
+	if (env_init ())
 		return (NULL);
 
-	for (env=environment.data; *env; env=nxt+1) {
+	for (env = environment.data; *env; env = nxt + 1) {
 		uchar *val;
 
-		for (nxt=env; *nxt; ++nxt) {
+		for (nxt = env; *nxt; ++nxt) {
 			if (nxt >= &environment.data[ENV_SIZE]) {
 				fprintf (stderr, "## Error: "
 					"environment not terminated\n");
 				return (NULL);
 			}
 		}
-		val=envmatch(name, env);
+		val = envmatch (name, env);
 		if (!val)
 			continue;
 		return (val);
@@ -199,17 +201,17 @@ unsigned char *fw_getenv (unsigned char *name)
  * Print the current definition of one, or more, or all
  * environment variables
  */
-void fw_printenv(int argc, char *argv[])
+void fw_printenv (int argc, char *argv[])
 {
 	uchar *env, *nxt;
 	int i, n_flag;
 
-	if (env_init())
+	if (env_init ())
 		return;
 
-	if (argc == 1) {		/* Print all env variables	*/
-		for (env=environment.data; *env; env=nxt+1) {
-			for (nxt=env; *nxt; ++nxt) {
+	if (argc == 1) {		/* Print all env variables  */
+		for (env = environment.data; *env; env = nxt + 1) {
+			for (nxt = env; *nxt; ++nxt) {
 				if (nxt >= &environment.data[ENV_SIZE]) {
 					fprintf (stderr, "## Error: "
 						"environment not terminated\n");
@@ -217,12 +219,12 @@ void fw_printenv(int argc, char *argv[])
 				}
 			}
 
-			printf("%s\n", env);
+			printf ("%s\n", env);
 		}
 		return;
 	}
 
-	if (strcmp(argv[1], "-n") == 0) {
+	if (strcmp (argv[1], "-n") == 0) {
 		n_flag = 1;
 		++argv;
 		--argc;
@@ -235,32 +237,31 @@ void fw_printenv(int argc, char *argv[])
 		n_flag = 0;
 	}
 
-	for (i=1; i<argc; ++i) {	/* print single env variables	*/
+	for (i = 1; i < argc; ++i) {	/* print single env variables   */
 		uchar *name = argv[i];
 		uchar *val = NULL;
 
-		for (env=environment.data; *env; env=nxt+1) {
+		for (env = environment.data; *env; env = nxt + 1) {
 
-			for (nxt=env; *nxt; ++nxt) {
+			for (nxt = env; *nxt; ++nxt) {
 				if (nxt >= &environment.data[ENV_SIZE]) {
 					fprintf (stderr, "## Error: "
 						"environment not terminated\n");
 					return;
 				}
 			}
-			val=envmatch(name, env);
+			val = envmatch (name, env);
 			if (val) {
 				if (!n_flag) {
 					fputs (name, stdout);
-					putc  ('=',  stdout);
+					putc ('=', stdout);
 				}
-				puts  (val);
+				puts (val);
 				break;
 			}
 		}
 		if (!val)
-			fprintf (stderr, "## Error: \"%s\" not defined\n",
-			 name);
+			fprintf (stderr, "## Error: \"%s\" not defined\n", name);
 	}
 }
 
@@ -274,7 +275,7 @@ void fw_printenv(int argc, char *argv[])
  */
 int fw_setenv (int argc, char *argv[])
 {
-	int  i, len;
+	int i, len;
 	uchar *env, *nxt;
 	uchar *oldval = NULL;
 	uchar *name;
@@ -283,7 +284,7 @@ int fw_setenv (int argc, char *argv[])
 		return (EINVAL);
 	}
 
-	if (env_init())
+	if (env_init ())
 		return (errno);
 
 	name = argv[1];
@@ -291,15 +292,15 @@ int fw_setenv (int argc, char *argv[])
 	/*
 	 * search if variable with this name already exists
 	 */
-	for (env=environment.data; *env; env=nxt+1) {
-		for (nxt=env; *nxt; ++nxt) {
+	for (nxt = env = environment.data; *env; env = nxt + 1) {
+		for (nxt = env; *nxt; ++nxt) {
 			if (nxt >= &environment.data[ENV_SIZE]) {
 				fprintf (stderr, "## Error: "
 					"environment not terminated\n");
 				return (EINVAL);
 			}
 		}
-		if ((oldval=envmatch(name, env)) != NULL)
+		if ((oldval = envmatch (name, env)) != NULL)
 			break;
 	}
 
@@ -311,7 +312,7 @@ int fw_setenv (int argc, char *argv[])
 		 * Ethernet Address and serial# can be set only once
 		 */
 		if ((strcmp (name, "ethaddr") == 0) ||
-		    (strcmp (name, "serial#") == 0) ) {
+			(strcmp (name, "serial#") == 0)) {
 			fprintf (stderr, "Can't overwrite \"%s\"\n", name);
 			return (EROFS);
 		}
@@ -336,20 +337,19 @@ int fw_setenv (int argc, char *argv[])
 	/*
 	 * Append new definition at the end
 	 */
-	for (env=environment.data; *env || *(env+1); ++env)
-		;
+	for (env = environment.data; *env || *(env + 1); ++env);
 	if (env > environment.data)
 		++env;
 	/*
 	 * Overflow when:
 	 * "name" + "=" + "val" +"\0\0"  > CFG_ENV_SIZE - (env-environment)
 	 */
-	len = strlen(name) + 2;
+	len = strlen (name) + 2;
 	/* add '=' for first arg, ' ' for all others */
-	for (i=2; i<argc; ++i) {
-		len += strlen(argv[i]) + 1;
+	for (i = 2; i < argc; ++i) {
+		len += strlen (argv[i]) + 1;
 	}
-	if (len > (&environment.data[ENV_SIZE]-env)) {
+	if (len > (&environment.data[ENV_SIZE] - env)) {
 		fprintf (stderr,
 			"Error: environment overflow, \"%s\" deleted\n",
 			name);
@@ -357,26 +357,24 @@ int fw_setenv (int argc, char *argv[])
 	}
 	while ((*env = *name++) != '\0')
 		env++;
-	for (i=2; i<argc; ++i) {
+	for (i = 2; i < argc; ++i) {
 		uchar *val = argv[i];
 
-		*env = (i==2) ? '=' : ' ';
-		while ((*++env = *val++) != '\0')
-			;
+		*env = (i == 2) ? '=' : ' ';
+		while ((*++env = *val++) != '\0');
 	}
 
 	/* end is marked with double '\0' */
 	*++env = '\0';
 
-WRITE_FLASH:
+  WRITE_FLASH:
 
 	/* Update CRC */
-	environment.crc = crc32(0, environment.data, ENV_SIZE);
+	environment.crc = crc32 (0, environment.data, ENV_SIZE);
 
 	/* write environment back to flash */
 	if (flash_io (O_RDWR)) {
-		fprintf (stderr,
-			"Error: can't write fw_env to flash\n");
+		fprintf (stderr, "Error: can't write fw_env to flash\n");
 		return (-1);
 	}
 
@@ -389,166 +387,172 @@ static int flash_io (int mode)
 	erase_info_t erase;
 	char *data;
 
-	if ((fd = open(DEVNAME(curdev), mode)) < 0) {
-		fprintf (stderr, 
-				 "Can't open %s: %s\n", 
-				 DEVNAME(curdev), strerror(errno));
+	if ((fd = open (DEVNAME (curdev), mode)) < 0) {
+		fprintf (stderr,
+			"Can't open %s: %s\n",
+			DEVNAME (curdev), strerror (errno));
 		return (-1);
 	}
 
-	len = sizeof(environment.crc);
+	len = sizeof (environment.crc);
 	if (HaveRedundEnv) {
-		len += sizeof(environment.flags);
+		len += sizeof (environment.flags);
 	}
 
 	if (mode == O_RDWR) {
 		if (HaveRedundEnv) {
 			/* switch to next partition for writing */
 			otherdev = !curdev;
-			if ((fdr = open(DEVNAME(otherdev), mode)) < 0) {
-				fprintf (stderr, 
-						 "Can't open %s: %s\n", 
-						 DEVNAME(otherdev), strerror(errno));
+			if ((fdr = open (DEVNAME (otherdev), mode)) < 0) {
+				fprintf (stderr,
+					"Can't open %s: %s\n",
+					DEVNAME (otherdev),
+					strerror (errno));
 				return (-1);
 			}
 		} else {
 			otherdev = curdev;
 			fdr = fd;
 		}
-		printf("Unlocking flash...\n");
-		erase.length = DEVESIZE(otherdev);
-		erase.start = DEVOFFSET(otherdev);
+		printf ("Unlocking flash...\n");
+		erase.length = DEVESIZE (otherdev);
+		erase.start = DEVOFFSET (otherdev);
 		ioctl (fdr, MEMUNLOCK, &erase);
 
 		if (HaveRedundEnv) {
-			erase.length = DEVESIZE(curdev);
-			erase.start = DEVOFFSET(curdev);
+			erase.length = DEVESIZE (curdev);
+			erase.start = DEVOFFSET (curdev);
 			ioctl (fd, MEMUNLOCK, &erase);
 			environment.flags = active_flag;
 		}
 
-		printf("Done\n");
-		resid = DEVESIZE(otherdev) - CFG_ENV_SIZE;
+		printf ("Done\n");
+		resid = DEVESIZE (otherdev) - CFG_ENV_SIZE;
 		if (resid) {
-			if ((data = malloc(resid)) == NULL) {
-				fprintf(stderr, 
-				  "Cannot malloc %d bytes: %s\n",
-				  resid, strerror(errno));
+			if ((data = malloc (resid)) == NULL) {
+				fprintf (stderr,
+					"Cannot malloc %d bytes: %s\n",
+					resid,
+					strerror (errno));
 				return (-1);
 			}
-			if (lseek (fdr, DEVOFFSET(otherdev) + CFG_ENV_SIZE, SEEK_SET) == -1) {
-				fprintf (stderr,
-				  "seek error on %s: %s\n", 
-				   DEVNAME(otherdev), strerror(errno));
+			if (lseek (fdr, DEVOFFSET (otherdev) + CFG_ENV_SIZE, SEEK_SET)
+				== -1) {
+				fprintf (stderr, "seek error on %s: %s\n",
+					DEVNAME (otherdev),
+					strerror (errno));
 				return (-1);
 			}
 			if ((rc = read (fdr, data, resid)) != resid) {
 				fprintf (stderr,
-				  "read error on %s: %s\n", 
-				  DEVNAME(otherdev), strerror(errno));
+					"read error on %s: %s\n",
+					DEVNAME (otherdev),
+					strerror (errno));
 				return (-1);
 			}
 		}
 
-		printf("Erasing old environment...\n");
+		printf ("Erasing old environment...\n");
 
-		erase.length = DEVESIZE(otherdev);
-		erase.start = DEVOFFSET(otherdev);
+		erase.length = DEVESIZE (otherdev);
+		erase.start = DEVOFFSET (otherdev);
 		if (ioctl (fdr, MEMERASE, &erase) != 0) {
 			fprintf (stderr, "MTD erase error on %s: %s\n",
-			  DEVNAME(otherdev), strerror(errno));
+				DEVNAME (otherdev),
+				strerror (errno));
 			return (-1);
 		}
 
-		printf("Done\n");
+		printf ("Done\n");
 
-		printf("Writing environment to %s...\n",DEVNAME(otherdev));
-		if (lseek (fdr, DEVOFFSET(otherdev), SEEK_SET) == -1) {
+		printf ("Writing environment to %s...\n", DEVNAME (otherdev));
+		if (lseek (fdr, DEVOFFSET (otherdev), SEEK_SET) == -1) {
 			fprintf (stderr,
-			  "seek error on %s: %s\n", 
-			  DEVNAME(otherdev), strerror(errno));
+				"seek error on %s: %s\n",
+				DEVNAME (otherdev), strerror (errno));
 			return (-1);
 		}
-		if (write(fdr, &environment, len) != len) {
+		if (write (fdr, &environment, len) != len) {
 			fprintf (stderr,
-			  "CRC write error on %s: %s\n", 
-			  DEVNAME(otherdev), strerror(errno));
+				"CRC write error on %s: %s\n",
+				DEVNAME (otherdev), strerror (errno));
 			return (-1);
 		}
-		if (write(fdr, environment.data, ENV_SIZE) != ENV_SIZE) {
+		if (write (fdr, environment.data, ENV_SIZE) != ENV_SIZE) {
 			fprintf (stderr,
-			  "Write error on %s: %s\n", 
-			  DEVNAME(otherdev), strerror(errno));
+				"Write error on %s: %s\n",
+				DEVNAME (otherdev), strerror (errno));
 			return (-1);
 		}
 		if (resid) {
 			if (write (fdr, data, resid) != resid) {
 				fprintf (stderr,
-				 "write error on %s: %s\n", 
-				  DEVNAME(curdev), strerror(errno));
+					"write error on %s: %s\n",
+					DEVNAME (curdev), strerror (errno));
 				return (-1);
 			}
-			free(data);
+			free (data);
 		}
 		if (HaveRedundEnv) {
 			/* change flag on current active env partition */
-			if (lseek (fd, DEVOFFSET(curdev) + sizeof(ulong), SEEK_SET) == -1) {
-				fprintf (stderr,
-						 "seek error on %s: %s\n", 
-						 DEVNAME(curdev), strerror(errno));
+			if (lseek (fd, DEVOFFSET (curdev) + sizeof (ulong), SEEK_SET)
+				== -1) {
+				fprintf (stderr, "seek error on %s: %s\n",
+					DEVNAME (curdev), strerror (errno));
 				return (-1);
 			}
-			if (write (fd, &obsolete_flag, sizeof(obsolete_flag)) != 
-				sizeof(obsolete_flag)) {
+			if (write (fd, &obsolete_flag, sizeof (obsolete_flag)) !=
+				sizeof (obsolete_flag)) {
 				fprintf (stderr,
-						 "Write error on %s: %s\n", 
-						 DEVNAME(curdev), strerror(errno));
+					"Write error on %s: %s\n",
+					DEVNAME (curdev), strerror (errno));
 				return (-1);
 			}
 		}
-		printf("Done\n");
-		printf("Locking ...\n");
-		erase.length = DEVESIZE(otherdev);
-		erase.start = DEVOFFSET(otherdev);
+		printf ("Done\n");
+		printf ("Locking ...\n");
+		erase.length = DEVESIZE (otherdev);
+		erase.start = DEVOFFSET (otherdev);
 		ioctl (fdr, MEMLOCK, &erase);
 		if (HaveRedundEnv) {
-			erase.length = DEVESIZE(curdev);
-			erase.start = DEVOFFSET(curdev);
+			erase.length = DEVESIZE (curdev);
+			erase.start = DEVOFFSET (curdev);
 			ioctl (fd, MEMLOCK, &erase);
-			if (close(fdr)) {
+			if (close (fdr)) {
 				fprintf (stderr,
-						 "I/O error on %s: %s\n", 
-						 DEVNAME(otherdev), strerror(errno));
+					"I/O error on %s: %s\n",
+					DEVNAME (otherdev),
+					strerror (errno));
 				return (-1);
 			}
 		}
-		printf("Done\n");
+		printf ("Done\n");
 	} else {
 
-		if (lseek (fd, DEVOFFSET(curdev), SEEK_SET) == -1) {
+		if (lseek (fd, DEVOFFSET (curdev), SEEK_SET) == -1) {
 			fprintf (stderr,
-					 "seek error on %s: %s\n", 
-					 DEVNAME(curdev), strerror(errno));
+				"seek error on %s: %s\n",
+				DEVNAME (curdev), strerror (errno));
 			return (-1);
 		}
 		if (read (fd, &environment, len) != len) {
 			fprintf (stderr,
-			 "CRC read error on %s: %s\n", 
-			 DEVNAME(curdev), strerror(errno));
+				"CRC read error on %s: %s\n",
+				DEVNAME (curdev), strerror (errno));
 			return (-1);
 		}
 		if ((rc = read (fd, environment.data, ENV_SIZE)) != ENV_SIZE) {
 			fprintf (stderr,
-			 "Read error on %s: %s\n", 
-			  DEVNAME(curdev), strerror(errno));
+				"Read error on %s: %s\n",
+				DEVNAME (curdev), strerror (errno));
 			return (-1);
 		}
 	}
 
-	if (close(fd)) {
+	if (close (fd)) {
 		fprintf (stderr,
-		  "I/O error on %s: %s\n", 
-		  DEVNAME(curdev), strerror(errno));
+			"I/O error on %s: %s\n",
+			DEVNAME (curdev), strerror (errno));
 		return (-1);
 	}
 
@@ -562,22 +566,21 @@ static int flash_io (int mode)
  * If the names match, return the value of s2, else NULL.
  */
 
-static uchar *
-envmatch (uchar *s1, uchar *s2)
+static uchar *envmatch (uchar * s1, uchar * s2)
 {
 
 	while (*s1 == *s2++)
 		if (*s1++ == '=')
-			return(s2);
-	if (*s1 == '\0' && *(s2-1) == '=')
-		return(s2);
-	return(NULL);
+			return (s2);
+	if (*s1 == '\0' && *(s2 - 1) == '=')
+		return (s2);
+	return (NULL);
 }
 
 /*
  * Prevent confusion if running from erased flash memory
  */
-static int env_init(void)
+static int env_init (void)
 {
 	int crc1, crc1_ok;
 	uchar *addr1;
@@ -585,151 +588,142 @@ static int env_init(void)
 	int crc2, crc2_ok;
 	uchar flag1, flag2, *addr2;
 
-	if (parse_config()) /* should fill envdevices */
+	if (parse_config ())		/* should fill envdevices */
 		return 1;
-	
+
 	if ((addr1 = calloc (1, ENV_SIZE)) == NULL) {
-		fprintf (stderr, 
-				 "Not enough memory for environment (%ld bytes)\n",
-				 ENV_SIZE);
+		fprintf (stderr,
+			"Not enough memory for environment (%ld bytes)\n",
+			ENV_SIZE);
 		return (errno);
 	}
-	
+
 	/* read environment from FLASH to local buffer */
 	environment.data = addr1;
 	curdev = 0;
 	if (flash_io (O_RDONLY)) {
 		return (errno);
 	}
-	
-	crc1_ok = ((crc1 = crc32(0, environment.data, ENV_SIZE)) 
+
+	crc1_ok = ((crc1 = crc32 (0, environment.data, ENV_SIZE))
 			   == environment.crc);
 	if (!HaveRedundEnv) {
 		if (!crc1_ok) {
-			fprintf (stderr, 
-					 "Warning: Bad CRC, using default environment\n");
+			fprintf (stderr,
+				"Warning: Bad CRC, using default environment\n");
 			environment.data = default_environment;
-			free(addr1);
+			free (addr1);
 		}
 	} else {
 		flag1 = environment.flags;
-		
+
 		curdev = 1;
 		if ((addr2 = calloc (1, ENV_SIZE)) == NULL) {
-			fprintf (stderr, 
-					 "Not enough memory for environment (%ld bytes)\n",
-					 ENV_SIZE);
+			fprintf (stderr,
+				"Not enough memory for environment (%ld bytes)\n",
+				ENV_SIZE);
 			return (errno);
-		}		
+		}
 		environment.data = addr2;
-		
+
 		if (flash_io (O_RDONLY)) {
 			return (errno);
 		}
-		
-		crc2_ok = ((crc2 = crc32(0, environment.data, ENV_SIZE)) 
+
+		crc2_ok = ((crc2 = crc32 (0, environment.data, ENV_SIZE))
 				   == environment.crc);
 		flag2 = environment.flags;
-		
-		if (crc1_ok && ! crc2_ok) {
-			environment.data  = addr1;
+
+		if (crc1_ok && !crc2_ok) {
+			environment.data = addr1;
 			environment.flags = flag1;
 			environment.crc = crc1;
 			curdev = 0;
-			free(addr2);
-		}
-		else if (! crc1_ok && crc2_ok) {
-			environment.data  = addr2;
+			free (addr2);
+		} else if (!crc1_ok && crc2_ok) {
+			environment.data = addr2;
 			environment.flags = flag2;
 			environment.crc = crc2;
 			curdev = 1;
-			free(addr1);
-		}
-		else if (! crc1_ok && ! crc2_ok) {
-			fprintf (stderr, 
-					 "Warning: Bad CRC, using default environment\n");
+			free (addr1);
+		} else if (!crc1_ok && !crc2_ok) {
+			fprintf (stderr,
+				"Warning: Bad CRC, using default environment\n");
 			environment.data = default_environment;
 			curdev = 0;
-			free(addr2);
-			free(addr1);
-		}
-		else if (flag1 == active_flag && flag2 == obsolete_flag) {
-			environment.data  = addr1;
+			free (addr2);
+			free (addr1);
+		} else if (flag1 == active_flag && flag2 == obsolete_flag) {
+			environment.data = addr1;
 			environment.flags = flag1;
 			environment.crc = crc1;
 			curdev = 0;
-			free(addr2);
-		}
-		else if (flag1 == obsolete_flag && flag2 == active_flag) {
-			environment.data  = addr2;
+			free (addr2);
+		} else if (flag1 == obsolete_flag && flag2 == active_flag) {
+			environment.data = addr2;
 			environment.flags = flag2;
 			environment.crc = crc2;
 			curdev = 1;
-			free(addr1);
-		}
-		else if (flag1 == flag2) {
-			environment.data  = addr1;
+			free (addr1);
+		} else if (flag1 == flag2) {
+			environment.data = addr1;
 			environment.flags = flag1;
 			environment.crc = crc1;
 			curdev = 0;
-			free(addr2);
-		}
-		else if (flag1 == 0xFF)	{
-			environment.data  = addr1;
+			free (addr2);
+		} else if (flag1 == 0xFF) {
+			environment.data = addr1;
 			environment.flags = flag1;
 			environment.crc = crc1;
 			curdev = 0;
-			free(addr2);
-		}
-		else if (flag2 == 0xFF) {
-			environment.data  = addr2;
+			free (addr2);
+		} else if (flag2 == 0xFF) {
+			environment.data = addr2;
 			environment.flags = flag2;
 			environment.crc = crc2;
 			curdev = 1;
-			free(addr1);
+			free (addr1);
 		}
 	}
 	return (0);
 }
 
 
-static int parse_config()
+static int parse_config ()
 {
 	struct stat st;
 
 #if defined(CONFIG_FILE)
 	/* Fills in DEVNAME(), ENVSIZE(), DEVESIZE(). Or don't. */
-	if (get_config(CONFIG_FILE)) {
+	if (get_config (CONFIG_FILE)) {
 		fprintf (stderr,
-				 "Cannot parse config file: %s\n",
-				 strerror(errno));
+			"Cannot parse config file: %s\n", strerror (errno));
 		return 1;
 	}
-
 #else
-	strcpy(DEVNAME(0), DEVICE1_NAME);
-	DEVOFFSET(0) = DEVICE1_OFFSET;
-	ENVSIZE(0) = ENV1_SIZE;
-	DEVESIZE(0) = DEVICE1_ESIZE;
+	strcpy (DEVNAME (0), DEVICE1_NAME);
+	DEVOFFSET (0) = DEVICE1_OFFSET;
+	ENVSIZE (0) = ENV1_SIZE;
+	DEVESIZE (0) = DEVICE1_ESIZE;
 #ifdef HAVE_REDUND
-	strcpy(DEVNAME(1), DEVICE2_NAME);
-	DEVOFFSET(1) = DEVICE2_OFFSET;
-	ENVSIZE(1) = ENV2_SIZE;
-	DEVESIZE(1) = DEVICE2_ESIZE;
+	strcpy (DEVNAME (1), DEVICE2_NAME);
+	DEVOFFSET (1) = DEVICE2_OFFSET;
+	ENVSIZE (1) = ENV2_SIZE;
+	DEVESIZE (1) = DEVICE2_ESIZE;
 	HaveRedundEnv = 1;
 #endif
 #endif
-	if (stat (DEVNAME(0), &st)) {
-		fprintf (stderr, 
-		 "Cannot access MTD device %s: %s\n", 
-		 DEVNAME(0), strerror(errno));
+	if (stat (DEVNAME (0), &st)) {
+		fprintf (stderr,
+			"Cannot access MTD device %s: %s\n",
+			DEVNAME (0), strerror (errno));
 		return 1;
 	}
-	
-	if (HaveRedundEnv && stat (DEVNAME(1), &st)) {
-		fprintf (stderr, 
-		 "Cannot access MTD device %s: %s\n", 
-		 DEVNAME(2), strerror(errno));
+
+	if (HaveRedundEnv && stat (DEVNAME (1), &st)) {
+		fprintf (stderr,
+			"Cannot access MTD device %s: %s\n",
+			DEVNAME (2), strerror (errno));
 		return 1;
 	}
 	return 0;
@@ -743,26 +737,28 @@ static int get_config (char *fname)
 	int rc;
 	char dump[128];
 
-	if ((fp = fopen(fname, "r")) == NULL) {
+	if ((fp = fopen (fname, "r")) == NULL) {
 		return 1;
 	}
 
-	while ((i < 2) && 
-		   ((rc = fscanf (fp, "%s %lx %lx %lx",
-						  DEVNAME(i), &DEVOFFSET(i), &ENVSIZE(i), &DEVESIZE(i))) != EOF)) {
+	while ((i < 2) && ((rc = fscanf (fp, "%s %lx %lx %lx",
+				  DEVNAME (i),
+				  &DEVOFFSET (i),
+				  &ENVSIZE (i),
+				  &DEVESIZE (i)  )) != EOF)) {
 
 		/* Skip incomplete conversions and comment strings */
-		if ((rc < 3) || (*DEVNAME(i) == '#')) { 
-			fgets (dump, sizeof(dump), fp); /* Consume till end */
+		if ((rc < 3) || (*DEVNAME (i) == '#')) {
+			fgets (dump, sizeof (dump), fp);	/* Consume till end */
 			continue;
 		}
 
 		i++;
 	}
-	fclose(fp);
-	
+	fclose (fp);
+
 	HaveRedundEnv = i - 1;
-	if (!i) { /* No valid entries found */
+	if (!i) {			/* No valid entries found */
 		errno = EINVAL;
 		return 1;
 	} else

tools/env/fw_env.h

@@ -27,7 +27,7 @@
  * See included "fw_env.config" sample file (TRAB board)
  * for notes on configuration.
  */
-/*#define CONFIG_FILE     "/etc/fw_env.config" */
+#define CONFIG_FILE     "/etc/fw_env.config"
 
 #define HAVE_REDUND /* For systems with 2 env sectors */
 #define DEVICE1_NAME      "/dev/mtd1"

tools/mkimage.c

@@ -92,6 +92,7 @@ table_entry_t os_name[] = {
     {	IH_OS_PSOS,	"psos",		"pSOS",			},
     {	IH_OS_QNX,	"qnx",		"QNX",			},
     {	IH_OS_U_BOOT,	"u-boot",	"U-Boot",		},
+    {	IH_OS_RTEMS,	"rtems",	"RTEMS",		},
     {	-1,		"",		"",			},
 };