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8 Commits

Author SHA1 Message Date
wdenk
b783edaee8 * Header file cleanup for ARM
* Patch by Murray Jensen, 24 Jun 2003:
  - make sure to use only U-boot provided header files
  - fix problems with ".rodata.str1.4" section as used by GCC-3.x
2003-06-25 22:26:29 +00:00
stroese
a300d83cb8 Patch from Stefan Roese. 2003-06-24 14:32:24 +00:00
stroese
a6457f7971 - Remove EEPROM command. 2003-06-24 14:31:16 +00:00
stroese
a0e135b493 - Add ping support. 2003-06-24 14:30:28 +00:00
stroese
e118e233a8 - Update NAND FLASH support. 2003-06-24 14:27:27 +00:00
stroese
95aeb34580 - Update new fpga file. 2003-06-24 14:26:41 +00:00
wdenk
cceb871fff * Patch by Yuli Barcohen, 23 Jun 2003:
Update for MPC8260ADS board

* Patch by Murray Jensen, 23 Jun 2003:
  - cleanup of GCC 3.x compiler warnings
2003-06-23 18:12:28 +00:00
wdenk
3595ac4979 * Patch by Rune Torgersen, 4 Jun 2003:
add large memory support for MPC8266ADS board

* Patch by Richard Woodruff, 19 June 03:
  - Enabled standard u-boot device abstraction for ARM
  - Enabled console device for ARM
  - Initilized bi_baudrate for ARM

* Patch by Bill Hargen, 23 Apr 2003:
  fix byte order for 824x I2C addresses (write op)
2003-06-22 17:18:28 +00:00
127 changed files with 4090 additions and 2905 deletions

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@@ -2,6 +2,34 @@
Changes since U-Boot 0.3.1:
======================================================================
* Header file cleanup for ARM
* Patch by Murray Jensen, 24 Jun 2003:
- make sure to use only U-boot provided header files
- fix problems with ".rodata.str1.4" section as used by GCC-3.x
* Patch by Stefan Roese, 24 Jun 2003:
- Update esd ASH405 board files.
- Update esd DASA_SIM config file.
- Add ping command to some esd boards.
* Patch by Yuli Barcohen, 23 Jun 2003:
Update for MPC8260ADS board
* Patch by Murray Jensen, 23 Jun 2003:
- cleanup of GCC 3.x compiler warnings
* Patch by Rune Torgersen, 4 Jun 2003:
add large memory support for MPC8266ADS board
* Patch by Richard Woodruff, 19 June 03:
- Enabled standard u-boot device abstraction for ARM
- Enabled console device for ARM
- Initilized bi_baudrate for ARM
* Patch by Bill Hargen, 23 Apr 2003:
fix byte order for 824x I2C addresses (write op)
* Patch by Murray Jensen, 20 Jun 2003:
- hymod update
- cleanup (especially for gcc-3.x compilers)
@@ -78,7 +106,7 @@ Changes since U-Boot 0.3.1:
* Patch by Nicolas Lacressonniere, 11 Jun 2003:
Modifications for Atmel AT91RM9200DK ARM920T based development kit
- Add Atmel DataFlash support for reading and writing.
- Add possibility to boot a Linux from DataFlash with BOOTM command.
- Add possibility to boot a Linux from DataFlash with BOOTM command.
- Add Flash detection on Atmel AT91RM9200DK
(between Atmel AT49BV1614 and AT49BV1614A flashes)
- Replace old Ethernet PHY layer functions

View File

@@ -802,7 +802,7 @@ clobber: clean
rm -f u-boot u-boot.bin u-boot.srec u-boot.map System.map
rm -f tools/crc32.c tools/environment.c tools/env/crc32.c
rm -f tools/inca-swap-bytes cpu/mpc824x/bedbug_603e.c
rm -f include/asm/arch include/asm
rm -f include/asm/proc include/asm/arch include/asm
mrproper \
distclean: clobber unconfig

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@@ -90,6 +90,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -75,6 +75,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -77,6 +77,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -77,6 +77,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -79,6 +79,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -61,6 +61,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -70,6 +70,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -88,6 +88,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -76,6 +76,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -68,6 +68,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -70,6 +70,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -61,6 +61,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -88,6 +88,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -70,6 +70,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -93,6 +93,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -73,6 +73,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -73,6 +73,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -66,6 +66,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -65,6 +65,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -62,6 +62,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -88,6 +88,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -74,6 +74,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -96,6 +96,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -238,10 +238,15 @@ int testdram (void)
/* ------------------------------------------------------------------------- */
#if (CONFIG_COMMANDS & CFG_CMD_NAND)
extern void nand_probe(ulong physadr);
#include <linux/mtd/nand.h>
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
void nand_init(void)
{
printf("Probing at 0x%.8x\n", CFG_NAND_BASE);
nand_probe(CFG_NAND_BASE);
if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
puts("NAND: ");
print_size(nand_dev_desc[0].totlen, "\n");
}
}
#endif

File diff suppressed because it is too large Load Diff

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@@ -86,6 +86,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -98,6 +98,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -86,6 +86,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -93,6 +93,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -86,6 +86,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -100,6 +100,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -86,6 +86,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -86,6 +86,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -86,6 +86,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -86,6 +86,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -76,6 +76,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -78,6 +78,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -73,6 +73,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -79,6 +79,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -65,6 +65,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -67,6 +67,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -66,6 +66,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -75,6 +75,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -65,6 +65,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -60,6 +60,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -76,6 +76,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -78,6 +78,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -79,6 +79,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -76,6 +76,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -60,6 +60,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -65,6 +65,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -79,6 +79,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -76,6 +76,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -65,6 +65,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -65,6 +65,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -83,6 +83,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -65,6 +65,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -37,6 +37,7 @@
#include <mpc8260.h>
#include <i2c.h>
#include <spd.h>
#include <miiphy.h>
/*
* I/O Port configuration table
@@ -133,8 +134,8 @@ const iop_conf_t iop_conf_tab[4][32] = {
/* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */
/* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */
/* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */
/* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK CLK13 */
/* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK14) */
/* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII Rx Clock (CLK13) */
/* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII Tx Clock (CLK14) */
/* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */
/* PC16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK16) */
/* PC15 */ { 0, 0, 0, 1, 0, 0 }, /* PC15 */
@@ -142,8 +143,8 @@ const iop_conf_t iop_conf_tab[4][32] = {
/* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */
/* PC12 */ { 0, 1, 0, 1, 0, 0 }, /* PC12 */
/* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* LXT971 transmit control */
/* PC10 */ { 1, 1, 0, 0, 0, 0 }, /* LXT970 FETHMDC */
/* PC9 */ { 1, 1, 0, 0, 0, 0 }, /* LXT970 FETHMDIO */
/* PC10 */ { 1, 0, 0, 1, 0, 0 }, /* LXT970 FETHMDC */
/* PC9 */ { 1, 0, 0, 0, 0, 0 }, /* LXT970 FETHMDIO */
/* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */
/* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */
/* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */
@@ -157,8 +158,8 @@ const iop_conf_t iop_conf_tab[4][32] = {
/* Port D */
{ /* conf ppar psor pdir podr pdat */
/* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */
/* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */
/* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 UART RxD */
/* PD30 */ { 1, 1, 1, 1, 0, 0 }, /* SCC1 UART TxD */
/* PD29 */ { 0, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */
/* PD28 */ { 0, 1, 0, 0, 0, 0 }, /* PD28 */
/* PD27 */ { 0, 1, 1, 1, 0, 0 }, /* PD27 */
@@ -173,14 +174,14 @@ const iop_conf_t iop_conf_tab[4][32] = {
/* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
/* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
/* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
/* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
/* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
/* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
/* PD14 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SCL */
/* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
/* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
/* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
/* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
/* PD9 */ { 1, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
/* PD8 */ { 1, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
/* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
/* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
/* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */
/* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
/* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
@@ -192,32 +193,33 @@ const iop_conf_t iop_conf_tab[4][32] = {
}
};
typedef struct bscr_ {
unsigned long bcsr0;
unsigned long bcsr1;
unsigned long bcsr2;
unsigned long bcsr3;
unsigned long bcsr4;
unsigned long bcsr5;
unsigned long bcsr6;
unsigned long bcsr7;
} bcsr_t;
void reset_phy (void)
{
volatile bcsr_t *bcsr = (bcsr_t *) CFG_BCSR;
vu_long *bcsr = (vu_long *)CFG_BCSR;
/* reset the FEC port */
bcsr->bcsr1 &= ~FETH_RST;
bcsr->bcsr1 |= FETH_RST;
bcsr[1] &= ~FETH_RST;
udelay(2);
bcsr[1] |= FETH_RST;
udelay(1000);
#ifdef CONFIG_MII
/*
* Ethernet PHY is configured (by means of configuration pins)
* to work at 10Mb/s only. We reconfigure it using MII
* to advertise all capabilities, including 100Mb/s, and
* restart autonegotiation.
*/
miiphy_write(0, PHY_ANAR, 0x01E1); /* Advertise all capabilities */
miiphy_write(0, PHY_DCR, 0x0000); /* Do not bypass Rx/Tx (de)scrambler */
miiphy_write(0, PHY_BMCR, PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
#endif /* CONFIG_MII */
}
int board_pre_init (void)
{
volatile bcsr_t *bcsr = (bcsr_t *) CFG_BCSR;
vu_long *bcsr = (vu_long *)CFG_BCSR;
bcsr->bcsr1 = ~FETHIEN & ~RS232EN_1;
bcsr[1] = ~FETHIEN & ~RS232EN_1;
return 0;
}

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@@ -60,6 +60,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -46,7 +46,7 @@
* PSDMR_BUFCMD adds a clock
* 0 no extra clock
*/
#define CONFIG_PBI 0
#define CONFIG_PBI PSDMR_PBI
#define PESSIMISTIC_SDRAM 0
#define EAMUX 0 /* EST requires EAMUX */
#define BUFCMD 0
@@ -379,6 +379,25 @@ long int initdram(int board_type)
sdram_size = 1 << (rows + cols + banks + width);
/* hack for high density memory (512MB per CS) */
/* !!!!! Will ONLY work with Page Based Interleave !!!!!
( PSDMR[PBI] = 1 )
*/
/* mamory actually has 11 column addresses, but the memory controller
doesn't really care.
the calculations that follow will however move the rows so that
they are muxed one bit off if you use 11 bit columns.
The solution is to tell the memory controller the correct size of the memory
but change the number of columns to 10 afterwards.
The 11th column addre will still be mucxed correctly onto the bus.
Also be aware that the MPC8266ADS board Rev B has not connected
Row addres 13 to anything.
The fix is to connect ADD16 (from U37-47) to SADDR12 (U28-126)
*/
if (cols > 10)
cols = 10;
#if(CONFIG_PBI == 0) /* bank-based interleaving */
rowst = ((32 - 6) - (rows + cols + width)) * 2;

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@@ -60,6 +60,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

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@@ -92,6 +92,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -88,6 +88,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -70,6 +70,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -82,6 +82,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -76,6 +76,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -66,6 +66,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -67,6 +67,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -76,6 +76,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -61,6 +61,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -70,6 +70,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -61,6 +61,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -74,6 +74,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -76,6 +76,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -77,6 +77,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -60,6 +60,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -65,6 +65,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -60,6 +60,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -67,6 +67,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -60,6 +60,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -76,6 +76,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -74,6 +74,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -61,6 +61,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -65,6 +65,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -65,6 +65,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -65,6 +65,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -79,6 +79,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -61,6 +61,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -79,6 +79,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -75,6 +75,7 @@ SECTIONS
. = ALIGN(16);
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -81,6 +81,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -70,6 +70,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -88,6 +88,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -76,6 +76,7 @@ SECTIONS
{
*(.rodata)
*(.rodata1)
*(.rodata.str1.4)
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }

View File

@@ -792,15 +792,7 @@ ide_inb(int dev, int port)
#endif /* __PPC__ */
#ifdef __PPC__
__inline__ unsigned ld_le16(const volatile unsigned short *addr)
{
unsigned val;
__asm__ __volatile__ ("lhbrx %0,0,%1" : "=r"(val) : "r"(addr), "m"(*addr));
return val;
}
#ifdef CONFIG_AMIGAONEG3SE
# ifdef CONFIG_AMIGAONEG3SE
static void
output_data_short(int dev, ulong *sect_buf, int words)
{
@@ -818,7 +810,7 @@ output_data_short(int dev, ulong *sect_buf, int words)
if (words&1)
*pbuf = 0;
}
#endif
# endif /* CONFIG_AMIGAONEG3SE */
static void
input_swap_data(int dev, ulong *sect_buf, int words)

View File

@@ -160,14 +160,16 @@ int devices_init (void)
{
DECLARE_GLOBAL_DATA_PTR;
int i;
#ifndef CONFIG_ARM /* already relocated for current ARM implementation */
ulong relocation_offset = gd->reloc_off;
int i;
/* relocate device name pointers */
for (i = 0; i < (sizeof (stdio_names) / sizeof (char *)); ++i) {
stdio_names[i] = (char *) (((ulong) stdio_names[i]) +
relocation_offset);
}
#endif
/* Initialize the list */
devlist = ListCreate (sizeof (device_t));

View File

@@ -107,10 +107,12 @@ LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds
endif
OBJCFLAGS += --gap-fill=0xff
gccincdir := $(shell $(CC) -print-file-name=include)
CPPFLAGS := $(DBGFLAGS) $(OPTFLAGS) $(RELFLAGS) \
-D__KERNEL__ -DTEXT_BASE=$(TEXT_BASE) \
-I$(TOPDIR)/include \
-fno-builtin \
-fno-builtin -nostdinc -isystem $(gccincdir) \
-pipe $(PLATFORM_CPPFLAGS)
ifdef BUILD_TAG

View File

@@ -33,6 +33,7 @@
#include <common.h>
#include <command.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
/* read co-processor 15, register #1 (control register) */
static unsigned long read_p15_c1(void)

Some files were not shown because too many files have changed in this diff Show More