Code cleanup

* Patch by Pavel Bartusek, 21 Mar 2004
Add Reiserfs support * Patch by Hinko Kocevar, 20 Mar 2004 - Add auto-release for SMSC LAN91c111 driver - Add save/restore of PTR and PNR regs as suggested in datasheet
2026-06-12 14:47:22 +03:00 · 2004-03-25 15:14:43 +00:00 · 2004-03-25 14:59:05 +00:00 · 2004-03-23 23:20:24 +00:00 · 2004-03-23 22:53:55 +00:00 · 2004-03-23 22:37:33 +00:00
119 changed files with 8457 additions and 1788 deletions
--- a/97
+++ b/97
@@ -2,6 +2,99 @@
 Changes for U-Boot 1.0.2:
 ======================================================================

+* Patch by Pavel Bartusek, 21 Mar 2004
+  Add Reiserfs support
+
+* Patch by Hinko Kocevar, 20 Mar 2004
+  - Add auto-release for SMSC LAN91c111 driver
+  - Add save/restore of PTR and PNR regs as suggested in datasheet
+
+* Patch by Stephen Williams, 19 March 2004
+  Increase speed of sector reads from SystemACE,
+  shorten poll timeout and remove a useless reset
+
+* Patch by Tolunay Orkun, 19 Mar 2004:
+  Make GigE PHY 1000Mbps Speed/Duplex detection conditional
+  (CONFIG_PHY_GIGE)
+
+* Patch by Brad Kemp, 18 Mar 2004:
+  prevent machine checks during a PCI scan
+
+* Patch by Pierre Aubert, 18 Mar 2004:
+  Fix string cleaning in IDE identification
+
+* Patch by Pierre Aubert, 18 Mar 2004:
+  - Unify video mode handling for Chips & Technologies 69000 Video
+    chip and Silicon Motion SMI 712/710/810 Video chip
+  - Add selection of the video output (CRT or LCD) via 'videoout'
+    environment variable for the Silicon Motion
+  - README update
+
+* Patch by Pierre Aubert, 18 Mar 2004:
+  include/common.h typo fix
+
+* Patches by Tolunay Orkun, 17 Mar 2004:
+  - Add support for bd->bi_iic_fast[] initialization via environment
+    variable "i2cfast" (CONFIG_I2CFAST)
+  - Add "i2cfast" u-boot environment variable support for csb272
+
+* Patch by Carl Riechers, 17 Mar 2004:
+  Ignore '\0' characters in console input for use with telnet and
+  telco pads.
+
+* Patch by Leon Kukovec, 17 Mar 2004:
+  typo fix for strswab prototype #ifdef
+
+* Patches by Thomas Viehweger, 16 Mar 2004:
+  - show PCI clock frequency on MPC8260 systems
+  - add FCC_PSMR_RMII flag for HiP7 processors
+  - in do_jffs2_fsload(), take load address from load_addr if not set
+    explicit, update load_addr otherwise
+  - replaced printf by putc/puts when no formatting is needed
+    (smaller code size, faster execution)
+
+* Patch by Phillippe Robin, 16 Mar 2004:
+  avoid dereferencing NULL pointer in lib_arm/armlinux.c
+
+* Patch by Stephen Williams, 15 Mar 2004:
+  Fix CONFIG_SERIAL_SOFTWARE_FIFO documentation
+
+* Patch by Tolunay Orkun, 15 Mar 2004:
+  Initialize bi_opbfreq to real OPB frequency via get_OPB_freq()
+
+* Patch by Travis Sawyer, 15 Mar 2004:
+  Update CREDITS & MAINTAINERS files for PPC440GX & Ocotea port
+
+* Add start-up delay to make sure power has stabilized before
+  attempting to switch on USB on SX1 board.
+
+* Patch by Josef Wagner, 18 Mar 2004:
+  - Add support for MicroSys XM250 board (PXA255)
+  - Add support for MicroSys PM828 board (MPC8280)
+  - Add support for 32 MB Flash on PM825/826
+  - new SDRAM refresh rate for PM825/PM826
+  - added support for MicroSys PM520 (MPC5200)
+  - replaced Query by Identify command in CPU86/flash.c
+    to support 28F160F3B
+
+* Fix wrap around problem with udelay() on ARM920T
+
+* Add support for Macronix flash on TRAB board
+
+* Patch by Pierre Aubert, 15 Mar 2004:
+  Fix buffer overflow in IDE identification
+
+* Fix power-off of LCD for out-of-band temperatures on LWMON board
+
+* Remove redundand #define in IceCube.h
+
+* Patch by Steven Scholz, 27 Feb 2004:
+  - Adding get_ticks() and get_tbclk() for AT91RM9200
+  - Many white space fixes in cpu/at91rm9200/interrupts.c
+
+* Patches by Steven Scholz, 20 Feb 2004:
+  some cleanup in AT91RM9200 related code
+
 * Patches by Travis Sawyer, 12 Mar 2004:
  - Fix Gigabit Ethernet support for 440GX
  - Add Gigabit Ethernet Support to MII PHY utilities
@@ -22,7 +115,7 @@ Changes for U-Boot 1.0.2:
 * Patch by George G. Davis, 11 Mar 2004:
  add support for ADS GraphicsClient+ board.

-* Patch by  Pierre Aubert, 11 Mar 2004:
+* Patch by Pierre Aubert, 11 Mar 2004:
  - add bitmap command and splash screen support in cfb console
  - add [optional] origin in the bitmap display command

@@ -50,7 +143,7 @@ Changes for U-Boot 1.0.2:
  Don't overwrite server IP address or boot file name
  when the boot server does not return values

-* Patch by listmember@orkun.us, 5 Mar 2004:
+* Patch by Tolunay Orkun, 5 Mar 2004:
  Removed compile time restriction on CFG_I2C_SPEED for DS1338 RTC

 * Patch by Tolunay Orkun, 5 Mar 2004:
--- a/11
+++ b/11
@@ -38,6 +38,11 @@ N: Jerry van Baren
 E: <vanbaren@cideas.com>
 D: BedBug port to 603e core (MPC82xx). Code for enhanced memory test.

+N: Pavel Bartusek
+E: <pba@sysgo.com>
+D: Reiserfs support
+W: http://www.elinos.com
+
 N: Andre Beaudin
 E: <andre.beaudin@colubris.com>
 D: PCMCIA, Ethernet, TFTP
@@ -252,6 +257,10 @@ E: rof@sysgo.de
 D: Initial support for SSV-DNP1110, SMC91111 driver
 W: www.elinos.com

+N: Tolunay Orkun
+E: torkun@nextio.com
+D: Support for Cogent CSB272 board
+
 N: Keith Outwater
 E: keith_outwater@mvis.com
 D: Support for generic/custom MPC860T boards (GEN860T, GEN860T_SC)
@@ -284,7 +293,7 @@ D: Author of LiMon-1.4.2, which contributed some ideas

 N: Travis B. Sawyer
 E: travis.sawyer@sandburst.com
-D: Support for IBM PPC440GX, XES XPedite1000 440GX PrPMC board.
+D: Support for IBM PPC440GX, XES XPedite1000 440GX PrPMC board.  IBM 440gx Ref Platform (Ocotea)

 N: Paolo Scaffardi
 E: arsenio@tin.it
--- a/5
+++ b/5
@@ -230,6 +230,11 @@ Stefan Roese <stefan.roese@esd-electronics.com>
 	PMC405			PPC405GP
 	VOH405			PPC405EP

+Travis Sawyer (travis.sawyer@sandburst.com>
+
+	XPEDITE1K		PPC440GX
+	OCOTEA			PPC440GX
+
 Peter De Schrijver <p2@mind.be>

 	ML2			PPC4xx
--- a/11
+++ b/11
@@ -25,7 +25,7 @@ LIST_5xx="	\
 #########################################################################

 LIST_5xxx="	\
-	IceCube_5100	IceCube_5200	EVAL5200	\
+	IceCube_5100	IceCube_5200	EVAL5200	PM520		\
 "

 #########################################################################
@@ -85,9 +85,10 @@ LIST_824x="	\
 LIST_8260="	\
 	atc		cogent_mpc8260	CPU86		ep8260		\
 	gw8260		hymod		IPHASE4539	MPC8260ADS	\
-	MPC8266ADS	PM826		ppmc8260	RPXsuper	\
-	rsdproto	sacsng		sbc8260		SCM		\
-	TQM8260_AC	TQM8260_AD	TQM8260_AE	ZPC1900		\
+	MPC8266ADS	PM826		PM828		ppmc8260	\
+	RPXsuper	rsdproto	sacsng		sbc8260		\
+	SCM		TQM8260_AC	TQM8260_AD	TQM8260_AE	\
+	ZPC1900		\
 "

 #########################################################################
@@ -145,7 +146,7 @@ LIST_ARM9="	\
 ## Xscale Systems
 #########################################################################

-LIST_pxa="cradle csb226 innokom lubbock wepep250"
+LIST_pxa="cradle csb226 innokom lubbock wepep250 xm250"

 LIST_ixp="ixdp425"

--- a/93
+++ b/93
@@ -99,7 +99,8 @@ LIBS  = lib_generic/libgeneric.a
 LIBS += board/$(BOARDDIR)/lib$(BOARD).a
 LIBS += cpu/$(CPU)/lib$(CPU).a
 LIBS += lib_$(ARCH)/lib$(ARCH).a
-LIBS += fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a
+LIBS += fs/cramfs/libcramfs.a fs/fat/libfat.a fs/fdos/libfdos.a fs/jffs2/libjffs2.a \
+	fs/reiserfs/libreiserfs.a
 LIBS += net/libnet.a
 LIBS += disk/libdisk.a
 LIBS += rtc/librtc.a
@@ -244,6 +245,9 @@ TOP5200_config:	unconfig
 	@ echo "#define CONFIG_$(@:_config=) 1"	>include/config.h
 	@./mkconfig -a TOP5200 ppc mpc5xxx top5200 emk

+PM520_config:	unconfig
+	@./mkconfig $(@:_config=) ppc mpc5xxx pm520
+
 #########################################################################
 ## MPC8xx Systems
 #########################################################################
@@ -652,7 +656,7 @@ XPEDITE1K_config:unconfig
 #########################################################################
 ## MPC824x Systems
 #########################################################################
-xtract_82xx = $(subst _ROMBOOT,,$(subst _L2,,$(subst _266MHz,,$(subst _300MHz,,$(subst _config,,$1)))))
+xtract_82xx = $(subst _BIGFLASH,,$(subst _ROMBOOT,,$(subst _L2,,$(subst _266MHz,,$(subst _300MHz,,$(subst _config,,$1))))))

 A3000_config: unconfig
 	@./mkconfig $(@:_config=) ppc mpc824x a3000
@@ -747,32 +751,56 @@ MPC8260ADS_config:	unconfig
 MPC8266ADS_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8260 mpc8266ads

+# PM825/PM826 default configuration:  small (= 8 MB) Flash / boot from 64-bit flash
 PM825_config	\
-PM825_ROMBOOT_config: unconfig
-	@echo "#define CONFIG_PCI"	>include/config.h
-	@./mkconfig -a PM826 ppc mpc8260 pm826
-	@cd ./include ;				\
-	if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
-		echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
-		echo "... booting from 8-bit flash" ; \
-	else \
-		echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
-		echo "... booting from 64-bit flash" ; \
-	fi; \
-	echo "export CONFIG_BOOT_ROM" >> config.mk; \
-
+PM825_ROMBOOT_config	\
+PM825_BIGFLASH_config	\
+PM825_ROMBOOT_BIGFLASH_config	\
 PM826_config	\
-PM826_ROMBOOT_config: unconfig
-	@./mkconfig $(call xtract_82xx,$@) ppc mpc8260 pm826
-	@cd ./include ;				\
-	if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
-		echo "CONFIG_BOOT_ROM = y" >> config.mk ; \
-		echo "... booting from 8-bit flash" ; \
+PM826_ROMBOOT_config	\
+PM826_BIGFLASH_config	\
+PM826_ROMBOOT_BIGFLASH_config:	unconfig
+	@if [ "$(findstring PM825_,$@)" ] ; then \
+		echo "#define CONFIG_PCI"	>include/config.h ; \
+	else \
+		>include/config.h ; \
+	fi
+	@if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
+		echo "... booting from 8-bit flash" ; \
+		echo "#define CONFIG_BOOT_ROM" >>include/config.h ; \
+		echo "TEXT_BASE = 0xFF800000" >board/pm826/config.tmp ; \
+		if [ "$(findstring _BIGFLASH_,$@)" ] ; then \
+			echo "... with 32 MB Flash" ; \
+			echo "#define CONFIG_FLASH_32MB" >>include/config.h ; \
+		fi; \
 	else \
-		echo "CONFIG_BOOT_ROM = n" >> config.mk ; \
 		echo "... booting from 64-bit flash" ; \
-	fi; \
-	echo "export CONFIG_BOOT_ROM" >> config.mk; \
+		if [ "$(findstring _BIGFLASH_,$@)" ] ; then \
+			echo "... with 32 MB Flash" ; \
+			echo "#define CONFIG_FLASH_32MB" >>include/config.h ; \
+			echo "TEXT_BASE = 0x40000000" >board/pm826/config.tmp ; \
+		else \
+			echo "TEXT_BASE = 0xFF000000" >board/pm826/config.tmp ; \
+		fi; \
+	fi
+	@./mkconfig -a PM826 ppc mpc8260 pm826
+
+PM828_config	\
+PM828_PCI_config	\
+PM828_ROMBOOT_config	\
+PM828_ROMBOOT_PCI_config:	unconfig
+	@if [ -z "$(findstring _PCI_,$@)" ] ; then \
+		echo "#define CONFIG_PCI"  >>include/config.h ; \
+		echo "... with PCI enabled" ; \
+	else \
+		>include/config.h ; \
+	fi
+	@if [ "$(findstring _ROMBOOT_,$@)" ] ; then \
+		echo "... booting from 8-bit flash" ; \
+		echo "#define CONFIG_BOOT_ROM" >>include/config.h ; \
+		echo "TEXT_BASE = 0xFF800000" >board/pm826/config.tmp ; \
+	fi
+	@./mkconfig -a PM828 ppc mpc8260 pm828

 ppmc8260_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8260 ppmc8260
@@ -905,9 +933,6 @@ ZUMA_config:	unconfig
 ## StrongARM Systems
 #########################################################################

-at91rm9200dk_config	:	unconfig
-	@./mkconfig $(@:_config=) arm at91rm9200 at91rm9200dk
-
 dnp1110_config	:	unconfig
 	@./mkconfig $(@:_config=) arm sa1100 dnp1110

@@ -951,10 +976,10 @@ omap1610h2_cs0boot_config \
 omap1610h2_cs3boot_config :	unconfig
 	@if [ "$(findstring _cs0boot_, $@)" ] ; then \
 		echo "#define CONFIG_CS0_BOOT" >> ./include/config.h ; \
-		echo "Configured for CS0 boot"; \
+		echo "... configured for CS0 boot"; \
 	else \
 		echo "#define CONFIG_CS3_BOOT" >> ./include/config.h ; \
-		echo "Configured for CS3 boot"; \
+		echo "... configured for CS3 boot"; \
 	fi;
 	@./mkconfig -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn

@@ -1013,6 +1038,13 @@ ep7312_config	:	unconfig
 modnet50_config :	unconfig
 	@./mkconfig $(@:_config=) arm arm720t modnet50

+#########################################################################
+## AT91RM9200 Systems
+#########################################################################
+
+at91rm9200dk_config	:	unconfig
+	@./mkconfig $(@:_config=) arm at91rm9200 at91rm9200dk
+
 #########################################################################
 ## XScale Systems
 #########################################################################
@@ -1038,6 +1070,9 @@ logodl_config	:	unconfig
 wepep250_config	:	unconfig
 	@./mkconfig $(@:_config=) arm pxa wepep250

+xm250_config	:	unconfig
+	@./mkconfig $(@:_config=) arm pxa xm250
+
 #========================================================================
 # i386
 #========================================================================
--- a/33
+++ b/33
@@ -441,8 +441,8 @@ The following options need to be configured:
 		(RTS/CTS) and UART's built-in FIFO. Set the number of
 		bytes the interrupt driven input buffer should have.

-		Set to 0 to disable this feature (this is the default).
-		This will also disable hardware handshake.
+		Leave undefined to disable this feature, including
+		disable the buffer and hardware handshake.

 - Console UART Number:
 		CONFIG_UART1_CONSOLE
@@ -778,17 +778,30 @@ The following options need to be configured:
 		Enable Chips & Technologies 69000 Video chip

 		CONFIG_VIDEO_SMI_LYNXEM
-		Enable Silicon Motion SMI 712/710/810 Video chip
-		Videomode are selected via environment 'videomode' with
-		standard LiLo mode numbers.
-		Following modes are supported  (* is default):
+		Enable Silicon Motion SMI 712/710/810 Video chip. The
+		video output is selected via environment 'videoout'
+		(1 = LCD and 2 = CRT). If videoout is undefined, CRT is
+		assumed.

-			    800x600  1024x768  1280x1024
-	      256  (8bit)     303*	305	  307
-	    65536 (16bit)     314	317	  31a
-	16,7 Mill (24bit)     315	318	  31b
+		For the CT69000 and SMI_LYNXEM drivers, videomode is
+		selected via environment 'videomode'. Two diferent ways
+		are possible:
+		- "videomode=num"   'num' is a standard LiLo mode numbers.
+		Following standard modes are supported  (* is default):
+
+		      Colors	640x480 800x600 1024x768 1152x864 1280x1024
+		-------------+---------------------------------------------
+		      8 bits |	0x301*	0x303	 0x305	  0x161	    0x307
+		     15 bits |	0x310	0x313	 0x316	  0x162	    0x319
+		     16 bits |	0x311	0x314	 0x317	  0x163	    0x31A
+		     24 bits |	0x312	0x315	 0x318	    ?	    0x31B
+		-------------+---------------------------------------------
 		(i.e. setenv videomode 317; saveenv; reset;)

+		- "videomode=bootargs" all the video parameters are parsed
+		from the bootargs. (See drivers/videomodes.c)
+
+
 		CONFIG_VIDEO_SED13806
 		Enable Epson SED13806 driver. This driver supports 8bpp
 		and 16bpp modes defined by CONFIG_VIDEO_SED13806_8BPP
--- a/board/cpu86/flash.c
+++ b/board/cpu86/flash.c
@@ -41,10 +41,10 @@ ulong flash_int_get_size (volatile unsigned long *baseaddr,
 	info->sector_count = info->size = 0;
 	info->flash_id = FLASH_UNKNOWN;

-	/* Write query command sequence and test FLASH answer
+	/* Write identify command sequence and test FLASH answer
 	 */
-	baseaddr[0] = 0x00980098;
-	baseaddr[1] = 0x00980098;
+	baseaddr[0] = 0x00900090;
+	baseaddr[1] = 0x00900090;

 	flashtest_h = baseaddr[0];	/* manufacturer ID	*/
 	flashtest_l = baseaddr[1];
--- a/board/eXalion/Makefile
+++ b/board/eXalion/Makefile
@@ -29,7 +29,7 @@ OBJS	= $(BOARD).o
 SOBJS	=

 $(LIB):	.depend $(OBJS) $(SOBJS)
-	$(AR) crv $@ $^
+	$(AR) crv $@ $(OBJS) $(SOBJS)

 #########################################################################

--- a/board/pm520/Makefile
+++ b/board/pm520/Makefile
@@ -0,0 +1,47 @@
+
+#
+# (C) Copyright 2003-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	:= $(BOARD).o flash.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $(OBJS)
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
--- a/board/pm520/config.mk
+++ b/board/pm520/config.mk
@@ -0,0 +1,31 @@
+#
+# (C) Copyright 2003-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# PM520 board
+#
+
+TEXT_BASE = 0xfff00000
+# TEXT_BASE = 0x00100000
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
--- a/board/pm520/flash.c
+++ b/board/pm520/flash.c
@@ -0,0 +1,545 @@
+/*
+ * (C) Copyright 2001
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * (C) Copyright 2001-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <linux/byteorder/swab.h>
+
+
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];	/* info for FLASH chips    */
+
+/* Board support for 1 or 2 flash devices */
+#define FLASH_PORT_WIDTH32
+#undef FLASH_PORT_WIDTH16
+
+#ifdef FLASH_PORT_WIDTH16
+#define FLASH_PORT_WIDTH		ushort
+#define FLASH_PORT_WIDTHV		vu_short
+#define SWAP(x)               		(x)
+#else
+#define FLASH_PORT_WIDTH		ulong
+#define FLASH_PORT_WIDTHV		vu_long
+#define SWAP(x)               		(x)
+#endif
+
+/* Intel-compatible flash ID */
+#define INTEL_COMPAT  0x00890089
+#define INTEL_ALT     0x00B000B0
+
+/* Intel-compatible flash commands */
+#define INTEL_PROGRAM 0x00100010
+#define INTEL_ERASE   0x00200020
+#define INTEL_CLEAR   0x00500050
+#define INTEL_LOCKBIT 0x00600060
+#define INTEL_PROTECT 0x00010001
+#define INTEL_STATUS  0x00700070
+#define INTEL_READID  0x00900090
+#define INTEL_CONFIRM 0x00D000D0
+#define INTEL_RESET   0xFFFFFFFF
+
+/* Intel-compatible flash status bits */
+#define INTEL_FINISHED 0x00800080
+#define INTEL_OK       0x00800080
+
+#define FPW	   FLASH_PORT_WIDTH
+#define FPWV   FLASH_PORT_WIDTHV
+
+#define mb() __asm__ __volatile__ ("" : : : "memory")
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (FPW *addr, flash_info_t *info);
+static int write_data (flash_info_t *info, ulong dest, FPW data);
+static void flash_get_offsets (ulong base, flash_info_t *info);
+void inline spin_wheel (void);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+	int i;
+	ulong size = 0;
+
+	for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+		switch (i) {
+		case 0:
+			flash_get_size ((FPW *) CFG_FLASH_BASE, &flash_info[i]);
+			flash_get_offsets (CFG_FLASH_BASE, &flash_info[i]);
+			break;
+		default:
+			panic ("configured to many flash banks!\n");
+			break;
+		}
+		size += flash_info[i].size;
+	}
+
+	/* Protect monitor and environment sectors
+	 */
+	flash_protect ( FLAG_PROTECT_SET,
+			CFG_MONITOR_BASE,
+			CFG_MONITOR_BASE + monitor_flash_len - 1,
+			&flash_info[0] );
+
+	flash_protect ( FLAG_PROTECT_SET,
+			CFG_ENV_ADDR,
+			CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0] );
+
+	return size;
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+	int i;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		return;
+	}
+
+	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
+		for (i = 0; i < info->sector_count; i++) {
+			info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
+			info->protect[i] = 0;
+		}
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t *info)
+{
+	int i;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_INTEL:
+		printf ("INTEL ");
+		break;
+	default:
+		printf ("Unknown Vendor ");
+		break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_28F128J3A:
+		printf ("28F128J3A\n");
+		break;
+
+	case FLASH_28F640J3A:
+		printf ("28F640J3A\n");
+		break;
+
+	case FLASH_28F320J3A:
+		printf ("28F320J3A\n");
+		break;
+
+	default:
+		printf ("Unknown Chip Type\n");
+		break;
+	}
+
+	printf ("  Size: %ld MB in %d Sectors\n",
+			info->size >> 20, info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i = 0; i < info->sector_count; ++i) {
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     ");
+	}
+	printf ("\n");
+	return;
+}
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size (FPW *addr, flash_info_t *info)
+{
+	volatile FPW value;
+
+	/* Write auto select command: read Manufacturer ID */
+	addr[0x5555] = (FPW) 0x00AA00AA;
+	addr[0x2AAA] = (FPW) 0x00550055;
+	addr[0x5555] = (FPW) 0x00900090;
+
+	mb ();
+	value = addr[0];
+
+	switch (value) {
+
+	case (FPW) INTEL_MANUFACT:
+		info->flash_id = FLASH_MAN_INTEL;
+		break;
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		addr[0] = (FPW) 0x00FF00FF;	/* restore read mode */
+		return (0);			/* no or unknown flash  */
+	}
+
+	mb ();
+	value = addr[1];			/* device ID        */
+
+	switch (value) {
+
+	case (FPW) INTEL_ID_28F128J3A:
+		info->flash_id += FLASH_28F128J3A;
+		info->sector_count = 128;
+		info->size = 0x02000000;
+		break;				/* => 32 MB     */
+
+	case (FPW) INTEL_ID_28F640J3A:
+		info->flash_id += FLASH_28F640J3A;
+		info->sector_count = 64;
+		info->size = 0x01000000;
+		break;				/* => 16 MB     */
+
+	case (FPW) INTEL_ID_28F320J3A:
+		info->flash_id += FLASH_28F320J3A;
+		info->sector_count = 32;
+		info->size = 0x00800000;
+		break;				/* => 8 MB     */
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		break;
+	}
+
+	if (info->sector_count > CFG_MAX_FLASH_SECT) {
+		printf ("** ERROR: sector count %d > max (%d) **\n",
+			info->sector_count, CFG_MAX_FLASH_SECT);
+		info->sector_count = CFG_MAX_FLASH_SECT;
+	}
+
+	addr[0] = (FPW) 0x00FF00FF;		/* restore read mode */
+
+	return (info->size);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+
+int flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	int flag, prot, sect;
+	ulong type, start, last;
+	int rcode = 0;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	type = (info->flash_id & FLASH_VENDMASK);
+	if ((type != FLASH_MAN_INTEL)) {
+		printf ("Can't erase unknown flash type %08lx - aborted\n",
+			info->flash_id);
+		return 1;
+	}
+
+	prot = 0;
+	for (sect = s_first; sect <= s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	start = get_timer (0);
+	last = start;
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts ();
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect <= s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+			FPWV *addr = (FPWV *) (info->start[sect]);
+			FPW status;
+
+			printf ("Erasing sector %2d ... ", sect);
+
+			/* arm simple, non interrupt dependent timer */
+			start = get_timer(0);
+
+			*addr = (FPW) 0x00500050;	/* clear status register */
+			*addr = (FPW) 0x00200020;	/* erase setup */
+			*addr = (FPW) 0x00D000D0;	/* erase confirm */
+
+			while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
+				if (get_timer(start) > CFG_FLASH_ERASE_TOUT) {
+					printf ("Timeout\n");
+					*addr = (FPW) 0x00B000B0;	/* suspend erase     */
+					*addr = (FPW) 0x00FF00FF;	/* reset to read mode */
+					rcode = 1;
+					break;
+				}
+			}
+
+			*addr = 0x00500050;	/* clear status register cmd.   */
+			*addr = 0x00FF00FF;	/* resest to read mode          */
+
+			printf (" done\n");
+		}
+	}
+	return rcode;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ * 4 - Flash not identified
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong cp, wp;
+	FPW data;
+	int count, i, l, rc, port_width;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		return 4;
+	}
+/* get lower word aligned address */
+#ifdef FLASH_PORT_WIDTH16
+	wp = (addr & ~1);
+	port_width = 2;
+#else
+	wp = (addr & ~3);
+	port_width = 4;
+#endif
+
+	/*
+	 * handle unaligned start bytes
+	 */
+	if ((l = addr - wp) != 0) {
+		data = 0;
+		for (i = 0, cp = wp; i < l; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *) cp);
+		}
+		for (; i < port_width && cnt > 0; ++i) {
+			data = (data << 8) | *src++;
+			--cnt;
+			++cp;
+		}
+		for (; cnt == 0 && i < port_width; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *) cp);
+		}
+
+		if ((rc = write_data (info, wp, SWAP (data))) != 0) {
+			return (rc);
+		}
+		wp += port_width;
+	}
+
+	/*
+	 * handle word aligned part
+	 */
+	count = 0;
+	while (cnt >= port_width) {
+		data = 0;
+		for (i = 0; i < port_width; ++i) {
+			data = (data << 8) | *src++;
+		}
+		if ((rc = write_data (info, wp, SWAP (data))) != 0) {
+			return (rc);
+		}
+		wp += port_width;
+		cnt -= port_width;
+		if (count++ > 0x800) {
+			spin_wheel ();
+			count = 0;
+		}
+	}
+
+	if (cnt == 0) {
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+	data = 0;
+	for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
+		data = (data << 8) | *src++;
+		--cnt;
+	}
+	for (; i < port_width; ++i, ++cp) {
+		data = (data << 8) | (*(uchar *) cp);
+	}
+
+	return (write_data (info, wp, SWAP (data)));
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word or halfword to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_data (flash_info_t *info, ulong dest, FPW data)
+{
+	FPWV *addr = (FPWV *) dest;
+	ulong status;
+	ulong start;
+	int flag;
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*addr & data) != data) {
+		printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
+		return (2);
+	}
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts ();
+
+	*addr = (FPW) 0x00400040;	/* write setup */
+	*addr = data;
+
+	/* arm simple, non interrupt dependent timer */
+	start = get_timer(0);
+
+	/* wait while polling the status register */
+	while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
+		if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+			*addr = (FPW) 0x00FF00FF;	/* restore read mode */
+			return (1);
+		}
+	}
+
+	*addr = (FPW) 0x00FF00FF;	/* restore read mode */
+
+	return (0);
+}
+
+void inline spin_wheel (void)
+{
+	static int p = 0;
+	static char w[] = "\\/-";
+
+	printf ("\010%c", w[p]);
+	(++p == 3) ? (p = 0) : 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Set/Clear sector's lock bit, returns:
+ * 0 - OK
+ * 1 - Error (timeout, voltage problems, etc.)
+ */
+int flash_real_protect(flash_info_t *info, long sector, int prot)
+{
+	ulong start;
+	int i;
+	int rc = 0;
+	vu_long *addr = (vu_long *)(info->start[sector]);
+	int flag = disable_interrupts();
+
+	*addr = INTEL_CLEAR;	/* Clear status register */
+	if (prot) {			/* Set sector lock bit */
+		*addr = INTEL_LOCKBIT;	/* Sector lock bit */
+		*addr = INTEL_PROTECT;	/* set */
+	}
+	else {				/* Clear sector lock bit */
+		*addr = INTEL_LOCKBIT;	/* All sectors lock bits */
+		*addr = INTEL_CONFIRM;	/* clear */
+	}
+
+	start = get_timer(0);
+
+	while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
+		if (get_timer(start) > CFG_FLASH_UNLOCK_TOUT) {
+			printf("Flash lock bit operation timed out\n");
+			rc = 1;
+			break;
+		}
+	}
+
+	if (*addr != INTEL_OK) {
+		printf("Flash lock bit operation failed at %08X, CSR=%08X\n",
+		       (uint)addr, (uint)*addr);
+		rc = 1;
+	}
+
+	if (!rc)
+		info->protect[sector] = prot;
+
+	/*
+	 * Clear lock bit command clears all sectors lock bits, so
+	 * we have to restore lock bits of protected sectors.
+	 */
+	if (!prot)
+	{
+		for (i = 0; i < info->sector_count; i++)
+		{
+			if (info->protect[i])
+			{
+				start = get_timer(0);
+				addr = (vu_long *)(info->start[i]);
+				*addr = INTEL_LOCKBIT;	/* Sector lock bit */
+				*addr = INTEL_PROTECT;	/* set */
+				while ((*addr & INTEL_FINISHED) != INTEL_FINISHED)
+				{
+					if (get_timer(start) > CFG_FLASH_UNLOCK_TOUT)
+					{
+						printf("Flash lock bit operation timed out\n");
+						rc = 1;
+						break;
+					}
+				}
+			}
+		}
+	}
+
+	if (flag)
+		enable_interrupts();
+
+	*addr = INTEL_RESET;		/* Reset to read array mode */
+
+	return rc;
+}
--- a/board/pm520/pm520.c
+++ b/board/pm520/pm520.c
@@ -0,0 +1,193 @@
+/*
+ * (C) Copyright 2003-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc5xxx.h>
+#include <pci.h>
+
+#ifndef CFG_RAMBOOT
+static long int dram_size(long int *base, long int maxsize)
+{
+	volatile long int *addr;
+	ulong cnt, val;
+	ulong save[32];			/* to make test non-destructive */
+	unsigned char i = 0;
+
+	for (cnt = (maxsize / sizeof (long)) >> 1; cnt > 0; cnt >>= 1) {
+		addr = base + cnt;		/* pointer arith! */
+
+		save[i++] = *addr;
+		*addr = ~cnt;
+	}
+
+	/* write 0 to base address */
+	addr = base;
+	save[i] = *addr;
+	*addr = 0;
+
+	/* check at base address */
+	if ((val = *addr) != 0) {
+		*addr = save[i];
+		return (0);
+	}
+
+	for (cnt = 1; cnt < maxsize / sizeof (long); cnt <<= 1) {
+		addr = base + cnt;		/* pointer arith! */
+
+		val = *addr;
+		*addr = save[--i];
+
+		if (val != (~cnt)) {
+			return (cnt * sizeof (long));
+		}
+	}
+	return (maxsize);
+}
+
+static void sdram_start (int hi_addr)
+{
+	long hi_addr_bit = hi_addr ? 0x01000000 : 0;
+
+	/* unlock mode register */
+	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0000 | hi_addr_bit;
+	/* precharge all banks */
+	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0002 | hi_addr_bit;
+	/* set mode register */
+#if defined(CONFIG_MPC5200)
+	*(vu_long *)MPC5XXX_SDRAM_MODE = 0x408d0000;
+#elif defined(CONFIG_MGT5100)
+	*(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000;
+#endif
+	/* precharge all banks */
+	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0002 | hi_addr_bit;
+	/* auto refresh */
+	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0004 | hi_addr_bit;
+	/* set mode register */
+	*(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000;
+	/* normal operation */
+	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0x504f0000 | hi_addr_bit;
+}
+#endif
+
+long int initdram (int board_type)
+{
+	ulong dramsize = 0;
+#ifndef CFG_RAMBOOT
+	ulong test1, test2;
+
+	/* configure SDRAM start/end */
+#if defined(CONFIG_MPC5200)
+	*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e;/* 2G at 0x0 */
+	*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000;/* disabled */
+
+	/* setup config registers */
+	*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = 0xc2233a00;
+	*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = 0x88b70004;
+
+#elif defined(CONFIG_MGT5100)
+	*(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
+	*(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */
+	*(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
+
+	/* setup config registers */
+	*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = 0xc2222600;
+	*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = 0x88b70004;
+
+	/* address select register */
+	*(vu_long *)MPC5XXX_SDRAM_XLBSEL = 0x03000000;
+#endif
+	sdram_start(0);
+	test1 = dram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
+	sdram_start(1);
+	test2 = dram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
+	if (test1 > test2) {
+		sdram_start(0);
+		dramsize = test1;
+	} else {
+		dramsize = test2;
+	}
+#if defined(CONFIG_MPC5200)
+	*(vu_long *)MPC5XXX_SDRAM_CS0CFG =
+		(0x13 + __builtin_ffs(dramsize >> 20) - 1);
+	*(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
+#elif defined(CONFIG_MGT5100)
+	*(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
+#endif
+
+#else
+#ifdef CONFIG_MGT5100
+	*(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
+	dramsize = ((*(vu_long *)MPC5XXX_SDRAM_STOP + 1) << 15);
+#else
+	dramsize = ((1 << (*(vu_long *)MPC5XXX_SDRAM_CS0CFG - 0x13)) << 20);
+#endif
+#endif /* CFG_RAMBOOT */
+	/* return total ram size */
+	return dramsize;
+}
+
+int checkboard (void)
+{
+#if defined(CONFIG_MPC5200)
+	puts ("Board: MicroSys PM520 \n");
+#elif defined(CONFIG_MGT5100)
+	puts ("Board: MicroSys PM510 \n");
+#endif
+	return 0;
+}
+
+void flash_preinit(void)
+{
+	/*
+	 * Now, when we are in RAM, enable flash write
+	 * access for detection process.
+	 * Note that CS_BOOT cannot be cleared when
+	 * executing in flash.
+	 */
+#if defined(CONFIG_MGT5100)
+	*(vu_long *)MPC5XXX_ADDECR &= ~(1 << 25); /* disable CS_BOOT */
+	*(vu_long *)MPC5XXX_ADDECR |= (1 << 16); /* enable CS0 */
+#endif
+	*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
+}
+
+void flash_afterinit(ulong size)
+{
+	if (size == 0x800000) { /* adjust mapping */
+		*(vu_long *)MPC5XXX_BOOTCS_START = *(vu_long *)MPC5XXX_CS0_START =
+			START_REG(CFG_BOOTCS_START | size);
+		*(vu_long *)MPC5XXX_BOOTCS_STOP = *(vu_long *)MPC5XXX_CS0_STOP =
+			STOP_REG(CFG_BOOTCS_START | size, size);
+	}
+}
+
+#ifdef	CONFIG_PCI
+static struct pci_controller hose;
+
+extern void pci_mpc5xxx_init(struct pci_controller *);
+
+void pci_init_board(void)
+{
+	pci_mpc5xxx_init(&hose);
+}
+#endif
--- a/board/pm520/u-boot.lds
+++ b/board/pm520/u-boot.lds
@@ -0,0 +1,122 @@
+/*
+ * (C) Copyright 2003-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    cpu/mpc5xxx/start.o	(.text)
+    *(.text)
+    *(.fixup)
+    *(.got1)
+    . = ALIGN(16);
+    *(.rodata)
+    *(.rodata1)
+    *(.rodata.str1.4)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/pm826/config.mk
+++ b/board/pm826/config.mk
@@ -1,5 +1,5 @@
 #
-# (C) Copyright 2001, 2002
+# (C) Copyright 2001-2004
 # Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 #
 # See file CREDITS for list of people who contributed to this
@@ -22,21 +22,16 @@
 #

 #
-# PM826 boards
+# MicroSys PM826 board:
 #

-# This should be equal to the CFG_FLASH_BASE or
-# CFG_BOOTROM_BASE define in config_PM826.h
-# for the "final" configuration, with U-Boot
-# in flash, or the address in RAM where
-# U-Boot is loaded at for debugging.
-#

-ifeq ($(CONFIG_BOOT_ROM),y)
-	TEXT_BASE := 0xFF800000
-	PLATFORM_CPPFLAGS += -DCONFIG_BOOT_ROM
-else
-	TEXT_BASE := 0xFF000000
+sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
+
+ifndef TEXT_BASE
+## Standard: boot 64-bit flash
+TEXT_BASE = 0xFF000000
+
 endif

 PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
--- a/board/pm826/flash.c
+++ b/board/pm826/flash.c
@@ -69,6 +69,11 @@ ulong flash_get_size (volatile unsigned long *baseaddr,
 		info->sector_count = 39;
 		info->size = 0x00800000;	/* 4 * 2 MB = 8 MB      */
 		break;
+	case INTEL_ID_28F640C3B:
+		info->flash_id = FLASH_28F640C3B;
+		info->sector_count = 135;
+		info->size = 0x02000000;	/* 16 * 2 MB = 32 MB	*/
+		break;
 	default:
 		return (0);			/* no or unknown flash	*/
 	}
@@ -79,10 +84,11 @@ ulong flash_get_size (volatile unsigned long *baseaddr,
 		volatile unsigned long *tmp = baseaddr;

 		/* set up sector start adress table (bottom sector type)
-		 * AND unlock the sectors (if our chip is 160C3)
+		 * AND unlock the sectors (if our chip is 160C3 or 640C3)
 		 */
 		for (i = 0; i < info->sector_count; i++) {
-			if ((info->flash_id & FLASH_TYPEMASK) == FLASH_28F160C3B) {
+			if (((info->flash_id & FLASH_TYPEMASK) == FLASH_28F160C3B) ||
+			    ((info->flash_id & FLASH_TYPEMASK) == FLASH_28F640C3B)) {
 				tmp[0] = 0x00600060;
 				tmp[1] = 0x00600060;
 				tmp[0] = 0x00D000D0;
@@ -177,6 +183,9 @@ void flash_print_info (flash_info_t * info)
 	case FLASH_28F160F3B:
 		printf ("28F160F3B (16 M, bottom sector)\n");
 		break;
+	case FLASH_28F640C3B:
+		printf ("28F640C3B (64 M, bottom sector)\n");
+		break;
 	default:
 		printf ("Unknown Chip Type\n");
 		break;
--- a/board/pm828/Makefile
+++ b/board/pm828/Makefile
@@ -0,0 +1,40 @@
+#
+# (C) Copyright 2001-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	= $(BOARD).o flash.o
+
+$(LIB):	.depend $(OBJS)
+	$(AR) crv $@ $(OBJS)
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/board/pm828/config.mk
+++ b/board/pm828/config.mk
@@ -0,0 +1,37 @@
+#
+# (C) Copyright 2003-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# MicroSys PM828 board:
+#
+
+
+sinclude $(TOPDIR)/board/$(BOARDDIR)/config.tmp
+
+ifndef TEXT_BASE
+## Standard: boot 64-bit flash
+TEXT_BASE = 0x40000000
+
+endif
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
--- a/board/pm828/flash.c
+++ b/board/pm828/flash.c
@@ -0,0 +1,386 @@
+/*
+ * (C) Copyright 2001-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Flash Routines for Intel devices
+ *
+ *--------------------------------------------------------------------
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc8xx.h>
+
+
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+
+/*-----------------------------------------------------------------------
+ */
+ulong flash_get_size (volatile unsigned long *baseaddr,
+					  flash_info_t * info)
+{
+	short i;
+	unsigned long flashtest_h, flashtest_l;
+
+	info->sector_count = info->size = 0;
+	info->flash_id = FLASH_UNKNOWN;
+
+	/* Write query command sequence and test FLASH answer
+	 */
+	baseaddr[0] = 0x00980098;
+	baseaddr[1] = 0x00980098;
+
+	flashtest_h = baseaddr[0];	/* manufacturer ID	*/
+	flashtest_l = baseaddr[1];
+
+	if (flashtest_h != INTEL_MANUFACT || flashtest_l != INTEL_MANUFACT)
+		return (0);		/* no or unknown flash	*/
+
+	flashtest_h = baseaddr[2];	/* device ID	        */
+	flashtest_l = baseaddr[3];
+
+	if (flashtest_h != flashtest_l)
+		return (0);
+
+	switch (flashtest_h) {
+	case INTEL_ID_28F160C3B:
+		info->flash_id = FLASH_28F160C3B;
+		info->sector_count = 39;
+		info->size = 0x00800000;	/* 4 * 2 MB = 8 MB	*/
+		break;
+	case INTEL_ID_28F160F3B:
+		info->flash_id = FLASH_28F160F3B;
+		info->sector_count = 39;
+		info->size = 0x00800000;	/* 4 * 2 MB = 8 MB      */
+		break;
+	case INTEL_ID_28F640C3B:
+		info->flash_id = FLASH_28F640C3B;
+		info->sector_count = 135;
+		info->size = 0x02000000;	/* 16 * 2 MB = 32 MB	*/
+		break;
+	default:
+		return (0);			/* no or unknown flash	*/
+	}
+
+	info->flash_id |= INTEL_MANUFACT << 16; /* set manufacturer offset */
+
+	if (info->flash_id & FLASH_BTYPE) {
+		volatile unsigned long *tmp = baseaddr;
+
+		/* set up sector start adress table (bottom sector type)
+		 * AND unlock the sectors (if our chip is 160C3 or 640c3)
+		 */
+		for (i = 0; i < info->sector_count; i++) {
+			if (((info->flash_id & FLASH_TYPEMASK) == FLASH_28F160C3B) ||
+			    ((info->flash_id & FLASH_TYPEMASK) == FLASH_28F640C3B)) {
+				tmp[0] = 0x00600060;
+				tmp[1] = 0x00600060;
+				tmp[0] = 0x00D000D0;
+				tmp[1] = 0x00D000D0;
+			}
+			info->start[i] = (uint) tmp;
+			tmp += i < 8 ? 0x2000 : 0x10000; /* pointer arith       */
+		}
+	}
+
+	memset (info->protect, 0, info->sector_count);
+
+	baseaddr[0] = 0x00FF00FF;
+	baseaddr[1] = 0x00FF00FF;
+
+	return (info->size);
+}
+
+/*-----------------------------------------------------------------------
+ */
+unsigned long flash_init (void)
+{
+	unsigned long size_b0 = 0;
+	int i;
+
+	/* Init: no FLASHes known
+	 */
+	for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
+		flash_info[i].flash_id = FLASH_UNKNOWN;
+	}
+
+	/* Static FLASH Bank configuration here (only one bank) */
+
+	size_b0 = flash_get_size ((ulong *) CFG_FLASH0_BASE, &flash_info[0]);
+	if (flash_info[0].flash_id == FLASH_UNKNOWN || size_b0 == 0) {
+		printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+				size_b0, size_b0 >> 20);
+	}
+
+	/* protect monitor and environment sectors
+	 */
+
+#ifndef CONFIG_BOOT_ROM
+	/* If U-Boot is  booted from ROM the CFG_MONITOR_BASE > CFG_FLASH0_BASE
+	 * but we shouldn't protect it.
+	 */
+
+# if CFG_MONITOR_BASE >= CFG_FLASH0_BASE
+	flash_protect (FLAG_PROTECT_SET,
+		       CFG_MONITOR_BASE,
+		       CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]
+	);
+# endif
+#endif	/* CONFIG_BOOT_ROM */
+
+#if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR)
+# ifndef  CFG_ENV_SIZE
+#  define CFG_ENV_SIZE	CFG_ENV_SECT_SIZE
+# endif
+	flash_protect (FLAG_PROTECT_SET,
+		       CFG_ENV_ADDR,
+		       CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
+#endif
+
+	return (size_b0);
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t * info)
+{
+	int i;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch ((info->flash_id >> 16) & 0xff) {
+	case 0x89:
+		printf ("INTEL ");
+		break;
+	default:
+		printf ("Unknown Vendor ");
+		break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_28F160C3B:
+		printf ("28F160C3B (16 M, bottom sector)\n");
+		break;
+	case FLASH_28F160F3B:
+		printf ("28F160F3B (16 M, bottom sector)\n");
+		break;
+	case FLASH_28F640C3B:
+		printf ("28F640C3B (64 M, bottom sector)\n");
+		break;
+	default:
+		printf ("Unknown Chip Type\n");
+		break;
+	}
+
+	printf ("  Size: %ld MB in %d Sectors\n",
+			info->size >> 20, info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i = 0; i < info->sector_count; ++i) {
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     "
+		);
+	}
+	printf ("\n");
+}
+
+/*-----------------------------------------------------------------------
+ */
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+	int flag, prot, sect;
+	ulong start, now, last;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	prot = 0;
+	for (sect = s_first; sect <= s_last; sect++) {
+		if (info->protect[sect])
+			prot++;
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+				prot);
+	} else {
+		printf ("\n");
+	}
+
+	/* Start erase on unprotected sectors
+	 */
+	for (sect = s_first; sect <= s_last; sect++) {
+		volatile ulong *addr =
+				(volatile unsigned long *) info->start[sect];
+
+		start = get_timer (0);
+		last = start;
+		if (info->protect[sect] == 0) {
+			/* Disable interrupts which might cause a timeout here
+			 */
+			flag = disable_interrupts ();
+
+			/* Erase the block
+			 */
+			addr[0] = 0x00200020;
+			addr[1] = 0x00200020;
+			addr[0] = 0x00D000D0;
+			addr[1] = 0x00D000D0;
+
+			/* re-enable interrupts if necessary
+			 */
+			if (flag)
+				enable_interrupts ();
+
+			/* wait at least 80us - let's wait 1 ms
+			 */
+			udelay (1000);
+
+			last = start;
+			while ((addr[0] & 0x00800080) != 0x00800080 ||
+				   (addr[1] & 0x00800080) != 0x00800080) {
+				if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
+					printf ("Timeout (erase suspended!)\n");
+					/* Suspend erase
+					 */
+					addr[0] = 0x00B000B0;
+					addr[1] = 0x00B000B0;
+					goto DONE;
+				}
+				/* show that we're waiting
+				 */
+				if ((now - last) > 1000) {	/* every second */
+					serial_putc ('.');
+					last = now;
+				}
+			}
+			if (addr[0] & 0x00220022 || addr[1] & 0x00220022) {
+				printf ("*** ERROR: erase failed!\n");
+				goto DONE;
+			}
+		}
+		/* Clear status register and reset to read mode
+		 */
+		addr[0] = 0x00500050;
+		addr[1] = 0x00500050;
+		addr[0] = 0x00FF00FF;
+		addr[1] = 0x00FF00FF;
+	}
+
+	printf (" done\n");
+
+DONE:
+	return 0;
+}
+
+static int write_word (flash_info_t *, volatile unsigned long *, ulong);
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+	ulong v;
+	int i, l, cc = cnt, res = 0;
+
+
+	for (v=0; cc > 0; addr += 4, cc -= 4 - l) {
+		l = (addr & 3);
+		addr &= ~3;
+
+		for (i = 0; i < 4; i++) {
+			v = (v << 8) + (i < l || i - l >= cc ?
+				*((unsigned char *) addr + i) : *src++);
+		}
+
+		if ((res = write_word (info, (volatile unsigned long *) addr, v)) != 0)
+			break;
+	}
+
+	return (res);
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word (flash_info_t * info, volatile unsigned long *addr,
+					   ulong data)
+{
+	int flag, res = 0;
+	ulong start;
+
+	/* Check if Flash is (sufficiently) erased
+	 */
+	if ((*addr & data) != data)
+		return (2);
+
+	/* Disable interrupts which might cause a timeout here
+	 */
+	flag = disable_interrupts ();
+
+	*addr = 0x00400040;
+	*addr = data;
+
+	/* re-enable interrupts if necessary
+	 */
+	if (flag)
+		enable_interrupts ();
+
+	start = get_timer (0);
+	while ((*addr & 0x00800080) != 0x00800080) {
+		if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+			/* Suspend program
+			 */
+			*addr = 0x00B000B0;
+			res = 1;
+			goto OUT;
+		}
+	}
+
+	if (*addr & 0x00220022) {
+		printf ("*** ERROR: program failed!\n");
+		res = 1;
+	}
+
+OUT:
+	/* Clear status register and reset to read mode
+	 */
+	*addr = 0x00500050;
+	*addr = 0x00FF00FF;
+
+	return (res);
+}
--- a/board/pm828/pm828.c
+++ b/board/pm828/pm828.c
@@ -0,0 +1,363 @@
+/*
+ * (C) Copyright 2001-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ioports.h>
+#include <mpc8260.h>
+#include <pci.h>
+
+/*
+ * I/O Port configuration table
+ *
+ * if conf is 1, then that port pin will be configured at boot time
+ * according to the five values podr/pdir/ppar/psor/pdat for that entry
+ */
+
+const iop_conf_t iop_conf_tab[4][32] = {
+
+    /* Port A configuration */
+    {	/*	      conf ppar psor pdir podr pdat */
+	/* PA31 */ {   1,   1,   1,   0,   0,   0   }, /* FCC1 COL */
+	/* PA30 */ {   1,   1,   1,   0,   0,   0   }, /* FCC1 CRS */
+	/* PA29 */ {   1,   1,   1,   1,   0,   0   }, /* FCC1 TXER */
+	/* PA28 */ {   1,   1,   1,   1,   0,   0   }, /* FCC1 TXEN */
+	/* PA27 */ {   1,   1,   1,   0,   0,   0   }, /* FCC1 RXDV */
+	/* PA26 */ {   1,   1,   1,   0,   0,   0   }, /* FCC1 RXER */
+	/* PA25 */ {   0,   0,   0,   1,   0,   0   }, /* PA25 */
+	/* PA24 */ {   0,   0,   0,   1,   0,   0   }, /* PA24 */
+	/* PA23 */ {   0,   0,   0,   1,   0,   0   }, /* PA23 */
+	/* PA22 */ {   0,   0,   0,   1,   0,   0   }, /* PA22 */
+	/* PA21 */ {   1,   1,   0,   1,   0,   0   }, /* FCC1 TXD3 */
+	/* PA20 */ {   1,   1,   0,   1,   0,   0   }, /* FCC1 TXD2 */
+	/* PA19 */ {   1,   1,   0,   1,   0,   0   }, /* FCC1 TXD1 */
+	/* PA18 */ {   1,   1,   0,   1,   0,   0   }, /* FCC1 TXD0 */
+	/* PA17 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 RXD0 */
+	/* PA16 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 RXD1*/
+	/* PA15 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 RXD2 */
+	/* PA14 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 RXD3 */
+	/* PA13 */ {   0,   0,   0,   1,   0,   0   }, /* PA13 */
+	/* PA12 */ {   0,   0,   0,   1,   0,   0   }, /* PA12 */
+	/* PA11 */ {   0,   0,   0,   1,   0,   0   }, /* PA11 */
+	/* PA10 */ {   0,   0,   0,   1,   0,   0   }, /* PA10 */
+	/* PA9  */ {   0,   1,   0,   1,   0,   0   }, /* PA9 */
+	/* PA8  */ {   0,   1,   0,   0,   0,   0   }, /* PA8 */
+	/* PA7  */ {   0,   0,   0,   1,   0,   0   }, /* PA7 */
+	/* PA6  */ {   0,   0,   0,   1,   0,   0   }, /* PA6 */
+	/* PA5  */ {   0,   0,   0,   1,   0,   0   }, /* PA5 */
+	/* PA4  */ {   0,   0,   0,   1,   0,   0   }, /* PA4 */
+	/* PA3  */ {   0,   0,   0,   1,   0,   0   }, /* PA3 */
+	/* PA2  */ {   0,   0,   0,   1,   0,   0   }, /* PA2 */
+	/* PA1  */ {   0,   0,   0,   1,   0,   0   }, /* PA1 */
+	/* PA0  */ {   0,   0,   0,   1,   0,   0   }  /* PA0 */
+    },
+
+    /* Port B configuration */
+    {   /*	      conf ppar psor pdir podr pdat */
+	/* PB31 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 TX_ER */
+	/* PB30 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 RX_DV  */
+	/* PB29 */ {   1,   1,   1,   1,   0,   0   }, /* FCC2 TX_EN  */
+#if defined(CONFIG_ETHER_ON_SCC) && (CONFIG_ETHER_INDEX == 1)
+#ifdef CONFIG_ETHER_ON_FCC2
+#error "SCC1 conflicts with FCC2"
+#endif
+	/* PB28 */ {   1,   1,   1,   1,   0,   0   }, /* SCC1 TXD */
+#else
+	/* PB28 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 RX_ER */
+#endif
+	/* PB27 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 COL */
+	/* PB26 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 CRS */
+	/* PB25 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 TxD[3] */
+	/* PB24 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 TxD[2] */
+	/* PB23 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 TxD[1] */
+	/* PB22 */ {   1,   1,   0,   1,   0,   0   }, /* FCC2 TxD[0] */
+	/* PB21 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 RxD[0] */
+	/* PB20 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 RxD[1] */
+	/* PB19 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 RxD[2] */
+	/* PB18 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 RxD[3] */
+	/* PB17 */ {   0,   0,   0,   0,   0,   0   }, /* PB17 */
+	/* PB16 */ {   0,   0,   0,   0,   0,   0   }, /* PB16 */
+	/* PB15 */ {   1,   1,   0,   0,   0,   0   }, /* SCC2 RXD */
+	/* PB14 */ {   1,   1,   0,   0,   0,   0   }, /* SCC3 RXD */
+	/* PB13 */ {   0,   0,   0,   0,   0,   0   }, /* PB13 */
+	/* PB12 */ {   0,   0,   0,   0,   0,   0   }, /* PB12 */
+	/* PB11 */ {   0,   0,   0,   0,   0,   0   }, /* PB11 */
+	/* PB10 */ {   0,   0,   0,   0,   0,   0   }, /* PB10 */
+	/* PB9  */ {   0,   0,   0,   0,   0,   0   }, /* PB9 */
+	/* PB8  */ {   1,   1,   1,   1,   0,   0   }, /* SCC3 TXD */
+	/* PB7  */ {   0,   0,   0,   0,   0,   0   }, /* PB7 */
+	/* PB6  */ {   0,   0,   0,   0,   0,   0   }, /* PB6 */
+	/* PB5  */ {   0,   0,   0,   0,   0,   0   }, /* PB5 */
+	/* PB4  */ {   0,   0,   0,   0,   0,   0   }, /* PB4 */
+	/* PB3  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
+	/* PB2  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
+	/* PB1  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
+	/* PB0  */ {   0,   0,   0,   0,   0,   0   }  /* pin doesn't exist */
+    },
+
+    /* Port C */
+    {   /*	      conf ppar psor pdir podr pdat */
+	/* PC31 */ {   0,   0,   0,   1,   0,   0   }, /* PC31 */
+	/* PC30 */ {   0,   0,   0,   1,   0,   0   }, /* PC30 */
+	/* PC29 */ {   0,   1,   1,   0,   0,   0   }, /* SCC1 CTS */
+	/* PC28 */ {   0,   0,   0,   1,   0,   0   }, /* SCC2 CTS */
+	/* PC27 */ {   0,   0,   0,   1,   0,   0   }, /* PC27 */
+	/* PC26 */ {   0,   0,   0,   1,   0,   0   }, /* PC26 */
+	/* PC25 */ {   0,   0,   0,   1,   0,   0   }, /* PC25 */
+	/* PC24 */ {   0,   0,   0,   1,   0,   0   }, /* PC24 */
+	/* PC23 */ {   0,   1,   0,   1,   0,   0   }, /* PC23 */
+	/* PC22 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 TXCK */
+	/* PC21 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 RXCK */
+	/* PC20 */ {   1,   1,   0,   0,   0,   0   }, /* FCC1 TXCK(2) */
+	/* PC19 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 RXCK */
+	/* PC18 */ {   1,   1,   0,   0,   0,   0   }, /* FCC2 TXCK */
+	/* PC17 */ {   0,   0,   0,   1,   0,   0   }, /* PC17 */
+	/* PC16 */ {   0,   0,   0,   1,   0,   0   }, /* PC16 */
+	/* PC15 */ {   1,   1,   0,   1,   0,   0   }, /* SMC2 TXD */
+	/* PC14 */ {   0,   1,   0,   0,   0,   0   }, /* SCC1 DCD */
+	/* PC13 */ {   0,   0,   0,   1,   0,   0   }, /* PC13 */
+	/* PC12 */ {   0,   0,   0,   1,   0,   0   }, /* SCC2 DCD */
+	/* PC11 */ {   0,   0,   0,   1,   0,   0   }, /* SCC3 CTS */
+	/* PC10 */ {   0,   0,   0,   1,   0,   0   }, /* SCC3 DCD */
+	/* PC9  */ {   0,   0,   0,   1,   0,   0   }, /* SCC4 CTS */
+	/* PC8  */ {   0,   0,   0,   1,   0,   0   }, /* SCC4 DCD */
+	/* PC7  */ {   0,   0,   0,   1,   0,   0   }, /* PC7 */
+	/* PC6  */ {   0,   0,   0,   1,   0,   0   }, /* PC6 */
+	/* PC5  */ {   0,   0,   0,   1,   0,   0   }, /* PC5 */
+	/* PC4  */ {   0,   0,   0,   1,   0,   0   }, /* PC4 */
+	/* PC3  */ {   0,   0,   0,   1,   0,   0   }, /* PC3 */
+	/* PC2  */ {   0,   0,   0,   1,   0,   1   }, /* PC2 */
+	/* PC1  */ {   0,   0,   0,   1,   0,   0   }, /* PC1 */
+	/* PC0  */ {   0,   0,   0,   1,   0,   0   }, /* PC0 */
+    },
+
+    /* Port D */
+    {   /*	      conf ppar psor pdir podr pdat */
+	/* PD31 */ {   1,   1,   0,   0,   0,   0   }, /* SCC1 RXD */
+	/* PD30 */ {   0,   1,   1,   1,   0,   0   }, /* PD30 */
+	/* PD29 */ {   0,   1,   0,   1,   0,   0   }, /* SCC1 RTS */
+	/* PD28 */ {   0,   0,   0,   1,   0,   0   }, /* PD28 */
+	/* PD27 */ {   0,   1,   0,   1,   0,   0   }, /* SCC2 RTS */
+	/* PD26 */ {   0,   0,   0,   1,   0,   0   }, /* PD26 */
+	/* PD25 */ {   0,   0,   0,   1,   0,   0   }, /* PD25 */
+	/* PD24 */ {   0,   0,   0,   1,   0,   0   }, /* PD24 */
+	/* PD23 */ {   0,   0,   0,   1,   0,   0   }, /* SCC3 RTS */
+	/* PD22 */ {   1,   1,   0,   0,   0,   0   }, /* SCC4 RXD */
+	/* PD21 */ {   1,   1,   0,   1,   0,   0   }, /* SCC4 TXD */
+	/* PD20 */ {   0,   0,   1,   1,   0,   0   }, /* SCC4 RTS */
+	/* PD19 */ {   0,   0,   0,   1,   0,   0   }, /* PD19 */
+	/* PD18 */ {   0,   0,   0,   1,   0,   0   }, /* PD18 */
+	/* PD17 */ {   0,   1,   0,   0,   0,   0   }, /* PD17 */
+	/* PD16 */ {   0,   1,   0,   1,   0,   0   }, /* PD16 */
+#if defined(CONFIG_SOFT_I2C)
+	/* PD15 */ {   1,   0,   0,   1,   1,   1   }, /* I2C SDA */
+	/* PD14 */ {   1,   0,   0,   1,   1,   1   }, /* I2C SCL */
+#else
+#if defined(CONFIG_HARD_I2C)
+	/* PD15 */ {   1,   1,   1,   0,   1,   0   }, /* I2C SDA */
+	/* PD14 */ {   1,   1,   1,   0,   1,   0   }, /* I2C SCL */
+#else /* normal I/O port pins */
+	/* PD15 */ {   0,   1,   1,   0,   1,   0   }, /* I2C SDA */
+	/* PD14 */ {   0,   1,   1,   0,   1,   0   }, /* I2C SCL */
+#endif
+#endif
+	/* PD13 */ {   0,   0,   0,   0,   0,   0   }, /* PD13 */
+	/* PD12 */ {   0,   0,   0,   0,   0,   0   }, /* PD12 */
+	/* PD11 */ {   0,   0,   0,   0,   0,   0   }, /* PD11 */
+	/* PD10 */ {   0,   0,   0,   0,   0,   0   }, /* PD10 */
+	/* PD9  */ {   0,   1,   0,   1,   0,   0   }, /* PD9 */
+	/* PD8  */ {   0,   1,   0,   0,   0,   0   }, /* PD8 */
+	/* PD7  */ {   0,   0,   0,   1,   0,   1   }, /* PD7 */
+	/* PD6  */ {   0,   0,   0,   1,   0,   1   }, /* PD6 */
+	/* PD5  */ {   0,   0,   0,   1,   0,   1   }, /* PD5 */
+	/* PD4  */ {   1,   1,   1,   0,   0,   0   }, /* SMC2 RXD */
+	/* PD3  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
+	/* PD2  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
+	/* PD1  */ {   0,   0,   0,   0,   0,   0   }, /* pin doesn't exist */
+	/* PD0  */ {   0,   0,   0,   0,   0,   0   }  /* pin doesn't exist */
+    }
+};
+
+/* ------------------------------------------------------------------------- */
+
+/* Check Board Identity:
+ */
+int checkboard (void)
+{
+	puts ("Board: PM828\n");
+	return 0;
+}
+
+/* ------------------------------------------------------------------------- */
+
+
+/* Try SDRAM initialization with P/LSDMR=sdmr and ORx=orx
+ *
+ * This routine performs standard 8260 initialization sequence
+ * and calculates the available memory size. It may be called
+ * several times to try different SDRAM configurations on both
+ * 60x and local buses.
+ */
+static long int try_init (volatile memctl8260_t * memctl, ulong sdmr,
+						  ulong orx, volatile uchar * base)
+{
+	volatile uchar c = 0xff;
+	volatile ulong cnt, val;
+	volatile ulong *addr;
+	volatile uint *sdmr_ptr;
+	volatile uint *orx_ptr;
+	int i;
+	ulong save[32];				/* to make test non-destructive */
+	ulong maxsize;
+
+	/* We must be able to test a location outsize the maximum legal size
+	 * to find out THAT we are outside; but this address still has to be
+	 * mapped by the controller. That means, that the initial mapping has
+	 * to be (at least) twice as large as the maximum expected size.
+	 */
+	maxsize = (1 + (~orx | 0x7fff)) / 2;
+
+	sdmr_ptr = &memctl->memc_psdmr;
+	orx_ptr = &memctl->memc_or2;
+
+	*orx_ptr = orx;
+
+	/*
+	 * Quote from 8260 UM (10.4.2 SDRAM Power-On Initialization, 10-35):
+	 *
+	 * "At system reset, initialization software must set up the
+	 *  programmable parameters in the memory controller banks registers
+	 *  (ORx, BRx, P/LSDMR). After all memory parameters are configured,
+	 *  system software should execute the following initialization sequence
+	 *  for each SDRAM device.
+	 *
+	 *  1. Issue a PRECHARGE-ALL-BANKS command
+	 *  2. Issue eight CBR REFRESH commands
+	 *  3. Issue a MODE-SET command to initialize the mode register
+	 *
+	 *  The initial commands are executed by setting P/LSDMR[OP] and
+	 *  accessing the SDRAM with a single-byte transaction."
+	 *
+	 * The appropriate BRx/ORx registers have already been set when we
+	 * get here. The SDRAM can be accessed at the address CFG_SDRAM_BASE.
+	 */
+
+	*sdmr_ptr = sdmr | PSDMR_OP_PREA;
+	*base = c;
+
+	*sdmr_ptr = sdmr | PSDMR_OP_CBRR;
+	for (i = 0; i < 8; i++)
+		*base = c;
+
+	*sdmr_ptr = sdmr | PSDMR_OP_MRW;
+	*(base + CFG_MRS_OFFS) = c;	/* setting MR on address lines */
+
+	*sdmr_ptr = sdmr | PSDMR_OP_NORM | PSDMR_RFEN;
+	*base = c;
+
+	/*
+	 * Check memory range for valid RAM. A simple memory test determines
+	 * the actually available RAM size between addresses `base' and
+	 * `base + maxsize'. Some (not all) hardware errors are detected:
+	 * - short between address lines
+	 * - short between data lines
+	 */
+	i = 0;
+	for (cnt = maxsize / sizeof (long); cnt > 0; cnt >>= 1) {
+		addr = (volatile ulong *) base + cnt;	/* pointer arith! */
+		save[i++] = *addr;
+		*addr = ~cnt;
+	}
+
+	addr = (volatile ulong *) base;
+	save[i] = *addr;
+	*addr = 0;
+
+	if ((val = *addr) != 0) {
+		*addr = save[i];
+		return (0);
+	}
+
+	for (cnt = 1; cnt <= maxsize / sizeof (long); cnt <<= 1) {
+		addr = (volatile ulong *) base + cnt;	/* pointer arith! */
+		val = *addr;
+		*addr = save[--i];
+		if (val != ~cnt) {
+			/* Write the actual size to ORx
+			 */
+			*orx_ptr = orx | ~(cnt * sizeof (long) - 1);
+			return (cnt * sizeof (long));
+		}
+	}
+	return (maxsize);
+}
+
+
+long int initdram (int board_type)
+{
+	volatile immap_t *immap = (immap_t *) CFG_IMMR;
+	volatile memctl8260_t *memctl = &immap->im_memctl;
+
+#ifndef CFG_RAMBOOT
+	ulong size8, size9;
+#endif
+	ulong psize = 32 * 1024 * 1024;
+
+	memctl->memc_psrt = CFG_PSRT;
+	memctl->memc_mptpr = CFG_MPTPR;
+
+#ifndef CFG_RAMBOOT
+	size8 = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
+					  (uchar *) CFG_SDRAM_BASE);
+	size9 = try_init (memctl, CFG_PSDMR_9COL, CFG_OR2_9COL,
+					  (uchar *) CFG_SDRAM_BASE);
+
+	if (size8 < size9) {
+		psize = size9;
+		printf ("(60x:9COL) ");
+	} else {
+		psize = try_init (memctl, CFG_PSDMR_8COL, CFG_OR2_8COL,
+						  (uchar *) CFG_SDRAM_BASE);
+		printf ("(60x:8COL) ");
+	}
+#endif
+	return (psize);
+}
+
+#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+extern void doc_probe (ulong physadr);
+void doc_init (void)
+{
+	doc_probe (CFG_DOC_BASE);
+}
+#endif
+
+#ifdef	CONFIG_PCI
+struct pci_controller hose;
+
+extern void pci_mpc8250_init(struct pci_controller *);
+
+void pci_init_board(void)
+{
+	pci_mpc8250_init(&hose);
+}
+#endif
--- a/board/pm828/u-boot.lds
+++ b/board/pm828/u-boot.lds
@@ -0,0 +1,123 @@
+/*
+ * (C) Copyright 2001-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+   __DYNAMIC = 0;    */
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  . = + SIZEOF_HEADERS;
+  .interp : { *(.interp) }
+  .hash          : { *(.hash)		}
+  .dynsym        : { *(.dynsym)		}
+  .dynstr        : { *(.dynstr)		}
+  .rel.text      : { *(.rel.text)		}
+  .rela.text     : { *(.rela.text) 	}
+  .rel.data      : { *(.rel.data)		}
+  .rela.data     : { *(.rela.data) 	}
+  .rel.rodata    : { *(.rel.rodata) 	}
+  .rela.rodata   : { *(.rela.rodata) 	}
+  .rel.got       : { *(.rel.got)		}
+  .rela.got      : { *(.rela.got)		}
+  .rel.ctors     : { *(.rel.ctors)	}
+  .rela.ctors    : { *(.rela.ctors)	}
+  .rel.dtors     : { *(.rel.dtors)	}
+  .rela.dtors    : { *(.rela.dtors)	}
+  .rel.bss       : { *(.rel.bss)		}
+  .rela.bss      : { *(.rela.bss)		}
+  .rel.plt       : { *(.rel.plt)		}
+  .rela.plt      : { *(.rela.plt)		}
+  .init          : { *(.init)	}
+  .plt : { *(.plt) }
+  .text      :
+  {
+    cpu/mpc8260/start.o	(.text)
+    *(.text)
+    common/environment.o(.text)
+    *(.fixup)
+    *(.got1)
+    . = ALIGN(16);
+    *(.rodata)
+    *(.rodata1)
+    *(.rodata.str1.4)
+  }
+  .fini      : { *(.fini)    } =0
+  .ctors     : { *(.ctors)   }
+  .dtors     : { *(.dtors)   }
+
+  /* Read-write section, merged into data segment: */
+  . = (. + 0x0FFF) & 0xFFFFF000;
+  _erotext = .;
+  PROVIDE (erotext = .);
+  .reloc   :
+  {
+    *(.got)
+    _GOT2_TABLE_ = .;
+    *(.got2)
+    _FIXUP_TABLE_ = .;
+    *(.fixup)
+  }
+  __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+  __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+  .data    :
+  {
+    *(.data)
+    *(.data1)
+    *(.sdata)
+    *(.sdata2)
+    *(.dynamic)
+    CONSTRUCTORS
+  }
+  _edata  =  .;
+  PROVIDE (edata = .);
+
+  __u_boot_cmd_start = .;
+  .u_boot_cmd : { *(.u_boot_cmd) }
+  __u_boot_cmd_end = .;
+
+
+  __start___ex_table = .;
+  __ex_table : { *(__ex_table) }
+  __stop___ex_table = .;
+
+  . = ALIGN(4096);
+  __init_begin = .;
+  .text.init : { *(.text.init) }
+  .data.init : { *(.data.init) }
+  . = ALIGN(4096);
+  __init_end = .;
+
+  __bss_start = .;
+  .bss       :
+  {
+   *(.sbss) *(.scommon)
+   *(.dynbss)
+   *(.bss)
+   *(COMMON)
+  }
+  _end = . ;
+  PROVIDE (end = .);
+}
--- a/board/sx1/platform.S
+++ b/board/sx1/platform.S
@@ -118,30 +118,21 @@ platformsetup:
 	str r1, [r0]	    /* EMIFS GlB Configuration. (value 0x12 most likely) */

 	ldr r0, _GPIO_PIN_CONTROL_REG
-	ldrh r1,[r0]
+	mov r1,#0
 	orr r1, r1, #0x0001 /* M_PCM_SYNC */
 	orr r1, r1, #0x4000 /* IPC_ACTIVE */
-	orr r1, r1, #0x0002 /* A_IRDA_OFF */
-	orr r1, r1, #0x0800 /* A_SWITCH	  */
-	orr r1, r1, #0x8000 /* A_USB_ON	  */
 	strh r1,[r0]

 	ldr r0, _GPIO_DIR_CONTROL_REG
-	ldrh r1,[r0]
+	mov r1,#0
 	bic r1, r1, #0x0001 /* M_PCM_SYNC */
 	bic r1, r1, #0x4000 /* IPC_ACTIVE */
-	bic r1, r1, #0x0002 /* A_IRDA_OFF */
-	bic r1, r1, #0x0800 /* A_SWITCH	  */
-	bic r1, r1, #0x8000 /* A_USB_ON	  */
 	strh r1,[r0]

 	ldr r0, _GPIO_DATA_OUTPUT_REG
-	ldrh r1,[r0]
+	mov r1,#0
 	bic r1, r1, #0x0001 /* M_PCM_SYNC */
 	orr r1, r1, #0x4000 /* IPC_ACTIVE */
-	orr r1, r1, #0x0002 /* A_IRDA_OFF */
-	bic r1, r1, #0x0800 /* A_SWITCH	  */
-	bic r1, r1, #0x8000 /* A_USB_ON	  */
 	strh r1,[r0]

 	/* Setup some clock domains */
--- a/board/trab/flash.c
+++ b/board/trab/flash.c
@@ -83,6 +83,7 @@ ulong flash_init (void)

 			switch (info->flash_id & FLASH_TYPEMASK) {
 			case (FLASH_AM320B & FLASH_TYPEMASK):
+			case (FLASH_MXLV320B & FLASH_TYPEMASK):
 				/* Boot sector type: 8 x 8 + N x 128 kB */
 				flashbase += (j < 8) ? 0x4000 : 0x20000;
 				break;
@@ -130,6 +131,8 @@ void flash_print_info (flash_info_t * info)
 			printf ("AMD ");		break;
 	case (FLASH_MAN_FUJ & FLASH_VENDMASK):
 			printf ("FUJITSU ");		break;
+	case (FLASH_MAN_MX  & FLASH_VENDMASK):
+			printf ("MACRONIX ");		break;
 	default:	printf ("Unknown Vendor ");	break;
 	}

@@ -137,6 +140,9 @@ void flash_print_info (flash_info_t * info)
 	case (FLASH_AM320B & FLASH_TYPEMASK):
 		printf ("2x Am29LV320DB (32Mbit)\n");
 		break;
+	case (FLASH_MXLV320B & FLASH_TYPEMASK):
+		printf ("2x MX29LV320DB (32Mbit)\n");
+		break;
 	case (FLASH_AM640U & FLASH_TYPEMASK):
 		printf ("2x Am29LV640D (64Mbit)\n");
 		break;
@@ -191,6 +197,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 	switch (info->flash_id & FLASH_VENDMASK) {
 	case (FLASH_MAN_AMD & FLASH_VENDMASK):	break;	/* OK */
 	case (FLASH_MAN_FUJ & FLASH_VENDMASK):	break;	/* OK */
+	case (FLASH_MAN_MX  & FLASH_VENDMASK):	break;	/* OK */
 	default:
 		debug ("## flash_erase: unknown manufacturer\n");
 		return (ERR_UNKNOWN_FLASH_VENDOR);
@@ -502,6 +509,9 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
 	case FUJ_MANUFACT:
 		info->flash_id = FLASH_MAN_FUJ;
 		break;
+	case MX_MANUFACT:
+		info->flash_id = FLASH_MAN_MX;
+		break;
 	default:
 		info->flash_id = FLASH_UNKNOWN;
 		info->sector_count = 0;
@@ -532,6 +542,14 @@ static ulong flash_get_size (vu_long *addr, flash_info_t *info)
 		addr[0] = 0x00F000F0;		/* restore read mode */
 		break;				/* => 16 MB		*/

+	case MX_ID_LV320B:
+		info->flash_id += FLASH_MXLV320B;
+		info->sector_count = 71;
+		info->size = 0x00800000;
+
+		addr[0] = 0x00FF00FF;		/* restore read mode */
+		break;				/* =>  8 MB		*/
+
 	default:
 		debug ("## flash_init: unknown flash chip\n");
 		info->flash_id = FLASH_UNKNOWN;
--- a/board/xm250/Makefile
+++ b/board/xm250/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= lib$(BOARD).a
+
+OBJS	:= xm250.o flash.o
+SOBJS	:= memsetup.o
+
+$(LIB):	$(OBJS) $(SOBJS)
+	$(AR) crv $@ $^
+
+clean:
+	rm -f $(SOBJS) $(OBJS)
+
+distclean:	clean
+	rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend:	Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+		$(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+-include .depend
+
+#########################################################################
--- a/board/xm250/config.mk
+++ b/board/xm250/config.mk
@@ -0,0 +1,35 @@
+#
+# (C) Copyright 2003-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# MicroSys XM250 board:
+#
+
+
+# This is the address where U-Boot lives in flash:
+#TEXT_BASE = 0
+
+# FIXME: armboot does only work correctly when being compiled
+# for the addresses _after_ relocation to RAM!! Otherwhise the
+# .bss segment is assumed in flash...
+TEXT_BASE = 0xA3F80000
--- a/board/xm250/flash.c
+++ b/board/xm250/flash.c
@@ -0,0 +1,536 @@
+/*
+ * (C) Copyright 2001
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * (C) Copyright 2001-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <linux/byteorder/swab.h>
+
+
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];	/* info for FLASH chips    */
+
+/* Board support for 1 or 2 flash devices */
+#define FLASH_PORT_WIDTH32
+#undef FLASH_PORT_WIDTH16
+
+#ifdef FLASH_PORT_WIDTH16
+#define FLASH_PORT_WIDTH		ushort
+#define FLASH_PORT_WIDTHV		vu_short
+#define SWAP(x)               __swab16(x)
+#else
+#define FLASH_PORT_WIDTH		ulong
+#define FLASH_PORT_WIDTHV		vu_long
+#define SWAP(x)               __swab32(x)
+#endif
+
+/* Intel-compatible flash ID */
+#define INTEL_COMPAT  0x00890089
+#define INTEL_ALT     0x00B000B0
+
+/* Intel-compatible flash commands */
+#define INTEL_PROGRAM 0x00100010
+#define INTEL_ERASE   0x00200020
+#define INTEL_CLEAR   0x00500050
+#define INTEL_LOCKBIT 0x00600060
+#define INTEL_PROTECT 0x00010001
+#define INTEL_STATUS  0x00700070
+#define INTEL_READID  0x00900090
+#define INTEL_CONFIRM 0x00D000D0
+#define INTEL_RESET   0xFFFFFFFF
+
+/* Intel-compatible flash status bits */
+#define INTEL_FINISHED 0x00800080
+#define INTEL_OK       0x00800080
+
+#define FPW	   FLASH_PORT_WIDTH
+#define FPWV   FLASH_PORT_WIDTHV
+
+#define mb() __asm__ __volatile__ ("" : : : "memory")
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (FPW *addr, flash_info_t *info);
+static int write_data (flash_info_t *info, ulong dest, FPW data);
+static void flash_get_offsets (ulong base, flash_info_t *info);
+void inline spin_wheel (void);
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+	int i;
+	ulong size = 0;
+
+	for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+		switch (i) {
+		case 0:
+			flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
+			flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
+			break;
+		case 1:
+			flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]);
+			flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
+			break;
+		default:
+			panic ("configured to many flash banks!\n");
+			break;
+		}
+		size += flash_info[i].size;
+	}
+
+	/* Protect monitor and environment sectors
+	 */
+	flash_protect ( FLAG_PROTECT_SET,
+			CFG_FLASH_BASE,
+			CFG_FLASH_BASE + monitor_flash_len - 1,
+			&flash_info[0] );
+
+	flash_protect ( FLAG_PROTECT_SET,
+			CFG_ENV_ADDR,
+			CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0] );
+
+	return size;
+}
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t *info)
+{
+	int i;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		return;
+	}
+
+	if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
+		for (i = 0; i < info->sector_count; i++) {
+			info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
+			info->protect[i] = 0;
+		}
+	}
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t *info)
+{
+	int i;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		printf ("missing or unknown FLASH type\n");
+		return;
+	}
+
+	switch (info->flash_id & FLASH_VENDMASK) {
+	case FLASH_MAN_INTEL:
+		printf ("INTEL ");
+		break;
+	default:
+		printf ("Unknown Vendor ");
+		break;
+	}
+
+	switch (info->flash_id & FLASH_TYPEMASK) {
+	case FLASH_28F128J3A:
+		printf ("28F128J3A\n");
+		break;
+
+	case FLASH_28F640J3A:
+		printf ("28F640J3A\n");
+		break;
+	default:
+		printf ("Unknown Chip Type\n");
+		break;
+	}
+
+	printf ("  Size: %ld MB in %d Sectors\n",
+			info->size >> 20, info->sector_count);
+
+	printf ("  Sector Start Addresses:");
+	for (i = 0; i < info->sector_count; ++i) {
+		if ((i % 5) == 0)
+			printf ("\n   ");
+		printf (" %08lX%s",
+			info->start[i],
+			info->protect[i] ? " (RO)" : "     ");
+	}
+	printf ("\n");
+	return;
+}
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size (FPW *addr, flash_info_t *info)
+{
+	volatile FPW value;
+
+	/* Write auto select command: read Manufacturer ID */
+	addr[0x5555] = (FPW) 0x00AA00AA;
+	addr[0x2AAA] = (FPW) 0x00550055;
+	addr[0x5555] = (FPW) 0x00900090;
+
+	mb ();
+	value = addr[0];
+
+	switch (value) {
+
+	case (FPW) INTEL_MANUFACT:
+		info->flash_id = FLASH_MAN_INTEL;
+		break;
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		info->sector_count = 0;
+		info->size = 0;
+		addr[0] = (FPW) 0x00FF00FF;	/* restore read mode */
+		return (0);			/* no or unknown flash  */
+	}
+
+	mb ();
+	value = addr[1];			/* device ID        */
+
+	switch (value) {
+
+	case (FPW) INTEL_ID_28F128J3A:
+		info->flash_id += FLASH_28F128J3A;
+		info->sector_count = 128;
+		info->size = 0x02000000;
+		break;				/* => 32 MB     */
+
+	case (FPW) INTEL_ID_28F640J3A:
+		info->flash_id += FLASH_28F640J3A;
+		info->sector_count = 64;
+		info->size = 0x01000000;
+		break;				/* => 16 MB     */
+
+	default:
+		info->flash_id = FLASH_UNKNOWN;
+		break;
+	}
+
+	if (info->sector_count > CFG_MAX_FLASH_SECT) {
+		printf ("** ERROR: sector count %d > max (%d) **\n",
+			info->sector_count, CFG_MAX_FLASH_SECT);
+		info->sector_count = CFG_MAX_FLASH_SECT;
+	}
+
+	addr[0] = (FPW) 0x00FF00FF;		/* restore read mode */
+
+	return (info->size);
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+
+int flash_erase (flash_info_t *info, int s_first, int s_last)
+{
+	int flag, prot, sect;
+	ulong type, start, last;
+	int rcode = 0;
+
+	if ((s_first < 0) || (s_first > s_last)) {
+		if (info->flash_id == FLASH_UNKNOWN) {
+			printf ("- missing\n");
+		} else {
+			printf ("- no sectors to erase\n");
+		}
+		return 1;
+	}
+
+	type = (info->flash_id & FLASH_VENDMASK);
+	if ((type != FLASH_MAN_INTEL)) {
+		printf ("Can't erase unknown flash type %08lx - aborted\n",
+			info->flash_id);
+		return 1;
+	}
+
+	prot = 0;
+	for (sect = s_first; sect <= s_last; ++sect) {
+		if (info->protect[sect]) {
+			prot++;
+		}
+	}
+
+	if (prot) {
+		printf ("- Warning: %d protected sectors will not be erased!\n",
+			prot);
+	} else {
+		printf ("\n");
+	}
+
+	start = get_timer (0);
+	last = start;
+
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts ();
+
+	/* Start erase on unprotected sectors */
+	for (sect = s_first; sect <= s_last; sect++) {
+		if (info->protect[sect] == 0) {	/* not protected */
+			FPWV *addr = (FPWV *) (info->start[sect]);
+			FPW status;
+
+			printf ("Erasing sector %2d ... ", sect);
+
+			/* arm simple, non interrupt dependent timer */
+			reset_timer_masked ();
+
+			*addr = (FPW) 0x00500050;	/* clear status register */
+			*addr = (FPW) 0x00200020;	/* erase setup */
+			*addr = (FPW) 0x00D000D0;	/* erase confirm */
+
+			while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
+				if (get_timer_masked () > CFG_FLASH_ERASE_TOUT) {
+					printf ("Timeout\n");
+					*addr = (FPW) 0x00B000B0;	/* suspend erase     */
+					*addr = (FPW) 0x00FF00FF;	/* reset to read mode */
+					rcode = 1;
+					break;
+				}
+			}
+
+			*addr = 0x00500050;	/* clear status register cmd.   */
+			*addr = 0x00FF00FF;	/* resest to read mode          */
+
+			printf (" done\n");
+		}
+	}
+	return rcode;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ * 4 - Flash not identified
+ */
+
+int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
+{
+	ulong cp, wp;
+	FPW data;
+	int count, i, l, rc, port_width;
+
+	if (info->flash_id == FLASH_UNKNOWN) {
+		return 4;
+	}
+/* get lower word aligned address */
+#ifdef FLASH_PORT_WIDTH16
+	wp = (addr & ~1);
+	port_width = 2;
+#else
+	wp = (addr & ~3);
+	port_width = 4;
+#endif
+
+	/*
+	 * handle unaligned start bytes
+	 */
+	if ((l = addr - wp) != 0) {
+		data = 0;
+		for (i = 0, cp = wp; i < l; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *) cp);
+		}
+		for (; i < port_width && cnt > 0; ++i) {
+			data = (data << 8) | *src++;
+			--cnt;
+			++cp;
+		}
+		for (; cnt == 0 && i < port_width; ++i, ++cp) {
+			data = (data << 8) | (*(uchar *) cp);
+		}
+
+		if ((rc = write_data (info, wp, SWAP (data))) != 0) {
+			return (rc);
+		}
+		wp += port_width;
+	}
+
+	/*
+	 * handle word aligned part
+	 */
+	count = 0;
+	while (cnt >= port_width) {
+		data = 0;
+		for (i = 0; i < port_width; ++i) {
+			data = (data << 8) | *src++;
+		}
+		if ((rc = write_data (info, wp, SWAP (data))) != 0) {
+			return (rc);
+		}
+		wp += port_width;
+		cnt -= port_width;
+		if (count++ > 0x800) {
+			spin_wheel ();
+			count = 0;
+		}
+	}
+
+	if (cnt == 0) {
+		return (0);
+	}
+
+	/*
+	 * handle unaligned tail bytes
+	 */
+	data = 0;
+	for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
+		data = (data << 8) | *src++;
+		--cnt;
+	}
+	for (; i < port_width; ++i, ++cp) {
+		data = (data << 8) | (*(uchar *) cp);
+	}
+
+	return (write_data (info, wp, SWAP (data)));
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word or halfword to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_data (flash_info_t *info, ulong dest, FPW data)
+{
+	FPWV *addr = (FPWV *) dest;
+	ulong status;
+	int flag;
+
+	/* Check if Flash is (sufficiently) erased */
+	if ((*addr & data) != data) {
+		printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
+		return (2);
+	}
+	/* Disable interrupts which might cause a timeout here */
+	flag = disable_interrupts ();
+
+	*addr = (FPW) 0x00400040;	/* write setup */
+	*addr = data;
+
+	/* arm simple, non interrupt dependent timer */
+	reset_timer_masked ();
+
+	/* wait while polling the status register */
+	while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
+		if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
+			*addr = (FPW) 0x00FF00FF;	/* restore read mode */
+			return (1);
+		}
+	}
+
+	*addr = (FPW) 0x00FF00FF;	/* restore read mode */
+
+	return (0);
+}
+
+void inline spin_wheel (void)
+{
+	static int p = 0;
+	static char w[] = "\\/-";
+
+	printf ("\010%c", w[p]);
+	(++p == 3) ? (p = 0) : 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Set/Clear sector's lock bit, returns:
+ * 0 - OK
+ * 1 - Error (timeout, voltage problems, etc.)
+ */
+int flash_real_protect(flash_info_t *info, long sector, int prot)
+{
+	int i;
+	int rc = 0;
+	vu_long *addr = (vu_long *)(info->start[sector]);
+	int flag = disable_interrupts();
+
+	*addr = INTEL_CLEAR;	/* Clear status register */
+	if (prot) {			/* Set sector lock bit */
+		*addr = INTEL_LOCKBIT;	/* Sector lock bit */
+		*addr = INTEL_PROTECT;	/* set */
+	}
+	else {				/* Clear sector lock bit */
+		*addr = INTEL_LOCKBIT;	/* All sectors lock bits */
+		*addr = INTEL_CONFIRM;	/* clear */
+	}
+
+	reset_timer_masked ();
+
+	while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
+		if (get_timer_masked () > CFG_FLASH_UNLOCK_TOUT) {
+			printf("Flash lock bit operation timed out\n");
+			rc = 1;
+			break;
+		}
+	}
+
+	if (*addr != INTEL_OK) {
+		printf("Flash lock bit operation failed at %08X, CSR=%08X\n",
+		       (uint)addr, (uint)*addr);
+		rc = 1;
+	}
+
+	if (!rc)
+		info->protect[sector] = prot;
+
+	/*
+	 * Clear lock bit command clears all sectors lock bits, so
+	 * we have to restore lock bits of protected sectors.
+	 */
+	if (!prot)
+	{
+		for (i = 0; i < info->sector_count; i++)
+		{
+			if (info->protect[i])
+			{
+				reset_timer_masked ();
+				addr = (vu_long *)(info->start[i]);
+				*addr = INTEL_LOCKBIT;	/* Sector lock bit */
+				*addr = INTEL_PROTECT;	/* set */
+				while ((*addr & INTEL_FINISHED) != INTEL_FINISHED)
+				{
+					if (get_timer_masked () > CFG_FLASH_UNLOCK_TOUT)
+					{
+						printf("Flash lock bit operation timed out\n");
+						rc = 1;
+						break;
+					}
+				}
+			}
+		}
+	}
+
+	if (flag)
+		enable_interrupts();
+
+	*addr = INTEL_RESET;		/* Reset to read array mode */
+
+	return rc;
+}
--- a/board/xm250/memsetup.S
+++ b/board/xm250/memsetup.S
@@ -0,0 +1,519 @@
+/*
+ * Most of this taken from Redboot hal_platform_setup.h with cleanup
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+#include <asm/arch/pxa-regs.h>
+
+DRAM_SIZE:  .long   CFG_DRAM_SIZE
+
+/* wait for coprocessor write complete */
+	.macro CPWAIT reg
+	mrc	p15,0,\reg,c2,c0,0
+	mov	\reg,\reg
+	sub	pc,pc,#4
+	.endm
+/*
+	.macro SET_LED val
+	ldr	r6, =CRADLE_LED_CLR_REG
+	ldr	r7, =0
+	str	r7, [r6]
+	ldr	r6, =CRADLE_LED_SET_REG
+	ldr	r7, =\val
+	str	r7, [r6]
+	.endm
+*/
+
+.globl memsetup
+memsetup:
+
+	mov	r10, lr
+
+	/* Set up GPIO pins first */
+
+	ldr	r0,   =GPSR0
+	ldr	r1,   =CFG_GPSR0_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GPSR1
+	ldr	r1,   =CFG_GPSR1_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GPSR2
+	ldr	r1,   =CFG_GPSR2_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GPCR0
+	ldr	r1,   =CFG_GPCR0_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GPCR1
+	ldr	r1,   =CFG_GPCR1_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GPCR2
+	ldr	r1,   =CFG_GPCR2_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GRER0
+	ldr	r1,   =CFG_GRER0_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GRER1
+	ldr	r1,   =CFG_GRER1_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GRER2
+	ldr	r1,   =CFG_GRER2_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GFER0
+	ldr	r1,   =CFG_GFER0_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GFER1
+	ldr	r1,   =CFG_GFER1_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GFER2
+	ldr	r1,   =CFG_GFER2_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GPDR0
+	ldr	r1,   =CFG_GPDR0_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GPDR1
+	ldr	r1,   =CFG_GPDR1_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GPDR2
+	ldr	r1,   =CFG_GPDR2_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GAFR0_L
+	ldr	r1,   =CFG_GAFR0_L_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GAFR0_U
+	ldr	r1,   =CFG_GAFR0_U_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GAFR1_L
+	ldr	r1,   =CFG_GAFR1_L_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GAFR1_U
+	ldr	r1,   =CFG_GAFR1_U_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GAFR2_L
+	ldr	r1,   =CFG_GAFR2_L_VAL
+	str	r1,   [r0]
+
+	ldr	r0,   =GAFR2_U
+	ldr	r1,   =CFG_GAFR2_U_VAL
+	str	r1,   [r0]
+
+	/* enable GPIO pins */
+	ldr	r0,   =PSSR
+	ldr	r1,   =CFG_PSSR_VAL
+	str	r1,   [r0]
+
+	/* SET_LED 1 */
+
+	ldr	r3, =MSC1		/* low - bank 2 Lubbock Registers / SRAM */
+	ldr	r2, =CFG_MSC1_VAL	/* high - bank 3 Ethernet Controller */
+	str	r2, [r3]		/* need to set MSC1 before trying to write to the HEX LEDs */
+	ldr	r2, [r3]		/* need to read it back to make sure the value latches (see MSC section of manual) */
+
+
+/*********************************************************************
+ *  Initlialize Memory Controller
+ *
+ *  See PXA250 Operating System Developer's Guide
+ *
+ *  pause for 200 uSecs- allow internal clocks to settle
+ *  *Note: only need this if hard reset... doing it anyway for now
+ */
+
+	@ Step 1
+	@ ---- Wait 200 usec
+	ldr	r3, =OSCR	@ reset the OS Timer Count to zero
+	mov	r2, #0
+	str	r2, [r3]
+	ldr	r4, =0x300	@ really 0x2E1 is about 200usec, so 0x300 should be plenty
+1:
+	ldr	r2, [r3]
+	cmp	r4, r2
+	bgt	1b
+
+	/* SET_LED 2 */
+
+mem_init:
+	@ get memory controller base address
+	ldr	r1,  =MEMC_BASE
+
+
+@****************************************************************************
+@  Step 2
+@
+
+	@ Step 2a
+	@ write msc0, read back to ensure data latches
+	@
+	ldr	r2,   =CFG_MSC0_VAL
+	str	r2,   [r1, #MSC0_OFFSET]
+	ldr	r2,   [r1, #MSC0_OFFSET]
+
+	@ write msc1
+	ldr	r2,  =CFG_MSC1_VAL
+	str	r2,  [r1, #MSC1_OFFSET]
+	ldr	r2,  [r1, #MSC1_OFFSET]
+
+	@ write msc2
+	ldr	r2,  =CFG_MSC2_VAL
+	str	r2,  [r1, #MSC2_OFFSET]
+	ldr	r2,  [r1, #MSC2_OFFSET]
+
+	@ Step 2b
+	@ write mecr
+	ldr	r2,  =CFG_MECR_VAL
+	str	r2,  [r1, #MECR_OFFSET]
+
+	@ write mcmem0
+	ldr	r2,  =CFG_MCMEM0_VAL
+	str	r2,  [r1, #MCMEM0_OFFSET]
+
+	@ write mcmem1
+	ldr	r2,  =CFG_MCMEM1_VAL
+	str	r2,  [r1, #MCMEM1_OFFSET]
+
+	@ write mcatt0
+	ldr	r2,  =CFG_MCATT0_VAL
+	str	r2,  [r1, #MCATT0_OFFSET]
+
+	@ write mcatt1
+	ldr	r2,  =CFG_MCATT1_VAL
+	str	r2,  [r1, #MCATT1_OFFSET]
+
+	@ write mcio0
+	ldr	r2,  =CFG_MCIO0_VAL
+	str	r2,  [r1, #MCIO0_OFFSET]
+
+	@ write mcio1
+	ldr	r2,  =CFG_MCIO1_VAL
+	str	r2,  [r1, #MCIO1_OFFSET]
+
+	/*SET_LED 3 */
+
+	@ Step 2c
+	@ fly-by-dma is defeatured on this part
+	@ write flycnfg
+	@ldr	r2,  =CFG_FLYCNFG_VAL
+	@str	r2,  [r1, #FLYCNFG_OFFSET]
+
+/* FIXME Does this sequence really make sense */
+#ifdef REDBOOT_WAY
+	@ Step 2d
+	@ get the mdrefr settings
+	ldr	r3,  =CFG_MDREFR_VAL
+
+	@ extract DRI field (we need a valid DRI field)
+	@
+	ldr	r2,  =0xFFF
+
+	@ valid DRI field in r3
+	@
+	and	r3,  r3,  r2
+
+	@ get the reset state of MDREFR
+	@
+	ldr	r4,  [r1, #MDREFR_OFFSET]
+
+	@ clear the DRI field
+	@
+	bic	r4,  r4,  r2
+
+	@ insert the valid DRI field loaded above
+	@
+	orr	r4,  r4,  r3
+
+	@ write back mdrefr
+	@
+	str	r4,  [r1, #MDREFR_OFFSET]
+
+	@ *Note: preserve the mdrefr value in r4 *
+
+	/*SET_LED 4 */
+
+@****************************************************************************
+@  Step 3
+@
+@ NO SRAM
+
+	mov   pc, r10
+
+
+@****************************************************************************
+@  Step 4
+@
+
+	@ Assumes previous mdrefr value in r4, if not then read current mdrefr
+
+	@ clear the free-running clock bits
+	@ (clear K0Free, K1Free, K2Free
+	@
+	bic	r4,  r4,  #(0x00800000 | 0x01000000 | 0x02000000)
+
+	@ set K0RUN for CPLD clock
+	@
+	orr	r4,  r4, #0x00002000
+
+	@ set K1RUN if bank 0 installed
+	@
+	orr	r4,  r4, #0x00010000
+
+	@ write back mdrefr
+	@
+	str	r4,  [r1, #MDREFR_OFFSET]
+	ldr	r4,  [r1, #MDREFR_OFFSET]
+
+	@ deassert SLFRSH
+	@
+	bic	r4,  r4,  #0x00400000
+
+	@ write back mdrefr
+	@
+	str	r4,  [r1, #MDREFR_OFFSET]
+
+	@ assert E1PIN
+	@
+	orr	r4,  r4,  #0x00008000
+
+	@ write back mdrefr
+	@
+	str	r4,  [r1, #MDREFR_OFFSET]
+	ldr	r4,  [r1, #MDREFR_OFFSET]
+	nop
+	nop
+#else
+	@ Step 2d
+	@ get the mdrefr settings
+	ldr	r4,  =CFG_MDREFR_VAL
+
+	@ write back mdrefr
+	@
+	str	r4,  [r1, #MDREFR_OFFSET]
+
+	@  Step 4
+
+	@ set K0RUN for FLASH clock
+	@
+	orr	r4,  r4, #0x00002000
+
+	@ set K1RUN for bank DRAM 0
+	@
+	orr	r4,  r4, #0x00010000
+
+	@ set K2RUN for bank PLD
+	@
+	orr	r4,  r4, #0x00040000
+
+	@ write back mdrefr
+	@
+	str	r4,  [r1, #MDREFR_OFFSET]
+	ldr	r4,  [r1, #MDREFR_OFFSET]
+
+	@ deassert SLFRSH
+	@
+	bic	r4,  r4,  #0x00400000
+
+	@ write back mdrefr
+	@
+	str	r4,  [r1, #MDREFR_OFFSET]
+
+	@ assert E1PIN
+	@
+	orr	r4,  r4,  #0x00008000
+
+	@ write back mdrefr
+	@
+	str	r4,  [r1, #MDREFR_OFFSET]
+	ldr	r4,  [r1, #MDREFR_OFFSET]
+	nop
+	nop
+#endif
+
+	@ Step 4d
+	@ fetch platform value of mdcnfg
+	@
+	ldr	r2,  =CFG_MDCNFG_VAL
+
+	@ disable all sdram banks
+	@
+	bic	r2,  r2,  #(MDCNFG_DE0 | MDCNFG_DE1)
+	bic	r2,  r2,  #(MDCNFG_DE2 | MDCNFG_DE3)
+
+	@ program banks 0/1 for bus width
+	@
+	bic	r2,  r2,  #MDCNFG_DWID0		@0=32-bit
+
+	@ write initial value of mdcnfg, w/o enabling sdram banks
+	@
+	str	r2,  [r1, #MDCNFG_OFFSET]
+
+	@ Step 4e
+	@ pause for 200 uSecs
+	@
+	ldr	r3, =OSCR	@ reset the OS Timer Count to zero
+	mov	r2, #0
+	str	r2, [r3]
+	ldr	r4, =0x300	@ really 0x2E1 is about 200usec, so 0x300 should be plenty
+1:
+	ldr	r2, [r3]
+	cmp	r4, r2
+	bgt	1b
+
+	/*SET_LED 5 */
+
+	/* Why is this here??? */
+	mov	r0, #0x78		@turn everything off
+	mcr	p15, 0, r0, c1, c0, 0	@(caches off, MMU off, etc.)
+
+	@ Step 4f
+	@ Access memory *not yet enabled* for CBR refresh cycles (8)
+	@ - CBR is generated for all banks
+
+	ldr	r2, =CFG_DRAM_BASE
+	str	r2, [r2]
+	str	r2, [r2]
+	str	r2, [r2]
+	str	r2, [r2]
+	str	r2, [r2]
+	str	r2, [r2]
+	str	r2, [r2]
+	str	r2, [r2]
+
+	@ Step 4g
+	@get memory controller base address
+	@
+	ldr	r1,  =MEMC_BASE
+
+	@fetch current mdcnfg value
+	@
+	ldr	r3,  [r1, #MDCNFG_OFFSET]
+
+	@enable sdram bank 0 if installed (must do for any populated bank)
+	@
+	orr	r3,  r3,  #MDCNFG_DE0
+
+	@write back mdcnfg, enabling the sdram bank(s)
+	@
+	str	r3,  [r1, #MDCNFG_OFFSET]
+
+	@ Step 4h
+	@ write mdmrs
+	@
+	ldr	r2,  =CFG_MDMRS_VAL
+	str	r2,  [r1, #MDMRS_OFFSET]
+
+	@ Done Memory Init
+
+	/*SET_LED 6 */
+
+	@********************************************************************
+	@ Disable (mask) all interrupts at the interrupt controller
+	@
+
+	@ clear the interrupt level register (use IRQ, not FIQ)
+	@
+	mov	r1, #0
+	ldr	r2,  =ICLR
+	str	r1,  [r2]
+
+	@ Set interrupt mask register
+	@
+	ldr	r1,  =CFG_ICMR_VAL
+	ldr	r2,  =ICMR
+	str	r1,  [r2]
+
+	@ ********************************************************************
+	@ Disable the peripheral clocks, and set the core clock
+	@
+
+	@ Turn Off ALL on-chip peripheral clocks for re-configuration
+	@
+	ldr	r1,  =CKEN
+	mov	r2,  #0
+	str	r2,  [r1]
+
+	@ set core clocks
+	@
+	ldr	r2,  =CFG_CCCR_VAL
+	ldr	r1,  =CCCR
+	str	r2,  [r1]
+
+#ifdef ENABLE32KHZ
+	@ enable the 32Khz oscillator for RTC and PowerManager
+	@
+	ldr	r1,  =OSCC
+	mov	r2,  #OSCC_OON
+	str	r2,  [r1]
+
+	@ NOTE:	 spin here until OSCC.OOK get set,
+	@	 meaning the PLL has settled.
+	@
+60:
+	ldr	r2, [r1]
+	ands	r2, r2, #1
+	beq	60b
+#endif
+
+	@ Turn on needed clocks
+	@
+	ldr	r1,  =CKEN
+	ldr	r2,  =CFG_CKEN_VAL
+	str	r2,  [r1]
+
+	/*SET_LED 7 */
+
+/* Is this needed???? */
+#define NODEBUG
+#ifdef NODEBUG
+	/*Disable software and data breakpoints */
+	mov	r0,#0
+	mcr	p15,0,r0,c14,c8,0	/* ibcr0 */
+	mcr	p15,0,r0,c14,c9,0	/* ibcr1 */
+	mcr	p15,0,r0,c14,c4,0	/* dbcon */
+
+	/*Enable all debug functionality */
+	mov	r0,#0x80000000
+	mcr	p14,0,r0,c10,c0,0	/* dcsr */
+
+#endif
+
+	/*SET_LED 8 */
+
+	mov	pc, r10
+
+@ End memsetup
--- a/board/xm250/u-boot.lds
+++ b/board/xm250/u-boot.lds
@@ -0,0 +1,55 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+	. = 0x00000000;
+
+	. = ALIGN(4);
+	.text      :
+	{
+	  cpu/pxa/start.o	(.text)
+	  *(.text)
+	}
+
+	. = ALIGN(4);
+	.rodata : { *(.rodata) }
+
+	. = ALIGN(4);
+	.data : { *(.data) }
+
+	. = ALIGN(4);
+	.got : { *(.got) }
+
+	__u_boot_cmd_start = .;
+	.u_boot_cmd : { *(.u_boot_cmd) }
+	__u_boot_cmd_end = .;
+
+	. = ALIGN(4);
+	__bss_start = .;
+	.bss : { *(.bss) }
+	_end = .;
+}
--- a/board/xm250/xm250.c
+++ b/board/xm250/xm250.c
@@ -0,0 +1,91 @@
+/*
+ * (C) Copyright 2002
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <asm/arch/pxa-regs.h>
+#include <common.h>
+
+/* ------------------------------------------------------------------------- */
+
+/* local prototypes */
+
+inline void sleep (int i);
+
+inline void
+/**********************************************************/
+sleep (int i)
+/**********************************************************/
+{
+	while (i--) {
+		udelay (1000000);
+	}
+}
+
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+int
+/**********************************************************/
+board_post_init (void)
+/**********************************************************/
+{
+	return (0);
+}
+
+int
+/**********************************************************/
+board_init (void)
+/**********************************************************/
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	/* arch number of MicroSys XM250 */
+	gd->bd->bi_arch_number = 444;
+
+	/* adress of boot parameters */
+	gd->bd->bi_boot_params = 0xa0000100;
+
+	return 0;
+}
+
+int
+/**********************************************************/
+dram_init (void)
+/**********************************************************/
+{
+	DECLARE_GLOBAL_DATA_PTR;
+
+	gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+	gd->bd->bi_dram[0].size  = PHYS_SDRAM_1_SIZE;
+	gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+	gd->bd->bi_dram[1].size  = PHYS_SDRAM_2_SIZE;
+	gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+	gd->bd->bi_dram[2].size  = PHYS_SDRAM_3_SIZE;
+	gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+	gd->bd->bi_dram[3].size  = PHYS_SDRAM_4_SIZE;
+
+	return (0);
+}
--- a/common/Makefile
+++ b/common/Makefile
@@ -39,7 +39,7 @@ COBJS	= main.o ACEX1K.o altera.o bedbug.o \
 	  cmd_mem.o cmd_mii.o cmd_misc.o cmd_mmc.o \
 	  cmd_nand.o cmd_net.o cmd_nvedit.o \
 	  cmd_pci.o cmd_pcmcia.o cmd_portio.o \
-	  cmd_reginfo.o cmd_scsi.o cmd_spi.o cmd_usb.o cmd_vfd.o \
+	  cmd_reginfo.o cmd_reiser.o cmd_scsi.o cmd_spi.o cmd_usb.o cmd_vfd.o \
 	  command.o console.o devices.o dlmalloc.o docecc.o \
 	  environment.o env_common.o \
 	  env_dataflash.o env_flash.o env_eeprom.o env_nvram.o env_nowhere.o exports.o \
--- a/common/cmd_ace.c
+++ b/common/cmd_ace.c
@@ -190,16 +190,13 @@ static unsigned long systemace_read(int dev,
 	      /* Write sector count | ReadMemCardData. */
 	    ace_writew((trans&0xff) | 0x0300, 0x14);

-	      /* CONTROLREG = CFGRESET|LOCKREQ */
-	    ace_writew(0x0082, 0x18);
-
 	    retry = trans * 16;
 	    while (retry > 0) {
 		  int idx;

 		    /* Wait for buffer to become ready. */
 		  while (! (ace_readw(0x04) & 0x0020)) {
-			udelay(1000);
+			udelay(100);
 		  }

 		    /* Read 16 words of 2bytes from the sector buffer. */
--- a/common/cmd_autoscript.c
+++ b/common/cmd_autoscript.c
@@ -68,7 +68,7 @@ autoscript (ulong addr)
 	memmove (hdr, (char *)addr, sizeof(image_header_t));

 	if (ntohl(hdr->ih_magic) != IH_MAGIC) {
-		printf ("Bad magic number\n");
+		puts ("Bad magic number\n");
 		return 1;
 	}

@@ -77,7 +77,7 @@ autoscript (ulong addr)
 	len = sizeof (image_header_t);
 	data = (ulong)hdr;
 	if (crc32(0, (char *)data, len) != crc) {
-		printf ("Bad header crc\n");
+		puts ("Bad header crc\n");
 		return 1;
 	}

@@ -86,13 +86,13 @@ autoscript (ulong addr)

 	if (verify) {
 		if (crc32(0, (char *)data, len) != ntohl(hdr->ih_dcrc)) {
-			printf ("Bad data crc\n");
+			puts ("Bad data crc\n");
 			return 1;
 		}
 	}

 	if (hdr->ih_type != IH_TYPE_SCRIPT) {
-		printf ("Bad image type\n");
+		puts ("Bad image type\n");
 		return 1;
 	}

@@ -100,7 +100,7 @@ autoscript (ulong addr)
 	len_ptr = (ulong *)data;

 	if ((len = ntohl(*len_ptr)) == 0) {
-		printf ("Empty Script\n");
+		puts ("Empty Script\n");
 		return 1;
 	}

--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -77,19 +77,19 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 #endif
 	print_str ("busfreq",	    strmhz(buf, bd->bi_busfreq));
 #endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP, CONFIG_XILINX_ML300 */
-	printf ("ethaddr     =");
+	puts ("ethaddr     =");
 	for (i=0; i<6; ++i) {
 		printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
 	}
 #if (defined CONFIG_PN62) || (defined CONFIG_PPCHAMELEONEVB) \
    || (defined CONFIG_MPC8540ADS) || (defined CONFIG_MPC8560ADS)
-	printf ("\neth1addr    =");
+	puts ("\neth1addr    =");
 	for (i=0; i<6; ++i) {
 		printf ("%c%02X", i ? ':' : ' ', bd->bi_enet1addr[i]);
 	}
 #endif /* CONFIG_PN62 */
 #if defined(CONFIG_MPC8540ADS) || defined(CONFIG_MPC8560ADS)
-       printf ("\neth2addr    =");
+       puts ("\neth2addr    =");
       for (i=0; i<6; ++i) {
 		printf ("%c%02X", i ? ':' : ' ', bd->bi_enet2addr[i]);
 	}
@@ -97,7 +97,7 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 #ifdef CONFIG_HERMES
 	print_str ("ethspeed",	    strmhz(buf, bd->bi_ethspeed));
 #endif
-	printf ("\nIP addr     = ");	print_IPaddr (bd->bi_ip_addr);
+	puts ("\nIP addr     = ");	print_IPaddr (bd->bi_ip_addr);
 	printf ("\nbaudrate    = %6ld bps\n", bd->bi_baudrate   );
 	return 0;
 }
@@ -117,11 +117,11 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	print_num ("flashsize",		(ulong)bd->bi_flashsize);
 	print_num ("flashoffset",	(ulong)bd->bi_flashoffset);

-	printf ("ethaddr     =");
+	puts ("ethaddr     =");
 	for (i=0; i<6; ++i) {
 		printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
 	}
-	printf ("\nip_addr     = ");
+	puts ("\nip_addr     = ");
 	print_IPaddr (bd->bi_ip_addr);
 	printf ("\nbaudrate    = %ld bps\n", bd->bi_baudrate);

@@ -145,11 +145,11 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	print_num ("flashsize",		(ulong)bd->bi_flashsize);
 	print_num ("flashoffset",	(ulong)bd->bi_flashoffset);

-	printf ("ethaddr     =");
+	puts ("ethaddr     =");
 	for (i=0; i<6; ++i) {
 		printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
 	}
-	printf ("\nip_addr     = ");
+	puts ("\nip_addr     = ");
 	print_IPaddr (bd->bi_ip_addr);
 	printf ("\nbaudrate    = %d bps\n", bd->bi_baudrate);

@@ -176,11 +176,11 @@ int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		print_num("-> size",	bd->bi_dram[i].size);
 	}

-	printf ("ethaddr     =");
+	puts ("ethaddr     =");
 	for (i=0; i<6; ++i) {
 		printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
 	}
-	printf ("\n"
+	puts  ( "\n"
 		"ip_addr     = ");
 	print_IPaddr (bd->bi_ip_addr);
 	printf ("\n"
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -184,7 +184,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		} else
 #endif	/* __I386__ */
 	    {
-		printf ("Bad Magic Number\n");
+		puts ("Bad Magic Number\n");
 		SHOW_BOOT_PROGRESS (-1);
 		return 1;
 	    }
@@ -198,7 +198,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	hdr->ih_hcrc = 0;

 	if (crc32 (0, (char *)data, len) != checksum) {
-		printf ("Bad Header Checksum\n");
+		puts ("Bad Header Checksum\n");
 		SHOW_BOOT_PROGRESS (-2);
 		return 1;
 	}
@@ -218,13 +218,13 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 #endif

 	if (verify) {
-		printf ("   Verifying Checksum ... ");
+		puts ("   Verifying Checksum ... ");
 		if (crc32 (0, (char *)data, len) != ntohl(hdr->ih_dcrc)) {
 			printf ("Bad Data CRC\n");
 			SHOW_BOOT_PROGRESS (-3);
 			return 1;
 		}
-		printf ("OK\n");
+		puts ("OK\n");
 	}
 	SHOW_BOOT_PROGRESS (4);

@@ -325,7 +325,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		printf ("   Uncompressing %s ... ", name);
 		if (gunzip ((void *)ntohl(hdr->ih_load), unc_len,
 			    (uchar *)data, (int *)&len) != 0) {
-			printf ("GUNZIP ERROR - must RESET board to recover\n");
+			puts ("GUNZIP ERROR - must RESET board to recover\n");
 			SHOW_BOOT_PROGRESS (-6);
 			do_reset (cmdtp, flag, argc, argv);
 		}
@@ -356,7 +356,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		SHOW_BOOT_PROGRESS (-7);
 		return 1;
 	}
-	printf ("OK\n");
+	puts ("OK\n");
 	SHOW_BOOT_PROGRESS (7);

 	switch (hdr->ih_type) {
@@ -435,7 +435,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 	SHOW_BOOT_PROGRESS (-9);
 #ifdef DEBUG
-	printf ("\n## Control returned to monitor - resetting...\n");
+	puts ("\n## Control returned to monitor - resetting...\n");
 	do_reset (cmdtp, flag, argc, argv);
 #endif
 	return 1;
@@ -597,7 +597,7 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
 		memmove (&header, (char *)addr, sizeof(image_header_t));

 		if (hdr->ih_magic  != IH_MAGIC) {
-			printf ("Bad Magic Number\n");
+			puts ("Bad Magic Number\n");
 			SHOW_BOOT_PROGRESS (-10);
 			do_reset (cmdtp, flag, argc, argv);
 		}
@@ -609,7 +609,7 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
 		hdr->ih_hcrc = 0;

 		if (crc32 (0, (char *)data, len) != checksum) {
-			printf ("Bad Header Checksum\n");
+			puts ("Bad Header Checksum\n");
 			SHOW_BOOT_PROGRESS (-11);
 			do_reset (cmdtp, flag, argc, argv);
 		}
@@ -627,7 +627,7 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
 			ulong cdata = data, edata = cdata + len;
 #endif	/* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */

-			printf ("   Verifying Checksum ... ");
+			puts ("   Verifying Checksum ... ");

 #if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)

@@ -646,11 +646,11 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
 #endif	/* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */

 			if (csum != hdr->ih_dcrc) {
-				printf ("Bad Data CRC\n");
+				puts ("Bad Data CRC\n");
 				SHOW_BOOT_PROGRESS (-12);
 				do_reset (cmdtp, flag, argc, argv);
 			}
-			printf ("OK\n");
+			puts ("OK\n");
 		}

 		SHOW_BOOT_PROGRESS (11);
@@ -658,7 +658,7 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
 		if ((hdr->ih_os   != IH_OS_LINUX)	||
 		    (hdr->ih_arch != IH_CPU_PPC)	||
 		    (hdr->ih_type != IH_TYPE_RAMDISK)	) {
-			printf ("No Linux PPC Ramdisk Image\n");
+			puts ("No Linux PPC Ramdisk Image\n");
 			SHOW_BOOT_PROGRESS (-13);
 			do_reset (cmdtp, flag, argc, argv);
 		}
@@ -756,7 +756,7 @@ do_bootm_linux (cmd_tbl_t *cmdtp, int flag,
 #else	/* !(CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG) */
 		memmove ((void *)initrd_start, (void *)data, len);
 #endif	/* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */
-		printf ("OK\n");
+		puts ("OK\n");
 	    }
 	} else {
 		initrd_start = 0;
@@ -1014,7 +1014,7 @@ static int image_info (ulong addr)
 	memmove (&header, (char *)addr, sizeof(image_header_t));

 	if (ntohl(hdr->ih_magic) != IH_MAGIC) {
-		printf ("   Bad Magic Number\n");
+		puts ("   Bad Magic Number\n");
 		return 1;
 	}

@@ -1025,7 +1025,7 @@ static int image_info (ulong addr)
 	hdr->ih_hcrc = 0;

 	if (crc32 (0, (char *)data, len) != checksum) {
-		printf ("   Bad Header Checksum\n");
+		puts ("   Bad Header Checksum\n");
 		return 1;
 	}

@@ -1035,12 +1035,12 @@ static int image_info (ulong addr)
 	data = addr + sizeof(image_header_t);
 	len  = ntohl(hdr->ih_size);

-	printf ("   Verifying Checksum ... ");
+	puts ("   Verifying Checksum ... ");
 	if (crc32 (0, (char *)data, len) != ntohl(hdr->ih_dcrc)) {
-		printf ("   Bad Data CRC\n");
+		puts ("   Bad Data CRC\n");
 		return 1;
 	}
-	printf ("OK\n");
+	puts ("OK\n");
 	return 0;
 }

@@ -1091,11 +1091,11 @@ int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			data = (ulong)hdr + sizeof(image_header_t);
 			len  = ntohl(hdr->ih_size);

-			printf ("   Verifying Checksum ... ");
+			puts ("   Verifying Checksum ... ");
 			if (crc32 (0, (char *)data, len) != ntohl(hdr->ih_dcrc)) {
-				printf ("   Bad Data CRC\n");
+				puts ("   Bad Data CRC\n");
 			}
-			printf ("OK\n");
+			puts ("OK\n");
 next_sector:		;
 		}
 next_bank:	;
@@ -1128,18 +1128,19 @@ print_image_hdr (image_header_t *hdr)
 		tm.tm_year, tm.tm_mon, tm.tm_mday,
 		tm.tm_hour, tm.tm_min, tm.tm_sec);
 #endif	/* CFG_CMD_DATE, CONFIG_TIMESTAMP */
-	printf ("   Image Type:   "); print_type(hdr); printf ("\n");
-	printf ("   Data Size:    %d Bytes = ", ntohl(hdr->ih_size));
+	puts ("   Image Type:   "); print_type(hdr);
+	printf ("\n   Data Size:    %d Bytes = ", ntohl(hdr->ih_size));
 	print_size (ntohl(hdr->ih_size), "\n");
-	printf ("   Load Address: %08x\n", ntohl(hdr->ih_load));
-	printf ("   Entry Point:  %08x\n", ntohl(hdr->ih_ep));
+	printf ("   Load Address: %08x\n"
+		"   Entry Point:  %08x\n",
+		 ntohl(hdr->ih_load), ntohl(hdr->ih_ep));

 	if (hdr->ih_type == IH_TYPE_MULTI) {
 		int i;
 		ulong len;
 		ulong *len_ptr = (ulong *)((ulong)hdr + sizeof(image_header_t));

-		printf ("   Contents:\n");
+		puts ("   Contents:\n");
 		for (i=0; (len = ntohl(*len_ptr)); ++i, ++len_ptr) {
 			printf ("   Image %d: %8ld Bytes = ", i, len);
 			print_size (len, "\n");
@@ -1244,7 +1245,7 @@ int gunzip(void *dst, int dstlen, unsigned char *src, int *lenp)
 	i = 10;
 	flags = src[3];
 	if (src[2] != DEFLATED || (flags & RESERVED) != 0) {
-		printf ("Error: Bad gzipped data\n");
+		puts ("Error: Bad gzipped data\n");
 		return (-1);
 	}
 	if ((flags & EXTRA_FIELD) != 0)
@@ -1258,7 +1259,7 @@ int gunzip(void *dst, int dstlen, unsigned char *src, int *lenp)
 	if ((flags & HEAD_CRC) != 0)
 		i += 2;
 	if (i >= *lenp) {
-		printf ("Error: gunzip out of data in header\n");
+		puts ("Error: gunzip out of data in header\n");
 		return (-1);
 	}

--- a/common/cmd_date.c
+++ b/common/cmd_date.c
@@ -47,14 +47,14 @@ int do_date (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	switch (argc) {
 	case 2:			/* set date & time */
 		if (strcmp(argv[1],"reset") == 0) {
-			printf ("Reset RTC...\n");
+			puts ("Reset RTC...\n");
 			rtc_reset ();
 		} else {
 			/* initialize tm with current time */
 			rtc_get (&tm);
 			/* insert new date & time */
 			if (mk_date (argv[1], &tm) != 0) {
-				printf ("## Bad date format\n");
+				puts ("## Bad date format\n");
 				return 1;
 			}
 			/* and write to RTC */
--- a/common/cmd_diag.c
+++ b/common/cmd_diag.c
@@ -37,11 +37,11 @@ int do_diag (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 	if (argc == 1 || strcmp (argv[1], "run") != 0) {
 		/* List test info */
 		if (argc == 1) {
-			printf ("Available hardware tests:\n");
+			puts ("Available hardware tests:\n");
 			post_info (NULL);
-			printf ("Use 'diag [<test1> [<test2> ...]]'"
+			puts ("Use 'diag [<test1> [<test2> ...]]'"
 					" to get more info.\n");
-			printf ("Use 'diag run [<test1> [<test2> ...]]'"
+			puts ("Use 'diag run [<test1> [<test2> ...]]'"
 					" to run tests.\n");
 		} else {
 			for (i = 1; i < argc; i++) {
--- a/common/cmd_eeprom.c
+++ b/common/cmd_eeprom.c
@@ -75,7 +75,7 @@ int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])

 			rcode = eeprom_read (dev_addr, off, (uchar *) addr, cnt);

-			printf ("done\n");
+			puts ("done\n");
 			return rcode;
 		} else if (strcmp (argv[1], "write") == 0) {
 			int rcode;
@@ -84,7 +84,7 @@ int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])

 			rcode = eeprom_write (dev_addr, off, (uchar *) addr, cnt);

-			printf ("done\n");
+			puts ("done\n");
 			return rcode;
 		}
 	}
@@ -295,7 +295,7 @@ int eeprom_write (unsigned dev_addr, unsigned offset, uchar *buffer, unsigned cn
 #endif
 			}
 			if (i == MAX_ACKNOWLEDGE_POLLS) {
-				printf("EEPROM poll acknowledge failed\n");
+				puts ("EEPROM poll acknowledge failed\n");
 				rcode = 1;
 			}
 		}
--- a/common/cmd_elf.c
+++ b/common/cmd_elf.c
@@ -103,7 +103,7 @@ int do_bootvx ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	if ((tmp = getenv ("loadaddr")) != NULL) {
 		addr = simple_strtoul (tmp, NULL, 16);
 	} else {
-		printf ("No load address provided\n");
+		puts ("No load address provided\n");
 		return 1;
 	}

@@ -133,7 +133,7 @@ int do_bootvx ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	tmp = (char *) CFG_ETHERNET_MAC_ADDR;
 	memcpy ((char *) tmp, (char *) &gd->bd->bi_enetaddr[0], 6);
 #else
-	printf ("## Ethernet MAC address not copied to NV RAM\n");
+	puts ("## Ethernet MAC address not copied to NV RAM\n");
 #endif

 	/*
@@ -200,7 +200,7 @@ int do_bootvx ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		 * to just copy
 		 */

-		printf ("No bootargs defined\n");
+		puts ("No bootargs defined\n");
 		return 1;
 #endif
 	}
@@ -214,7 +214,7 @@ int do_bootvx ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	if (valid_elf_image (addr)) {
 		addr = load_elf_image (addr);
 	} else {
-		printf ("## Not an ELF image, assuming binary\n");
+		puts ("## Not an ELF image, assuming binary\n");
 		/* leave addr as load_addr */
 	}

@@ -224,7 +224,7 @@ int do_bootvx ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 	((void (*)(void)) addr) ();

-	printf ("## vxWorks terminated\n");
+	puts ("## vxWorks terminated\n");
 	return 1;
 }

--- a/common/cmd_flash.c
+++ b/common/cmd_flash.c
@@ -149,14 +149,14 @@ flash_fill_sect_ranges (ulong addr_first, ulong addr_last,
 				if (addr_last > b_end) {
 					s_last[bank] = s_end;
 				} else {
-					printf ("Error: end address"
+					puts ("Error: end address"
 						" not on sector boundary\n");
 					rcode = 1;
 					break;
 				}
 			}
 			if (s_last[bank] < s_first[bank]) {
-				printf ("Error: end sector"
+				puts ("Error: end sector"
 					" precedes start sector\n");
 				rcode = 1;
 				break;
@@ -165,7 +165,7 @@ flash_fill_sect_ranges (ulong addr_first, ulong addr_last,
 			addr_first = (sect == s_end) ? b_end + 1: info->start[sect + 1];
 			(*s_count) += s_last[bank] - s_first[bank] + 1;
 		} else if (s_last[bank] >= 0) {
-			printf("Error: cannot span across banks when they are"
+			puts ("Error: cannot span across banks when they are"
 			       " mapped in reverse order\n");
 			rcode = 1;
 			break;
@@ -225,7 +225,7 @@ int do_flerase (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 	if ((n = abbrev_spec(argv[1], &info, &sect_first, &sect_last)) != 0) {
 		if (n < 0) {
-			printf("Bad sector specification\n");
+			puts ("Bad sector specification\n");
 			return 1;
 		}
 		printf ("Erase Flash Sectors %d-%d in Bank # %d ",
@@ -294,7 +294,7 @@ int flash_sect_erase (ulong addr_first, ulong addr_last)
 		}
 		printf ("Erased %d sectors\n", erased);
 	} else if (rcode == 0) {
-		printf ("Error: start and/or end address"
+		puts ("Error: start and/or end address"
 			" not on sector boundary\n");
 		rcode = 1;
 	}
@@ -332,7 +332,7 @@ int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		if (addr_dataflash(addr_first) && addr_dataflash(addr_last)) {
 			status = dataflash_real_protect(p,addr_first,addr_last);
 			if (status < 0){
-				printf("Bad DataFlash sector specification\n");
+				puts ("Bad DataFlash sector specification\n");
 				return 1;
 			}
 			printf("%sProtect %d DataFlash Sectors\n",
@@ -371,7 +371,7 @@ int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 	if ((n = abbrev_spec(argv[2], &info, &sect_first, &sect_last)) != 0) {
 		if (n < 0) {
-			printf("Bad sector specification\n");
+			puts ("Bad sector specification\n");
 			return 1;
 		}
 		printf("%sProtect Flash Sectors %d-%d in Bank # %d\n",
@@ -411,7 +411,7 @@ int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		info = &flash_info[bank-1];

 		if (info->flash_id == FLASH_UNKNOWN) {
-			printf ("missing or unknown FLASH type\n");
+			puts ("missing or unknown FLASH type\n");
 			return 1;
 		}
 		for (i=0; i<info->sector_count; ++i) {
@@ -485,7 +485,7 @@ int flash_sect_protect (int p, ulong addr_first, ulong addr_last)
 		printf ("%sProtected %d sectors\n",
 			p ? "" : "Un-", protected);
 	} else if (rcode == 0) {
-		printf ("Error: start and/or end address"
+		puts ("Error: start and/or end address"
 			" not on sector boundary\n");
 		rcode = 1;
 	}
--- a/common/cmd_i2c.c
+++ b/common/cmd_i2c.c
@@ -186,7 +186,7 @@ int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		linebytes = (nbytes > DISP_LINE_LEN) ? DISP_LINE_LEN : nbytes;

 		if(i2c_read(chip, addr, alen, linebuf, linebytes) != 0) {
-			printf("Error reading the chip.\n");
+			puts ("Error reading the chip.\n");
 		} else {
 			printf("%04x:", addr);
 			cp = linebuf;
@@ -194,16 +194,16 @@ int do_i2c_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 				printf(" %02x", *cp++);
 				addr++;
 			}
-			printf("    ");
+			puts ("    ");
 			cp = linebuf;
 			for (j=0; j<linebytes; j++) {
 				if ((*cp < 0x20) || (*cp > 0x7e))
-					printf(".");
+					puts (".");
 				else
 					printf("%c", *cp);
 				cp++;
 			}
-			printf("\n");
+			putc ('\n');
 		}
 		nbytes -= linebytes;
 	} while (nbytes > 0);
@@ -285,7 +285,7 @@ int do_i2c_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 	while (count-- > 0) {
 		if(i2c_write(chip, addr++, alen, &byte, 1) != 0) {
-			printf("Error writing the chip.\n");
+			puts ("Error writing the chip.\n");
 		}
 		/*
 		 * Wait for the write to complete.  The write can take
@@ -374,7 +374,7 @@ int do_i2c_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	}
 	if(err > 0)
 	{
-		printf("Error reading the chip,\n");
+		puts ("Error reading the chip,\n");
 	} else {
 		printf ("%08lx\n", crc);
 	}
@@ -456,7 +456,7 @@ mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
 	do {
 		printf("%08lx:", addr);
 		if(i2c_read(chip, addr, alen, (char *)&data, size) != 0) {
-			printf("\nError reading the chip,\n");
+			puts ("\nError reading the chip,\n");
 		} else {
 			data = cpu_to_be32(data);
 			if(size == 1) {
@@ -505,7 +505,7 @@ mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
 				reset_cmd_timeout();
 #endif
 				if(i2c_write(chip, addr, alen, (char *)&data, size) != 0) {
-					printf("Error writing the chip.\n");
+					puts ("Error writing the chip.\n");
 				}
 #ifdef CFG_EEPROM_PAGE_WRITE_DELAY_MS
 				udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
@@ -534,7 +534,7 @@ int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	int k, skip;
 #endif

-	printf("Valid chip addresses:");
+	puts ("Valid chip addresses:");
 	for(j = 0; j < 128; j++) {
 #if defined(CFG_I2C_NOPROBES)
 		skip = 0;
@@ -551,13 +551,13 @@ int do_i2c_probe (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			printf(" %02X", j);
 		}
 	}
-	printf("\n");
+	putc ('\n');

 #if defined(CFG_I2C_NOPROBES)
 	puts ("Excluded chip addresses:");
 	for( k = 0; k < sizeof(i2c_no_probes); k++ )
 		printf(" %02X", i2c_no_probes[k] );
-	puts ("\n");
+	putc ('\n');
 #endif

 	return 0;
@@ -629,7 +629,7 @@ int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	 */
 	while(1) {
 		if(i2c_read(chip, addr, alen, bytes, length) != 0) {
-			printf("Error reading the chip.\n");
+			puts ("Error reading the chip.\n");
 		}
 		udelay(delay);
 	}
@@ -666,7 +666,7 @@ int do_sdram  ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	chip = simple_strtoul(argv[1], NULL, 16);

 	if(i2c_read(chip, 0, 1, data, sizeof(data)) != 0) {
-		printf("No SDRAM Serial Presence Detect found.\n");
+		puts ("No SDRAM Serial Presence Detect found.\n");
 		return 1;
 	}

@@ -683,19 +683,19 @@ int do_sdram  ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		(data[62] >> 4) & 0x0F, data[62] & 0x0F);
 	printf("Bytes used                   0x%02X\n", data[0]);
 	printf("Serial memory size           0x%02X\n", 1 << data[1]);
-	printf("Memory type                  ");
+	puts ("Memory type                  ");
 	switch(data[2]) {
-		case 2:  printf("EDO\n");	break;
-		case 4:  printf("SDRAM\n");	break;
-		default: printf("unknown\n");	break;
+		case 2:  puts ("EDO\n");	break;
+		case 4:  puts ("SDRAM\n");	break;
+		default: puts ("unknown\n");	break;
 	}
-	printf("Row address bits             ");
+	puts ("Row address bits             ");
 	if((data[3] & 0x00F0) == 0) {
 		printf("%d\n", data[3] & 0x0F);
 	} else {
 		printf("%d/%d\n", data[3] & 0x0F, (data[3] >> 4) & 0x0F);
 	}
-	printf("Column address bits          ");
+	puts ("Column address bits          ");
 	if((data[4] & 0x00F0) == 0) {
 		printf("%d\n", data[4] & 0x0F);
 	} else {
@@ -703,39 +703,39 @@ int do_sdram  ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	}
 	printf("Module rows                  %d\n", data[5]);
 	printf("Module data width            %d bits\n", (data[7] << 8) | data[6]);
-	printf("Interface signal levels      ");
+	puts ("Interface signal levels      ");
 	switch(data[8]) {
-		case 0:  printf("5.0v/TTL\n");	break;
-		case 1:  printf("LVTTL\n");	break;
-		case 2:  printf("HSTL 1.5\n");	break;
-		case 3:  printf("SSTL 3.3\n");	break;
-		case 4:  printf("SSTL 2.5\n");	break;
-		default: printf("unknown\n");	break;
+		case 0:  puts ("5.0v/TTL\n");	break;
+		case 1:  puts ("LVTTL\n");	break;
+		case 2:  puts ("HSTL 1.5\n");	break;
+		case 3:  puts ("SSTL 3.3\n");	break;
+		case 4:  puts ("SSTL 2.5\n");	break;
+		default: puts ("unknown\n");	break;
 	}
 	printf("SDRAM cycle time             %d.%d nS\n",
 		(data[9] >> 4) & 0x0F, data[9] & 0x0F);
 	printf("SDRAM access time            %d.%d nS\n",
 		(data[10] >> 4) & 0x0F, data[10] & 0x0F);
-	printf("EDC configuration            ");
+	puts ("EDC configuration            ");
 	switch(data[11]) {
-		case 0:  printf("None\n");	break;
-		case 1:  printf("Parity\n");	break;
-		case 2:  printf("ECC\n");	break;
-		default: printf("unknown\n");	break;
+		case 0:  puts ("None\n");	break;
+		case 1:  puts ("Parity\n");	break;
+		case 2:  puts ("ECC\n");	break;
+		default: puts ("unknown\n");	break;
 	}
 	if((data[12] & 0x80) == 0) {
-		printf("No self refresh, rate        ");
+		puts ("No self refresh, rate        ");
 	} else {
-		printf("Self refresh, rate           ");
+		puts ("Self refresh, rate           ");
 	}
 	switch(data[12] & 0x7F) {
-		case 0:  printf("15.625uS\n");	break;
-		case 1:  printf("3.9uS\n");	break;
-		case 2:  printf("7.8uS\n");	break;
-		case 3:  printf("31.3uS\n");	break;
-		case 4:  printf("62.5uS\n");	break;
-		case 5:  printf("125uS\n");	break;
-		default: printf("unknown\n");	break;
+		case 0:  puts ("15.625uS\n");	break;
+		case 1:  puts ("3.9uS\n");	break;
+		case 2:  puts ("7.8uS\n");	break;
+		case 3:  puts ("31.3uS\n");	break;
+		case 4:  puts ("62.5uS\n");	break;
+		case 5:  puts ("125uS\n");	break;
+		default: puts ("unknown\n");	break;
 	}
 	printf("SDRAM width (primary)        %d\n", data[13] & 0x7F);
 	if((data[13] & 0x80) != 0) {
@@ -752,65 +752,65 @@ int do_sdram  ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	}
 	printf("Min clock delay, back-to-back random column addresses %d\n",
 		data[15]);
-	printf("Burst length(s)             ");
-	if(data[16] & 0x80) printf(" Page");
-	if(data[16] & 0x08) printf(" 8");
-	if(data[16] & 0x04) printf(" 4");
-	if(data[16] & 0x02) printf(" 2");
-	if(data[16] & 0x01) printf(" 1");
-	printf("\n");
+	puts ("Burst length(s)             ");
+	if (data[16] & 0x80) puts (" Page");
+	if (data[16] & 0x08) puts (" 8");
+	if (data[16] & 0x04) puts (" 4");
+	if (data[16] & 0x02) puts (" 2");
+	if (data[16] & 0x01) puts (" 1");
+	putc ('\n');
 	printf("Number of banks              %d\n", data[17]);
-	printf("CAS latency(s)              ");
-	if(data[18] & 0x80) printf(" TBD");
-	if(data[18] & 0x40) printf(" 7");
-	if(data[18] & 0x20) printf(" 6");
-	if(data[18] & 0x10) printf(" 5");
-	if(data[18] & 0x08) printf(" 4");
-	if(data[18] & 0x04) printf(" 3");
-	if(data[18] & 0x02) printf(" 2");
-	if(data[18] & 0x01) printf(" 1");
-	printf("\n");
-	printf("CS latency(s)               ");
-	if(data[19] & 0x80) printf(" TBD");
-	if(data[19] & 0x40) printf(" 6");
-	if(data[19] & 0x20) printf(" 5");
-	if(data[19] & 0x10) printf(" 4");
-	if(data[19] & 0x08) printf(" 3");
-	if(data[19] & 0x04) printf(" 2");
-	if(data[19] & 0x02) printf(" 1");
-	if(data[19] & 0x01) printf(" 0");
-	printf("\n");
-	printf("WE latency(s)               ");
-	if(data[20] & 0x80) printf(" TBD");
-	if(data[20] & 0x40) printf(" 6");
-	if(data[20] & 0x20) printf(" 5");
-	if(data[20] & 0x10) printf(" 4");
-	if(data[20] & 0x08) printf(" 3");
-	if(data[20] & 0x04) printf(" 2");
-	if(data[20] & 0x02) printf(" 1");
-	if(data[20] & 0x01) printf(" 0");
-	printf("\n");
-	printf("Module attributes:\n");
-	if(!data[21])       printf("  (none)\n");
-	if(data[21] & 0x80) printf("  TBD (bit 7)\n");
-	if(data[21] & 0x40) printf("  Redundant row address\n");
-	if(data[21] & 0x20) printf("  Differential clock input\n");
-	if(data[21] & 0x10) printf("  Registerd DQMB inputs\n");
-	if(data[21] & 0x08) printf("  Buffered DQMB inputs\n");
-	if(data[21] & 0x04) printf("  On-card PLL\n");
-	if(data[21] & 0x02) printf("  Registered address/control lines\n");
-	if(data[21] & 0x01) printf("  Buffered address/control lines\n");
-	printf("Device attributes:\n");
-	if(data[22] & 0x80) printf("  TBD (bit 7)\n");
-	if(data[22] & 0x40) printf("  TBD (bit 6)\n");
-	if(data[22] & 0x20) printf("  Upper Vcc tolerance 5%%\n");
-	else                printf("  Upper Vcc tolerance 10%%\n");
-	if(data[22] & 0x10) printf("  Lower Vcc tolerance 5%%\n");
-	else                printf("  Lower Vcc tolerance 10%%\n");
-	if(data[22] & 0x08) printf("  Supports write1/read burst\n");
-	if(data[22] & 0x04) printf("  Supports precharge all\n");
-	if(data[22] & 0x02) printf("  Supports auto precharge\n");
-	if(data[22] & 0x01) printf("  Supports early RAS# precharge\n");
+	puts ("CAS latency(s)              ");
+	if (data[18] & 0x80) puts (" TBD");
+	if (data[18] & 0x40) puts (" 7");
+	if (data[18] & 0x20) puts (" 6");
+	if (data[18] & 0x10) puts (" 5");
+	if (data[18] & 0x08) puts (" 4");
+	if (data[18] & 0x04) puts (" 3");
+	if (data[18] & 0x02) puts (" 2");
+	if (data[18] & 0x01) puts (" 1");
+	putc ('\n');
+	puts ("CS latency(s)               ");
+	if (data[19] & 0x80) puts (" TBD");
+	if (data[19] & 0x40) puts (" 6");
+	if (data[19] & 0x20) puts (" 5");
+	if (data[19] & 0x10) puts (" 4");
+	if (data[19] & 0x08) puts (" 3");
+	if (data[19] & 0x04) puts (" 2");
+	if (data[19] & 0x02) puts (" 1");
+	if (data[19] & 0x01) puts (" 0");
+	putc ('\n');
+	puts ("WE latency(s)               ");
+	if (data[20] & 0x80) puts (" TBD");
+	if (data[20] & 0x40) puts (" 6");
+	if (data[20] & 0x20) puts (" 5");
+	if (data[20] & 0x10) puts (" 4");
+	if (data[20] & 0x08) puts (" 3");
+	if (data[20] & 0x04) puts (" 2");
+	if (data[20] & 0x02) puts (" 1");
+	if (data[20] & 0x01) puts (" 0");
+	putc ('\n');
+	puts ("Module attributes:\n");
+	if (!data[21])       puts ("  (none)\n");
+	if (data[21] & 0x80) puts ("  TBD (bit 7)\n");
+	if (data[21] & 0x40) puts ("  Redundant row address\n");
+	if (data[21] & 0x20) puts ("  Differential clock input\n");
+	if (data[21] & 0x10) puts ("  Registerd DQMB inputs\n");
+	if (data[21] & 0x08) puts ("  Buffered DQMB inputs\n");
+	if (data[21] & 0x04) puts ("  On-card PLL\n");
+	if (data[21] & 0x02) puts ("  Registered address/control lines\n");
+	if (data[21] & 0x01) puts ("  Buffered address/control lines\n");
+	puts ("Device attributes:\n");
+	if (data[22] & 0x80) puts ("  TBD (bit 7)\n");
+	if (data[22] & 0x40) puts ("  TBD (bit 6)\n");
+	if (data[22] & 0x20) puts ("  Upper Vcc tolerance 5%\n");
+	else                 puts ("  Upper Vcc tolerance 10%\n");
+	if (data[22] & 0x10) puts ("  Lower Vcc tolerance 5%\n");
+	else                 puts ("  Lower Vcc tolerance 10%\n");
+	if (data[22] & 0x08) puts ("  Supports write1/read burst\n");
+	if (data[22] & 0x04) puts ("  Supports precharge all\n");
+	if (data[22] & 0x02) puts ("  Supports auto precharge\n");
+	if (data[22] & 0x01) puts ("  Supports early RAS# precharge\n");
 	printf("SDRAM cycle time (2nd highest CAS latency)        %d.%d nS\n",
 		(data[23] >> 4) & 0x0F, data[23] & 0x0F);
 	printf("SDRAM access from clock (2nd highest CAS latency) %d.%d nS\n",
@@ -823,16 +823,16 @@ int do_sdram  ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	printf("Row active to row active min %d nS\n", data[28]);
 	printf("RAS to CAS delay min         %d nS\n", data[29]);
 	printf("Minimum RAS pulse width      %d nS\n", data[30]);
-	printf("Density of each row         ");
-	if(data[31] & 0x80) printf(" 512MByte");
-	if(data[31] & 0x40) printf(" 256MByte");
-	if(data[31] & 0x20) printf(" 128MByte");
-	if(data[31] & 0x10) printf(" 64MByte");
-	if(data[31] & 0x08) printf(" 32MByte");
-	if(data[31] & 0x04) printf(" 16MByte");
-	if(data[31] & 0x02) printf(" 8MByte");
-	if(data[31] & 0x01) printf(" 4MByte");
-	printf("\n");
+	puts ("Density of each row         ");
+	if (data[31] & 0x80) puts (" 512");
+	if (data[31] & 0x40) puts (" 256");
+	if (data[31] & 0x20) puts (" 128");
+	if (data[31] & 0x10) puts (" 64");
+	if (data[31] & 0x08) puts (" 32");
+	if (data[31] & 0x04) puts (" 16");
+	if (data[31] & 0x02) puts (" 8");
+	if (data[31] & 0x01) puts (" 4");
+	puts ("MByte\n");
 	printf("Command and Address setup    %c%d.%d nS\n",
 		(data[32] & 0x80) ? '-' : '+',
 		(data[32] >> 4) & 0x07, data[32] & 0x0F);
@@ -845,21 +845,21 @@ int do_sdram  ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	printf("Data signal input hold       %c%d.%d nS\n",
 		(data[35] & 0x80) ? '-' : '+',
 		(data[35] >> 4) & 0x07, data[35] & 0x0F);
-	printf("Manufacturer's JEDEC ID      ");
+	puts ("Manufacturer's JEDEC ID      ");
 	for(j = 64; j <= 71; j++)
 		printf("%02X ", data[j]);
-	printf("\n");
+	putc ('\n');
 	printf("Manufacturing Location       %02X\n", data[72]);
-	printf("Manufacturer's Part Number   ");
+	puts ("Manufacturer's Part Number   ");
 	for(j = 73; j <= 90; j++)
 		printf("%02X ", data[j]);
-	printf("\n");
+	putc ('\n');
 	printf("Revision Code                %02X %02X\n", data[91], data[92]);
 	printf("Manufacturing Date           %02X %02X\n", data[93], data[94]);
-	printf("Assembly Serial Number       ");
+	puts ("Assembly Serial Number       ");
 	for(j = 95; j <= 98; j++)
 		printf("%02X ", data[j]);
-	printf("\n");
+	putc ('\n');
 	printf("Speed rating                 PC%d\n",
 		data[126] == 0x66 ? 66 : data[126]);

--- a/common/cmd_ide.c
+++ b/common/cmd_ide.c
@@ -1410,27 +1410,31 @@ WR_OUT:
 /*
 * copy src to dest, skipping leading and trailing blanks and null
 * terminate the string
+ * "len" is the size of available memory including the terminating '\0'
 */
-static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len)
+static void ident_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
 {
-	int start,end;
+	unsigned char *end, *last;

-	start=0;
-	while (start<len) {
-		if (src[start]!=' ')
-			break;
-		start++;
+	last = dst;
+	end  = src + len - 1;
+
+	/* reserve space for '\0' */
+	if (len < 2)
+		goto OUT;
+
+	/* skip leading white space */
+	while ((*src) && (src<end) && (*src==' '))
+		++src;
+
+	/* copy string, omitting trailing white space */
+	while ((*src) && (src<end)) {
+		*dst++ = *src;
+		if (*src++ != ' ')
+			last = dst;
 	}
-	end=len-1;
-	while (end>start) {
-		if (src[end]!=' ')
-			break;
-		end--;
-	}
-	for ( ; start<=end; start++) {
-		*dest++=src[start];
-	}
-	*dest='\0';
+OUT:
+	*last = '\0';
 }

 /* ------------------------------------------------------------------------- */
--- a/common/cmd_immap.c
+++ b/common/cmd_immap.c
@@ -107,7 +107,7 @@ do_memcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 #if defined(CONFIG_8xx)
 	printf (" MCR   = %08x\n", memctl->memc_mcr);
 #elif defined(CONFIG_8260)
-	printf ("\n");
+	putc ('\n');
 #endif
 	printf ("MAMR  = %08x MBMR  = %08x",
 		memctl->memc_mamr, memctl->memc_mbmr);
@@ -325,7 +325,7 @@ do_iopset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	iopin_t iopin;

 	if (argc != 5) {
-		printf ("iopset PORT PIN CMD VALUE\n");
+		puts ("iopset PORT PIN CMD VALUE\n");
 		return 1;
 	}
 	port = argv[1][0] - 'A';
@@ -529,7 +529,7 @@ do_i2cinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	printf ("I2CER = %02x I2CMR = %02x\n", i2c->i2c_i2cer, i2c->i2c_i2cmr);

 	if (iip == NULL)
-		printf ("i2c parameter ram not allocated\n");
+		puts ("i2c parameter ram not allocated\n");
 	else {
 		printf ("RBASE = %08x TBASE = %08x\n",
 			iip->iic_rbase, iip->iic_tbase);
--- a/common/cmd_jffs2.c
+++ b/common/cmd_jffs2.c
@@ -98,7 +98,7 @@ do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
    char *fsname;

 	char *filename = "uImage";
-	ulong offset = CFG_LOAD_ADDR;
+	ulong offset = load_addr;
 	int size;
 	struct part_info *part;

@@ -107,6 +107,7 @@ do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	}
 	if (argc == 3) {
 		offset = simple_strtoul(argv[1], NULL, 16);
+		load_addr = offset;
 		filename = argv[2];
 	}

@@ -135,7 +136,7 @@ do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 		return !(size > 0);
 	}
-	printf("Active partition not valid\n");
+	puts ("Active partition not valid\n");
 	return 0;
 }

@@ -164,7 +165,7 @@ do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 		return (ret == 1);
 	}
-	printf("Active partition not valid\n");
+	puts ("Active partition not valid\n");
 	return 0;
 }

@@ -192,7 +193,7 @@ do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 		return (ret == 1);
 	}
-	printf("Active partition not valid\n");
+	puts ("Active partition not valid\n");
 	return 0;
 }

@@ -206,7 +207,7 @@ do_jffs2_chpart(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
   if (argc >= 2) {
 		tmp_part = simple_strtoul(argv[1], NULL, 16);
 	}else{
-		printf("Need partition number in argument list\n");
+		puts ("Need partition number in argument list\n");
 		return 0;

 	}
--- a/common/cmd_mem.c
+++ b/common/cmd_mem.c
@@ -178,16 +178,16 @@ int do_mem_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 #ifdef CONFIG_HAS_DATAFLASH
 		}
 #endif
-		printf("    ");
+		puts ("    ");
 		cp = linebuf;
 		for (i=0; i<linebytes; i++) {
 			if ((*cp < 0x20) || (*cp > 0x7e))
-				printf(".");
+				putc ('.');
 			else
 				printf("%c", *cp);
 			cp++;
 		}
-		printf("\n");
+		putc ('\n');
 		nbytes -= linebytes;
 		if (ctrlc()) {
 			rc = 1;
@@ -279,7 +279,7 @@ int do_mem_cmp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 #ifdef CONFIG_HAS_DATAFLASH
 	if (addr_dataflash(addr1) | addr_dataflash(addr2)){
-		printf("Comparison with DataFlash space not supported.\n\r");
+		puts ("Comparison with DataFlash space not supported.\n\r");
 		return 0;
 	}
 #endif
@@ -368,7 +368,7 @@ int do_mem_cp ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	   ) {
 		int rc;

-		printf ("Copy to Flash... ");
+		puts ("Copy to Flash... ");

 		rc = flash_write ((uchar *)addr, dest, count*size);
 		if (rc != 0) {
@@ -384,13 +384,13 @@ int do_mem_cp ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	if (mmc2info(dest)) {
 		int rc;

-		printf ("Copy to MMC... ");
+		puts ("Copy to MMC... ");
 		switch (rc = mmc_write ((uchar *)addr, dest, count*size)) {
 		case 0:
-			printf ("\n");
+			putc ('\n');
 			return 1;
 		case -1:
-			printf("failed\n");
+			puts ("failed\n");
 			return 1;
 		default:
 			printf ("%s[%d] FIXME: rc=%d\n",__FILE__,__LINE__,rc);
@@ -403,13 +403,13 @@ int do_mem_cp ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	if (mmc2info(addr)) {
 		int rc;

-		printf ("Copy from MMC... ");
+		puts ("Copy from MMC... ");
 		switch (rc = mmc_read (addr, (uchar *)dest, count*size)) {
 		case 0:
-			printf ("\n");
+			putc ('\n');
 			return 1;
 		case -1:
-			printf("failed\n");
+			puts ("failed\n");
 			return 1;
 		default:
 			printf ("%s[%d] FIXME: rc=%d\n",__FILE__,__LINE__,rc);
@@ -425,7 +425,7 @@ int do_mem_cp ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	if (addr_dataflash(dest) && !addr_dataflash(addr)){
 		int rc;

-		printf ("Copy to DataFlash... ");
+		puts ("Copy to DataFlash... ");

 		rc = write_dataflash (dest, addr, count*size);

@@ -449,7 +449,7 @@ int do_mem_cp ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	}

 	if (addr_dataflash(addr) && addr_dataflash(dest)){
-		printf("Unsupported combination of source/destination.\n\r");
+		puts ("Unsupported combination of source/destination.\n\r");
 		return 1;
 	}
 #endif
@@ -828,7 +828,7 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			val  += incr;
 		}

-		printf("Reading...");
+		puts ("Reading...");

 		for (addr=start,val=pattern; addr<end; addr++) {
 			readback = *addr;
@@ -902,7 +902,7 @@ mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])

 #ifdef CONFIG_HAS_DATAFLASH
 	if (addr_dataflash(addr)){
-		printf("Can't modify DataFlash in place. Use cp instead.\n\r");
+		puts ("Can't modify DataFlash in place. Use cp instead.\n\r");
 		return 0;
 	}
 #endif
--- a/common/cmd_mii.c
+++ b/common/cmd_mii.c
@@ -109,13 +109,13 @@ int do_mii (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
 		}
 	} else if (op == 'r') {
 		if (miiphy_read (addr, reg, &data) != 0) {
-			printf ("Error reading from the PHY\n");
+			puts ("Error reading from the PHY\n");
 			rcode = 1;
 		}
 		printf ("%04X\n", data & 0x0000FFFF);
 	} else if (op == 'w') {
 		if (miiphy_write (addr, reg, data) != 0) {
-			printf ("Error writing to the PHY\n");
+			puts ("Error writing to the PHY\n");
 			rcode = 1;
 		}
 	} else {
--- a/common/cmd_reginfo.c
+++ b/common/cmd_reginfo.c
@@ -44,9 +44,9 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	 * other useful registers
 	 */

-	printf("\nSystem Configuration registers\n");
+	printf ("\nSystem Configuration registers\n"

-	printf("\tIMMR\t0x%08X\n", get_immr(0));
+		"\tIMMR\t0x%08X\n", get_immr(0));

 	printf("\tSIUMCR\t0x%08X", sysconf->sc_siumcr);
 	printf("\tSYPCR\t0x%08X\n",sysconf->sc_sypcr);
@@ -61,9 +61,9 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	printf("\tTESR\t0x%08X\tSDCR\t0x%08X\n",
 		sysconf->sc_tesr, sysconf->sc_sdcr);

-	printf("Memory Controller Registers\n");
+	printf ("Memory Controller Registers\n"

-	printf("\tBR0\t0x%08X\tOR0\t0x%08X \n", memctl->memc_br0, memctl->memc_or0);
+		"\tBR0\t0x%08X\tOR0\t0x%08X \n", memctl->memc_br0, memctl->memc_or0);
 	printf("\tBR1\t0x%08X\tOR1\t0x%08X \n", memctl->memc_br1, memctl->memc_or1);
 	printf("\tBR2\t0x%08X\tOR2\t0x%08X \n", memctl->memc_br2, memctl->memc_or2);
 	printf("\tBR3\t0x%08X\tOR3\t0x%08X \n", memctl->memc_br3, memctl->memc_or3);
@@ -71,16 +71,15 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	printf("\tBR5\t0x%08X\tOR5\t0x%08X \n", memctl->memc_br5, memctl->memc_or5);
 	printf("\tBR6\t0x%08X\tOR6\t0x%08X \n", memctl->memc_br6, memctl->memc_or6);
 	printf("\tBR7\t0x%08X\tOR7\t0x%08X \n", memctl->memc_br7, memctl->memc_or7);
-	printf("\n");
-
-	printf("\tmamr\t0x%08X\tmbmr\t0x%08X \n",
+	printf ("\n"
+		"\tmamr\t0x%08X\tmbmr\t0x%08X \n",
 		memctl->memc_mamr, memctl->memc_mbmr );
 	printf("\tmstat\t0x%08X\tmptpr\t0x%08X \n",
 		memctl->memc_mstat, memctl->memc_mptpr );
 	printf("\tmdr\t0x%08X \n", memctl->memc_mdr);

-	printf("\nSystem Integration Timers\n");
-	printf("\tTBSCR\t0x%08X\tRTCSC\t0x%08X \n",
+	printf ("\nSystem Integration Timers\n"
+		"\tTBSCR\t0x%08X\tRTCSC\t0x%08X \n",
 		timers->sit_tbscr, timers->sit_rtcsc);
 	printf("\tPISCR\t0x%08X \n", timers->sit_piscr);

@@ -105,7 +104,7 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	mfdcr(uicvr),
 	mfdcr(uicvcr));

-	printf ("\nMemory (SDRAM) Configuration\n"
+	puts ("\nMemory (SDRAM) Configuration\n"
 	    "besra    besrsa   besrb    besrsb   bear     mcopt1   rtr      pmit\n");

 	mtdcr(memcfga,mem_besra); 	printf ("%08x ", mfdcr(memcfgd));
@@ -117,7 +116,7 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	mtdcr(memcfga,mem_rtr); 	printf ("%08x ", mfdcr(memcfgd));
 	mtdcr(memcfga,mem_pmit); 	printf ("%08x ", mfdcr(memcfgd));

-	printf ("\n"
+	puts ("\n"
 	    "mb0cf    mb1cf    mb2cf    mb3cf    sdtr1    ecccf    eccerr\n");
 	mtdcr(memcfga,mem_mb0cf); 	printf ("%08x ", mfdcr(memcfgd));
 	mtdcr(memcfga,mem_mb1cf); 	printf ("%08x ", mfdcr(memcfgd));
@@ -145,7 +144,7 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	mfdcr(dmacr2), mfdcr(dmact2),mfdcr(dmada2), mfdcr(dmasa2), mfdcr(dmasb2),
 	mfdcr(dmacr3), mfdcr(dmact3),mfdcr(dmada3), mfdcr(dmasa3), mfdcr(dmasb3) );

-	printf ("\n"
+	puts ("\n"
 	    "External Bus\n"
 	    "pbear    pbesr0   pbesr1   epcr\n");
 	mtdcr(ebccfga,pbear); 	printf ("%08x ", mfdcr(ebccfgd));
@@ -153,7 +152,7 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	mtdcr(ebccfga,pbesr1); 	printf ("%08x ", mfdcr(ebccfgd));
 	mtdcr(ebccfga,epcr); 	printf ("%08x ", mfdcr(ebccfgd));

-	printf ("\n"
+	puts ("\n"
 	    "pb0cr    pb0ap    pb1cr    pb1ap    pb2cr    pb2ap    pb3cr    pb3ap\n");
 	mtdcr(ebccfga,pb0cr); 	printf ("%08x ", mfdcr(ebccfgd));
 	mtdcr(ebccfga,pb0ap); 	printf ("%08x ", mfdcr(ebccfgd));
@@ -164,7 +163,7 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	mtdcr(ebccfga,pb3cr); 	printf ("%08x ", mfdcr(ebccfgd));
 	mtdcr(ebccfga,pb3ap); 	printf ("%08x ", mfdcr(ebccfgd));

-	printf ("\n"
+	puts ("\n"
 	    "pb4cr    pb4ap    pb5cr    bp5ap    pb6cr    pb6ap    pb7cr    pb7ap\n");
 	mtdcr(ebccfga,pb4cr); 	printf ("%08x ", mfdcr(ebccfgd));
 	mtdcr(ebccfga,pb4ap); 	printf ("%08x ", mfdcr(ebccfgd));
@@ -175,7 +174,7 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	mtdcr(ebccfga,pb7cr); 	printf ("%08x ", mfdcr(ebccfgd));
 	mtdcr(ebccfga,pb7ap); 	printf ("%08x ", mfdcr(ebccfgd));

-	printf ("\n\n");
+	puts ("\n\n");
 /* For the BUBINGA (IBM 405EP eval) but should be generically 405ep */
 #elif defined(CONFIG_405EP)
 	printf ("\n405EP registers; MSR=%08x\n",mfmsr());
@@ -192,7 +191,7 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	mfdcr(uicvr),
 	mfdcr(uicvcr));

-	printf ("\nMemory (SDRAM) Configuration\n"
+	puts ("\nMemory (SDRAM) Configuration\n"
 	    "mcopt1   rtr      pmit     mb0cf    mb1cf    sdtr1\n");

 	mtdcr(memcfga,mem_mcopt1); 	printf ("%08x ", mfdcr(memcfgd));
@@ -217,7 +216,7 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	mfdcr(dmacr2), mfdcr(dmact2),mfdcr(dmada2), mfdcr(dmasa2), mfdcr(dmasb2),
 	mfdcr(dmacr3), mfdcr(dmact3),mfdcr(dmada3), mfdcr(dmasa3), mfdcr(dmasb3) );

-	printf ("\n"
+	puts ("\n"
 	    "External Bus\n"
 	    "pbear    pbesr0   pbesr1   epcr\n");
 	mtdcr(ebccfga,pbear); 	printf ("%08x ", mfdcr(ebccfgd));
@@ -225,7 +224,7 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	mtdcr(ebccfga,pbesr1); 	printf ("%08x ", mfdcr(ebccfgd));
 	mtdcr(ebccfga,epcr); 	printf ("%08x ", mfdcr(ebccfgd));

-	printf ("\n"
+	puts ("\n"
 	    "pb0cr    pb0ap    pb1cr    pb1ap    pb2cr    pb2ap    pb3cr    pb3ap\n");
 	mtdcr(ebccfga,pb0cr); 	printf ("%08x ", mfdcr(ebccfgd));
 	mtdcr(ebccfga,pb0ap); 	printf ("%08x ", mfdcr(ebccfgd));
@@ -236,12 +235,12 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	mtdcr(ebccfga,pb3cr); 	printf ("%08x ", mfdcr(ebccfgd));
 	mtdcr(ebccfga,pb3ap); 	printf ("%08x ", mfdcr(ebccfgd));

-	printf ("\n"
+	puts ("\n"
 	    "pb4cr    pb4ap\n");
 	mtdcr(ebccfga,pb4cr); 	printf ("%08x ", mfdcr(ebccfgd));
 	mtdcr(ebccfga,pb4ap); 	printf ("%08x ", mfdcr(ebccfgd));

-	printf ("\n\n");
+	puts ("\n\n");
 #elif defined(CONFIG_5xx)

 	volatile immap_t     	*immap  = (immap_t *)CFG_IMMR;
@@ -251,14 +250,14 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	volatile car5xx_t	*car = &immap->im_clkrst;
 	volatile uimb5xx_t	*uimb = &immap->im_uimb;

-	printf("\nSystem Configuration registers\n");
+	puts ("\nSystem Configuration registers\n");
 	printf("\tIMMR\t0x%08X\tSIUMCR\t0x%08X \n", get_immr(0), sysconf->sc_siumcr);
 	printf("\tSYPCR\t0x%08X\tSWSR\t0x%04X \n" ,sysconf->sc_sypcr, sysconf->sc_swsr);
 	printf("\tSIPEND\t0x%08X\tSIMASK\t0x%08X \n", sysconf->sc_sipend, sysconf->sc_simask);
 	printf("\tSIEL\t0x%08X\tSIVEC\t0x%08X \n", sysconf->sc_siel, sysconf->sc_sivec);
 	printf("\tTESR\t0x%08X\n", sysconf->sc_tesr);

-	printf("\nMemory Controller Registers\n");
+	puts ("\nMemory Controller Registers\n");
 	printf("\tBR0\t0x%08X\tOR0\t0x%08X \n", memctl->memc_br0, memctl->memc_or0);
 	printf("\tBR1\t0x%08X\tOR1\t0x%08X \n", memctl->memc_br1, memctl->memc_or1);
 	printf("\tBR2\t0x%08X\tOR2\t0x%08X \n", memctl->memc_br2, memctl->memc_or2);
@@ -266,16 +265,16 @@ int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	printf("\tDMBR\t0x%08X\tDMOR\t0x%08X \n", memctl->memc_dmbr, memctl->memc_dmor );
 	printf("\tMSTAT\t0x%08X\n", memctl->memc_mstat);

-	printf("\nSystem Integration Timers\n");
+	puts ("\nSystem Integration Timers\n");
 	printf("\tTBSCR\t0x%08X\tRTCSC\t0x%08X \n", timers->sit_tbscr, timers->sit_rtcsc);
 	printf("\tPISCR\t0x%08X \n", timers->sit_piscr);

-	printf("\nClocks and Reset\n");
+	puts ("\nClocks and Reset\n");
 	printf("\tSCCR\t0x%08X\tPLPRCR\t0x%08X \n", car->car_sccr, car->car_plprcr);

-	printf("\nU-Bus to IMB3 Bus Interface\n");
+	puts ("\nU-Bus to IMB3 Bus Interface\n");
 	printf("\tUMCR\t0x%08X\tUIPEND\t0x%08X \n", uimb->uimb_umcr, uimb->uimb_uipend);
-	printf ("\n\n");
+	puts ("\n\n");
 #endif /* CONFIG_5xx */
 	return 0;
 }
--- a/common/cmd_reiser.c
+++ b/common/cmd_reiser.c
@@ -0,0 +1,277 @@
+/*
+ * (C) Copyright 2003 - 2004
+ * Sysgo Real-Time Solutions, AG <www.elinos.com>
+ * Pavel Bartusek <pba@sysgo.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+/*
+ * Reiserfs support
+ */
+#include <common.h>
+
+#if (CONFIG_COMMANDS & CFG_CMD_REISER)
+#include <config.h>
+#include <command.h>
+#include <image.h>
+#include <linux/ctype.h>
+#include <asm/byteorder.h>
+#include <reiserfs.h>
+
+#ifndef CONFIG_DOS_PARTITION
+#error DOS partition support must be selected
+#endif
+
+/* #define	REISER_DEBUG */
+
+#ifdef	REISER_DEBUG
+#define	PRINTF(fmt,args...)	printf (fmt ,##args)
+#else
+#define PRINTF(fmt,args...)
+#endif
+
+static block_dev_desc_t *get_dev (char* ifname, int dev)
+{
+#if (CONFIG_COMMANDS & CFG_CMD_IDE)
+	if (strncmp(ifname,"ide",3)==0) {
+		extern block_dev_desc_t * ide_get_dev(int dev);
+		return((dev >= CFG_IDE_MAXDEVICE) ? NULL : ide_get_dev(dev));
+	}
+#endif
+#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
+	if (strncmp(ifname,"scsi",4)==0) {
+		extern block_dev_desc_t * scsi_get_dev(int dev);
+		return((dev >= CFG_SCSI_MAXDEVICE) ? NULL : scsi_get_dev(dev));
+	}
+#endif
+#if ((CONFIG_COMMANDS & CFG_CMD_USB) && defined(CONFIG_USB_STORAGE))
+	if (strncmp(ifname,"usb",3)==0) {
+		extern block_dev_desc_t * usb_stor_get_dev(int dev);
+		return((dev >= USB_MAX_STOR_DEV) ? NULL : usb_stor_get_dev(dev));
+	}
+#endif
+#if defined(CONFIG_MMC)
+	if (strncmp(ifname,"mmc",3)==0) {
+		extern block_dev_desc_t *  mmc_get_dev(int dev);
+		return((dev >= 1) ? NULL : mmc_get_dev(dev));
+	}
+#endif
+#if defined(CONFIG_SYSTEMACE)
+	if (strcmp(ifname,"ace")==0) {
+		extern block_dev_desc_t *  systemace_get_dev(int dev);
+		return((dev >= 1) ? NULL : systemace_get_dev(dev));
+	}
+#endif
+	return NULL;
+}
+
+int do_reiserls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	char *filename = "/";
+	int dev=0;
+	int part=1;
+	char *ep;
+	block_dev_desc_t *dev_desc=NULL;
+	int part_length;
+
+	if (argc < 3) {
+		printf ("Usage:\n%s\n", cmdtp->usage);
+		return 1;
+	}
+	dev = (int)simple_strtoul (argv[2], &ep, 16);
+	dev_desc=get_dev(argv[1],dev);
+
+	if (dev_desc == NULL) {
+		printf ("\n** Block device %s %d not supported\n", argv[1], dev);
+		return 1;
+	}
+
+	if (*ep) {
+		if (*ep != ':') {
+			puts ("\n** Invalid boot device, use `dev[:part]' **\n");
+			return 1;
+		}
+		part = (int)simple_strtoul(++ep, NULL, 16);
+	}
+
+	if (argc == 4) {
+	    filename = argv[3];
+	}
+
+	PRINTF("Using device %s %d:%d, directory: %s\n", argv[1], dev, part, filename);
+
+	if ((part_length = reiserfs_set_blk_dev(dev_desc, part)) == 0) {
+		printf ("** Bad partition - %s %d:%d **\n",  argv[1], dev, part);
+		return 1;
+	}
+
+	if (!reiserfs_mount(part_length)) {
+		printf ("** Bad Reisefs partition or disk - %s %d:%d **\n",  argv[1], dev, part);
+		return 1;
+	}
+
+	if (reiserfs_ls (filename)) {
+		printf ("** Error reiserfs_ls() **\n");
+		return 1;
+	};
+
+	return 0;
+}
+
+U_BOOT_CMD(
+	reiserls,	4,	1,	do_reiserls,
+	"reiserls- list files in a directory (default /)\n",
+	"<interface> <dev[:part]> [directory]\n"
+	"    - list files from 'dev' on 'interface' in a 'directory'\n"
+);
+
+/******************************************************************************
+ * Reiserfs boot command intepreter. Derived from diskboot
+ */
+int do_reiserload (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	char *filename = NULL;
+	char *ep;
+	int dev, part = 0;
+	ulong addr = 0, part_length, filelen;
+	disk_partition_t info;
+	block_dev_desc_t *dev_desc = NULL;
+	char buf [12];
+	unsigned long count;
+	char *addr_str;
+
+	switch (argc) {
+	case 3:
+		addr_str = getenv("loadaddr");
+		if (addr_str != NULL) {
+			addr = simple_strtoul (addr_str, NULL, 16);
+		} else {
+			addr = CFG_LOAD_ADDR;
+		}
+		filename = getenv ("bootfile");
+		count = 0;
+		break;
+	case 4:
+		addr = simple_strtoul (argv[3], NULL, 16);
+		filename = getenv ("bootfile");
+		count = 0;
+		break;
+	case 5:
+		addr = simple_strtoul (argv[3], NULL, 16);
+		filename = argv[4];
+		count = 0;
+		break;
+	case 6:
+		addr = simple_strtoul (argv[3], NULL, 16);
+		filename = argv[4];
+		count = simple_strtoul (argv[5], NULL, 16);
+		break;
+
+	default:
+		printf ("Usage:\n%s\n", cmdtp->usage);
+		return 1;
+	}
+
+	if (!filename) {
+		puts ("\n** No boot file defined **\n");
+		return 1;
+	}
+
+	dev = (int)simple_strtoul (argv[2], &ep, 16);
+	dev_desc=get_dev(argv[1],dev);
+	if (dev_desc==NULL) {
+		printf ("\n** Block device %s %d not supported\n", argv[1], dev);
+		return 1;
+	}
+	if (*ep) {
+		if (*ep != ':') {
+			puts ("\n** Invalid boot device, use `dev[:part]' **\n");
+			return 1;
+		}
+		part = (int)simple_strtoul(++ep, NULL, 16);
+	}
+
+	PRINTF("Using device %s%d, partition %d\n", argv[1], dev, part);
+
+	if (part != 0) {
+		if (get_partition_info (&dev_desc[dev], part, &info)) {
+			printf ("** Bad partition %d **\n", part);
+			return 1;
+		}
+
+		if (strncmp(info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) {
+			printf ("\n** Invalid partition type \"%.32s\""
+				" (expect \"" BOOT_PART_TYPE "\")\n",
+				info.type);
+			return 1;
+		}
+		PRINTF ("\nLoading from block device %s device %d, partition %d: "
+			"Name: %.32s  Type: %.32s  File:%s\n",
+			argv[1], dev, part, info.name, info.type, filename);
+	} else {
+		PRINTF ("\nLoading from block device %s device %d, File:%s\n",
+			argv[1], dev, filename);
+	}
+
+
+	if ((part_length = reiserfs_set_blk_dev(dev_desc, part)) == 0) {
+		printf ("** Bad partition - %s %d:%d **\n",  argv[1], dev, part);
+		return 1;
+	}
+
+	if (!reiserfs_mount(part_length)) {
+		printf ("** Bad Reisefs partition or disk - %s %d:%d **\n",  argv[1], dev, part);
+		return 1;
+	}
+
+	filelen = reiserfs_open(filename);
+	if (filelen < 0) {
+		printf("** File not found %s\n", filename);
+		return 1;
+	}
+	if ((count < filelen) && (count != 0)) {
+	    filelen = count;
+	}
+
+	if (reiserfs_read((char *)addr, filelen) != filelen) {
+		printf("\n** Unable to read \"%s\" from %s %d:%d **\n", filename, argv[1], dev, part);
+		return 1;
+	}
+
+	/* Loading ok, update default load address */
+	load_addr = addr;
+
+	printf ("\n%ld bytes read\n", filelen);
+	sprintf(buf, "%lX", filelen);
+	setenv("filesize", buf);
+
+	return filelen;
+}
+
+U_BOOT_CMD(
+	reiserload,	6,	0,	do_reiserload,
+	"reiserload- load binary file from a Reiser filesystem\n",
+	"<interface> <dev[:part]> [addr] [filename] [bytes]\n"
+	"    - load binary file 'filename' from 'dev' on 'interface'\n"
+	"      to address 'addr' from dos filesystem\n"
+);
+
+#endif	/* CONFIG_COMMANDS & CFG_CMD_REISER */
--- a/common/console.c
+++ b/common/console.c
@@ -456,23 +456,23 @@ int console_init_r (void)

 #ifndef CFG_CONSOLE_INFO_QUIET
 	/* Print information */
-	printf ("In:    ");
+	puts ("In:    ");
 	if (stdio_devices[stdin] == NULL) {
-		printf ("No input devices available!\n");
+		puts ("No input devices available!\n");
 	} else {
 		printf ("%s\n", stdio_devices[stdin]->name);
 	}

-	printf ("Out:   ");
+	puts ("Out:   ");
 	if (stdio_devices[stdout] == NULL) {
-		printf ("No output devices available!\n");
+		puts ("No output devices available!\n");
 	} else {
 		printf ("%s\n", stdio_devices[stdout]->name);
 	}

-	printf ("Err:   ");
+	puts ("Err:   ");
 	if (stdio_devices[stderr] == NULL) {
-		printf ("No error devices available!\n");
+		puts ("No error devices available!\n");
 	} else {
 		printf ("%s\n", stdio_devices[stderr]->name);
 	}
@@ -546,23 +546,23 @@ int console_init_r (void)

 #ifndef CFG_CONSOLE_INFO_QUIET
 	/* Print information */
-	printf ("In:    ");
+	puts ("In:    ");
 	if (stdio_devices[stdin] == NULL) {
-		printf ("No input devices available!\n");
+		puts ("No input devices available!\n");
 	} else {
 		printf ("%s\n", stdio_devices[stdin]->name);
 	}

-	printf ("Out:   ");
+	puts ("Out:   ");
 	if (stdio_devices[stdout] == NULL) {
-		printf ("No output devices available!\n");
+		puts ("No output devices available!\n");
 	} else {
 		printf ("%s\n", stdio_devices[stdout]->name);
 	}

-	printf ("Err:   ");
+	puts ("Err:   ");
 	if (stdio_devices[stderr] == NULL) {
-		printf ("No error devices available!\n");
+		puts ("No error devices available!\n");
 	} else {
 		printf ("%s\n", stdio_devices[stderr]->name);
 	}
--- a/common/main.c
+++ b/common/main.c
@@ -189,7 +189,7 @@ static __inline__ int abortboot(int bootdelay)
 	}
 #  if DEBUG_BOOTKEYS
 	if (!abort)
-		printf("key timeout\n");
+		puts ("key timeout\n");
 #  endif

 #ifdef CONFIG_SILENT_CONSOLE
@@ -246,7 +246,7 @@ static __inline__ int abortboot(int bootdelay)
 	if (bootdelay >= 0) {
 		if (tstc()) {	/* we got a key press	*/
 			(void) getc();  /* consume input	*/
-			printf ("\b\b\b 0");
+			puts ("\b\b\b 0");
 			abort = 1; 	/* don't auto boot	*/
 		}
 	}
@@ -473,7 +473,7 @@ void main_loop (void)
 		else if (len == -2) {
 			/* -2 means timed out, retry autoboot
 			 */
-			printf("\nTimed out waiting for command\n");
+			puts ("\nTimed out waiting for command\n");
 # ifdef CONFIG_RESET_TO_RETRY
 			/* Reinit board to run initialization code again */
 			do_reset (NULL, 0, 0, NULL);
@@ -484,7 +484,7 @@ void main_loop (void)
 #endif

 		if (len == -1)
-			printf ("<INTERRUPT>\n");
+			puts ("<INTERRUPT>\n");
 		else
 			rc = run_command (lastcommand, flag);

@@ -574,6 +574,9 @@ int readline (const char *const prompt)
 			puts ("\r\n");
 			return (p - console_buffer);

+		case '\0':				/* nul			*/
+			continue;
+
 		case 0x03:				/* ^C - break		*/
 			console_buffer[0] = '\0';	/* discard input */
 			return (-1);
@@ -925,7 +928,7 @@ int run_command (const char *cmd, int flag)
 			printf ("[%s]\n", finaltoken);
 #endif
 			if (flag & CMD_FLAG_BOOTD) {
-				printf ("'bootd' recursion detected\n");
+				puts ("'bootd' recursion detected\n");
 				rc = -1;
 				continue;
 			}
--- a/common/miiphybb.c
+++ b/common/miiphybb.c
@@ -134,7 +134,7 @@ int miiphy_read(unsigned char  addr,
  /* check the turnaround bit: the PHY should be driving it to zero */
  if(MDIO_READ != 0)
  {
-    /* printf("PHY didn't drive TA low\n"); */
+    /* puts ("PHY didn't drive TA low\n"); */
    for(j = 0; j < 32; j++)
    {
      MDC(0);
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -51,7 +51,7 @@ int miiphy_info (unsigned char addr,

 	if (miiphy_read (addr, PHY_PHYIDR2, &tmp) != 0) {
 #ifdef DEBUG
-		printf ("PHY ID register 2 read failed\n");
+		puts ("PHY ID register 2 read failed\n");
 #endif
 		return (-1);
 	}
@@ -67,7 +67,7 @@ int miiphy_info (unsigned char addr,

 	if (miiphy_read (addr, PHY_PHYIDR1, &tmp) != 0) {
 #ifdef DEBUG
-		printf ("PHY ID register 1 read failed\n");
+		puts ("PHY ID register 1 read failed\n");
 #endif
 		return (-1);
 	}
@@ -95,7 +95,7 @@ int miiphy_reset (unsigned char addr)

 	if (miiphy_write (addr, PHY_BMCR, 0x8000) != 0) {
 #ifdef DEBUG
-		printf ("PHY reset failed\n");
+		puts ("PHY reset failed\n");
 #endif
 		return (-1);
 	}
@@ -112,7 +112,7 @@ int miiphy_reset (unsigned char addr)
 	while (((reg & 0x8000) != 0) && (loop_cnt++ < 1000000)) {
 		if (miiphy_read (addr, PHY_BMCR, &reg) != 0) {
 #     ifdef DEBUG
-			printf ("PHY status read failed\n");
+			puts ("PHY status read failed\n");
 #     endif
 			return (-1);
 		}
@@ -120,7 +120,7 @@ int miiphy_reset (unsigned char addr)
 	if ((reg & 0x8000) == 0) {
 		return (0);
 	} else {
-		printf ("PHY reset timed out\n");
+		puts ("PHY reset timed out\n");
 		return (-1);
 	}
 	return (0);
@@ -135,6 +135,7 @@ int miiphy_speed (unsigned char addr)
 {
 	unsigned short reg;

+#if defined(CONFIG_PHY_GIGE)
 	if (miiphy_read (addr, PHY_1000BTSR, &reg)) {
 		printf ("PHY 1000BT Status read failed\n");
 	} else {
@@ -144,9 +145,10 @@ int miiphy_speed (unsigned char addr)
 			}
 		}
 	}
+#endif /* CONFIG_PHY_GIGE */

 	if (miiphy_read (addr, PHY_ANLPAR, &reg)) {
-		printf ("PHY speed1 read failed, assuming 10bT\n");
+		puts ("PHY speed1 read failed, assuming 10bT\n");
 		return (_10BASET);
 	}
 	if ((reg & PHY_ANLPAR_100) != 0) {
@@ -165,7 +167,7 @@ int miiphy_duplex (unsigned char addr)
 {
 	unsigned short reg;

-
+#if defined(CONFIG_PHY_GIGE)
 	if (miiphy_read (addr, PHY_1000BTSR, &reg)) {
 		printf ("PHY 1000BT Status read failed\n");
 	} else {
@@ -178,9 +180,10 @@ int miiphy_duplex (unsigned char addr)
 			}
 		}
 	}
+#endif /* CONFIG_PHY_GIGE */

 	if (miiphy_read (addr, PHY_ANLPAR, &reg)) {
-		printf ("PHY duplex read failed, assuming half duplex\n");
+		puts ("PHY duplex read failed, assuming half duplex\n");
 		return (HALF);
 	}

@@ -201,7 +204,7 @@ int miiphy_link (unsigned char addr)
 	unsigned short reg;

 	if (miiphy_read (addr, PHY_BMSR, &reg)) {
-		printf ("PHY_BMSR read failed, assuming no link\n");
+		puts ("PHY_BMSR read failed, assuming no link\n");
 		return (0);
 	}

--- a/cpu/arm920t/interrupts.c
+++ b/cpu/arm920t/interrupts.c
@@ -235,14 +235,13 @@ void set_timer (ulong t)
 void udelay (unsigned long usec)
 {
 	ulong tmo;
+	ulong start = get_timer(0);

 	tmo = usec / 1000;
 	tmo *= (timer_load_val * 100);
 	tmo /= 1000;

-	tmo += get_timer (0);
-
-	while (get_timer_masked () < tmo)
+	while ((ulong)(get_timer_masked () - start) < tmo)
 		/*NOP*/;
 }

--- a/cpu/arm926ejs/interrupts.c
+++ b/cpu/arm926ejs/interrupts.c
@@ -211,7 +211,6 @@ int interrupt_init (void)
 	*(volatile ulong *)(CFG_TIMERBASE + 0) = CFG_TIMER_RELOAD;	/* TimerLoad */
 	*(volatile ulong *)(CFG_TIMERBASE + 4) = CFG_TIMER_RELOAD;	/* TimerValue */
 	*(volatile ulong *)(CFG_TIMERBASE + 8) = 0x8C;
-	/* *(volatile ulong *)(CFG_TIMERBASE + 8) = CFG_TIMER_CTRL | 0x40;  Periodic */
 #endif	/* CONFIG_VERSATILE */

 	/* init the timestamp and lastdec value */
--- a/cpu/at91rm9200/interrupts.c
+++ b/cpu/at91rm9200/interrupts.c
@@ -41,111 +41,114 @@ extern void reset_cpu(ulong addr);
 #define TIMER_LOAD_VAL 0xffff

 /* macro to read the 16 bit timer */
-#define READ_TIMER (tmr->TC_CV)
+#define READ_TIMER (tmr->TC_CV & 0x0000ffff)
 AT91PS_TC tmr;

-
+#ifdef CONFIG_USE_IRQ
+#error There is no IRQ support for AT91RM9200 in U-Boot yet.
+#else
 void enable_interrupts (void)
 {
-    return;
+	return;
 }
 int disable_interrupts (void)
 {
-    return 0;
+	return 0;
+}
+#endif
+
+
+void bad_mode (void)
+{
+	panic ("Resetting CPU ...\n");
+	reset_cpu (0);
 }

-
-void bad_mode(void)
+void show_regs (struct pt_regs *regs)
 {
-    panic("Resetting CPU ...\n");
-    reset_cpu(0);
+	unsigned long flags;
+	const char *processor_modes[] = {
+	"USER_26",	"FIQ_26",	"IRQ_26",	"SVC_26",
+	"UK4_26",	"UK5_26",	"UK6_26",	"UK7_26",
+	"UK8_26",	"UK9_26",	"UK10_26",	"UK11_26",
+	"UK12_26",	"UK13_26",	"UK14_26",	"UK15_26",
+	"USER_32",	"FIQ_32",	"IRQ_32",	"SVC_32",
+	"UK4_32",	"UK5_32",	"UK6_32",	"ABT_32",
+	"UK8_32",	"UK9_32",	"UK10_32",	"UND_32",
+	"UK12_32",	"UK13_32",	"UK14_32",	"SYS_32",
+	};
+
+	flags = condition_codes (regs);
+
+	printf ("pc : [<%08lx>]    lr : [<%08lx>]\n"
+		"sp : %08lx  ip : %08lx  fp : %08lx\n",
+		instruction_pointer (regs),
+		regs->ARM_lr, regs->ARM_sp, regs->ARM_ip, regs->ARM_fp);
+	printf ("r10: %08lx  r9 : %08lx  r8 : %08lx\n",
+		regs->ARM_r10, regs->ARM_r9, regs->ARM_r8);
+	printf ("r7 : %08lx  r6 : %08lx  r5 : %08lx  r4 : %08lx\n",
+		regs->ARM_r7, regs->ARM_r6, regs->ARM_r5, regs->ARM_r4);
+	printf ("r3 : %08lx  r2 : %08lx  r1 : %08lx  r0 : %08lx\n",
+		regs->ARM_r3, regs->ARM_r2, regs->ARM_r1, regs->ARM_r0);
+	printf ("Flags: %c%c%c%c",
+		flags & CC_N_BIT ? 'N' : 'n',
+		flags & CC_Z_BIT ? 'Z' : 'z',
+		flags & CC_C_BIT ? 'C' : 'c',
+		flags & CC_V_BIT ? 'V' : 'v');
+	printf ("  IRQs %s  FIQs %s  Mode %s%s\n",
+		interrupts_enabled (regs) ? "on" : "off",
+		fast_interrupts_enabled (regs) ? "on" : "off",
+		processor_modes[processor_mode (regs)],
+		thumb_mode (regs) ? " (T)" : "");
 }

-void show_regs(struct pt_regs * regs)
+void do_undefined_instruction (struct pt_regs *pt_regs)
 {
-    unsigned long flags;
-const char *processor_modes[]=
-{ "USER_26", "FIQ_26" , "IRQ_26" , "SVC_26" , "UK4_26" , "UK5_26" , "UK6_26" , "UK7_26" ,
-  "UK8_26" , "UK9_26" , "UK10_26", "UK11_26", "UK12_26", "UK13_26", "UK14_26", "UK15_26",
-  "USER_32", "FIQ_32" , "IRQ_32" , "SVC_32" , "UK4_32" , "UK5_32" , "UK6_32" , "ABT_32" ,
-  "UK8_32" , "UK9_32" , "UK10_32", "UND_32" , "UK12_32", "UK13_32", "UK14_32", "SYS_32"
-};
-
-    flags = condition_codes(regs);
-
-    printf("pc : [<%08lx>]    lr : [<%08lx>]\n"
-	   "sp : %08lx  ip : %08lx  fp : %08lx\n",
-	   instruction_pointer(regs),
-	   regs->ARM_lr, regs->ARM_sp,
-	   regs->ARM_ip, regs->ARM_fp);
-    printf("r10: %08lx  r9 : %08lx  r8 : %08lx\n",
-	   regs->ARM_r10, regs->ARM_r9,
-	   regs->ARM_r8);
-    printf("r7 : %08lx  r6 : %08lx  r5 : %08lx  r4 : %08lx\n",
-	   regs->ARM_r7, regs->ARM_r6,
-	   regs->ARM_r5, regs->ARM_r4);
-    printf("r3 : %08lx  r2 : %08lx  r1 : %08lx  r0 : %08lx\n",
-	   regs->ARM_r3, regs->ARM_r2,
-	   regs->ARM_r1, regs->ARM_r0);
-    printf("Flags: %c%c%c%c",
-	   flags & CC_N_BIT ? 'N' : 'n',
-	   flags & CC_Z_BIT ? 'Z' : 'z',
-	   flags & CC_C_BIT ? 'C' : 'c',
-	   flags & CC_V_BIT ? 'V' : 'v');
-    printf("  IRQs %s  FIQs %s  Mode %s%s\n",
-	   interrupts_enabled(regs) ? "on" : "off",
-	   fast_interrupts_enabled(regs) ? "on" : "off",
-	   processor_modes[processor_mode(regs)],
-	   thumb_mode(regs) ? " (T)" : "");
+	printf ("undefined instruction\n");
+	show_regs (pt_regs);
+	bad_mode ();
 }

-void do_undefined_instruction(struct pt_regs *pt_regs)
+void do_software_interrupt (struct pt_regs *pt_regs)
 {
-    printf("undefined instruction\n");
-    show_regs(pt_regs);
-    bad_mode();
+	printf ("software interrupt\n");
+	show_regs (pt_regs);
+	bad_mode ();
 }

-void do_software_interrupt(struct pt_regs *pt_regs)
+void do_prefetch_abort (struct pt_regs *pt_regs)
 {
-    printf("software interrupt\n");
-    show_regs(pt_regs);
-    bad_mode();
+	printf ("prefetch abort\n");
+	show_regs (pt_regs);
+	bad_mode ();
 }

-void do_prefetch_abort(struct pt_regs *pt_regs)
+void do_data_abort (struct pt_regs *pt_regs)
 {
-    printf("prefetch abort\n");
-    show_regs(pt_regs);
-    bad_mode();
+	printf ("data abort\n");
+	show_regs (pt_regs);
+	bad_mode ();
 }

-void do_data_abort(struct pt_regs *pt_regs)
+void do_not_used (struct pt_regs *pt_regs)
 {
-    printf("data abort\n");
-    show_regs(pt_regs);
-    bad_mode();
+	printf ("not used\n");
+	show_regs (pt_regs);
+	bad_mode ();
 }

-void do_not_used(struct pt_regs *pt_regs)
+void do_fiq (struct pt_regs *pt_regs)
 {
-    printf("not used\n");
-    show_regs(pt_regs);
-    bad_mode();
+	printf ("fast interrupt request\n");
+	show_regs (pt_regs);
+	bad_mode ();
 }

-void do_fiq(struct pt_regs *pt_regs)
+void do_irq (struct pt_regs *pt_regs)
 {
-    printf("fast interrupt request\n");
-    show_regs(pt_regs);
-    bad_mode();
-}
-
-void do_irq(struct pt_regs *pt_regs)
-{
-    printf("interrupt request\n");
-    show_regs(pt_regs);
-    bad_mode();
+	printf ("interrupt request\n");
+	show_regs (pt_regs);
+	bad_mode ();
 }

 static ulong timestamp;
@@ -154,81 +157,103 @@ static ulong lastinc;
 int interrupt_init (void)
 {

-    tmr = AT91C_BASE_TC0;
+	tmr = AT91C_BASE_TC0;

-    /* enables TC1.0 clock */
-    *AT91C_PMC_PCER = 1 << AT91C_ID_TC0;  /* enable clock */
+	/* enables TC1.0 clock */
+	*AT91C_PMC_PCER = 1 << AT91C_ID_TC0;  /* enable clock */

-    *AT91C_TCB0_BCR = 0;
-    *AT91C_TCB0_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_NONE | AT91C_TCB_TC2XC2S_NONE;
-    tmr->TC_CCR = AT91C_TC_CLKDIS;
-    tmr->TC_CMR = AT91C_TC_TIMER_DIV1_CLOCK;  /* set to MCLK/2 */
+	*AT91C_TCB0_BCR = 0;
+	*AT91C_TCB0_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_NONE | AT91C_TCB_TC2XC2S_NONE;
+	tmr->TC_CCR = AT91C_TC_CLKDIS;
+	tmr->TC_CMR = AT91C_TC_TIMER_DIV1_CLOCK;  /* set to MCLK/2 */

-    tmr->TC_IDR = ~0ul;
-    tmr->TC_RC = TIMER_LOAD_VAL;
-    lastinc = TIMER_LOAD_VAL;
-    tmr->TC_CCR = AT91C_TC_SWTRG | AT91C_TC_CLKEN;
-    timestamp = 0;
-    return (0);
+	tmr->TC_IDR = ~0ul;
+	tmr->TC_RC = TIMER_LOAD_VAL;
+	lastinc = TIMER_LOAD_VAL;
+	tmr->TC_CCR = AT91C_TC_SWTRG | AT91C_TC_CLKEN;
+	timestamp = 0;
+
+	return (0);
 }

 /*
 * timer without interrupts
 */

-void reset_timer(void)
+void reset_timer (void)
 {
-    reset_timer_masked();
+	reset_timer_masked ();
 }

 ulong get_timer (ulong base)
 {
-    return get_timer_masked() - base;
+	return get_timer_masked () - base;
 }

 void set_timer (ulong t)
 {
-    timestamp = t;
+	timestamp = t;
 }

-void udelay(unsigned long usec)
+void udelay (unsigned long usec)
 {
-    udelay_masked(usec);
+	udelay_masked(usec);
 }

-void reset_timer_masked(void)
+void reset_timer_masked (void)
 {
-    /* reset time */
-    lastinc = READ_TIMER;
-    timestamp = 0;
+	/* reset time */
+	lastinc = READ_TIMER;
+	timestamp = 0;
 }

-ulong get_timer_masked(void)
+ulong get_timer_masked (void)
 {
-    ulong now = READ_TIMER;
-    if (now >= lastinc)
-    {
-	/* normal mode */
-	timestamp += now - lastinc;
-    } else {
-	/* we have an overflow ... */
-	timestamp += now + TIMER_LOAD_VAL - lastinc;
-    }
-    lastinc = now;
+	ulong now = READ_TIMER;

-    return timestamp;
+	if (now >= lastinc) {
+		/* normal mode */
+		timestamp += now - lastinc;
+	} else {
+		/* we have an overflow ... */
+		timestamp += now + TIMER_LOAD_VAL - lastinc;
+	}
+	lastinc = now;
+
+	return timestamp;
 }

-void udelay_masked(unsigned long usec)
+void udelay_masked (unsigned long usec)
 {
-    ulong tmo;
+	ulong tmo;

-    tmo = usec / 1000;
-    tmo *= CFG_HZ;
-    tmo /= 1000;
+	tmo = usec / 1000;
+	tmo *= CFG_HZ;
+	tmo /= 1000;

-    reset_timer_masked();
+	reset_timer_masked ();

-    while(get_timer_masked() < tmo);
-      /*NOP*/;
+	while (get_timer_masked () < tmo)
+		/*NOP*/;
+}
+
+/*
+ * This function is derived from PowerPC code (read timebase as long long).
+ * On ARM it just returns the timer value.
+ */
+unsigned long long get_ticks(void)
+{
+	return get_timer(0);
+}
+
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk (void)
+{
+	ulong tbclk;
+
+	tbclk = CFG_HZ;
+	return tbclk;
 }
--- a/cpu/at91rm9200/serial.c
+++ b/cpu/at91rm9200/serial.c
@@ -36,55 +36,54 @@
 /* ggi thunder */
 AT91PS_USART us = (AT91PS_USART) AT91C_BASE_DBGU;

-void serial_setbrg(void)
-  {
-  DECLARE_GLOBAL_DATA_PTR;
-  int baudrate;
+void serial_setbrg (void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	int baudrate;

-  if ((baudrate = gd->bd->bi_baudrate) <= 0)
-    baudrate = CONFIG_BAUDRATE;
-  us->US_BRGR = 33 /* AT91C_MASTER_CLOCK / baudrate / 16 */; /* hardcode so no __divsi3 */
-  }
+	if ((baudrate = gd->bd->bi_baudrate) <= 0)
+		baudrate = CONFIG_BAUDRATE;
+	us->US_BRGR = CFG_AT91C_BRGR_DIVISOR;	/* hardcode so no __divsi3 */
+}

-int serial_init(void)
-  {
-  /* make any port initializations specific to this port */
-  *AT91C_PIOA_PDR = AT91C_PA31_DTXD | AT91C_PA30_DRXD;  /* PA 31 & 30 */
-  *AT91C_PMC_PCER = 1 << AT91C_ID_SYS;  /* enable clock */
-  serial_setbrg();
+int serial_init (void)
+{
+	/* make any port initializations specific to this port */
+	*AT91C_PIOA_PDR = AT91C_PA31_DTXD | AT91C_PA30_DRXD;	/* PA 31 & 30 */
+	*AT91C_PMC_PCER = 1 << AT91C_ID_SYS;	/* enable clock */
+	serial_setbrg ();

-  us->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX;
-  us->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
-  us->US_MR = ( AT91C_US_CLKS_CLOCK | AT91C_US_CHRL_8_BITS | AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT );
-  us->US_IMR = ~0ul;
-  return (0);
-  }
+	us->US_CR = AT91C_US_RSTRX | AT91C_US_RSTTX;
+	us->US_CR = AT91C_US_RXEN | AT91C_US_TXEN;
+	us->US_MR =
+		(AT91C_US_CLKS_CLOCK | AT91C_US_CHRL_8_BITS |
+		 AT91C_US_PAR_NONE | AT91C_US_NBSTOP_1_BIT);
+	us->US_IMR = ~0ul;
+	return (0);
+}

-void serial_putc(const char c)
-  {
-  if (c == '\n')
-    serial_putc('\r');
-  while( (us->US_CSR & AT91C_US_TXRDY) == 0 )
-    ;
-  us->US_THR=c;
-  }
+void serial_putc (const char c)
+{
+	if (c == '\n')
+		serial_putc ('\r');
+	while ((us->US_CSR & AT91C_US_TXRDY) == 0);
+	us->US_THR = c;
+}

-void
-serial_puts (const char *s)
-  {
-  while (*s)
-    {
-    serial_putc (*s++);
-    }
-  }
+void serial_puts (const char *s)
+{
+	while (*s) {
+		serial_putc (*s++);
+	}
+}

-int serial_getc(void)
-  {
-  while( (us->US_CSR & AT91C_US_RXRDY) == 0 );
-  return us->US_RHR;
-  }
+int serial_getc (void)
+{
+	while ((us->US_CSR & AT91C_US_RXRDY) == 0);
+	return us->US_RHR;
+}

-int serial_tstc(void)
-  {
-  return ((us->US_CSR & AT91C_US_RXRDY) == AT91C_US_RXRDY);
-  }
+int serial_tstc (void)
+{
+	return ((us->US_CSR & AT91C_US_RXRDY) == AT91C_US_RXRDY);
+}
--- a/cpu/mpc5xxx/fec.c
+++ b/cpu/mpc5xxx/fec.c
@@ -830,12 +830,14 @@ int mpc5xxx_fec_initialize(bd_t * bis)
 	fec->eth = (ethernet_regs *)MPC5XXX_FEC;
 	fec->tbdBase = (FEC_TBD *)FEC_BD_BASE;
 	fec->rbdBase = (FEC_RBD *)(FEC_BD_BASE + FEC_TBD_NUM * sizeof(FEC_TBD));
-#if defined(CONFIG_ICECUBE) || defined(CONFIG_TOP5200)
-#  ifndef CONFIG_FEC_10MBIT
+#if defined(CONFIG_ICECUBE) || \
+    defined(CONFIG_PM520)   || \
+    defined(CONFIG_TOP5200)
+# ifndef CONFIG_FEC_10MBIT
 	fec->xcv_type = MII100;
-#  else
+# else
 	fec->xcv_type = MII10;
-#  endif
+# endif
 #else
 #error fec->xcv_type not initialized.
 #endif
--- a/cpu/mpc8260/bedbug_603e.c
+++ b/cpu/mpc8260/bedbug_603e.c
@@ -81,7 +81,7 @@ void bedbug603e_do_break (cmd_tbl_t *cmdtp, int flag, int argc,
  {
    if( bug_ctx.hw_debug_enabled == 0 )
    {
-      printf( "No breakpoints enabled\n" );
+      puts ( "No breakpoints enabled\n" );
      return;
    }

@@ -105,7 +105,7 @@ void bedbug603e_do_break (cmd_tbl_t *cmdtp, int flag, int argc,

      printf( "Breakpoint [%d]: ", which_bp );
      if( (addr & 0x00000002) == 0 )
-	printf( "NOT SET\n" );
+	puts ( "NOT SET\n" );
      else
 	disppc( (unsigned char *)(addr & 0xFFFFFFFC), 0, 1, bedbug_puts, F_RADHEX );
    }
@@ -183,7 +183,7 @@ int bedbug603e_set( int which_bp, unsigned long addr )

  if(( addr & 0x00000003 ) != 0 )
  {
-    printf( "Breakpoints must be on a 32 bit boundary\n" );
+    puts ( "Breakpoints must be on a 32 bit boundary\n" );
    return 0;
  }

@@ -191,7 +191,7 @@ int bedbug603e_set( int which_bp, unsigned long addr )
  if(( bug_ctx.find_empty ) && ( !which_bp ) &&
     ( which_bp = (*bug_ctx.find_empty)()) == 0 )
  {
-    printf( "All breakpoints in use\n" );
+    puts ( "All breakpoints in use\n" );
    return 0;
  }

--- a/cpu/mpc8260/cpu.c
+++ b/cpu/mpc8260/cpu.c
@@ -94,40 +94,40 @@ int checkcpu (void)

 	switch (m) {
 	case 0x0000:
-		printf ("0.2 2J24M");
+		puts ("0.2 2J24M");
 		break;
 	case 0x0010:
-		printf ("A.0 K22A");
+		puts ("A.0 K22A");
 		break;
 	case 0x0011:
-		printf ("A.1 1K22A-XC");
+		puts ("A.1 1K22A-XC");
 		break;
 	case 0x0001:
-		printf ("B.1 1K23A");
+		puts ("B.1 1K23A");
 		break;
 	case 0x0021:
-		printf ("B.2 2K23A-XC");
+		puts ("B.2 2K23A-XC");
 		break;
 	case 0x0023:
-		printf ("B.3 3K23A");
+		puts ("B.3 3K23A");
 		break;
 	case 0x0024:
-		printf ("C.2 6K23A");
+		puts ("C.2 6K23A");
 		break;
 	case 0x0060:
-		printf ("A.0(A) 2K25A");
+		puts ("A.0(A) 2K25A");
 		break;
 	case 0x0062:
-		printf ("B.1 4K25A");
+		puts ("B.1 4K25A");
 		break;
 	case 0x0064:
-		printf ("C.0 5K25A");
+		puts ("C.0 5K25A");
 		break;
 	case 0x0A00:
-		printf ("0.0 0K49M");
+		puts ("0.0 0K49M");
 		break;
 	case 0x0A01:
-		printf ("0.1 1K49M");
+		puts ("0.1 1K49M");
 		break;
 	default:
 		printf ("unknown [immr=0x%04x,k=0x%04x]", m, k);
--- a/cpu/mpc8260/ether_fcc.c
+++ b/cpu/mpc8260/ether_fcc.c
@@ -149,7 +149,7 @@ static int fec_send(struct eth_device* dev, volatile void *packet, int length)

    for(i=0; rtx.txbd[txIdx].cbd_sc & BD_ENET_TX_READY; i++) {
 	if (i >= TOUT_LOOP) {
-	    printf("fec: tx buffer not ready\n");
+	    puts ("fec: tx buffer not ready\n");
 	    goto out;
 	}
    }
@@ -161,7 +161,7 @@ static int fec_send(struct eth_device* dev, volatile void *packet, int length)

    for(i=0; rtx.txbd[txIdx].cbd_sc & BD_ENET_TX_READY; i++) {
 	if (i >= TOUT_LOOP) {
-	    printf("fec: tx error\n");
+	    puts ("fec: tx error\n");
 	    goto out;
 	}
    }
@@ -522,7 +522,7 @@ print_desc (elbt_prdesc descs[], int ndesc, uchar *bases[], int nbase)
 	for (i = 0; i < nbase; i++)
 		printf ("  Channel %d", i);

-	puts ("\n");
+	putc ('\n');

 	while (dp < edp) {

@@ -534,7 +534,7 @@ print_desc (elbt_prdesc descs[], int ndesc, uchar *bases[], int nbase)
 			printf (" %10u", val);
 		}

-		puts ("\n");
+		putc ('\n');

 		dp++;
 	}
@@ -1143,7 +1143,7 @@ eth_loopback_test (void)
 			printf ("\tFirst %d rx errs:", nerr);
 			for (i = 0; i < nerr; i++)
 				printf (" %04x", ecp->rxerrs[i]);
-			puts ("\n");
+			putc ('\n');
 		}

 		if ((nerr = ecp->ntxerr) > 0) {
@@ -1152,7 +1152,7 @@ eth_loopback_test (void)
 			printf ("\tFirst %d tx errs:", nerr);
 			for (i = 0; i < nerr; i++)
 				printf (" %04x", ecp->txerrs[i]);
-			puts ("\n");
+			putc ('\n');
 		}
 	}

--- a/cpu/mpc8260/ether_scc.c
+++ b/cpu/mpc8260/ether_scc.c
@@ -110,7 +110,7 @@ int eth_send(volatile void *packet, int length)

    for(i=0; rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY; i++) {
 	if (i >= TOUT_LOOP) {
-	    printf("scc: tx buffer not ready\n");
+	    puts ("scc: tx buffer not ready\n");
 	    goto out;
 	}
    }
@@ -122,7 +122,7 @@ int eth_send(volatile void *packet, int length)

    for(i=0; rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY; i++) {
 	if (i >= TOUT_LOOP) {
-	    printf("scc: tx error\n");
+	    puts ("scc: tx error\n");
 	    goto out;
 	}
    }
--- a/cpu/mpc8260/interrupts.c
+++ b/cpu/mpc8260/interrupts.c
@@ -262,8 +262,8 @@ do_irqinfo (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])

 	re_enable = disable_interrupts ();

-	printf ("\nInterrupt-Information:\n");
-	printf ("Nr  Routine   Arg       Count\n");
+	puts ("\nInterrupt-Information:\n"
+		"Nr  Routine   Arg       Count\n");

 	for (irq = 0; irq < 32; irq++)
 		if (irq_handlers[irq].handler != NULL)
--- a/cpu/mpc8260/speed.c
+++ b/cpu/mpc8260/speed.c
@@ -175,19 +175,19 @@ int prt_8260_clks (void)

 	cp = &corecnf_tab[corecnf];

-	printf (CPU_ID_STR " Clock Configuration\n - Bus-to-Core Mult ");
+	puts (CPU_ID_STR " Clock Configuration\n - Bus-to-Core Mult ");

 	switch (cp->b2c_mult) {
 	case _byp:
-		printf ("BYPASS");
+		puts ("BYPASS");
 		break;

 	case _off:
-		printf ("OFF");
+		puts ("OFF");
 		break;

 	case _unk:
-		printf ("UNKNOWN");
+		puts ("UNKNOWN");
 		break;

 	default:
@@ -207,8 +207,19 @@ int prt_8260_clks (void)
 	printf (" - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n",
 			gd->vco_out, gd->scc_clk, gd->brg_clk);

-	printf (" - cpu_clk %10ld, cpm_clk %10ld, bus_clk %10ld\n\n",
+	printf (" - cpu_clk %10ld, cpm_clk %10ld, bus_clk %10ld\n",
 			gd->cpu_clk, gd->cpm_clk, gd->bus_clk);
+
+	if (sccr & SCCR_PCI_MODE) {
+		uint pci_div;
+
+		pci_div = ( (sccr & SCCR_PCI_MODCK) ? 2 : 1) *
+			( ( (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT) + 1);
+
+		printf (" - pci_clk %10ld\n", (gd->cpm_clk * 2) / pci_div);
+	}
+	putc ('\n');
+
 	return (0);
 }

--- a/cpu/mpc8260/traps.c
+++ b/cpu/mpc8260/traps.c
@@ -58,19 +58,19 @@ print_backtrace(unsigned long *sp)
 	int cnt = 0;
 	unsigned long i;

-	printf("Call backtrace: ");
+	puts ("Call backtrace: ");
 	while (sp) {
 		if ((uint)sp > END_OF_MEM)
 			break;

 		i = sp[1];
 		if (cnt++ % 7 == 0)
-			printf("\n");
+			putc ('\n');
 		printf("%08lX ", i);
 		if (cnt > 32) break;
 		sp = (unsigned long *)*sp;
 	}
-	printf("\n");
+	putc ('\n');
 }

 void show_regs(struct pt_regs * regs)
@@ -85,7 +85,7 @@ void show_regs(struct pt_regs * regs)
 	       regs->msr&MSR_IR ? 1 : 0,
 	       regs->msr&MSR_DR ? 1 : 0);

-	printf("\n");
+	putc ('\n');
 	for (i = 0;  i < 32;  i++) {
 		if ((i % 8) == 0) {
 			printf("GPR%02d: ", i);
@@ -93,7 +93,7 @@ void show_regs(struct pt_regs * regs)

 		printf("%08lX ", regs->gpr[i]);
 		if ((i % 8) == 7) {
-			printf("\n");
+			putc ('\n');
 		}
 	}
 }
@@ -140,7 +140,7 @@ MachineCheckException(struct pt_regs *regs)
 	dump_pci();
 #endif
 	/* clear the error in the error status register */
-	if(immap->im_pci.pci_esr && cpu_to_le32(PCI_ERROR_PCI_NO_RSP)) {
+	if(immap->im_pci.pci_esr & cpu_to_le32(PCI_ERROR_PCI_NO_RSP)) {
 		immap->im_pci.pci_esr = cpu_to_le32(PCI_ERROR_PCI_NO_RSP);
 		return;
 	}
@@ -155,25 +155,25 @@ MachineCheckException(struct pt_regs *regs)
 		return;
 #endif

-	printf("Machine check in kernel mode.\n");
-	printf("Caused by (from msr): ");
+	puts ("Machine check in kernel mode.\n"
+		"Caused by (from msr): ");
 	printf("regs %p ",regs);
 	switch( regs->msr & 0x000F0000) {
 	case (0x80000000>>12):
-		printf("Machine check signal - probably due to mm fault\n"
+		puts ("Machine check signal - probably due to mm fault\n"
 			"with mmu off\n");
 		break;
 	case (0x80000000>>13):
-		printf("Transfer error ack signal\n");
+		puts ("Transfer error ack signal\n");
 		break;
 	case (0x80000000>>14):
-		printf("Data parity signal\n");
+		puts ("Data parity signal\n");
 		break;
 	case (0x80000000>>15):
-		printf("Address parity signal\n");
+		puts ("Address parity signal\n");
 		break;
 	default:
-		printf("Unknown values in msr\n");
+		puts ("Unknown values in msr\n");
 	}
 	show_regs(regs);
 	print_backtrace((unsigned long *)regs->gpr[1]);
--- a/cpu/mpc8xx/lcd.c
+++ b/cpu/mpc8xx/lcd.c
@@ -1057,7 +1057,7 @@ static void lcd_enable (void)
 #if defined(CONFIG_LWMON)
    {	uchar c = pic_read (0x60);
 #if defined(CONFIG_LCD) && defined(CONFIG_LWMON) && (CONFIG_POST & CFG_POST_SYSMON)
-	c |= 0x04;	/* Chip Enable LCD */
+	/* Enable LCD later in sysmon test, only if temperature is OK */
 #else
 	c |= 0x07;	/* Power on CCFL, Enable CCFL, Chip Enable LCD */
 #endif
--- a/cpu/pxa/i2c.c
+++ b/cpu/pxa/i2c.c
@@ -448,13 +448,17 @@ int i2c_write(uchar chip, uint addr, int alen, uchar *buffer, int len)

 uchar i2c_reg_read (uchar chip, uchar reg)
 {
+	char buf;
+
 	PRINTD(("i2c_reg_read(chip=0x%02x, reg=0x%02x)\n",chip,reg));
-	return 0;
+	i2c_read(chip, reg, 1, &buf, 1);
+	return (buf);
 }

 void  i2c_reg_write(uchar chip, uchar reg, uchar val)
 {
 	PRINTD(("i2c_reg_write(chip=0x%02x, reg=0x%02x, val=0x%02x)\n",chip,reg,val));
+	i2c_write(chip, reg, 1, &val, 1);
 }

 #endif	/* CONFIG_HARD_I2C */
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -42,7 +42,8 @@ OBJS	= 3c589.o 5701rls.o ali512x.o \
 	  serial.o serial_max3100.o serial_pl011.o serial_pl010.o \
 	  smc91111.o smiLynxEM.o status_led.o sym53c8xx.o \
 	  ti_pci1410a.o tigon3.o w83c553f.o omap1510_i2c.o \
-	  usbdcore.o usbdcore_ep0.o usbdcore_omap1510.o usbtty.o
+	  usbdcore.o usbdcore_ep0.o usbdcore_omap1510.o usbtty.o \
+	  videomodes.o

 all:	$(LIB)

--- a/drivers/cfi_flash.c
+++ b/drivers/cfi_flash.c
@@ -349,11 +349,11 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 	flash_sect_t sect;

 	if (info->flash_id != FLASH_MAN_CFI) {
-		printf ("Can't erase unknown flash type - aborted\n");
+		puts ("Can't erase unknown flash type - aborted\n");
 		return 1;
 	}
 	if ((s_first < 0) || (s_first > s_last)) {
-		printf ("- no sectors to erase\n");
+		puts ("- no sectors to erase\n");
 		return 1;
 	}

@@ -366,7 +366,7 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 	if (prot) {
 		printf ("- Warning: %d protected sectors will not be erased!\n", prot);
 	} else {
-		printf ("\n");
+		putc ('\n');
 	}


@@ -397,10 +397,10 @@ int flash_erase (flash_info_t * info, int s_first, int s_last)
 			    (info, sect, info->erase_blk_tout, "erase")) {
 				rcode = 1;
 			} else
-				printf (".");
+				putc ('.');
 		}
 	}
-	printf (" done\n");
+	puts (" done\n");
 	return rcode;
 }

@@ -411,7 +411,7 @@ void flash_print_info (flash_info_t * info)
 	int i;

 	if (info->flash_id != FLASH_MAN_CFI) {
-		printf ("missing or unknown FLASH type\n");
+		puts ("missing or unknown FLASH type\n");
 		return;
 	}

@@ -425,7 +425,7 @@ void flash_print_info (flash_info_t * info)
 		info->buffer_write_tout,
 		info->buffer_size);

-	printf ("  Sector Start Addresses:");
+	puts ("  Sector Start Addresses:");
 	for (i = 0; i < info->sector_count; ++i) {
 #ifdef CFG_FLASH_EMPTY_INFO
 		int k;
@@ -464,7 +464,7 @@ void flash_print_info (flash_info_t * info)
 			info->start[i], info->protect[i] ? " (RO)" : "	   ");
 #endif
 	}
-	printf ("\n");
+	putc ('\n');
 	return;
 }

@@ -682,19 +682,19 @@ static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 			printf ("Flash %s error at address %lx\n", prompt,
 				info->start[sector]);
 			if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
-				printf ("Command Sequence Error.\n");
+				puts ("Command Sequence Error.\n");
 			} else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
-				printf ("Block Erase Error.\n");
+				puts ("Block Erase Error.\n");
 				retcode = ERR_NOT_ERASED;
 			} else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
-				printf ("Locking Error\n");
+				puts ("Locking Error\n");
 			}
 			if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
-				printf ("Block locked.\n");
+				puts ("Block locked.\n");
 				retcode = ERR_PROTECTED;
 			}
 			if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
-				printf ("Vpp Low Error.\n");
+				puts ("Vpp Low Error.\n");
 		}
 		flash_write_cmd (info, sector, 0, FLASH_CMD_RESET);
 		break;
@@ -777,7 +777,7 @@ static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
 		*(uint *) cmdbuf = __swab32 (stmpi);
 		break;
 	default:
-		printf("WARNING: flash_make_cmd: unsuppported LittleEndian mode\n");
+		puts ("WARNING: flash_make_cmd: unsuppported LittleEndian mode\n");
 		break;
 	}
 #endif
--- a/drivers/ct69000.c
+++ b/drivers/ct69000.c
@@ -26,52 +26,6 @@
 *
 */

-/************************************************************************
-  Get Parameters for the video mode:
-  Parameters can be set via the variable "videomode" in the environment.
-  2 diferent ways are possible:
-  "videomode=301"   - 301 is a hexadecimal number describing the VESA
-		      mode. Following modes are implemented:
-
-		      Colors    640x480 800x600 1024x768 1152x864
-		     --------+-----------------------------------
-		      8 bits |  0x301   0x303    0x305    0x161
-		     15 bits |  0x310   0x313    0x316    0x162
-		     16 bits |  0x311   0x314    0x317    0x163
-		     24 bits |  0x312   0x315    0x318      ?
-		     --------+-----------------------------------
-  "videomode=bootargs"
-		   - the parameters are parsed from the bootargs.
-		      The format is "NAME:VALUE,NAME:VALUE" etc.
-		      Ex.:
-		      "bootargs=video=ctfb:x:800,y:600,depth:16,pclk:25000"
-		      Parameters not included in the list will be taken from
-		      the default mode, which is one of the following:
-		      mode:0  640x480x24
-		      mode:1  800x600x16
-		      mode:2  1024x768x8
-		      mode:3  960x720x24
-		      mode:4  1152x864x16
-		      if "mode" is not provided within the parameter list,
-		      mode:0 is assumed.
-		      Following parameters are supported:
-		      x       xres = visible resolution horizontal
-		      y       yres = visible resolution vertical
-		      pclk    pixelclocks in pico sec
-		      le      left_marging time from sync to picture in pixelclocks
-		      ri      right_marging time from picture to sync in pixelclocks
-		      up      upper_margin time from sync to picture
-		      lo      lower_margin
-		      hs      hsync_len length of horizontal sync
-		      vs      vsync_len length of vertical sync
-		      sync    see FB_SYNC_*
-		      vmode   see FB_VMODE_*
-		      depth   Color depth in bits per pixel
-		      All other parameters in the variable bootargs are ignored.
-		      It is also possible to set the parameters direct in the
-		      variable "videomode", or in another variable i.e.
-		      "myvideo" and setting the variable "videomode=myvideo"..
-****************************************************************************/

 #include <common.h>

@@ -79,6 +33,7 @@

 #include <pci.h>
 #include <video_fb.h>
+#include "videomodes.h"

 #ifdef CONFIG_VIDEO_CT69000

@@ -304,32 +259,6 @@ static CT_CFG_TABLE xreg[] = {
 *
 */

-/******************************************************************
- * Resolution Struct
- ******************************************************************/
-struct ctfb_res_modes {
-	int xres;		/* visible resolution           */
-	int yres;
-	/* Timing: All values in pixclocks, except pixclock (of course) */
-	int pixclock;		/* pixel clock in ps (pico seconds) */
-	int left_margin;	/* time from sync to picture    */
-	int right_margin;	/* time from picture to sync    */
-	int upper_margin;	/* time from sync to picture    */
-	int lower_margin;
-	int hsync_len;		/* length of horizontal sync    */
-	int vsync_len;		/* length of vertical sync      */
-	int sync;		/* see FB_SYNC_*                */
-	int vmode;		/* see FB_VMODE_*               */
-};
-
-/******************************************************************
- * Vesa Mode Struct
- ******************************************************************/
-struct ctfb_vesa_modes {
-	int vesanr;		/* Vesa number as in LILO (VESA Nr + 0x200} */
-	int resindex;		/* index to resolution struct */
-	int bits_per_pixel;	/* bpp */
-};
 /*******************************************************************
 * Chips struct
 *******************************************************************/
@@ -351,58 +280,6 @@ static const struct ctfb_chips_properties chips[] = {
 	{0, 0, 0, 0, 0, 0, 0, 0, 0}	/* Terminator */
 };

-/*************************************************
- Video Modes:
-Colours   640x400 640x480 800x600 1024x768 1152x864 1280x1024 1600x1200
--------+--------------------------------------------------------------
- 4 bits |    ?       ?     0x302      ?        ?        ?         ?
- 8 bits |  0x300   0x301   0x303    0x305    0x161    0x307     0x31C
-15 bits |    ?     0x310   0x313    0x316    0x162    0x319     0x31D
-16 bits |    ?     0x311   0x314    0x317    0x163    0x31A     0x31E
-24 bits |    ?     0x312   0x315    0x318      ?      0x31B     0x31F
-32 bits |    ?       ?       ?        ?      0x164      ?
-*/
-
-#define RES_MODE_640x480 	0
-#define RES_MODE_800x600 	1
-#define RES_MODE_1024x768 	2
-#define RES_MODE_960_720	3
-#define RES_MODE_1152x864 	4
-#define RES_MODES_COUNT		5
-
-#define VESA_MODES_COUNT 15
-
-static const struct ctfb_vesa_modes vesa_modes[VESA_MODES_COUNT] = {
-	{0x301, RES_MODE_640x480, 8},
-	{0x310, RES_MODE_640x480, 15},
-	{0x311, RES_MODE_640x480, 16},
-	{0x312, RES_MODE_640x480, 24},
-	{0x303, RES_MODE_800x600, 8},
-	{0x313, RES_MODE_800x600, 15},
-	{0x314, RES_MODE_800x600, 16},
-	{0x315, RES_MODE_800x600, 24},
-	{0x305, RES_MODE_1024x768, 8},
-	{0x316, RES_MODE_1024x768, 15},
-	{0x317, RES_MODE_1024x768, 16},
-	{0x318, RES_MODE_1024x768, 24},
-	{0x161, RES_MODE_1152x864, 8},
-	{0x162, RES_MODE_1152x864, 15},
-	{0x163, RES_MODE_1152x864, 16}
-};
-
-static const struct ctfb_res_modes res_mode_init[RES_MODES_COUNT] = {
-	/* x     y pixclk   le  ri  up  lo   hs vs  s  vmode */
-	{640, 480, 39721, 40, 24, 32, 11, 96, 2, 0,
-	 FB_VMODE_NONINTERLACED},
-	{800, 600, 27778, 64, 24, 22, 1, 72, 2, 0, FB_VMODE_NONINTERLACED},
-	{1024, 768, 15384, 168, 8, 29, 3, 144, 4, 0,
-	 FB_VMODE_NONINTERLACED},
-	{960, 720, 13100, 160, 40, 32, 8, 80, 4, 0,
-	 FB_VMODE_NONINTERLACED},
-	{1152, 864, 12004, 200, 64, 32, 16, 80, 4, 0,
-	 FB_VMODE_NONINTERLACED}
-};
-
 /*
 * The Graphic Device
 */
@@ -1079,108 +956,6 @@ SetDrawingEngine (int bits_per_pixel)
 	video_wait_bitblt (pGD->pciBase + BR04_o);
 }

-/************************************************************************
- * Get Parameters for the video mode:
- */
-/*********************************************************************
- * returns the length to the next seperator
- */
-static int
-video_get_param_len (char *start, char sep)
-{
-	int i = 0;
-	while ((*start != 0) && (*start != sep)) {
-		start++;
-		i++;
-	}
-	return i;
-}
-
-static int
-video_search_param (char *start, char *param)
-{
-	int len, totallen, i;
-	char *p = start;
-	len = strlen (param);
-	totallen = len + strlen (start);
-	for (i = 0; i < totallen; i++) {
-		if (strncmp (p++, param, len) == 0)
-			return (i);
-	}
-	return -1;
-}
-
-/***************************************************************
-* Get parameter via the environment as it is done for the
-* linux kernel i.e:
-* video=ctfb:x:800,xv:1280,y:600,yv:1024,depth:16,mode:0,pclk:25000,
-*       le:56,ri:48,up:26,lo:5,hs:152,vs:2,sync:0,vmode:0,accel:0
-*
-* penv is a pointer to the environment, containing the string, or the name of
-* another environment variable. It could even be the term "bootargs"
-*/
-
-#define GET_OPTION(name,var) 				\
-		if(strncmp(p,name,strlen(name))==0) { 	\
-			val_s=p+strlen(name); 		\
-			var=simple_strtoul(val_s, NULL, 10); \
-		}
-
-static int
-video_get_params (struct ctfb_res_modes *pPar, char *penv)
-{
-	char *p, *s, *val_s;
-	int i = 0, t;
-	int bpp;
-	int mode;
-	/* first search for the environment containing the real param string */
-	s = penv;
-	if ((p = getenv (s)) != NULL) {
-		s = p;
-	}
-	/* in case of the bootargs line, we have to start
-	 * after "video=ctfb:"
-	 */
-	i = video_search_param (s, "video=ctfb:");
-	if (i >= 0) {
-		s += i;
-		s += strlen ("video=ctfb:");
-	}
-	/* search for mode as a default value */
-	p = s;
-	t = 0;
-	mode = 0;		/* default */
-	while ((i = video_get_param_len (p, ',')) != 0) {
-		GET_OPTION ("mode:", mode)
-		    p += i;
-		if (*p != 0)
-			p++;	/* skip ',' */
-	}
-	if (mode >= RES_MODES_COUNT)
-		mode = 0;
-	*pPar = res_mode_init[mode];	/* copy default values */
-	bpp = 24 - ((mode % 3) * 8);
-	p = s;			/* restart */
-	while ((i = video_get_param_len (p, ',')) != 0) {
-		GET_OPTION ("x:", pPar->xres)
-		    GET_OPTION ("y:", pPar->yres)
-		    GET_OPTION ("le:", pPar->left_margin)
-		    GET_OPTION ("ri:", pPar->right_margin)
-		    GET_OPTION ("up:", pPar->upper_margin)
-		    GET_OPTION ("lo:", pPar->lower_margin)
-		    GET_OPTION ("hs:", pPar->hsync_len)
-		    GET_OPTION ("vs:", pPar->vsync_len)
-		    GET_OPTION ("sync:", pPar->sync)
-		    GET_OPTION ("vmode:", pPar->vmode)
-		    GET_OPTION ("pclk:", pPar->pixclock)
-		    GET_OPTION ("depth:", bpp)
-		    p += i;
-		if (*p != 0)
-			p++;	/* skip ',' */
-	}
-	return bpp;
-}
-
 /****************************************************************************
 * supported Video Chips
 */
--- a/drivers/smc91111.c
+++ b/drivers/smc91111.c
@@ -481,7 +481,13 @@ static int smc_send_packet (volatile void *packet, int packet_length)
 	int try = 0;
 	int time_out;
 	byte status;
+	byte saved_pnr;
+	word saved_ptr;

+	/* save PTR and PNR registers before manipulation */
+	SMC_SELECT_BANK (2);
+	saved_pnr = SMC_inb( PN_REG );
+	saved_ptr = SMC_inw( PTR_REG );

 	PRINTK3 ("%s:smc_hardware_send_packet\n", SMC_DEV_NAME);

@@ -559,6 +565,10 @@ again:
 	/* we have a packet address, so tell the card to use it */
 	SMC_outb (packet_no, PN_REG);

+	/* do not write new ptr value if Write data fifo not empty */
+	while ( saved_ptr & PTR_NOTEMPTY )
+		printf ("Write data fifo not empty!\n");
+
 	/* point to the beginning of the packet */
 	SMC_outw (PTR_AUTOINC, PTR_REG);

@@ -607,12 +617,15 @@ again:
 	SMC_outw (MC_ENQUEUE, MMU_CMD_REG);

 	/* poll for TX INT */
-	if (poll4int (IM_TX_INT, SMC_TX_TIMEOUT)) {
+	/* if (poll4int (IM_TX_INT, SMC_TX_TIMEOUT)) { */
+	/* poll for TX_EMPTY INT - autorelease enabled */
+	if (poll4int(IM_TX_EMPTY_INT, SMC_TX_TIMEOUT)) {
 		/* sending failed */
 		PRINTK2 ("%s: TX timeout, sending failed...\n", SMC_DEV_NAME);

 		/* release packet */
-		SMC_outw (MC_FREEPKT, MMU_CMD_REG);
+		/* no need to release, MMU does that now */
+		/* SMC_outw (MC_FREEPKT, MMU_CMD_REG); */

 		/* wait for MMU getting ready (low) */
 		while (SMC_inw (MMU_CMD_REG) & MC_BUSY) {
@@ -625,12 +638,14 @@ again:
 		return 0;
 	} else {
 		/* ack. int */
-		SMC_outb (IM_TX_INT, SMC91111_INT_REG);
+		SMC_outb (IM_TX_EMPTY_INT, SMC91111_INT_REG);
+		/* SMC_outb (IM_TX_INT, SMC91111_INT_REG); */
 		PRINTK2 ("%s: Sent packet of length %d \n", SMC_DEV_NAME,
 			 length);

 		/* release packet */
-		SMC_outw (MC_FREEPKT, MMU_CMD_REG);
+		/* no need to release, MMU does that now */
+		/* SMC_outw (MC_FREEPKT, MMU_CMD_REG); */

 		/* wait for MMU getting ready (low) */
 		while (SMC_inw (MMU_CMD_REG) & MC_BUSY) {
@@ -642,6 +657,10 @@ again:

 	}

+	/* restore previously saved registers */
+	SMC_outb( saved_pnr, PN_REG );
+	SMC_outw( saved_ptr, PTR_REG );
+
 	return length;
 }

@@ -730,8 +749,14 @@ static int smc_rcv()
 #ifdef USE_32_BIT
 	dword stat_len;
 #endif
+	byte saved_pnr;
+	word saved_ptr;

 	SMC_SELECT_BANK(2);
+	/* save PTR and PTR registers */
+	saved_pnr = SMC_inb( PN_REG );
+	saved_ptr = SMC_inw( PTR_REG );
+
 	packet_number = SMC_inw( RXFIFO_REG );

 	if ( packet_number & RXFIFO_REMPTY ) {
@@ -810,6 +835,10 @@ static int smc_rcv()
 	while ( SMC_inw( MMU_CMD_REG ) & MC_BUSY )
 		udelay(1); /* Wait until not busy */

+	/* restore saved registers */
+	SMC_outb( saved_pnr, PN_REG );
+	SMC_outw( saved_ptr, PTR_REG );
+
 	if (!is_error) {
 		/* Pass the packet up to the protocol layers. */
 		NetReceive(NetRxPackets[0], packet_length);
@@ -1252,6 +1281,11 @@ static void smc_phy_configure ()
 	/* Update our Auto-Neg Advertisement Register */
 	smc_write_phy_register (PHY_AD_REG, my_ad_caps);

+	/* Read the register back.  Without this, it appears that when */
+	/* auto-negotiation is restarted, sometimes it isn't ready and */
+	/* the link does not come up. */
+	smc_read_phy_register(PHY_AD_REG);
+
 	PRINTK2 ("%s:phy caps=%x\n", SMC_DEV_NAME, my_phy_caps);
 	PRINTK2 ("%s:phy advertised caps=%x\n", SMC_DEV_NAME, my_ad_caps);

--- a/drivers/smc91111.h
+++ b/drivers/smc91111.h
@@ -378,7 +378,7 @@ typedef unsigned long int 		dword;
 #define	CTL_EEPROM_SELECT 0x0004 /* Controls EEPROM reload & store */
 #define	CTL_RELOAD	0x0002 /* When set reads EEPROM into registers */
 #define	CTL_STORE	0x0001 /* When set stores registers into EEPROM */
-#define CTL_DEFAULT     (0x1210)
+#define CTL_DEFAULT     (0x1A10) /* Autorelease enabled*/

 /* MMU Command Register */
 /* BANK 2 */
@@ -423,6 +423,7 @@ typedef unsigned long int 		dword;
 #define	PTR_RCV		0x8000 /* 1=Receive area, 0=Transmit area */
 #define	PTR_AUTOINC 	0x4000 /* Auto increment the pointer on each access */
 #define PTR_READ	0x2000 /* When 1 the operation is a read */
+#define PTR_NOTEMPTY	0x0800 /* When 1 _do not_ write fifo DATA REG */


 /* Data Register */
--- a/drivers/smiLynxEM.c
+++ b/drivers/smiLynxEM.c
--- a/drivers/usbdcore_omap1510.c
+++ b/drivers/usbdcore_omap1510.c
@@ -40,6 +40,7 @@
 #include "usbdcore_ep0.h"


+#define UDC_INIT_MDELAY		     80 /* Device settle delay */
 #define UDC_MAX_ENDPOINTS	     31 /* Number of endpoints on this UDC */

 /* Some kind of debugging output... */
@@ -1087,6 +1088,11 @@ int udc_init (void)
 {
 	u16 udc_rev;
 	uchar value;
+	ulong gpio;
+	int i;
+
+	/* Let the device settle down before we start */
+	for (i = 0; i < UDC_INIT_MDELAY; i++) udelay(1000);

 	udc_device = NULL;

@@ -1127,6 +1133,24 @@ int udc_init (void)
 	i2c_read (0x32, 0x03, 1, &value, 1);
 	value |= 0x01;
 	i2c_write (0x32, 0x03, 1, &value, 1);
+
+	gpio = inl(GPIO_PIN_CONTROL_REG);
+	gpio |=  0x0002; /* A_IRDA_OFF */
+	gpio |=  0x0800; /* A_SWITCH   */
+	gpio |=  0x8000; /* A_USB_ON   */
+	outl (gpio, GPIO_PIN_CONTROL_REG);
+
+	gpio = inl(GPIO_DIR_CONTROL_REG);
+	gpio &= ~0x0002; /* A_IRDA_OFF */
+	gpio &= ~0x0800; /* A_SWITCH   */
+	gpio &= ~0x8000; /* A_USB_ON   */
+	outl (gpio, GPIO_DIR_CONTROL_REG);
+
+	gpio = inl(GPIO_DATA_OUTPUT_REG);
+	gpio |=  0x0002; /* A_IRDA_OFF */
+	gpio &= ~0x0800; /* A_SWITCH   */
+	gpio &= ~0x8000; /* A_USB_ON   */
+	outl (gpio, GPIO_DATA_OUTPUT_REG);
 #endif

 	/* The VBUS_MODE bit selects whether VBUS detection is done via
--- a/drivers/videomodes.c
+++ b/drivers/videomodes.c
@@ -0,0 +1,208 @@
+/*
+ * (C) Copyright 2004
+ * Pierre Aubert, Staubli Faverges , <p.aubert@staubli.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/************************************************************************
+  Get Parameters for the video mode:
+  The default video mode can be defined in CFG_DEFAULT_VIDEO_MODE.
+  If undefined, default video mode is set to 0x301
+  Parameters can be set via the variable "videomode" in the environment.
+  2 diferent ways are possible:
+  "videomode=301"   - 301 is a hexadecimal number describing the VESA
+		      mode. Following modes are implemented:
+
+		      Colors	640x480 800x600 1024x768 1152x864 1280x1024
+		     --------+---------------------------------------------
+		      8 bits |	0x301	0x303	 0x305	  0x161	    0x307
+		     15 bits |	0x310	0x313	 0x316	  0x162	    0x319
+		     16 bits |	0x311	0x314	 0x317	  0x163	    0x31A
+		     24 bits |	0x312	0x315	 0x318	    ?	    0x31B
+		     --------+---------------------------------------------
+  "videomode=bootargs"
+		   - the parameters are parsed from the bootargs.
+		      The format is "NAME:VALUE,NAME:VALUE" etc.
+		      Ex.:
+		      "bootargs=video=ctfb:x:800,y:600,depth:16,pclk:25000"
+		      Parameters not included in the list will be taken from
+		      the default mode, which is one of the following:
+		      mode:0  640x480x24
+		      mode:1  800x600x16
+		      mode:2  1024x768x8
+		      mode:3  960x720x24
+		      mode:4  1152x864x16
+		      mode:5  1280x1024x8
+
+		      if "mode" is not provided within the parameter list,
+		      mode:0 is assumed.
+		      Following parameters are supported:
+		      x	      xres = visible resolution horizontal
+		      y	      yres = visible resolution vertical
+		      pclk    pixelclocks in pico sec
+		      le      left_marging time from sync to picture in pixelclocks
+		      ri      right_marging time from picture to sync in pixelclocks
+		      up      upper_margin time from sync to picture
+		      lo      lower_margin
+		      hs      hsync_len length of horizontal sync
+		      vs      vsync_len length of vertical sync
+		      sync    see FB_SYNC_*
+		      vmode   see FB_VMODE_*
+		      depth   Color depth in bits per pixel
+		      All other parameters in the variable bootargs are ignored.
+		      It is also possible to set the parameters direct in the
+		      variable "videomode", or in another variable i.e.
+		      "myvideo" and setting the variable "videomode=myvideo"..
+****************************************************************************/
+
+#include <common.h>
+#include "videomodes.h"
+
+const struct ctfb_vesa_modes vesa_modes[VESA_MODES_COUNT] = {
+	{0x301, RES_MODE_640x480, 8},
+	{0x310, RES_MODE_640x480, 15},
+	{0x311, RES_MODE_640x480, 16},
+	{0x312, RES_MODE_640x480, 24},
+	{0x303, RES_MODE_800x600, 8},
+	{0x313, RES_MODE_800x600, 15},
+	{0x314, RES_MODE_800x600, 16},
+	{0x315, RES_MODE_800x600, 24},
+	{0x305, RES_MODE_1024x768, 8},
+	{0x316, RES_MODE_1024x768, 15},
+	{0x317, RES_MODE_1024x768, 16},
+	{0x318, RES_MODE_1024x768, 24},
+	{0x161, RES_MODE_1152x864, 8},
+	{0x162, RES_MODE_1152x864, 15},
+	{0x163, RES_MODE_1152x864, 16},
+	{0x307, RES_MODE_1280x1024, 8},
+	{0x319, RES_MODE_1280x1024, 15},
+	{0x31A, RES_MODE_1280x1024, 16},
+	{0x31B, RES_MODE_1280x1024, 24},
+};
+const struct ctfb_res_modes res_mode_init[RES_MODES_COUNT] = {
+	/* x	 y pixclk   le	ri  up	lo   hs vs  s  vmode */
+	{640, 480, 39721, 40, 24, 32, 11, 96, 2, 0, FB_VMODE_NONINTERLACED},
+	{800, 600, 27778, 64, 24, 22, 1, 72, 2, 0, FB_VMODE_NONINTERLACED},
+	{1024, 768, 15384, 168, 8, 29, 3, 144, 4, 0, FB_VMODE_NONINTERLACED},
+	{960, 720, 13100, 160, 40, 32, 8, 80, 4, 0, FB_VMODE_NONINTERLACED},
+	{1152, 864, 12004, 200, 64, 32, 16, 80, 4, 0, FB_VMODE_NONINTERLACED},
+	{1280, 1024, 9090, 200, 48, 26, 1, 184, 3, 0, FB_VMODE_NONINTERLACED},
+};
+
+/************************************************************************
+ * Get Parameters for the video mode:
+ */
+/*********************************************************************
+ * returns the length to the next seperator
+ */
+static int
+video_get_param_len (char *start, char sep)
+{
+	int i = 0;
+	while ((*start != 0) && (*start != sep)) {
+		start++;
+		i++;
+	}
+	return i;
+}
+
+static int
+video_search_param (char *start, char *param)
+{
+	int len, totallen, i;
+	char *p = start;
+	len = strlen (param);
+	totallen = len + strlen (start);
+	for (i = 0; i < totallen; i++) {
+		if (strncmp (p++, param, len) == 0)
+			return (i);
+	}
+	return -1;
+}
+
+/***************************************************************
+ * Get parameter via the environment as it is done for the
+ * linux kernel i.e:
+ * video=ctfb:x:800,xv:1280,y:600,yv:1024,depth:16,mode:0,pclk:25000,
+ *	 le:56,ri:48,up:26,lo:5,hs:152,vs:2,sync:0,vmode:0,accel:0
+ *
+ * penv is a pointer to the environment, containing the string, or the name of
+ * another environment variable. It could even be the term "bootargs"
+ */
+
+#define GET_OPTION(name,var)				\
+	if(strncmp(p,name,strlen(name))==0) {		\
+		val_s=p+strlen(name);			\
+		var=simple_strtoul(val_s, NULL, 10);	\
+	}
+
+int video_get_params (struct ctfb_res_modes *pPar, char *penv)
+{
+	char *p, *s, *val_s;
+	int i = 0, t;
+	int bpp;
+	int mode;
+	/* first search for the environment containing the real param string */
+	s = penv;
+	if ((p = getenv (s)) != NULL) {
+		s = p;
+	}
+	/* in case of the bootargs line, we have to start
+	 * after "video=ctfb:"
+	 */
+	i = video_search_param (s, "video=ctfb:");
+	if (i >= 0) {
+		s += i;
+		s += strlen ("video=ctfb:");
+	}
+	/* search for mode as a default value */
+	p = s;
+	t = 0;
+	mode = 0;		/* default */
+	while ((i = video_get_param_len (p, ',')) != 0) {
+		GET_OPTION ("mode:", mode)
+			p += i;
+		if (*p != 0)
+			p++;	/* skip ',' */
+	}
+	if (mode >= RES_MODES_COUNT)
+		mode = 0;
+	*pPar = res_mode_init[mode];	/* copy default values */
+	bpp = 24 - ((mode % 3) * 8);
+	p = s;			/* restart */
+	while ((i = video_get_param_len (p, ',')) != 0) {
+		GET_OPTION ("x:", pPar->xres)
+			GET_OPTION ("y:", pPar->yres)
+			GET_OPTION ("le:", pPar->left_margin)
+			GET_OPTION ("ri:", pPar->right_margin)
+			GET_OPTION ("up:", pPar->upper_margin)
+			GET_OPTION ("lo:", pPar->lower_margin)
+			GET_OPTION ("hs:", pPar->hsync_len)
+			GET_OPTION ("vs:", pPar->vsync_len)
+			GET_OPTION ("sync:", pPar->sync)
+			GET_OPTION ("vmode:", pPar->vmode)
+			GET_OPTION ("pclk:", pPar->pixclock)
+			GET_OPTION ("depth:", bpp)
+			p += i;
+		if (*p != 0)
+			p++;	/* skip ',' */
+	}
+	return bpp;
+}
--- a/drivers/videomodes.h
+++ b/drivers/videomodes.h
@@ -0,0 +1,88 @@
+/*
+ * (C) Copyright 2004
+ * Pierre Aubert, Staubli Faverges , <p.aubert@staubli.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+
+#ifndef CFG_DEFAULT_VIDEO_MODE
+#define CFG_DEFAULT_VIDEO_MODE	0x301
+#endif
+
+/* Some mode definitions */
+#define FB_SYNC_HOR_HIGH_ACT	1	/* horizontal sync high active	*/
+#define FB_SYNC_VERT_HIGH_ACT	2	/* vertical sync high active	*/
+#define FB_SYNC_EXT		4	/* external sync		*/
+#define FB_SYNC_COMP_HIGH_ACT	8	/* composite sync high active	*/
+#define FB_SYNC_BROADCAST	16	/* broadcast video timings	*/
+					/* vtotal = 144d/288n/576i => PAL  */
+					/* vtotal = 121d/242n/484i => NTSC */
+#define FB_SYNC_ON_GREEN	32	/* sync on green */
+#define FB_VMODE_NONINTERLACED	0	/* non interlaced */
+#define FB_VMODE_INTERLACED	1	/* interlaced	*/
+#define FB_VMODE_DOUBLE		2	/* double scan */
+#define FB_VMODE_MASK		255
+
+#define FB_VMODE_YWRAP		256	/* ywrap instead of panning	*/
+#define FB_VMODE_SMOOTH_XPAN	512	/* smooth xpan possible (internally used) */
+#define FB_VMODE_CONUPDATE	512	/* don't update x/yoffset	*/
+
+
+/******************************************************************
+ * Resolution Struct
+ ******************************************************************/
+struct ctfb_res_modes {
+	int xres;		/* visible resolution		*/
+	int yres;
+	/* Timing: All values in pixclocks, except pixclock (of course) */
+	int pixclock;		/* pixel clock in ps (pico seconds) */
+	int left_margin;	/* time from sync to picture	*/
+	int right_margin;	/* time from picture to sync	*/
+	int upper_margin;	/* time from sync to picture	*/
+	int lower_margin;
+	int hsync_len;		/* length of horizontal sync	*/
+	int vsync_len;		/* length of vertical sync	*/
+	int sync;		/* see FB_SYNC_*		*/
+	int vmode;		/* see FB_VMODE_*		*/
+};
+
+/******************************************************************
+ * Vesa Mode Struct
+ ******************************************************************/
+struct ctfb_vesa_modes {
+	int vesanr;		/* Vesa number as in LILO (VESA Nr + 0x200} */
+	int resindex;		/* index to resolution struct */
+	int bits_per_pixel;	/* bpp */
+};
+
+#define RES_MODE_640x480	0
+#define RES_MODE_800x600	1
+#define RES_MODE_1024x768	2
+#define RES_MODE_960_720	3
+#define RES_MODE_1152x864	4
+#define RES_MODE_1280x1024	5
+#define RES_MODES_COUNT		6
+
+#define VESA_MODES_COUNT 19
+
+extern const struct ctfb_vesa_modes vesa_modes[];
+extern const struct ctfb_res_modes res_mode_init[];
+
+int video_get_params (struct ctfb_res_modes *pPar, char *penv);
--- a/fs/Makefile
+++ b/fs/Makefile
@@ -22,7 +22,7 @@
 #
 #

-SUBDIRS	:= jffs2 cramfs fdos fat
+SUBDIRS	:= jffs2 cramfs fdos fat reiserfs

 .depend all:
 	@for dir in $(SUBDIRS) ; do \
--- a/fs/jffs2/jffs2_1pass.c
+++ b/fs/jffs2/jffs2_1pass.c
@@ -909,7 +909,7 @@ jffs2_1pass_build_lists(struct part_info * part)
 	pL = (struct b_lists *)part->jffs2_priv;
 	pL->partOffset = part->offset;
 	offset = 0;
-	printf("Scanning JFFS2 FS:   ");
+	puts ("Scanning JFFS2 FS:   ");

 	/* start at the beginning of the partition */
 	while (offset < max) {
@@ -930,7 +930,7 @@ jffs2_1pass_build_lists(struct part_info * part)
 				   dirent_crc((struct jffs2_raw_dirent *) node)  &&
 				   dirent_name_crc((struct jffs2_raw_dirent *) node)) {
 				if (! (counterN%100))
-					printf("\b\b.  ");
+					puts ("\b\b.  ");
 				if (insert_node(&pL->dir, (u32) part->offset +
 								offset) == NULL)
 					return 0;
@@ -1101,10 +1101,14 @@ jffs2_1pass_info(struct part_info * part)

 	jffs2_1pass_fill_info(pl, &info);
 	for (i = 0; i < JFFS2_NUM_COMPR; i++) {
-		printf("Compression: %s\n", compr_names[i]);
-		printf("\tfrag count: %d\n", info.compr_info[i].num_frags);
-		printf("\tcompressed sum: %d\n", info.compr_info[i].compr_sum);
-		printf("\tuncompressed sum: %d\n", info.compr_info[i].decompr_sum);
+		printf ("Compression: %s\n"
+			"\tfrag count: %d\n"
+			"\tcompressed sum: %d\n"
+			"\tuncompressed sum: %d\n",
+			compr_names[i],
+			info.compr_info[i].num_frags,
+			info.compr_info[i].compr_sum,
+			info.compr_info[i].decompr_sum);
 	}
 	return 1;
 }
--- a/fs/reiserfs/Makefile
+++ b/fs/reiserfs/Makefile
@@ -0,0 +1,48 @@
+#
+# (C) Copyright 2003
+# Pavel Bartusek, Sysgo Real-Time Solutions AG, pba@sysgo.de
+#
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB	= libreiserfs.a
+
+AOBJS	=
+COBJS	= reiserfs.o dev.o mode_string.o
+OBJS	= $(AOBJS) $(COBJS)
+
+#CPPFLAGS +=
+
+all:	$(LIB) $(AOBJS)
+
+$(LIB):	.depend $(OBJS)
+	$(AR) crv $@ $(OBJS)
+
+
+#########################################################################
+
+.depend:	Makefile $(AOBJS:.o=.S) $(COBJS:.o=.c)
+		$(CC) -M $(CFLAGS) $(AOBJS:.o=.S) $(COBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
--- a/fs/reiserfs/dev.c
+++ b/fs/reiserfs/dev.c
@@ -0,0 +1,123 @@
+/*
+ *  (C) Copyright 2003 - 2004
+ *  Sysgo AG, <www.elinos.com>, Pavel Bartusek <pba@sysgo.com>
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include <common.h>
+#if (CONFIG_COMMANDS & CFG_CMD_REISER)
+
+#include <config.h>
+#include <reiserfs.h>
+
+#include "reiserfs_private.h"
+
+static block_dev_desc_t *reiserfs_block_dev_desc;
+static disk_partition_t part_info;
+
+
+int reiserfs_set_blk_dev(block_dev_desc_t *rbdd, int part)
+{
+	reiserfs_block_dev_desc = rbdd;
+
+	if (part == 0) {
+ 		/* disk doesn't use partition table */
+		part_info.start = 0;
+		part_info.size = rbdd->lba;
+		part_info.blksz = rbdd->blksz;
+	} else {
+		if (get_partition_info (reiserfs_block_dev_desc, part, &part_info)) {
+			return 0;
+		}
+	}
+	return (part_info.size);
+}
+
+
+int reiserfs_devread (int sector, int byte_offset, int byte_len, char *buf)
+{
+	char sec_buf[SECTOR_SIZE];
+	unsigned block_len;
+/*
+	unsigned len = byte_len;
+	u8 *start = buf;
+*/
+	/*
+	*  Check partition boundaries
+	*/
+	if (sector < 0
+	    || ((sector + ((byte_offset + byte_len - 1) >> SECTOR_BITS))
+	    >= part_info.size)) {
+/*		errnum = ERR_OUTSIDE_PART; */
+		printf (" ** reiserfs_devread() read outside partition\n");
+		return 0;
+	}
+
+	/*
+	 *  Get the read to the beginning of a partition.
+	 */
+	sector += byte_offset >> SECTOR_BITS;
+	byte_offset &= SECTOR_SIZE - 1;
+
+#if defined(DEBUG)
+	printf (" <%d, %d, %d> ", sector, byte_offset, byte_len);
+#endif
+
+
+	if (reiserfs_block_dev_desc == NULL)
+		return 0;
+
+
+	if (byte_offset != 0) {
+		/* read first part which isn't aligned with start of sector */
+		if (reiserfs_block_dev_desc->block_read(reiserfs_block_dev_desc->dev,
+		    part_info.start+sector, 1, (unsigned long *)sec_buf) != 1) {
+			printf (" ** reiserfs_devread() read error\n");
+			return 0;
+		}
+		memcpy(buf, sec_buf+byte_offset, min(SECTOR_SIZE-byte_offset, byte_len));
+		buf+=min(SECTOR_SIZE-byte_offset, byte_len);
+		byte_len-=min(SECTOR_SIZE-byte_offset, byte_len);
+		sector++;
+	}
+
+	/* read sector aligned part */
+	block_len = byte_len & ~(SECTOR_SIZE-1);
+	if (reiserfs_block_dev_desc->block_read(reiserfs_block_dev_desc->dev,
+	    part_info.start+sector, block_len/SECTOR_SIZE, (unsigned long *)buf) !=
+	    block_len/SECTOR_SIZE) {
+		printf (" ** reiserfs_devread() read error - block\n");
+		return 0;
+	}
+	buf+=block_len;
+	byte_len-=block_len;
+	sector+= block_len/SECTOR_SIZE;
+
+	if ( byte_len != 0 ) {
+		/* read rest of data which are not in whole sector */
+		if (reiserfs_block_dev_desc->block_read(reiserfs_block_dev_desc->dev,
+		    part_info.start+sector, 1, (unsigned long *)sec_buf) != 1) {
+			printf (" ** reiserfs_devread() read error - last part\n");
+			return 0;
+		}
+		memcpy(buf, sec_buf, byte_len);
+	}
+
+	return 1;
+}
+
+#endif /* CFG_CMD_REISERFS */
--- a/fs/reiserfs/mode_string.c
+++ b/fs/reiserfs/mode_string.c
@@ -0,0 +1,142 @@
+/* vi: set sw=4 ts=4: */
+/*
+ * mode_string implementation for busybox
+ *
+ * Copyright (C) 2003  Manuel Novoa III  <mjn3@codepoet.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ *
+ */
+
+/* Aug 13, 2003
+ * Fix a bug reported by junkio@cox.net involving the mode_chars index.
+ */
+
+
+#include <common.h>
+#if (CONFIG_COMMANDS & CFG_CMD_REISER)
+#include <linux/stat.h>
+
+#if ( S_ISUID != 04000 ) || ( S_ISGID != 02000 ) || ( S_ISVTX != 01000 ) \
+ || ( S_IRUSR != 00400 ) || ( S_IWUSR != 00200 ) || ( S_IXUSR != 00100 ) \
+ || ( S_IRGRP != 00040 ) || ( S_IWGRP != 00020 ) || ( S_IXGRP != 00010 ) \
+ || ( S_IROTH != 00004 ) || ( S_IWOTH != 00002 ) || ( S_IXOTH != 00001 )
+#error permission bitflag value assumption(s) violated!
+#endif
+
+#if ( S_IFSOCK!= 0140000 ) || ( S_IFLNK != 0120000 ) \
+ || ( S_IFREG != 0100000 ) || ( S_IFBLK != 0060000 ) \
+ || ( S_IFDIR != 0040000 ) || ( S_IFCHR != 0020000 ) \
+ || ( S_IFIFO != 0010000 )
+#warning mode type bitflag value assumption(s) violated! falling back to larger version
+
+#if (S_IRWXU | S_IRWXG | S_IRWXO | S_ISUID | S_ISGID | S_ISVTX) == 07777
+#undef mode_t
+#define mode_t unsigned short
+#endif
+
+static const mode_t mode_flags[] = {
+	S_IRUSR, S_IWUSR, S_IXUSR, S_ISUID,
+	S_IRGRP, S_IWGRP, S_IXGRP, S_ISGID,
+	S_IROTH, S_IWOTH, S_IXOTH, S_ISVTX
+};
+
+/* The static const char arrays below are duplicated for the two cases
+ * because moving them ahead of the mode_flags declaration cause a text
+ * size increase with the gcc version I'm using. */
+
+/* The previous version used "0pcCd?bB-?l?s???".  However, the '0', 'C',
+ * and 'B' types don't appear to be available on linux.  So I removed them. */
+static const char type_chars[16] = "?pc?d?b?-?l?s???";
+/*                                  0123456789abcdef */
+static const char mode_chars[7] = "rwxSTst";
+
+const char *bb_mode_string(int mode)
+{
+	static char buf[12];
+	char *p = buf;
+
+	int i, j, k;
+
+	*p = type_chars[ (mode >> 12) & 0xf ];
+	i = 0;
+	do {
+		j = k = 0;
+		do {
+			*++p = '-';
+			if (mode & mode_flags[i+j]) {
+				*p = mode_chars[j];
+				k = j;
+			}
+		} while (++j < 3);
+		if (mode & mode_flags[i+j]) {
+			*p = mode_chars[3 + (k & 2) + ((i&8) >> 3)];
+		}
+		i += 4;
+	} while (i < 12);
+
+	/* Note: We don't bother with nul termination because bss initialization
+	 * should have taken care of that for us.  If the user scribbled in buf
+	 * memory, they deserve whatever happens.  But we'll at least assert. */
+	if (buf[10] != 0) return NULL;
+
+	return buf;
+}
+
+#else
+
+/* The previous version used "0pcCd?bB-?l?s???".  However, the '0', 'C',
+ * and 'B' types don't appear to be available on linux.  So I removed them. */
+static const char type_chars[16] = "?pc?d?b?-?l?s???";
+/*                                  0123456789abcdef */
+static const char mode_chars[7] = "rwxSTst";
+
+const char *bb_mode_string(int mode)
+{
+	static char buf[12];
+	char *p = buf;
+
+	int i, j, k, m;
+
+	*p = type_chars[ (mode >> 12) & 0xf ];
+	i = 0;
+	m = 0400;
+	do {
+		j = k = 0;
+		do {
+			*++p = '-';
+			if (mode & m) {
+				*p = mode_chars[j];
+				k = j;
+			}
+			m >>= 1;
+		} while (++j < 3);
+		++i;
+		if (mode & (010000 >> i)) {
+			*p = mode_chars[3 + (k & 2) + (i == 3)];
+		}
+	} while (i < 3);
+
+	/* Note: We don't bother with nul termination because bss initialization
+	 * should have taken care of that for us.  If the user scribbled in buf
+	 * memory, they deserve whatever happens.  But we'll at least assert. */
+	if (buf[10] != 0) return NULL;
+
+	return buf;
+}
+
+#endif
+
+#endif /* CFG_CMD_REISER */
--- a/fs/reiserfs/reiserfs.c
+++ b/fs/reiserfs/reiserfs.c
@@ -0,0 +1,986 @@
+/*
+ *  Copyright 2000-2002 by Hans Reiser, licensing governed by reiserfs/README
+ *
+ *  GRUB  --  GRand Unified Bootloader
+ *  Copyright (C) 2000, 2001  Free Software Foundation, Inc.
+ *
+ *  (C) Copyright 2003 - 2004
+ *  Sysgo AG, <www.elinos.com>, Pavel Bartusek <pba@sysgo.com>
+ *
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/* An implementation for the ReiserFS filesystem ported from GRUB.
+ * Some parts of this code (mainly the structures and defines) are
+ * from the original reiser fs code, as found in the linux kernel.
+ */
+
+#include <common.h>
+#if (CONFIG_COMMANDS & CFG_CMD_REISER)
+
+#include <malloc.h>
+#include <linux/ctype.h>
+#include <linux/time.h>
+#include <asm/byteorder.h>
+#include <reiserfs.h>
+
+#include "reiserfs_private.h"
+
+#undef REISERDEBUG
+
+/* Some parts of this code (mainly the structures and defines) are
+ * from the original reiser fs code, as found in the linux kernel.
+ */
+
+static char fsys_buf[FSYS_BUFLEN];
+static reiserfs_error_t errnum = ERR_NONE;
+static int print_possibilities;
+static unsigned int filepos, filemax;
+
+static int
+substring (const char *s1, const char *s2)
+{
+  while (*s1 == *s2)
+    {
+      /* The strings match exactly. */
+      if (! *(s1++))
+	return 0;
+      s2 ++;
+    }
+
+  /* S1 is a substring of S2. */
+  if (*s1 == 0)
+    return -1;
+
+  /* S1 isn't a substring. */
+  return 1;
+}
+
+static void sd_print_item (struct item_head * ih, char * item)
+{
+    char filetime[30];
+    time_t ttime;
+
+    if (stat_data_v1 (ih)) {
+      	struct stat_data_v1 * sd = (struct stat_data_v1 *)item;
+        ttime = sd_v1_mtime(sd);
+        ctime_r(&ttime, filetime);
+        printf ("%-10s %4hd %6d %6d %9d %24.24s",
+                 bb_mode_string(sd_v1_mode(sd)), sd_v1_nlink(sd),sd_v1_uid(sd), sd_v1_gid(sd),
+                 sd_v1_size(sd), filetime);
+    } else {
+	struct stat_data * sd = (struct stat_data *)item;
+        ttime = sd_v2_mtime(sd);
+        ctime_r(&ttime, filetime);
+        printf ("%-10s %4d %6d %6d %9d %24.24s",
+                 bb_mode_string(sd_v2_mode(sd)), sd_v2_nlink(sd),sd_v2_uid(sd),sd_v2_gid(sd),
+                 (__u32) sd_v2_size(sd), filetime);
+    }
+}
+
+static int
+journal_read (int block, int len, char *buffer)
+{
+  return reiserfs_devread ((INFO->journal_block + block) << INFO->blocksize_shift,
+	 	           0, len, buffer);
+}
+
+/* Read a block from ReiserFS file system, taking the journal into
+ * account.  If the block nr is in the journal, the block from the
+ * journal taken.
+ */
+static int
+block_read (unsigned int blockNr, int start, int len, char *buffer)
+{
+  int transactions = INFO->journal_transactions;
+  int desc_block = INFO->journal_first_desc;
+  int journal_mask = INFO->journal_block_count - 1;
+  int translatedNr = blockNr;
+  __u32 *journal_table = JOURNAL_START;
+  while (transactions-- > 0)
+    {
+      int i = 0;
+      int j_len;
+      if (__le32_to_cpu(*journal_table) != 0xffffffff)
+	{
+	  /* Search for the blockNr in cached journal */
+	  j_len = __le32_to_cpu(*journal_table++);
+	  while (i++ < j_len)
+	    {
+	      if (__le32_to_cpu(*journal_table++) == blockNr)
+		{
+		  journal_table += j_len - i;
+		  goto found;
+		}
+	    }
+	}
+      else
+	{
+	  /* This is the end of cached journal marker.  The remaining
+	   * transactions are still on disk.
+	   */
+	  struct reiserfs_journal_desc   desc;
+	  struct reiserfs_journal_commit commit;
+
+	  if (! journal_read (desc_block, sizeof (desc), (char *) &desc))
+	    return 0;
+
+	  j_len = __le32_to_cpu(desc.j_len);
+	  while (i < j_len && i < JOURNAL_TRANS_HALF)
+	    if (__le32_to_cpu(desc.j_realblock[i++]) == blockNr)
+	      goto found;
+
+	  if (j_len >= JOURNAL_TRANS_HALF)
+	    {
+	      int commit_block = (desc_block + 1 + j_len) & journal_mask;
+	      if (! journal_read (commit_block,
+				  sizeof (commit), (char *) &commit))
+		return 0;
+	      while (i < j_len)
+		if (__le32_to_cpu(commit.j_realblock[i++ - JOURNAL_TRANS_HALF]) == blockNr)
+		  goto found;
+	    }
+	}
+      goto not_found;
+
+    found:
+      translatedNr = INFO->journal_block + ((desc_block + i) & journal_mask);
+#ifdef REISERDEBUG
+      printf ("block_read: block %d is mapped to journal block %d.\n",
+	      blockNr, translatedNr - INFO->journal_block);
+#endif
+      /* We must continue the search, as this block may be overwritten
+       * in later transactions.
+       */
+    not_found:
+      desc_block = (desc_block + 2 + j_len) & journal_mask;
+    }
+  return reiserfs_devread (translatedNr << INFO->blocksize_shift, start, len, buffer);
+}
+
+/* Init the journal data structure.  We try to cache as much as
+ * possible in the JOURNAL_START-JOURNAL_END space, but if it is full
+ * we can still read the rest from the disk on demand.
+ *
+ * The first number of valid transactions and the descriptor block of the
+ * first valid transaction are held in INFO.  The transactions are all
+ * adjacent, but we must take care of the journal wrap around.
+ */
+static int
+journal_init (void)
+{
+  unsigned int block_count = INFO->journal_block_count;
+  unsigned int desc_block;
+  unsigned int commit_block;
+  unsigned int next_trans_id;
+  struct reiserfs_journal_header header;
+  struct reiserfs_journal_desc   desc;
+  struct reiserfs_journal_commit commit;
+  __u32 *journal_table = JOURNAL_START;
+
+  journal_read (block_count, sizeof (header), (char *) &header);
+  desc_block = __le32_to_cpu(header.j_first_unflushed_offset);
+  if (desc_block >= block_count)
+    return 0;
+
+  INFO->journal_first_desc = desc_block;
+  next_trans_id = __le32_to_cpu(header.j_last_flush_trans_id) + 1;
+
+#ifdef REISERDEBUG
+  printf ("journal_init: last flushed %d\n",
+	  __le32_to_cpu(header.j_last_flush_trans_id));
+#endif
+
+  while (1)
+    {
+      journal_read (desc_block, sizeof (desc), (char *) &desc);
+      if (substring (JOURNAL_DESC_MAGIC, desc.j_magic) > 0
+	  || __le32_to_cpu(desc.j_trans_id) != next_trans_id
+	  || __le32_to_cpu(desc.j_mount_id) != __le32_to_cpu(header.j_mount_id))
+	/* no more valid transactions */
+	break;
+
+      commit_block = (desc_block + __le32_to_cpu(desc.j_len) + 1) & (block_count - 1);
+      journal_read (commit_block, sizeof (commit), (char *) &commit);
+      if (__le32_to_cpu(desc.j_trans_id) != commit.j_trans_id
+	  || __le32_to_cpu(desc.j_len) != __le32_to_cpu(commit.j_len))
+	/* no more valid transactions */
+	break;
+
+#ifdef REISERDEBUG
+      printf ("Found valid transaction %d/%d at %d.\n",
+	      __le32_to_cpu(desc.j_trans_id), __le32_to_cpu(desc.j_mount_id), desc_block);
+#endif
+
+      next_trans_id++;
+      if (journal_table < JOURNAL_END)
+	{
+	  if ((journal_table + 1 + __le32_to_cpu(desc.j_len)) >= JOURNAL_END)
+	    {
+	      /* The table is almost full; mark the end of the cached
+	       * journal.*/
+	      *journal_table = __cpu_to_le32(0xffffffff);
+	      journal_table = JOURNAL_END;
+	    }
+	  else
+	    {
+	      unsigned int i;
+	      /* Cache the length and the realblock numbers in the table.
+	       * The block number of descriptor can easily be computed.
+	       * and need not to be stored here.
+	       */
+
+	      /* both are in the little endian format */
+	      *journal_table++ = desc.j_len;
+	      for (i = 0; i < __le32_to_cpu(desc.j_len) && i < JOURNAL_TRANS_HALF; i++)
+		{
+	      	  /* both are in the little endian format */
+		  *journal_table++ = desc.j_realblock[i];
+#ifdef REISERDEBUG
+		  printf ("block %d is in journal %d.\n",
+			  __le32_to_cpu(desc.j_realblock[i]), desc_block);
+#endif
+		}
+	      for (     ; i < __le32_to_cpu(desc.j_len); i++)
+		{
+		  /* both are in the little endian format */
+		  *journal_table++ = commit.j_realblock[i-JOURNAL_TRANS_HALF];
+#ifdef REISERDEBUG
+		  printf ("block %d is in journal %d.\n",
+			  __le32_to_cpu(commit.j_realblock[i-JOURNAL_TRANS_HALF]),
+			  desc_block);
+#endif
+		}
+	    }
+	}
+      desc_block = (commit_block + 1) & (block_count - 1);
+    }
+#ifdef REISERDEBUG
+  printf ("Transaction %d/%d at %d isn't valid.\n",
+	  __le32_to_cpu(desc.j_trans_id), __le32_to_cpu(desc.j_mount_id), desc_block);
+#endif
+
+  INFO->journal_transactions
+    = next_trans_id - __le32_to_cpu(header.j_last_flush_trans_id) - 1;
+  return errnum == 0;
+}
+
+/* check filesystem types and read superblock into memory buffer */
+int
+reiserfs_mount (unsigned part_length)
+{
+  struct reiserfs_super_block super;
+  int superblock = REISERFS_DISK_OFFSET_IN_BYTES >> SECTOR_BITS;
+
+  if (part_length < superblock + (sizeof (super) >> SECTOR_BITS)
+      || ! reiserfs_devread (superblock, 0, sizeof (struct reiserfs_super_block),
+		             (char *) &super)
+      || (substring (REISER3FS_SUPER_MAGIC_STRING, super.s_magic) > 0
+	  && substring (REISER2FS_SUPER_MAGIC_STRING, super.s_magic) > 0
+	  && substring (REISERFS_SUPER_MAGIC_STRING, super.s_magic) > 0)
+      || (/* check that this is not a copy inside the journal log */
+	  sb_journal_block(&super) * sb_blocksize(&super)
+	  <= REISERFS_DISK_OFFSET_IN_BYTES))
+    {
+      /* Try old super block position */
+      superblock = REISERFS_OLD_DISK_OFFSET_IN_BYTES >> SECTOR_BITS;
+      if (part_length < superblock + (sizeof (super) >> SECTOR_BITS)
+	  || ! reiserfs_devread (superblock, 0, sizeof (struct reiserfs_super_block),
+			         (char *) &super))
+	return 0;
+
+      if (substring (REISER2FS_SUPER_MAGIC_STRING, super.s_magic) > 0
+	  && substring (REISERFS_SUPER_MAGIC_STRING, super.s_magic) > 0)
+	{
+	  /* pre journaling super block ? */
+	  if (substring (REISERFS_SUPER_MAGIC_STRING,
+			 (char*) ((int) &super + 20)) > 0)
+	    return 0;
+
+	  set_sb_blocksize(&super, REISERFS_OLD_BLOCKSIZE);
+	  set_sb_journal_block(&super, 0);
+	  set_sb_version(&super, 0);
+	}
+    }
+
+  /* check the version number.  */
+  if (sb_version(&super) > REISERFS_MAX_SUPPORTED_VERSION)
+    return 0;
+
+  INFO->version = sb_version(&super);
+  INFO->blocksize = sb_blocksize(&super);
+  INFO->fullblocksize_shift = log2 (sb_blocksize(&super));
+  INFO->blocksize_shift = INFO->fullblocksize_shift - SECTOR_BITS;
+  INFO->cached_slots =
+    (FSYSREISER_CACHE_SIZE >> INFO->fullblocksize_shift) - 1;
+
+#ifdef REISERDEBUG
+  printf ("reiserfs_mount: version=%d, blocksize=%d\n",
+	  INFO->version, INFO->blocksize);
+#endif /* REISERDEBUG */
+
+  /* Clear node cache. */
+  memset (INFO->blocks, 0, sizeof (INFO->blocks));
+
+  if (sb_blocksize(&super) < FSYSREISER_MIN_BLOCKSIZE
+      || sb_blocksize(&super) > FSYSREISER_MAX_BLOCKSIZE
+      || (SECTOR_SIZE << INFO->blocksize_shift) != sb_blocksize(&super))
+    return 0;
+
+  /* Initialize journal code.  If something fails we end with zero
+   * journal_transactions, so we don't access the journal at all.
+   */
+  INFO->journal_transactions = 0;
+  if (sb_journal_block(&super) != 0 && super.s_journal_dev == 0)
+    {
+      INFO->journal_block = sb_journal_block(&super);
+      INFO->journal_block_count = sb_journal_size(&super);
+      if (is_power_of_two (INFO->journal_block_count))
+	journal_init ();
+
+      /* Read in super block again, maybe it is in the journal */
+      block_read (superblock >> INFO->blocksize_shift,
+		  0, sizeof (struct reiserfs_super_block), (char *) &super);
+    }
+
+  if (! block_read (sb_root_block(&super), 0, INFO->blocksize, (char*) ROOT))
+    return 0;
+
+  INFO->tree_depth = __le16_to_cpu(BLOCKHEAD (ROOT)->blk_level);
+
+#ifdef REISERDEBUG
+  printf ("root read_in: block=%d, depth=%d\n",
+	  sb_root_block(&super), INFO->tree_depth);
+#endif /* REISERDEBUG */
+
+  if (INFO->tree_depth >= MAX_HEIGHT)
+    return 0;
+  if (INFO->tree_depth == DISK_LEAF_NODE_LEVEL)
+    {
+      /* There is only one node in the whole filesystem,
+       * which is simultanously leaf and root */
+      memcpy (LEAF, ROOT, INFO->blocksize);
+    }
+  return 1;
+}
+
+/***************** TREE ACCESSING METHODS *****************************/
+
+/* I assume you are familiar with the ReiserFS tree, if not go to
+ * http://www.namesys.com/content_table.html
+ *
+ * My tree node cache is organized as following
+ *   0   ROOT node
+ *   1   LEAF node  (if the ROOT is also a LEAF it is copied here
+ *   2-n other nodes on current path from bottom to top.
+ *       if there is not enough space in the cache, the top most are
+ *       omitted.
+ *
+ * I have only two methods to find a key in the tree:
+ *   search_stat(dir_id, objectid) searches for the stat entry (always
+ *       the first entry) of an object.
+ *   next_key() gets the next key in tree order.
+ *
+ * This means, that I can only sequential reads of files are
+ * efficient, but this really doesn't hurt for grub.
+ */
+
+/* Read in the node at the current path and depth into the node cache.
+ * You must set INFO->blocks[depth] before.
+ */
+static char *
+read_tree_node (unsigned int blockNr, int depth)
+{
+  char* cache = CACHE(depth);
+  int num_cached = INFO->cached_slots;
+  if (depth < num_cached)
+    {
+      /* This is the cached part of the path.  Check if same block is
+       * needed.
+       */
+      if (blockNr == INFO->blocks[depth])
+	return cache;
+    }
+  else
+    cache = CACHE(num_cached);
+
+#ifdef REISERDEBUG
+  printf ("  next read_in: block=%d (depth=%d)\n",
+	  blockNr, depth);
+#endif /* REISERDEBUG */
+  if (! block_read (blockNr, 0, INFO->blocksize, cache))
+    return 0;
+  /* Make sure it has the right node level */
+  if (__le16_to_cpu(BLOCKHEAD (cache)->blk_level) != depth)
+    {
+      errnum = ERR_FSYS_CORRUPT;
+      return 0;
+    }
+
+  INFO->blocks[depth] = blockNr;
+  return cache;
+}
+
+/* Get the next key, i.e. the key following the last retrieved key in
+ * tree order.  INFO->current_ih and
+ * INFO->current_info are adapted accordingly.  */
+static int
+next_key (void)
+{
+  int depth;
+  struct item_head *ih = INFO->current_ih + 1;
+  char *cache;
+
+#ifdef REISERDEBUG
+  printf ("next_key:\n  old ih: key %d:%d:%d:%d version:%d\n",
+	  __le32_to_cpu(INFO->current_ih->ih_key.k_dir_id),
+	  __le32_to_cpu(INFO->current_ih->ih_key.k_objectid),
+	  __le32_to_cpu(INFO->current_ih->ih_key.u.v1.k_offset),
+	  __le32_to_cpu(INFO->current_ih->ih_key.u.v1.k_uniqueness),
+	  __le16_to_cpu(INFO->current_ih->ih_version));
+#endif /* REISERDEBUG */
+
+  if (ih == &ITEMHEAD[__le16_to_cpu(BLOCKHEAD (LEAF)->blk_nr_item)])
+    {
+      depth = DISK_LEAF_NODE_LEVEL;
+      /* The last item, was the last in the leaf node.
+       * Read in the next block
+       */
+      do
+	{
+	  if (depth == INFO->tree_depth)
+	    {
+	      /* There are no more keys at all.
+	       * Return a dummy item with MAX_KEY */
+	      ih = (struct item_head *) &BLOCKHEAD (LEAF)->blk_right_delim_key;
+	      goto found;
+	    }
+	  depth++;
+#ifdef REISERDEBUG
+	  printf ("  depth=%d, i=%d\n", depth, INFO->next_key_nr[depth]);
+#endif /* REISERDEBUG */
+	}
+      while (INFO->next_key_nr[depth] == 0);
+
+      if (depth == INFO->tree_depth)
+	cache = ROOT;
+      else if (depth <= INFO->cached_slots)
+	cache = CACHE (depth);
+      else
+	{
+	  cache = read_tree_node (INFO->blocks[depth], depth);
+	  if (! cache)
+	    return 0;
+	}
+
+      do
+	{
+	  int nr_item = __le16_to_cpu(BLOCKHEAD (cache)->blk_nr_item);
+	  int key_nr = INFO->next_key_nr[depth]++;
+#ifdef REISERDEBUG
+	  printf ("  depth=%d, i=%d/%d\n", depth, key_nr, nr_item);
+#endif /* REISERDEBUG */
+	  if (key_nr == nr_item)
+	    /* This is the last item in this block, set the next_key_nr to 0 */
+	    INFO->next_key_nr[depth] = 0;
+
+	  cache = read_tree_node (dc_block_number(&(DC (cache)[key_nr])), --depth);
+	  if (! cache)
+	    return 0;
+	}
+      while (depth > DISK_LEAF_NODE_LEVEL);
+
+      ih = ITEMHEAD;
+    }
+ found:
+  INFO->current_ih   = ih;
+  INFO->current_item = &LEAF[__le16_to_cpu(ih->ih_item_location)];
+#ifdef REISERDEBUG
+  printf ("  new ih: key %d:%d:%d:%d version:%d\n",
+	  __le32_to_cpu(INFO->current_ih->ih_key.k_dir_id),
+	  __le32_to_cpu(INFO->current_ih->ih_key.k_objectid),
+	  __le32_to_cpu(INFO->current_ih->ih_key.u.v1.k_offset),
+	  __le32_to_cpu(INFO->current_ih->ih_key.u.v1.k_uniqueness),
+	  __le16_to_cpu(INFO->current_ih->ih_version));
+#endif /* REISERDEBUG */
+  return 1;
+}
+
+/* preconditions: reiserfs_mount already executed, therefore
+ *   INFO block is valid
+ * returns: 0 if error (errnum is set),
+ *   nonzero iff we were able to find the key successfully.
+ * postconditions: on a nonzero return, the current_ih and
+ *   current_item fields describe the key that equals the
+ *   searched key.  INFO->next_key contains the next key after
+ *   the searched key.
+ * side effects: messes around with the cache.
+ */
+static int
+search_stat (__u32 dir_id, __u32 objectid)
+{
+  char *cache;
+  int depth;
+  int nr_item;
+  int i;
+  struct item_head *ih;
+#ifdef REISERDEBUG
+  printf ("search_stat:\n  key %d:%d:0:0\n", dir_id, objectid);
+#endif /* REISERDEBUG */
+
+  depth = INFO->tree_depth;
+  cache = ROOT;
+
+  while (depth > DISK_LEAF_NODE_LEVEL)
+    {
+      struct key *key;
+      nr_item = __le16_to_cpu(BLOCKHEAD (cache)->blk_nr_item);
+
+      key = KEY (cache);
+
+      for (i = 0; i < nr_item; i++)
+	{
+	  if (__le32_to_cpu(key->k_dir_id) > dir_id
+	      || (__le32_to_cpu(key->k_dir_id) == dir_id
+		  && (__le32_to_cpu(key->k_objectid) > objectid
+		      || (__le32_to_cpu(key->k_objectid) == objectid
+			  && (__le32_to_cpu(key->u.v1.k_offset)
+			      | __le32_to_cpu(key->u.v1.k_uniqueness)) > 0))))
+	    break;
+	  key++;
+	}
+
+#ifdef REISERDEBUG
+      printf ("  depth=%d, i=%d/%d\n", depth, i, nr_item);
+#endif /* REISERDEBUG */
+      INFO->next_key_nr[depth] = (i == nr_item) ? 0 : i+1;
+      cache = read_tree_node (dc_block_number(&(DC (cache)[i])), --depth);
+      if (! cache)
+	return 0;
+    }
+
+  /* cache == LEAF */
+  nr_item = __le16_to_cpu(BLOCKHEAD (LEAF)->blk_nr_item);
+  ih = ITEMHEAD;
+  for (i = 0; i < nr_item; i++)
+    {
+      if (__le32_to_cpu(ih->ih_key.k_dir_id) == dir_id
+	  && __le32_to_cpu(ih->ih_key.k_objectid) == objectid
+	  && __le32_to_cpu(ih->ih_key.u.v1.k_offset) == 0
+	  && __le32_to_cpu(ih->ih_key.u.v1.k_uniqueness) == 0)
+	{
+#ifdef REISERDEBUG
+	  printf ("  depth=%d, i=%d/%d\n", depth, i, nr_item);
+#endif /* REISERDEBUG */
+	  INFO->current_ih   = ih;
+	  INFO->current_item = &LEAF[__le16_to_cpu(ih->ih_item_location)];
+	  return 1;
+	}
+      ih++;
+    }
+  errnum = ERR_FSYS_CORRUPT;
+  return 0;
+}
+
+int
+reiserfs_read (char *buf, unsigned len)
+{
+  unsigned int blocksize;
+  unsigned int offset;
+  unsigned int to_read;
+  char *prev_buf = buf;
+
+#ifdef REISERDEBUG
+  printf ("reiserfs_read: filepos=%d len=%d, offset=%Lx\n",
+	  filepos, len, (__u64) IH_KEY_OFFSET (INFO->current_ih) - 1);
+#endif /* REISERDEBUG */
+
+  if (__le32_to_cpu(INFO->current_ih->ih_key.k_objectid) != INFO->fileinfo.k_objectid
+      || IH_KEY_OFFSET (INFO->current_ih) > filepos + 1)
+    {
+      search_stat (INFO->fileinfo.k_dir_id, INFO->fileinfo.k_objectid);
+      goto get_next_key;
+    }
+
+  while (! errnum)
+    {
+      if (__le32_to_cpu(INFO->current_ih->ih_key.k_objectid) != INFO->fileinfo.k_objectid) {
+	break;
+      }
+
+      offset = filepos - IH_KEY_OFFSET (INFO->current_ih) + 1;
+      blocksize = __le16_to_cpu(INFO->current_ih->ih_item_len);
+
+#ifdef REISERDEBUG
+      printf ("  loop: filepos=%d len=%d, offset=%d blocksize=%d\n",
+	      filepos, len, offset, blocksize);
+#endif /* REISERDEBUG */
+
+      if (IH_KEY_ISTYPE(INFO->current_ih, TYPE_DIRECT)
+	  && offset < blocksize)
+	{
+#ifdef REISERDEBUG
+	  printf ("direct_read: offset=%d, blocksize=%d\n",
+		  offset, blocksize);
+#endif /* REISERDEBUG */
+	  to_read = blocksize - offset;
+	  if (to_read > len)
+	    to_read = len;
+
+	  memcpy (buf, INFO->current_item + offset, to_read);
+	  goto update_buf_len;
+	}
+      else if (IH_KEY_ISTYPE(INFO->current_ih, TYPE_INDIRECT))
+	{
+	  blocksize = (blocksize >> 2) << INFO->fullblocksize_shift;
+#ifdef REISERDEBUG
+	  printf ("indirect_read: offset=%d, blocksize=%d\n",
+		  offset, blocksize);
+#endif /* REISERDEBUG */
+
+	  while (offset < blocksize)
+	    {
+	      __u32 blocknr = __le32_to_cpu(((__u32 *) INFO->current_item)
+		[offset >> INFO->fullblocksize_shift]);
+	      int blk_offset = offset & (INFO->blocksize-1);
+	      to_read = INFO->blocksize - blk_offset;
+	      if (to_read > len)
+		to_read = len;
+
+	      /* Journal is only for meta data.  Data blocks can be read
+	       * directly without using block_read
+	       */
+	      reiserfs_devread (blocknr << INFO->blocksize_shift,
+	 	                blk_offset, to_read, buf);
+	    update_buf_len:
+	      len -= to_read;
+	      buf += to_read;
+	      offset += to_read;
+	      filepos += to_read;
+	      if (len == 0)
+		goto done;
+	    }
+	}
+    get_next_key:
+      next_key ();
+    }
+ done:
+  return errnum ? 0 : buf - prev_buf;
+}
+
+
+/* preconditions: reiserfs_mount already executed, therefore
+ *   INFO block is valid
+ * returns: 0 if error, nonzero iff we were able to find the file successfully
+ * postconditions: on a nonzero return, INFO->fileinfo contains the info
+ *   of the file we were trying to look up, filepos is 0 and filemax is
+ *   the size of the file.
+ */
+static int
+reiserfs_dir (char *dirname)
+{
+  struct reiserfs_de_head *de_head;
+  char *rest, ch;
+  __u32 dir_id, objectid, parent_dir_id = 0, parent_objectid = 0;
+#ifndef STAGE1_5
+  int do_possibilities = 0;
+#endif /* ! STAGE1_5 */
+  char linkbuf[PATH_MAX];	/* buffer for following symbolic links */
+  int link_count = 0;
+  int mode;
+
+  dir_id = REISERFS_ROOT_PARENT_OBJECTID;
+  objectid = REISERFS_ROOT_OBJECTID;
+
+  while (1)
+    {
+#ifdef REISERDEBUG
+      printf ("dirname=%s\n", dirname);
+#endif /* REISERDEBUG */
+
+      /* Search for the stat info first. */
+      if (! search_stat (dir_id, objectid))
+	return 0;
+
+#ifdef REISERDEBUG
+       printf ("sd_mode=%x sd_size=%d\n",
+               stat_data_v1(INFO->current_ih) ? sd_v1_mode((struct stat_data_v1 *) INFO->current_item) :
+                                                sd_v2_mode((struct stat_data *) (INFO->current_item)),
+               stat_data_v1(INFO->current_ih) ? sd_v1_size((struct stat_data_v1 *) INFO->current_item) :
+                                                sd_v2_size((struct stat_data *) INFO->current_item)
+              );
+
+#endif /* REISERDEBUG */
+      mode = stat_data_v1(INFO->current_ih) ?
+               sd_v1_mode((struct stat_data_v1 *) INFO->current_item) :
+	       sd_v2_mode((struct stat_data *) INFO->current_item);
+
+      /* If we've got a symbolic link, then chase it. */
+      if (S_ISLNK (mode))
+	{
+	  unsigned int len;
+	  if (++link_count > MAX_LINK_COUNT)
+	    {
+	      errnum = ERR_SYMLINK_LOOP;
+	      return 0;
+	    }
+
+	  /* Get the symlink size. */
+	  filemax = stat_data_v1(INFO->current_ih) ?
+	             sd_v1_size((struct stat_data_v1 *) INFO->current_item) :
+	             sd_v2_size((struct stat_data *) INFO->current_item);
+
+	  /* Find out how long our remaining name is. */
+	  len = 0;
+	  while (dirname[len] && !isspace (dirname[len]))
+	    len++;
+
+	  if (filemax + len > sizeof (linkbuf) - 1)
+	    {
+	      errnum = ERR_FILELENGTH;
+	      return 0;
+	    }
+
+	  /* Copy the remaining name to the end of the symlink data.
+	     Note that DIRNAME and LINKBUF may overlap! */
+	  memmove (linkbuf + filemax, dirname, len+1);
+
+	  INFO->fileinfo.k_dir_id = dir_id;
+	  INFO->fileinfo.k_objectid = objectid;
+  	  filepos = 0;
+	  if (! next_key ()
+	      || reiserfs_read (linkbuf, filemax) != filemax)
+	    {
+	      if (! errnum)
+		errnum = ERR_FSYS_CORRUPT;
+	      return 0;
+	    }
+
+#ifdef REISERDEBUG
+	  printf ("symlink=%s\n", linkbuf);
+#endif /* REISERDEBUG */
+
+	  dirname = linkbuf;
+	  if (*dirname == '/')
+	    {
+	      /* It's an absolute link, so look it up in root. */
+	      dir_id = REISERFS_ROOT_PARENT_OBJECTID;
+	      objectid = REISERFS_ROOT_OBJECTID;
+	    }
+	  else
+	    {
+	      /* Relative, so look it up in our parent directory. */
+	      dir_id   = parent_dir_id;
+	      objectid = parent_objectid;
+	    }
+
+	  /* Now lookup the new name. */
+	  continue;
+	}
+
+      /* if we have a real file (and we're not just printing possibilities),
+	 then this is where we want to exit */
+
+      if (! *dirname || isspace (*dirname))
+	{
+	  if (! S_ISREG (mode))
+	    {
+	      errnum = ERR_BAD_FILETYPE;
+	      return 0;
+	    }
+
+	  filepos = 0;
+	  filemax = stat_data_v1(INFO->current_ih) ?
+	              sd_v1_size((struct stat_data_v1 *) INFO->current_item) :
+	              sd_v2_size((struct stat_data *) INFO->current_item);
+#if 0
+	  /* If this is a new stat data and size is > 4GB set filemax to
+	   * maximum
+	   */
+	  if (__le16_to_cpu(INFO->current_ih->ih_version) == ITEM_VERSION_2
+	      && sd_size_hi((struct stat_data *) INFO->current_item) > 0)
+	    filemax = 0xffffffff;
+#endif
+	  INFO->fileinfo.k_dir_id = dir_id;
+	  INFO->fileinfo.k_objectid = objectid;
+	  return next_key ();
+	}
+
+      /* continue with the file/directory name interpretation */
+      while (*dirname == '/')
+	dirname++;
+      if (! S_ISDIR (mode))
+	{
+	  errnum = ERR_BAD_FILETYPE;
+	  return 0;
+	}
+      for (rest = dirname; (ch = *rest) && ! isspace (ch) && ch != '/'; rest++);
+      *rest = 0;
+
+# ifndef STAGE1_5
+      if (print_possibilities && ch != '/')
+	do_possibilities = 1;
+# endif /* ! STAGE1_5 */
+
+      while (1)
+	{
+	  char *name_end;
+	  int num_entries;
+
+	  if (! next_key ())
+	    return 0;
+#ifdef REISERDEBUG
+	  printf ("ih: key %d:%d:%d:%d version:%d\n",
+		  __le32_to_cpu(INFO->current_ih->ih_key.k_dir_id),
+		  __le32_to_cpu(INFO->current_ih->ih_key.k_objectid),
+		  __le32_to_cpu(INFO->current_ih->ih_key.u.v1.k_offset),
+		  __le32_to_cpu(INFO->current_ih->ih_key.u.v1.k_uniqueness),
+		  __le16_to_cpu(INFO->current_ih->ih_version));
+#endif /* REISERDEBUG */
+
+	  if (__le32_to_cpu(INFO->current_ih->ih_key.k_objectid) != objectid)
+	    break;
+
+	  name_end = INFO->current_item + __le16_to_cpu(INFO->current_ih->ih_item_len);
+	  de_head = (struct reiserfs_de_head *) INFO->current_item;
+	  num_entries = __le16_to_cpu(INFO->current_ih->u.ih_entry_count);
+	  while (num_entries > 0)
+	    {
+	      char *filename = INFO->current_item + deh_location(de_head);
+	      char  tmp = *name_end;
+	      if ((deh_state(de_head) & DEH_Visible))
+		{
+		  int cmp;
+		  /* Directory names in ReiserFS are not null
+		   * terminated.  We write a temporary 0 behind it.
+		   * NOTE: that this may overwrite the first block in
+		   * the tree cache.  That doesn't hurt as long as we
+		   * don't call next_key () in between.
+		   */
+		  *name_end = 0;
+		  cmp = substring (dirname, filename);
+		  *name_end = tmp;
+# ifndef STAGE1_5
+		  if (do_possibilities)
+		    {
+		      if (cmp <= 0)
+			{
+			  char fn[PATH_MAX];
+                          struct fsys_reiser_info info_save;
+
+			  if (print_possibilities > 0)
+			    print_possibilities = -print_possibilities;
+			  *name_end = 0;
+			  strcpy(fn, filename);
+                          *name_end = tmp;
+
+			  /* If NAME is "." or "..", do not count it.  */
+                          if (strcmp (fn, ".") != 0 && strcmp (fn, "..") != 0) {
+                            memcpy(&info_save, INFO, sizeof(struct fsys_reiser_info));
+                            search_stat (deh_dir_id(de_head), deh_objectid(de_head));
+                            sd_print_item(INFO->current_ih, INFO->current_item);
+                            printf(" %s\n", fn);
+                            search_stat (dir_id, objectid);
+                            memcpy(INFO, &info_save, sizeof(struct fsys_reiser_info));
+			  }
+			}
+		    }
+		  else
+# endif /* ! STAGE1_5 */
+		    if (cmp == 0)
+		      goto found;
+		}
+	      /* The beginning of this name marks the end of the next name.
+	       */
+	      name_end = filename;
+	      de_head++;
+	      num_entries--;
+	    }
+	}
+
+# ifndef STAGE1_5
+      if (print_possibilities < 0)
+	return 1;
+# endif /* ! STAGE1_5 */
+
+      errnum = ERR_FILE_NOT_FOUND;
+      *rest = ch;
+      return 0;
+
+    found:
+      *rest = ch;
+      dirname = rest;
+
+      parent_dir_id = dir_id;
+      parent_objectid = objectid;
+      dir_id = deh_dir_id(de_head);
+      objectid = deh_objectid(de_head);
+    }
+}
+
+/*
+ * U-Boot interface functions
+ */
+
+/*
+ * List given directory
+ *
+ * RETURN: 0 - OK, else grub_error_t errnum
+ */
+int
+reiserfs_ls (char *dirname)
+{
+	char *dir_slash;
+	int res;
+
+	errnum = 0;
+	dir_slash = malloc(strlen(dirname) + 1);
+	if (dir_slash == NULL) {
+		return ERR_NUMBER_OVERFLOW;
+	}
+	strcpy(dir_slash, dirname);
+	/* add "/" to the directory name */
+	strcat(dir_slash, "/");
+
+	print_possibilities = 1;
+	res = reiserfs_dir (dir_slash);
+	free(dir_slash);
+	if (!res || errnum) {
+		return errnum;
+	}
+
+	return 0;
+}
+
+/*
+ * Open file for reading
+ *
+ * RETURN: >0 - OK, size of opened file
+ *         <0 - ERROR  -grub_error_t errnum
+ */
+int
+reiserfs_open (char *filename)
+{
+	/* open the file */
+	errnum = 0;
+	print_possibilities = 0;
+	if (!reiserfs_dir (filename) || errnum) {
+		return -errnum;
+	}
+	return filemax;
+}
+
+#endif /* CFG_CMD_REISER */
--- a/fs/reiserfs/reiserfs_private.h
+++ b/fs/reiserfs/reiserfs_private.h
@@ -0,0 +1,520 @@
+/*
+ *  Copyright 2000-2002 by Hans Reiser, licensing governed by reiserfs/README
+ *
+ *  GRUB  --  GRand Unified Bootloader
+ *  Copyright (C) 2000, 2001  Free Software Foundation, Inc.
+ *
+ *  (C) Copyright 2003 - 2004
+ *  Sysgo AG, <www.elinos.com>, Pavel Bartusek <pba@sysgo.com>
+ *
+ *
+ *  This program is free software; you can redistribute it and/or modify
+ *  it under the terms of the GNU General Public License as published by
+ *  the Free Software Foundation; either version 2 of the License, or
+ *  (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the Free Software
+ *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+/* An implementation for the ReiserFS filesystem ported from GRUB.
+ * Some parts of this code (mainly the structures and defines) are
+ * from the original reiser fs code, as found in the linux kernel.
+ */
+
+#ifndef __BYTE_ORDER
+#if defined(__LITTLE_ENDIAN) && !defined(__BIG_ENDIAN)
+#define __BYTE_ORDER __LITTLE_ENDIAN
+#elif defined(__BIG_ENDIAN) && !defined(__LITTLE_ENDIAN)
+#define __BYTE_ORDER __BIG_ENDIAN
+#else
+#error "unable to define __BYTE_ORDER"
+#endif
+#endif /* not __BYTE_ORDER */
+
+#define FSYS_BUFLEN  0x8000
+#define FSYS_BUF     fsys_buf
+
+/* This is the new super block of a journaling reiserfs system */
+struct reiserfs_super_block
+{
+  __u32 s_block_count;			/* blocks count         */
+  __u32 s_free_blocks;                  /* free blocks count    */
+  __u32 s_root_block;           	/* root block number    */
+  __u32 s_journal_block;           	/* journal block number    */
+  __u32 s_journal_dev;           	/* journal device number  */
+  __u32 s_journal_size; 		/* size of the journal on FS creation.  used to make sure they don't overflow it */
+  __u32 s_journal_trans_max;            /* max number of blocks in a transaction.  */
+  __u32 s_journal_magic;                /* random value made on fs creation */
+  __u32 s_journal_max_batch;            /* max number of blocks to batch into a trans */
+  __u32 s_journal_max_commit_age;       /* in seconds, how old can an async commit be */
+  __u32 s_journal_max_trans_age;        /* in seconds, how old can a transaction be */
+  __u16 s_blocksize;                   	/* block size           */
+  __u16 s_oid_maxsize;			/* max size of object id array  */
+  __u16 s_oid_cursize;			/* current size of object id array */
+  __u16 s_state;                       	/* valid or error       */
+  char s_magic[16];                     /* reiserfs magic string indicates that file system is reiserfs */
+  __u16 s_tree_height;                  /* height of disk tree */
+  __u16 s_bmap_nr;                      /* amount of bitmap blocks needed to address each block of file system */
+  __u16 s_version;
+  char s_unused[128];			/* zero filled by mkreiserfs */
+};
+
+
+#define sb_root_block(sbp)            (__le32_to_cpu((sbp)->s_root_block))
+#define sb_journal_block(sbp)         (__le32_to_cpu((sbp)->s_journal_block))
+#define set_sb_journal_block(sbp,v)   ((sbp)->s_journal_block = __cpu_to_le32(v))
+#define sb_journal_size(sbp)          (__le32_to_cpu((sbp)->s_journal_size))
+#define sb_blocksize(sbp)             (__le16_to_cpu((sbp)->s_blocksize))
+#define set_sb_blocksize(sbp,v)       ((sbp)->s_blocksize = __cpu_to_le16(v))
+#define sb_version(sbp)               (__le16_to_cpu((sbp)->s_version))
+#define set_sb_version(sbp,v)         ((sbp)->s_version = __cpu_to_le16(v))
+
+
+#define REISERFS_MAX_SUPPORTED_VERSION 2
+#define REISERFS_SUPER_MAGIC_STRING "ReIsErFs"
+#define REISER2FS_SUPER_MAGIC_STRING "ReIsEr2Fs"
+#define REISER3FS_SUPER_MAGIC_STRING "ReIsEr3Fs"
+
+#define MAX_HEIGHT 7
+
+/* must be correct to keep the desc and commit structs at 4k */
+#define JOURNAL_TRANS_HALF 1018
+
+/* first block written in a commit.  */
+struct reiserfs_journal_desc {
+  __u32 j_trans_id;			/* id of commit */
+  __u32 j_len;				/* length of commit. len +1 is the commit block */
+  __u32 j_mount_id;			/* mount id of this trans*/
+  __u32 j_realblock[JOURNAL_TRANS_HALF]; /* real locations for the first blocks */
+  char j_magic[12];
+};
+
+/* last block written in a commit */
+struct reiserfs_journal_commit {
+  __u32 j_trans_id;			/* must match j_trans_id from the desc block */
+  __u32 j_len;			/* ditto */
+  __u32 j_realblock[JOURNAL_TRANS_HALF]; /* real locations for the last blocks */
+  char j_digest[16];			/* md5 sum of all the blocks involved, including desc and commit. not used, kill it */
+};
+
+/* this header block gets written whenever a transaction is considered
+   fully flushed, and is more recent than the last fully flushed
+   transaction.
+   fully flushed means all the log blocks and all the real blocks are
+   on disk, and this transaction does not need to be replayed.
+*/
+struct reiserfs_journal_header {
+  /* id of last fully flushed transaction */
+  __u32 j_last_flush_trans_id;
+  /* offset in the log of where to start replay after a crash */
+  __u32 j_first_unflushed_offset;
+  /* mount id to detect very old transactions */
+  __u32 j_mount_id;
+};
+
+/* magic string to find desc blocks in the journal */
+#define JOURNAL_DESC_MAGIC "ReIsErLB"
+
+
+/*
+ * directories use this key as well as old files
+ */
+struct offset_v1
+{
+  /*
+   * for regular files this is the offset to the first byte of the
+   * body, contained in the object-item, as measured from the start of
+   * the entire body of the object.
+   *
+   * for directory entries, k_offset consists of hash derived from
+   * hashing the name and using few bits (23 or more) of the resulting
+   * hash, and generation number that allows distinguishing names with
+   * hash collisions. If number of collisions overflows generation
+   * number, we return EEXIST.  High order bit is 0 always
+   */
+  __u32 k_offset;
+  __u32 k_uniqueness;
+};
+
+struct offset_v2 {
+  /*
+   * for regular files this is the offset to the first byte of the
+   * body, contained in the object-item, as measured from the start of
+   * the entire body of the object.
+   *
+   * for directory entries, k_offset consists of hash derived from
+   * hashing the name and using few bits (23 or more) of the resulting
+   * hash, and generation number that allows distinguishing names with
+   * hash collisions. If number of collisions overflows generation
+   * number, we return EEXIST.  High order bit is 0 always
+   */
+
+#if defined(__LITTLE_ENDIAN_BITFIELD)
+            /* little endian version */
+            __u64 k_offset:60;
+            __u64 k_type: 4;
+#elif defined(__BIG_ENDIAN_BITFIELD)
+            /* big endian version */
+            __u64 k_type: 4;
+            __u64 k_offset:60;
+#else
+#error "__LITTLE_ENDIAN_BITFIELD or __BIG_ENDIAN_BITFIELD must be defined"
+#endif
+} __attribute__ ((__packed__));
+
+#define TYPE_MAXTYPE 3
+#define TYPE_ANY 15
+
+#if (__BYTE_ORDER == __BIG_ENDIAN)
+typedef union {
+    struct offset_v2 offset_v2;
+    __u64 linear;
+} __attribute__ ((__packed__)) offset_v2_esafe_overlay;
+
+static inline __u16 offset_v2_k_type( const struct offset_v2 *v2 )
+{
+    offset_v2_esafe_overlay tmp = *(const offset_v2_esafe_overlay *)v2;
+    tmp.linear = __le64_to_cpu( tmp.linear );
+    return (tmp.offset_v2.k_type <= TYPE_MAXTYPE)?tmp.offset_v2.k_type:TYPE_ANY;
+}
+
+static inline loff_t offset_v2_k_offset( const struct offset_v2 *v2 )
+{
+    offset_v2_esafe_overlay tmp = *(const offset_v2_esafe_overlay *)v2;
+    tmp.linear = __le64_to_cpu( tmp.linear );
+    return tmp.offset_v2.k_offset;
+}
+#elif (__BYTE_ORDER == __LITTLE_ENDIAN)
+# define offset_v2_k_type(v2)           ((v2)->k_type)
+# define offset_v2_k_offset(v2)         ((v2)->k_offset)
+#else
+#error "__BYTE_ORDER must be __LITTLE_ENDIAN or __BIG_ENDIAN"
+#endif
+
+struct key
+{
+  /* packing locality: by default parent directory object id */
+  __u32 k_dir_id;
+  /* object identifier */
+  __u32 k_objectid;
+  /* the offset and node type (old and new form) */
+  union
+  {
+    struct offset_v1 v1;
+    struct offset_v2 v2;
+  }
+  u;
+};
+
+#define KEY_SIZE (sizeof (struct key))
+
+/* Header of a disk block.  More precisely, header of a formatted leaf
+   or internal node, and not the header of an unformatted node. */
+struct block_head
+{
+  __u16 blk_level;        /* Level of a block in the tree. */
+  __u16 blk_nr_item;      /* Number of keys/items in a block. */
+  __u16 blk_free_space;   /* Block free space in bytes. */
+  struct key  blk_right_delim_key; /* Right delimiting key for this block (supported for leaf level nodes
+				      only) */
+};
+#define BLKH_SIZE (sizeof (struct block_head))
+#define DISK_LEAF_NODE_LEVEL  1 /* Leaf node level.                       */
+
+struct item_head
+{
+	/* Everything in the tree is found by searching for it based on
+	 * its key.*/
+	struct key ih_key;
+	union {
+		/* The free space in the last unformatted node of an
+		   indirect item if this is an indirect item.  This
+		   equals 0xFFFF iff this is a direct item or stat data
+		   item. Note that the key, not this field, is used to
+		   determine the item type, and thus which field this
+		   union contains. */
+		__u16 ih_free_space;
+		/* Iff this is a directory item, this field equals the
+		   number of directory entries in the directory item. */
+		__u16 ih_entry_count;
+	} __attribute__ ((__packed__)) u;
+	__u16 ih_item_len;           /* total size of the item body */
+	__u16 ih_item_location;      /* an offset to the item body
+				      * within the block */
+	__u16 ih_version;	     /* 0 for all old items, 2 for new
+					ones. Highest bit is set by fsck
+					temporary, cleaned after all
+					done */
+} __attribute__ ((__packed__));
+
+/* size of item header     */
+#define IH_SIZE (sizeof (struct item_head))
+
+#define ITEM_VERSION_1 0
+#define ITEM_VERSION_2 1
+
+#define ih_version(ih)    (__le16_to_cpu((ih)->ih_version))
+
+#define IH_KEY_OFFSET(ih) (ih_version(ih) == ITEM_VERSION_1 \
+			   ? __le32_to_cpu((ih)->ih_key.u.v1.k_offset) \
+			   : offset_v2_k_offset(&((ih)->ih_key.u.v2)))
+
+#define IH_KEY_ISTYPE(ih, type) (ih_version(ih) == ITEM_VERSION_1 \
+				 ? __le32_to_cpu((ih)->ih_key.u.v1.k_uniqueness) == V1_##type \
+				 : offset_v2_k_type(&((ih)->ih_key.u.v2)) == V2_##type)
+
+/***************************************************************************/
+/*                      DISK CHILD                                         */
+/***************************************************************************/
+/* Disk child pointer: The pointer from an internal node of the tree
+   to a node that is on disk. */
+struct disk_child {
+  __u32       dc_block_number;              /* Disk child's block number. */
+  __u16       dc_size;		            /* Disk child's used space.   */
+  __u16       dc_reserved;
+};
+
+#define DC_SIZE (sizeof(struct disk_child))
+#define dc_block_number(dc_p)	(__le32_to_cpu((dc_p)->dc_block_number))
+
+
+/*
+ * old stat data is 32 bytes long. We are going to distinguish new one by
+ * different size
+ */
+struct stat_data_v1
+{
+    __u16 sd_mode;	/* file type, permissions */
+    __u16 sd_nlink;	/* number of hard links */
+    __u16 sd_uid;		/* owner */
+    __u16 sd_gid;		/* group */
+    __u32 sd_size;	/* file size */
+    __u32 sd_atime;	/* time of last access */
+    __u32 sd_mtime;	/* time file was last modified  */
+    __u32 sd_ctime;	/* time inode (stat data) was last changed (except changes to sd_atime and sd_mtime) */
+    union {
+	__u32 sd_rdev;
+	__u32 sd_blocks;	/* number of blocks file uses */
+    } __attribute__ ((__packed__)) u;
+    __u32 sd_first_direct_byte; /* first byte of file which is stored
+				   in a direct item: except that if it
+				   equals 1 it is a symlink and if it
+				   equals ~(__u32)0 there is no
+				   direct item.  The existence of this
+				   field really grates on me. Let's
+				   replace it with a macro based on
+				   sd_size and our tail suppression
+				   policy.  Someday.  -Hans */
+} __attribute__ ((__packed__));
+
+#define stat_data_v1(ih)        (ih_version(ih) == ITEM_VERSION_1)
+#define sd_v1_mode(sdp)         ((sdp)->sd_mode)
+#define sd_v1_nlink(sdp)        (__le16_to_cpu((sdp)->sd_nlink))
+#define sd_v1_uid(sdp)          (__le16_to_cpu((sdp)->sd_uid))
+#define sd_v1_gid(sdp)          (__le16_to_cpu((sdp)->sd_gid))
+#define sd_v1_size(sdp)         (__le32_to_cpu((sdp)->sd_size))
+#define sd_v1_mtime(sdp)        (__le32_to_cpu((sdp)->sd_mtime))
+
+/* Stat Data on disk (reiserfs version of UFS disk inode minus the
+   address blocks) */
+struct stat_data {
+    __u16 sd_mode;	/* file type, permissions */
+    __u16 sd_attrs;     /* persistent inode flags */
+    __u32 sd_nlink;	/* number of hard links */
+    __u64 sd_size;	/* file size */
+    __u32 sd_uid;		/* owner */
+    __u32 sd_gid;		/* group */
+    __u32 sd_atime;	/* time of last access */
+    __u32 sd_mtime;	/* time file was last modified  */
+    __u32 sd_ctime;	/* time inode (stat data) was last changed (except changes to sd_atime and sd_mtime) */
+    __u32 sd_blocks;
+    union {
+	__u32 sd_rdev;
+	__u32 sd_generation;
+      /*__u32 sd_first_direct_byte; */
+      /* first byte of file which is stored in a
+				       direct item: except that if it equals 1
+				       it is a symlink and if it equals
+				       ~(__u32)0 there is no direct item.  The
+				       existence of this field really grates
+				       on me. Let's replace it with a macro
+				       based on sd_size and our tail
+				       suppression policy? */
+  } __attribute__ ((__packed__)) u;
+} __attribute__ ((__packed__));
+
+#define stat_data_v2(ih)        (ih_version(ih) == ITEM_VERSION_2)
+#define sd_v2_mode(sdp)         (__le16_to_cpu((sdp)->sd_mode))
+#define sd_v2_nlink(sdp)        (__le32_to_cpu((sdp)->sd_nlink))
+#define sd_v2_size(sdp)         (__le64_to_cpu((sdp)->sd_size))
+#define sd_v2_uid(sdp)          (__le32_to_cpu((sdp)->sd_uid))
+#define sd_v2_gid(sdp)          (__le32_to_cpu((sdp)->sd_gid))
+#define sd_v2_mtime(sdp)        (__le32_to_cpu((sdp)->sd_mtime))
+
+#define sd_mode(sdp)         (__le16_to_cpu((sdp)->sd_mode))
+#define sd_size(sdp)         (__le32_to_cpu((sdp)->sd_size))
+#define sd_size_hi(sdp)      (__le32_to_cpu((sdp)->sd_size_hi))
+
+struct reiserfs_de_head
+{
+  __u32 deh_offset;  /* third component of the directory entry key */
+  __u32 deh_dir_id;  /* objectid of the parent directory of the
+			object, that is referenced by directory entry */
+  __u32 deh_objectid;/* objectid of the object, that is referenced by
+                        directory entry */
+  __u16 deh_location;/* offset of name in the whole item */
+  __u16 deh_state;   /* whether 1) entry contains stat data (for
+			future), and 2) whether entry is hidden
+			(unlinked) */
+};
+
+#define DEH_SIZE (sizeof (struct reiserfs_de_head))
+#define deh_offset(p_deh)         (__le32_to_cpu((p_deh)->deh_offset))
+#define deh_dir_id(p_deh)         (__le32_to_cpu((p_deh)->deh_dir_id))
+#define deh_objectid(p_deh)       (__le32_to_cpu((p_deh)->deh_objectid))
+#define deh_location(p_deh)       (__le16_to_cpu((p_deh)->deh_location))
+#define deh_state(p_deh)          (__le16_to_cpu((p_deh)->deh_state))
+
+
+#define DEH_Statdata (1 << 0)			/* not used now */
+#define DEH_Visible  (1 << 2)
+
+#define SD_OFFSET  0
+#define SD_UNIQUENESS 0
+#define DOT_OFFSET 1
+#define DOT_DOT_OFFSET 2
+#define DIRENTRY_UNIQUENESS 500
+
+#define V1_TYPE_STAT_DATA 0x0
+#define V1_TYPE_DIRECT 0xffffffff
+#define V1_TYPE_INDIRECT 0xfffffffe
+#define V1_TYPE_DIRECTORY_MAX 0xfffffffd
+#define V2_TYPE_STAT_DATA 0
+#define V2_TYPE_INDIRECT 1
+#define V2_TYPE_DIRECT 2
+#define V2_TYPE_DIRENTRY 3
+
+#define REISERFS_ROOT_OBJECTID 2
+#define REISERFS_ROOT_PARENT_OBJECTID 1
+#define REISERFS_DISK_OFFSET_IN_BYTES (64 * 1024)
+/* the spot for the super in versions 3.5 - 3.5.11 (inclusive) */
+#define REISERFS_OLD_DISK_OFFSET_IN_BYTES (8 * 1024)
+#define REISERFS_OLD_BLOCKSIZE 4096
+
+#define S_ISREG(mode) (((mode) & 0170000) == 0100000)
+#define S_ISDIR(mode) (((mode) & 0170000) == 0040000)
+#define S_ISLNK(mode) (((mode) & 0170000) == 0120000)
+
+#define PATH_MAX       1024	/* include/linux/limits.h */
+#define MAX_LINK_COUNT    5	/* number of symbolic links to follow */
+
+/* The size of the node cache */
+#define FSYSREISER_CACHE_SIZE 24*1024
+#define FSYSREISER_MIN_BLOCKSIZE SECTOR_SIZE
+#define FSYSREISER_MAX_BLOCKSIZE FSYSREISER_CACHE_SIZE / 3
+
+/* Info about currently opened file */
+struct fsys_reiser_fileinfo
+{
+  __u32 k_dir_id;
+  __u32 k_objectid;
+};
+
+/* In memory info about the currently mounted filesystem */
+struct fsys_reiser_info
+{
+  /* The last read item head */
+  struct item_head *current_ih;
+  /* The last read item */
+  char *current_item;
+  /* The information for the currently opened file */
+  struct fsys_reiser_fileinfo fileinfo;
+  /* The start of the journal */
+  __u32 journal_block;
+  /* The size of the journal */
+  __u32 journal_block_count;
+  /* The first valid descriptor block in journal
+     (relative to journal_block) */
+  __u32 journal_first_desc;
+
+  /* The ReiserFS version. */
+  __u16 version;
+  /* The current depth of the reiser tree. */
+  __u16 tree_depth;
+  /* SECTOR_SIZE << blocksize_shift == blocksize. */
+  __u8  blocksize_shift;
+  /* 1 << full_blocksize_shift == blocksize. */
+  __u8  fullblocksize_shift;
+  /* The reiserfs block size  (must be a power of 2) */
+  __u16 blocksize;
+  /* The number of cached tree nodes */
+  __u16 cached_slots;
+  /* The number of valid transactions in journal */
+  __u16 journal_transactions;
+
+  unsigned int blocks[MAX_HEIGHT];
+  unsigned int next_key_nr[MAX_HEIGHT];
+};
+
+/* The cached s+tree blocks in FSYS_BUF,  see below
+ * for a more detailed description.
+ */
+#define ROOT     ((char *) ((int) FSYS_BUF))
+#define CACHE(i) (ROOT + ((i) << INFO->fullblocksize_shift))
+#define LEAF     CACHE (DISK_LEAF_NODE_LEVEL)
+
+#define BLOCKHEAD(cache) ((struct block_head *) cache)
+#define ITEMHEAD         ((struct item_head  *) ((int) LEAF + BLKH_SIZE))
+#define KEY(cache)       ((struct key        *) ((int) cache + BLKH_SIZE))
+#define DC(cache)        ((struct disk_child *) \
+			  ((int) cache + BLKH_SIZE + KEY_SIZE * nr_item))
+/* The fsys_reiser_info block.
+ */
+#define INFO \
+    ((struct fsys_reiser_info *) ((int) FSYS_BUF + FSYSREISER_CACHE_SIZE))
+/*
+ * The journal cache.  For each transaction it contains the number of
+ * blocks followed by the real block numbers of this transaction.
+ *
+ * If the block numbers of some transaction won't fit in this space,
+ * this list is stopped with a 0xffffffff marker and the remaining
+ * uncommitted transactions aren't cached.
+ */
+#define JOURNAL_START    ((__u32 *) (INFO + 1))
+#define JOURNAL_END      ((__u32 *) (FSYS_BUF + FSYS_BUFLEN))
+
+
+static __inline__ unsigned long
+log2 (unsigned long word)
+{
+#ifdef __I386__
+  __asm__ ("bsfl %1,%0"
+	   : "=r" (word)
+	   : "r" (word));
+  return word;
+#else
+  int i;
+
+  for(i=0; i<(8*sizeof(word)); i++)
+    if ((1<<i) & word)
+      return i;
+
+  return 0;
+#endif
+}
+
+static __inline__ int
+is_power_of_two (unsigned long word)
+{
+  return (word & -word) == word;
+}
+
+extern const char *bb_mode_string(int mode);
+extern int reiserfs_devread (int sector, int byte_offset, int byte_len, char *buf);
--- a/include/asm-arm/arch-at91rm9200/hardware.h
+++ b/include/asm-arm/arch-at91rm9200/hardware.h
@@ -28,11 +28,6 @@
 #include "AT91RM9200_inc.h"
 #endif

-/* AT91RM92000 clocks */
-#define AT91_MAIN_CLOCK		179712000	/* from 18.432 MHz crystal (18432000 / 4 * 39) */
-#define AT91_MASTER_CLOCK	59904000	/* peripheral clock (AT91C_MASTER_CLOCK / 3) */
-#define AT91_SLOW_CLOCK		32768		/* slow clock */
-
 /* Virtual and Physical base address for system peripherals */
 #define AT91_SYS_BASE		0xFFFFF000 /*4K */

--- a/include/asm-ppc/cpm_8260.h
+++ b/include/asm-ppc/cpm_8260.h
@@ -683,6 +683,7 @@ typedef struct fcc_enet {
 #define FCC_PSMR_PRO	((uint)0x00400000)	/* Promiscuous Enable */
 #define FCC_PSMR_FCE	((uint)0x00200000)	/* Flow Control Enable */
 #define FCC_PSMR_RSH	((uint)0x00100000)	/* Receive Short Frames */
+#define FCC_PSMR_RMII	((uint)0x00020000)	/* Use RMII interface */
 #define FCC_PSMR_CAM	((uint)0x00000400)	/* CAM enable */
 #define FCC_PSMR_BRO	((uint)0x00000200)	/* Broadcast pkt discard */
 #define FCC_PSMR_ENCRC	((uint)0x00000080)	/* Use 32-bit CRC */
--- a/include/cmd_confdefs.h
+++ b/include/cmd_confdefs.h
@@ -87,6 +87,7 @@
 #define CFG_CMD_IMLS	0x0020000000000000U	/* List all found images        */
 #define CFG_CMD_ITEST	0x0040000000000000U	/* Integer (and string) test	*/
 #define CFG_CMD_NFS	0x0080000000000000U	/* NFS support			*/
+#define CFG_CMD_REISER  0x0100000000000000U     /* Reiserfs support		*/

 #define CFG_CMD_ALL	0xFFFFFFFFFFFFFFFFU	/* ALL commands			*/

@@ -124,6 +125,7 @@
 			CFG_CMD_PING	| \
 			CFG_CMD_PORTIO	| \
 			CFG_CMD_REGINFO | \
+			CFG_CMD_REISER	| \
 			CFG_CMD_SAVES	| \
 			CFG_CMD_SCSI	| \
 			CFG_CMD_SDRAM	| \
--- a/include/common.h
+++ b/include/common.h
@@ -319,7 +319,7 @@ void	relocate_code (ulong, gd_t *, ulong);
 ulong	get_endaddr   (void);
 void	trap_init     (ulong);
 #if defined (CONFIG_4xx)	|| \
-    defined (CONFIG_5xxx)	|| \
+    defined (CONFIG_MPC5xxx)	|| \
    defined (CONFIG_74xx_7xx)	|| \
    defined (CONFIG_74x)	|| \
    defined (CONFIG_75x)	|| \
--- a/include/configs/IceCube.h
+++ b/include/configs/IceCube.h
@@ -89,7 +89,6 @@
 #if 1
 #define CONFIG_USB_OHCI
 #define ADD_USB_CMD             CFG_CMD_USB | CFG_CMD_FAT
-#define CONFIG_DOS_PARTITION
 #define CONFIG_USB_STORAGE
 #else
 #define ADD_USB_CMD             0
--- a/include/configs/LANTEC.h
+++ b/include/configs/LANTEC.h
@@ -81,7 +81,7 @@
 				 CFG_CMD_MEMORY | \
 				 CFG_CMD_LOADS  | \
 				 CFG_CMD_LOADB)
-#define CONFIG_CMD_NORMAL	(CONFIG_CMD_DFL & ~CFG_CMD_BOOTD)
+#define CONFIG_CMD_NORMAL	(CONFIG_CMD_DFL & ~CFG_CMD_BOOTD & ~CFG_CMD_REISER)
 #define CONFIG_CMD_GDB		(CONFIG_CMD_NORMAL | CFG_CMD_KGDB)
 #define CONFIG_CMD_FULL		(CFG_CMD_ALL & ~CFG_CMD_BEDBUG	\
 					     & ~CFG_CMD_BMP	\
@@ -103,6 +103,7 @@
 					     & ~CFG_CMD_NAND	\
 					     & ~CFG_CMD_PCI	\
 					     & ~CFG_CMD_PCMCIA	\
+					     & ~CFG_CMD_REISER	\
 					     & ~CFG_CMD_SCSI	\
 					     & ~CFG_CMD_SPI	\
 					     & ~CFG_CMD_USB	\
--- a/include/configs/MPC8260ADS.h
+++ b/include/configs/MPC8260ADS.h
@@ -170,6 +170,7 @@
 				 CFG_CMD_NAND	| \
 				 CFG_CMD_PCI	| \
 				 CFG_CMD_PCMCIA | \
+				CFG_CMD_REISER	| \
 				 CFG_CMD_SCSI	| \
 				 CFG_CMD_SPI	| \
 				 CFG_CMD_USB	| \
--- a/include/configs/MPC8266ADS.h
+++ b/include/configs/MPC8266ADS.h
@@ -164,6 +164,7 @@
 				 CFG_CMD_MMC	| \
 				 CFG_CMD_NAND	| \
 				 CFG_CMD_PCMCIA | \
+				CFG_CMD_REISER	| \
 				 CFG_CMD_SCSI	| \
 				 CFG_CMD_SPI	| \
 				 CFG_CMD_VFD	| \
@@ -172,8 +173,8 @@
 /* Define a command string that is automatically executed when no character
 * is read on the console interface withing "Boot Delay" after reset.
 */
-#define CONFIG_BOOT_ROOT_INITRD 0	/* Use ram disk for the root file system */
-#define CONFIG_BOOT_ROOT_NFS	1	/* Use a NFS mounted root file system */
+#undef	CONFIG_BOOT_ROOT_INITRD 	/* Use ram disk for the root file system */
+#define	CONFIG_BOOT_ROOT_NFS		/* Use a NFS mounted root file system */

 #ifdef CONFIG_BOOT_ROOT_INITRD
 #define CONFIG_BOOTCOMMAND \
--- a/include/configs/OCOTEA.h
+++ b/include/configs/OCOTEA.h
@@ -150,6 +150,7 @@
 #define CONFIG_PHY2_ADDR	0x10
 #define CONFIG_PHY3_ADDR	0x18
 #define CONFIG_CIS8201_PHY	1	/* Enable 'special' RGMII mode for Cicada phy */
+#define CONFIG_PHY_GIGE		1	/* Include GbE speed/duplex detection */
 #define CONFIG_NETMASK		255.255.255.0
 #define CONFIG_IPADDR		10.1.2.3
 #define CONFIG_ETHADDR		00:04:AC:E3:28:8A
--- a/include/configs/PM520.h
+++ b/include/configs/PM520.h
@@ -0,0 +1,239 @@
+/*
+ * (C) Copyright 2003-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+
+#define CONFIG_MPC5200
+#define CONFIG_MPC5XXX		1	/* This is an MPC5xxx CPU */
+#define CONFIG_PM520		1	/* ... on PM520 board */
+
+#define CFG_MPC5XXX_CLKIN	33000000 /* ... running at 33MHz */
+
+#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH  */
+#define BOOTFLAG_WARM		0x02	/* Software reboot	     */
+
+#define CFG_CACHELINE_SIZE	32	/* For MPC5xxx CPUs */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#  define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value */
+#endif
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE	1	/* console is on PSC1 */
+#define CONFIG_BAUDRATE		9600	/* ... at 9600 bps */
+#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200, 230400 }
+
+
+#ifdef CONFIG_MPC5200	/* MPC5100 PCI is not supported yet. */
+/*
+ * PCI Mapping:
+ * 0x40000000 - 0x4fffffff - PCI Memory
+ * 0x50000000 - 0x50ffffff - PCI IO Space
+ */
+#define CONFIG_PCI		1
+#define CONFIG_PCI_PNP		1
+#define CONFIG_PCI_SCAN_SHOW	1
+
+#define CONFIG_PCI_MEM_BUS	0x40000000
+#define CONFIG_PCI_MEM_PHYS	CONFIG_PCI_MEM_BUS
+#define CONFIG_PCI_MEM_SIZE	0x10000000
+
+#define CONFIG_PCI_IO_BUS	0x50000000
+#define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
+#define CONFIG_PCI_IO_SIZE	0x01000000
+
+#define CONFIG_NET_MULTI	1
+#define CONFIG_EEPRO100		1
+#define CFG_RX_ETH_BUFFER	8  /* use 8 rx buffer on eepro100  */
+#undef  CONFIG_NS8382X
+
+#define ADD_PCI_CMD 		CFG_CMD_PCI
+
+#else	/* MPC5100 */
+
+#define ADD_PCI_CMD		0  /* no CFG_CMD_PCI */
+
+#endif
+
+/*
+ * Supported commands
+ */
+#define CONFIG_COMMANDS		(CONFIG_CMD_DFL | ADD_PCI_CMD | \
+				 CFG_CMD_I2C | CFG_CMD_EEPROM | CFG_CMD_DATE)
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+/*
+ * Autobooting
+ */
+#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds */
+#define CONFIG_BOOTCOMMAND	"bootm 100000"	/* autoboot command */
+#define CONFIG_BOOTARGS		"root=/dev/ram rw"
+
+#if defined(CONFIG_MPC5200)
+/*
+ * IPB Bus clocking configuration.
+ */
+#undef CFG_IPBSPEED_133   		/* define for 133MHz speed */
+#endif
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C		1	/* I2C with hardware support */
+#define CFG_I2C_MODULE		2	/* Select I2C module #1 or #2 */
+
+#define CFG_I2C_SPEED		100000 /* 100 kHz */
+#define CFG_I2C_SLAVE		0x7F
+
+/*
+ * EEPROM configuration
+ */
+#define CFG_I2C_EEPROM_ADDR		0x58
+#define CFG_I2C_EEPROM_ADDR_LEN		1
+#define CFG_EEPROM_PAGE_WRITE_BITS	4
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS	10
+
+/*
+ * RTC configuration
+ */
+#define CONFIG_RTC_PCF8563
+#define CFG_I2C_RTC_ADDR		0x51
+
+/*
+ * Flash configuration
+ */
+#define CFG_FLASH_BASE		0xff800000
+#define CFG_FLASH_SIZE		0x00800000
+#define CFG_ENV_ADDR		(CFG_FLASH_BASE + 0x740000)
+#define CFG_MAX_FLASH_BANKS	1	/* max num of memory banks      */
+
+#define CFG_MAX_FLASH_SECT	128	/* max num of sects on one chip */
+
+#define CFG_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)  */
+#define CFG_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)  */
+#define CFG_FLASH_LOCK_TOUT	5	/* Timeout for Flash Set Lock Bit (in ms) */
+#define CFG_FLASH_UNLOCK_TOUT	10000	/* Timeout for Flash Clear Lock Bits (in ms) */
+#define CFG_FLASH_PROTECTION		/* "Real" (hardware) sectors protection */
+
+#define PHYS_FLASH_SECT_SIZE	0x00040000 /* 256 KB sectors (x2) */
+
+#undef CONFIG_FLASH_16BIT	/* Flash is 32-bit */
+
+
+/*
+ * Environment settings
+ */
+#define CFG_ENV_IS_IN_FLASH	1
+#define CFG_ENV_SIZE		0x10000
+#define CFG_ENV_SECT_SIZE	0x40000
+#define CONFIG_ENV_OVERWRITE	1
+
+/*
+ * Memory map
+ */
+#define CFG_MBAR		0xf0000000
+#define CFG_SDRAM_BASE		0x00000000
+#define CFG_DEFAULT_MBAR	0x80000000
+
+/* Use SRAM until RAM will be available */
+#define CFG_INIT_RAM_ADDR	MPC5XXX_SRAM
+#define CFG_INIT_RAM_END	MPC5XXX_SRAM_SIZE	/* End of used area in DPRAM */
+
+
+#define CFG_GBL_DATA_SIZE	128	/* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
+
+#define CFG_MONITOR_BASE    TEXT_BASE
+#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
+#   define CFG_RAMBOOT		1
+#endif
+
+#define CFG_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor	*/
+#define CFG_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()	*/
+#define CFG_BOOTMAPSZ		(8 << 20)	/* Initial Memory map for Linux */
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC5XXX_FEC	1
+#define CONFIG_FEC_10MBIT 1 /* Workaround for FEC 100Mbit problem */
+#define CONFIG_PHY_ADDR		0x00
+
+/*
+ * GPIO configuration
+ */
+#define CFG_GPS_PORT_CONFIG	0x10000004
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP			/* undef to save memory	    */
+#define CFG_PROMPT		"=> "	/* Monitor Command Prompt   */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE		1024	/* Console I/O Buffer Size  */
+#else
+#define CFG_CBSIZE		256	/* Console I/O Buffer Size  */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)	/* Print Buffer Size */
+#define CFG_MAXARGS		16		/* max number of command args	*/
+#define CFG_BARGSIZE		CFG_CBSIZE	/* Boot Argument Buffer Size	*/
+
+#define CFG_MEMTEST_START	0x00100000	/* memtest works on */
+#define CFG_MEMTEST_END		0x00f00000	/* 1 ... 15 MB in DRAM	*/
+
+#define CFG_LOAD_ADDR		0x100000	/* default load address */
+
+#define CFG_HZ			1000	/* decrementer freq: 1 ms ticks */
+
+/*
+ * Various low-level settings
+ */
+#if defined(CONFIG_MPC5200)
+#define CFG_HID0_INIT		HID0_ICE | HID0_ICFI
+#define CFG_HID0_FINAL		HID0_ICE
+#else
+#define CFG_HID0_INIT		0
+#define CFG_HID0_FINAL		0
+#endif
+
+#define CFG_BOOTCS_START	CFG_FLASH_BASE
+#define CFG_BOOTCS_SIZE		CFG_FLASH_SIZE
+#define CFG_BOOTCS_CFG		0x0004fb00
+#define CFG_CS0_START		CFG_FLASH_BASE
+#define CFG_CS0_SIZE		CFG_FLASH_SIZE
+
+#define CFG_CS_BURST		0x00000000
+#define CFG_CS_DEADCYCLE	0x33333333
+
+#define CFG_RESET_ADDRESS	0xff000000
+
+#endif /* __CONFIG_H */
--- a/include/configs/PM826.h
+++ b/include/configs/PM826.h
@@ -1,5 +1,5 @@
 /*
- * (C) Copyright 2001
+ * (C) Copyright 2001-2004
 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
 *
 * See file CREDITS for list of people who contributed to this
@@ -220,15 +220,18 @@
 /*-----------------------------------------------------------------------
 * Flash and Boot ROM mapping
 */
-
+#ifdef CONFIG_FLASH_32MB
+#define	CFG_FLASH0_BASE		0x40000000
+#define	CFG_FLASH0_SIZE		0x02000000
+#else
+#define	CFG_FLASH0_BASE		0xFF000000
+#define	CFG_FLASH0_SIZE		0x00800000
+#endif
 #define	CFG_BOOTROM_BASE	0xFF800000
 #define	CFG_BOOTROM_SIZE	0x00080000
-#define	CFG_FLASH0_BASE		0xFF000000
-#define	CFG_FLASH0_SIZE		0x02000000
 #define CFG_DOC_BASE		0xFF800000
 #define CFG_DOC_SIZE		0x00100000

-
 /* Flash bank size (for preliminary settings)
 */
 #define CFG_FLASH_SIZE CFG_FLASH0_SIZE
@@ -237,8 +240,11 @@
 * FLASH organization
 */
 #define CFG_MAX_FLASH_BANKS	1	/* max num of memory banks      */
+#ifdef CONFIG_FLASH_32MB
+#define CFG_MAX_FLASH_SECT	135	/* max num of sects on one chip */
+#else
 #define CFG_MAX_FLASH_SECT	128	/* max num of sects on one chip */
-
+#endif
 #define CFG_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)  */
 #define CFG_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)  */

@@ -426,7 +432,6 @@
 * ---- ---     ------- ------  ------
 *  0   60x     GPCM    64 bit  FLASH
 *  1   60x     SDRAM   64 bit  SDRAM
- *  2   Local   SDRAM   32 bit  SDRAM
 *
 */

@@ -440,7 +445,12 @@
 */
 #define CFG_MIN_AM_MASK	0xC0000000

-#define CFG_MPTPR       0x1F00
+/*
+ * we use the same values for 32 MB and 128 MB SDRAM
+ * refresh rate = 7.73 uS (64 MHz Bus Clock)
+ */
+#define CFG_MPTPR       0x2000
+#define CFG_PSRT        0x0E

 #define CFG_MRS_OFFS	0x00000000

@@ -512,7 +522,7 @@

 /* Bank 2 - SDRAM
 */
-#define CFG_PSRT        0x0F
+
 #ifndef CFG_RAMBOOT
 #define CFG_BR2_PRELIM  ((CFG_SDRAM_BASE & BRx_BA_MSK)  |\
 			 BRx_PS_64                      |\
--- a/include/configs/PM828.h
+++ b/include/configs/PM828.h
@@ -0,0 +1,565 @@
+/*
+ * (C) Copyright 2001-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.	 See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#undef CFG_RAMBOOT
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+
+#define CONFIG_MPC8260		1	/* This is a MPC8260 CPU	*/
+#define CONFIG_PM828		1	/* ...on a PM828 module */
+
+#undef CONFIG_DB_CR826_J30x_ON		/* J30x jumpers on D.B. carrier */
+
+#define CONFIG_CLOCKS_IN_MHZ	1	/* clocks passsed to Linux in MHz */
+
+#define CONFIG_BOOTDELAY	5	/* autoboot after 5 seconds	*/
+
+#define CONFIG_PREBOOT	"echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo"
+
+#undef	CONFIG_BOOTARGS
+#define CONFIG_BOOTCOMMAND							\
+	"bootp;"								\
+	"setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) "	\
+	"ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;"	\
+	"bootm"
+
+/* enable I2C and select the hardware/software driver */
+#undef	CONFIG_HARD_I2C
+#define CONFIG_SOFT_I2C		1	/* I2C bit-banged		*/
+# define CFG_I2C_SPEED		50000
+# define CFG_I2C_SLAVE		0xFE
+/*
+ * Software (bit-bang) I2C driver configuration
+ */
+#define I2C_PORT	3		/* Port A=0, B=1, C=2, D=3 */
+#define I2C_ACTIVE	(iop->pdir |=  0x00010000)
+#define I2C_TRISTATE	(iop->pdir &= ~0x00010000)
+#define I2C_READ	((iop->pdat & 0x00010000) != 0)
+#define I2C_SDA(bit)	if(bit) iop->pdat |=  0x00010000; \
+			else	iop->pdat &= ~0x00010000
+#define I2C_SCL(bit)	if(bit) iop->pdat |=  0x00020000; \
+			else	iop->pdat &= ~0x00020000
+#define I2C_DELAY	udelay(5)	/* 1/4 I2C clock duration */
+
+
+#define CONFIG_RTC_PCF8563
+#define CFG_I2C_RTC_ADDR	0x51
+
+/*
+ * select serial console configuration
+ *
+ * if either CONFIG_CONS_ON_SMC or CONFIG_CONS_ON_SCC is selected, then
+ * CONFIG_CONS_INDEX must be set to the channel number (1-2 for SMC, 1-4
+ * for SCC).
+ *
+ * if CONFIG_CONS_NONE is defined, then the serial console routines must
+ * defined elsewhere (for example, on the cogent platform, there are serial
+ * ports on the motherboard which are used for the serial console - see
+ * cogent/cma101/serial.[ch]).
+ */
+#define CONFIG_CONS_ON_SMC		/* define if console on SMC */
+#undef	CONFIG_CONS_ON_SCC		/* define if console on SCC */
+#undef	CONFIG_CONS_NONE		/* define if console on something else*/
+#define CONFIG_CONS_INDEX	2	/* which serial channel for console */
+
+/*
+ * select ethernet configuration
+ *
+ * if CONFIG_ETHER_ON_SCC is selected, then
+ *   - CONFIG_ETHER_INDEX must be set to the channel number (1-4)
+ *   - CONFIG_NET_MULTI must not be defined
+ *
+ * if CONFIG_ETHER_ON_FCC is selected, then
+ *   - one or more CONFIG_ETHER_ON_FCCx (x=1,2,3) must also be selected
+ *   - CONFIG_NET_MULTI must be defined
+ *
+ * if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
+ * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
+ * from CONFIG_COMMANDS to remove support for networking.
+ */
+#define CONFIG_NET_MULTI
+#undef	CONFIG_ETHER_NONE		/* define if ether on something else */
+
+#undef	CONFIG_ETHER_ON_SCC		/* define if ether on SCC	*/
+#define CONFIG_ETHER_INDEX    1		/* which SCC channel for ethernet */
+
+#define CONFIG_ETHER_ON_FCC		/* define if ether on FCC	*/
+/*
+ * - Rx-CLK is CLK11
+ * - Tx-CLK is CLK10
+ */
+#define CONFIG_ETHER_ON_FCC1
+# define CFG_CMXFCR_MASK1	(CMXFCR_FC1|CMXFCR_RF1CS_MSK|CMXFCR_TF1CS_MSK)
+#ifndef CONFIG_DB_CR826_J30x_ON
+# define CFG_CMXFCR_VALUE1	(CMXFCR_RF1CS_CLK11|CMXFCR_TF1CS_CLK10)
+#else
+# define CFG_CMXFCR_VALUE1	(CMXFCR_RF1CS_CLK11|CMXFCR_TF1CS_CLK12)
+#endif
+/*
+ * - Rx-CLK is CLK15
+ * - Tx-CLK is CLK14
+ */
+#define CONFIG_ETHER_ON_FCC2
+# define CFG_CMXFCR_MASK2	(CMXFCR_FC2|CMXFCR_RF2CS_MSK|CMXFCR_TF2CS_MSK)
+# define CFG_CMXFCR_VALUE2	(CMXFCR_RF2CS_CLK13|CMXFCR_TF2CS_CLK14)
+/*
+ * - RAM for BD/Buffers is on the 60x Bus (see 28-13)
+ * - Enable Full Duplex in FSMR
+ */
+# define CFG_CPMFCR_RAMTYPE	0
+# define CFG_FCC_PSMR		(FCC_PSMR_FDE|FCC_PSMR_LPB)
+
+/* system clock rate (CLKIN) - equal to the 60x and local bus speed */
+#define CONFIG_8260_CLKIN	100000000	/* in Hz */
+
+#if defined(CONFIG_CONS_NONE) || defined(CONFIG_CONS_USE_EXTC)
+#define CONFIG_BAUDRATE		230400
+#else
+#define CONFIG_BAUDRATE		9600
+#endif
+
+#define CONFIG_LOADS_ECHO	1	/* echo on for serial download	*/
+#undef	CFG_LOADS_BAUD_CHANGE		/* don't allow baudrate change	*/
+
+#undef	CONFIG_WATCHDOG			/* watchdog disabled		*/
+
+#define CONFIG_BOOTP_MASK	(CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+
+#ifdef CONFIG_PCI
+#define CONFIG_COMMANDS		(CONFIG_CMD_DFL | \
+				 CFG_CMD_BEDBUG | \
+				 CFG_CMD_DATE	| \
+				 CFG_CMD_DOC	| \
+				 CFG_CMD_EEPROM | \
+				 CFG_CMD_I2C	| \
+				 CFG_CMD_PCI)
+#else	/* ! PCI */
+#define CONFIG_COMMANDS		(CONFIG_CMD_DFL | \
+				 CFG_CMD_BEDBUG | \
+				 CFG_CMD_DATE	| \
+				 CFG_CMD_DOC	| \
+				 CFG_CMD_EEPROM | \
+				 CFG_CMD_I2C	)
+#endif	/* CONFIG_PCI */
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+/*
+ * Disk-On-Chip configuration
+ */
+
+#define CFG_DOC_SHORT_TIMEOUT
+#define CFG_MAX_DOC_DEVICE	1	/* Max number of DOC devices	*/
+
+#define CFG_DOC_SUPPORT_2000
+#define CFG_DOC_SUPPORT_MILLENNIUM
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP			/* undef to save memory		*/
+#define CFG_PROMPT	"=> "		/* Monitor Command Prompt	*/
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE	1024		/* Console I/O Buffer Size	*/
+#else
+#define CFG_CBSIZE	256		/* Console I/O Buffer Size	*/
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS	16		/* max number of command args	*/
+#define CFG_BARGSIZE	CFG_CBSIZE	/* Boot Argument Buffer Size	*/
+
+#define CFG_MEMTEST_START	0x0400000	/* memtest works on	*/
+#define CFG_MEMTEST_END 0x0C00000	/* 4 ... 12 MB in DRAM	*/
+
+#define CFG_LOAD_ADDR	0x100000	/* default load address */
+
+#define CFG_HZ		1000		/* decrementer freq: 1 ms ticks */
+
+#define CFG_BAUDRATE_TABLE	{ 9600, 19200, 38400, 57600, 115200 }
+
+#define CFG_RESET_ADDRESS 0xFDFFFFFC	/* "bad" address		*/
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ	     (8 << 20)	     /* Initial Memory map for Linux */
+
+/*-----------------------------------------------------------------------
+ * Flash and Boot ROM mapping
+ */
+
+#define CFG_BOOTROM_BASE	0xFF800000
+#define CFG_BOOTROM_SIZE	0x00080000
+#define CFG_FLASH0_BASE		0x40000000
+#define CFG_FLASH0_SIZE		0x02000000
+#define CFG_DOC_BASE		0xFF800000
+#define CFG_DOC_SIZE		0x00100000
+
+
+/* Flash bank size (for preliminary settings)
+ */
+#define CFG_FLASH_SIZE CFG_FLASH0_SIZE
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CFG_MAX_FLASH_BANKS	1	/* max num of memory banks	*/
+#define CFG_MAX_FLASH_SECT	135	/* max num of sects on one chip */
+
+#define CFG_FLASH_ERASE_TOUT	240000	/* Flash Erase Timeout (in ms)	*/
+#define CFG_FLASH_WRITE_TOUT	500	/* Flash Write Timeout (in ms)	*/
+
+#if 0
+/* Start port with environment in flash; switch to EEPROM later */
+#define CFG_ENV_IS_IN_FLASH	1
+#define CFG_ENV_ADDR		(CFG_FLASH_BASE+0x40000)
+#define CFG_ENV_SIZE		0x40000
+#define CFG_ENV_SECT_SIZE	0x40000
+#else
+/* Final version: environment in EEPROM */
+#define CFG_ENV_IS_IN_EEPROM	1
+#define CFG_I2C_EEPROM_ADDR	0x58
+#define CFG_I2C_EEPROM_ADDR_LEN 1
+#define CFG_EEPROM_PAGE_WRITE_BITS	4
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS	10	/* and takes up to 10 msec */
+#define CFG_ENV_OFFSET		512
+#define CFG_ENV_SIZE		(2048 - 512)
+#endif
+
+/*-----------------------------------------------------------------------
+ * Hard Reset Configuration Words
+ *
+ * if you change bits in the HRCW, you must also change the CFG_*
+ * defines for the various registers affected by the HRCW e.g. changing
+ * HRCW_DPPCxx requires you to also change CFG_SIUMCR.
+ */
+#if defined(CONFIG_BOOT_ROM)
+#define CFG_HRCW_MASTER		(HRCW_BPS01 | HRCW_CIP | HRCW_ISB100 | HRCW_BMS)
+#else
+#define CFG_HRCW_MASTER		(HRCW_CIP | HRCW_ISB100 | HRCW_BMS)
+#endif
+
+/* no slaves so just fill with zeros */
+#define CFG_HRCW_SLAVE1		0
+#define CFG_HRCW_SLAVE2		0
+#define CFG_HRCW_SLAVE3		0
+#define CFG_HRCW_SLAVE4		0
+#define CFG_HRCW_SLAVE5		0
+#define CFG_HRCW_SLAVE6		0
+#define CFG_HRCW_SLAVE7		0
+
+/*-----------------------------------------------------------------------
+ * Internal Memory Mapped Register
+ */
+#define CFG_IMMR		0xF0000000
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR	CFG_IMMR
+#define CFG_INIT_RAM_END	0x4000	/* End of used area in DPRAM	*/
+#define CFG_GBL_DATA_SIZE	128 /* size in bytes reserved for initial data*/
+#define CFG_GBL_DATA_OFFSET	(CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET	CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ *
+ * 60x SDRAM is mapped at CFG_SDRAM_BASE, local SDRAM
+ * is mapped at SDRAM_BASE2_PRELIM.
+ */
+#define CFG_SDRAM_BASE		0x00000000
+#define CFG_FLASH_BASE		CFG_FLASH0_BASE
+#define CFG_MONITOR_BASE	TEXT_BASE
+#define CFG_MONITOR_LEN		(256 << 10)	/* Reserve 256 kB for Monitor */
+#define CFG_MALLOC_LEN		(128 << 10)	/* Reserve 128 kB for malloc()*/
+
+#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
+# define CFG_RAMBOOT
+#endif
+
+#ifdef	CONFIG_PCI
+#define CONFIG_PCI_PNP
+#define CONFIG_EEPRO100
+#define CFG_RX_ETH_BUFFER	8		/* use 8 rx buffer on eepro100	*/
+#endif
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD		0x01	/* Normal Power-On: Boot from FLASH*/
+#define BOOTFLAG_WARM		0x02	/* Software reboot		   */
+
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE	32	/* For MPC8260 CPU		*/
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#  define CFG_CACHELINE_SHIFT	5	/* log base 2 of the above value */
+#endif
+
+/*-----------------------------------------------------------------------
+ * HIDx - Hardware Implementation-dependent Registers			 2-11
+ *-----------------------------------------------------------------------
+ * HID0 also contains cache control - initially enable both caches and
+ * invalidate contents, then the final state leaves only the instruction
+ * cache enabled. Note that Power-On and Hard reset invalidate the caches,
+ * but Soft reset does not.
+ *
+ * HID1 has only read-only information - nothing to set.
+ */
+#define CFG_HID0_INIT	(HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI|\
+				HID0_IFEM|HID0_ABE)
+#define CFG_HID0_FINAL	(HID0_ICE|HID0_IFEM|HID0_ABE)
+#define CFG_HID2	0
+
+/*-----------------------------------------------------------------------
+ * RMR - Reset Mode Register					 5-5
+ *-----------------------------------------------------------------------
+ * turn on Checkstop Reset Enable
+ */
+#define CFG_RMR		RMR_CSRE
+
+/*-----------------------------------------------------------------------
+ * BCR - Bus Configuration					 4-25
+ *-----------------------------------------------------------------------
+ */
+
+#define BCR_APD01	0x10000000
+#define CFG_BCR		(BCR_APD01|BCR_ETM|BCR_LETM)	/* 8260 mode */
+
+/*-----------------------------------------------------------------------
+ * SIUMCR - SIU Module Configuration				 4-31
+ *-----------------------------------------------------------------------
+ */
+#if 0
+#define CFG_SIUMCR	(SIUMCR_DPPC00|SIUMCR_APPC10|SIUMCR_CS10PC01)
+#else
+#define CFG_SIUMCR	(SIUMCR_DPPC10|SIUMCR_APPC10)
+#endif
+
+
+/*-----------------------------------------------------------------------
+ * SYPCR - System Protection Control				 4-35
+ * SYPCR can only be written once after reset!
+ *-----------------------------------------------------------------------
+ * Watchdog & Bus Monitor Timer max, 60x Bus Monitor enable
+ */
+#if defined(CONFIG_WATCHDOG)
+#define CFG_SYPCR	(SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\
+			 SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE)
+#else
+#define CFG_SYPCR	(SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\
+			 SYPCR_SWRI|SYPCR_SWP)
+#endif /* CONFIG_WATCHDOG */
+
+/*-----------------------------------------------------------------------
+ * TMCNTSC - Time Counter Status and Control			 4-40
+ *-----------------------------------------------------------------------
+ * Clear once per Second and Alarm Interrupt Status, Set 32KHz timersclk,
+ * and enable Time Counter
+ */
+#define CFG_TMCNTSC	(TMCNTSC_SEC|TMCNTSC_ALR|TMCNTSC_TCF|TMCNTSC_TCE)
+
+/*-----------------------------------------------------------------------
+ * PISCR - Periodic Interrupt Status and Control		 4-42
+ *-----------------------------------------------------------------------
+ * Clear Periodic Interrupt Status, Set 32KHz timersclk, and enable
+ * Periodic timer
+ */
+#define CFG_PISCR	(PISCR_PS|PISCR_PTF|PISCR_PTE)
+
+/*-----------------------------------------------------------------------
+ * SCCR - System Clock Control					 9-8
+ *-----------------------------------------------------------------------
+ */
+#define CFG_SCCR	(SCCR_DFBRG00)
+
+/*-----------------------------------------------------------------------
+ * RCCR - RISC Controller Configuration				13-7
+ *-----------------------------------------------------------------------
+ */
+#define CFG_RCCR	0
+
+/*
+ * Init Memory Controller:
+ *
+ * Bank Bus	Machine PortSz	Device
+ * ---- ---	------- ------	------
+ *  0	60x	GPCM	64 bit	FLASH
+ *  1	60x	SDRAM	64 bit	SDRAM
+ *
+ */
+
+	/* Initialize SDRAM on local bus
+	 */
+#define CFG_INIT_LOCAL_SDRAM
+
+
+/* Minimum mask to separate preliminary
+ * address ranges for CS[0:2]
+ */
+#define CFG_MIN_AM_MASK 0xC0000000
+
+/*
+ * we use the same values for 32 MB and 128 MB SDRAM
+ * refresh rate = 7.68 uS (100 MHz Bus Clock)
+ */
+#define CFG_MPTPR	0x2000
+#define CFG_PSRT	0x16
+
+#define CFG_MRS_OFFS	0x00000000
+
+
+#if defined(CONFIG_BOOT_ROM)
+/*
+ * Bank 0 - Boot ROM (8 bit wide)
+ */
+#define CFG_BR0_PRELIM	((CFG_BOOTROM_BASE & BRx_BA_MSK)|\
+			 BRx_PS_8			|\
+			 BRx_MS_GPCM_P			|\
+			 BRx_V)
+
+#define CFG_OR0_PRELIM	(P2SZ_TO_AM(CFG_BOOTROM_SIZE)	|\
+			 ORxG_CSNT			|\
+			 ORxG_ACS_DIV1			|\
+			 ORxG_SCY_5_CLK			|\
+			 ORxG_EHTR			|\
+			 ORxG_TRLX)
+
+/*
+ * Bank 1 - Flash (64 bit wide)
+ */
+#define CFG_BR1_PRELIM	((CFG_FLASH_BASE & BRx_BA_MSK)	|\
+			 BRx_PS_64			|\
+			 BRx_MS_GPCM_P			|\
+			 BRx_V)
+
+#define CFG_OR1_PRELIM	(P2SZ_TO_AM(CFG_FLASH_SIZE)	|\
+			 ORxG_CSNT			|\
+			 ORxG_ACS_DIV1			|\
+			 ORxG_SCY_5_CLK			|\
+			 ORxG_EHTR			|\
+			 ORxG_TRLX)
+
+#else	/* ! CONFIG_BOOT_ROM */
+
+/*
+ * Bank 0 - Flash (64 bit wide)
+ */
+#define CFG_BR0_PRELIM	((CFG_FLASH_BASE & BRx_BA_MSK)	|\
+			 BRx_PS_64			|\
+			 BRx_MS_GPCM_P			|\
+			 BRx_V)
+
+#define CFG_OR0_PRELIM	(P2SZ_TO_AM(CFG_FLASH_SIZE)	|\
+			 ORxG_CSNT			|\
+			 ORxG_ACS_DIV1			|\
+			 ORxG_SCY_5_CLK			|\
+			 ORxG_EHTR			|\
+			 ORxG_TRLX)
+
+/*
+ * Bank 1 - Disk-On-Chip
+ */
+#define CFG_BR1_PRELIM	((CFG_DOC_BASE & BRx_BA_MSK)	|\
+			 BRx_PS_8			|\
+			 BRx_MS_GPCM_P			|\
+			 BRx_V)
+
+#define CFG_OR1_PRELIM	(P2SZ_TO_AM(CFG_DOC_SIZE)	|\
+			 ORxG_CSNT			|\
+			 ORxG_ACS_DIV1			|\
+			 ORxG_SCY_5_CLK			|\
+			 ORxG_EHTR			|\
+			 ORxG_TRLX)
+
+#endif /* CONFIG_BOOT_ROM */
+
+/* Bank 2 - SDRAM
+ */
+
+#ifndef CFG_RAMBOOT
+#define CFG_BR2_PRELIM	((CFG_SDRAM_BASE & BRx_BA_MSK)	|\
+			 BRx_PS_64			|\
+			 BRx_MS_SDRAM_P			|\
+			 BRx_V)
+
+	/* SDRAM initialization values for 8-column chips
+	 */
+#define CFG_OR2_8COL	(CFG_MIN_AM_MASK		|\
+			 ORxS_BPD_4			|\
+			 ORxS_ROWST_PBI0_A9		|\
+			 ORxS_NUMR_12)
+
+#define CFG_PSDMR_8COL	(PSDMR_SDAM_A13_IS_A5		|\
+			 PSDMR_BSMA_A14_A16		|\
+			 PSDMR_SDA10_PBI0_A10		|\
+			 PSDMR_RFRC_7_CLK		|\
+			 PSDMR_PRETOACT_2W		|\
+			 PSDMR_ACTTORW_2W		|\
+			 PSDMR_LDOTOPRE_1C		|\
+			 PSDMR_WRC_1C			|\
+			 PSDMR_CL_2)
+
+	/* SDRAM initialization values for 9-column chips
+	 */
+#define CFG_OR2_9COL	(CFG_MIN_AM_MASK		|\
+			 ORxS_BPD_4			|\
+			 ORxS_ROWST_PBI0_A7		|\
+			 ORxS_NUMR_13)
+
+#define CFG_PSDMR_9COL	(PSDMR_SDAM_A14_IS_A5		|\
+			 PSDMR_BSMA_A13_A15		|\
+			 PSDMR_SDA10_PBI0_A9		|\
+			 PSDMR_RFRC_7_CLK		|\
+			 PSDMR_PRETOACT_2W		|\
+			 PSDMR_ACTTORW_2W		|\
+			 PSDMR_LDOTOPRE_1C		|\
+			 PSDMR_WRC_1C			|\
+			 PSDMR_CL_2)
+
+#define CFG_OR2_PRELIM	 CFG_OR2_9COL
+#define CFG_PSDMR	 CFG_PSDMR_9COL
+
+#endif /* CFG_RAMBOOT */
+
+#endif	/* __CONFIG_H */
--- a/include/configs/PPChameleonEVB.h
+++ b/include/configs/PPChameleonEVB.h
@@ -694,6 +694,4 @@

 #endif /* CONFIG_NO_SERIAL_EEPROM */

-#define CFG_OPB_FREQ	50000000
-
 #endif	/* __CONFIG_H */
--- a/include/configs/RBC823.h
+++ b/include/configs/RBC823.h
@@ -89,35 +89,32 @@
 #define CONFIG_HARD_I2C
 #define CFG_I2C_SPEED 40000
 #define CFG_I2C_SLAVE 0xfe
-#define CFG_I2C_EEPROM_ADDR       0x50
-#define CFG_I2C_EEPROM_ADDR_LEN   1
-#define CFG_EEPROM_WRITE_BITS        4
-#define CFG_EEPROM_WRITE_DELAY_MS   10
+#define CFG_I2C_EEPROM_ADDR		0x50
+#define CFG_I2C_EEPROM_ADDR_LEN		1
+#define CFG_EEPROM_WRITE_BITS		4
+#define CFG_EEPROM_WRITE_DELAY_MS	10

 #define CONFIG_COMMANDS	      ( CFG_CMD_ALL	& \
-				~CFG_CMD_PCMCIA	& \
-				~CFG_CMD_IDE	& \
-				~CFG_CMD_PCI	& \
-				~CFG_CMD_FDC	& \
-				~CFG_CMD_HWFLOW	& \
-				~CFG_CMD_FDOS	& \
-				~CFG_CMD_SCSI	& \
-				~CFG_CMD_SETGETDCR	& \
 				~CFG_CMD_BSP	& \
-				~CFG_CMD_USB	& \
-				~CFG_CMD_VFD	& \
-				~CFG_CMD_SPI	& \
-				/* ~CFG_CMD_I2C	& */ \
-				~CFG_CMD_IRQ	& \
-				~CFG_CMD_NAND	& \
-				~CFG_CMD_JFFS2	& \
+				~CFG_CMD_DATE	& \
 				~CFG_CMD_DTT	& \
+				~CFG_CMD_FDC	& \
+				~CFG_CMD_FDOS	& \
+				~CFG_CMD_HWFLOW	& \
+				~CFG_CMD_IDE	& \
+				~CFG_CMD_IRQ	& \
+				~CFG_CMD_JFFS2	& \
 				~CFG_CMD_MII	& \
 				~CFG_CMD_MMC	& \
-				/*~CFG_CMD_NET	&*/ \
-				/*~CFG_CMD_ELF	&*/ \
-				/* ~CFG_CMD_EEPROM	& */ \
-				~CFG_CMD_DATE	)
+				~CFG_CMD_NAND	& \
+				~CFG_CMD_PCI	& \
+				~CFG_CMD_PCMCIA	& \
+				~CFG_CMD_REISER	& \
+				~CFG_CMD_SCSI	& \
+				~CFG_CMD_SETGETDCR	& \
+				~CFG_CMD_SPI	& \
+				~CFG_CMD_USB	& \
+				~CFG_CMD_VFD	)

 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
 #include <cmd_confdefs.h>
--- a/include/configs/TOP5200.h
+++ b/include/configs/TOP5200.h
@@ -123,7 +123,7 @@
 #define CONFIG_COMMANDS	      ( CONFIG_CMD_DFL	| \
 				ADD_PCI_CMD	| \
 				ADD_USB_CMD	| \
-				ADD_IDE_CMD | \
+				ADD_IDE_CMD	| \
 				CFG_CMD_ASKENV	| \
 				CFG_CMD_DATE	| \
 				CFG_CMD_DHCP	| \
--- a/include/configs/XPEDITE1K.h
+++ b/include/configs/XPEDITE1K.h
@@ -174,6 +174,7 @@ extern void out32(unsigned int, unsigned long);
 #define CONFIG_PHY2_ADDR	4	/* PHY address phy2 */
 #define CONFIG_PHY3_ADDR	8	/* PHY address phy3 */
 #define CONFIG_NET_MULTI	1
+#define CONFIG_PHY_GIGE		1	/* Include GbE speed/duplex detection */
 #define CFG_RX_ETH_BUFFER   32	/* Number of ethernet rx buffers & descriptors */

 #define CONFIG_COMMANDS	       (CONFIG_CMD_DFL	| \
--- a/include/configs/ZPC1900.h
+++ b/include/configs/ZPC1900.h
@@ -130,6 +130,7 @@
 				 CFG_CMD_NAND	| \
 				 CFG_CMD_PCI	| \
 				 CFG_CMD_PCMCIA | \
+				 CFG_CMD_REISER	| \
 				 CFG_CMD_SCSI	| \
 				 CFG_CMD_SPI	| \
 				 CFG_CMD_USB	| \
--- a/include/configs/at91rm9200dk.h
+++ b/include/configs/at91rm9200dk.h
@@ -36,6 +36,8 @@
 #define AT91C_MASTER_CLOCK  59904000  /* peripheral clock (AT91C_MASTER_CLOCK / 3) */
 /* #define AT91C_MASTER_CLOCK  44928000 */  /* peripheral clock (AT91C_MASTER_CLOCK / 4) */

+#define AT91_SLOW_CLOCK		32768	/* slow clock */
+
 #define CONFIG_AT91RM9200DK	 1	/* on an AT91RM9200DK Board      */
 #undef CONFIG_USE_IRQ			/* we don't need IRQ/FIQ stuff */
 #define CONFIG_CMDLINE_TAG	 1	/* enable passing of ATAGs	*/
@@ -50,6 +52,8 @@

 #define CONFIG_BAUDRATE 115200

+#define CFG_AT91C_BRGR_DIVISOR	33	/* hardcode so no __divsi3 : AT91C_MASTER_CLOCK / baudrate / 16 */
+
 /*
 * Hardware drivers
 */
--- a/include/configs/csb272.h
+++ b/include/configs/csb272.h
@@ -300,6 +300,7 @@
 *
 */
 #define CFG_I2C_PLL_ADDR	0x58	/* I2C address of AMIS FS6377-01 PLL */
+#define CONFIG_I2CFAST		1	/* enable "i2cfast" env. setting     */

 /*
 * Internal Definitions
--- a/include/configs/ep8260.h
+++ b/include/configs/ep8260.h
@@ -288,6 +288,7 @@
 					~CFG_CMD_PCI    & \
 					~CFG_CMD_PCMCIA & \
 					~CFG_CMD_SCSI   & \
+					~CFG_CMD_REISER	& \
 					~CFG_CMD_SPI	& \
 					~CFG_CMD_USB	& \
 					~CFG_CMD_VFD	& \
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
wdenk	b79a11cc2b	Code cleanup	2004-03-25 15:14:43 +00:00
wdenk	518e2e1ae3	* Patch by Pavel Bartusek, 21 Mar 2004 Add Reiserfs support * Patch by Hinko Kocevar, 20 Mar 2004 - Add auto-release for SMSC LAN91c111 driver - Add save/restore of PTR and PNR regs as suggested in datasheet	2004-03-25 14:59:05 +00:00
wdenk	6fb6af6dc9	* Patch by Stephen Williams, 19 March 2004 Increase speed of sector reads from SystemACE, shorten poll timeout and remove a useless reset * Patch by Tolunay Orkun, 19 Mar 2004: Make GigE PHY 1000Mbps Speed/Duplex detection conditional (CONFIG_PHY_GIGE) * Patch by Brad Kemp, 18 Mar 2004: prevent machine checks during a PCI scan * Patch by Pierre Aubert, 18 Mar 2004: Fix string cleaning in IDE identification	2004-03-23 23:20:24 +00:00
wdenk	eeb1b77b7d	* Patch by Pierre Aubert, 18 Mar 2004: - Unify video mode handling for Chips & Technologies 69000 Video chip and Silicon Motion SMI 712/710/810 Video chip - Add selection of the video output (CRT or LCD) via 'videoout' environment variable for the Silicon Motion - README update * Patch by Pierre Aubert, 18 Mar 2004: include/common.h typo fix * Patches by Tolunay Orkun, 17 Mar 2004: - Add support for bd->bi_iic_fast[] initialization via environment variable "i2cfast" (CONFIG_I2CFAST) - Add "i2cfast" u-boot environment variable support for csb272	2004-03-23 22:53:55 +00:00
wdenk	27aa818670	* Patch by Carl Riechers, 17 Mar 2004: Ignore '\0' characters in console input for use with telnet and telco pads. * Patch by Leon Kukovec, 17 Mar 2004: typo fix for strswab prototype #ifdef	2004-03-23 22:37:33 +00:00
wdenk	4b9206ed51	* Patches by Thomas Viehweger, 16 Mar 2004: - show PCI clock frequency on MPC8260 systems - add FCC_PSMR_RMII flag for HiP7 processors - in do_jffs2_fsload(), take load address from load_addr if not set explicit, update load_addr otherwise - replaced printf by putc/puts when no formatting is needed (smaller code size, faster execution)	2004-03-23 22:14:11 +00:00
wdenk	109c0e3ad3	* Patch by Phillippe Robin, 16 Mar 2004: avoid dereferencing NULL pointer in lib_arm/armlinux.c * Patch by Stephen Williams, 15 Mar 2004: Fix CONFIG_SERIAL_SOFTWARE_FIFO documentation * Patch by Tolunay Orkun, 15 Mar 2004: Initialize bi_opbfreq to real OPB frequency via get_OPB_freq() * Patch by Travis Sawyer, 15 Mar 2004: Update CREDITS & MAINTAINERS files for PPC440GX & Ocotea port	2004-03-23 21:43:07 +00:00
wdenk	efa329cb89	* Add start-up delay to make sure power has stabilized before attempting to switch on USB on SX1 board. * Patch by Josef Wagner, 18 Mar 2004: - Add support for MicroSys XM250 board (PXA255) - Add support for MicroSys PM828 board (MPC8280) - Add support for 32 MB Flash on PM825/826 - new SDRAM refresh rate for PM825/PM826 - added support for MicroSys PM520 (MPC5200) - replaced Query by Identify command in CPU86/flash.c to support 28F160F3B * Fix wrap around problem with udelay() on ARM920T * Add support for Macronix flash on TRAB board	2004-03-23 20:18:25 +00:00
wdenk	7d7ce4125f	Patch by Pierre Aubert, 15 Mar 2004: Fix buffer overflow in IDE identification	2004-03-17 01:13:07 +00:00
wdenk	d9df1f4e66	* Patch by Steven Scholz, 27 Feb 2004: - Adding get_ticks() and get_tbclk() for AT91RM9200 - Many white space fixes in cpu/at91rm9200/interrupts.c * Patches by Steven Scholz, 20 Feb 2004: some cleanup in AT91RM9200 related code	2004-03-15 09:00:01 +00:00