* Make Ethernet autonegotiation on INCA-IP work for all clock rates;

allow selection of clock frequency as "make" target * Implement memory autosizing code for IceCube boards * Configure network port on INCA-IP for autonegotiation * Fix overflow problem in network timeout code * Patch by Richard Woodruff, 8 Aug 2003: Allow crc32 to be used at address 0x000 (crc32_no_comp, too).
Update for TQM board defaults:
2026-06-13 15:03:58 +03:00 · 2003-08-17 18:55:18 +00:00 · 2003-08-07 22:18:11 +00:00 · 2003-08-07 15:04:48 +00:00 · 2003-08-07 14:52:18 +00:00 · 2003-08-07 14:22:10 +00:00
164 changed files with 3760 additions and 2458 deletions
--- a/116
+++ b/116
@@ -1,3 +1,119 @@
+======================================================================
+Changes for U-Boot 0.4.5:
+======================================================================
+
+* Make Ethernet autonegotiation on INCA-IP work for all clock rates;
+  allow selection of clock frequency as "make" target
+
+* Implement memory autosizing code for IceCube boards
+
+* Configure network port on INCA-IP for autonegotiation
+
+* Fix overflow problem in network timeout code
+
+* Patch by Richard Woodruff, 8 Aug 2003:
+  Allow crc32 to be used at address 0x000 (crc32_no_comp, too).
+
+* Update for TQM board defaults:
+  disable clocks_in_mhz, enable boot count limit
+
+* Removed tools/gdb from "make all" target.  Added make target "gdbtools"
+  in toplevel directory instead.  Removed astest.c from tools/gdb because
+  it is no longer relevant.
+
+* Fix PCI support for MPC5200 / IceCube Board
+
+* Map ISP1362 USB OTG controller for NSCU board
+
+* Patch by Brad Parker, 02 Aug 2003:
+  fix sc520_cdp problems
+
+* Implement Boot Cycle Detection (Req. 2.3 of OSDL CGL Reqirements)
+
+* Allow erase command to cross flash bank boundaries
+
+* Patch by Scott McNutt, 21 Jul 2003:
+  Add support for LynuxWorks Kernel Downloadable Images (KDIs).
+  Both LynxOS and BlueCat linux KDIs are supported.
+
+* Patch by Richard Woodruff, 25 Jul 2003:
+  use more reliable reset for OMAP/925T
+
+* Patch by Nye Liu, 25 Jul 2003:
+  fix typo in mpc8xx.h
+
+* Patch by Richard Woodruff, 24 Jul 2003:
+  Fixes for cmd_nand.c:
+  - Fixed null dereferece which could result in incorrect ECC values.
+  - Added support for devices with no Ready/Busy signal hooked up.
+  - Added OMAP1510 read/write protect handling.
+  - Fixed nand.h's ECCPOS. A conflict existed with POS5 and badblock
+    for non-JFFS2.
+  - Switched default ECC to be JFFS2.
+
+* Allow crc32 to be used at address 0x000
+
+* Provide consistent interface to standalone applications to access
+  the 'global_data' structure
+  Provide a doc/README.standalone more useful to users/developers.
+
+* Make IceCube MGT5100 FEC driver work
+
+* Implement new mechanism to export U-Boot's functions to standalone
+  applications: instead of using (PPC-specific) system calls we now
+  use a jump table; please see doc/README.standalone for details
+
+* Patch by Dave Westwood, 24 Jul 2003:
+  added support for Unity OS (a proprietary OS)
+
+* Patch by Detlev Zundel, 23 Jul 2003:
+  add "imls" command to print flash table of contents
+
+* Fix cold boot detection for log buffer reset
+
+* Return error for invalid length specifiers with "cp.X" etc.
+
+* Fix startup problem on MIPS
+
+* Allow for CONFIG_SPLASH_SCREEN even when no explicit
+  bitmap support is configured
+
+* Patch by Bill Hargen, 18 Jul 2003:
+  - fix endinaness problem in cpu/mpc824x/drivers/i2c/i2c1.c
+
+* Patch by Denis Peter, 18 Jul 2003:
+  - fix memory configuration for MIP405T
+  - fix printout of baudrate for "loadb <loadaddr> <baudrate>"
+
+* Cleanup of TQM82xx configurations; use "official" board types
+  to make selection easier.
+
+* Patch by Martin Krause, 17 Jul 2003:
+  add delay to get I2C working with "imm" command and s3c24x0_i2c.c
+
+* Patch by Richard Woodruff, 17 July 03:
+  - Fixed bug in OMAP1510 baud rate divisor settings. 
+
+* Patch by Nye Liu, 16 July 2003:
+  MPC860FADS fixes:
+  - add MPC86xADS support (uses MPC86xADS.h)
+  - add 866P/T core support (also MPC859T/MPC859DSL/MPC852T)
+    o PLPRCR changes
+    o BRG changes (EXTAL/XTAL restricted to 10MHz)
+    o don't trust gclk() software measurement by default, depend on
+      CONFIG_8xx_GCLK_FREQ
+  - add DRAM SIMM not installed detection
+  - use more "correct" SDRAM initialization sequence
+  - allow different SDRAM sizes (8xxADS has 8M)
+  - default DER is 0
+  - remove unused MAMR defines from FADS860T.h (all done in fads.c)
+  - rename MAMR/MBMR defines to be more consistent. Should eventually
+    be merged into MxMR to better reflect the PowerQUICC datasheet.
+
+* Patch by Yuli Barcohen, 16 Jul 2003:
+  support new Motorola PQ2FADS-ZU evaluation board which replaced
+  MPC8260ADS and MPC8266ADS
+
 ======================================================================
 Changes for U-Boot 0.4.4:
 ======================================================================
--- a/14
+++ b/14
@@ -39,12 +39,12 @@ LIST_8xx="	\
 	IP860		IVML24		IVML24_128	IVML24_256	\
 	IVMS8		IVMS8_128	IVMS8_256	KUP4K           \
 	LANTEC	        lwmon   	MBX		MBX860T		\
-	MHPC		MVS1		NETVIA		NETVIA_V2	\
-	NX823		pcu_e		R360MPI		RBC823		\
-	rmu		RPXClassic	RPXlite		RRvision	\
-	SM850		SPD823TS	svm_sc8xx	SXNI855T	\
-	TOP860		TQM823L		TQM823L_LCD	TQM850L		\
-	TQM855L		TQM860L		v37				\
+	MHPC		MPC86xADS	MVS1		NETVIA		\
+	NETVIA_V2	NX823		pcu_e		R360MPI		\
+	RBC823		rmu		RPXClassic	RPXlite		\
+	RRvision	SM850		SPD823TS	svm_sc8xx	\
+	SXNI855T	TOP860		TQM823L		TQM823L_LCD	\
+	TQM850L		TQM855L		TQM860L		v37		\
 "

 #########################################################################
@@ -80,7 +80,7 @@ LIST_8260="	\
 	gw8260		hymod		IPHASE4539	MPC8260ADS	\
 	MPC8266ADS	PM826		ppmc8260	RPXsuper	\
 	rsdproto	sacsng		sbc8260		SCM		\
-	TQM8260								\
+	TQM8260_AC	TQM8260_AD	TQM8260_AE			\
 "

 #########################################################################
--- a/110
+++ b/110
@@ -116,13 +116,12 @@ LIBS += post/libpost.a post/cpu/libcpu.a
 LIBS += common/libcommon.a
 LIBS += lib_generic/libgeneric.a

+#########################################################################
 #########################################################################

-all:		u-boot.srec u-boot.bin System.map
+ALL = u-boot.srec u-boot.bin System.map

-install:	all
-		-cp u-boot.bin /tftpboot/u-boot.bin
-		-cp u-boot.bin /net/denx/tftpboot/u-boot.bin
+all:		$(ALL)

 u-boot.srec:	u-boot
 		$(OBJCOPY) ${OBJCFLAGS} -O srec $< $@
@@ -130,6 +129,13 @@ u-boot.srec:	u-boot
 u-boot.bin:	u-boot
 		$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@

+u-boot.img:	u-boot.bin
+		./tools/mkimage -A $(ARCH) -T firmware -C none \
+		-a $(TEXT_BASE) -e 0 \
+		-n $(shell sed -n -e 's/.*U_BOOT_VERSION//p' include/version.h | \
+			sed -e 's/"[	 ]*$$/ for $(BOARD) board"/') \
+		-d $< $@
+
 u-boot.dis:	u-boot
 		$(OBJDUMP) -d $< > $@

@@ -142,6 +148,9 @@ u-boot:		depend subdirs $(OBJS) $(LIBS) $(LDSCRIPT)
 subdirs:
 		@for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir || exit 1 ; done

+gdbtools:
+		$(MAKE) -C tools/gdb || exit 1
+
 depend dep:
 		@for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir .depend ; done

@@ -227,6 +236,7 @@ ETX094_config	:	unconfig

 FADS823_config	\
 FADS850SAR_config \
+MPC86xADS_config \
 FADS860T_config:	unconfig
 	@./mkconfig $(@:_config=) ppc mpc8xx fads

@@ -407,6 +417,12 @@ TQM860L_80MHz_config	\
 TQM862L_config		\
 TQM862L_66MHz_config	\
 TQM862L_80MHz_config	\
+TQM823M_config		\
+TQM823M_66MHz_config	\
+TQM823M_80MHz_config	\
+TQM850M_config		\
+TQM850M_66MHz_config	\
+TQM850M_80MHz_config	\
 TQM855M_config		\
 TQM855M_66MHz_config	\
 TQM855M_80MHz_config	\
@@ -661,32 +677,48 @@ sbc8260_config:	unconfig
 SCM_config:		unconfig
 	@./mkconfig $(@:_config=) ppc mpc8260 SCM siemens

-TQM8255_config	\
-TQM8260_config	\
-TQM8260_L2_config	\
-TQM8255_266MHz_config	\
-TQM8260_266MHz_config	\
-TQM8260_L2_266MHz_config \
-TQM8255_300MHz_config	\
-TQM8260_300MHz_config:	unconfig
-	@ >include/config.h
-	@if [ "$(findstring _L2_,$@)" ] ; then \
+TQM8255_AA_config \
+TQM8260_AA_config \
+TQM8260_AB_config \
+TQM8260_AC_config \
+TQM8260_AD_config \
+TQM8260_AE_config \
+TQM8260_AF_config \
+TQM8260_AG_config \
+TQM8260_AH_config \
+TQM8265_AA_config:  unconfig
+	@case "$@" in \
+	TQM8255_AA_config) CTYPE=MPC8255; CFREQ=300; CACHE=no;  BMODE=8260;;  \
+	TQM8260_AA_config) CTYPE=MPC8260; CFREQ=200; CACHE=no;  BMODE=8260;; \
+	TQM8260_AB_config) CTYPE=MPC8260; CFREQ=200; CACHE=yes; BMODE=60x;;  \
+	TQM8260_AC_config) CTYPE=MPC8260; CFREQ=200; CACHE=yes; BMODE=60x;;  \
+	TQM8260_AD_config) CTYPE=MPC8260; CFREQ=300; CACHE=no;  BMODE=60x;;  \
+	TQM8260_AE_config) CTYPE=MPC8260; CFREQ=266; CACHE=no;  BMODE=8260;; \
+	TQM8260_AF_config) CTYPE=MPC8260; CFREQ=300; CACHE=no;  BMODE=60x;;  \
+	TQM8260_AG_config) CTYPE=MPC8260; CFREQ=300; CACHE=no;  BMODE=8260;; \
+	TQM8260_AH_config) CTYPE=MPC8260; CFREQ=300; CACHE=yes; BMODE=60x;;  \
+	TQM8265_AA_config) CTYPE=MPC8265; CFREQ=300; CACHE=no;  BMODE=60x;;  \
+	esac; \
+	>include/config.h ; \
+	if [ "$${CTYPE}" != "MPC8260" ] ; then \
+		echo "#define CONFIG_$${CTYPE}"	>>include/config.h ; \
+	fi; \
+	echo "#define CONFIG_$${CFREQ}MHz"	>>include/config.h ; \
+	echo "... with $${CFREQ}MHz system clock" ; \
+	if [ "$${CACHE}" == "yes" ] ; then \
 		echo "#define CONFIG_L2_CACHE"	>>include/config.h ; \
-		echo "... with L2 Cache support (60x Bus Mode)" ; \
+		echo "... with L2 Cache support" ; \
 	else \
 		echo "#undef CONFIG_L2_CACHE"	>>include/config.h ; \
 		echo "... without L2 Cache support" ; \
+	fi; \
+	if [ "$${BMODE}" == "60x" ] ; then \
+		echo "#define CONFIG_BUSMODE_60x" >>include/config.h ; \
+		echo "... with 60x Bus Mode" ; \
+	else \
+		echo "#undef CONFIG_BUSMODE_60x"  >>include/config.h ; \
+		echo "... without 60x Bus Mode" ; \
 	fi
-	@[ -z "$(findstring _266MHz,$@)" ] || \
-		{ echo "#define CONFIG_266MHz"	>>include/config.h ; \
-		  echo "... with 266MHz system clock" ; \
-		}
-	@[ -z "$(findstring _300MHz,$@)" ] || \
-		{ echo "#define CONFIG_300MHz"	>>include/config.h ; \
-		  echo "... with 300MHz system clock" ; \
-		}
-	@[ -z "$(findstring TQM8255_,$@)" ] || \
-		{ echo "#define CONFIG_MPC8255"	>>include/config.h ; }
 	@./mkconfig -a TQM8260 ppc mpc8260 tqm8260

 atc_config:	unconfig
@@ -816,8 +848,30 @@ sc520_spunk_rel_config	:	unconfig
 ## MIPS32 4Kc
 #########################################################################

-incaip_config :		unconfig
-	@./mkconfig $(@:_config=) mips mips incaip
+xtract_incaip = $(subst _100MHz,,$(subst _133MHz,,$(subst _150MHz,,$(subst _config,,$1))))
+
+incaip_100MHz_config	\
+incaip_133MHz_config	\
+incaip_150MHz_config	\
+incaip_config: unconfig
+	@ >include/config.h
+	@[ -z "$(findstring _100MHz,$@)" ] || \
+		{ echo "#define CPU_CLOCK_RATE 100000000" >>include/config.h ; \
+		  echo "... with 100MHz system clock" ; \
+		}
+	@[ -z "$(findstring _133MHz,$@)" ] || \
+		{ echo "#define CPU_CLOCK_RATE 133000000" >>include/config.h ; \
+		  echo "... with 133MHz system clock" ; \
+		}
+	@[ -z "$(findstring _150MHz,$@)" ] || \
+		{ echo "#define CPU_CLOCK_RATE 150000000" >>include/config.h ; \
+		  echo "... with 150MHz system clock" ; \
+		}
+	@./mkconfig -a $(call xtract_incaip,$@) mips mips incaip
+
+#########################################################################
+## MIPS64 5Kc
+#########################################################################

 purple_config :		unconfig
 	@./mkconfig $(@:_config=) mips mips purple
@@ -847,7 +901,7 @@ clobber:	clean
 		| xargs rm -f
 	rm -f $(OBJS) *.bak tags TAGS
 	rm -fr *.*~
-	rm -f u-boot u-boot.bin u-boot.srec u-boot.map System.map
+	rm -f u-boot u-boot.map $(ALL)
 	rm -f tools/crc32.c tools/environment.c tools/env/crc32.c
 	rm -f tools/inca-swap-bytes cpu/mpc824x/bedbug_603e.c
 	rm -f include/asm/proc include/asm/arch include/asm
--- a/29
+++ b/29
@@ -197,7 +197,7 @@ Directory Hierarchy:
 - board/lwmon	Files specific to LWMON	     boards
 - board/mbx8xx	Files specific to MBX	     boards
 - board/mpc8260ads
-		Files specific to MMPC8260ADS boards
+		Files specific to MPC8260ADS and PQ2FADS-ZU boards
 - board/mpl/	Files specific to boards manufactured by MPL
 - board/mpl/common	Common files for MPL boards
 - board/mpl/pip405	Files specific to PIP405     boards
@@ -383,6 +383,14 @@ The following options need to be configured:
 					  the lcd display every second with
 					  a "rotator" |\-/|\-/

+- Board flavour: (if CONFIG_MPC8260ADS is defined)
+		CONFIG_ADSTYPE
+		Possible values are:
+			CFG_8260ADS	- original MPC8260ADS
+			CFG_8266ADS	- MPC8266ADS (untested)
+			CFG_PQ2FADS	- PQ2FADS-ZU
+
+
 - MPC824X Family Member (if CONFIG_MPC824X is defined)
 	Define exactly one of
 	CONFIG_MPC8240, CONFIG_MPC8245
@@ -989,8 +997,8 @@ The following options need to be configured:
 		is FALSE, it clears it (low).

 		eg: #define I2C_SDA(bit) \
-		         if(bit) immr->im_cpm.cp_pbdat |=  PB_SDA; \
-		         else    immr->im_cpm.cp_pbdat &= ~PB_SDA
+			if(bit) immr->im_cpm.cp_pbdat |=  PB_SDA; \
+			else    immr->im_cpm.cp_pbdat &= ~PB_SDA

 		I2C_SCL(bit)

@@ -998,8 +1006,8 @@ The following options need to be configured:
 		is FALSE, it clears it (low).

 		eg: #define I2C_SCL(bit) \
-		         if(bit) immr->im_cpm.cp_pbdat |=  PB_SCL; \
-		         else    immr->im_cpm.cp_pbdat &= ~PB_SCL
+			if(bit) immr->im_cpm.cp_pbdat |=  PB_SCL; \
+			else    immr->im_cpm.cp_pbdat &= ~PB_SCL

 		I2C_DELAY

@@ -1687,9 +1695,10 @@ Low Level (hardware related) configuration options:

 - CFG_DEFAULT_IMMR:
 		Default address of the IMMR after system reset.
-		Needed on some 8260 systems (MPC8260ADS and RPXsuper)
-		to be able to adjust the position of the IMMR
-		register after a reset.
+
+                Needed on some 8260 systems (MPC8260ADS, PQ2FADS-ZU,
+                and RPXsuper) to be able to adjust the position of
+                the IMMR register after a reset.

 - Floppy Disk Support:
 		CFG_FDC_DRIVE_NUMBER
@@ -1862,7 +1871,7 @@ configurations; the following names are supported:
    GENIETV_config	  TQM823L_config	PIP405_config
    GEN860T_config	  EBONY_config		FPS860L_config
    ELPT860_config	  cmi_mpc5xx_config	NETVIA_config
-    at91rm9200dk_config	  omap1510inn_config
+    at91rm9200dk_config	  omap1510inn_config	MPC8260ADS_config

 Note: for some board special configuration names may exist; check  if
      additional  information is available from the board vendor; for
@@ -2226,7 +2235,7 @@ defines the following image properties:
 * Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
  4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
  LynxOS, pSOS, QNX, RTEMS, ARTOS;
-  Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, ARTOS).
+  Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, ARTOS, LynxOS).
 * Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
  IA64, MIPS, MIPS, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
  Currently supported: PowerPC).
--- a/board/bmw/bmw.c
+++ b/board/bmw/bmw.c
@@ -27,7 +27,6 @@
 #include <command.h>
 #include <malloc.h>
 #include <devices.h>
-#include <syscall.h>
 #include <net.h>
 #include <version.h>
 #include <dtt.h>
--- a/board/eltec/bab7xx/bab7xx.c
+++ b/board/eltec/bab7xx/bab7xx.c
@@ -173,7 +173,7 @@ void after_reloc (ulong dest_addr)
    /*
     * Jump to the main U-Boot board init code
     */
-    board_init_r(gd, dest_addr);
+    board_init_r((gd_t *)gd, dest_addr);
 }

 /* ------------------------------------------------------------------------- */
--- a/board/eltec/elppc/elppc.c
+++ b/board/eltec/elppc/elppc.c
@@ -142,7 +142,7 @@ void after_reloc (ulong dest_addr)
 	/*
 	 * Jump to the main U-Boot board init code
 	 */
-	board_init_r (gd, dest_addr);
+	board_init_r ((gd_t *)gd, dest_addr);
 }

 /* ------------------------------------------------------------------------- */
--- a/board/eltec/mhpc/mhpc.c
+++ b/board/eltec/mhpc/mhpc.c
@@ -254,7 +254,7 @@ long int initdram (int board_type)
    upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint));

    memctl->memc_mamr  = CFG_MAMR & (~(MAMR_PTAE)); /* no refresh yet */
-    memctl->memc_mbmr  = MAMR_GPL_B4DIS;
+    memctl->memc_mbmr  = MBMR_GPL_B4DIS;	/* should this be mamr? - NTL */
    memctl->memc_mptpr = MPTPR_PTP_DIV64;
    memctl->memc_mar   = 0x00008800;

--- a/board/evb64260/evb64260.c
+++ b/board/evb64260/evb64260.c
@@ -329,7 +329,7 @@ after_reloc(ulong dest_addr)
 	}

 	/* now, jump to the main U-Boot board init code */
-	board_init_r (gd, dest_addr);
+	board_init_r ((gd_t *)gd, dest_addr);

 	/* NOTREACHED */
 }
--- a/board/fads/fads.c
+++ b/board/fads/fads.c
--- a/board/flagadm/flagadm.c
+++ b/board/flagadm/flagadm.c
@@ -128,7 +128,7 @@ long int initdram (int board_type)

 	/* That should do it, just enable the periodic refresh in burst of 4*/
 	memctl->memc_mamr = CFG_MAMR_48_SDR | MAMR_TLFA_4X;
-	memctl->memc_mamr |= (MAMR_PTAE | MAMR_GPL_B4DIS);
+	memctl->memc_mamr |= (MAMR_PTAE | MAMR_GPL_A4DIS);

 	size_b0 = 16*1024*1024;

@@ -141,7 +141,7 @@ long int initdram (int board_type)

 	upmconfig(UPMB, (uint *)dsp_disp_table, sizeof(dsp_disp_table)/sizeof(uint));

-	memctl->memc_mbmr = MAMR_GPL_B4DIS;
+	memctl->memc_mbmr = MBMR_GPL_B4DIS;

 	memctl->memc_or4 = CFG_OR4;
 	memctl->memc_br4 = CFG_BR4;
--- a/board/genietv/genietv.c
+++ b/board/genietv/genietv.c
@@ -163,7 +163,7 @@ long int initdram (int board_type)
    memctl->memc_mcr  = 0x80804105;	/* SDRAM bank 1 */

    /* Execute refresh 8 times */
-    memctl->memc_mbmr = (CFG_MBMR_8COL & ~MAMR_TLFB_MSK) | MAMR_TLFB_8X ;
+    memctl->memc_mbmr = (CFG_MBMR_8COL & ~MBMR_TLFB_MSK) | MBMR_TLFB_8X ;

    memctl->memc_mcr  = 0x80802130;	/* SDRAM bank 0 - execute twice */

--- a/board/gth/gth.c
+++ b/board/gth/gth.c
@@ -218,7 +218,7 @@ int _initsdram (uint base, uint * noMbytes)
 			   sizeof (fpga_table) / sizeof (uint));

 	/* Enable UPWAITB */
-	mc->memc_mbmr = MAMR_GPL_B4DIS;	/* (16-13) */
+	mc->memc_mbmr = MBMR_GPL_B4DIS;	/* (16-13) */

 	/* CS2, base FPGA_2_BASE - 4 MByte, use UPM B 32 Bit */
 	mc->memc_or2 = 0xffc00000 | OR_BI;
--- a/board/icecube/icecube.c
+++ b/board/icecube/icecube.c
@@ -23,36 +23,86 @@

 #include <common.h>
 #include <mpc5xxx.h>
+#include <pci.h>
+
+static long int dram_size(long int *base, long int maxsize)
+{
+	volatile long int *addr;
+	ulong cnt, val;
+	ulong save[32];			/* to make test non-destructive */
+	unsigned char i = 0;
+
+	for (cnt = (maxsize / sizeof (long)) >> 1; cnt > 0; cnt >>= 1) {
+		addr = base + cnt;		/* pointer arith! */
+
+		save[i++] = *addr;
+		*addr = ~cnt;
+	}
+
+	/* write 0 to base address */
+	addr = base;
+	save[i] = *addr;
+	*addr = 0;
+
+	/* check at base address */
+	if ((val = *addr) != 0) {
+		*addr = save[i];
+		return (0);
+	}
+
+	for (cnt = 1; cnt < maxsize / sizeof (long); cnt <<= 1) {
+		addr = base + cnt;		/* pointer arith! */
+
+		val = *addr;
+		*addr = save[--i];
+
+		if (val != (~cnt)) {
+			return (cnt * sizeof (long));
+		}
+	}
+	return (maxsize);
+}
+
+static void sdram_start (int hi_addr)
+{
+	long hi_addr_bit = hi_addr ? 0x01000000 : 0;
+
+	/* unlock mode register */
+	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0000 | hi_addr_bit;
+	/* precharge all banks */
+	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0002 | hi_addr_bit;
+	/* set mode register */
+#if defined(CONFIG_MPC5200)
+	*(vu_long *)MPC5XXX_SDRAM_MODE = 0x408d0000;
+#elif defined(CONFIG_MGT5100)
+	*(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000;
+#endif
+	/* precharge all banks */
+	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0002 | hi_addr_bit;
+	/* auto refresh */
+	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0004 | hi_addr_bit;
+	/* set mode register */
+	*(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000;
+	/* normal operation */
+	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0x504f0000 | hi_addr_bit;
+}

 long int initdram (int board_type)
 {
+	ulong test1, test2, dramsize = 0;
 #ifndef CFG_RAMBOOT
 	/* configure SDRAM start/end */
 #if defined(CONFIG_MPC5200)
-	*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x00000018;/* 32M at 0x0 */
-	*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x02000000;/* disabled */
+	*(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e;/* 2G at 0x0 */
+	*(vu_long *)MPC5XXX_SDRAM_CS1CFG = 0x80000000;/* disabled */

 	/* setup config registers */
 	*(vu_long *)MPC5XXX_SDRAM_CONFIG1 = 0xc2233a00;
 	*(vu_long *)MPC5XXX_SDRAM_CONFIG2 = 0x88b70004;

-	/* unlock mode register */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0000;
-	/* precharge all banks */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0002;
-	/* set mode register */
-	*(vu_long *)MPC5XXX_SDRAM_MODE = 0x408d0000;
-	/* precharge all banks */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0002;
-	/* auto refresh */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd04f0004;
-	/* set mode register */
-	*(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000;
-	/* normal operation */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0x504f0000;
 #elif defined(CONFIG_MGT5100)
 	*(vu_long *)MPC5XXX_SDRAM_START = 0x00000000;
-	*(vu_long *)MPC5XXX_SDRAM_STOP = 0x000007ff;/* 64M */
+	*(vu_long *)MPC5XXX_SDRAM_STOP = 0x0000ffff;/* 2G */
 	*(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */

 	/* setup config registers */
@@ -61,33 +111,32 @@ long int initdram (int board_type)

 	/* address select register */
 	*(vu_long *)MPC5XXX_SDRAM_XLBSEL = 0x03000000;
-
-	/* unlock mode register */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd14f0000;
-	/* precharge all banks */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd14f0002;
-	/* set mode register */
-	*(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000;
-	/* precharge all banks */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd14f0002;
-	/* auto refresh */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0xd14f0004;
-	/* set mode register */
-	*(vu_long *)MPC5XXX_SDRAM_MODE = 0x008d0000;
-	/* normal operation */
-	*(vu_long *)MPC5XXX_SDRAM_CTRL = 0x514f0000;
 #endif
+	sdram_start(0);
+	test1 = dram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
+	sdram_start(1);
+	test2 = dram_size((ulong *)CFG_SDRAM_BASE, 0x80000000);
+	if (test1 > test2) {
+		sdram_start(0);
+		dramsize = test1;
+	} else {
+		dramsize = test2;
+	}
+#if defined(CONFIG_MPC5200)
+	*(vu_long *)MPC5XXX_SDRAM_CS0CFG =
+		(0x13 + __builtin_ffs(dramsize >> 20) - 1);
+	*(vu_long *)MPC5XXX_SDRAM_CS1CFG = dramsize; /* disabled */
+#elif defined(CONFIG_MGT5100)
+	*(vu_long *)MPC5XXX_SDRAM_STOP = ((dramsize - 1) >> 15);
+#endif
+
 #else
 #ifdef CONFIG_MGT5100
 	*(vu_long *)MPC5XXX_ADDECR |= (1 << 22); /* Enable SDRAM */
 #endif
 #endif
 	/* return total ram size */
-#if defined(CONFIG_MGT5100)
-	return (64 * 1024 * 1024);
-#elif defined(CONFIG_MPC5200)
-	return (32 * 1024 * 1024);
-#endif
+	return dramsize;
 }

 int checkboard (void)
@@ -114,3 +163,14 @@ void flash_preinit(void)
 #endif
 	*(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
 }
+
+#ifdef	CONFIG_PCI
+static struct pci_controller hose;
+
+extern void pci_mpc5xxx_init(struct pci_controller *);
+
+void pci_init_board(void)
+{
+	pci_mpc5xxx_init(&hose);
+}
+#endif
--- a/board/ivm/ivm.c
+++ b/board/ivm/ivm.c
@@ -246,14 +246,14 @@ initdram (int board_type)
    udelay(1);
    memctl->memc_mcr = 0x80806130;	/* autorefresh */

-    memctl->memc_mbmr |= MAMR_PTBE;	/* refresh enabled */
+    memctl->memc_mbmr |= MBMR_PTBE;	/* refresh enabled */

    /*
     * Check Bank 0 Memory Size for re-configuration
     */
    size_b0 = dram_size (CFG_MBMR_8COL, (ulong *)SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE);

-    memctl->memc_mbmr = CFG_MBMR_8COL | MAMR_PTBE;
+    memctl->memc_mbmr = CFG_MBMR_8COL | MBMR_PTBE;

    return (size_b0);
 }
--- a/board/lantec/lantec.c
+++ b/board/lantec/lantec.c
@@ -149,7 +149,7 @@ long int initdram (int board_type)
 	udelay(1);		/* 0x80006106 */
 	memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF(1) | MCR_MAD(0x06);

-	memctl->memc_mamr |= MAMR_PTBE;	/* refresh enabled */
+	memctl->memc_mamr |= MAMR_PTAE;	/* refresh enabled */

 	udelay(200);

@@ -170,7 +170,7 @@ long int initdram (int board_type)
 			     (ulong *)SDRAM_BASE3_PRELIM,
 			     SDRAM_MAX_SIZE);

-	memctl->memc_mamr = CFG_MAMR_8COL | MAMR_PTBE;
+	memctl->memc_mamr = CFG_MAMR_8COL | MAMR_PTAE;

 	/*
 	 * Final mapping:
--- a/board/lwmon/lwmon.c
+++ b/board/lwmon/lwmon.c
@@ -246,7 +246,7 @@ long int initdram (int board_type)
 	udelay (1);				/* 0x80006106 */
 	memctl->memc_mcr = MCR_OP_RUN | MCR_MB_CS3 | MCR_MLCF (1) | MCR_MAD (0x06);

-	memctl->memc_mamr |= MAMR_PTBE;	/* refresh enabled */
+	memctl->memc_mamr |= MAMR_PTAE;	/* refresh enabled */

 	udelay (200);

@@ -276,11 +276,11 @@ long int initdram (int board_type)

 	if (size8 < size9) {		/* leave configuration at 9 columns */
 		size_b0 = size9;
-		memctl->memc_mamr = CFG_MAMR_9COL | MAMR_PTBE;
+		memctl->memc_mamr = CFG_MAMR_9COL | MAMR_PTAE;
 		udelay (500);
 	} else {			/* back to 8 columns            */
 		size_b0 = size8;
-		memctl->memc_mamr = CFG_MAMR_8COL | MAMR_PTBE;
+		memctl->memc_mamr = CFG_MAMR_8COL | MAMR_PTAE;
 		udelay (500);
 	}

@@ -1077,7 +1077,7 @@ static int key_pressed(void)
 * Returns 1 if keys pressed to start the power-on long-running tests
 * Called from board_init_f().
 */
-int post_hotkeys_pressed(gd_t *gd)
+int post_hotkeys_pressed(void)
 {
 	uchar kbd_data[KEYBD_DATALEN];
 	uchar val;
--- a/board/mpc8260ads/mpc8260ads.c
+++ b/board/mpc8260ads/mpc8260ads.c
@@ -198,11 +198,19 @@ void reset_phy (void)
 	vu_long *bcsr = (vu_long *)CFG_BCSR;

 	/* reset the FEC port */
-	bcsr[1] &= ~FETH_RST;
+	bcsr[1] &= ~FETH1_RST;
 	udelay(2);
-	bcsr[1] |=  FETH_RST;
+	bcsr[1] |=  FETH1_RST;
 	udelay(1000);
 #ifdef CONFIG_MII
+#if CONFIG_ADSTYPE == CFG_PQ2FADS
+	/*
+	 * Do not bypass Rx/Tx (de)scrambler (fix configuration error)
+	 * Enable autonegotiation.
+	 */
+	miiphy_write(0, 16, 0x610);
+	miiphy_write(0, PHY_BMCR, PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
+#else
 	/*
 	 * Ethernet PHY is configured (by means of configuration pins)
 	 * to work at 10Mb/s only. We reconfigure it using MII
@@ -212,6 +220,7 @@ void reset_phy (void)
 	miiphy_write(0, PHY_ANAR, 0x01E1); /* Advertise all capabilities */
 	miiphy_write(0, PHY_DCR,  0x0000); /* Do not bypass Rx/Tx (de)scrambler */
 	miiphy_write(0, PHY_BMCR, PHY_BMCR_AUTON | PHY_BMCR_RST_NEG);
+#endif /* CONFIG_ADSTYPE == CFG_PQ2FADS */
 #endif /* CONFIG_MII */
 }

@@ -219,7 +228,7 @@ int board_pre_init (void)
 {
 	vu_long *bcsr = (vu_long *)CFG_BCSR;

-	bcsr[1] = ~FETHIEN & ~RS232EN_1;
+	bcsr[1] = ~FETHIEN1 & ~RS232EN_1;

 	return 0;
 }
@@ -231,12 +240,10 @@ long int initdram (int board_type)
 	volatile immap_t *immap = (immap_t *) CFG_IMMR;
 	volatile memctl8260_t *memctl = &immap->im_memctl;
 	volatile uchar *ramaddr, c = 0xff;
-
-	/* Initialisation is for 16MB DIMM the board is shipped with */
-	long int msize = 16;
-	uint or    = 0xFF000CA0;
-	uint psdmr = CFG_PSDMR;
-	uint psrt  = CFG_PSRT;
+	long int msize;
+	uint or;
+	uint psdmr;
+	uint psrt;

 	int i;

@@ -246,22 +253,29 @@ long int initdram (int board_type)
 	immap->im_siu_conf.sc_tescr1   = 0x00004000;

 	memctl->memc_mptpr = CFG_MPTPR;
-	/* init local sdram, bank 4 */
-	memctl->memc_lsrt  = 0x00000010;
+#ifdef CFG_LSDRAM_BASE
+	/* Init local bus SDRAM */
+	memctl->memc_lsrt  = CFG_LSRT;
+#if CONFIG_ADSTYPE == CFG_PQ2FADS /* CS3 */
+	memctl->memc_or3   = 0xFF803280;
+	memctl->memc_br3   = CFG_LSDRAM_BASE | 0x00001861;
+#else  				  /* CS4 */
 	memctl->memc_or4   = 0xFFC01480;
-	memctl->memc_br4   = 0x04001861;
-	memctl->memc_lsdmr = 0x2886A522;
+	memctl->memc_br4   = CFG_LSDRAM_BASE | 0x00001861;
+#endif /* CONFIG_ADSTYPE == CFG_PQ2FADS */
+	memctl->memc_lsdmr = CFG_LSDMR | 0x28000000;
 	ramaddr = (uchar *) CFG_LSDRAM_BASE;
 	*ramaddr = c;
-	memctl->memc_lsdmr = 0x0886A522;
+	memctl->memc_lsdmr = CFG_LSDMR | 0x08000000;
 	for (i = 0; i < 8; i++) {
 		*ramaddr = c;
 	}
-	memctl->memc_lsdmr = 0x1886A522;
+	memctl->memc_lsdmr = CFG_LSDMR | 0x18000000;
 	*ramaddr = c;
-	memctl->memc_lsdmr = 0x4086A522;
+	memctl->memc_lsdmr = CFG_LSDMR | 0x40000000;
+#endif /* CFG_LSDRAM_BASE */

-	/* init sdram dimm */
+	/* Init 60x bus SDRAM */
 #ifdef CONFIG_SPD_EEPROM
 	{
 		spd_eeprom_t spd;
@@ -398,6 +412,16 @@ long int initdram (int board_type)
 		printf ("OR=%X, PSDMR=%08X, PSRT=%0X\n", or, psdmr, psrt);
 #endif /* SPD_DEBUG */
 	}
+#else  /* !CONFIG_SPD_EEPROM */
+#if CONFIG_ADSTYPE == CFG_PQ2FADS
+	msize = 32;
+	or = 0xFE002EC0;
+#else
+	msize = 16;
+	or = 0xFF000CA0;
+#endif /* CONFIG_ADSTYPE == CFG_PQ2FADS */
+	psdmr = CFG_PSDMR;
+	psrt  = CFG_PSRT;
 #endif /* CONFIG_SPD_EEPROM */
 	memctl->memc_psrt = psrt;
 	memctl->memc_or2 = or;
@@ -415,12 +439,20 @@ long int initdram (int board_type)
 	*ramaddr = c;
 #endif

-	/* return total ram size of DIMM */
+	/* return total 60x bus SDRAM size */
 	return (msize * 1024 * 1024);
 }

 int checkboard (void)
 {
+#if   CONFIG_ADSTYPE == CFG_8260ADS
 	puts ("Board: Motorola MPC8260ADS\n");
+#elif CONFIG_ADSTYPE == CFG_8266ADS
+	puts ("Board: Motorola MPC8266ADS\n");
+#elif CONFIG_ADSTYPE == CFG_PQ2FADS
+	puts ("Board: Motorola PQ2FADS-ZU\n");
+#else
+	puts ("Board: unknown\n");
+#endif
 	return 0;
 }
--- a/board/mpl/common/flash.c
+++ b/board/mpl/common/flash.c
@@ -105,6 +105,8 @@ unsigned long flash_init (void)
 			CFG_MONITOR_BASE+monitor_flash_len-1,
 			&flash_info[0]);
 #endif
+	/* protect reset vector */
+	flash_info[0].protect[flash_info[0].sector_count-1] = 1;
 	size_b1 = 0 ;
 	flash_info[0].size = size_b0;
 #if 0
--- a/board/mpl/common/memtst.c
+++ b/board/mpl/common/memtst.c
@@ -494,7 +494,7 @@ void mem_test_reloc(void)
 }


-int mem_test (unsigned long start, unsigned long ramsize, int quiet, int reloc)
+int mem_test (unsigned long start, unsigned long ramsize, int quiet)
 {
 	unsigned long errors, stage;
 	unsigned long startaddr, size, i;
--- a/board/mpl/common/pci_parts.h
+++ b/board/mpl/common/pci_parts.h
@@ -110,7 +110,7 @@ static struct pci_pip405_config_entry piix4_ide_cntrl_f1[] = {
 #if !defined(CONFIG_MIP405T)
 	{PCI_CFG_PIIX4_IDETIM,	0x80008000,	4}, /* enable Both IDE channels	*/
 #else
-	{PCI_CFG_PIIX4_IDETIM,	0x80000000,	4}, /* enable IDE channel0	*/
+	{PCI_CFG_PIIX4_IDETIM,	0x00008000,	4}, /* enable IDE channel0	*/
 #endif
 	{ }					    /* end of device table 	*/
 };
--- a/board/mpl/mip405/mip405.c
+++ b/board/mpl/mip405/mip405.c
@@ -69,6 +69,7 @@
 #include <miiphy.h>
 #include "../common/common_util.h"
 #include <i2c.h>
+#include <rtc.h>
 extern block_dev_desc_t * scsi_get_dev(int dev);
 extern block_dev_desc_t * ide_get_dev(int dev);

@@ -110,14 +111,14 @@ typedef struct {
 } sdram_t;
 #if defined(CONFIG_MIP405T)
 const sdram_t sdram_table[] = {
-	{ 0x01,	/* MIP405T Rev A, 64MByte -1 Board */
+	{ 0x0F,	/* MIP405T Rev A, 64MByte -1 Board */
 		3,	/* Case Latenty = 3 */
 		3,	/* trp 20ns / 7.5 ns datain[27] */
 		3,	/* trcd 20ns /7.5 ns (datain[29]) */
 		6,	/* tras 44ns /7.5 ns  (datain[30]) */
 		4,	/* tcpt 44 - 20ns = 24ns */
-		3,	/* Address Mode = 3 (13x9x4) */
-		4,	/* size value (64MByte) */
+		2,	/* Address Mode = 2 (12x9x4) */
+		3,	/* size value (32MByte) */
 		0},	/* ECC disabled */
 	{ 0xff, /* terminator */
 	  0xff,
@@ -281,11 +282,6 @@ int init_sdram (void)
 	if((bc & 0x80)==0x80)
 		SDRAM_err ("U-Boot configured for a MIP405 not for a MIP405T!!!\n");
 #endif
-#if !defined(CONFIG_MIP405T)
-	/* since the ECC initialisation needs some time,
-	 * we show that we're alive
-	 */
-	serial_puts ("\nInitializing SDRAM, Please stand by");
 	/* set-up the chipselect machine */
 	mtdcr (ebccfga, pb0cr);		/* get cs0 config reg */
 	tmp = mfdcr (ebccfgd);
@@ -311,7 +307,6 @@ int init_sdram (void)
 	mtdcr (ebccfgd, UART1_AP);
 	mtdcr (ebccfga, pb3cr);
 	mtdcr (ebccfgd, UART1_CR);
-#endif
 	bc = in8 (PLD_BOARD_CFG_REG);
 #ifdef SDRAM_DEBUG
 	serial_puts ("\nstart SDRAM Setup\n");
@@ -333,6 +328,11 @@ int init_sdram (void)
 	write_hex (i);
 	serial_puts (" \n");
 #endif
+	/* since the ECC initialisation needs some time,
+	 * we show that we're alive
+	 */
+	if (sdram_table[i].ecc)
+		serial_puts ("\nInitializing SDRAM, Please stand by");
 	cal_val = sdram_table[i].cal - 1;	/* Cas Latency */
 	trp_clocks = sdram_table[i].trp;	/* 20ns / 7.5 ns datain[27] */
 	trcd_clocks = sdram_table[i].trcd;	/* 20ns /7.5 ns (datain[29]) */
@@ -559,7 +559,7 @@ void get_pcbrev_var(unsigned char *pcbrev, unsigned char *var)
 	unsigned char bc;
 	bc = in8 (PLD_BOARD_CFG_REG);
 	*pcbrev=(bc >> 4) & 0xf;
-	*var=bc & 0xf ;
+	*var=16-(bc & 0xf);
 #endif
 }

@@ -654,8 +654,6 @@ long int initdram (int board_type)

 /* ------------------------------------------------------------------------- */

-extern int mem_test (unsigned long start, unsigned long ramsize,
-					 int quiet);

 static int test_dram (unsigned long ramsize)
 {
@@ -666,8 +664,15 @@ static int test_dram (unsigned long ramsize)
 	return (1);
 }

+/* used to check if the time in RTC is valid */
+static unsigned long start;
+static struct rtc_time tm;
+
 int misc_init_r (void)
 {
+	/* check, if RTC is running */
+	rtc_get (&tm);
+	start=get_timer(0);
 	/* if MIP405 has booted from PCI, reset CCR0[24] as described in errata PCI_18 */
 	if (mfdcr(strap) & PSR_ROM_LOC)
 	       mtspr(ccr0, (mfspr(ccr0) & ~0x80));
@@ -688,9 +693,13 @@ void print_mip405_rev (void)
 }

 extern void mem_test_reloc(void);
+extern int mk_date (char *, struct rtc_time *);

 int last_stage_init (void)
 {
+	unsigned long stop;
+	struct rtc_time newtm;
+	unsigned char *s;
 	mem_test_reloc();
 	/* write correct LED configuration */
 	if (miiphy_write (0x1, 0x14, 0x2402) != 0) {
@@ -704,6 +713,25 @@ int last_stage_init (void)
 	print_mip405_rev ();
 	show_stdio_dev ();
 	check_env ();
+	/* check if RTC time is valid */
+	stop=get_timer(start);
+	while(stop<1200) {   /* we wait 1.2 sec to check if the RTC is running */
+		udelay(1000);
+		stop=get_timer(start);
+	}
+	rtc_get (&newtm);
+	if(tm.tm_sec==newtm.tm_sec) {
+		s=getenv("defaultdate");
+		if(!s)
+			mk_date ("010112001970", &newtm);
+		else
+			if(mk_date (s, &newtm)!=0) {
+				printf("RTC: Bad date format in defaultdate\n");
+				return 0;
+			}
+		rtc_reset ();
+		rtc_set(&newtm);
+	}
 	return 0;
 }

@@ -745,10 +773,10 @@ void print_mip405_info (void)
 	printf ("SER1 uses handshakes %s\n",
 			(ext & 0x80) ? "DTR/DSR" : "RTS/CTS");
 #else
-	printf ("User Config Switch %d %d %d %d %d %d %d %d %d\n",
+	printf ("User Config Switch %d %d %d %d %d %d %d %d\n",
 			(ext) & 0x1, (ext >> 1) & 0x1, (ext >> 2) & 0x1,
 			(ext >> 3) & 0x1, (ext >> 4) & 0x1, (ext >> 5) & 0x1,
-			(ext >> 6) & 0x1,(ext >> 7) & 0x1,(ext >> 8) & 0x1);
+			(ext >> 6) & 0x1,(ext >> 7) & 0x1);
 #endif
 	printf ("IDE Reset %s\n", (ext & 0x01) ? "asserted" : "not asserted");
 	printf ("IRQs:\n");
--- a/board/mvs1/u-boot.lds
+++ b/board/mvs1/u-boot.lds
@@ -57,7 +57,6 @@ SECTIONS
    /* the sector layout of our flash chips!	XXX FIXME XXX	*/

    cpu/mpc8xx/start.o		(.text)
-    cpu/mpc8xx/speed.o		(.text)
    common/dlmalloc.o		(.text)
    lib_ppc/ppcstring.o		(.text)
    lib_generic/vsprintf.o	(.text)
@@ -67,7 +66,6 @@ SECTIONS
    lib_generic/string.o	(.text)
    lib_ppc/extable.o		(.text)
    lib_ppc/kgdb.o		(.text)
-/*  lib_ppc/ticks.o		(.text) */

  . = env_offset;
    common/environment.o(.text)
--- a/board/pcippc2/pcippc2.c
+++ b/board/pcippc2/pcippc2.c
@@ -112,7 +112,7 @@ void after_reloc (ulong dest_addr)

 	/* Jump to the main U-Boot board init code
 	 */
-	board_init_r (gd, dest_addr);
+	board_init_r ((gd_t *)gd, dest_addr);
 }

 int misc_init_r (void)
--- a/board/r360mpi/r360mpi.c
+++ b/board/r360mpi/r360mpi.c
@@ -205,7 +205,7 @@ long int initdram (int board_type)
 	memctl->memc_br3 = CFG_BR3_CAN;

 	/* Initialize MBMR */
-	memctl->memc_mbmr = MAMR_GPL_B4DIS;	/* GPL_B4 works as UPWAITB */
+	memctl->memc_mbmr = MBMR_GPL_B4DIS;	/* GPL_B4 works as UPWAITB */

 	/* Initialize UPMB for CAN: single read */
 	memctl->memc_mdr = 0xFFFFC004;
--- a/board/sc520_cdp/Makefile
+++ b/board/sc520_cdp/Makefile
@@ -29,7 +29,7 @@ OBJS	:= sc520_cdp.o flash.o
 SOBJS	:= sc520_cdp_asm.o sc520_cdp_asm16.o

 $(LIB):	$(OBJS) $(SOBJS)
-	$(AR) crv $@ $(OBJS)
+	$(AR) crv $@ $(OBJS) $(SOBJS)

 clean:
 	rm -f $(SOBJS) $(OBJS)
--- a/board/sc520_cdp/flash.c
+++ b/board/sc520_cdp/flash.c
@@ -325,7 +325,7 @@ void flash_print_info(flash_info_t *info)
 	}
 	printf ("\n");

-	done:
+done:	;
 }

 /*-----------------------------------------------------------------------
--- a/board/sc520_cdp/sc520_cdp.c
+++ b/board/sc520_cdp/sc520_cdp.c
@@ -28,7 +28,7 @@
 #include <asm/pci.h>
 #include <asm/ic/sc520.h>
 #include <asm/ic/ali512x.h>
-#include <ssi.h>
+#include <spi.h>

 #undef SC520_CDP_DEBUG

@@ -557,6 +557,19 @@ void ssi_chip_select(int dev)
 	}
 }

+void spi_eeprom_probe(int x)
+{
+}
+
+int spi_eeprom_read(int x, int offset, char *buffer, int len)
+{
+       return 0;
+}
+
+int spi_eeprom_write(int x, int offset, char *buffer, int len)
+{
+       return 0;
+}

 void spi_init_f(void)
 {
@@ -585,6 +598,9 @@ ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len)
 #endif
 #ifdef CONFIG_SC520_CDP_USE_MW
 	res = mw_eeprom_read(2, offset, buffer, len);
+#endif
+#if !defined(CONFIG_SC520_CDP_USE_SPI) && !defined(CONFIG_SC520_CDP_USE_MW)
+	res = 0;
 #endif
 	return res;
 }
@@ -606,6 +622,9 @@ ssize_t spi_write(uchar *addr, int alen, uchar *buffer, int len)
 #endif
 #ifdef CONFIG_SC520_CDP_USE_MW
 	res = mw_eeprom_write(2, offset, buffer, len);
+#endif
+#if !defined(CONFIG_SC520_CDP_USE_SPI) && !defined(CONFIG_SC520_CDP_USE_MW)
+	res = 0;
 #endif
 	return res;
 }
--- a/board/sc520_cdp/u-boot.lds
+++ b/board/sc520_cdp/u-boot.lds
@@ -31,7 +31,7 @@ SECTIONS
 	.text  : { *(.text); }

 	. = ALIGN(4);
-	.rodata : { *(.rodata) }
+	.rodata : { *(.rodata) *(.rodata.str1.1) *(.rodata.str1.32) }

 	. = 0x400000; 	                    /* Ram data segment to use */
 	_i386boot_romdata_dest = ABSOLUTE(.);
--- a/board/siemens/CCM/ccm.c
+++ b/board/siemens/CCM/ccm.c
@@ -267,7 +267,7 @@ void can_driver_enable (void)
    volatile memctl8xx_t *memctl = &immap->im_memctl;

    /* Initialize MBMR */
-    memctl->memc_mbmr = MAMR_GPL_B4DIS;	/* GPL_B4 ouput line Disable */
+    memctl->memc_mbmr = MBMR_GPL_B4DIS;	/* GPL_B4 ouput line Disable */

    /* Initialize UPMB for CAN: single read */
    memctl->memc_mdr = 0xFFFFC004;
--- a/board/siemens/pcu_e/pcu_e.c
+++ b/board/siemens/pcu_e/pcu_e.c
@@ -217,9 +217,9 @@ initdram (int board_type)
 #endif	/* XXX */

    reg  =  memctl->memc_mamr;
-    reg &= ~MAMR_TLFB_MSK;		/* switch timer loop ... */
-    reg |=  MAMR_TLFB_4X;		/* ... to 4x */
-    reg |=  MAMR_PTBE;			/* enable refresh */
+    reg &= ~MAMR_TLFA_MSK;		/* switch timer loop ... */
+    reg |=  MAMR_TLFA_4X;		/* ... to 4x */
+    reg |=  MAMR_PTAE;			/* enable refresh */
    memctl->memc_mamr = reg;

    udelay(200);
@@ -246,7 +246,7 @@ initdram (int board_type)
    size_b0 = dram_size (CFG_MAMR, (ulong *)SDRAM_BASE2_PRELIM, SDRAM_MAX_SIZE);
 #endif	/* XXX */

-    memctl->memc_mamr = CFG_MAMR | MAMR_PTBE;
+    memctl->memc_mamr = CFG_MAMR | MAMR_PTAE;

    /*
     * Final mapping:
--- a/board/spd8xx/spd8xx.c
+++ b/board/spd8xx/spd8xx.c
@@ -200,14 +200,14 @@ initdram (int board_type)
    udelay(1);
    memctl->memc_mcr = 0x80806106;

-    memctl->memc_mbmr |= MAMR_PTBE;	/* refresh enabled */
+    memctl->memc_mbmr |= MBMR_PTBE;	/* refresh enabled */

    /*
     * Check Bank 0 Memory Size for re-configuration
     */
    size_b0 = dram_size (CFG_MBMR_8COL, (ulong *)SDRAM_BASE3_PRELIM, SDRAM_MAX_SIZE);

-    memctl->memc_mbmr = CFG_MBMR_8COL | MAMR_PTBE;
+    memctl->memc_mbmr = CFG_MBMR_8COL | MBMR_PTBE;

    return (size_b0);
 }
--- a/board/tqm8xx/flash.c
+++ b/board/tqm8xx/flash.c
@@ -116,14 +116,15 @@ unsigned long flash_init (void)

 #ifdef	CFG_ENV_IS_IN_FLASH
 	/* ENV protection ON by default */
-	debug ("Protect %senvironment: %08lx ... %08lx\n",
 # ifdef CFG_ENV_ADDR_REDUND
-		"primary   ",
-# else
-		"",
-# endif
+	debug ("Protect primary   environment: %08lx ... %08lx\n",
 		(ulong)CFG_ENV_ADDR,
 		(ulong)CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1);
+# else
+	debug ("Protect environment: %08lx ... %08lx\n",
+		(ulong)CFG_ENV_ADDR,
+		(ulong)CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1);
+# endif

 	flash_protect(FLAG_PROTECT_SET,
 		      CFG_ENV_ADDR,
--- a/board/tqm8xx/tqm8xx.c
+++ b/board/tqm8xx/tqm8xx.c
@@ -363,7 +363,13 @@ long int initdram (int board_type)
 	memctl->memc_mcr = 0x011C | UPMB;
 #endif							/* CONFIG_CAN_DRIVER */

-
+#ifdef	CONFIG_ISP1362_USB
+	/* Initialize OR5 / BR5 */
+	memctl->memc_or5 = CFG_OR5_ISP1362;
+	memctl->memc_br5 = CFG_BR5_ISP1362;
+#endif							/* CONFIG_ISP1362_USB */
+	    
+	    
 	return (size_b0 + size_b1);
 }

--- a/board/v37/v37.c
+++ b/board/v37/v37.c
@@ -140,7 +140,7 @@ long int initdram (int board_type)
    memctl->memc_br3 = CFG_BR3_CAN;

    /* Initialize MBMR */
-    memctl->memc_mamr = MAMR_GPL_B4DIS;	/* GPL_B4 ouput line Disable */
+    memctl->memc_mamr = MAMR_GPL_A4DIS;	/* GPL_A4 ouput line Disable */

    /* Initialize UPMB for CAN: single read */
    memctl->memc_mdr = 0xFFFFC004;
--- a/common/Makefile
+++ b/common/Makefile
@@ -42,9 +42,9 @@ COBJS	= main.o altera.o bedbug.o \
 	  cmd_reginfo.o cmd_scsi.o cmd_spi.o cmd_usb.o cmd_vfd.o \
 	  command.o console.o devices.o dlmalloc.o docecc.o \
 	  environment.o env_common.o \
-	  env_flash.o env_eeprom.o env_nvram.o env_nowhere.o \
+	  env_flash.o env_eeprom.o env_nvram.o env_nowhere.o exports.o \
 	  flash.o fpga.o \
-	  hush.o kgdb.o lists.o miiphybb.o miiphyutil.o \
+	  hush.o kgdb.o lists.o lynxkdi.o miiphybb.o miiphyutil.o \
 	  s_record.o soft_i2c.o soft_spi.o spartan2.o \
 	  usb.o usb_kbd.o usb_storage.o \
 	  virtex2.o xilinx.o
--- a/common/cmd_boot.c
+++ b/common/cmd_boot.c
@@ -27,13 +27,15 @@
 #include <common.h>
 #include <command.h>
 #include <net.h>
-#include <syscall.h>


 /* -------------------------------------------------------------------- */

 int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
+#if defined(CONFIG_I386)
+	DECLARE_GLOBAL_DATA_PTR;
+#endif
 	ulong	addr, rc;
 	int     rcode = 0;

@@ -50,6 +52,13 @@ int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	 * pass address parameter as argv[0] (aka command name),
 	 * and all remaining args
 	 */
+#if defined(CONFIG_I386)
+	/*
+	 * x86 does not use a dedicated register to pass the pointer
+	 * to the global_data
+	 */
+	argv[0] = (char *)gd;
+#endif
 	rc = ((ulong (*)(int, char *[]))addr) (--argc, &argv[1]);
 	if (rc != 0) rcode = 1;

--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -80,6 +80,13 @@ static void zfree(void *, void *, unsigned);
 #if (CONFIG_COMMANDS & CFG_CMD_IMI)
 static int image_info (unsigned long addr);
 #endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_IMLS)
+#include <flash.h>
+extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+static int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+#endif
+
 static void print_type (image_header_t *hdr);

 #ifdef __I386__
@@ -120,6 +127,10 @@ int do_bootelf (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] );
 #if defined(CONFIG_ARTOS) && defined(CONFIG_PPC)
 static boot_os_Fcn do_bootm_artos;
 #endif
+#ifdef CONFIG_LYNXKDI
+static boot_os_Fcn do_bootm_lynxkdi;
+extern void lynxkdi_boot( image_header_t * );
+#endif

 image_header_t header;

@@ -350,6 +361,13 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			     addr, len_ptr, verify);
 	    break;

+#ifdef CONFIG_LYNXKDI
+	case IH_OS_LYNXOS:
+	    do_bootm_lynxkdi (cmdtp, flag, argc, argv,
+			     addr, len_ptr, verify);
+	    break;
+#endif
+
 	case IH_OS_RTEMS:
 	    do_bootm_rtems (cmdtp, flag, argc, argv,
 			     addr, len_ptr, verify);
@@ -961,6 +979,56 @@ U_BOOT_CMD(

 #endif	/* CFG_CMD_IMI */

+#if (CONFIG_COMMANDS & CFG_CMD_IMLS)
+/*-----------------------------------------------------------------------
+ * List all images found in flash.
+ */
+int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+	flash_info_t *info;
+	int i, j;
+	image_header_t *hdr;
+	ulong checksum;
+
+	for (i=0, info=&flash_info[0]; i<CFG_MAX_FLASH_BANKS; ++i, ++info) {
+		if (info->flash_id == FLASH_UNKNOWN)
+			goto next_bank;
+		for (j=0; j<CFG_MAX_FLASH_SECT; ++j) {
+
+			if (!(hdr=(image_header_t *)info->start[j]) ||
+			    (ntohl(hdr->ih_magic) != IH_MAGIC))
+				goto next_sector;
+
+			/* Copy header so we can blank CRC field for re-calculation */
+			memmove (&header, (char *)hdr, sizeof(image_header_t));
+
+			checksum = ntohl(header.ih_hcrc);
+			header.ih_hcrc = 0;
+
+			if (crc32 (0, (char *)&header, sizeof(image_header_t))
+			    != checksum)
+				goto next_sector;
+
+			printf ("Image at %08lX:\n", (ulong)hdr);
+			print_image_hdr( hdr );
+			putc ('\n');
+next_sector:		;
+		}
+next_bank:	;
+	}
+
+	return (0);
+}
+
+U_BOOT_CMD(
+	imls,	1,		1,	do_imls,
+	"imls    - list all images found in flash\n",
+	"\n"
+	"    - Prints information about all images found at sector\n"
+	"      boundaries in flash.\n"
+);
+#endif	/* CFG_CMD_IMLS */
+
 void
 print_image_hdr (image_header_t *hdr)
 {
@@ -1011,6 +1079,9 @@ print_type (image_header_t *hdr)
 	case IH_OS_RTEMS:	os = "RTEMS";			break;
 #ifdef CONFIG_ARTOS
 	case IH_OS_ARTOS:	os = "ARTOS";			break;
+#endif
+#ifdef CONFIG_LYNXKDI
+	case IH_OS_LYNXOS:	os = "LynxOS";			break;
 #endif
 	default:		os = "Unknown OS";		break;
 	}
@@ -1185,3 +1256,17 @@ do_bootm_qnxelf (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
 	do_bootelf(cmdtp, 0, 2, local_args);
 }
 #endif /* CFG_CMD_ELF */
+
+#ifdef CONFIG_LYNXKDI
+static void
+do_bootm_lynxkdi (cmd_tbl_t *cmdtp, int flag,
+		 int	argc, char *argv[],
+		 ulong	addr,
+		 ulong	*len_ptr,
+		 int	verify)
+{
+	lynxkdi_boot( &header );
+}
+
+#endif /* CONFIG_LYNXKDI */
+
--- a/common/cmd_flash.c
+++ b/common/cmd_flash.c
@@ -56,45 +56,120 @@ extern flash_info_t flash_info[];	/* info for FLASH chips */
 *			  or an invalid flash bank.
 */
 static int
-abbrev_spec(char *str, flash_info_t **pinfo, int *psf, int *psl)
+abbrev_spec (char *str, flash_info_t ** pinfo, int *psf, int *psl)
 {
-    flash_info_t *fp;
-    int bank, first, last;
-    char *p, *ep;
+	flash_info_t *fp;
+	int bank, first, last;
+	char *p, *ep;

-    if ((p = strchr(str, ':')) == NULL)
-	return 0;
-    *p++ = '\0';
-
-    bank = simple_strtoul(str, &ep, 10);
-    if (ep == str || *ep != '\0' ||
-      bank < 1 || bank > CFG_MAX_FLASH_BANKS ||
-      (fp = &flash_info[bank - 1])->flash_id == FLASH_UNKNOWN)
-	return -1;
-
-    str = p;
-    if ((p = strchr(str, '-')) != NULL)
+	if ((p = strchr (str, ':')) == NULL)
+		return 0;
 	*p++ = '\0';

-    first = simple_strtoul(str, &ep, 10);
-    if (ep == str || *ep != '\0' || first >= fp->sector_count)
-	return -1;
+	bank = simple_strtoul (str, &ep, 10);
+	if (ep == str || *ep != '\0' ||
+		bank < 1 || bank > CFG_MAX_FLASH_BANKS ||
+		(fp = &flash_info[bank - 1])->flash_id == FLASH_UNKNOWN)
+		return -1;

-    if (p != NULL) {
-	last = simple_strtoul(p, &ep, 10);
-	if (ep == p || *ep != '\0' ||
-	  last < first || last >= fp->sector_count)
-	    return -1;
-    }
-    else
-	last = first;
+	str = p;
+	if ((p = strchr (str, '-')) != NULL)
+		*p++ = '\0';

-    *pinfo = fp;
-    *psf = first;
-    *psl = last;
+	first = simple_strtoul (str, &ep, 10);
+	if (ep == str || *ep != '\0' || first >= fp->sector_count)
+		return -1;

-    return 1;
+	if (p != NULL) {
+		last = simple_strtoul (p, &ep, 10);
+		if (ep == p || *ep != '\0' ||
+			last < first || last >= fp->sector_count)
+			return -1;
+	} else {
+		last = first;
+	}
+
+	*pinfo = fp;
+	*psf = first;
+	*psl = last;
+
+	return 1;
 }
+
+static int
+flash_fill_sect_ranges (ulong addr_first, ulong addr_last,
+			int *s_first, int *s_last,
+			int *s_count )
+{
+	flash_info_t *info;
+	ulong bank;
+	int rcode = 0;
+
+	*s_count = 0;
+
+	for (bank=0; bank < CFG_MAX_FLASH_BANKS; ++bank) {
+		s_first[bank] = -1;	/* first sector to erase	*/
+		s_last [bank] = -1;	/* last  sector to erase	*/
+	}
+
+	for (bank=0,info=&flash_info[0];
+	     (bank < CFG_MAX_FLASH_BANKS) && (addr_first <= addr_last);
+	     ++bank, ++info) {
+		ulong b_end;
+		int sect;
+		short s_end;
+
+		if (info->flash_id == FLASH_UNKNOWN) {
+			continue;
+		}
+
+		b_end = info->start[0] + info->size - 1;	/* bank end addr */
+		s_end = info->sector_count - 1;			/* last sector   */
+
+
+		for (sect=0; sect < info->sector_count; ++sect) {
+			ulong end;	/* last address in current sect	*/
+
+			end = (sect == s_end) ? b_end : info->start[sect + 1] - 1;
+
+			if (addr_first > end)
+				continue;
+			if (addr_last < info->start[sect])
+				continue;
+
+			if (addr_first == info->start[sect]) {
+				s_first[bank] = sect;
+			}
+			if (addr_last  == end) {
+				s_last[bank]  = sect;
+			}
+		}
+		if (s_first[bank] >= 0) {
+			if (s_last[bank] < 0) {
+				if (addr_last > b_end) {
+					s_last[bank] = s_end;
+				} else {
+					printf ("Error: end address"
+						" not on sector boundary\n");
+					rcode = 1;
+					break;
+				}
+			}
+			if (s_last[bank] < s_first[bank]) {
+				printf ("Error: end sector"
+					" precedes start sector\n");
+				rcode = 1;
+				break;
+			}
+			sect = s_last[bank];
+			addr_first = (sect == s_end) ? b_end + 1: info->start[sect + 1];
+			(*s_count) += s_last[bank] - s_first[bank] + 1;
+		}
+	}
+
+	return rcode;
+}
+
 int do_flinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
 	ulong bank;
@@ -180,7 +255,6 @@ int do_flerase (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		return 1;
 	}

-	printf ("Erase Flash from 0x%08lx to 0x%08lx ", addr_first, addr_last);
 	rcode = flash_sect_erase(addr_first, addr_last);
 	return rcode;
 }
@@ -189,53 +263,32 @@ int flash_sect_erase (ulong addr_first, ulong addr_last)
 {
 	flash_info_t *info;
 	ulong bank;
-	int s_first, s_last;
-	int erased;
+	int s_first[CFG_MAX_FLASH_BANKS], s_last[CFG_MAX_FLASH_BANKS];
+	int erased = 0;
+	int planned;
 	int rcode = 0;

-	erased = 0;
+	rcode = flash_fill_sect_ranges (addr_first, addr_last,
+					s_first, s_last, &planned );

-	for (bank=0,info=&flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
-		ulong b_end;
-		int sect;
-
-		if (info->flash_id == FLASH_UNKNOWN) {
-			continue;
-		}
-
-		b_end = info->start[0] + info->size - 1; /* bank end addr */
-
-		s_first = -1;		/* first sector to erase	*/
-		s_last  = -1;		/* last  sector to erase	*/
-
-		for (sect=0; sect < info->sector_count; ++sect) {
-			ulong end;		/* last address in current sect	*/
-			short s_end;
-
-			s_end = info->sector_count - 1;
-
-			end = (sect == s_end) ? b_end : info->start[sect + 1] - 1;
-
-			if (addr_first > end)
-				continue;
-			if (addr_last < info->start[sect])
-				continue;
-
-			if (addr_first == info->start[sect]) {
-				s_first = sect;
-			}
-			if (addr_last  == end) {
-				s_last  = sect;
+	if (planned && (rcode == 0)) {
+		for (bank=0,info=&flash_info[0];
+		     (bank < CFG_MAX_FLASH_BANKS) && (rcode == 0);
+		     ++bank, ++info) {
+			if (s_first[bank]>=0) {
+				erased += s_last[bank] - s_first[bank] + 1;
+				debug ("Erase Flash from 0x%08lx to 0x%08lx "
+					"in Bank # %ld ",
+					info->start[s_first[bank]],
+					(s_last[bank] == info->sector_count) ?
+						info->start[0] + info->size - 1:
+						info->start[s_last[bank]+1] - 1,
+					bank+1);
+				rcode = flash_erase (info, s_first[bank], s_last[bank]);
 			}
 		}
-		if (s_first>=0 && s_first<=s_last) {
-			erased += s_last - s_first + 1;
-			rcode = flash_erase (info, s_first, s_last);
-		}
-	}
-	if (erased) {
 		printf ("Erased %d sectors\n", erased);
-	} else {
+	} else if (rcode == 0) {
 		printf ("Error: start and/or end address"
 			" not on sector boundary\n");
 		rcode = 1;
@@ -243,7 +296,6 @@ int flash_sect_erase (ulong addr_first, ulong addr_last)
 	return rcode;
 }

-
 int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
 	flash_info_t *info;
@@ -256,11 +308,11 @@ int do_protect (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		return 1;
 	}

-	if (strcmp(argv[1], "off") == 0)
+	if (strcmp(argv[1], "off") == 0) {
 		p = 0;
-	else if (strcmp(argv[1], "on") == 0)
+	} else if (strcmp(argv[1], "on") == 0) {
 		p = 1;
-	else {
+	} else {
 		printf ("Usage:\n%s\n", cmdtp->usage);
 		return 1;
 	}
@@ -370,66 +422,43 @@ int flash_sect_protect (int p, ulong addr_first, ulong addr_last)
 {
 	flash_info_t *info;
 	ulong bank;
-	int s_first, s_last;
+	int s_first[CFG_MAX_FLASH_BANKS], s_last[CFG_MAX_FLASH_BANKS];
 	int protected, i;
-	int rcode = 0;
+	int planned;
+	int rcode;
+
+	rcode = flash_fill_sect_ranges( addr_first, addr_last, s_first, s_last, &planned );

 	protected = 0;

-	for (bank=0,info=&flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
-		ulong b_end;
-		int sect;
-
-		if (info->flash_id == FLASH_UNKNOWN) {
-			continue;
-		}
-
-		b_end = info->start[0] + info->size - 1; /* bank end addr */
-
-		s_first = -1;		/* first sector to erase	*/
-		s_last  = -1;		/* last  sector to erase	*/
-
-		for (sect=0; sect < info->sector_count; ++sect) {
-			ulong end;		/* last address in current sect	*/
-			short s_end;
-
-			s_end = info->sector_count - 1;
-
-			end = (sect == s_end) ? b_end : info->start[sect + 1] - 1;
-
-			if (addr_first > end)
-				continue;
-			if (addr_last < info->start[sect])
+	if (planned && (rcode == 0)) {
+		for (bank=0,info=&flash_info[0]; bank < CFG_MAX_FLASH_BANKS; ++bank, ++info) {
+			if (info->flash_id == FLASH_UNKNOWN) {
 				continue;
+			}

-			if (addr_first == info->start[sect]) {
-				s_first = sect;
-			}
-			if (addr_last  == end) {
-				s_last  = sect;
-			}
-		}
-		if (s_first>=0 && s_first<=s_last) {
-			protected += s_last - s_first + 1;
-			for (i=s_first; i<=s_last; ++i) {
+			if (s_first[bank]>=0 && s_first[bank]<=s_last[bank]) {
+				debug ("Protecting sectors %d..%d in bank %ld\n",
+					s_first[bank], s_last[bank], bank+1);
+				protected += s_last[bank] - s_first[bank] + 1;
+				for (i=s_first[bank]; i<=s_last[bank]; ++i) {
 #if defined(CFG_FLASH_PROTECTION)
-				if (flash_real_protect(info, i, p))
-					rcode = 1;
-				putc ('.');
+					if (flash_real_protect(info, i, p))
+						rcode = 1;
+					putc ('.');
 #else
-				info->protect[i] = p;
+					info->protect[i] = p;
 #endif	/* CFG_FLASH_PROTECTION */
+				}
 			}
-		}
 #if defined(CFG_FLASH_PROTECTION)
-		if (!rcode) putc ('\n');
+			if (!rcode) putc ('\n');
 #endif	/* CFG_FLASH_PROTECTION */
+		}

-	}
-	if (protected) {
 		printf ("%sProtected %d sectors\n",
 			p ? "" : "Un-", protected);
-	} else {
+	} else if (rcode == 0) {
 		printf ("Error: start and/or end address"
 			" not on sector boundary\n");
 		rcode = 1;
--- a/common/cmd_i2c.c
+++ b/common/cmd_i2c.c
@@ -507,6 +507,9 @@ mod_i2c_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
 				if(i2c_write(chip, addr, alen, (char *)&data, size) != 0) {
 					printf("Error writing the chip.\n");
 				}
+#ifdef CFG_EEPROM_PAGE_WRITE_DELAY_MS
+				udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
+#endif
 				if (incrflag)
 					addr += size;
 			}
--- a/common/cmd_load.c
+++ b/common/cmd_load.c
@@ -28,7 +28,7 @@
 #include <command.h>
 #include <s_record.h>
 #include <net.h>
-#include <syscall.h>
+#include <exports.h>


 #if (CONFIG_COMMANDS & CFG_CMD_LOADS)
@@ -213,6 +213,7 @@ load_serial (ulong offset)
 static int
 read_record (char *buf, ulong len)
 {
+	DECLARE_GLOBAL_DATA_PTR;
 	char *p;
 	char c;

@@ -236,13 +237,11 @@ read_record (char *buf, ulong len)
 		}

 	    /* Check for the console hangup (if any different from serial) */
-#ifdef CONFIG_PPC	/* we don't have syscall_tbl anywhere else */
-	    if (syscall_tbl[SYSCALL_GETC] != serial_getc) {
+	    if (gd->jt[XF_getc] != serial_getc) {
 		if (ctrlc()) {
 		    return (-1);
 		}
 	    }
-#endif
 	}

 	/* line too long - truncate */
@@ -479,7 +478,7 @@ int do_load_serial_bin (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	printf ("## Ready for binary (kermit) download "
 		"to 0x%08lX at %d bps...\n",
 		offset,
-		current_baudrate);
+		load_baudrate);
 	addr = load_serial_bin (offset);

 	if (addr == ~0) {
--- a/common/cmd_log.c
+++ b/common/cmd_log.c
@@ -86,8 +86,7 @@ void logbuff_init_ptrs (void)
 	post_word = post_word_load();
 #ifdef CONFIG_POST
 	/* The post routines have setup the word so we can simply test it */
- 	if (((post_word & 0xffff) == POST_POWERON) ||
-	    ((post_word & 0xffff) == POST_SLOWTEST)) {
+ 	if (post_word_load () & POST_COLDBOOT) {
 		logged_chars = log_size = log_start = 0;
 		*ext_tag = LOGBUFF_MAGIC;
 	}
--- a/common/cmd_mem.c
+++ b/common/cmd_mem.c
@@ -53,6 +53,8 @@ int cmd_get_data_size(char* arg, int default_size)
 			return 2;
 		case 'l':
 			return 4;
+		default:
+			return -1;
 		}
 	}
 	return default_size;
@@ -86,9 +88,10 @@ static	ulong	base_address = 0;
 #define DISP_LINE_LEN	16
 int do_mem_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
-	ulong	addr, size, length;
+	ulong	addr, length;
 	ulong	i, nbytes, linebytes;
 	u_char	*cp;
+	int	size;
 	int rc = 0;

 	/* We use the last specified parameters, unless new ones are
@@ -107,7 +110,8 @@ int do_mem_md ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		/* New command specified.  Check for a size specification.
 		 * Defaults to long if no or incorrect specification.
 		 */
-		size = cmd_get_data_size(argv[0], 4);
+		if ((size = cmd_get_data_size(argv[0], 4)) < 0)
+			return 1;

 		/* Address is specified since argc > 1
 		*/
@@ -199,7 +203,8 @@ int do_mem_nm ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 int do_mem_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
-	ulong	addr, size, writeval, count;
+	ulong	addr, writeval, count;
+	int	size;

 	if ((argc < 3) || (argc > 4)) {
 		printf ("Usage:\n%s\n", cmdtp->usage);
@@ -208,7 +213,8 @@ int do_mem_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 	/* Check for size specification.
 	*/
-	size = cmd_get_data_size(argv[0], 4);
+	if ((size = cmd_get_data_size(argv[0], 4)) < 1)
+		return 1;

 	/* Address is specified since argc > 1
 	*/
@@ -240,7 +246,8 @@ int do_mem_mw ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 int do_mem_cmp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
-	ulong	size, addr1, addr2, count, ngood;
+	ulong	addr1, addr2, count, ngood;
+	int	size;
 	int     rcode = 0;

 	if (argc != 4) {
@@ -250,7 +257,8 @@ int do_mem_cmp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 	/* Check for size specification.
 	*/
-	size = cmd_get_data_size(argv[0], 4);
+	if ((size = cmd_get_data_size(argv[0], 4)) < 0)
+		return 1;

 	addr1 = simple_strtoul(argv[1], NULL, 16);
 	addr1 += base_address;
@@ -316,7 +324,8 @@ int do_mem_cmp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 int do_mem_cp ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
-	ulong	addr, size, dest, count;
+	ulong	addr, dest, count;
+	int	size;

 	if (argc != 4) {
 		printf ("Usage:\n%s\n", cmdtp->usage);
@@ -325,7 +334,8 @@ int do_mem_cp ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 	/* Check for size specification.
 	*/
-	size = cmd_get_data_size(argv[0], 4);
+	if ((size = cmd_get_data_size(argv[0], 4)) < 0)
+		return 1;

 	addr = simple_strtoul(argv[1], NULL, 16);
 	addr += base_address;
@@ -458,7 +468,8 @@ int do_mem_base (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])

 int do_mem_loop (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 {
-	ulong	addr, size, length, i, junk;
+	ulong	addr, length, i, junk;
+	int	size;
 	volatile uint	*longp;
 	volatile ushort *shortp;
 	volatile u_char	*cp;
@@ -471,7 +482,8 @@ int do_mem_loop (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 	/* Check for a size spefication.
 	 * Defaults to long if no or incorrect specification.
 	 */
-	size = cmd_get_data_size(argv[0], 4);
+	if ((size = cmd_get_data_size(argv[0], 4)) < 0)
+		return 1;

 	/* Address is always specified.
 	*/
@@ -839,8 +851,8 @@ int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 static int
 mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
 {
-	ulong	addr, size, i;
-	int	nbytes;
+	ulong	addr, i;
+	int	nbytes, size;
 	extern char console_buffer[];

 	if (argc != 2) {
@@ -861,7 +873,8 @@ mod_mem(cmd_tbl_t *cmdtp, int incrflag, int flag, int argc, char *argv[])
 		/* New command specified.  Check for a size specification.
 		 * Defaults to long if no or incorrect specification.
 		 */
-		size = cmd_get_data_size(argv[0], 4);
+		if ((size = cmd_get_data_size(argv[0], 4)) < 0)
+			return 1;

 		/* Address is specified since argc > 1
 		*/
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -3,7 +3,6 @@
 * borrowed heavily from:
 * (c) 1999 Machine Vision Holdings, Inc.
 * (c) 1999, 2000 David Woodhouse <dwmw2@infradead.org>
- *
 */

 #include <common.h>
@@ -24,6 +23,12 @@
 #include <linux/mtd/nand_ids.h>
 #include <jffs2/jffs2.h>

+#ifdef CONFIG_OMAP1510
+void archflashwp(void *archdata, int wp);
+#endif
+
+#define ROUND_DOWN(value,boundary)      ((value) & (~((boundary)-1)))
+
 /*
 * Definition of the out of band configuration structure
 */
@@ -52,7 +57,7 @@ struct nand_oob_config {
 #define	 ALLOW_ERASE_BAD_DEBUG 0

 #define CONFIG_MTD_NAND_ECC  /* enable ECC */
-/* #define CONFIG_MTD_NAND_ECC_JFFS2 */
+#define CONFIG_MTD_NAND_ECC_JFFS2

 /* bits for nand_rw() `cmd'; or together as needed */
 #define NANDRW_READ	0x01
@@ -76,6 +81,7 @@ static int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
 		 size_t * retlen, u_char * buf);
 static int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
 		 size_t * retlen, const u_char * buf);
+static int NanD_WaitReady(struct nand_chip *nand, int ale_wait);
 #ifdef CONFIG_MTD_NAND_ECC
 static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc);
 static void nand_calculate_ecc (const u_char *dat, u_char *ecc_code);
@@ -218,7 +224,7 @@ int do_nand (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 		ret = nand_rw(nand_dev_desc + curr_device, cmd, off, size,
 			     &total, (u_char*)addr);

-		printf ("%d bytes %s: %s\n", total,
+		printf (" %d bytes %s: %s\n", total,
 			(cmd & NANDRW_READ) ? "read" : "write",
 			ret ? "ERROR" : "OK");

@@ -419,7 +425,7 @@ static int nand_rw (struct nand_chip* nand, int cmd,
 	    size_t start, size_t len,
 	    size_t * retlen, u_char * buf)
 {
-	int noecc, ret = 0, n, total = 0;
+	int ret = 0, n, total = 0;
 	char eccbuf[6];
 	/* eblk (once set) is the start of the erase block containing the
 	 * data being processed.
@@ -457,17 +463,18 @@ static int nand_rw (struct nand_chip* nand, int cmd,
 		}
 		/* The ECC will not be calculated correctly if
 		   less than 512 is written or read */
-		noecc = (start != (start | 0x1ff) + 1) ||	(len < 0x200);
+		/* Is request at least 512 bytes AND it starts on a proper boundry */
+		if((start != ROUND_DOWN(start, 0x200)) || (len < 0x200))
+			printf("Warning block writes should be at least 512 bytes and start on a 512 byte boundry\n");
+
 		if (cmd & NANDRW_READ)
 			ret = nand_read_ecc(nand, start,
 					   min(len, eblk + erasesize - start),
-					   &n, (u_char*)buf,
-					   noecc ? NULL : eccbuf);
+					   &n, (u_char*)buf, eccbuf);
 		else
 			ret = nand_write_ecc(nand, start,
 					    min(len, eblk + erasesize - start),
-					    &n, (u_char*)buf,
-					    noecc ? NULL : eccbuf);
+					    &n, (u_char*)buf, eccbuf);

 		if (ret)
 			break;
@@ -502,19 +509,19 @@ static void nand_print(struct nand_chip *nand)

 /* ------------------------------------------------------------------------- */

-/* This function is needed to avoid calls of the __ashrdi3 function. */
-#if 0
-static int shr(int val, int shift)
-{
-	return val >> shift;
-}
-#endif
-static int NanD_WaitReady(struct nand_chip *nand)
+static int NanD_WaitReady(struct nand_chip *nand, int ale_wait)
 {
 	/* This is inline, to optimise the common case, where it's ready instantly */
 	int ret = 0;
-	NAND_WAIT_READY(nand);

+#ifdef NAND_NO_RB	/* in config file, shorter delays currently wrap accesses */
+	if(ale_wait)
+		NAND_WAIT_READY(nand);	/* do the worst case 25us wait */
+	else
+		udelay(10);
+#else	/* has functional r/b signal */
+    NAND_WAIT_READY(nand);
+#endif
 	return ret;
 }

@@ -533,7 +540,16 @@ static inline int NanD_Command(struct nand_chip *nand, unsigned char command)
 	/* Lower the CLE line */
 	NAND_CTL_CLRCLE(nandptr);

-	return NanD_WaitReady(nand);
+#ifdef NAND_NO_RB
+	if(command == NAND_CMD_RESET){
+		u_char ret_val;
+		NanD_Command(nand, NAND_CMD_STATUS);
+		do{
+			ret_val = READ_NAND(nandptr);/* wait till ready */
+		} while((ret_val & 0x40) != 0x40);
+	}
+#endif
+	return NanD_WaitReady(nand, 0);
 }

 /* NanD_Address: Set the current address for the flash chip */
@@ -573,7 +589,7 @@ static int NanD_Address(struct nand_chip *nand, int numbytes, unsigned long ofs)
 	NAND_CTL_CLRALE(nandptr);

 	/* Wait for the chip to respond */
-	return NanD_WaitReady(nand);
+	return NanD_WaitReady(nand, 1);
 }

 /* NanD_SelectChip: Select a given flash chip within the current floor */
@@ -581,7 +597,7 @@ static int NanD_Address(struct nand_chip *nand, int numbytes, unsigned long ofs)
 static inline int NanD_SelectChip(struct nand_chip *nand, int chip)
 {
 	/* Wait for it to be ready */
-	return NanD_WaitReady(nand);
+	return NanD_WaitReady(nand, 0);
 }

 /* NanD_IdentChip: Identify a given NAND chip given {floor,chip} */
@@ -931,8 +947,8 @@ static int nand_write_page (struct nand_chip *nand,
 {

 	int i;
-#ifdef CONFIG_MTD_NAND_ECC
 	unsigned long nandptr = nand->IO_ADDR;
+#ifdef CONFIG_MTD_NAND_ECC
 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
 	int ecc_bytes = (nand->oobblock == 512) ? 6 : 3;
 #endif
@@ -992,12 +1008,20 @@ static int nand_write_page (struct nand_chip *nand,
 	/* Send command to actually program the data */
 	NanD_Command(nand, NAND_CMD_PAGEPROG);
 	NanD_Command(nand, NAND_CMD_STATUS);
+#ifdef NAND_NO_RB
+	{ u_char ret_val;

+	  do{
+		ret_val = READ_NAND(nandptr);	/* wait till ready */
+	  } while((ret_val & 0x40) != 0x40);
+	}
+#endif
 	/* See if device thinks it succeeded */
 	if (READ_NAND(nand->IO_ADDR) & 0x01) {
 		printf ("%s: Failed write, page 0x%08x, ", __FUNCTION__, page);
 		return -1;
 	}
+
 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
 	/*
 	 * The NAND device assumes that it is always writing to
@@ -1069,7 +1093,10 @@ static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
 	*retlen = 0;

 	/* Select the NAND device */
-	NAND_ENABLE_CE(nand);  /* set pin low */
+#ifdef CONFIG_OMAP1510
+	archflashwp(0,0);
+#endif
+    	NAND_ENABLE_CE(nand);  /* set pin low */

 	/* Check the WP bit */
 	NanD_Command(nand, NAND_CMD_STATUS);
@@ -1113,7 +1140,9 @@ static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
 out:
 	/* De-select the NAND device */
 	NAND_DISABLE_CE(nand);  /* set pin high */
-
+#ifdef CONFIG_OMAP1510
+    	archflashwp(0,1);
+#endif
 	return ret;
 }

@@ -1160,7 +1189,7 @@ static int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
 	 * causing the flash device to go into busy mode, so we need
 	 * to wait until ready 11.4.1 and Toshiba TC58256FT nands */

-	ret = NanD_WaitReady(nand);
+	ret = NanD_WaitReady(nand, 1);
 	NAND_DISABLE_CE(nand);  /* set pin high */

 	return ret;
@@ -1215,8 +1244,13 @@ static int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,

 		NanD_Command(nand, NAND_CMD_PAGEPROG);
 		NanD_Command(nand, NAND_CMD_STATUS);
-		/* NanD_WaitReady() is implicit in NanD_Command */
-
+#ifdef NAND_NO_RB
+   		{ u_char ret_val;
+    		  do{
+		  	ret_val = READ_NAND(nandptr); /* wait till ready */
+    		  }while((ret_val & 0x40) != 0x40);
+		}
+#endif
 		if (READ_NAND(nandptr) & 1) {
 			puts ("Error programming oob data\n");
 			/* There was an error */
@@ -1233,8 +1267,13 @@ static int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,

 	NanD_Command(nand, NAND_CMD_PAGEPROG);
 	NanD_Command(nand, NAND_CMD_STATUS);
-	/* NanD_WaitReady() is implicit in NanD_Command */
-
+#ifdef NAND_NO_RB
+	{ u_char ret_val;
+	  do{
+		ret_val = READ_NAND(nandptr); /* wait till ready */
+	  } while((ret_val & 0x40) != 0x40);
+	}
+#endif
 	if (READ_NAND(nandptr) & 1) {
 		puts ("Error programming oob data\n");
 		/* There was an error */
@@ -1272,7 +1311,10 @@ static int nand_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean)
 	nandptr = nand->IO_ADDR;

 	/* Select the NAND device */
-	NAND_ENABLE_CE(nand);  /* set pin low */
+#ifdef CONFIG_OMAP1510
+	archflashwp(0,0);
+#endif
+    NAND_ENABLE_CE(nand);  /* set pin low */

 	/* Check the WP bit */
 	NanD_Command(nand, NAND_CMD_STATUS);
@@ -1308,6 +1350,13 @@ static int nand_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean)

 			NanD_Command(nand, NAND_CMD_STATUS);

+#ifdef NAND_NO_RB
+			{ u_char ret_val;
+			  do{
+				ret_val = READ_NAND(nandptr); /* wait till ready */
+			  } while((ret_val & 0x40) != 0x40);
+			}
+#endif
 			if (READ_NAND(nandptr) & 1) {
 				printf ("%s: Error erasing at 0x%lx\n",
 					__FUNCTION__, (long)ofs);
@@ -1346,7 +1395,9 @@ static int nand_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean)
 out:
 	/* De-select the NAND device */
 	NAND_DISABLE_CE(nand);  /* set pin high */
-
+#ifdef CONFIG_OMAP1510
+    	archflashwp(0,1);
+#endif
 	return ret;
 }

@@ -1596,5 +1647,6 @@ static int nand_correct_data (u_char *dat, u_char *read_ecc, u_char *calc_ecc)
 	/* Should never happen */
 	return -1;
 }
+
 #endif
 #endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
--- a/common/console.c
+++ b/common/console.c
@@ -25,9 +25,7 @@
 #include <stdarg.h>
 #include <malloc.h>
 #include <console.h>
-#include <syscall.h>
-
-void **syscall_tbl;
+#include <exports.h>

 #ifdef CONFIG_AMIGAONEG3SE
 int console_changed = 0;
@@ -52,6 +50,7 @@ int overwrite_console (void)

 static int console_setfile (int file, device_t * dev)
 {
+	DECLARE_GLOBAL_DATA_PTR;
 	int error = 0;

 	if (dev == NULL)
@@ -78,13 +77,13 @@ static int console_setfile (int file, device_t * dev)
 		 */
 		switch (file) {
 		case stdin:
-			syscall_tbl[SYSCALL_GETC] = dev->getc;
-			syscall_tbl[SYSCALL_TSTC] = dev->tstc;
+			gd->jt[XF_getc] = dev->getc;
+			gd->jt[XF_tstc] = dev->tstc;
 			break;
 		case stdout:
-			syscall_tbl[SYSCALL_PUTC] = dev->putc;
-			syscall_tbl[SYSCALL_PUTS] = dev->puts;
-			syscall_tbl[SYSCALL_PRINTF] = printf;
+			gd->jt[XF_putc] = dev->putc;
+			gd->jt[XF_puts] = dev->puts;
+			gd->jt[XF_printf] = printf;
 			break;
 		}
 		break;
@@ -394,15 +393,16 @@ device_t *search_device (int flags, char *name)
 /* Called after the relocation - use desired console functions */
 int console_init_r (void)
 {
+	DECLARE_GLOBAL_DATA_PTR;
 	char *stdinname, *stdoutname, *stderrname;
 	device_t *inputdev = NULL, *outputdev = NULL, *errdev = NULL;

 	/* set default handlers at first */
-	syscall_tbl[SYSCALL_GETC] = serial_getc;
-	syscall_tbl[SYSCALL_TSTC] = serial_tstc;
-	syscall_tbl[SYSCALL_PUTC] = serial_putc;
-	syscall_tbl[SYSCALL_PUTS] = serial_puts;
-	syscall_tbl[SYSCALL_PRINTF] = serial_printf;
+	gd->jt[XF_getc] = serial_getc;
+	gd->jt[XF_tstc] = serial_tstc;
+	gd->jt[XF_putc] = serial_putc;
+	gd->jt[XF_puts] = serial_puts;
+	gd->jt[XF_printf] = serial_printf;

 	/* stdin stdout and stderr are in environment */
 	/* scan for it */
--- a/common/exports.c
+++ b/common/exports.c
@@ -0,0 +1,31 @@
+#include <common.h>
+#include <exports.h>
+
+static void dummy(void)
+{
+}
+
+unsigned long get_version(void)
+{
+	return XF_VERSION;
+}
+
+void jumptable_init (void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	int i;
+
+	gd->jt = (void **) malloc (XF_MAX * sizeof (void *));
+	for (i = 0; i < XF_MAX; i++)
+		gd->jt[i] = (void *) dummy;
+
+	gd->jt[XF_get_version] = (void *) get_version;
+	gd->jt[XF_malloc] = (void *) malloc;
+	gd->jt[XF_free] = (void *) free;
+	gd->jt[XF_get_timer] = (void *)get_timer;
+	gd->jt[XF_udelay] = (void *)udelay;
+#if defined(CONFIG_I386) || defined(CONFIG_PPC)
+	gd->jt[XF_install_hdlr] = (void *) irq_install_handler;
+	gd->jt[XF_free_hdlr] = (void *) irq_free_handler;
+#endif
+}
--- a/common/lynxkdi.c
+++ b/common/lynxkdi.c
@@ -0,0 +1,70 @@
+/*
+ * Copyright (c) Orbacom Systems, Inc <www.orbacom.com>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms are freely
+ * permitted provided that the above copyright notice and this
+ * paragraph and the following disclaimer are duplicated in all
+ * such forms.
+ *
+ * This software is provided "AS IS" and without any express or
+ * implied warranties, including, without limitation, the implied
+ * warranties of merchantability and fitness for a particular
+ * purpose.
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <image.h>
+
+#if defined(CONFIG_LYNXKDI)
+#include <lynxkdi.h>
+
+#if defined(CONFIG_MPC8260)
+void lynxkdi_boot ( image_header_t *hdr )
+{
+	void (*lynxkdi)(void) = (void(*)(void))hdr->ih_ep;
+	lynxos_bootparms_t *parms = (lynxos_bootparms_t *)0x0020;
+	bd_t *kbd;
+	DECLARE_GLOBAL_DATA_PTR;
+	u32 *psz = (u32 *)(hdr->ih_load + 0x0204);
+
+	memset( parms, 0, sizeof(*parms));
+	kbd = gd->bd;
+	parms->clock_ref = kbd->bi_busfreq;
+	parms->dramsz = kbd->bi_memsize;
+	memcpy(parms->ethaddr, kbd->bi_enetaddr, 6);
+	mtspr(SPRN_SPRG2, 0x0020);
+
+	/* Do a simple check for Bluecat so we can pass the
+	 * kernel command line parameters.
+	 */
+	if( le32_to_cpu(*psz) == hdr->ih_size ){
+	    char *args;
+	    char *cmdline = (char *)(hdr->ih_load + 0x020c);
+	    int len;
+
+	    printf("Booting Bluecat KDI ...\n");
+	    udelay(200*1000); /* Allow serial port to flush */
+	    if ((args = getenv("bootargs")) == NULL)
+		    args = "";
+	    /* Prepend the cmdline */
+	    len = strlen(args);
+	    if( len && (len + strlen(cmdline) + 2 < (0x0400 - 0x020c))) {
+		memmove( cmdline + strlen(args) + 1, cmdline, strlen(cmdline) );
+		strcpy( cmdline, args );
+		cmdline[len] = ' ';
+	    }
+	}
+	else {
+	    printf("Booting LynxOS KDI ...\n");
+	}
+
+	lynxkdi();
+}
+#else
+#error "Lynx KDI support not implemented for configured CPU"
+#endif
+
+#endif	/* CONFIG_LYNXKDI */
+
--- a/common/main.c
+++ b/common/main.c
@@ -32,6 +32,8 @@
 #include <hush.h>
 #endif

+#include <post.h>
+
 #if defined(CONFIG_BOOT_RETRY_TIME) && defined(CONFIG_RESET_TO_RETRY)
 extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);		/* for do_reset() prototype */
 #endif
@@ -258,6 +260,12 @@ void main_loop (void)
 #ifdef CONFIG_PREBOOT
 	char *p;
 #endif
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+	unsigned long bootcount = 0;
+	unsigned long bootlimit = 0;
+	char *bcs;
+	char bcs_set[16];
+#endif /* CONFIG_BOOTCOUNT_LIMIT */

 #if defined(CONFIG_VFD) && defined(VFD_TEST_LOGO)
 	ulong bmp = 0;		/* default bitmap */
@@ -270,6 +278,16 @@ void main_loop (void)
 	trab_vfd (bmp);
 #endif	/* CONFIG_VFD && VFD_TEST_LOGO */

+#ifdef CONFIG_BOOTCOUNT_LIMIT
+	bootcount = bootcount_load();
+	bootcount++;
+	bootcount_store (bootcount);
+	sprintf (bcs_set, "%lu", bootcount);
+	setenv ("bootcount", bcs_set);
+	bcs = getenv ("bootlimit");
+	bootlimit = bcs ? simple_strtoul (bcs, NULL, 10) : 0;
+#endif /* CONFIG_BOOTCOUNT_LIMIT */
+
 #ifdef CONFIG_MODEM_SUPPORT
 	debug ("DEBUG: main_loop:   do_mdm_init=%d\n", do_mdm_init);
 	if (do_mdm_init) {
@@ -322,7 +340,15 @@ void main_loop (void)
 	init_cmd_timeout ();
 # endif	/* CONFIG_BOOT_RETRY_TIME */

-	s = getenv ("bootcmd");
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+	if (bootlimit && (bootcount > bootlimit)) {
+		printf ("Warning: Bootlimit (%u) exceeded. Using altbootcmd.\n",
+		        (unsigned)bootlimit);
+		s = getenv ("altbootcmd");
+	}
+	else
+#endif /* CONFIG_BOOTCOUNT_LIMIT */
+		s = getenv ("bootcmd");

 	debug ("### main_loop: bootcmd=\"%s\"\n", s ? s : "<UNDEFINED>");

--- a/config.mk
+++ b/config.mk
@@ -112,8 +112,8 @@ gccincdir := $(shell $(CC) -print-file-name=include)
 CPPFLAGS := $(DBGFLAGS) $(OPTFLAGS) $(RELFLAGS)		\
 	-D__KERNEL__ -DTEXT_BASE=$(TEXT_BASE)		\
 	-I$(TOPDIR)/include				\
-	-fno-builtin -nostdinc -isystem $(gccincdir)	\
-	-pipe $(PLATFORM_CPPFLAGS)
+	-fno-builtin -ffreestanding -nostdinc -isystem	\
+	$(gccincdir) -pipe $(PLATFORM_CPPFLAGS)

 ifdef BUILD_TAG
 CFLAGS := $(CPPFLAGS) -Wall -Wstrict-prototypes \
--- a/cpu/74xx_7xx/start.S
+++ b/cpu/74xx_7xx/start.S
@@ -159,75 +159,7 @@ ProgramCheck:
 	STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
 	STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 	STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
-
-	. = 0xc00
-/*
- * r0 - SYSCALL number
- * r3-... arguments
- */
-SystemCall:
-	addis	r11,r0,0		/* get functions table addr */
-	ori	r11,r11,0		/* Note: this code is patched in trap_init */
-	addis	r12,r0,0		/* get number of functions */
-	ori	r12,r12,0
-
-	cmplw	0, r0, r12
-	bge	1f
-
-	rlwinm	r0,r0,2,0,31		/* fn_addr = fn_tbl[r0] */
-	add	r11,r11,r0
-	lwz	r11,0(r11)
-
-	li	r20,0xd00-4		/* Get stack pointer */
-	lwz	r12,0(r20)
-	subi	r12,r12,12		/* Adjust stack pointer */
-	li	r0,0xc00+_end_back-SystemCall
-	cmplw	0, r0, r12		/* Check stack overflow */
-	bgt	1f
-	stw	r12,0(r20)
-
-	mflr	r0
-	stw	r0,0(r12)
-	mfspr	r0,SRR0
-	stw	r0,4(r12)
-	mfspr	r0,SRR1
-	stw	r0,8(r12)
-
-	li	r12,0xc00+_back-SystemCall
-	mtlr	r12
-	mtspr	SRR0,r11
-
-1:	SYNC
-	rfi
-
-_back:
-
-	mfmsr	r11			/* Disable interrupts */
-	li	r12,0
-	ori	r12,r12,MSR_EE
-	andc	r11,r11,r12
-	SYNC				/* Some chip revs need this... */
-	mtmsr	r11
-	SYNC
-
-	li	r12,0xd00-4		/* restore regs */
-	lwz	r12,0(r12)
-
-	lwz	r11,0(r12)
-	mtlr	r11
-	lwz	r11,4(r12)
-	mtspr	SRR0,r11
-	lwz	r11,8(r12)
-	mtspr	SRR1,r11
-
-	addi	r12,r12,12		/* Adjust stack pointer */
-	li	r20,0xd00-4
-	stw	r12,0(r20)
-
-	SYNC
-	rfi
-_end_back:
-
+	STD_EXCEPTION(0xc00, SystemCall, UnknownException)
 	STD_EXCEPTION(0xd00, SingleStep, UnknownException)

 	STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
--- a/cpu/arm925t/start.S
+++ b/cpu/arm925t/start.S
@@ -413,10 +413,9 @@ fiq:
 .globl reset_cpu
 reset_cpu:
 	ldr	r1, rstctl1     /* get clkm1 reset ctl */
-	mov     r3, #0x0
-	strh	r3, [r1]        /* clear it */
-	mov     r3, #0x8
-	strh    r3, [r1]        /* force dsp+arm reset */
+	mov     r3, #0x3	/* dsp_en + arm_rst = global reset */
+	strh	r3, [r1]        /* force reset */
+	mov	r0, r0
 _loop_forever:
 	b	_loop_forever
 rstctl1:
--- a/cpu/i386/interrupts.c
+++ b/cpu/i386/interrupts.c
@@ -22,7 +22,6 @@
 */

 #include <common.h>
-#include <syscall.h>
 #include <malloc.h>
 #include <asm/io.h>
 #include <asm/i8259.h>
@@ -58,31 +57,6 @@ typedef struct {

 static irq_desc_t irq_table[MAX_IRQ];

-
-asm(".globl syscall_entry\n" \
-	"syscall_entry:\n" \
-	"popl   %ebx\n"        /* throw away the return address, flags  */ \
-	"popl   %ebx\n"        /* and segment that the INT instruction pushed */ \
-	"popl   %ebx\n"        /* on to the stack */ \
-	"movl   %eax, %ecx\n"  /* load the syscall nr argument*/ \
-	"movl   syscall_tbl, %eax\n" /* load start of syscall table */ \
-	"cmpl   $(11-1), %ecx\n"  /* FixMe: find a way to use NR_SYSCALLS macro here */ \
-	"ja     bad_syscall\n" \
-	"movl   (%eax, %ecx, 4), %eax\n" /* load the handler of the syscall*/ \
-	"test   %eax, %eax\n" /* test for null */ \
-	"je     bad_syscall\n" \
-	"popl   %ecx\n" \
-	"popl   %ebx\n" \
-	"sti    \n" \
-	"jmp    *%eax\n" \
-"bad_syscall: movl $0xffffffff, %eax\n" \
-	"popl   %ecx\n" \
-	"popl   %ebx\n" \
-	"ret");
-
-void __attribute__ ((regparm(0))) syscall_entry(void);
-
-
 asm ("irq_return:\n"
     "     addl  $4, %esp\n"
     "     popa\n"
@@ -483,7 +457,6 @@ int interrupt_init(void)
 	set_vector(0x2e, irq_14);
 	set_vector(0x2f, irq_15);
 	/* vectors 0x30-0x3f are reserved for irq 16-31 */
-	set_vector(0x40, syscall_entry);


 	/* Mask all interrupts */
--- a/cpu/mips/start.S
+++ b/cpu/mips/start.S
@@ -291,6 +291,11 @@ reset:
 relocate_code:
 	move	sp, a0		/* Set new stack pointer		*/

+	li	t0, CFG_MONITOR_BASE
+	la	t3, in_ram
+	lw	t2, -12(t3)	/* t2 <-- uboot_end_data	*/
+	move	t1, a2
+
 	/*
 	 * Fix GOT pointer:
 	 *
@@ -301,11 +306,6 @@ relocate_code:
 	add	gp, a2			/* gp now adjusted		*/
 	sub	t6, gp, t6		/* t6 <-- relocation offset	*/

-	li	t0, CFG_MONITOR_BASE
-	la	t3, in_ram
-	lw	t2, -12(t3)	/* t2 <-- uboot_end_data	*/
-	move	t1, a2
-
 	/*
 	 * t0 = source address
 	 * t1 = target address
--- a/cpu/mpc5xx/start.S
+++ b/cpu/mpc5xx/start.S
@@ -226,75 +226,7 @@ ProgramCheck:
 	STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
 	STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 	STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
-
-	. = 0xc00
-/*
- * r0 - SYSCALL number
- * r3-... arguments
- */
-SystemCall:
-	addis	r11,r0,0		/* get functions table addr */
-	ori	r11,r11,0		/* Note: this code is patched in trap_init */
-	addis	r12,r0,0		/* get number of functions */
-	ori	r12,r12,0
-
-	cmplw	0, r0, r12
-	bge	1f
-
-	rlwinm	r0,r0,2,0,31		/* fn_addr = fn_tbl[r0] */
-	add	r11,r11,r0
-	lwz	r11,0(r11)
-
-	li	r20,0xd00-4		/* Get stack pointer */
-	lwz	r12,0(r20)
-	subi	r12,r12,12		/* Adjust stack pointer */
-	li	r0,0xc00+_end_back-SystemCall
-	cmplw	0, r0, r12		/* Check stack overflow */
-	bgt	1f
-	stw	r12,0(r20)
-
-	mflr	r0
-	stw	r0,0(r12)
-	mfspr	r0,SRR0
-	stw	r0,4(r12)
-	mfspr	r0,SRR1
-	stw	r0,8(r12)
-
-	li	r12,0xc00+_back-SystemCall
-	mtlr	r12
-	mtspr	SRR0,r11
-
-1:	SYNC
-	rfi
-
-_back:
-
-	mfmsr	r11			/* Disable interrupts */
-	li	r12,0
-	ori	r12,r12,MSR_EE
-	andc	r11,r11,r12
-	SYNC				/* Some chip revs need this... */
-	mtmsr	r11
-	SYNC
-
-	li	r12,0xd00-4		/* restore regs */
-	lwz	r12,0(r12)
-
-	lwz	r11,0(r12)
-	mtlr	r11
-	lwz	r11,4(r12)
-	mtspr	SRR0,r11
-	lwz	r11,8(r12)
-	mtspr	SRR1,r11
-
-	addi	r12,r12,12		/* Adjust stack pointer */
-	li	r20,0xd00-4
-	stw	r12,0(r20)
-
-	SYNC
-	rfi
-_end_back:
-
+	STD_EXCEPTION(0xc00, SystemCall, UnknownException)
 	STD_EXCEPTION(0xd00, SingleStep, UnknownException)

 	STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
--- a/cpu/mpc5xxx/Makefile
+++ b/cpu/mpc5xxx/Makefile
@@ -28,7 +28,7 @@ LIB	= lib$(CPU).a
 START	= start.o
 ASOBJS	= io.o firmware_sc_task_bestcomm.impl.o firmware_sc_task.impl.o
 OBJS	= traps.o cpu.o cpu_init.o speed.o interrupts.o serial.o \
-	  loadtask.o fec.o
+	  loadtask.o fec.o pci_mpc5200.o

 all:	.depend $(START) $(ASOBJS) $(LIB)

--- a/cpu/mpc5xxx/cpu_init.c
+++ b/cpu/mpc5xxx/cpu_init.c
@@ -155,6 +155,11 @@ void cpu_init_f (void)
 #if defined(CFG_GPS_PORT_CONFIG)
 	*(vu_long *)MPC5XXX_GPS_PORT_CONFIG = CFG_GPS_PORT_CONFIG;
 #endif
+
+#if defined(CONFIG_MPC5200)
+	/* enable timebase */
+	*(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 13);
+#endif
 }

 /*
@@ -171,11 +176,6 @@ int cpu_init_r (void)
 	*(vu_long *)MPC5XXX_ICTL_CRIT |= 0x0001ffff;
 	*(vu_long *)MPC5XXX_ICTL_EXT &= ~0x00000f00;

-#if defined(CONFIG_MPC5200)
-	/* enable timebase */
-	*(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 13);
-#endif
-
 #if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_MPC5XXX_FEC)
 	/* load FEC microcode */
 	loadtask(0, 2);
--- a/cpu/mpc5xxx/fec.c
+++ b/cpu/mpc5xxx/fec.c
@@ -14,7 +14,7 @@
 #include "sdma.h"
 #include "fec.h"

-#define DEBUG	0x8
+/* #define DEBUG	0x28 */

 #if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
 	defined(CONFIG_MPC5XXX_FEC)
@@ -28,25 +28,33 @@ static void rfifo_print(mpc5xxx_fec_priv *fec);
 static uint32 local_crc32(char *string, unsigned int crc_value, int len);
 #endif

+typedef struct {
+    uint8 data[1500];           /* actual data */
+    int length;                 /* actual length */
+    int used;                   /* buffer in use or not */
+    uint8 head[16];             /* MAC header(6 + 6 + 2) + 2(aligned) */
+} NBUF;
+
 /********************************************************************/
 static int mpc5xxx_fec_rbd_init(mpc5xxx_fec_priv *fec)
 {
 	int ix;
 	char *data;
+	static int once = 0;

-	/*
-	 * the receive ring is located right after the transmit one
-	 */
 	for (ix = 0; ix < FEC_RBD_NUM; ix++) {
-		data = (char *)malloc(FEC_MAX_PKT_SIZE);
-		if (data == NULL) {
-			printf ("RBD INIT FAILED\n");
-			return -1;
+		if (!once) {
+			data = (char *)malloc(FEC_MAX_PKT_SIZE);
+			if (data == NULL) {
+				printf ("RBD INIT FAILED\n");
+				return -1;
+			}
+			fec->rbdBase[ix].dataPointer = (uint32)data;
 		}
 		fec->rbdBase[ix].status = FEC_RBD_EMPTY;
 		fec->rbdBase[ix].dataLength = 0;
-		fec->rbdBase[ix].dataPointer = (uint32)data;
 	}
+	once ++;

 	/*
 	 * have the last RBD to close the ring
@@ -335,11 +343,6 @@ static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis)
 	 */
 	SDMA_CLEAR_IEVENT(FEC_RECV_TASK_NO);

-	/*
-	 * Set SmartDMA intMask register to enable SmartDMA task interrupts
-	 */
-	SDMA_INT_ENABLE(FEC_RECV_TASK_NO);
-
 	/*
 	 * Initialize SmartDMA parameters stored in SRAM
 	 */
@@ -488,14 +491,16 @@ static int mpc5xxx_fec_init(struct eth_device *dev, bd_t * bis)
 	printf("mpc5xxx_fec_init... Done \n");
 #endif

-	return 0;
+	return 1;
 }

 /********************************************************************/
 static void mpc5xxx_fec_halt(struct eth_device *dev)
 {
-	mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)dev->priv;
+#if defined(CONFIG_MPC5200)
 	struct mpc5xxx_sdma *sdma = (struct mpc5xxx_sdma *)MPC5XXX_SDMA;
+#endif
+	mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)dev->priv;
 	int counter = 0xffff;

 #if (DEBUG & 0x2)
@@ -530,8 +535,6 @@ static void mpc5xxx_fec_halt(struct eth_device *dev)
 	 */
 	while ((counter--) && (!(fec->eth->ievent & 0x10000000))) ;

-	SDMA_INT_DISABLE (FEC_RECV_TASK_NO);
-
 	/*
 	 * Disable SmartDMA tasks
 	 */
@@ -671,7 +674,7 @@ static int mpc5xxx_fec_send(struct eth_device *dev, volatile void *eth_data,
 	pTbd = &fec->tbdBase[fec->tbdIndex];
 	pTbd->dataLength = data_length;
 	pTbd->dataPointer = (uint32)eth_data;
-	pTbd->status |= FEC_TBD_READY;
+	pTbd->status |= FEC_TBD_LAST | FEC_TBD_TC | FEC_TBD_READY;
 	fec->tbdIndex = (fec->tbdIndex + 1) % FEC_TBD_NUM;

 #if (DEBUG & 0x100)
@@ -729,8 +732,9 @@ static int mpc5xxx_fec_recv(struct eth_device *dev)
 	mpc5xxx_fec_priv *fec = (mpc5xxx_fec_priv *)dev->priv;
 	FEC_RBD *pRbd = &fec->rbdBase[fec->rbdIndex];
 	unsigned long ievent;
-	int frame_length;
-	char *frame;
+	int frame_length, len = 0;
+	NBUF *frame;
+	char buff[FEC_MAX_PKT_SIZE];

 #if (DEBUG & 0x1)
 	printf ("mpc5xxx_fec_recv %d Start...\n", fec->rbdIndex);
@@ -763,41 +767,40 @@ static int mpc5xxx_fec_recv(struct eth_device *dev)
 		}
 	}

-	/*
-	 * Do we have data in Rx FIFO?
-	 */
-	if ((pRbd->status & FEC_RBD_EMPTY) || !(pRbd->status & FEC_RBD_LAST)){
-		return 0;
-	}
+	if (!(pRbd->status & FEC_RBD_EMPTY)) {
+		if ((pRbd->status & FEC_RBD_LAST) && !(pRbd->status & FEC_RBD_ERR) &&
+			((pRbd->dataLength - 4) > 14)) {

-	/*
-	 * Pass the packet up only if reception was Ok
-	 */
-	if ((pRbd->dataLength <= 14) || (pRbd->status & FEC_RBD_ERR)) {
-		mpc5xxx_fec_rbd_clean(fec, pRbd);
-#if (DEBUG & 0x8)
-		printf( "X0" );
+			/*
+			 * Get buffer address and size
+			 */
+			frame = (NBUF *)pRbd->dataPointer;
+			frame_length = pRbd->dataLength - 4;
+
+#if (DEBUG & 0x20)
+			{
+				int i;
+				printf("recv data hdr:");
+				for (i = 0; i < 14; i++)
+					printf("%x ", *(frame->head + i));
+				printf("\n");
+			}
 #endif
-		return 0;
+			/*
+			 *  Fill the buffer and pass it to upper layers
+			 */
+			memcpy(buff, frame->head, 14);
+			memcpy(buff + 14, frame->data, frame_length);
+			NetReceive(buff, frame_length);
+			len = frame_length;
+		}
+		/*
+		 * Reset buffer descriptor as empty
+		 */
+		mpc5xxx_fec_rbd_clean(fec, pRbd);
 	}
-
-	/*
-	 * Get buffer address and size
-	 */
-	frame = (char *)pRbd->dataPointer;
-	frame_length = pRbd->dataLength;
-
-	/*
-	 * Pass the buffer to upper layers
-	 */
-	NetReceive(frame, frame_length);
-
-	/*
-	 * Reset buffer descriptor as empty
-	 */
-	mpc5xxx_fec_rbd_clean(fec, pRbd);
-
-	return frame_length;
+	SDMA_CLEAR_IEVENT (FEC_RECV_TASK_NO);
+	return len;
 }


@@ -824,6 +827,7 @@ int mpc5xxx_fec_initialize(bd_t * bis)
 	dev->send = mpc5xxx_fec_send;
 	dev->recv = mpc5xxx_fec_recv;

+	sprintf(dev->name, "FEC ETHERNET");
 	eth_register(dev);

 	return 1;
--- a/cpu/mpc5xxx/pci_mpc5200.c
+++ b/cpu/mpc5xxx/pci_mpc5200.c
@@ -0,0 +1,172 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#if defined(CONFIG_PCI) && defined(CONFIG_MPC5200)
+
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <pci.h>
+#include <mpc5xxx.h>
+
+/* System RAM mapped over PCI */
+#define CONFIG_PCI_MEMORY_BUS	CFG_SDRAM_BASE
+#define CONFIG_PCI_MEMORY_PHYS	CFG_SDRAM_BASE
+#define CONFIG_PCI_MEMORY_SIZE	(1024 * 1024 * 1024)
+
+/* PCIIWCR bit fields */
+#define IWCR_MEM	(0 << 3)
+#define IWCR_IO		(1 << 3)
+#define IWCR_READ	(0 << 1)
+#define IWCR_READLINE	(1 << 1)
+#define IWCR_READMULT	(2 << 1)
+#define IWCR_EN		(1 << 0)
+
+static int mpc5200_read_config_dword(struct pci_controller *hose,
+			      pci_dev_t dev, int offset, u32* value)
+{
+	*(volatile u32 *)MPC5XXX_PCI_CAR = (1 << 31) | dev | offset;
+	eieio();
+	*value = in_le32((volatile u32 *)CONFIG_PCI_IO_PHYS);
+	eieio();
+	*(volatile u32 *)MPC5XXX_PCI_CAR = 0;
+	return 0;
+}
+
+static int mpc5200_write_config_dword(struct pci_controller *hose,
+			      pci_dev_t dev, int offset, u32 value)
+{
+	*(volatile u32 *)MPC5XXX_PCI_CAR = (1 << 31) | dev | offset;
+	eieio();
+	out_le32((volatile u32 *)CONFIG_PCI_IO_PHYS, value);
+	eieio();
+	*(volatile u32 *)MPC5XXX_PCI_CAR = 0;
+	return 0;
+}
+
+void pci_mpc5xxx_init (struct pci_controller *hose)
+{
+	hose->first_busno = 0;
+	hose->last_busno = 0xff;
+
+	/* System space */
+	pci_set_region(hose->regions + 0,
+		       CONFIG_PCI_MEMORY_BUS,
+		       CONFIG_PCI_MEMORY_PHYS,
+		       CONFIG_PCI_MEMORY_SIZE,
+		       PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+	/* PCI memory space */
+	pci_set_region(hose->regions + 1,
+		       CONFIG_PCI_MEM_BUS,
+		       CONFIG_PCI_MEM_PHYS,
+		       CONFIG_PCI_MEM_SIZE,
+		       PCI_REGION_MEM);
+
+	/* PCI IO space */
+	pci_set_region(hose->regions + 2,
+		       CONFIG_PCI_IO_BUS,
+		       CONFIG_PCI_IO_PHYS,
+		       CONFIG_PCI_IO_SIZE,
+		       PCI_REGION_IO);
+
+	hose->region_count = 3;
+
+	pci_register_hose(hose);
+
+	/* GPIO Multiplexing - enable PCI */
+	*(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~(1 << 15);
+	
+	/* Set host bridge as pci master and enable memory decoding */
+	*(vu_long *)MPC5XXX_PCI_CMD |=
+		PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+	
+	/* Set maximum latency timer */
+	*(vu_long *)MPC5XXX_PCI_CFG |= (0xf800);
+
+	/* Set cache line size */
+	*(vu_long *)MPC5XXX_PCI_CFG = (*(vu_long *)MPC5XXX_PCI_CFG & ~0xff) |
+		(CFG_CACHELINE_SIZE / 4);
+	
+	/* Map MBAR to PCI space */
+	*(vu_long *)MPC5XXX_PCI_BAR0 = CFG_MBAR;
+	*(vu_long *)MPC5XXX_PCI_TBATR1 = CFG_MBAR | 1;
+	
+	/* Map RAM to PCI space */
+	*(vu_long *)MPC5XXX_PCI_BAR1 = CONFIG_PCI_MEMORY_BUS | (1 << 3);
+	*(vu_long *)MPC5XXX_PCI_TBATR1 = CONFIG_PCI_MEMORY_PHYS | 1;
+
+	/* Enable snooping for RAM */
+	*(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 15);
+	*(vu_long *)(MPC5XXX_XLBARB + 0x70) = CONFIG_PCI_MEMORY_PHYS | 0x1d;
+
+	/* Park XLB on PCI */
+	*(vu_long *)(MPC5XXX_XLBARB + 0x40) &= ~((7 << 8) | (3 << 5));
+	*(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (3 << 8) | (3 << 5);
+
+	/* Enable piplining */
+	*(vu_long *)(MPC5XXX_XLBARB + 0x40) &= ~(1 << 31);
+	
+	/* Disable interrupts from PCI controller */
+	*(vu_long *)MPC5XXX_PCI_GSCR &= ~(7 << 12);
+	*(vu_long *)MPC5XXX_PCI_ICR &= ~(7 << 24);
+	
+	/* Disable initiator windows */
+	*(vu_long *)MPC5XXX_PCI_IWCR = 0;
+	
+	/* Map PCI memory to physical space */
+	*(vu_long *)MPC5XXX_PCI_IW0BTAR = CONFIG_PCI_MEM_PHYS |
+		(((CONFIG_PCI_MEM_SIZE - 1) >> 8) & 0x00ff0000) |
+		(CONFIG_PCI_MEM_BUS >> 16);
+	*(vu_long *)MPC5XXX_PCI_IWCR |= (IWCR_MEM | IWCR_READ | IWCR_EN) << 24;
+
+	/* Map PCI I/O to physical space */
+	*(vu_long *)MPC5XXX_PCI_IW1BTAR = CONFIG_PCI_IO_PHYS |
+		(((CONFIG_PCI_IO_SIZE - 1) >> 8) & 0x00ff0000) |
+		(CONFIG_PCI_IO_BUS >> 16);
+	*(vu_long *)MPC5XXX_PCI_IWCR |= (IWCR_IO | IWCR_READ | IWCR_EN) << 16;
+
+	/* Reset the PCI bus */
+	*(vu_long *)MPC5XXX_PCI_GSCR |= 1;
+	udelay(1000);
+	*(vu_long *)MPC5XXX_PCI_GSCR &= ~1;
+	udelay(1000);
+
+	pci_set_ops(hose,
+		pci_hose_read_config_byte_via_dword,
+		pci_hose_read_config_word_via_dword,
+		mpc5200_read_config_dword,
+		pci_hose_write_config_byte_via_dword,
+		pci_hose_write_config_word_via_dword,
+		mpc5200_write_config_dword);
+	
+	udelay(1000);
+
+#ifdef CONFIG_PCI_SCAN_SHOW
+	printf("PCI:   Bus Dev VenId DevId Class Int\n");
+#endif
+
+	hose->last_busno = pci_hose_scan(hose);
+}
+#endif /* CONFIG_PCI && CONFIG_MPC5200 */
--- a/cpu/mpc5xxx/start.S
+++ b/cpu/mpc5xxx/start.S
@@ -103,7 +103,7 @@ boot_cold:
 boot_warm:
 	mfmsr	r5			/* save msr contents		*/

-#if defined(CFG_DEFAULT_MBAR)
+#if defined(CFG_DEFAULT_MBAR) && !defined(CFG_RAMBOOT)
 	lis	r3, CFG_MBAR@h
 	ori	r3, r3, CFG_MBAR@l
 #if defined(CONFIG_MPC5200)
@@ -208,75 +208,7 @@ ProgramCheck:

 	STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 	STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
-
-	. = 0xc00
-/*
- * r0 - SYSCALL number
- * r3-... arguments
- */
-SystemCall:
-	addis	r11,r0,0		/* get functions table addr */
-	ori	r11,r11,0		/* Note: this code is patched in trap_init */
-	addis	r12,r0,0		/* get number of functions */
-	ori	r12,r12,0
-
-	cmplw	0, r0, r12
-	bge	1f
-
-	rlwinm	r0,r0,2,0,31		/* fn_addr = fn_tbl[r0] */
-	add	r11,r11,r0
-	lwz	r11,0(r11)
-
-	li	r20,0xd00-4		/* Get stack pointer */
-	lwz	r12,0(r20)
-	subi	r12,r12,12		/* Adjust stack pointer */
-	li	r0,0xc00+_end_back-SystemCall
-	cmplw	0, r0, r12		/* Check stack overflow */
-	bgt	1f
-	stw	r12,0(r20)
-
-	mflr	r0
-	stw	r0,0(r12)
-	mfspr	r0,SRR0
-	stw	r0,4(r12)
-	mfspr	r0,SRR1
-	stw	r0,8(r12)
-
-	li	r12,0xc00+_back-SystemCall
-	mtlr	r12
-	mtspr	SRR0,r11
-
-1:	SYNC
-	rfi
-
-_back:
-
-	mfmsr	r11			/* Disable interrupts */
-	li	r12,0
-	ori	r12,r12,MSR_EE
-	andc	r11,r11,r12
-	SYNC				/* Some chip revs need this... */
-	mtmsr	r11
-	SYNC
-
-	li	r12,0xd00-4		/* restore regs */
-	lwz	r12,0(r12)
-
-	lwz	r11,0(r12)
-	mtlr	r11
-	lwz	r11,4(r12)
-	mtspr	SRR0,r11
-	lwz	r11,8(r12)
-	mtspr	SRR1,r11
-
-	addi	r12,r12,12		/* Adjust stack pointer */
-	li	r20,0xd00-4
-	stw	r12,0(r20)
-
-	SYNC
-	rfi
-_end_back:
-
+	STD_EXCEPTION(0xc00, SystemCall, UnknownException)
 	STD_EXCEPTION(0xd00, SingleStep, UnknownException)

 	STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
--- a/cpu/mpc824x/drivers/i2c/i2c1.c
+++ b/cpu/mpc824x/drivers/i2c/i2c1.c
@@ -1197,13 +1197,16 @@ int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
 	uchar *p;
 	int i;

-	p = dummy_buffer;
 	/* fill in address in big endian order */
-	for (i=0; i<alen; ++i)
-		*p++ = (addr >> (i * 8)) & 0xFF;
+	for (i=alen-1; i>=0; --i) {
+		buffer[i] = addr & 0xFF;
+		addr >>= 8;
+	}
 	/* fill in data */
+	p = dummy_buffer + alen;
+
 	for (i=0; i<len; ++i)
-		*p++ = *buffer;
+		*p++ = *buffer++;

 	status = I2C_do_buffer (0, I2C_MASTER_XMIT, chip, alen + len,
 				dummy_buffer, I2C_STOP, 1, I2C_NO_RESTART);
--- a/cpu/mpc824x/start.S
+++ b/cpu/mpc824x/start.S
@@ -259,74 +259,7 @@ ProgramCheck:
 	STD_EXCEPTION(EXC_OFF_DECR, Decrementer, timer_interrupt)
 	STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 	STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
-
-	. = 0xc00
-/*
- * r0 - SYSCALL number
- * r3-... arguments
- */
-SystemCall:
-	addis	r11,r0,0		/* get functions table addr */
-	ori	r11,r11,0		/* Note: this code is patched in trap_init */
-	addis	r12,r0,0		/* get number of functions */
-	ori	r12,r12,0
-
-	cmplw	0, r0, r12
-	bge	1f
-
-	rlwinm	r0,r0,2,0,31		/* fn_addr = fn_tbl[r0] */
-	add	r11,r11,r0
-	lwz	r11,0(r11)
-
-	li	r20,0xd00-4		/* Get stack pointer */
-	lwz	r12,0(r20)
-	subi	r12,r12,12		/* Adjust stack pointer */
-	li	r0,0xc00+_end_back-SystemCall
-	cmplw	0, r0, r12		/* Check stack overflow */
-	bgt	1f
-	stw	r12,0(r20)
-
-	mflr	r0
-	stw	r0,0(r12)
-	mfspr	r0,SRR0
-	stw	r0,4(r12)
-	mfspr	r0,SRR1
-	stw	r0,8(r12)
-
-	li	r12,0xc00+_back-SystemCall
-	mtlr	r12
-	mtspr	SRR0,r11
-
-1:	SYNC
-	rfi
-
-_back:
-
-	mfmsr	r11			/* Disable interrupts */
-	li	r12,0
-	ori	r12,r12,MSR_EE
-	andc	r11,r11,r12
-	SYNC				/* Some chip revs need this... */
-	mtmsr	r11
-	SYNC
-
-	li	r12,0xd00-4		/* restore regs */
-	lwz	r12,0(r12)
-
-	lwz	r11,0(r12)
-	mtlr	r11
-	lwz	r11,4(r12)
-	mtspr	SRR0,r11
-	lwz	r11,8(r12)
-	mtspr	SRR1,r11
-
-	addi	r12,r12,12		/* Adjust stack pointer */
-	li	r20,0xd00-4
-	stw	r12,0(r20)
-
-	SYNC
-	rfi
-_end_back:
+	STD_EXCEPTION(0xc00, SystemCall, UnknownException)

 	STD_EXCEPTION(EXC_OFF_TRACE, SingleStep, UnknownException)

--- a/cpu/mpc8260/commproc.c
+++ b/cpu/mpc8260/commproc.c
@@ -208,3 +208,27 @@ ulong post_word_load (void)
 }

 #endif	/* CONFIG_POST || CONFIG_LOGBUFFER*/
+
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+
+void bootcount_store (ulong a)
+{
+	volatile ulong *save_addr =
+		(volatile ulong *)(CFG_IMMR + CPM_BOOTCOUNT_ADDR);
+
+	save_addr[0] = a;
+	save_addr[1] = BOOTCOUNT_MAGIC;
+}
+
+ulong bootcount_load (void)
+{
+	volatile ulong *save_addr =
+		(volatile ulong *)(CFG_IMMR + CPM_BOOTCOUNT_ADDR);
+
+	if (save_addr[1] != BOOTCOUNT_MAGIC)
+		return 0;
+	else
+		return save_addr[0];
+}
+
+#endif /* CONFIG_BOOTCOUNT_LIMIT */
--- a/cpu/mpc8260/start.S
+++ b/cpu/mpc8260/start.S
@@ -319,75 +319,7 @@ ProgramCheck:

 	STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 	STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
-
-	. = 0xc00
-/*
- * r0 - SYSCALL number
- * r3-... arguments
- */
-SystemCall:
-	addis	r11,r0,0		/* get functions table addr */
-	ori	r11,r11,0		/* Note: this code is patched in trap_init */
-	addis	r12,r0,0		/* get number of functions */
-	ori	r12,r12,0
-
-	cmplw	0, r0, r12
-	bge	1f
-
-	rlwinm	r0,r0,2,0,31		/* fn_addr = fn_tbl[r0] */
-	add	r11,r11,r0
-	lwz	r11,0(r11)
-
-	li	r20,0xd00-4		/* Get stack pointer */
-	lwz	r12,0(r20)
-	subi	r12,r12,12		/* Adjust stack pointer */
-	li	r0,0xc00+_end_back-SystemCall
-	cmplw	0, r0, r12		/* Check stack overflow */
-	bgt	1f
-	stw	r12,0(r20)
-
-	mflr	r0
-	stw	r0,0(r12)
-	mfspr	r0,SRR0
-	stw	r0,4(r12)
-	mfspr	r0,SRR1
-	stw	r0,8(r12)
-
-	li	r12,0xc00+_back-SystemCall
-	mtlr	r12
-	mtspr	SRR0,r11
-
-1:	SYNC
-	rfi
-
-_back:
-
-	mfmsr	r11			/* Disable interrupts */
-	li	r12,0
-	ori	r12,r12,MSR_EE
-	andc	r11,r11,r12
-	SYNC				/* Some chip revs need this... */
-	mtmsr	r11
-	SYNC
-
-	li	r12,0xd00-4		/* restore regs */
-	lwz	r12,0(r12)
-
-	lwz	r11,0(r12)
-	mtlr	r11
-	lwz	r11,4(r12)
-	mtspr	SRR0,r11
-	lwz	r11,8(r12)
-	mtspr	SRR1,r11
-
-	addi	r12,r12,12		/* Adjust stack pointer */
-	li	r20,0xd00-4
-	stw	r12,0(r20)
-
-	SYNC
-	rfi
-_end_back:
-
+	STD_EXCEPTION(0xc00, SystemCall, UnknownException)
 	STD_EXCEPTION(0xd00, SingleStep, UnknownException)

 	STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
--- a/cpu/mpc8xx/commproc.c
+++ b/cpu/mpc8xx/commproc.c
@@ -110,3 +110,29 @@ ulong post_word_load (void)
 }

 #endif	/* CONFIG_POST || CONFIG_LOGBUFFER*/
+
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+
+void bootcount_store (ulong a)
+{
+	volatile ulong *save_addr =
+		(volatile ulong *)( ((immap_t *) CFG_IMMR)->im_cpm.cp_dpmem +
+		                    CPM_BOOTCOUNT_ADDR );
+
+	save_addr[0] = a;
+	save_addr[1] = BOOTCOUNT_MAGIC;
+}
+
+ulong bootcount_load (void)
+{
+	volatile ulong *save_addr =
+		(volatile ulong *)( ((immap_t *) CFG_IMMR)->im_cpm.cp_dpmem +
+		                    CPM_BOOTCOUNT_ADDR );
+
+	if (save_addr[1] != BOOTCOUNT_MAGIC)
+		return 0;
+	else
+		return save_addr[0];
+}
+
+#endif /* CONFIG_BOOTCOUNT_LIMIT */
--- a/cpu/mpc8xx/cpu.c
+++ b/cpu/mpc8xx/cpu.c
@@ -42,12 +42,23 @@
 static char *cpu_warning = "\n         " \
 	"*** Warning: CPU Core has Silicon Bugs -- Check the Errata ***";

-#if ((defined(CONFIG_MPC860) || defined(CONFIG_MPC855)) && \
+#if ((defined(CONFIG_MPC86x) || defined(CONFIG_MPC855)) && \
     !defined(CONFIG_MPC862))
-# ifdef CONFIG_MPC855
+
+# if defined(CONFIG_MPC855)
 #  define	ID_STR	"PC855"
+# elif defined(CONFIG_MPC852T)
+#  define	ID_STR	"PC852T"
+# elif defined(CONFIG_MPC859T)
+#  define	ID_STR	"PC859T"
+# elif defined(CONFIG_MPC859DSL)
+#  define	ID_STR	"PC859DSL"
+# elif defined(CONFIG_MPC860P)
+#  define	ID_STR	"PC860P"
+# elif defined(CONFIG_MPC866T)
+#  define	ID_STR	"PC866T"
 # else
-#  define	ID_STR	"PC860"
+#  define	ID_STR	"PC86x"	/* unknown 86x chip */
 # endif

 static int check_CPU (long clock, uint pvr, uint immr)
@@ -68,6 +79,10 @@ static int check_CPU (long clock, uint pvr, uint immr)
 	m = 0;

 	switch (k) {
+#ifdef CONFIG_MPC866_et_al
+                /* MPC866P/MPC866T/MPC859T/MPC859DSL/MPC852T */
+	case 0x08000003: pre = 'M'; suf = ""; m = 1; break;
+#else
 	case 0x00020001: pre = 'p'; suf = ""; break;
 	case 0x00030001: suf = ""; break;
 	case 0x00120003: suf = "A"; break;
@@ -76,17 +91,16 @@ static int check_CPU (long clock, uint pvr, uint immr)
 	case 0x00200004: suf = "B"; break;

 	case 0x00300004: suf = "C"; break;
-	case 0x00310004: suf = "C1"; m = 1;
-		break;
+	case 0x00310004: suf = "C1"; m = 1; break;

 	case 0x00200064: mid = "SR"; suf = "B"; break;
 	case 0x00300065: mid = "SR"; suf = "C"; break;
 	case 0x00310065: mid = "SR"; suf = "C1"; m = 1; break;
 	case 0x05010000: suf = "D3"; m = 1; break;
 	case 0x05020000: suf = "D4"; m = 1; break;
-
 		/* this value is not documented anywhere */
 	case 0x40000000: pre = 'P'; suf = "D"; m = 1; break;
+#endif

 	default: suf = NULL; break;
 	}
@@ -101,7 +115,7 @@ static int check_CPU (long clock, uint pvr, uint immr)
 	printf (" %u kB I-Cache", checkicache () >> 10);
 	printf (" %u kB D-Cache", checkdcache () >> 10);

-	/* lets check and see if we're running on a 860T (or P?) */
+	/* do we have a FEC (860T/P or 852/859/866)? */

 	immap->im_cpm.cp_fec.fec_addr_low = 0x12345678;
 	if (immap->im_cpm.cp_fec.fec_addr_low == 0x12345678) {
@@ -114,6 +128,12 @@ static int check_CPU (long clock, uint pvr, uint immr)

 	putc ('\n');

+#ifdef DEBUG
+        if(clock != measure_gclk()) {
+            printf ("clock %ldHz != %dHz\n", clock, measure_gclk());
+        }
+#endif
+
 	return 0;
 }

@@ -316,7 +336,7 @@ int checkicache (void)
 	volatile memctl8xx_t *memctl = &immap->im_memctl;
 	u32 cacheon = rd_ic_cst () & IDC_ENABLED;

-#ifdef CONFIG_IP860
+#ifdef CONFIG_IP86x
 	u32 k = memctl->memc_br1 & ~0x00007fff;	/* probe in flash memoryarea */
 #else
 	u32 k = memctl->memc_br0 & ~0x00007fff;	/* probe in flash memoryarea */
@@ -363,7 +383,7 @@ int checkdcache (void)
 	volatile memctl8xx_t *memctl = &immap->im_memctl;
 	u32 cacheon = rd_dc_cst () & IDC_ENABLED;

-#ifdef CONFIG_IP860
+#ifdef CONFIG_IP86x
 	u32 k = memctl->memc_br1 & ~0x00007fff;	/* probe in flash memoryarea */
 #else
 	u32 k = memctl->memc_br0 & ~0x00007fff;	/* probe in flash memoryarea */
@@ -462,8 +482,20 @@ unsigned long get_tbclk (void)
 	if (immr->im_clkrst.car_sccr & SCCR_TBS) {
 		return (gd->cpu_clk / 16);
 	}
+#define PLPRCR_val(a) (((CFG_PLPRCR) & PLPRCR_ ## a ## _MSK) >> PLPRCR_ ## a ## _SHIFT)
+#ifdef CONFIG_MPC866_et_al
+        /*                   MFN
+                     MFI + -------
+                           MFD + 1
+          factor =  -----------------
+                     (PDF + 1) * 2^S
+         */

-	factor = (((CFG_PLPRCR) & PLPRCR_MF_MSK) >> PLPRCR_MF_SHIFT) + 1;
+	factor = (PLPRCR_val(MFI) + PLPRCR_val(MFN)/(PLPRCR_val(MFD)+1))/
+                 (PLPRCR_val(PDF)+1) / (1<<PLPRCR_val(S));
+#else
+	factor = PLPRCR_val(MF)+1;
+#endif

 	oscclk = gd->cpu_clk / factor;

--- a/cpu/mpc8xx/cpu_init.c
+++ b/cpu/mpc8xx/cpu_init.c
@@ -145,6 +145,7 @@ void cpu_init_f (volatile immap_t * immr)
    defined(CONFIG_RPXCLASSIC)	|| \
    defined(CONFIG_RPXLITE)	|| \
    defined(CONFIG_SPD823TS)	|| \
+    defined(CONFIG_MPC86xADS)	|| \
   (defined(CONFIG_MPC860T) && defined(CONFIG_FADS))

 	memctl->memc_br0 = CFG_BR0_PRELIM;
--- a/cpu/mpc8xx/fec.c
+++ b/cpu/mpc8xx/fec.c
@@ -217,7 +217,8 @@ static int fec_init(struct eth_device* dev, bd_t * bd)
 	volatile immap_t *immr = (immap_t *) CFG_IMMR;
 	volatile fec_t *fecp = &(immr->im_cpm.cp_fec);

-#if defined(CONFIG_FADS) && defined(CONFIG_MPC860T)
+#if defined(CONFIG_FADS) && \
+	( defined(CONFIG_MPC860T) || defined(CONFIG_MPC866_et_al) )
 	/* configure FADS for fast (FEC) ethernet, half-duplex */
 	/* The LXT970 needs about 50ms to recover from reset, so
 	 * wait for it by discovering the PHY before leaving eth_init().
--- a/cpu/mpc8xx/interrupts.c
+++ b/cpu/mpc8xx/interrupts.c
@@ -334,7 +334,11 @@ void timer_interrupt (struct pt_regs *regs)
 	/* Reset Timer Expired and Timers Interrupt Status */
 	immr->im_clkrstk.cark_plprcrk = KAPWR_KEY;
 	__asm__ ("nop");
+#ifdef CONFIG_MPC866_et_al
+	immr->im_clkrst.car_plprcr |= PLPRCR_TEXPS;
+#else
 	immr->im_clkrst.car_plprcr |= PLPRCR_TEXPS | PLPRCR_TMIST;
+#endif
 	/* Restore Decrementer Count */
 	set_dec (decrementer_count);

--- a/cpu/mpc8xx/lcd.c
+++ b/cpu/mpc8xx/lcd.c
@@ -61,9 +61,9 @@
 /* ** BITMAP DISPLAY SUPPORT  -- should probably be moved elsewhere	*/
 /************************************************************************/

-#if (CONFIG_COMMANDS & CFG_CMD_BMP)
+#if (CONFIG_COMMANDS & CFG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
 #include <bmp_layout.h>
-#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) */
+#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) || CONFIG_SPLASH_SCREEN */

 /************************************************************************/
 /* ** FONT AND LOGO DATA						*/
@@ -1176,7 +1176,7 @@ static void bitmap_plot (int x, int y)
 }
 #endif /* CONFIG_LCD_LOGO */

-#if (CONFIG_COMMANDS & CFG_CMD_BMP)
+#if (CONFIG_COMMANDS & CFG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
 /*
 * Display the BMP file located at address bmp_image.
 * Only uncompressed
@@ -1273,7 +1273,7 @@ int lcd_display_bitmap(ulong bmp_image)

 	return (0);
 }
-#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) */
+#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) || CONFIG_SPLASH_SCREEN */

 /*----------------------------------------------------------------------*/

--- a/cpu/mpc8xx/scc.c
+++ b/cpu/mpc8xx/scc.c
@@ -192,9 +192,9 @@ static int scc_init(struct eth_device* dev, bd_t *bis)

    volatile immap_t *immr = (immap_t *)CFG_IMMR;

-#if defined(CONFIG_FADS)
-#if defined(CONFIG_MPC860T)
-    /* The FADS860T doesn't use the MODEM_EN or DATA_VOICE signals.	*/
+#ifdef CONFIG_FADS
+#if defined(CONFIG_MPC86xADS) || defined(CONFIG_MPC860T)
+    /* The MPC86xADS/FADS860T don't use the MODEM_EN or DATA_VOICE signals. */
    *((uint *) BCSR4) &= ~BCSR4_ETHLOOP;
    *((uint *) BCSR4) |= BCSR4_TFPLDL|BCSR4_TPSQEL;
    *((uint *) BCSR1) &= ~BCSR1_ETHEN;
--- a/cpu/mpc8xx/serial.c
+++ b/cpu/mpc8xx/serial.c
@@ -68,6 +68,23 @@
 #error "console not correctly defined"
 #endif

+static void serial_setdivisor(volatile cpm8xx_t *cp)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+	int divisor=gd->cpu_clk/16/gd->baudrate;
+
+	if(divisor/16>0x1000) {
+		/* bad divisor, assume 50Mhz clock and 9600 baud */
+		divisor=(50*1000*1000)/16/9600;
+	}
+
+	if(divisor<=0x1000) {
+		cp->cp_brgc1=((divisor-1)<<1) | CPM_BRG_EN;
+	} else {
+		cp->cp_brgc1=((divisor/16-1)<<1) | CPM_BRG_EN | CPM_BRG_DIV16;
+	}
+}
+
 #if (defined (CONFIG_8xx_CONS_SMC1) || defined (CONFIG_8xx_CONS_SMC2))

 /*
@@ -229,8 +246,6 @@ int serial_init (void)
 void
 serial_setbrg (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	volatile immap_t *im = (immap_t *)CFG_IMMR;
 	volatile cpm8xx_t *cp = &(im->im_cpm);

@@ -242,8 +257,7 @@ serial_setbrg (void)

 	cp->cp_simode = 0x00000000;

-	cp->cp_brgc1 =
-		(((gd->cpu_clk / 16 / gd->baudrate)-1) << 1) | CPM_BRG_EN;
+	serial_setdivisor(cp);
 }

 #ifdef CONFIG_MODEM_SUPPORT
@@ -506,8 +520,6 @@ int serial_init (void)
 void
 serial_setbrg (void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	volatile immap_t *im = (immap_t *)CFG_IMMR;
 	volatile cpm8xx_t *cp = &(im->im_cpm);

@@ -518,10 +530,8 @@ serial_setbrg (void)
 	 */

 	cp->cp_sicr &= ~(0x000000FF << (8 * SCC_INDEX));
-	/* no |= needed, since BRG1 is 000 */

-	cp->cp_brgc1 =
-		(((gd->cpu_clk / 16 / gd->baudrate)-1) << 1) | CPM_BRG_EN;
+	serial_setdivisor(cp);
 }

 void
--- a/cpu/mpc8xx/speed.c
+++ b/cpu/mpc8xx/speed.c
@@ -32,7 +32,6 @@
 #define SPEED_PITC	 ((SPEED_PIT_COUNTS - 1) << PITC_SHIFT)
 #define SPEED_PITC_INIT	 ((SPEED_PIT_COUNTS + 1) << PITC_SHIFT)

-#if !defined(CONFIG_8xx_GCLK_FREQ)
 /* Access functions for the Machine State Register */
 static __inline__ unsigned long get_msr(void)
 {
@@ -46,7 +45,6 @@ static __inline__ void set_msr(unsigned long msr)
 {
 	asm volatile("mtmsr %0" : : "r" (msr));
 }
-#endif

 /* ------------------------------------------------------------------------- */

@@ -83,16 +81,20 @@ static __inline__ void set_msr(unsigned long msr)
 * CPU clock that is an even multiple of 0.1 MHz.
 */

-int get_clocks (void)
+unsigned long measure_gclk(void)
 {
-	DECLARE_GLOBAL_DATA_PTR;
-
 	volatile immap_t *immr = (immap_t *) CFG_IMMR;
-#ifndef	CONFIG_8xx_GCLK_FREQ
 	volatile cpmtimer8xx_t *timerp = &immr->im_cpmtimer;
 	ulong timer2_val;
 	ulong msr_val;

+#ifdef CONFIG_MPC866_et_al
+        /* dont use OSCM, only use EXTCLK/512 */
+        immr->im_clkrst.car_sccr |= SCCR_RTSEL | SCCR_RTDIV;
+#else
+        immr->im_clkrst.car_sccr &= ~(SCCR_RTSEL | SCCR_RTDIV);
+#endif
+
 	/* Reset + Stop Timer 2, no cascading
 	 */
 	timerp->cpmt_tgcr &= ~(TGCR_CAS2 | TGCR_RST2);
@@ -158,10 +160,27 @@ int get_clocks (void)
 	timerp->cpmt_tgcr &= ~(TGCR_RST2 | TGCR_FRZ2 | TGCR_STP2);
 	immr->im_sit.sit_piscr &= ~PISCR_PTE;

-	gd->cpu_clk = ((timer2_val + 2) / 4) * 100000L;	/* convert to Hz    */
+#ifdef CONFIG_MPC866_et_al
+        /* not using OSCM, using XIN, so scale appropriately */
+	return (((timer2_val + 2) / 4) * (CFG_8XX_XIN/512))/8192 * 100000L;
+#else
+	return ((timer2_val + 2) / 4) * 100000L;	/* convert to Hz    */
+#endif
+}

+/*
+ * get_clocks() fills in gd->cpu_clock depending on CONFIG_8xx_GCLK_FREQ
+ * or (if it is not defined) measure_gclk() (which uses the ref clock)
+ * from above.
+ */
+int get_clocks (void)
+{
+	DECLARE_GLOBAL_DATA_PTR;
+
+	volatile immap_t *immr = (immap_t *) CFG_IMMR;
+#ifndef	CONFIG_8xx_GCLK_FREQ
+	gd->cpu_clk = measure_gclk();
 #else /* CONFIG_8xx_GCLK_FREQ */
-
 	/*
 	 * If for some reason measuring the gclk frequency won't
 	 * work, we return the hardwired value.
--- a/cpu/mpc8xx/start.S
+++ b/cpu/mpc8xx/start.S
@@ -76,7 +76,7 @@
 	GOT_ENTRY(__init_end)
 	GOT_ENTRY(_end)
 	GOT_ENTRY(__bss_start)
-#if defined(CONFIG_FADS) || defined(CONFIG_ICU862)
+#if defined(CONFIG_ICU862)
 	GOT_ENTRY(environment)
 #endif
 	END_GOT
@@ -266,75 +266,7 @@ ProgramCheck:
 	STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
 	STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 	STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
-
-	. = 0xc00
-/*
- * r0 - SYSCALL number
- * r3-... arguments
- */
-SystemCall:
-	addis	r11,r0,0		/* get functions table addr */
-	ori	r11,r11,0		/* Note: this code is patched in trap_init */
-	addis	r12,r0,0		/* get number of functions */
-	ori	r12,r12,0
-
-	cmplw	0, r0, r12
-	bge	1f
-
-	rlwinm	r0,r0,2,0,31		/* fn_addr = fn_tbl[r0] */
-	add	r11,r11,r0
-	lwz	r11,0(r11)
-
-	li	r20,0xd00-4		/* Get stack pointer */
-	lwz	r12,0(r20)
-	subi	r12,r12,12		/* Adjust stack pointer */
-	li	r0,0xc00+_end_back-SystemCall
-	cmplw	0, r0, r12		/* Check stack overflow */
-	bgt	1f
-	stw	r12,0(r20)
-
-	mflr	r0
-	stw	r0,0(r12)
-	mfspr	r0,SRR0
-	stw	r0,4(r12)
-	mfspr	r0,SRR1
-	stw	r0,8(r12)
-
-	li	r12,0xc00+_back-SystemCall
-	mtlr	r12
-	mtspr	SRR0,r11
-
-1:	SYNC
-	rfi
-
-_back:
-
-	mfmsr	r11			/* Disable interrupts */
-	li	r12,0
-	ori	r12,r12,MSR_EE
-	andc	r11,r11,r12
-	SYNC				/* Some chip revs need this... */
-	mtmsr	r11
-	SYNC
-
-	li	r12,0xd00-4		/* restore regs */
-	lwz	r12,0(r12)
-
-	lwz	r11,0(r12)
-	mtlr	r11
-	lwz	r11,4(r12)
-	mtspr	SRR0,r11
-	lwz	r11,8(r12)
-	mtspr	SRR1,r11
-
-	addi	r12,r12,12		/* Adjust stack pointer */
-	li	r20,0xd00-4
-	stw	r12,0(r20)
-
-	SYNC
-	rfi
-_end_back:
-
+	STD_EXCEPTION(0xc00, SystemCall, UnknownException)
 	STD_EXCEPTION(0xd00, SingleStep, UnknownException)

 	STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
@@ -685,7 +617,7 @@ clear_bss:
 	 * Now clear BSS segment
 	 */
 	lwz	r3,GOT(__bss_start)
-#if defined(CONFIG_FADS) || defined(CONFIG_ICU862)
+#if defined(CONFIG_ICU862)
 	/*
 	 * For the FADS - the environment is the very last item in flash.
 	 * The real .bss stops just before environment starts, so only
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -769,75 +769,7 @@ ProgramCheck:
 	STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
 	STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
 	STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
-
-	. = 0xc00
-/*
- * r0 - SYSCALL number
- * r3-... arguments
- */
-SystemCall:
-	addis	r11,r0,0		/* get functions table addr */
-	ori	r11,r11,0		/* Note: this code is patched in trap_init */
-	addis	r12,r0,0		/* get number of functions */
-	ori	r12,r12,0
-
-	cmplw	0, r0, r12
-	bge	1f
-
-	rlwinm	r0,r0,2,0,31		/* fn_addr = fn_tbl[r0] */
-	add	r11,r11,r0
-	lwz	r11,0(r11)
-
-	li	r20,0xd00-4		/* Get stack pointer */
-	lwz	r12,0(r20)
-	subi	r12,r12,12		/* Adjust stack pointer */
-	li	r0,0xc00+_end_back-SystemCall
-	cmplw	0, r0, r12		/* Check stack overflow */
-	bgt	1f
-	stw	r12,0(r20)
-
-	mflr	r0
-	stw	r0,0(r12)
-	mfspr	r0,SRR0
-	stw	r0,4(r12)
-	mfspr	r0,SRR1
-	stw	r0,8(r12)
-
-	li	r12,0xc00+_back-SystemCall
-	mtlr	r12
-	mtspr	SRR0,r11
-
-1:	SYNC
-	rfi
-
-_back:
-
-	mfmsr	r11			/* Disable interrupts */
-	li	r12,0
-	ori	r12,r12,MSR_EE
-	andc	r11,r11,r12
-	SYNC				/* Some chip revs need this... */
-	mtmsr	r11
-	SYNC
-
-	li	r12,0xd00-4		/* restore regs */
-	lwz	r12,0(r12)
-
-	lwz	r11,0(r12)
-	mtlr	r11
-	lwz	r11,4(r12)
-	mtspr	SRR0,r11
-	lwz	r11,8(r12)
-	mtspr	SRR1,r11
-
-	addi	r12,r12,12		/* Adjust stack pointer */
-	li	r20,0xd00-4
-	stw	r12,0(r20)
-
-	SYNC
-	rfi
-_end_back:
-
+	STD_EXCEPTION(0xc00, SystemCall, UnknownException)
 	STD_EXCEPTION(0xd00, SingleStep, UnknownException)

 	STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
--- a/doc/README.INCA-IP
+++ b/doc/README.INCA-IP
@@ -41,4 +41,18 @@ to install a U-Boot image into flash.
 	go 0xb0000000


+
+Ethernet autonegotiation needs some time to complete. Instead of
+delaying the boot process in all cases, we just start the
+autonegotiation process when U-Boot comes up and that is all. Most
+likely, it will complete by the time the network transfer is
+attempted for the first time. In the worst case, if a transfer is
+attempted before the autonegotiation is complete, just a single
+packet would be lost resulting in a single timeout error, and then
+the transfer would proceed normally. So the time that we would have
+lost unconditionally waiting for the autonegotiation to complete, we
+have to wait only if the file transfer is started immediately after
+reset. We've verified that this works for all the clock
+configurations.
+
 (C) 2003 Wolfgang Denk
--- a/doc/README.lynxkdi
+++ b/doc/README.lynxkdi
@@ -0,0 +1,57 @@
+			   LYNX KDI SUPPORT
+
+		    Last Update: July 20, 2003
+=======================================================================
+
+This file describes support for LynuxWorks KDI within U-Boot. Support
+is enabled by defining CONFIG_LYNXKDI.
+
+
+LYNXOS AND BLUECAT SUPPORTED
+============================
+Both LynxOS and BlueCat linux KDIs are supported. The implementation
+automatically detects which is being booted. When you use mkimage
+you should specify "lynxos" for both (see target-specific notes).
+
+
+SUPPORTED ARCHITECTURE/TARGETS
+==============================
+The following targets have been tested:
+
+-PowerPC  MPC8260ADS
+
+
+FILES TO LOOK AT
+================
+include/lynxkdi.h    -defines a simple struct passed to a kdi.
+common/lynxkdi.c     -implements the call to the kdi.
+common/cmd_bootm.c   -top-level command implementation ("bootm").
+
+
+====================================================================
+TARGET SPECIFIC NOTES
+====================================================================
+
+MPC8260ADS
+===========
+The default LynxOS and BlueCat implementations require some
+modifications to the config file.
+
+Edit include/configs/MPC8260ADS.h to use the following:
+
+#define CFG_IMMR	0xFA200000
+#define CFG_BCSR	0xFA100000
+#define CFG_BR1_PRELIM	0xFA101801
+
+When creating a LynxOS or BlueCat u-boot image using mkimage,
+you must specify the following:
+
+Both:    -A ppc -O lynxos -T kernel -C none
+LynxOS:  -a 0x00004000 -e 0x00004020
+BlueCat: -a 0x00500000 -e 0x00507000
+
+To pass the MAC address to BlueCat you should define the
+"fcc2_ether_addr" parameter in the "bootargs" environment
+variable. E.g.:
+
+==> setenv bootargs fcc2_ether_addr=00:11:22:33:44:55:66
--- a/doc/README.standalone
+++ b/doc/README.standalone
@@ -0,0 +1,96 @@
+Design Notes on Exporting U-Boot Functions to Standalone Applications:
+======================================================================
+
+1. The functions are exported by U-Boot via a jump table. The jump
+   table is allocated and initialized in the jumptable_init() routine
+   (common/exports.c). Other routines may also modify the jump table,
+   however. The jump table can be accessed as the 'jt' field of the
+   'global_data' structure. The slot numbers for the jump table are
+   defined in the <include/exports.h> header. E.g., to substitute the
+   malloc() and free() functions that will be available to standalone
+   applications, one should do the following:
+
+	DECLARE_GLOBAL_DATA_PTR;
+
+	gd->jt[XF_malloc]	= my_malloc;
+	gd->jt[XF_free]		= my_free;
+
+   Note that the pointers to the functions all have 'void *' type and
+   thus the compiler cannot perform type checks on these assignments.
+
+2. The pointer to the jump table is passed to the application in a
+   machine-dependent way. PowerPC, ARM and MIPS architectures use a
+   dedicated register to hold the pointer to the 'global_data'
+   structure: r29 on PowerPC, r8 on ARM and k0 on MIPS. The x86
+   architecture does not use such a register; instead, the pointer to
+   the 'global_data' structure is passed as 'argv[-1]' pointer.
+
+   The application can access the 'global_data' structure in the same
+   way as U-Boot does:
+
+	DECLARE_GLOBAL_DATA_PTR;
+
+	printf("U-Boot relocation offset: %x\n", gd->reloc_off);
+
+3. The application should call the app_startup() function before any
+   call to the exported functions. Also, implementor of the
+   application may want to check the version of the ABI provided by
+   U-Boot. To facilitate this, a get_version() function is exported
+   that returns the ABI version of the running U-Boot. I.e., a
+   typical application startup may look like this:
+
+	int my_app (int argc, char *argv[])
+	{
+		app_startup (argv);
+		if (get_version () != XF_VERSION)
+			return 1;
+	}
+
+4. The default load and start addresses of the applications are as
+   follows:
+
+		Load address	Start address
+	x86	0x00040000	0x00040000
+	PowerPC	0x00040000	0x00040004
+	ARM	0x0c100000	0x0c100000
+	MIPS	0x80200000	0x80200000
+
+   For example, the "hello world" application may be loaded and
+   executed on a PowerPC board with the following commands:
+
+   => tftp 0x40000 hello_world.bin
+   => go 0x40004
+
+5. To export some additional function foobar(), the following steps
+   should be undertaken:
+
+   - Append the following line at the end of the include/_exports.h
+     file:
+
+	EXPORT_FUNC(foobar)
+
+   - Add the prototype for this function to the include/exports.h
+     file:
+
+	void foobar(void);
+
+   - Add the initialization of the jump table slot wherever
+     appropriate (most likely, to the jumptable_init() function):
+
+	gd->jt[XF_foobar] = foobar;
+
+   - Increase the XF_VERSION value by one in the include/exports.h
+     file
+
+6. The code for exporting the U-Boot functions to applications is
+   mostly machine-independent. The only places written in assembly
+   language are stub functions that perform the jump through the jump
+   table. That said, to port this code to a new architecture, the
+   only thing to be provided is the code in the examples/stubs.c
+   file. If this architecture, however, uses some uncommon method of
+   passing the 'global_data' pointer (like x86 does), one should add
+   the respective code to the app_startup() function in that file.
+
+   Note that these functions may only use call-clobbered registers;
+   those registers that are used to pass the function's arguments,
+   the stack contents and the return address should be left intact.
--- a/drivers/inca-ip_sw.c
+++ b/drivers/inca-ip_sw.c
@@ -70,10 +70,8 @@

 typedef struct
 {
-	union
-	{
-		struct
-		{
+	union {
+		struct {
 			volatile u32 HOLD                :1;
 			volatile u32 ICpt                :1;
 			volatile u32 IEop                :1;
@@ -89,10 +87,8 @@ typedef struct

 	volatile u32 RxDataPtr;

-	union
-	{
-		struct
-		{
+	union {
+		struct {
 			volatile u32 C                   :1;
 			volatile u32 Sop                 :1;
 			volatile u32 Eop                 :1;
@@ -108,10 +104,8 @@ typedef struct

 typedef struct
 {
-	union
-	{
-		struct
-		{
+	union {
+		struct {
 			volatile u32 HOLD                :1;
 			volatile u32 Eop                 :1;
 			volatile u32 Sop                 :1;
@@ -159,8 +153,7 @@ int inca_switch_initialize(bd_t * bis)
 	printf("Entered inca_switch_initialize()\n");
 #endif

-	if (!(dev = (struct eth_device *) malloc (sizeof *dev)))
-	{
+	if (!(dev = (struct eth_device *) malloc (sizeof *dev))) {
 		printf("Failed to allocate memory\n");
 		return 0;
 	}
@@ -196,8 +189,8 @@ static int inca_switch_init(struct eth_device *dev, bd_t * bis)
 	printf("Entering inca_switch_init()\n");
 #endif

-		/* Set MAC address.
-		 */
+	/* Set MAC address.
+	 */
 	wTmp = (u16)dev->enetaddr[0];
 	regValue = (wTmp << 8) | dev->enetaddr[1];

@@ -211,35 +204,32 @@ static int inca_switch_init(struct eth_device *dev, bd_t * bis)

 	SW_WRITE_REG(INCA_IP_Switch_PMAC_SA2, regValue);

-		/* Initialize the descriptor rings.
-		 */
+	/* Initialize the descriptor rings.
+	 */
 	for (i = 0; i < NUM_RX_DESC; i++)
 	{
 		inca_rx_descriptor_t * rx_desc = KSEG1ADDR(&rx_ring[i]);
 		memset(rx_desc, 0, sizeof(rx_ring[i]));

-			/* Set maximum size of receive buffer.
-			 */
+		/* Set maximum size of receive buffer.
+		 */
 		rx_desc->params.field.NFB = PKTSIZE_ALIGN;

-			/* Set the offset of the receive buffer. Zero means
-			 * that the offset mechanism is not used.
-			 */
+		/* Set the offset of the receive buffer. Zero means
+		 * that the offset mechanism is not used.
+		 */
 		rx_desc->params.field.offset = 0;

 		/* Check if it is the last descriptor.
 		 */
-		if (i == (NUM_RX_DESC - 1))
-		{
-				/* Let the last descriptor point to the first
-				 * one.
-				 */
+		if (i == (NUM_RX_DESC - 1)) {
+			/* Let the last descriptor point to the first
+			 * one.
+			 */
 			rx_desc->nextRxDescPtr = KSEG1ADDR((u32)rx_ring);
-		}
-		else
-		{
-				/* Set the address of the next descriptor.
-				 */
+		} else {
+			/* Set the address of the next descriptor.
+			 */
 			rx_desc->nextRxDescPtr = (u32)KSEG1ADDR(&rx_ring[i+1]);
 		}

@@ -251,8 +241,7 @@ static int inca_switch_init(struct eth_device *dev, bd_t * bis)
 	printf("tx_ring = 0x%08X 0x%08X\n", (u32)tx_ring, (u32)&tx_ring[0]);
 #endif

-	for (i = 0; i < NUM_TX_DESC; i++)
-	{
+	for (i = 0; i < NUM_TX_DESC; i++) {
 		inca_tx_descriptor_t * tx_desc = KSEG1ADDR(&tx_ring[i]);

 		memset(tx_desc, 0, sizeof(tx_ring[i]));
@@ -263,46 +252,43 @@ static int inca_switch_init(struct eth_device *dev, bd_t * bis)

 			/* Check if it is the last descriptor.
 			 */
-		if (i == (NUM_TX_DESC - 1))
-		{
+		if (i == (NUM_TX_DESC - 1)) {
 				/* Let the last descriptor point to the
 				 * first one.
 				 */
 			tx_desc->nextTxDescPtr = KSEG1ADDR((u32)tx_ring);
-		}
-		else
-		{
+		} else {
 				/* Set the address of the next descriptor.
 				 */
 			tx_desc->nextTxDescPtr = (u32)KSEG1ADDR(&tx_ring[i+1]);
 		}
 	}

-		/* Initialize RxDMA.
-		 */
+	/* Initialize RxDMA.
+	 */
 	DMA_READ_REG(INCA_IP_DMA_DMA_RXISR, v);
 #if 0
 	printf("RX status = 0x%08X\n", v);
 #endif

-		/* Writing to the FRDA of CHANNEL.
-		 */
+	/* Writing to the FRDA of CHANNEL.
+	 */
 	DMA_WRITE_REG(INCA_IP_DMA_DMA_RXFRDA0, (u32)rx_ring);

-		/* Writing to the COMMAND REG.
-		 */
+	/* Writing to the COMMAND REG.
+	 */
 	DMA_WRITE_REG(INCA_IP_DMA_DMA_RXCCR0,
 		      INCA_IP_DMA_DMA_RXCCR0_INIT);

-		/* Initialize TxDMA.
-		 */
+	/* Initialize TxDMA.
+	 */
 	DMA_READ_REG(INCA_IP_DMA_DMA_TXISR, v);
 #if 0
 	printf("TX status = 0x%08X\n", v);
 #endif

-		/* Writing to the FRDA of CHANNEL.
-		 */
+	/* Writing to the FRDA of CHANNEL.
+	 */
 	DMA_WRITE_REG(INCA_IP_DMA_DMA_TXFRDA0, (u32)tx_ring);

 	tx_new = rx_new = 0;
@@ -313,12 +299,12 @@ static int inca_switch_init(struct eth_device *dev, bd_t * bis)
 #if 0
 	rx_ring[rx_hold].params.field.HOLD = 1;
 #endif
-	   /* enable spanning tree forwarding, enable the CPU port */
-	   /* ST_PT:
-		 CPS (CPU port status)   0x3 (forwarding)
-		 LPS (LAN port status)   0x3 (forwarding)
-		 PPS (PC port status)    0x3 (forwarding)
-	   */
+	/* enable spanning tree forwarding, enable the CPU port */
+	/* ST_PT:
+	 *	CPS (CPU port status)   0x3 (forwarding)
+	 *	LPS (LAN port status)   0x3 (forwarding)
+	 *	PPS (PC port status)    0x3 (forwarding)
+	 */
 	SW_WRITE_REG(INCA_IP_Switch_ST_PT,0x3f);

 #if 0
@@ -342,23 +328,19 @@ static int inca_switch_send(struct eth_device *dev, volatile void *packet,
 	printf("Entered inca_switch_send()\n");
 #endif

-	if (length <= 0)
-	{
+	if (length <= 0) {
 		printf ("%s: bad packet size: %d\n", dev->name, length);
 		goto Done;
 	}

-	for(i = 0; tx_desc->C == 0; i++)
-	{
-		if (i >= TOUT_LOOP)
-		{
+	for(i = 0; tx_desc->C == 0; i++) {
+		if (i >= TOUT_LOOP) {
 			printf("%s: tx error buffer not ready\n", dev->name);
 			goto Done;
 		}
 	}

-	if (tx_old_hold >= 0)
-	{
+	if (tx_old_hold >= 0) {
 		KSEG1ADDR(&tx_ring[tx_old_hold])->params.field.HOLD = 1;
 	}
 	tx_old_hold = tx_hold;
@@ -376,13 +358,10 @@ static int inca_switch_send(struct eth_device *dev, volatile void *packet,
 	tx_new  = (tx_new + 1) % NUM_TX_DESC;


-	if (! initialized)
-	{
+	if (! initialized) {
 		command = INCA_IP_DMA_DMA_TXCCR0_INIT;
 		initialized = 1;
-	}
-	else
-	{
+	} else {
 		command = INCA_IP_DMA_DMA_TXCCR0_HR;
 	}

@@ -394,10 +373,8 @@ static int inca_switch_send(struct eth_device *dev, volatile void *packet,
 	DMA_WRITE_REG(INCA_IP_DMA_DMA_TXCCR0, regValue);

 #if 1
-	for(i = 0; KSEG1ADDR(&tx_ring[tx_hold])->C == 0; i++)
-	{
-		if (i >= TOUT_LOOP)
-		{
+	for(i = 0; KSEG1ADDR(&tx_ring[tx_hold])->C == 0; i++) {
+		if (i >= TOUT_LOOP) {
 			printf("%s: tx buffer not ready\n", dev->name);
 			goto Done;
 		}
@@ -421,12 +398,10 @@ static int inca_switch_recv(struct eth_device *dev)
 	printf("Entered inca_switch_recv()\n");
 #endif

-	for (;;)
-	{
+	for (;;) {
 		rx_desc = KSEG1ADDR(&rx_ring[rx_new]);

-		if (rx_desc->status.field.C == 0)
-		{
+		if (rx_desc->status.field.C == 0) {
 			break;
 		}

@@ -434,8 +409,7 @@ static int inca_switch_recv(struct eth_device *dev)
 		rx_ring[rx_new].params.field.HOLD = 1;
 #endif

-		if (! rx_desc->status.field.Eop)
-		{
+		if (! rx_desc->status.field.Eop) {
 			printf("Partly received packet!!!\n");
 			break;
 		}
@@ -454,16 +428,13 @@ static int inca_switch_recv(struct eth_device *dev)
 }
 #endif

-		if (length)
-		{
+		if (length) {
 #if 0
 			printf("Received %d bytes\n", length);
 #endif
 			NetReceive((void*)KSEG1ADDR(NetRxPackets[rx_new]),
 				    length - 4);
-		}
-		else
-		{
+		} else {
 #if 1
 			printf("Zero length!!!\n");
 #endif
@@ -495,16 +466,16 @@ static void inca_switch_halt(struct eth_device *dev)
 	initialized = 0;
 #endif
 #if 1
-		/* Disable forwarding to the CPU port.
-		 */
+	/* Disable forwarding to the CPU port.
+	 */
 	SW_WRITE_REG(INCA_IP_Switch_ST_PT,0xf);

-		/* Close RxDMA channel.
-		 */
+	/* Close RxDMA channel.
+	 */
 	DMA_WRITE_REG(INCA_IP_DMA_DMA_RXCCR0, INCA_IP_DMA_DMA_RXCCR0_OFF);

-		/* Close TxDMA channel.
-		 */
+	/* Close TxDMA channel.
+	 */
 	DMA_WRITE_REG(INCA_IP_DMA_DMA_TXCCR0, INCA_IP_DMA_DMA_TXCCR0_OFF);


@@ -519,88 +490,89 @@ static void inca_init_switch_chip(void)
 {
 	u32 regValue;

-		/* To workaround a problem with collision counter
-		 * (see Errata sheet).
-		 */
+	/* To workaround a problem with collision counter
+	 * (see Errata sheet).
+	 */
 	SW_WRITE_REG(INCA_IP_Switch_PC_TX_CTL, 0x00000001);
 	SW_WRITE_REG(INCA_IP_Switch_LAN_TX_CTL, 0x00000001);

 #if 1
-	   /* init MDIO configuration:
-		 MDS (Poll speed):       0x01 (4ms)
-		 PHY_LAN_ADDR:           0x06
-		 PHY_PC_ADDR:            0x05
-		 UEP (Use External PHY): 0x00 (Internal PHY is used)
-		 PS (Port Select):       0x00 (PT/UMM for LAN)
-		 PT (PHY Test):          0x00 (no test mode)
-		 UMM (Use MDIO Mode):    0x00 (state machine is disabled)
-	   */
+	/* init MDIO configuration:
+	 *	MDS (Poll speed):       0x01 (4ms)
+	 *	PHY_LAN_ADDR:           0x06
+	 *	PHY_PC_ADDR:            0x05
+	 *	UEP (Use External PHY): 0x00 (Internal PHY is used)
+	 *	PS (Port Select):       0x00 (PT/UMM for LAN)
+	 *	PT (PHY Test):          0x00 (no test mode)
+	 *	UMM (Use MDIO Mode):    0x00 (state machine is disabled)
+	 */
 	SW_WRITE_REG(INCA_IP_Switch_MDIO_CFG, 0x4c50);

-	   /* init PHY:
-		 SL (Auto Neg. Speed for LAN)
-		 SP (Auto Neg. Speed for PC)
-		 LL (Link Status for LAN)
-		 LP (Link Status for PC)
-		 DL (Duplex Status for LAN)
-		 DP (Duplex Status for PC)
-		 PL (Auto Neg. Pause Status for LAN)
-		 PP (Auto Neg. Pause Status for PC)
-	   */
+	/* init PHY:
+	 *	SL (Auto Neg. Speed for LAN)
+	 *	SP (Auto Neg. Speed for PC)
+	 *	LL (Link Status for LAN)
+	 *	LP (Link Status for PC)
+	 *	DL (Duplex Status for LAN)
+	 *	DP (Duplex Status for PC)
+	 *	PL (Auto Neg. Pause Status for LAN)
+	 *	PP (Auto Neg. Pause Status for PC)
+	 */
 	SW_WRITE_REG (INCA_IP_Switch_EPHY, 0xff);

-	   /* MDIO_ACC:
-		 RA (Request/Ack)  0x01 (Request)
-		 RW (Read/Write)   0x01 (Write)
-		 PHY_ADDR          0x05 (PC)
-		 REG_ADDR          0x00 (PHY_BCR: basic control register)
-		 PHY_DATA          0x8000
-				      Reset                   - software reset
-				      LB (loop back)          - normal
-				      SS (speed select)       - 10 Mbit/s
-				      ANE (auto neg. enable)  - disable
-				      PD (power down)         - normal
-				      ISO (isolate)           - normal
-				      RAN (restart auto neg.) - normal
-				      DM (duplex mode)        - half duplex
-				      CT (collision test)     - enable
-	   */
-	SW_WRITE_REG(INCA_IP_Switch_MDIO_ACC, 0xc0a08000);
+	/* MDIO_ACC:
+	 *	RA (Request/Ack)  0x01 (Request)
+	 *	RW (Read/Write)   0x01 (Write)
+	 *	PHY_ADDR          0x05 (PC)
+	 *	REG_ADDR          0x00 (PHY_BCR: basic control register)
+	 *	PHY_DATA          0x8000
+	 *		      Reset                   - software reset
+	 *		      LB (loop back)          - normal
+	 *		      SS (speed select)       - 10 Mbit/s
+	 *		      ANE (auto neg. enable)  - enable
+	 *		      PD (power down)         - normal
+	 *		      ISO (isolate)           - normal
+	 *		      RAN (restart auto neg.) - normal
+	 *		      DM (duplex mode)        - half duplex
+	 *		      CT (collision test)     - enable
+	 */
+	SW_WRITE_REG(INCA_IP_Switch_MDIO_ACC, 0xc0a09000);
+
+	/* MDIO_ACC:
+	 *	RA (Request/Ack)  0x01 (Request)
+	 *	RW (Read/Write)   0x01 (Write)
+	 *	PHY_ADDR          0x06 (LAN)
+	 *	REG_ADDR          0x00 (PHY_BCR: basic control register)
+	 *	PHY_DATA          0x8000
+	 *		      Reset                   - software reset
+	 *		      LB (loop back)          - normal
+	 *		      SS (speed select)       - 10 Mbit/s
+	 *		      ANE (auto neg. enable)  - enable
+	 *		      PD (power down)         - normal
+	 *		      ISO (isolate)           - normal
+	 *		      RAN (restart auto neg.) - normal
+	 *		      DM (duplex mode)        - half duplex
+	 *		      CT (collision test)     - enable
+	 */
+   	SW_WRITE_REG(INCA_IP_Switch_MDIO_ACC, 0xc0c09000);

-	   /* MDIO_ACC:
-		 RA (Request/Ack)  0x01 (Request)
-		 RW (Read/Write)   0x01 (Write)
-		 PHY_ADDR          0x06 (LAN)
-		 REG_ADDR          0x00 (PHY_BCR: basic control register)
-		 PHY_DATA          0x8000
-				      Reset                   - software reset
-				      LB (loop back)          - normal
-				      SS (speed select)       - 10 Mbit/s
-				      ANE (auto neg. enable)  - disable
-				      PD (power down)         - normal
-				      ISO (isolate)           - normal
-				      RAN (restart auto neg.) - normal
-				      DM (duplex mode)        - half duplex
-				      CT (collision test)     - enable
-	   */
-	SW_WRITE_REG(INCA_IP_Switch_MDIO_ACC, 0xc0c08000);
 #endif

-		/* Make sure the CPU port is disabled for now. We
-		 * don't want packets to get stacked for us until
-		 * we enable DMA and are prepared to receive them.
-		 */
+	/* Make sure the CPU port is disabled for now. We
+	 * don't want packets to get stacked for us until
+	 * we enable DMA and are prepared to receive them.
+	 */
 	SW_WRITE_REG(INCA_IP_Switch_ST_PT,0xf);

 	SW_READ_REG(INCA_IP_Switch_ARL_CTL, regValue);

-		/* CRC GEN is enabled.
-		 */
+	/* CRC GEN is enabled.
+	 */
 	regValue |= 0x00000200;
 	SW_WRITE_REG(INCA_IP_Switch_ARL_CTL, regValue);

-		/* ADD TAG is disabled.
-		 */
+	/* ADD TAG is disabled.
+	 */
 	SW_READ_REG(INCA_IP_Switch_PMAC_HD_CTL, regValue);
 	regValue &= ~0x00000002;
 	SW_WRITE_REG(INCA_IP_Switch_PMAC_HD_CTL, regValue);
@@ -609,8 +581,8 @@ static void inca_init_switch_chip(void)

 static void inca_dma_init(void)
 {
-		/* Switch off all DMA channels.
-		 */
+	/* Switch off all DMA channels.
+	 */
 	DMA_WRITE_REG(INCA_IP_DMA_DMA_RXCCR0, INCA_IP_DMA_DMA_RXCCR0_OFF);
 	DMA_WRITE_REG(INCA_IP_DMA_DMA_RXCCR1, INCA_IP_DMA_DMA_RXCCR1_OFF);

@@ -618,20 +590,20 @@ static void inca_dma_init(void)
 	DMA_WRITE_REG(INCA_IP_DMA_DMA_TXCCR1, INCA_IP_DMA_DMA_TXCCR1_OFF);
 	DMA_WRITE_REG(INCA_IP_DMA_DMA_TXCCR2, INCA_IP_DMA_DMA_TXCCR2_OFF);

-		/* Setup TX channel polling time.
-		 */
+	/* Setup TX channel polling time.
+	 */
 	DMA_WRITE_REG(INCA_IP_DMA_DMA_TXPOLL, INCA_DMA_TX_POLLING_TIME);

-		/* Setup RX channel polling time.
-		 */
+	/* Setup RX channel polling time.
+	 */
 	DMA_WRITE_REG(INCA_IP_DMA_DMA_RXPOLL, INCA_DMA_RX_POLLING_TIME);

-		/* ERRATA: write reset value into the DMA RX IMR register.
-		 */
+	/* ERRATA: write reset value into the DMA RX IMR register.
+	 */
 	DMA_WRITE_REG(INCA_IP_DMA_DMA_RXIMR, 0xFFFFFFFF);

-		/* Just in case: disable all transmit interrupts also.
-		 */
+	/* Just in case: disable all transmit interrupts also.
+	 */
 	DMA_WRITE_REG(INCA_IP_DMA_DMA_TXIMR, 0xFFFFFFFF);

 	DMA_WRITE_REG(INCA_IP_DMA_DMA_TXISR, 0xFFFFFFFF);
--- a/drivers/pci_auto.c
+++ b/drivers/pci_auto.c
@@ -323,6 +323,13 @@ int pciauto_config_device(struct pci_controller *hose, pci_dev_t dev)
 		hose->current_busno++;
 		break;

+#ifdef CONFIG_MPC5200
+	case PCI_CLASS_BRIDGE_OTHER:
+		DEBUGF("PCI Autoconfig: Skipping bridge device %d\n",
+		       PCI_DEV(dev));
+		break;
+#endif
+
 	default:
 		pciauto_setup_device(hose, dev, 6, hose->pci_mem, hose->pci_io);
 		break;
--- a/drivers/serial.c
+++ b/drivers/serial.c
@@ -51,6 +51,7 @@ static int calc_divisor (void)
 		console->osc_12m_sel = OSC_12M_SEL;	/* enable 6.5 * divisor */
 		return (1);				/* return 1 for base divisor */
 	}
+	console->osc_12m_sel = 0;			/* clear if previsouly set */
 #endif
 	return (CFG_NS16550_CLK / 16 / gd->baudrate);
 }
--- a/examples/82559_eeprom.c
+++ b/examples/82559_eeprom.c
@@ -22,7 +22,7 @@
 #define _LINUX_STRING_H_	/* avoid unnecessary str/mem functions */

 #include <common.h>
-#include <syscall.h>
+#include <exports.h>
 #include <asm/io.h>


@@ -96,7 +96,7 @@ static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len)
 	long ee_addr = ioaddr + EE_OFFSET;

 	if (debug > 1)
-		mon_printf(" EEPROM op 0x%x: ", cmd);
+		printf(" EEPROM op 0x%x: ", cmd);

 	outw(EE_ENB | EE_SHIFT_CLK, ee_addr);

@@ -106,7 +106,7 @@ static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len)
 		outw(dataval, ee_addr);
 		eeprom_delay(ee_addr);
 		if (debug > 2)
-			mon_printf("%X", inw(ee_addr) & 15);
+			printf("%X", inw(ee_addr) & 15);
 		outw(dataval | EE_SHIFT_CLK, ee_addr);
 		eeprom_delay(ee_addr);
 		retval = (retval << 1) | ((inw(ee_addr) & EE_DATA_READ) ? 1 : 0);
@@ -117,7 +117,7 @@ static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len)
 	/* Terminate the EEPROM access. */
 	outw(EE_ENB & ~EE_CS, ee_addr);
 	if (debug > 1)
-		mon_printf(" EEPROM result is 0x%5.5x.\n", retval);
+		printf(" EEPROM result is 0x%5.5x.\n", retval);
 	return retval;
 }

@@ -143,7 +143,7 @@ static void write_eeprom(long ioaddr, int index, int value, int addr_len)
 	/* Poll for write finished. */
 	i = eeprom_busy_poll(ee_ioaddr);			/* Typical 2000 ticks */
 	if (debug)
-		mon_printf(" Write finished after %d ticks.\n", i);
+		printf(" Write finished after %d ticks.\n", i);
 	/* Disable programming. This command is not instantaneous, so we check
 	   for busy before the next op. */
 	do_eeprom_cmd(ioaddr, (0x40 << (addr_len-4)), 3 + addr_len);
@@ -156,7 +156,7 @@ static int reset_eeprom(unsigned long ioaddr, unsigned char *hwaddr)
 	int size_test;
 	int i;

-	mon_printf("Resetting i82559 EEPROM @ 0x%08x ... ", ioaddr);
+	printf("Resetting i82559 EEPROM @ 0x%08x ... ", ioaddr);

 	size_test = do_eeprom_cmd(ioaddr, (EE_READ_CMD << 8) << 16, 27);
 	eeprom_addr_size = (size_test & 0xffe0000) == 0xffe0000 ? 8 : 6;
@@ -177,11 +177,11 @@ static int reset_eeprom(unsigned long ioaddr, unsigned char *hwaddr)

 	for (i = 0; i < eeprom_size; i++)
 		if (read_eeprom(ioaddr, i, eeprom_addr_size) != eeprom[i]) {
-			mon_printf("failed\n");
+			printf("failed\n");
 			return 1;
 		}

-	mon_printf("done\n");
+	printf("done\n");
 	return 0;
 }

@@ -308,19 +308,20 @@ int main (int argc, char *argv[])
 	char buf[6];
 	int instance;

+	app_startup(argv);
 	if (argc != 2) {
-		mon_printf ("call with base Ethernet address\n");
+		printf ("call with base Ethernet address\n");
 		return 1;
 	}


 	eth_addr = gethwaddr(argv[1], buf);
 	if (NULL == eth_addr) {
-		mon_printf ("Can not parse ethernet address\n");
+		printf ("Can not parse ethernet address\n");
 		return 1;
 	}
 	if (eth_addr[5] & 0x01) {
-		mon_printf("Base Ethernet address must be even\n");
+		printf("Base Ethernet address must be even\n");
 	}


@@ -329,22 +330,22 @@ int main (int argc, char *argv[])
 		unsigned char mac[6];
 		int bar1 = read_config_dword(0, 6+instance, 0, 0x14);
 		if (! (bar1 & 1)) {
-			mon_printf("ETH%d is disabled %x\n", instance, bar1);
+			printf("ETH%d is disabled %x\n", instance, bar1);
 		} else {
-			mon_printf("ETH%d IO=0x%04x\n", instance, bar1 & ~3);
+			printf("ETH%d IO=0x%04x\n", instance, bar1 & ~3);
 		}
 		io_addr = (bar1 & (~3L));


 		write_config_word(0, 6+instance, 0, 4,
 				  read_config_word(0, 6+instance, 0, 4) | 1);
-		mon_printf("ETH%d CMD %04x\n", instance,
+		printf("ETH%d CMD %04x\n", instance,
 			   read_config_word(0, 6+instance, 0, 4));

 		memcpy(mac, eth_addr, 6);
 		mac[5] += instance;

-		mon_printf("got io=%04x, ha=%02x:%02x:%02x:%02x:%02x:%02x\n",
+		printf("got io=%04x, ha=%02x:%02x:%02x:%02x:%02x:%02x\n",
 			   io_addr, mac[0], mac[1], mac[2],
 			   mac[3], mac[4], mac[5]);
 		reset_eeprom(io_addr, mac);
--- a/examples/Makefile
+++ b/examples/Makefile
@@ -21,7 +21,21 @@
 # MA 02111-1307 USA
 #

+ifeq ($(ARCH),ppc)
 LOAD_ADDR = 0x40000
+endif
+
+ifeq ($(ARCH),i386)
+LOAD_ADDR = 0x40000
+endif
+
+ifeq ($(ARCH),arm)
+LOAD_ADDR = 0xc100000
+endif
+
+ifeq ($(ARCH),mips)
+LOAD_ADDR = 0x80200000 -T mips.lds
+endif

 include $(TOPDIR)/config.mk

@@ -38,11 +52,6 @@ SREC   += sched.srec
 BIN    += sched.bin
 endif

-ifeq ($(ARCH),mips)
-SREC =
-BIN =
-endif
-
 # The following example is pretty 8xx specific...
 ifeq ($(CPU),mpc8xx)
 SREC   += timer.srec
@@ -62,12 +71,12 @@ endif

 OBJS	= $(SREC:.srec=.o)

-LIB	= libsyscall.a
-LIBAOBJS= syscall.o
+LIB	= libstubs.a
+LIBAOBJS=
 ifeq ($(ARCH),ppc)
 LIBAOBJS+= $(ARCH)_longjmp.o $(ARCH)_setjmp.o
 endif
-LIBCOBJS=
+LIBCOBJS= stubs.o
 LIBOBJS	= $(LIBAOBJS) $(LIBCOBJS)

 CPPFLAGS += -I..
--- a/examples/eepro100_eeprom.c
+++ b/examples/eepro100_eeprom.c
@@ -21,17 +21,19 @@
 #define _LINUX_STRING_H_	/* avoid unnecessary str/mem functions */

 #include <common.h>
-#include <syscall.h>
+#include <exports.h>

 static int reset_eeprom(unsigned long ioaddr, unsigned char *hwaddr);

-int eepro100_eeprom(void)
+int eepro100_eeprom(int argc, char *argv[])
 {
 	int ret = 0;

 	unsigned char hwaddr1[6] = { 0x00, 0x00, 0x02, 0x03, 0x04, 0x05 };
 	unsigned char hwaddr2[6] = { 0x00, 0x00, 0x02, 0x03, 0x04, 0x06 };

+	app_startup(argv);
+
 #if defined(CONFIG_OXC)
 	ret |= reset_eeprom(0x80000000, hwaddr1);
 	ret |= reset_eeprom(0x81000000, hwaddr2);
@@ -119,7 +121,7 @@ static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len)
 	long ee_addr = ioaddr + EE_OFFSET;

 	if (debug > 1)
-		mon_printf(" EEPROM op 0x%x: ", cmd);
+		printf(" EEPROM op 0x%x: ", cmd);

 	outw(EE_ENB | EE_SHIFT_CLK, ee_addr);

@@ -129,7 +131,7 @@ static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len)
 		outw(dataval, ee_addr);
 		eeprom_delay(ee_addr);
 		if (debug > 2)
-			mon_printf("%X", inw(ee_addr) & 15);
+			printf("%X", inw(ee_addr) & 15);
 		outw(dataval | EE_SHIFT_CLK, ee_addr);
 		eeprom_delay(ee_addr);
 		retval = (retval << 1) | ((inw(ee_addr) & EE_DATA_READ) ? 1 : 0);
@@ -140,7 +142,7 @@ static int do_eeprom_cmd(long ioaddr, int cmd, int cmd_len)
 	/* Terminate the EEPROM access. */
 	outw(EE_ENB & ~EE_CS, ee_addr);
 	if (debug > 1)
-		mon_printf(" EEPROM result is 0x%5.5x.\n", retval);
+		printf(" EEPROM result is 0x%5.5x.\n", retval);
 	return retval;
 }

@@ -166,7 +168,7 @@ static void write_eeprom(long ioaddr, int index, int value, int addr_len)
 	/* Poll for write finished. */
 	i = eeprom_busy_poll(ee_ioaddr);			/* Typical 2000 ticks */
 	if (debug)
-		mon_printf(" Write finished after %d ticks.\n", i);
+		printf(" Write finished after %d ticks.\n", i);
 	/* Disable programming. This command is not instantaneous, so we check
 	   for busy before the next op. */
 	do_eeprom_cmd(ioaddr, (0x40 << (addr_len-4)), 3 + addr_len);
@@ -179,7 +181,7 @@ static int reset_eeprom(unsigned long ioaddr, unsigned char *hwaddr)
 	int size_test;
 	int i;

-	mon_printf("Resetting i82559 EEPROM @ 0x%08x ... ", ioaddr);
+	printf("Resetting i82559 EEPROM @ 0x%08lX ... ", ioaddr);

 	size_test = do_eeprom_cmd(ioaddr, (EE_READ_CMD << 8) << 16, 27);
 	eeprom_addr_size = (size_test & 0xffe0000) == 0xffe0000 ? 8 : 6;
@@ -200,10 +202,10 @@ static int reset_eeprom(unsigned long ioaddr, unsigned char *hwaddr)

 	for (i = 0; i < eeprom_size; i++)
 		if (read_eeprom(ioaddr, i, eeprom_addr_size) != eeprom[i]) {
-			mon_printf("failed\n");
+			printf("failed\n");
 			return 1;
 		}

-	mon_printf("done\n");
+	printf("done\n");
 	return 0;
 }
--- a/examples/hello_world.c
+++ b/examples/hello_world.c
@@ -22,28 +22,33 @@
 */

 #include <common.h>
-#include <syscall.h>
+#include <exports.h>

 int hello_world (int argc, char *argv[])
 {
 	int i;

-	mon_printf ("Hello World\n");
+	/* Print the ABI version */
+	app_startup(argv);
+	printf ("Example expects ABI version %d\n", XF_VERSION);
+	printf ("Actual U-Boot ABI version %d\n", (int)get_version());

-	mon_printf ("argc = %d\n", argc);
+	printf ("Hello World\n");
+
+	printf ("argc = %d\n", argc);

 	for (i=0; i<=argc; ++i) {
-		mon_printf ("argv[%d] = \"%s\"\n",
+		printf ("argv[%d] = \"%s\"\n",
 			i,
 			argv[i] ? argv[i] : "<NULL>");
 	}

-	mon_printf ("Hit any key to exit ... ");
-	while (!mon_tstc())
+	printf ("Hit any key to exit ... ");
+	while (!tstc())
 		;
 	/* consume input */
-	(void) mon_getc();
+	(void) getc();

-	mon_printf ("\n\n");
+	printf ("\n\n");
 	return (0);
 }
--- a/examples/mem_to_mem_idma2intr.c
+++ b/examples/mem_to_mem_idma2intr.c
@@ -28,7 +28,7 @@


 #include <common.h>
-#include <syscall.h>
+#include <exports.h>

 #define STANDALONE

@@ -36,13 +36,6 @@
 #include <command.h>
 #include <watchdog.h>
 #else					/* Standalone app of PPCBoot */
-#include <syscall.h>
-#define printf	mon_printf
-#define tstc	mon_tstc
-#define getc	mon_getc
-#define putc	mon_putc
-#define udelay	mon_udelay
-#define malloc	mon_malloc
 #define WATCHDOG_RESET() {						\
 			*(ushort *)(CFG_IMMR + 0x1000E) = 0x556c;	\
 			*(ushort *)(CFG_IMMR + 0x1000E) = 0xaa39;	\
@@ -180,8 +173,8 @@ uint dpinit_done = 0;
 #ifdef STANDALONE
 int ctrlc (void)
 {
-	if (mon_tstc()) {
-		switch (mon_getc ()) {
+	if (tstc()) {
+		switch (getc ()) {
 		case 0x03:		/* ^C - Control C */
 			return 1;
 		default:
@@ -209,19 +202,20 @@ int memcmp(const void * cs,const void * ct,size_t count)
 #endif	/* STANDALONE */

 #ifdef STANDALONE
-int mem_to_mem_idma2intr (bd_t * bd, int argc, char *argv[])
+int mem_to_mem_idma2intr (int argc, char *argv[])
 #else
 int do_idma (bd_t * bd, int argc, char *argv[])
 #endif	/* STANDALONE */
 {
 	int i;

+	app_startup(argv);
 	dpinit_done = 0;

 	idma_init ();

 	DEBUG ("Installing dma handler\n");
-	mon_install_hdlr (7, dmadone_handler, (void *) bdf);
+	install_hdlr (7, dmadone_handler, (void *) bdf);

 	memset ((void *) 0x100000, 'a', 512);
 	memset ((void *) 0x200000, 'b', 512);
@@ -232,7 +226,7 @@ int do_idma (bd_t * bd, int argc, char *argv[])
 	}

 	DEBUG ("Uninstalling dma handler\n");
-	mon_free_hdlr (7);
+	free_hdlr (7);

 	return 0;
 }
--- a/examples/mips.lds
+++ b/examples/mips.lds
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2003
+ * Wolfgang Denk Engineering, <wd@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips")
+*/
+OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips")
+OUTPUT_ARCH(mips)
+SECTIONS
+{
+	.text       :
+	{
+	  *(.text)
+	}
+
+	. = ALIGN(4);
+	.rodata  : { *(.rodata) }
+
+	. = ALIGN(4);
+	.data  : { *(.data) }
+
+	. = ALIGN(4);
+	.sdata  : { *(.sdata) }
+
+	_gp = ALIGN(16);
+
+	__got_start = .;
+	.got  : { *(.got) }
+	__got_end = .;
+
+	.sdata  : { *(.sdata) }
+
+	. = ALIGN(4);
+	.sbss  : { *(.sbss) }
+	.bss  : { *(.bss) }
+}
--- a/examples/sched.c
+++ b/examples/sched.c
@@ -16,7 +16,7 @@
 */

 #include <common.h>
-#include <syscall.h>
+#include <exports.h>

 /*
 * Author: Arun Dharankar <ADharankar@ATTBI.Com>
@@ -76,9 +76,9 @@ static uchar dbg = 0;

 #define PDEBUG(fmt, args...)	 {					\
 	if(dbg != 0) {							\
-		mon_printf("[%s %d %s]: ",__FILE__,__LINE__,__FUNCTION__);\
-		mon_printf(fmt, ##args);				\
-		mon_printf("\n");					\
+		printf("[%s %d %s]: ",__FILE__,__LINE__,__FUNCTION__);\
+		printf(fmt, ##args);				\
+		printf("\n");					\
 	}								\
 }

@@ -97,41 +97,43 @@ static int thread_stop (int id);
 /* An example of schedular test */

 #define NUMTHREADS 7
-int sched (bd_t * bd, int ac, char *av[])
+int sched (int ac, char *av[])
 {
 	int i, j;
 	int tid[NUMTHREADS];
 	int names[NUMTHREADS];

+	app_startup(av);
+
 	sched_init ();

 	for (i = 0; i < NUMTHREADS; i++) {
 		names[i] = i;
 		j = thread_create (testthread, (void *) &names[i]);
 		if (j == RC_FAILURE)
-			mon_printf ("schedtest: Failed to create thread %d\n", i);
+			printf ("schedtest: Failed to create thread %d\n", i);
 		if (j > 0) {
-			mon_printf ("schedtest: Created thread with id %d, name %d\n",
+			printf ("schedtest: Created thread with id %d, name %d\n",
 						j, i);
 			tid[i] = j;
 		}
 	}
-	mon_printf ("schedtest: Threads created\n");
+	printf ("schedtest: Threads created\n");

-	mon_printf ("sched_test: function=0x%08x\n", testthread);
+	printf ("sched_test: function=0x%08x\n", (unsigned)testthread);
 	for (i = 0; i < NUMTHREADS; i++) {
-		mon_printf ("schedtest: Setting thread %d runnable\n", tid[i]);
+		printf ("schedtest: Setting thread %d runnable\n", tid[i]);
 		thread_start (tid[i]);
 		thread_yield ();
 	}
-	mon_printf ("schedtest: Started %d threads\n", NUMTHREADS);
+	printf ("schedtest: Started %d threads\n", NUMTHREADS);

 	while (1) {
-		mon_printf ("schedtest: Waiting for threads to complete\n");
-		if (mon_tstc () && mon_getc () == 0x3) {
-			mon_printf ("schedtest: Aborting threads...\n");
+		printf ("schedtest: Waiting for threads to complete\n");
+		if (tstc () && getc () == 0x3) {
+			printf ("schedtest: Aborting threads...\n");
 			for (i = 0; i < NUMTHREADS; i++) {
-				mon_printf ("schedtest: Deleting thread %d\n", tid[i]);
+				printf ("schedtest: Deleting thread %d\n", tid[i]);
 				thread_delete (tid[i]);
 			}
 			return RC_SUCCESS;
@@ -139,11 +141,11 @@ int sched (bd_t * bd, int ac, char *av[])
 		j = -1;
 		i = thread_join (&j);
 		if (i == RC_FAILURE) {
-			mon_printf ("schedtest: No threads pending, "
+			printf ("schedtest: No threads pending, "
 						"exiting schedular test\n");
 			return RC_SUCCESS;
 		}
-		mon_printf ("schedtest: thread is %d returned %d\n", i, j);
+		printf ("schedtest: thread is %d returned %d\n", i, j);
 		thread_yield ();
 	}

@@ -154,14 +156,14 @@ static int testthread (void *name)
 {
 	int i;

-	mon_printf ("testthread: Begin executing thread, myname %d, &i=0x%08x\n",
-			 *(int *) name, &i);
+	printf ("testthread: Begin executing thread, myname %d, &i=0x%08x\n",
+		*(int *) name, (unsigned)&i);

-	mon_printf ("Thread %02d, i=%d\n", *(int *) name);
+	printf ("Thread %02d, i=%d\n", *(int *) name, i);

 	for (i = 0; i < 0xffff * (*(int *) name + 1); i++) {
-		if (mon_tstc () && mon_getc () == 0x3) {
-			mon_printf ("testthread: myname %d terminating.\n",
+		if (tstc () && getc () == 0x3) {
+			printf ("testthread: myname %d terminating.\n",
 						*(int *) name);
 			return *(int *) name + 1;
 		}
@@ -170,7 +172,7 @@ static int testthread (void *name)
 			thread_yield ();
 	}

-	mon_printf ("testthread: returning %d, i=0x%x\n",
+	printf ("testthread: returning %d, i=0x%x\n",
 				*(int *) name + 1, i);

 	return *(int *) name + 1;
@@ -187,7 +189,7 @@ static void sched_init (void)
 	current_tid = MASTER_THREAD;
 	lthreads[current_tid].state = STATE_RUNNABLE;
 	PDEBUG ("sched_init: master context = 0x%08x",
-		   lthreads[current_tid].context);
+		(unsigned)lthreads[current_tid].context);
 	return;
 }

@@ -200,7 +202,8 @@ static void thread_yield (void)
 #define SWITCH(new) 							\
 	if(lthreads[new].state == STATE_RUNNABLE) {			\
 		PDEBUG("thread_yield: %d match, ctx=0x%08x",		\
-			new, lthreads[current_tid].context); 		\
+			new,						\
+			(unsigned)lthreads[current_tid].context);	\
 		if(setjmp(lthreads[current_tid].context) == 0) {	\
 			current_tid = new;				\
 			PDEBUG("thread_yield: tid %d returns 0",	\
@@ -260,7 +263,7 @@ static int thread_delete (int id)
 static void thread_launcher (void)
 {
 	PDEBUG ("thread_launcher: invoking func=0x%08x",
-		   lthreads[current_tid].func);
+		   (unsigned)lthreads[current_tid].func);

 	lthreads[current_tid].retval =
 			lthreads[current_tid].func (lthreads[current_tid].arg);
@@ -269,7 +272,7 @@ static void thread_launcher (void)

 	lthreads[current_tid].state = STATE_TERMINATED;
 	thread_yield ();
-	mon_printf ("thread_launcher: should NEVER get here!\n");
+	printf ("thread_launcher: should NEVER get here!\n");

 	return;
 }
@@ -287,7 +290,8 @@ static int thread_start (int id)
 	if (setjmp (lthreads[current_tid].context) == 0) {
 		lthreads[id].state = STATE_RUNNABLE;
 		current_tid = id;
-		PDEBUG ("thread_start: to be stack=0%08x", lthreads[id].stack);
+		PDEBUG ("thread_start: to be stack=0%08x",
+			(unsigned)lthreads[id].stack);
 		setctxsp (&lthreads[id].stack[STK_SIZE]);
 		thread_launcher ();
 	}
@@ -297,7 +301,7 @@ static int thread_start (int id)
 	return RC_SUCCESS;
 }

-#if 0							/* not used so far */
+#if 0	/* not used so far */
 static int thread_stop (int id)
 {
 	if (id <= MASTER_THREAD || id >= MAX_THREADS)
@@ -309,7 +313,7 @@ static int thread_stop (int id)
 	lthreads[id].state = STATE_STOPPED;
 	return RC_SUCCESS;
 }
-#endif							/* not used so far */
+#endif	/* not used so far */

 static int thread_join (int *ret)
 {
--- a/examples/stubs.c
+++ b/examples/stubs.c
@@ -0,0 +1,89 @@
+#include <exports.h>
+
+#if defined(CONFIG_I386)
+/*
+ * x86 does not have a dedicated register to store the pointer to
+ * the global_data. Thus the jump table address is stored in a
+ * global variable, but such approach does not allow for execution
+ * from flash memory. The global_data address is passed as argv[-1]
+ * to the application program.
+ */
+static void **jt;
+gd_t *global_data;
+
+#define EXPORT_FUNC(x) \
+	asm volatile (			\
+"	.globl " #x "\n"		\
+#x ":\n"				\
+"	movl	%0, %%eax\n"		\
+"	movl	jt, %%ecx\n"		\
+"	jmp	*(%%ecx, %%eax)\n"	\
+	: : "i"(XF_ ## x * sizeof(void *)) : "eax", "ecx");
+#elif defined(CONFIG_PPC)
+/*
+ * r29 holds the pointer to the global_data, r11 is a call-clobbered
+ * register
+ */
+#define EXPORT_FUNC(x) \
+	asm volatile (			\
+"	.globl " #x "\n"		\
+#x ":\n"				\
+"	lwz	%%r11, %0(%%r29)\n"	\
+"	lwz	%%r11, %1(%%r11)\n"	\
+"	mtctr	%%r11\n"		\
+"	bctr\n"				\
+	: : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "r11");
+#elif defined(CONFIG_ARM)
+/*
+ * r8 holds the pointer to the global_data, ip is a call-clobbered
+ * register
+ */
+#define EXPORT_FUNC(x) \
+	asm volatile (			\
+"	.globl " #x "\n"		\
+#x ":\n"				\
+"	ldr	ip, [r8, %0]\n"		\
+"	ldr	pc, [ip, %1]\n"		\
+	: : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "ip");
+#elif defined(CONFIG_MIPS)
+/*
+ * k0 ($26) holds the pointer to the global_data; t9 ($25) is a call-
+ * clobbered register that is also used to set gp ($26). Note that the
+ * jr instruction also executes the instruction immediately following
+ * it; however, GCC/mips generates an additional `nop' after each asm
+ * statement
+ */
+#define EXPORT_FUNC(x) \
+	asm volatile (			\
+"	.globl " #x "\n"		\
+#x ":\n"				\
+"	lw	$25, %0($26)\n"		\
+"	lw	$25, %1($25)\n"		\
+"	jr	$25\n"			\
+	: : "i"(offsetof(gd_t, jt)), "i"(XF_ ## x * sizeof(void *)) : "t9");
+#else
+#error stubs definition missing for this architecture
+#endif
+
+/* This function is necessary to prevent the compiler from
+ * generating prologue/epilogue, preparing stack frame etc.
+ * The stub functions are special, they do not use the stack
+ * frame passed to them, but pass it intact to the actual
+ * implementation. On the other hand, asm() statements with
+ * arguments can be used only inside the functions (gcc limitation)
+ */
+static void __attribute__((unused)) dummy(void)
+{
+#include <_exports.h>
+}
+
+void app_startup(char **argv)
+{
+#if defined(CONFIG_I386)
+	/* x86 does not have a dedicated register for passing global_data */
+	global_data = (gd_t *)argv[-1];
+	jt = global_data->jt;
+#endif
+}
+
+#undef EXPORT_FUNC
--- a/examples/syscall.S
+++ b/examples/syscall.S
@@ -1,114 +0,0 @@
-#include <ppc_asm.tmpl>
-#include <ppc_defs.h>
-#include <syscall.h>
-
-#ifdef CONFIG_ARM /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
-#warning ARM version not implemented yet /* XXXXXXXXXXXXXXXXXXXXXXXXXXXX */
-	.global	mon_getc
-	.type	mon_getc,function
-mon_getc:
-	.global	mon_tstc
-	.type	mon_tstc,function
-mon_tstc:
-	.global	mon_putc
-	.type	mon_putc,function
-mon_putc:
-	.global	mon_puts
-	.type	mon_puts,function
-mon_puts:
-	.global	mon_printf
-	.type	mon_printf,function
-mon_printf:
-	.global	mon_install_hdlr
-	.type	mon_install_hdlr,function
-mon_install_hdlr:
-	.global	mon_free_hdlr
-	.type	mon_free_hdlr,function
-mon_free_hdlr:
-	.global	mon_malloc
-	.type	mon_malloc,function
-mon_malloc:
-	.global	mon_free
-	.type	mon_free,function
-mon_free:
-	@ args = 0, pretend = 0, frame = 0
-	@ frame_needed = 1, current_function_anonymous_args = 0
-	mov     ip, sp
-	stmfd   sp!, {fp, ip, lr, pc}
-	sub     fp, ip, #4
-	ldmea   fp, {fp, sp, pc}
-#elif defined(CONFIG_MIPS)/* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
-#warning MIPS version not implemented yet
-	.global	mon_getc
-	.type	mon_getc,function
-mon_getc:
-	.global	mon_tstc
-	.type	mon_tstc,function
-mon_tstc:
-	.global	mon_putc
-	.type	mon_putc,function
-mon_putc:
-	.global	mon_puts
-	.type	mon_puts,function
-mon_puts:
-	.global	mon_printf
-	.type	mon_printf,function
-mon_printf:
-	.global	mon_install_hdlr
-	.type	mon_install_hdlr,function
-mon_install_hdlr:
-	.global	mon_free_hdlr
-	.type	mon_free_hdlr,function
-mon_free_hdlr:
-	.global	mon_malloc
-	.type	mon_malloc,function
-mon_malloc:
-	.global	mon_free
-	.type	mon_free,function
-mon_free:
-
-#else
-
-#ifdef CONFIG_I386 /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
-#define SYMBOL_NAME(X) 	X
-#define SYMBOL_NAME_LABEL(X) 	X##:
-
-#define SYSCALL(name,n) \
-	.globl SYMBOL_NAME(name) ; \
-SYMBOL_NAME_LABEL(name)     		 ; \
-	movl    $n, %eax ;\
-	pushl   %ebx; \
-	pushl   %ecx; \
-	int     $0x40 ;\
-
-
-#endif	/* CONFIG_I386 */
-
-#ifdef CONFIG_PPC
-#define SYSCALL(name,n) \
-	.globl name		; \
-name:				; \
-	li r0,n			; \
-	sc			; \
-	blr
-#endif	/* CONFIG_PPC */
-
-	.text
-
-	/*
-	 * Make sure these functions are in the same order as they
-	 * appear in the "include/syscall.h" header file !!!
-	 */
-
-	SYSCALL(mon_getc,SYSCALL_GETC)
-	SYSCALL(mon_tstc,SYSCALL_TSTC)
-	SYSCALL(mon_putc,SYSCALL_PUTC)
-	SYSCALL(mon_puts,SYSCALL_PUTS)
-	SYSCALL(mon_printf,SYSCALL_PRINTF)
-	SYSCALL(mon_install_hdlr,SYSCALL_INSTALL_HDLR)
-	SYSCALL(mon_free_hdlr,SYSCALL_FREE_HDLR)
-	SYSCALL(mon_malloc,SYSCALL_MALLOC)
-	SYSCALL(mon_free,SYSCALL_FREE)
-	SYSCALL(mon_udelay,SYSCALL_UDELAY)
-	SYSCALL(mon_get_timer,SYSCALL_GET_TIMER)
-#endif /* CONFIG_ARM XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */
--- a/examples/timer.c
+++ b/examples/timer.c
@@ -24,7 +24,7 @@
 #include <common.h>
 #include <commproc.h>
 #include <mpc8xx_irq.h>
-#include <syscall.h>
+#include <exports.h>

 #undef	DEBUG

@@ -123,10 +123,12 @@ int timer (int argc, char *argv[])
 	int c;
 	int running;

+	app_startup(argv);
+
 	/* Pointer to CPM Timer structure */
 	cpmtimerp = &((immap_t *) gd->bd->bi_immr_base)->im_cpmtimer;

-	mon_printf ("TIMERS=0x%x\n", (unsigned) cpmtimerp);
+	printf ("TIMERS=0x%x\n", (unsigned) cpmtimerp);

 	/* Initialize pointers depending on which timer we use */
 	switch (TID_TIMER_ID) {
@@ -166,7 +168,7 @@ int timer (int argc, char *argv[])

 	hwp->tgcrp = &cpmtimerp->cpmt_tgcr;

-	mon_printf ("Using timer %d\n"
+	printf ("Using timer %d\n"
 			"tgcr @ 0x%x, tmr @ 0x%x, trr @ 0x%x,"
 			" tcr @ 0x%x, tcn @ 0x%x, ter @ 0x%x\n",
 			TID_TIMER_ID + 1,
@@ -184,24 +186,24 @@ int timer (int argc, char *argv[])
 	/* clear all events */
 	*hwp->terp = (CPMT_EVENT_CAP | CPMT_EVENT_REF);

-	mon_printf (usage);
+	printf (usage);
 	running = 0;
-	while ((c = mon_getc()) != 'q') {
+	while ((c = getc()) != 'q') {
 	    if (c == 'b') {

 		setPeriod (hwp, TIMER_PERIOD);	/* Set period and start ticking */

 		/* Install interrupt handler (enable timer in CIMR) */
-		mon_install_hdlr (hwp->cpm_vec, timer_handler, hwp);
+		install_hdlr (hwp->cpm_vec, timer_handler, hwp);

-		mon_printf ("Enabling timer\n");
+		printf ("Enabling timer\n");

 		/* enable timer */
 		*hwp->tgcrp |= (CPMT_GCR_RST << TID_TIMER_ID);
 		running = 1;

 #ifdef	DEBUG
-		mon_printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
+		printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
 			" tcr=0x%x, tcn=0x%x, ter=0x%x\n",
 				*hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
 				*hwp->tcrp,  *hwp->tcnp, *hwp->terp
@@ -209,20 +211,20 @@ int timer (int argc, char *argv[])
 #endif
 	    } else if (c == 'e') {

-		mon_printf ("Stopping timer\n");
+		printf ("Stopping timer\n");

 		*hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID);
 		running = 0;

 #ifdef	DEBUG
-		mon_printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
+		printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
 			" tcr=0x%x, tcn=0x%x, ter=0x%x\n",
 				*hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
 				*hwp->tcrp,  *hwp->tcnp, *hwp->terp
 			);
 #endif
 		/* Uninstall interrupt handler */
-		mon_free_hdlr (hwp->cpm_vec);
+		free_hdlr (hwp->cpm_vec);

 	    } else if (c == '?') {
 #ifdef	DEBUG
@@ -230,13 +232,13 @@ int timer (int argc, char *argv[])
 		sysconf8xx_t *siup = &((immap_t *) gd->bd->bi_immr_base)->im_siu_conf;
 #endif

-		mon_printf ("\ntgcr=0x%x, tmr=0x%x, trr=0x%x,"
+		printf ("\ntgcr=0x%x, tmr=0x%x, trr=0x%x,"
 			" tcr=0x%x, tcn=0x%x, ter=0x%x\n",
 				*hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
 				*hwp->tcrp,  *hwp->tcnp, *hwp->terp
 			);
 #ifdef	DEBUG
-		mon_printf ("SIUMCR=0x%08lx, SYPCR=0x%08lx,"
+		printf ("SIUMCR=0x%08lx, SYPCR=0x%08lx,"
 			" SIMASK=0x%08lx, SIPEND=0x%08lx\n",
 				siup->sc_siumcr,
 				siup->sc_sypcr,
@@ -244,21 +246,21 @@ int timer (int argc, char *argv[])
 				siup->sc_sipend
 			);

-		mon_printf ("CIMR=0x%08lx, CICR=0x%08lx, CIPR=0x%08lx\n",
+		printf ("CIMR=0x%08lx, CICR=0x%08lx, CIPR=0x%08lx\n",
 			cpm_icp->cpic_cimr,
 			cpm_icp->cpic_cicr,
 			cpm_icp->cpic_cipr
 			);
 #endif
 	    } else {
-	    	mon_printf ("\nEnter: q - quit, b - start timer, e - stop timer, ? - get status\n");
+	    	printf ("\nEnter: q - quit, b - start timer, e - stop timer, ? - get status\n");
 	    }
-	    mon_printf (usage);
+	    printf (usage);
 	}
 	if (running) {
-		mon_printf ("Stopping timer\n");
+		printf ("Stopping timer\n");
 		*hwp->tgcrp &= ~(CPMT_GCR_MASK << TID_TIMER_ID);
-		mon_free_hdlr (hwp->cpm_vec);
+		free_hdlr (hwp->cpm_vec);
 	}

 	return (0);
@@ -274,11 +276,11 @@ void setPeriod (tid_8xx_cpmtimer_t *hwp, ulong interval)
 	unsigned short prescaler;
 	unsigned long ticks;

-	mon_printf ("Set interval %ld us\n", interval);
+	printf ("Set interval %ld us\n", interval);

 	/* Warn if requesting longer period than possible */
 	if (interval > CPMT_MAX_INTERVAL) {
-		mon_printf ("Truncate interval %ld to maximum (%d)\n",
+		printf ("Truncate interval %ld to maximum (%d)\n",
 				interval, CPMT_MAX_INTERVAL);
 		interval = CPMT_MAX_INTERVAL;
 	}
@@ -303,7 +305,7 @@ void setPeriod (tid_8xx_cpmtimer_t *hwp, ulong interval)
 	}

 #ifdef	DEBUG
-	mon_printf ("clock/%d, prescale factor %d, reference %ld, ticks %ld\n",
+	printf ("clock/%d, prescale factor %d, reference %ld, ticks %ld\n",
 			(ticks > CPMT_MAX_TICKS) ? CPMT_CLOCK_DIV : 1,
 			CPMT_PRESCALER,
 			(ticks / CPMT_PRESCALER),
@@ -321,7 +323,7 @@ void setPeriod (tid_8xx_cpmtimer_t *hwp, ulong interval)
 	*hwp->trrp = (unsigned short) (ticks / CPMT_PRESCALER);

 #ifdef	DEBUG
-	mon_printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
+	printf ("tgcr=0x%x, tmr=0x%x, trr=0x%x,"
 		" tcr=0x%x, tcn=0x%x, ter=0x%x\n",
 			*hwp->tgcrp, *hwp->tmrp, *hwp->trrp,
 			*hwp->tcrp,  *hwp->tcnp, *hwp->terp
@@ -340,7 +342,7 @@ void timer_handler (void *arg)
 	/* printf ("** TER1=%04x ** ", *hwp->terp); */

 	/* just for demonstration */
-	mon_printf (".");
+	printf (".");

 	/* clear all possible events: Ref. and Cap. */
 	*hwp->terp = (CPMT_EVENT_CAP | CPMT_EVENT_REF);
--- a/examples/x86-testapp.c
+++ b/examples/x86-testapp.c
@@ -0,0 +1,87 @@
+#include <stddef.h>
+#include <stdio.h>
+#include <string.h>
+
+void *func[8], **pfunc;
+
+typedef struct xxx xxx_t;
+struct xxx {
+	int dummy;
+	void **pfunc;
+} q;
+
+#define XF_strcpy 3
+#define XF_printf 4
+
+#define LABEL(x)					\
+asm volatile (						\
+
+#if defined(__i386__)
+#define EXPORT_FUNC(x)					\
+asm volatile (						\
+"	.globl mon_" #x "\n"				\
+"mon_" #x ":\n"						\
+"	movl	%0, %%eax\n"				\
+"	movl	pfunc, %%ecx\n"				\
+"	jmp	*(%%ecx,%%eax)\n"			\
+	: : "i"(XF_ ## x * sizeof(void *)) : "eax", "ecx");
+#elif defined(__powerpc__)
+#define EXPORT_FUNC(x)					\
+asm volatile (						\
+"	.globl mon_" #x "\n"				\
+"mon_" #x ":\n"						\
+"	lwz	%%r11, %0(%%r29)\n"			\
+"	lwz	%%r11, %1(%%r11)\n"			\
+"	mtctr	%%r11\n"				\
+"	bctr\n"					\
+	: : "i"(offsetof(xxx_t, pfunc)), "i"(XF_ ## x * sizeof(void *)) : "r11", "r29");
+#elif defined(__arm__)
+#define EXPORT_FUNC(x)					\
+asm volatile (						\
+"	.globl mon_" #x "\n"				\
+"mon_" #x ":\n"						\
+"	ldr	ip, [r8, %0]\n"				\
+"	ldr	pc, [ip, %1]\n"				\
+	: : "i"(offsetof(xxx_t, pfunc)), "i"(XF_ ## x * sizeof(void *)) : "ip");
+#elif defined(__mips__)
+#define EXPORT_FUNC(x)					\
+asm volatile (						\
+"	.globl mon_" #x "\n"				\
+"mon_" #x ":\n"						\
+"	lw	$25, %0($26)\n"				\
+"	lw	$25, %1($25)\n"				\
+"	jr	$25\n"					\
+	: : "i"(offsetof(xxx_t, pfunc)), "i"(XF_ ## x * sizeof(void *)) : "t9");
+#else
+#error [No stub code for this arch]
+#endif
+
+void dummy(void)
+{
+EXPORT_FUNC(printf)
+EXPORT_FUNC(strcpy)
+}
+
+int main(void)
+{
+#if defined(__i386__)
+	xxx_t *pq;
+#elif defined(__powerpc__)
+	register volatile xxx_t *pq asm("r29");
+#elif defined(__arm__)
+	register volatile xxx_t *pq asm("r8");
+#elif defined(__mips__)
+	register volatile xxx_t *pq asm("k0");
+#endif
+	char buf[32];
+
+	func[XF_strcpy] = strcpy;
+	func[XF_printf] = printf;
+	pq = &q;
+	pq->pfunc = pfunc = func;
+
+	mon_strcpy(buf, "test");
+	mon_printf("hi %s %d z\n", buf, 444);
+
+	return 0;
+}
--- a/include/_exports.h
+++ b/include/_exports.h
@@ -0,0 +1,12 @@
+EXPORT_FUNC(get_version)
+EXPORT_FUNC(getc)
+EXPORT_FUNC(tstc)
+EXPORT_FUNC(putc)
+EXPORT_FUNC(puts)
+EXPORT_FUNC(printf)
+EXPORT_FUNC(install_hdlr)
+EXPORT_FUNC(free_hdlr)
+EXPORT_FUNC(malloc)
+EXPORT_FUNC(free)
+EXPORT_FUNC(udelay)
+EXPORT_FUNC(get_timer)
--- a/include/asm-arm/global_data.h
+++ b/include/asm-arm/global_data.h
@@ -51,6 +51,7 @@ typedef	struct	global_data {
 	unsigned long	ram_size;	/* RAM size */
 	unsigned long	reset_status;	/* reset status register at boot */
 #endif
+	void		**jt;		/* jump table */
 } gd_t;

 /*
@@ -59,6 +60,6 @@ typedef	struct	global_data {
 #define	GD_FLG_RELOC	0x00001		/* Code was relocated to RAM		*/
 #define	GD_FLG_DEVINIT	0x00002		/* Devices have been initialized	*/

-#define DECLARE_GLOBAL_DATA_PTR     register gd_t *gd asm ("r8")
+#define DECLARE_GLOBAL_DATA_PTR     register volatile gd_t *gd asm ("r8")

 #endif /* __ASM_GBL_DATA_H */
--- a/include/asm-i386/global_data.h
+++ b/include/asm-i386/global_data.h
@@ -45,6 +45,7 @@ typedef	struct {
 	unsigned long	bus_clk;
 	unsigned long	ram_size;	/* RAM size */
 	unsigned long	reset_status;	/* reset status register at boot */
+	void		**jt;		/* jump table */
 } gd_t;

 /*
--- a/include/asm-mips/global_data.h
+++ b/include/asm-mips/global_data.h
@@ -45,6 +45,7 @@ typedef	struct	global_data {
 	unsigned long	reloc_off;	/* Relocation Offset */
 	unsigned long	env_addr;	/* Address  of Environment struct */
 	unsigned long	env_valid;	/* Checksum of Environment valid? */
+	void		**jt;		/* jump table */
 } gd_t;

 /*
@@ -53,6 +54,6 @@ typedef	struct	global_data {
 #define	GD_FLG_RELOC	0x00001		/* Code was relocated to RAM     */
 #define	GD_FLG_DEVINIT	0x00002		/* Devices have been initialized */

-#define DECLARE_GLOBAL_DATA_PTR     register gd_t *gd asm ("k0")
+#define DECLARE_GLOBAL_DATA_PTR     register volatile gd_t *gd asm ("k0")

 #endif /* __ASM_GBL_DATA_H */
--- a/include/asm-ppc/cpm_8260.h
+++ b/include/asm-ppc/cpm_8260.h
@@ -141,6 +141,13 @@ typedef struct cpm_buf_desc {
 #else
 #define CPM_POST_WORD_ADDR	CFG_CPM_POST_WORD_ADDR
 #endif
+
+#ifndef CFG_CPM_BOOTCOUNT_ADDR
+#define CPM_BOOTCOUNT_ADDR	(CPM_POST_WORD_ADDR - 2*sizeof(ulong))
+#else
+#define CPM_BOOTCOUNT_ADDR	CFG_CPM_BOOTCOUNT_ADDR
+#endif
+
 #define PROFF_SCC1		((uint)0x8000)
 #define PROFF_SCC2		((uint)0x8100)
 #define PROFF_SCC3		((uint)0x8200)
--- a/include/asm-ppc/global_data.h
+++ b/include/asm-ppc/global_data.h
@@ -88,6 +88,7 @@ typedef	struct	global_data {
 #ifdef CONFIG_LWMON
 	unsigned long kbd_status;
 #endif
+	void		**jt;		/* jump table */
 } gd_t;

 /*
@@ -97,7 +98,7 @@ typedef	struct	global_data {
 #define	GD_FLG_DEVINIT	0x00002		/* Devices have been initialized	*/

 #if 1
-#define DECLARE_GLOBAL_DATA_PTR     register gd_t *gd asm ("r29")
+#define DECLARE_GLOBAL_DATA_PTR     register volatile gd_t *gd asm ("r29")
 #else /* We could use plain global data, but the resulting code is bigger */
 #define XTRN_DECLARE_GLOBAL_DATA_PTR	extern
 #define DECLARE_GLOBAL_DATA_PTR     XTRN_DECLARE_GLOBAL_DATA_PTR \
--- a/include/bmp_layout.h
+++ b/include/bmp_layout.h
@@ -28,50 +28,50 @@
 #define _BMP_H_

 typedef struct bmp_color_table_entry {
-  __u8 blue;
-  __u8 green;
-  __u8 red;
-  __u8 reserved;
-} __attribute__((packed)) bmp_color_table_entry_t;
+	__u8	blue;
+	__u8	green;
+	__u8	red;
+	__u8	reserved;
+} __attribute__ ((packed)) bmp_color_table_entry_t;

 /* When accessing these fields, remember that they are stored in little
   endian format, so use linux macros, e.g. le32_to_cpu(width)          */

-typedef	struct bmp_header {
-  /* Header */
-  char signature[2];
-  __u32 file_size;
-  __u32 reserved;
-  __u32 data_offset;
-  /* InfoHeader */
-  __u32 size;
-  __u32 width;
-  __u32 height;
-  __u16 planes;
-  __u16 bit_count;
-  __u32 compression;
-  __u32 image_size;
-  __u32 x_pixels_per_m;
-  __u32 y_pixels_per_m;
-  __u32 colors_used;
-  __u32 colors_important;
-  /* ColorTable */
+typedef struct bmp_header {
+	/* Header */
+	char signature[2];
+	__u32	file_size;
+	__u32	reserved;
+	__u32	data_offset;
+	/* InfoHeader */
+	__u32	size;
+	__u32	width;
+	__u32	height;
+	__u16	planes;
+	__u16	bit_count;
+	__u32	compression;
+	__u32	image_size;
+	__u32	x_pixels_per_m;
+	__u32	y_pixels_per_m;
+	__u32	colors_used;
+	__u32	colors_important;
+	/* ColorTable */

-}  __attribute__((packed)) bmp_header_t;
+} __attribute__ ((packed)) bmp_header_t;

 typedef struct bmp_image {
-  bmp_header_t header;
-  /* We use a zero sized array just as a placeholder for variable
-     sized array */
-  bmp_color_table_entry_t color_table[0];
+	bmp_header_t header;
+	/* We use a zero sized array just as a placeholder for variable
+	   sized array */
+	bmp_color_table_entry_t color_table[0];
 } bmp_image_t;

 /* Data in the bmp_image is aligned to this length */
-#define BMP_DATA_ALIGN 4
+#define BMP_DATA_ALIGN	4

 /* Constants for the compression field */
-#define BMP_BI_RGB  0
-#define BMP_BI_RLE8 1
-#define BMP_BI_RLE4 2
+#define BMP_BI_RGB	0
+#define BMP_BI_RLE8	1
+#define BMP_BI_RLE4	2

-#endif /* _BMP_H_ */
+#endif							/* _BMP_H_ */
--- a/include/cmd_confdefs.h
+++ b/include/cmd_confdefs.h
@@ -84,6 +84,7 @@
 #define CFG_CMD_PING	0x0004000000000000U	/* ping support			*/
 #define CFG_CMD_MMC	0x0008000000000000U	/* MMC support			*/
 #define CFG_CMD_FAT	0x0010000000000000U	/* FAT support			*/
+#define CFG_CMD_IMLS	0x0020000000000000U	/* List all found images        */

 #define CFG_CMD_ALL	0xFFFFFFFFFFFFFFFFU	/* ALL commands			*/

--- a/include/common.h
+++ b/include/common.h
@@ -43,6 +43,20 @@ typedef volatile unsigned char	vu_char;
 #endif
 #ifdef	CONFIG_8xx
 #include <asm/8xx_immap.h>
+#ifdef CONFIG_MPC860
+#define CONFIG_MPC86x 1
+#endif
+#ifdef CONFIG_MPC860T
+#define CONFIG_MPC86x 1
+#endif
+#if defined(CONFIG_MPC866P) || \
+    defined(CONFIG_MPC866T) || \
+    defined(CONFIG_MPC859T) || \
+    defined(CONFIG_MPC859DSL) || \
+    defined(CONFIG_MPC852T)
+#define CONFIG_MPC866_et_al 1
+#define CONFIG_MPC86x 1
+#endif
 #elif defined(CONFIG_5xx)
 #include <asm/5xx_immap.h>
 #elif defined(CONFIG_8260)
@@ -193,6 +207,9 @@ void    pciinfo       (int, int);
 int	misc_init_f   (void);
 int	misc_init_r   (void);

+/* common/exports.c */
+void	jumptable_init(void);
+
 /* $(BOARD)/$(BOARD).c */
 void	reset_phy     (void);
 void    fdc_hw_init   (void);
@@ -219,7 +236,7 @@ extern void  pic_write (uchar reg, uchar val);
 # define CFG_DEF_EEPROM_ADDR CFG_I2C_EEPROM_ADDR
 #endif /* CONFIG_SPI || !defined(CFG_I2C_EEPROM_ADDR) */

-#if defined(CONFIG_PCU_E) || defined(CONFIG_CCM) || defined(CONFIG_ATC)
+#if defined(CONFIG_SPI)
 extern void spi_init_f (void);
 extern void spi_init_r (void);
 extern ssize_t spi_read  (uchar *, int, uchar *, int);
@@ -383,6 +400,9 @@ uint	dpram_alloc(uint size);
 uint	dpram_alloc_align(uint size,uint align);
 void	post_word_store (ulong);
 ulong	post_word_load (void);
+void	bootcount_store (ulong);
+ulong	bootcount_load (void);
+#define BOOTCOUNT_MAGIC		0xB001C041

 /* $(CPU)/.../<eth> */
 void mii_init (void);
@@ -422,8 +442,6 @@ ulong crc32 (ulong, const unsigned char *, uint);
 ulong crc32_no_comp (ulong, const unsigned char *, uint);

 /* common/console.c */
-extern void **syscall_tbl;
-
 int	console_init_f(void);	/* Before relocation; uses the serial  stuff	*/
 int	console_init_r(void);	/* After  relocation; uses the console stuff	*/
 int	console_assign (int file, char *devname);	/* Assign the console	*/
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
wdenk	e0ac62d798	* Make Ethernet autonegotiation on INCA-IP work for all clock rates; allow selection of clock frequency as "make" target * Implement memory autosizing code for IceCube boards * Configure network port on INCA-IP for autonegotiation * Fix overflow problem in network timeout code * Patch by Richard Woodruff, 8 Aug 2003: Allow crc32 to be used at address 0x000 (crc32_no_comp, too).	2003-08-17 18:55:18 +00:00
wdenk	ae3af05ec9	Update for TQM board defaults: disable clocks_in_mhz, enable boot count limit	2003-08-07 22:18:11 +00:00
dzu	9374fa287b	Removed tools/gdb from "make all" target. Added make target "gdbtools" in toplevel directory instead. Removed astest.c from tools/gdb because it is no longer relevant.	2003-08-07 15:04:48 +00:00
wdenk	013dc8d9b9	Disable debug print for normal use. Fix MPC5200 FEC driver	2003-08-07 14:52:18 +00:00
dzu	d41e5e6994	Removed the file tools/gdb/astest.c	2003-08-07 14:22:10 +00:00
dzu	8f713fdfeb	Removed tools/gdb from "make all" target. Added make target "gdbtools" in toplevel directory instead. Removed astest.c from tools/gdb because it is no longer relevant.	2003-08-07 14:20:31 +00:00
wdenk	96e48cf6c1	* Fix PCI support for MPC5200 / IceCube Board	2003-08-05 18:22:44 +00:00
wdenk	bdccc4fedc	* Map ISP1362 USB OTG controller for NSCU board * Patch by Brad Parker, 02 Aug 2003: fix sc520_cdp problems * Implement Boot Cycle Detection (Req. 2.3 of OSDL CGL Reqirements) * Allow erase command to cross flash bank boundaries	2003-08-05 17:43:17 +00:00
wdenk	96dd9af4c7	Must enable timebase earlier on MPC5200	2003-07-31 22:56:30 +00:00
wdenk	1f4bb37d6b	* Patch by Scott McNutt, 21 Jul 2003: Add support for LynuxWorks Kernel Downloadable Images (KDIs). Both LynxOS and BlueCat linux KDIs are supported. * Patch by Richard Woodruff, 25 Jul 2003: use more reliable reset for OMAP/925T * Patch by Nye Liu, 25 Jul 2003: fix typo in mpc8xx.h * Patch by Richard Woodruff, 24 Jul 2003: Fixes for cmd_nand.c: - Fixed null dereferece which could result in incorrect ECC values. - Added support for devices with no Ready/Busy signal hooked up. - Added OMAP1510 read/write protect handling. - Fixed nand.h's ECCPOS. A conflict existed with POS5 and badblock for non-JFFS2. - Switched default ECC to be JFFS2.	2003-07-27 00:21:01 +00:00
wdenk	7784674852	* Allow crc32 to be used at address 0x000 * Provide consistent interface to standalone applications to access the 'global_data' structure Provide a doc/README.standalone more useful to users/developers. * Make IceCube MGT5100 FEC driver work	2003-07-26 08:08:08 +00:00
wdenk	27b207fd0a	* Implement new mechanism to export U-Boot's functions to standalone applications: instead of using (PPC-specific) system calls we now use a jump table; please see doc/README.standalone for details * Patch by Dave Westwood, 24 Jul 2003: added support for Unity OS (a proprietary OS)	2003-07-24 23:38:38 +00:00
wdenk	2535d60277	* Patch by Martin Krause, 17 Jul 2003: add delay to get I2C working with "imm" command and s3c24x0_i2c.c * Patch by Richard Woodruff, 17 July 03: - Fixed bug in OMAP1510 baud rate divisor settings. * Patch by Nye Liu, 16 July 2003: MPC860FADS fixes: - add MPC86xADS support (uses MPC86xADS.h) - add 866P/T core support (also MPC859T/MPC859DSL/MPC852T) o PLPRCR changes o BRG changes (EXTAL/XTAL restricted to 10MHz) o don't trust gclk() software measurement by default, depend on CONFIG_8xx_GCLK_FREQ - add DRAM SIMM not installed detection - use more "correct" SDRAM initialization sequence - allow different SDRAM sizes (8xxADS has 8M) - default DER is 0 - remove unused MAMR defines from FADS860T.h (all done in fads.c) - rename MAMR/MBMR defines to be more consistent. Should eventually be merged into MxMR to better reflect the PowerQUICC datasheet. * Patch by Yuli Barcohen, 16 Jul 2003: support new Motorola PQ2FADS-ZU evaluation board which replaced MPC8260ADS and MPC8266ADS	2003-07-17 23:16:40 +00:00