Merge tag 'mmc-next-2026-06-10' of https://source.denx.de/u-boot/custodians/u-boot-mmc into next

CI: https://source.denx.de/u-boot/custodians/u-boot-mmc/-/pipelines/30396

- Convert ofnode API to dev_read API for mmc/power
- Minor fix power on/off delay
- Correct mmc command help

cmd/mmc.c

@@ -519,7 +519,7 @@ static int do_mmc_rescan(struct cmd_tbl *cmdtp, int flag,
 
 	if (argc == 1) {
 		mmc = init_mmc_device(curr_device, true);
-	} else if (argc == 2) {
+	} else if ((argc == 2) && (CONFIG_IS_ENABLED(MMC_SPEED_MODE_SET))) {
 		enum bus_mode speed_mode;
 
 		speed_mode = (int)dectoul(argv[1], NULL);
@@ -564,11 +564,13 @@ static int do_mmc_dev(struct cmd_tbl *cmdtp, int flag,
 
 	switch (argc) {
 	case 4:
-		speed_mode = (int)dectoul(argv[3], &endp);
-		if (*endp) {
-			printf("Invalid speed mode index '%s', did you specify a mode name?\n",
-			       argv[3]);
-			return CMD_RET_USAGE;
+		if (CONFIG_IS_ENABLED(MMC_SPEED_MODE_SET)) {
+			speed_mode = (int)dectoul(argv[3], &endp);
+			if (*endp) {
+				printf("Invalid speed mode index '%s', did you specify a mode name?\n",
+				       argv[3]);
+				return CMD_RET_USAGE;
+			}
 		}
 
 		fallthrough;
@@ -1312,12 +1314,17 @@ U_BOOT_CMD(
 #endif
 	"mmc erase blk# cnt\n"
 	"mmc erase partname\n"
+#if CONFIG_IS_ENABLED(MMC_SPEED_MODE_SET)
 	"mmc rescan [mode]\n"
-	"mmc part - lists available partition on current mmc device\n"
 	"mmc dev [dev] [part] [mode] - show or set current mmc device [partition] and set mode\n"
 	"  - the required speed mode is passed as the index from the following list\n"
 	"    [MMC_LEGACY, MMC_HS, SD_HS, MMC_HS_52, MMC_DDR_52, UHS_SDR12, UHS_SDR25,\n"
 	"    UHS_SDR50, UHS_DDR50, UHS_SDR104, MMC_HS_200, MMC_HS_400, MMC_HS_400_ES]\n"
+#else
+	"mmc rescan\n"
+	"mmc dev [dev] [part] - show or set current mmc device [partition]\n"
+#endif
+	"mmc part - lists available partition on current mmc device\n"
 	"mmc list - lists available devices\n"
 	"mmc wp [PART] - power on write protect boot partitions\n"
 	"  arguments:\n"

drivers/mmc/cv1800b_sdhci.c

@@ -85,7 +85,7 @@ static int cv1800b_sdhci_probe(struct udevice *dev)
 	int ret;
 
 	host->name = dev->name;
-	host->ioaddr = devfdt_get_addr_ptr(dev);
+	host->ioaddr = dev_read_addr_ptr(dev);
 
 	upriv->mmc = &plat->mmc;
 	host->mmc = &plat->mmc;

drivers/mmc/fsl_esdhc_imx.c

@@ -36,7 +36,6 @@
 #include <dm/pinctrl.h>
 #include <dt-structs.h>
 #include <mapmem.h>
-#include <dm/ofnode.h>
 #include <linux/iopoll.h>
 #include <linux/dma-mapping.h>
 
@@ -1393,7 +1392,6 @@ static int fsl_esdhc_of_to_plat(struct udevice *dev)
 	struct udevice *vqmmc_dev;
 	int ret;
 
-	ofnode node = dev_ofnode(dev);
 	fdt_addr_t addr;
 	unsigned int val;
 
@@ -1407,15 +1405,15 @@ static int fsl_esdhc_of_to_plat(struct udevice *dev)
 	priv->dev = dev;
 	priv->mode = -1;
 
-	val = ofnode_read_u32_default(node, "fsl,tuning-step", 1);
+	val = dev_read_u32_default(dev, "fsl,tuning-step", 1);
 	priv->tuning_step = val;
-	val = ofnode_read_u32_default(node, "fsl,tuning-start-tap",
-				      ESDHC_TUNING_START_TAP_DEFAULT);
+	val = dev_read_u32_default(dev, "fsl,tuning-start-tap",
+				   ESDHC_TUNING_START_TAP_DEFAULT);
 	priv->tuning_start_tap = val;
-	val = ofnode_read_u32_default(node, "fsl,strobe-dll-delay-target",
-				      ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_DEFAULT);
+	val = dev_read_u32_default(dev, "fsl,strobe-dll-delay-target",
+				   ESDHC_STROBE_DLL_CTRL_SLV_DLY_TARGET_DEFAULT);
 	priv->strobe_dll_delay_target = val;
-	val = ofnode_read_u32_default(node, "fsl,signal-voltage-switch-extra-delay-ms", 0);
+	val = dev_read_u32_default(dev, "fsl,signal-voltage-switch-extra-delay-ms", 0);
 	priv->signal_voltage_switch_extra_delay_ms = val;
 
 	if (dev_read_bool(dev, "broken-cd"))

drivers/mmc/msm_sdhci.c

@@ -64,14 +64,13 @@ static int msm_sdc_clk_init(struct udevice *dev)
 {
 	struct msm_sdhc *prv = dev_get_priv(dev);
 	const struct msm_sdhc_variant_info *var_info;
-	ofnode node = dev_ofnode(dev);
 	ulong clk_rate;
 	int ret, i = 0, n_clks;
 	const char *clk_name;
 
 	var_info = (void *)dev_get_driver_data(dev);
 
-	if (ofnode_read_u32(node, "max-frequency", (uint *)(&clk_rate)))
+	if (dev_read_u32(dev, "max-frequency", (uint *)(&clk_rate)))
 		clk_rate = 201500000;
 
 	ret = clk_get_bulk(dev, &prv->clks);
@@ -87,7 +86,7 @@ static int msm_sdc_clk_init(struct udevice *dev)
 	}
 
 	/* If clock-names is unspecified, then the first clock is the core clock */
-	if (!ofnode_get_property(node, "clock-names", &n_clks)) {
+	if (!dev_read_prop(dev, "clock-names", &n_clks)) {
 		if (!clk_set_rate(&prv->clks.clks[0], clk_rate)) {
 			log_warning("Couldn't set core clock rate: %d\n", ret);
 			return -EINVAL;
@@ -96,7 +95,7 @@ static int msm_sdc_clk_init(struct udevice *dev)
 
 	/* Find the index of the "core" clock */
 	while (i < n_clks) {
-		ofnode_read_string_index(node, "clock-names", i, &clk_name);
+		dev_read_string_index(dev, "clock-names", i, &clk_name);
 		if (!strcmp(clk_name, "core"))
 			break;
 		i++;

drivers/mmc/octeontx_hsmmc.c

@@ -3514,7 +3514,7 @@ static u32 xlate_voltage(u32 voltage)
  */
 static bool octeontx_mmc_get_valid(struct udevice *dev)
 {
-	const char *stat = ofnode_read_string(dev_ofnode(dev), "status");
+	const char *stat = dev_read_string(dev, "status");
 
 	if (!stat || !strncmp(stat, "ok", 2))
 		return true;
@@ -3536,16 +3536,13 @@ static int octeontx_mmc_get_config(struct udevice *dev)
 	uint low, high;
 	char env_name[32];
 	int err;
-	ofnode node = dev_ofnode(dev);
 	int bus_width = 1;
 	ulong new_max_freq;
 
 	debug("%s(%s)", __func__, dev->name);
 	slot->cfg.name = dev->name;
 
-	slot->cfg.f_max = ofnode_read_s32_default(dev_ofnode(dev),
-						  "max-frequency",
-						  26000000);
+	slot->cfg.f_max = dev_read_s32_default(dev, "max-frequency", 26000000);
 	snprintf(env_name, sizeof(env_name), "mmc_max_frequency%d",
 		 slot->bus_id);
 
@@ -3562,26 +3559,21 @@ static int octeontx_mmc_get_config(struct udevice *dev)
 
 	if (IS_ENABLED(CONFIG_ARCH_OCTEONTX2)) {
 		slot->hs400_tuning_block =
-			ofnode_read_s32_default(dev_ofnode(dev),
-						"marvell,hs400-tuning-block",
-						-1);
+			dev_read_s32_default(dev, "marvell,hs400-tuning-block", -1);
 		debug("%s(%s): mmc HS400 tuning block: %d\n", __func__,
 		      dev->name, slot->hs400_tuning_block);
 
 		slot->hs200_tap_adj =
-			ofnode_read_s32_default(dev_ofnode(dev),
-						"marvell,hs200-tap-adjust", 0);
+			dev_read_s32_default(dev, "marvell,hs200-tap-adjust", 0);
 		debug("%s(%s): hs200-tap-adjust: %d\n", __func__, dev->name,
 		      slot->hs200_tap_adj);
 		slot->hs400_tap_adj =
-			ofnode_read_s32_default(dev_ofnode(dev),
-						"marvell,hs400-tap-adjust", 0);
+			dev_read_s32_default(dev, "marvell,hs400-tap-adjust", 0);
 		debug("%s(%s): hs400-tap-adjust: %d\n", __func__, dev->name,
 		      slot->hs400_tap_adj);
 	}
 
-	err = ofnode_read_u32_array(dev_ofnode(dev), "voltage-ranges",
-				    voltages, 2);
+	err = dev_read_u32_array(dev, "voltage-ranges", voltages, 2);
 	if (err) {
 		slot->cfg.voltages = MMC_VDD_32_33 | MMC_VDD_33_34;
 	} else {
@@ -3601,12 +3593,12 @@ static int octeontx_mmc_get_config(struct udevice *dev)
 		} while (low <= high);
 	}
 	debug("%s: config voltages: 0x%x\n", __func__, slot->cfg.voltages);
-	slot->slew = ofnode_read_s32_default(node, "cavium,clk-slew", -1);
-	slot->drive = ofnode_read_s32_default(node, "cavium,drv-strength", -1);
+	slot->slew = dev_read_s32_default(dev, "cavium,clk-slew", -1);
+	slot->drive = dev_read_s32_default(dev, "cavium,drv-strength", -1);
 	gpio_request_by_name(dev, "cd-gpios", 0, &slot->cd_gpio, GPIOD_IS_IN);
-	slot->cd_inverted = ofnode_read_bool(node, "cd-inverted");
+	slot->cd_inverted = dev_read_bool(dev, "cd-inverted");
 	gpio_request_by_name(dev, "wp-gpios", 0, &slot->wp_gpio, GPIOD_IS_IN);
-	slot->wp_inverted = ofnode_read_bool(node, "wp-inverted");
+	slot->wp_inverted = dev_read_bool(dev, "wp-inverted");
 	if (slot->cfg.voltages & MMC_VDD_165_195) {
 		slot->is_1_8v = true;
 		slot->is_3_3v = false;
@@ -3617,7 +3609,7 @@ static int octeontx_mmc_get_config(struct udevice *dev)
 		slot->is_3_3v = true;
 	}
 
-	bus_width = ofnode_read_u32_default(node, "bus-width", 1);
+	bus_width = dev_read_u32_default(dev, "bus-width", 1);
 	/* Note fall-through */
 	switch (bus_width) {
 	case 8:
@@ -3628,63 +3620,63 @@ static int octeontx_mmc_get_config(struct udevice *dev)
 		slot->cfg.host_caps |= MMC_MODE_1BIT;
 		break;
 	}
-	if (ofnode_read_bool(node, "no-1-8-v")) {
+	if (dev_read_bool(dev, "no-1-8-v")) {
 		slot->is_3_3v = true;
 		slot->is_1_8v = false;
 		if (!(slot->cfg.voltages & (MMC_VDD_32_33 | MMC_VDD_33_34)))
 			pr_warn("%s(%s): voltages indicate 3.3v but 3.3v not supported\n",
 				__func__, dev->name);
 	}
-	if (ofnode_read_bool(node, "mmc-ddr-3-3v")) {
+	if (dev_read_bool(dev, "mmc-ddr-3-3v")) {
 		slot->is_3_3v = true;
 		slot->is_1_8v = false;
 		if (!(slot->cfg.voltages & (MMC_VDD_32_33 | MMC_VDD_33_34)))
 			pr_warn("%s(%s): voltages indicate 3.3v but 3.3v not supported\n",
 				__func__, dev->name);
 	}
-	if (ofnode_read_bool(node, "cap-sd-highspeed") ||
-	    ofnode_read_bool(node, "cap-mmc-highspeed") ||
-	    ofnode_read_bool(node, "sd-uhs-sdr25"))
+	if (dev_read_bool(dev, "cap-sd-highspeed") ||
+	    dev_read_bool(dev, "cap-mmc-highspeed") ||
+	    dev_read_bool(dev, "sd-uhs-sdr25"))
 		slot->cfg.host_caps |= MMC_MODE_HS;
 	if (slot->cfg.f_max >= 50000000 &&
 	    slot->cfg.host_caps & MMC_MODE_HS)
 		slot->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
-	if (ofnode_read_bool(node, "sd-uhs-sdr50"))
+	if (dev_read_bool(dev, "sd-uhs-sdr50"))
 		slot->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
-	if (ofnode_read_bool(node, "sd-uhs-ddr50"))
+	if (dev_read_bool(dev, "sd-uhs-ddr50"))
 		slot->cfg.host_caps |= MMC_MODE_HS | MMC_MODE_HS_52MHz |
 				       MMC_MODE_DDR_52MHz;
 
 	if (IS_ENABLED(CONFIG_ARCH_OCTEONTX2)) {
 		if (!slot->is_asim && !slot->is_emul) {
-			if (ofnode_read_bool(node, "mmc-hs200-1_8v"))
+			if (dev_read_bool(dev, "mmc-hs200-1_8v"))
 				slot->cfg.host_caps |= MMC_MODE_HS200 |
 					MMC_MODE_HS_52MHz;
-			if (ofnode_read_bool(node, "mmc-hs400-1_8v"))
+			if (dev_read_bool(dev, "mmc-hs400-1_8v"))
 				slot->cfg.host_caps |= MMC_MODE_HS400 |
 					MMC_MODE_HS_52MHz |
 					MMC_MODE_HS200 |
 					MMC_MODE_DDR_52MHz;
 			slot->cmd_out_hs200_delay =
-				ofnode_read_u32_default(node,
+				dev_read_u32_default(dev,
 					"marvell,cmd-out-hs200-dly",
 					MMC_DEFAULT_HS200_CMD_OUT_DLY);
 			debug("%s(%s): HS200 cmd out delay: %d\n",
 			      __func__, dev->name, slot->cmd_out_hs200_delay);
 			slot->data_out_hs200_delay =
-				ofnode_read_u32_default(node,
+				dev_read_u32_default(dev,
 					"marvell,data-out-hs200-dly",
 					MMC_DEFAULT_HS200_DATA_OUT_DLY);
 			debug("%s(%s): HS200 data out delay: %d\n",
 			      __func__, dev->name, slot->data_out_hs200_delay);
 			slot->cmd_out_hs400_delay =
-				ofnode_read_u32_default(node,
+				dev_read_u32_default(dev,
 					"marvell,cmd-out-hs400-dly",
 					MMC_DEFAULT_HS400_CMD_OUT_DLY);
 			debug("%s(%s): HS400 cmd out delay: %d\n",
 			      __func__, dev->name, slot->cmd_out_hs400_delay);
 			slot->data_out_hs400_delay =
-				ofnode_read_u32_default(node,
+				dev_read_u32_default(dev,
 					"marvell,data-out-hs400-dly",
 					MMC_DEFAULT_HS400_DATA_OUT_DLY);
 			debug("%s(%s): HS400 data out delay: %d\n",
@@ -3692,12 +3684,10 @@ static int octeontx_mmc_get_config(struct udevice *dev)
 		}
 	}
 
-	slot->disable_ddr = ofnode_read_bool(node, "marvell,disable-ddr");
-	slot->non_removable = ofnode_read_bool(node, "non-removable");
-	slot->cmd_clk_skew = ofnode_read_u32_default(node,
-						     "cavium,cmd-clk-skew", 0);
-	slot->dat_clk_skew = ofnode_read_u32_default(node,
-						     "cavium,dat-clk-skew", 0);
+	slot->disable_ddr = dev_read_bool(dev, "marvell,disable-ddr");
+	slot->non_removable = dev_read_bool(dev, "non-removable");
+	slot->cmd_clk_skew = dev_read_u32_default(dev, "cavium,cmd-clk-skew", 0);
+	slot->dat_clk_skew = dev_read_u32_default(dev, "cavium,dat-clk-skew", 0);
 	debug("%s(%s): host caps: 0x%x\n", __func__,
 	      dev->name, slot->cfg.host_caps);
 	return 0;
@@ -3843,7 +3833,6 @@ static int octeontx_mmc_host_probe(struct udevice *dev)
 		pr_err("%s: No device tree information found\n", __func__);
 		return -1;
 	}
-	host->node = dev_ofnode(dev);
 	host->last_slotid = -1;
 #if !defined(CONFIG_ARCH_OCTEON)
 	if (otx_is_platform(PLATFORM_ASIM))
@@ -3851,9 +3840,7 @@ static int octeontx_mmc_host_probe(struct udevice *dev)
 	if (otx_is_platform(PLATFORM_EMULATOR))
 		host->is_emul = true;
 #endif
-	host->dma_wait_delay =
-		ofnode_read_u32_default(dev_ofnode(dev),
-					"marvell,dma-wait-delay", 1);
+	host->dma_wait_delay = dev_read_u32_default(dev, "marvell,dma-wait-delay", 1);
 	/* Force reset of eMMC */
 	writeq(0, host->base_addr + MIO_EMM_CFG());
 	debug("%s: Clearing MIO_EMM_CFG\n", __func__);
@@ -3922,13 +3909,12 @@ static int octeontx_mmc_host_child_pre_probe(struct udevice *dev)
 	struct octeontx_mmc_host *host = dev_get_priv(dev_get_parent(dev));
 	struct octeontx_mmc_slot *slot;
 	struct mmc_uclass_priv *upriv;
-	ofnode node = dev_ofnode(dev);
 	u32 bus_id;
 	char name[16];
 	int err;
 
 	debug("%s(%s) Pre-Probe\n", __func__, dev->name);
-	if (ofnode_read_u32(node, "reg", &bus_id)) {
+	if (dev_read_u32(dev, "reg", &bus_id)) {
 		pr_err("%s(%s): Error: \"reg\" not found in device tree\n",
 		       __func__, dev->name);
 		return -1;

drivers/mmc/octeontx_hsmmc.h

@@ -123,7 +123,6 @@ struct octeontx_mmc_host {
 	union mio_emm_cfg emm_cfg;
 	u64		timing_taps;
 	struct mmc	*last_mmc;	/** Last mmc used */
-	ofnode		node;
 	int		cur_slotid;
 	int		last_slotid;
 	int		max_width;

drivers/mmc/xenon_sdhci.c

@@ -537,10 +537,9 @@ static int xenon_sdhci_of_to_plat(struct udevice *dev)
 	host->ioaddr = dev_read_addr_ptr(dev);
 
 	if (device_is_compatible(dev, "marvell,armada-3700-sdhci"))
-		priv->pad_ctrl_reg = devfdt_get_addr_index_ptr(dev, 1);
+		priv->pad_ctrl_reg = dev_read_addr_index_ptr(dev, 1);
 
-	name = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "marvell,pad-type",
-			   NULL);
+	name = ofnode_get_property(dev_ofnode(dev), "marvell,pad-type", NULL);
 	if (name) {
 		if (0 == strncmp(name, "sd", 2)) {
 			priv->pad_type = SOC_PAD_SD;

drivers/power/domain/imx8m-power-domain.c

@@ -476,7 +476,7 @@ static int imx8m_power_domain_bind(struct udevice *dev)
 	const char *name;
 	int ret = 0;
 
-	ofnode_for_each_subnode(subnode, dev_ofnode(dev)) {
+	dev_for_each_subnode(subnode, dev) {
 		/* Bind the subnode to this driver */
 		name = ofnode_get_name(subnode);
 
@@ -531,7 +531,7 @@ static int imx8m_power_domain_of_to_plat(struct udevice *dev)
 	struct imx_pgc_domain_data *domain_data =
 		(struct imx_pgc_domain_data *)dev_get_driver_data(dev);
 
-	pdata->resource_id = ofnode_read_u32_default(dev_ofnode(dev), "reg", -1);
+	pdata->resource_id = dev_read_u32_default(dev, "reg", -1);
 	pdata->domain = &domain_data->domains[pdata->resource_id];
 	pdata->regs = domain_data->pgc_regs;
 	pdata->base = dev_read_addr_ptr(dev->parent);

drivers/power/domain/meson-ee-pwrc.c

@@ -435,8 +435,7 @@ static const struct udevice_id meson_ee_pwrc_ids[] = {
 static int meson_ee_pwrc_probe(struct udevice *dev)
 {
 	struct meson_ee_pwrc_priv *priv = dev_get_priv(dev);
-	u32 ao_phandle;
-	ofnode ao_node;
+	struct ofnode_phandle_args args;
 	int ret;
 
 	priv->data = (void *)dev_get_driver_data(dev);
@@ -447,16 +446,12 @@ static int meson_ee_pwrc_probe(struct udevice *dev)
 	if (IS_ERR(priv->regmap_hhi))
 		return PTR_ERR(priv->regmap_hhi);
 
-	ret = ofnode_read_u32(dev_ofnode(dev), "amlogic,ao-sysctrl",
-			      &ao_phandle);
+	ret = dev_read_phandle_with_args(dev, "amlogic,ao-sysctrl", NULL, 0, 0,
+					 &args);
 	if (ret)
 		return ret;
 
-	ao_node = ofnode_get_by_phandle(ao_phandle);
-	if (!ofnode_valid(ao_node))
-		return -EINVAL;
-
-	priv->regmap_ao = syscon_node_to_regmap(ao_node);
+	priv->regmap_ao = syscon_node_to_regmap(args.node);
 	if (IS_ERR(priv->regmap_ao))
 		return PTR_ERR(priv->regmap_ao);
 

drivers/power/domain/meson-gx-pwrc-vpu.c

@@ -283,24 +283,19 @@ static const struct udevice_id meson_gx_pwrc_vpu_ids[] = {
 static int meson_gx_pwrc_vpu_probe(struct udevice *dev)
 {
 	struct meson_gx_pwrc_vpu_priv *priv = dev_get_priv(dev);
-	u32 hhi_phandle;
-	ofnode hhi_node;
+	struct ofnode_phandle_args args;
 	int ret;
 
 	priv->regmap_ao = syscon_node_to_regmap(dev_ofnode(dev_get_parent(dev)));
 	if (IS_ERR(priv->regmap_ao))
 		return PTR_ERR(priv->regmap_ao);
 
-	ret = ofnode_read_u32(dev_ofnode(dev), "amlogic,hhi-sysctrl",
-			      &hhi_phandle);
+	ret = dev_read_phandle_with_args(dev, "amlogic,hhi-sysctrl", NULL, 0, 0,
+					 &args);
 	if (ret)
 		return ret;
 
-	hhi_node = ofnode_get_by_phandle(hhi_phandle);
-	if (!ofnode_valid(hhi_node))
-		return -EINVAL;
-
-	priv->regmap_hhi = syscon_node_to_regmap(hhi_node);
+	priv->regmap_hhi = syscon_node_to_regmap(args.node);
 	if (IS_ERR(priv->regmap_hhi))
 		return PTR_ERR(priv->regmap_hhi);
 

drivers/power/pmic/pca9450.c

@@ -90,7 +90,7 @@ static int pca9450_probe(struct udevice *dev)
 			return ret;
 	}
 
-	if (ofnode_read_bool(dev_ofnode(dev), "nxp,wdog_b-warm-reset"))
+	if (dev_read_bool(dev, "nxp,wdog_b-warm-reset"))
 		reset_ctrl = PCA9450_PMIC_RESET_WDOG_B_CFG_WARM;
 	else
 		reset_ctrl = PCA9450_PMIC_RESET_WDOG_B_CFG_COLD_LDO12;

drivers/power/pmic/pmic_qcom.c

@@ -72,7 +72,7 @@ static int pmic_qcom_probe(struct udevice *dev)
 	 * contains two discrete values, not a single 64-bit address.
 	 * The address is the first value.
 	 */
-	ret = ofnode_read_u32_index(dev_ofnode(dev), "reg", 0, &priv->usid);
+	ret = dev_read_u32_index(dev, "reg", 0, &priv->usid);
 	if (ret < 0)
 		return -EINVAL;
 

drivers/power/regulator/anatop_regulator.c

@@ -170,8 +170,7 @@ static int anatop_regulator_probe(struct udevice *dev)
 	anatop_reg = dev_get_plat(dev);
 	uc_pdata = dev_get_uclass_plat(dev);
 
-	anatop_reg->name = ofnode_read_string(dev_ofnode(dev),
-					      "regulator-name");
+	anatop_reg->name = dev_read_string(dev, "regulator-name");
 	if (!anatop_reg->name)
 		return log_msg_ret("regulator-name", -EINVAL);
 

drivers/power/regulator/qcom-rpmh-regulator.c

@@ -5,6 +5,7 @@
 #define pr_fmt(fmt) "%s: " fmt, __func__
 
 #include <linux/err.h>
+#include <dm.h>
 #include <dm/device_compat.h>
 #include <dm/device.h>
 #include <dm/devres.h>
@@ -882,7 +883,7 @@ static int rpmh_regulator_probe(struct udevice *dev)
 	priv->hw_data = init_data->hw_data;
 	priv->enabled = -EINVAL;
 	priv->uv = -ENOTRECOVERABLE;
-	if (ofnode_read_u32(dev_ofnode(dev), "regulator-initial-mode", &priv->mode))
+	if (dev_read_u32(dev, "regulator-initial-mode", &priv->mode))
 		priv->mode = -EINVAL;
 
 	plat_data->mode = priv->hw_data->pmic_mode_map;
@@ -933,7 +934,7 @@ static int rpmh_regulators_bind(struct udevice *dev)
 		return -ENODEV;
 	}
 
-	pmic_id = ofnode_read_string(dev_ofnode(dev), "qcom,pmic-id");
+	pmic_id = dev_read_string(dev, "qcom,pmic-id");
 	if (!pmic_id) {
 		dev_err(dev, "No PMIC ID\n");
 		return -ENODEV;
@@ -941,7 +942,7 @@ static int rpmh_regulators_bind(struct udevice *dev)
 
 	drv = lists_driver_lookup_name("rpmh_regulator_drm");
 
-	ofnode_for_each_subnode(node, dev_ofnode(dev)) {
+	dev_for_each_subnode(node, dev) {
 		data = vreg_get_init_data(init_data, node);
 		if (!data)
 			continue;

drivers/power/regulator/regulator_common.c

@@ -87,6 +87,9 @@ int regulator_common_set_enable(const struct udevice *dev,
 			}
 		}
 
+		if (enable && plat->off_on_delay_us)
+			udelay(plat->off_on_delay_us);
+
 		ret = dm_gpio_set_value(&plat->gpio, enable);
 		if (ret) {
 			pr_err("Can't set regulator : %s gpio to: %d\n", dev->name,
@@ -97,9 +100,6 @@ int regulator_common_set_enable(const struct udevice *dev,
 		if (enable && plat->startup_delay_us)
 			udelay(plat->startup_delay_us);
 
-		if (!enable && plat->off_on_delay_us)
-			udelay(plat->off_on_delay_us);
-
 		if (enable)
 			plat->enable_count++;
 		else

drivers/power/regulator/scmi_regulator.c

@@ -180,7 +180,7 @@ static int scmi_regulator_bind(struct udevice *dev)
 	ofnode node;
 	int ret;
 
-	regul_node = ofnode_find_subnode(dev_ofnode(dev), "regulators");
+	regul_node = dev_read_subnode(dev, "regulators");
 	if (!ofnode_valid(regul_node)) {
 		dev_err(dev, "no regulators node\n");
 		return -ENXIO;

drivers/power/regulator/tps6287x_regulator.c

@@ -141,7 +141,7 @@ static int tps6287x_regulator_probe(struct udevice *dev)
 
 	pdata->config = (void *)dev_get_driver_data(dev);
 
-	slave_id = devfdt_get_addr_index(dev, 0);
+	slave_id = dev_read_addr_index(dev, 0);
 
 	ret = i2c_get_chip(dev->parent, slave_id, 1, &pdata->i2c);
 	if (ret) {