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Author SHA1 Message Date
Wolfgang Denk
963f2f6117 Prepare 2009.08-rc3
Update CHANGELOG, minor Coding Style cleanup.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-08-22 23:27:26 +02:00
Wolfgang Denk
d52785d7f5 Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-08-22 00:24:54 +02:00
Michal Simek
5b2da6a309 qemu-mips: Fix Qemu website
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Michal Simek <michal.simek@petalogix.com>
Acked-by: Shinya Kuribayashi <skuribay@pobox.com>
2009-08-22 00:20:20 +02:00
Kim Phillips
79f516bccc mpc83xx: accommodate larger kernel sizes by default
linux mpc83xx_defconfig kernels are getting bigger, accommodate for
their growth by adjusting default load and fdt addresses.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-08-21 17:11:44 -05:00
Kim Phillips
8eceeb7fd6 mpc83xx: mpc8377erdb - change DDR settings to those from latest bsp
when using Linus' 83xx_defconfig, the mpc8377rdb would hang at boot
at either:

NET: Registered protocol family 16

or the

io scheduler cfq registered

message.  Fixing up these DDR settings appears to fix the problem.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-08-21 17:11:44 -05:00
Kim Phillips
27c5248dd4 mpc83xx: tqm8349 - remove pci & flash window conflict
commit 9993e196da "mpc83xx: convert all
remaining boards over to 83XX_GENERIC_PCI" remapped pci windows on
tqm834x to make it more consistent with the other 83xx boards.  During
that time however, the author failed to realize that FLASH_BASE was
occupying the same range as what PCI1_MEM_BASE was being assigned.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Tested-by: Wolfgang Denk <wd@denx.de>
2009-08-21 17:11:44 -05:00
Heiko Schocher
6d2c26ac83 mpc83xx: add missing CSCONFIG_ODT_WR_CFG for 832x CPUs
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-08-21 17:10:35 -05:00
Paul Gortmaker
193b4cb3f6 mpc83xx: mpc8349 - delete unused SYS_MID_FLASH_JUMP
This was introduced with the MPC8349EMDS board, and then copied to
a couple other boards by nature of being the reference implementation.

  u-boot$git grep CONFIG_SYS_MID_FLASH_JUMP
  include/configs/MPC8349EMDS.h:#define CONFIG_SYS_MID_FLASH_JUMP 0x7F000000
  include/configs/sbc8349.h:#define CONFIG_SYS_MID_FLASH_JUMP     0x7F000000
  include/configs/vme8349.h:#define CONFIG_SYS_MID_FLASH_JUMP     0x7F000000
  u-boot$

It currently isn't used, so delete it before it spreads further.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-08-21 17:10:04 -05:00
Paul Gortmaker
c0d660fbbe mpc83xx: sbc8349 - make enabling PCI more user friendly
Prior to this commit, to enable PCI, you had to go manually
edit the board config header, which isn't really user friendly.
This adds the typical PCI make targets to the toplevel Makefile
in accordance with what is being done with other boards.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-08-21 17:09:21 -05:00
Jean-Christophe PLAGNIOL-VILLARD
a3c5057a6c eeprom_m95xxx: remove unused variable i
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-08-21 23:36:19 +02:00
Ilya Yanok
8cf19b9fec jffs2: some fixes to summary support
This patch fixes some issues with JFFS2 summary support in U-Boot.
1/ Summary support made compilation configurable (as summary support
considered expiremental even in Linux).
2/ Summary code can do unaligned 16-bit and 32-bit memory accesses.
We need to get data byte by byte to exclude data aborts.
3/ Make summary scan in two passes so we can safely fall back to full
scan if we found unsupported entry in the summary.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2009-08-21 23:29:35 +02:00
Prafulla Wadaskar
11906936e1 arm: rd6281a: Fixed NAND specific warning
It is recommended to define the macro CONFIG_SYS_64BIT_VSPRINTF
for NAND specific warning removal, same is done in this patch

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-08-21 23:26:09 +02:00
Wolfgang Denk
b5ffb19333 TRAB: make independent of specific libgcc helper routines
The TRAB board references local libgcc helper routines
(lib_arm/div0.o and lib_arm/_umodsi3.o) which cause build problems
when we try to use the normal, compiler provided libgcc instead.
Removing these references allows to build both with and without the
local libgcc helper routines.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-08-21 23:25:22 +02:00
Wolfgang Denk
1aada9cd64 Fix all linker scripts for older binutils versions (pre-2.16)
Commit f62fb99941 fixed handling of all rodata sections by using a
wildcard combined with calls to ld's builtin functions SORT_BY_ALIGNMENT()
and SORT_BY_NAME().  Unfortunately these functions were only
introduced with biunutils version 2.16, so the modification broke
building with all tool chains using older binutils.

This patch makes it work again.  This is done by omitting the use of
these functions for such old tool chains.  This will result in
slightly larger target binaries, as the rodata sections are no longer
in optimal order alignment-wise which reauls in unused gaps, but the
effect was found to be insignificant - especially compared to the fact
that you cannot build U-Boot at all in the current state.

As ld seems to have no support for conditionals we run the linker
script through the C preprocessor which can be easily used to remove
the unwanted function calls.

Note that the C preprocessor must be run with the "-ansi" (or a
"-std=") option to make sure all the system-specific predefined
macros outside the reserved namespace are suppressed. Otherise, cpp
might for example substitute "powerpc" to "1", thus corrupting for
example "OUTPUT_ARCH(powerpc)" etc.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
2009-08-21 23:13:34 +02:00
Wolfgang Denk
f772acf8a5 ARM: compiler options cleanup - improve tool chain support
For some time there have been repeated reports about build problems
with some ARM (cross) tool chains.  Especially issues about
(in)compatibility with the tool chain provided runtime support
library libgcc.a caused to add and support a private implementation
of such runtime support code in U-Boot.  A closer look at the code
indicated that some of these issues are actually home-made.  This
patch attempts to clean up some of the most obvious problems and make
building of U-Boot with different tool chains easier:

- Even though all ARM systems basicy used the same compiler options
  to select a specific ABI from the tool chain, the code for this was
  distributed over all cpu/*/config.mk files.  We move this one level
  up into lib_arm/config.mk instead.

- So far, we only checked if "-mapcs-32" was supported by the tool
  chain; if yes, this was used, if not, "-mabi=apcs-gnu" was
  selected, no matter if the tool chain actually understood this
  option.  There was no support for EABI conformant tool chains.
  This patch implements the following logic:

  1) If the tool chain supports
	"-mabi=aapcs-linux -mno-thumb-interwork"
     we use these options (EABI conformant tool chain).
  2) Otherwise, we check first if
	"-mapcs-32"
     is supported, and then check for
	"-mabi=apcs-gnu"
     If one test succeeds, we use the first found option.
  3) In case 2), we also test if "-mno-thumb-interwork", and use
     this if the test succeeds. [For "-mabi=aapcs-linux" we set
     "-mno-thumb-interwork" mandatorily.]

  This way we use a similar logic for the compile options as the
  Linux kernel does.

- Some EABI conformant tool chains cause external references to
  utility functions like raise(); such functions are provided in the
  new file lib_arm/eabi_compat.c

  Note that lib_arm/config.mk gets parsed several times, so we must
  make sure to add eabi_compat.o only once to the linker list.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Dirk Behme <dirk.behme@googlemail.com>
Cc: Magnus Lilja <lilja.magnus@gmail.com>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Sergey Kubushyn <ksi@koi8.net>
Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
Tested-by: Andrzej Wolski <awolski@poczta.fm>
Tested-by: Gaye Abdoulaye Walsimou <walsimou@walsimou.com>
Tested-by: Tom Rix <Tom.Rix@windriver.com>
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-08-21 23:11:53 +02:00
Wolfgang Denk
b9cce2c773 Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-08-21 23:04:03 +02:00
Wolfgang Denk
db81c0d276 Merge branch 'master' of git://git.denx.de/u-boot-net 2009-08-21 23:03:58 +02:00
Wolfgang Denk
f81c3d7232 Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-08-21 22:56:01 +02:00
Mingkai Hu
269610f6ba NAND boot: fix nand_load overlap issue
The code copy data from NAND flash block by block, so when
the data length isn't a whole-number multiple of the block
size, it will overlap the rest space.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-21 22:55:47 +02:00
Giulio Benetti
1fc1d9aed0 add WATCHDOG_RESET() on nand write and read
Signed-off-by: giulio.benetti@micronovasrl.com
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-08-21 22:55:21 +02:00
Peter Tyser
b1e849f220 tsec: Wait for auto-negotiation to complete without link
Previously, waiting for auto-negotiation would only occur if a valid
link had been detected.  Problems arose when attempting to use a
tsec immediately after bootup but before link was achieved, eg:
=> dhcp
Auto-neg error, defaulting to 10BT/HD
eTSEC1: No link.
Auto-neg error, defaulting to 10BT/HD
eTSEC2: No link.
=>

With this patch applied the same operation as above resulted in:
=> dhcp
Waiting for PHY auto negotiation to complete. done
Enet starting in 1000BT/FD
Speed: 1000, full duplex

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-21 10:35:30 -07:00
Simon Kagstrom
477fa6378f arm: kirkwood: See to it that sent data is 8-byte aligned
U-boot might use non-8-byte-aligned addresses for sending data, which
the kwgbe_send doesn't accept (bootp does this for me). This patch
copies the data to be sent to a malloced temporary buffer if it is
non-aligned.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-21 09:57:33 -07:00
Simon Kagstrom
cad713bf75 Wait for the link to come up on kirkwood network init
This patch makes the device wait for up to 5 seconds for the link to
come up, similar to what many of the other network drivers do. This
avoids confusing situations where, e.g., a tftp fails when initiated
early after U-boot has started (before the link has come up).

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-21 09:57:33 -07:00
Simon Kagstrom
bb1ca3b27f arm:kirkwood Define kirkwood phy address magic number
Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-21 09:57:33 -07:00
Timur Tabi
f81ecb5d33 e1000: fix PCI memory addressing
The Intel E1000 driver was making assumptions about the relationship between
some virtual, physical, and PCI addresses.

Also fix some bad usage of the DEBUGOUT macro

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-21 09:57:33 -07:00
Ilya Yanok
b644006e1a jffs2: clean the cache in case of malloc fails in build_lists
We should call jffs2_clean_cache() if we return from jffs2_build_lists()
with an error to prevent usage of incomplete lists. Also we should
free() a local buffer to prevent memory leaks.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2009-08-18 21:30:58 +02:00
Heiko Schocher
7ff66bb0be ppc: trigger WDT before starting Linux
Signed-off-by: Heiko Schocher <hs@denx.de>
2009-08-18 21:30:34 +02:00
Wolfgang Denk
2bcbd429f4 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2009-08-18 13:57:04 +02:00
Wolfgang Denk
9af019f579 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2009-08-18 13:53:54 +02:00
Albin Tonnerre
918319c705 Update the mtd driver name in bootargs for at91-based boards
The name of the atmel nand driver in the kernel changed from at91_nand
to atmel_nand back in June 2008, but the at91-based boards config files
still refer to at91_nand. This patch updates them with the new name

Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
2009-08-18 13:51:51 +02:00
Ben Goska
8fa656aa52 omap3: Fixed a problem with hwecc
In commit 187af954cf there
was a typo that offset all the ecc registers by 4 bytes, fixed that.

Signed-off-by: Ben Goska <goskab@onid.oregonstate.edu>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
2009-08-18 13:51:30 +02:00
Stefan Roese
514bab6609 ppc4xx: Fix "chip_config" command for AMCC Arches
This patch fixes the "chip_config" command for I2C bootstrap EEPROM
configuration. First it changes the I2C bootstrap EEPROM address to
0x54 as this is used on Arches (instead of 0x52 on Canyonlands/
Glacier). Additionally, the NAND bootstrap settings are removed
for Arches since Arches doesn't support NAND-booting.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-08-18 09:16:33 +02:00
Wolfgang Denk
4af34177b6 Monahans: avoid floating point calculations
Current code for the Monahans CPU defined OSCR_CLK_FREQ as 3.250 (MHz)
which caused floating point operations to be used. This resulted in
unresolved references to some FP related libgcc functions when using
U-Boot's private libgcc functions.

Change the code to use fixed point math only.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-08-17 23:53:41 +02:00
Kumar Gala
e393e2e9bc 85xx: Fix addrmap to include memory
When we init the addrmap based on the TLB we will not end up getting
the TLB that covers memory if we are using SPD.  The reason is we
haven't relocated at the point that we setup the memory TLB and thus it
will not get setup in the addrmap.

Instead we can just walk over the TLB array after we've relocated and
see all the TLBs that have been set and use that information to populate
the initial addrmap.  By doing this we insure that we get the TLB
entries that cover memory.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-14 17:42:05 -05:00
John Schmoller
7dedefdf74 flash: Fix CFI buffer size bug
Fix bug introduced by 9c048b5234.

The cfi_flash.c driver cast the flash buffer size to a uchar in
flash_write_cfibuffer(). On some flash parts, (tested on Numonyx
part PC32F512M29EWH), the buffer size is 1KB. Remove the cast to
uchar to enable buffer sizes to be larger.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-08-13 09:28:20 +02:00
Mike Frysinger
f6e3a1fa92 trab: rename spi_init()
The local board-specific spi_init() function conflicts with the common SPI
layer, so rename it to something board-specific.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-08-13 09:20:41 +02:00
Giuseppe CONDORELLI
253cb831f5 zlib: add watchdog reset call
This patch adds watchdog reset call to allow its invokation during decompression
phase. This control was present on old zlib version and here it is
backported for those relevant routines. This patch is sent as a zlib separate
one beacuse it was not tested due to specific board lack.
zlib patches will be unified just in one when this will be validated through
tests.

Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>
2009-08-11 22:15:18 +02:00
Giuseppe CONDORELLI
dce3d79710 zlib: updated to v.1.2.3
This patch updates zlib to the latest stable version.
Only relevant zlib parts were ported to u-boot tree, as already did for the
current zlib (0.95). New zlib guarantees a faster inflate performances
other then others improvements as explained at www.zlib.net.
It also includes Alessandro Rubini's patches to allow 0 as destination pointer
and to call watchdog reset if required by architecture.

Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>
Reviewed-by: Angelo Castello <angelo.castello@st.com>
Reviewed-by: Alessandro Rubini <rubini-list@gnudd.com>
2009-08-11 22:14:29 +02:00
Heiko Schocher
3426d65daa dtt, lm81: move unneccessary printf into a debug printf
Signed-off-by: Heiko Schocher <hs@denx.de>
2009-08-11 21:59:08 +02:00
Wolfgang Denk
9e4623a0ad Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2009-08-11 21:49:15 +02:00
Wolfgang Denk
f1da206041 Merge branch 'master' of git://git.denx.de/u-boot-video 2009-08-11 21:47:42 +02:00
Wolfgang Denk
f45c07dbd1 Merge branch 'master' of git://git.denx.de/u-boot-net 2009-08-11 21:44:55 +02:00
Mark Jackson
54e399f110 MIMC200: reduce LCD pixclock
The initial pixclock for the MIMC200 board is wrong (and causes
screen corruption due to DMA underruns).

This patch simply reduces the pixel clock to fix the problem.

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
2009-08-11 13:58:26 +02:00
Richard Retanubun
1443cd7e54 UEC FIXED PHY: Determine fixed-phy port using UEC interface name.
Fixed a misunderstanding in the original implementation, 'devnum' that
was used in the cpu/ppc4xx/4xx_enet.c implementation was NOT the
PHY's SMI address, rather it was the number of the MAC interface on
the CPU. The equivalent of this for uec_phy will be the UEC number
stored in mii_info->dev->name. Usage example is updated for uec.

Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-10 16:07:54 -07:00
Richard Retanubun
1a9519373b Assigned a static SMI address to all UECs TBIPA address.
It is set to 0x1F by default and can be overwritten on the board
header file by defining CONFIG_UTBIPAR_INIT_TBIPA. This allows
the CPU to simply "reserve" one SMI address instead of using
a different one for each UEC.

Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-10 15:55:42 -07:00
Prafulla Wadaskar
9fd38a01cb net: kirkwood: updates: used eth_setenv_enetaddr api
eth_setenv_enetaddr is avaible by upper layer
using this saves 204 bytes on total image size

used Local OUI instead of Marvell OUI for
random MAC address generation logic

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-10 14:58:13 -07:00
Roy Zang
ecbd2078a1 Fix E1000 build warning on AP1000 board
Fix E1000 build warning on AP1000 board
 Fix the build warning on AP1000 board:
 e1000.c:131: warning: 'e1000_read_eeprom' used but never defined
 e1000.c:2012: warning: 'e1000_set_phy_mode' defined but not used

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-10 14:53:54 -07:00
Sandeep Paulraj
b3af1d698b ARM: Davinci DM355: Enabling DM9000 on DM355 EVM
Due to recent changes to the NET support on U-boot, DM9000
is no longer detected on the DM355 EVM.
This minor update enables DM9000 on the DM355 EVM.
Tested on the DM355 EVM

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-10 14:53:53 -07:00
Prafulla Wadaskar
08c2df33f1 net: phy: bugfixes: mv88E61xx compiler warnings fixed
1. mv88E61xx driver compiler warnings fixed
2. idstr if-else statements changed to switch() construct
   and added default case too.
   This fixed idstr may be uninitialized warning

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-10 14:53:52 -07:00
Po-Yu Chuang
750326e5d5 arm: A320: driver for FTMAC100 ethernet controller
This patch adds an FTMAC100 ethernet driver for Faraday A320 evaluation board.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-10 14:53:52 -07:00
Kumar Gala
f90dc43fd6 85xx: Removed BEDBUG support from FSL 85xx boards
For some reason the MPC8544 enabled BEDBUG if PCI was enabled and that
got copied int the MPC8536, MPC8572 and P2020 DS boards.  The BEDBUG
support has never been made to work completely on e500/85xx so we
just disable it to save space and match the other FSL 85xx boards.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-10 16:40:55 -05:00
Wolfgang Denk
eb1a4d0a47 Prepare 2009.08-rc2
Update CHANGELOG

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-08-10 10:39:12 +02:00
Wolfgang Denk
53cc18c71b Minor coding style cleanup.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-08-10 10:38:34 +02:00
Wolfgang Denk
d371708a1b net/tftp.c: fix warning: pointer targets differ in signedness
tftp.c:294: warning: pointer targets in passing argument 1 of 'strlen'
differ in signedness

This was only visible for the utx8245 board which seems to have DEBUG
enabled.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-08-10 09:59:10 +02:00
Dirk Behme
3ed9e943fd ARM Cortex A8: Remove bogus config.mk entries
Remove bogus config.mk entry, fix newline and remove redundant
omap3/config.mk

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-08-10 00:13:22 +02:00
Dirk Behme
cd3dcba142 OMAP3: Fix missing GPMC_CONFIG_CS0_BASE
Applying two indepenent OMAP3 patches resulted in missing
GPMC_CONFIG_CS0_BASE. Patch "omap3: embedd gpmc_cs into gpmc
config struct" removes GPMC_CONFIG_CS0_BASE, independent patch
"omap3: bug fix for NOR boot support" introduces it's usage.
Re-introduce GPMC_CONFIG_CS0_BASE.

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-08-10 00:12:43 +02:00
Ilya Yanok
ba3dbaf281 mxc-mmc: sdhc host driver for MX2 and MX3 proccessor
This is a port of Linux driver for SDHC host controller hardware
found on Freescale's MX2 and MX3 processors. Uses new generic MMC
framework (CONFIG_GENERIC_MMC) and it looks like there are some
problems with a framework (at least on LE cpus). Some of these
problems are addressed in the following patches.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2009-08-09 23:47:38 +02:00
Alessandro Rubini
642d7b63c3 kirkwood/gpio.h: remove duplicate definition
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
2009-08-09 23:46:45 +02:00
Albin Tonnerre
3ac374c0f0 Add driver for the ST M95xxx SPI EEPROM
This chip is used in a number of boards manufactured by Calao-Systems
which should be supported soon. This driver provides the necessary
spi_read and spi_write functions necessary to communicate with the chip.

Signed-off-by: Albin Tonnerre <albin.tonnerre@free-electrons.com>
2009-08-09 23:45:14 +02:00
Prafulla Wadaskar
30951960ba arm: Sheevaplug: Fixed NAND specific warning
It is recommended to define the macro CONFIG_SYS_64BIT_VSPRINTF
for NAND specific warning removal, same is done in this patch

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-08-09 23:44:52 +02:00
Josh Boyer
317734966e Dual-license IBM code contributions
It was brought to our attention that U-Boot contains code derived from the
IBM OpenBIOS source code originally provided with some of the older PowerPC
4xx development boards.  As a result, the original license of this code has
been carried in the various files for a number of years in the U-Boot project.

IBM is dual-licensing the IBM code contributions already present in U-Boot
under either the terms of the GNU General Public License version 2, or the
original code license already present.

Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2009-08-09 23:15:33 +02:00
Kumar Gala
cfd700be9f fdt: Fix fdt_pci_dma_ranges handling of 64-bit ranges
If the size of a region equal to 4G it can't be represnted in a 32-bit
BAR so we should have marked that case as MEM64.

Additionally bump the number of inbound windows up to 4 to handle the
fact that Freescale PPCs that have an implicit window for CCSRBAR.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-08-09 23:13:56 +02:00
Wolfgang Denk
59b4d7471c ARM EABI: add new helper functions resp. function names
The ARM EABI defines new names for GCC helper functions,
and GCC seems to need some new functions as well.

This patch is a minimal-invasive approach to fix problems with EABI
conformant tool chains (to be used with "USE_PRIVATE_LIBGCC=yes").

Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Dirk Behme <dirk.behme@googlemail.com>
2009-08-09 23:08:59 +02:00
Peter Tyser
197324d7d9 hush: Fix bogus free() call
An off-by-one error in hush.c resulted in an unintentional free() call
every time a command was executed

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-08-09 23:02:42 +02:00
Detlev Zundel
ff27650bb2 digsy_mtc: Update default environment
Signed-off-by: Detlev Zundel <dzu@denx.de>
2009-08-09 23:01:41 +02:00
Detlev Zundel
0b40bd439a digsy_mtc: Add delay in SPI transfers to the companion controller.
While at it, remove initialization of variables which will be set
before usage in all cases.

Signed-off-by: Detlev Zundel <dzu@denx.de>
2009-08-09 23:01:07 +02:00
Anatolij Gustschin
0bf00750e0 digsy_mtc: minor fixes for mtc command help
Add mtc state subcommand description to the
help of mtc command.

Remove some newlines in description of commands
for proper help formating.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2009-08-09 23:00:08 +02:00
Grzegorz Bernacki
5cc6908418 digsy_mtc: Add mtc state command.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2009-08-09 22:59:27 +02:00
Wolfgang Denk
716655288a Partition support: remove newline from partition name
Remove bogus newline character that got added to the .name field of
the disk_partition_t structure.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-08-09 22:52:38 +02:00
Luigi 'Comio' Mantellini
3f1649fb0d Fix LZMA string.h header inclusion issue and remove unused variables.
Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
2009-08-09 22:51:53 +02:00
Jens Scharsig
1c6232f1e2 bus_vcxk.c: fix warning: unused variable 'lineptr'
Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
2009-08-09 22:49:16 +02:00
Mike Frysinger
18304f7675 env: kill off default_environment_size
The only environment type that uses this variable is spi flash, and that is
only because it is reimplementing the common set_default_env() function.
So fix the spi flash code and kill off the default_environment_size in the
process.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-08-09 22:41:42 +02:00
Mike Frysinger
bedd8403f7 export SPI functions to standalone apps
While we're here, fix the broken #ifdef handling in _exports.h.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-08-09 22:34:51 +02:00
Wolfgang Denk
81813cb01f Merge branch 'master' of git://git.denx.de/u-boot-net 2009-08-08 12:08:09 +02:00
Penda Naveen Kumar
3b9043a7c0 omap3: bug fix for NOR boot support
This patch provides bug fix, when omap3 uses nor boot.

Signed-off-by: Penda Naveen Kumar<pnaveen@ti.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
2009-08-08 11:59:40 +02:00
Michael Evans
61c68ae0b4 Fix examples for OMAP3 boards...
The attached patch corrects an error in the examples/Makefile which
causes the applications in the examples directory to hang on OMAP3
based boards. The current Makefile sets -Ttext during linking to
0x0c100000 which is outside of addressable SDRAM memory. The script
corrects the existing ifeq...else...endif logic to look at the VENDOR
tag rather than the CPU tag.

The patch affects the following configs: omap3_beagle_config,
omap3_overo_config, omap3_evm_config, omap3_pandora_config,
omap3_zoom1_config and omap3_zoom2_config.

Signed-off-by: Michael Evans <horse_dung@hotmail.com>

Edited commit message.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-08-08 11:57:22 +02:00
Dirk Behme
a3d1421dfd omap3: use only fixed-size types inside ctrl_structs
replace variable types in ctrl_structs for omap3 by those with
fixed size (u8, u16, u32).
Additional ifndef-protection is needed by examples which do not
compile when including asm/types.h

Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-08-08 11:36:29 +02:00
Dirk Behme
894113529e omap3: replace all instances of gpmc config struct by one global
Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-08-08 11:34:11 +02:00
Dirk Behme
97a099eaa4 omap3: remove typedefs for configuration structs
Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-08-08 11:33:23 +02:00
Roy Zang
aa0707897c Add Intel E1000 PCIE card support
Based on Intel PRO/1000 Network Driver 7.3.20-k2
  Add Intel E1000 PCIE card support. The following cards are added:
  INTEL_82571EB_COPPER
  INTEL_82571EB_FIBER,
  INTEL_82571EB_SERDES
  INTEL_82571EB_QUAD_COPPER
  INTEL_82571PT_QUAD_COPPER
  INTEL_82571EB_QUAD_FIBER
  INTEL_82571EB_QUAD_COPPER_LOWPROFILE
  INTEL_82571EB_SERDES_DUAL
  INTEL_82571EB_SERDES_QUAD
  INTEL_82572EI_COPPER
  INTEL_82572EI_FIBER
  INTEL_82572EI_SERDES
  INTEL_82572EI
  INTEL_82573E
  INTEL_82573E_IAMT
  INTEL_82573L
  INTEL_82546GB_QUAD_COPPER_KSP3
  INTEL_80003ES2LAN_COPPER_DPT
  INTEL_80003ES2LAN_SERDES_DPT
  INTEL_80003ES2LAN_COPPER_SPT
  INTEL_80003ES2LAN_SERDES_SPT

 82571EB_COPPER dual ports,
 82572EI single port,
 82572EI_COPPER single port PCIE cards
 and
 82545EM_COPPER,
 82541GI_LF
 pci cards are tested on both  P2020 board
 and MPC8544DS board.

 Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-08 02:26:05 -07:00
Mike Frysinger
86848a74c3 net: sync env ethaddr to device enetaddr in eth_init()
In the previous enetaddr refactoring, the assumption with commit 56b555a644
was that the eth layer would handle the env -> device enetaddr syncing.
This was not the case as eth_initialize() is called only once and the sync
occurs there.  So make sure the eth_init() function does the env -> device
sync with every network init.

Reported-by: Andrzej Wolski <awolski@poczta.fm>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-07 17:39:23 -07:00
Robin Getz
0ebf04c607 minor debug cleanups in ./net
Minor ./net cleanups - no functional changes
  - change #ifdef DEBUG printf(); #endif to just debug()
  - changed __FUNCTION__ to __func__
  - got rid of extra whitespace between function and opening brace
  - removed unnecessary braces on if statements

 gcc dead code elimination should make this functionally/size equivalent
 when DEBUG is not defined. (confirmed on Blackfin, with gcc 4.3.3).

 Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-08-07 17:32:16 -07:00
Matthias Ludwig
187af954cf omap3: embedd gpmc_cs into gpmc config struct
Embedd chip select configuration into struct for gpmc config
instead of having it completely separated as suggested by
Wolfgang Denk on
http://lists.denx.de/pipermail/u-boot/2009-May/052247.html

Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
2009-08-07 23:31:51 +02:00
Wolfgang Denk
cb32ed1fc2 Merge branch 'next' of git://git.denx.de/u-boot-coldfire 2009-08-04 21:54:11 +02:00
David Brownell
06bffc6ea5 rm9200 lowevel_init: don't touch reserved/readonly registers
For some reason the AT91rm9200 lowlevel init writes to a bunch of
reserved or read-only addresses.  All the boards seem to define the
value-to-be-written values as zero ... but they shouldn't actually
be writing *anything* there.

No documented erratum justifies these accesses.  It looks like maybe
some pre-release BDI-2000 setup code has been carried along by cargo
cult programming since at least late 2004 (per GIT history).

Here's a patch disabling what seems to be bogosity.  Tested on a
csb337; there were no behavioral changes.

Signed-off-by: David Brownell <david-b@pacbell.net>

on RM9200ek
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-08-03 09:26:26 +02:00
David Hunter
301b7db88f pxa: Fix typo in GCDR(x)
Fix a typo in the GCDR(x) macro. It's a good thing no one was using it.

Signed-off-by: David Hunter <hunterd42@gmail.com>
2009-08-01 16:06:26 +02:00
Eric Benard
3c448e6482 Add AT91SAM9260 to at91's lowlevel_init.S
Needed for AT91SAM9260 NOR Boot on Eukrea's CPU9260.

Signed-off-by: Eric Benard <eric@eukrea.com>
2009-08-01 11:45:05 +02:00
Dirk Eibach
56bdfa9612 ppc4xx: Remove check for PPC460EX from CompactCenter
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-30 14:15:25 +02:00
Stefan Roese
c3fa4f0c86 ppc4xx: Add support for PPC460EX/460GT rev B chip to AMCC Canyonlands
This patch is based on a diff created by Phong Vo from AMCC.

Signed-off-by: Phong Vo <pvo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-30 07:22:18 +02:00
Stefan Roese
89bcc48750 ppc4xx: Add basic support for AMCC PPC460EX/460GT rev B chips
This patch is based on a diff created by Phong Vo from AMCC.

Signed-off-by: Phong Vo <pvo@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-30 07:22:18 +02:00
Stefan Roese
82a7edc7ea ppc4xx: Canyonlands-NAND-boot: Support 2 Crucial 512MByte SODIMM's
Some Canyonlands boards are equipped with different SODIMM's. This is no
problem with the "normal" NOR booting Canyonlands U-Boot, since it
automatically detects the SODIMM's via SPD data and correctly configures
them. But the NAND booting version is different. Here we only have 4k
of image size to completely setup the hardware, including DDR2 setup.
So we need to use a fixed DDR2 setup here. This doesn't work for different
SODIMM's right now.

Currently only this Crucial SODIMM is support:
CT6464AC667.8FB (dual ranked)

Now some boards are shipped with this SODIMM:
CT6464AC667.4FE (single ranked)

This patch now supports both SODIMM's by configuring first for the dual
ranked DIMM. A quick shows, if this module is really installed. If this test
fails, the DDR2 controller is re-configured for the single
ranked SODIMM.

Tested with those SODIMM's:

CT6464AC667.8FB (dual ranked)
CT6464AC667.4FE (single ranked)

Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-30 07:22:18 +02:00
Stefan Roese
27dd5f8e10 ppc4xx: amcc: Move "kernel_addr_r" etc to higher locations (> 16MB)
This patch moves the load addresses for kernel, fdt and ramdisk to higher
addresses (>= 16MB). This enables booting of bigger kernel images (e.g.
lockdep enabled).

Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-30 07:22:18 +02:00
Stefan Roese
6942efc2be ppc4xx: amcc: Set CONFIG_SYS_BOOTMAPSZ to 16MB for big kernels
This patch changes CONFIG_SYS_BOOTMAPSZ from 8MB to 16MB which is the
initial TLB on 40x PPC's in the Linux kernel. With this change even bigger
Linux kernels (> 8MB) can be booted.

This patch also sets CONFIG_SYS_BOOTM_LEN to 16MB (default 8MB) to enable
decompression of bigger images.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-30 07:22:18 +02:00
Heiko Schocher
901be89a27 83xx, kmeter1, fix: update in the DTS the correct size for the first flash
When updating the "reg" in the "/localbus/flash@f0000000,0" node
size was wrong updated for the first flash, because the total
size was filled in, instead of the right size for it.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-29 18:46:23 -05:00
Wolfgang Denk
108f56b056 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2009-07-30 00:36:25 +02:00
Kumar Gala
4c2e3da82d Update Freescale copyrights to remove "All Rights Reserved"
"All Rights Reserved" conflicts with the GPL.

Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
2009-07-29 09:59:22 +02:00
Alessandro Rubini
bb4291e625 arm nomadik: add i2c
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-07-29 09:57:47 +02:00
Alessandro Rubini
60cbfbfd0f arm nomadik: add gpio support
Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-07-29 09:57:46 +02:00
Tom Rix
549b98306d OMAP3 Remove twl4030 defines
These defines have been subplanted by the equivelent defines in
include/twl4030.h

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
2009-07-29 09:57:45 +02:00
Tom Rix
fccc0fcaaa OMAP3 Move twl4030 mmc function
Because twl4030 now has its own device files, move and rename
twl4030_mmc_config.

twl4030_mmc_config initializes the twl4030 power setting to
the mmc device.  Because it is in the twl4030 power domain, move
it out of drivers/mmc/omap3_mmc.c and into drivers/power/twl4030.c.

The function was renamed to twl4030_power_mmc_init because all
the functions in this file are to have the format

twl4030_power_<device>_<action>

In this case the suffix is mmc_init so
device : mmc
action : init

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
2009-07-29 09:57:43 +02:00
Tom Rix
2c15513010 OMAP3 Move twl4030 power and led functions
Because twl4030 now has its own device files, move exiting
omap3 power_init_r to a new location.

power_init_r is the only function in board/omap3/common.
It initializes the twl4030 power for the board and enables
the led.

The power part of the the function is moved to twl4030_power_init in
drivers/power/twl4030.c The power compilation is conditional on the
existing config variable CONFIG_TWL4030_POWER.

The led part is moved to twl4030_led_init in the new file
drivers/misc/twl4030_led.c  The led compilation is conditional on
the new config variable CONFIG_TWL4030_LED

The directory board/omap3/common was removed because power_init_r
was the only function in it.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
2009-07-29 09:57:30 +02:00
Wolfgang Denk
d7b0781e2b Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2009-07-29 09:25:52 +02:00
Wolfgang Denk
03a14104f1 Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2009-07-29 09:15:36 +02:00
Wolfgang Denk
3cb7a4805f TQM8xx* boards: set larger SMC Rx buffer len
Commit 2b3f12c2 added support for configurable SMC Rx buffer length on
8xx systems. Enable this feature on TQM8xx* based boards.

This fixes the problem that pasting text in the middle of a line
(i. e. inserting in edit mode) did not work - only the first two
characters got inserted, the rest was lost.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-28 22:39:04 +02:00
Wolfgang Denk
4b7511478b Fix ext2load return code
Make the ext2load command return 0 on success (instead of the file
length).

Also fix output format (get rid of random newlines) and some coding
style issues (long lines etc.).

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-28 22:38:53 +02:00
Weirich, Bernhard
56fdaadc12 ext2: fix inode size and calculations
Signed-off-by: unsik Kim <donari75@gmail.com>
Signed-off-by: Bernhard Weirich <bernhard.weirich@riedel.net>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Wolfgang Denk <wd@denx.de>
2009-07-28 22:38:17 +02:00
Tom Rix
cd7826359e TWL4030 Add power reset button
The Zoom2 power reset button is on the top right side of the
main board.  Press and hold for about to 8 seconds to completely
reset the board.

Some of the beta boards have a hardware problem that prevents
using this feature.  If is difficult to further characterize the
boards that fail.  So disable resetting for all beta boards.

The Zoom1 reset button is the red circle on the top right,
front of the board.  Press and hold the button for 8 seconds to
completely reset the board.

After analyzing beagle, it was determined that other boards
that use the twl4030 for power managment can also make use
this function.

The resetting is done by the power management part of the twl4030.
Since there is no existing drivers/power, add one.

The compilation of power/twl4030.h is controlled by the config
variable CONFIG_TWL4030_POWER

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
2009-07-28 08:56:31 +02:00
Tom Rix
8966eb4c1c TWL4030 Add initial support
The TWL4030 supplies many peripherals for OMAP3 boards. These include
power management, usb and, keyboard.

The product description is found here:

http://focus.ti.com/docs/prod/folders/print/tps65950.html

Product reference document, tps65950.pdf, is found here:

http://www.ti.com/lit/gpn/tps65950

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
2009-07-28 08:55:39 +02:00
Tom Rix
7f79dfb48b OMAP I2C Fix the sampling clock.
This problem is seen on Zoom1 and Zoom2 in the startup and
when i2c probe is used

Before :

In:    serial
Out:   serial
Err:   serial
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_pin: I2C_STAT=1000
I2C read: I/O error
timed out in wait_for_bb: I2C_STAT=1000
timed out in wait_for_bb: I2C_STAT=1000
Die ID #327c00020000000004013ddd05026013
Hit any key to stop autoboot:  0
OMAP3 Zoom1# i2c probe
Valid chip addresses:timed out in wait_for_bb: I2C_STAT=1000
 02 03 04 05 06 07 08 09 0A 0B 0C 0D <snip>

After :

In:    serial
Out:   serial
Err:   serial
Die ID #327c00020000000004013ddd05026013
Hit any key to stop autoboot:  0
OMAP3 Zoom1# i2c probe
Valid chip addresses: 48 49 4A 4B

The addresses are for the twl4030.

The prescalar that converts the function clock to the sampling
clock is hardcoded to 0.  The reference manual recommends 7
if the function clock is 96MHz.

Instead of just changing the hardcoded values, the prescalar
is calculated from the value I2C_IP_CLK.

The i2c #defines are in kHz.  The speed passed into the
i2c init routine is in Hz.  To be consistent, change the
defines to be in Hz.

The timing calculations are based on what is done in the
linux 2.6.30 kernel in drivers/i2c/buses/i2c_omap.c as
apposed to what is done in TRM.

The major variables in the timing caculations are
specified as #defines that can be overriden as required.

The variables and their defaults are

I2C_IP_CLK				SYSTEM_CLOCK_96
I2C_INTERNAL_SAMPLING_CLK		19200000
I2C_FASTSPEED_SCLL_TRIM			6
I2C_FASTSPEED_SCLH_TRIM			6
I2C_HIGHSPEED_PHASE_ONE_SCLL_TRIM	I2C_FASTSPEED_SCLL_TRIM
I2C_HIGHSPEED_PHASE_ONE_SCLH_TRIM	I2C_FASTSPEED_SCLH_TRIM
I2C_HIGHSPEED_PHASE_TWO_SCLL_TRIM	I2C_FASTSPEED_SCLL_TRIM
I2C_HIGHSPEED_PHASE_TWO_SCLH		I2C_FASTSPEED_SCLH_TRIM

This was runtime verified on Zoom1, Zoom2, Beagle and Overo.
The 400kHz and 3.4M cases were verifed on test Zoom1,
Zoom2, Beagle and Overo configurations.

Testing for omap2 will be done in a second step as Nishanth
and Jean-Christophe commented.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Heiko Schocher <hs@denx.de>
2009-07-28 08:52:33 +02:00
Heiko Schocher
4ce5a72851 arm, i2c: added support for the TWSI I2C Interface
Signed-off-by: Heiko Schocher <hs@denx.de>
2009-07-28 08:20:58 +02:00
Stefan Roese
042d01c72e ppc4xx: Fix problem with NOR range assignment in Canyonlands ft_board_setup
This patch fixes the problem, that the current fdt board fixup code only
set's one range, the one for NOR. By this it's overwriting the already
correctly configured values done in __ft_board_setup(). Just remove this
now unneeded NOR fixup and all the ranges are correctly defined.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dirk Eibach <eibach@gdsys.de>
Cc: Felix Radensky <felix@embedded-sol.com>
2009-07-28 07:26:07 +02:00
Stefan Roese
11a1604f8d ppc4xx: Add some NAND-booting bootstrap entries to Kilauea chip_config cmd
This patch adds some I2C bootstrap setting for NAND booting to the Kilauea
chip_config command ("533-nand" and "600-nand").

Additionally some incorrectly indented lines are fixed.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-28 07:24:01 +02:00
Stefan Roese
5b34691ff8 ppc4xx: Kilauea: Fix SDRAM init in NAND booting version
DDR2 Auto-calibration needs to be disabled on the NAND booting PPC4xx
targets. Otherwise the configured fixed init values for some DDR2
controller registers (e.g. RQDC) are not initialized at all resulting
in a non working SDRAM.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-28 07:23:54 +02:00
Stefan Roese
f3ed3c9b74 ppc4xx: Fix Arches DDR2 initialization
Testing on AMCC Arches with the latest U-Boot version yielded that DDR2
initialization is currently broken. U-Boot hangs upon relocation to SDRAM
or crashes with random traps. This patch fixes this problem. Arches now
uses a different WRDTR and CLKTR default setting than Canyonlands/Glacier.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-28 07:22:46 +02:00
Dirk Eibach
ab4c62c1ba ppc4xx: Add GDsys CompactCenter board support.
Board support for the Guntermann & Drunck CompactCenter and
DevCon-Center.
Based on the AMCC Canyonlands board support by Stefan Roese.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-28 07:20:34 +02:00
Reinhard Arlt
c2e49f706b mpc83xx: Add esd VME8349 board support
This patch adds support for the esd VME8349 board equipped with the
MPC8349. It's a VME PMC carrier board equipped with the Tundra
TSI148 VME-bridge.

Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-27 18:36:36 -05:00
Paul Gortmaker
fe613cdd4e sbc8349: combine HRCW flash and u-boot image flash
Up to this point in time, the sbc8349 board was storing the u-boot
image in flash 2x.  One for the HRCW value at the beginning of
flash (0xff80_0000), and once close to the end of flash (0xfff8_0000)
for the actual image that got executed.

This moves the TEXT_BASE to be the beginning of flash, which makes
the second copy of the image redundant, and frees up the flash
from the end of the environment storage to the end of the flash
device itself.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-27 18:35:53 -05:00
Kim Phillips
be9b56df02 mpc83xx: CONFIG_83XX_GENERIC_PCI is now synonymous with CONFIG_PCI; remove the former
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-27 10:17:54 -05:00
Wolfgang Denk
94978e19f3 Prepare 2009.08-rc1 (again, after fixing last minute issues).
Update CHANGELOG

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-27 10:37:37 +02:00
Wolfgang Denk
9689ddcca6 cpu/arm920t/start.S: include <common.h> to have ROUND() defined
Commit fcd3c87e made include/common.h usable by assembler code but
failed to update cpu/arm920t/start.S

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-27 10:06:39 +02:00
Wolfgang Denk
c9ed38cb6d at91cap9adk: fix #ifdef/#endif pairing (2nd try)
Commit 7024aa14 was supposed to fix the #ifdef/#endif pairing in
include/configs/at91cap9adk.h, but did not cate all problems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-27 10:01:11 +02:00
Wolfgang Denk
fb364bec5f Fix include/common.h for boards with CONFIG_STATUS_LED
The reordering of include/common.h by commit fcd3c87e49 broke
boards with status LED support, resulting in
	error: #error Status LED configuration missing
errors. Undo this reordering to avoid this issue.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-27 09:58:14 +02:00
Wolfgang Denk
942828a098 ABI: fix build problems due to now needed div64 routine.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-27 09:19:15 +02:00
Wolfgang Denk
85d6bf0bdc PMC405DE: fix out of tree building
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-27 08:50:59 +02:00
Wolfgang Denk
10c7604d02 Prepare 2009.08-rc1
Update CHANGELOG, minor coding style fix.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-27 00:24:55 +02:00
rhabarber1848@web.de
fafbb2c3e4 add WATCHDOG_RESET to allow LZMA kernel decompression on slow machines
Signed-off-by: rhabarber1848@web.de
2009-07-27 00:16:36 +02:00
Niklaus Giger
3c972849f2 Less verbose output when loading vxworks 6.x images
Loading vxWorks 5.x images resulted just into 3 or 4 lines of output.
With vxWorks 6.x and the new GCC it emits about 30 lines, which is
far too noisy in my opinion.

Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org>
2009-07-27 00:15:53 +02:00
Wolfgang Denk
fcd3c87e49 Make include/common.h usable by assembler code
Commit 70ebf316 factored out the ROUND() macro into include/common.h,
not realizing that the primary use of this macro on AT91 systems was
in start.S where common.h was not included, and could not be included
because it contains a lot of C code which the assembler doesn't
understand.

This patch wraps such code in common.h in a "#ifndef __ASSEMBLY__"
construct, and then adds an include to cpu/arm926ejs/start.S thus
solving the problem.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-27 00:12:32 +02:00
Heiko Schocher
deec15b306 arm: add _lshrdi3.S
Signed-off-by: Heiko Schocher <hs@denx.de>
2009-07-27 00:11:37 +02:00
Wolfgang Denk
52b1bf2c5c Make linking against libgcc configurable
Many (especially ARM) tool chains seem to come with broken or
otherwise unusable (for the purposes of builing U-Boot) run-time
support libraries `libgcc.a'. By using the "USE_PRIVATE_LIBGCC"
setting we allow to use alternative libraries instead.

"USE_PRIVATE_LIBGCC" can either be set as an environment variable in
the shell, or as a command line argument when running "make", i. e.
	$ make USE_PRIVATE_LIBGCC=yes
or
	$ USE_PRIVATE_LIBGCC=yes
	$ export USE_PRIVATE_LIBGCC
	$ make

The value of "USE_PRIVATE_LIBGCC" is the name of the directory which
contains the alternative run-time support library `libgcc.a'. The
special value "yes" selects the directory $(OBJTREE)/lib_$(ARCH) .

Note that not all architectures provide an alternative `libgcc.a' in
their lib_$(ARCH) directories - so far, only ARM does.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Stefan Roese <sr@denx.de>
2009-07-27 00:11:32 +02:00
Dirk Behme
479105065d Use do_div from div64.h for vsprintf
Use do_div from div64.h for vsprintf in case of 64bit division.
For 32bit division, do_div from div64.h can't be used as it
needs a 64bit parameter.

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Stefan Roese <sr@denx.de>
CC: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-07-27 00:10:12 +02:00
Kyungmin Park
4828779238 Fix compiler warnings after loff_t change
Now 'env_addr' type is loff_t so use correct field type.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2009-07-27 00:08:50 +02:00
Wolfgang Denk
9c67352f72 Revert "ppc: Unlock cache-as-ram in a consistent manner"
This reverts commit 982adfc610.

This patch causes problems on MPC83xx boards - flash recognition stops
working.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-26 23:28:02 +02:00
Wolfgang Denk
8bf7437c01 Merge branch 'master' of git://git.denx.de/u-boot-video 2009-07-26 23:15:57 +02:00
Wolfgang Denk
e149128874 Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2009-07-26 22:57:11 +02:00
Wolfgang Denk
4e37963af7 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2009-07-26 22:54:23 +02:00
Wolfgang Denk
2050826982 Merge branch 'master' of git://git.denx.de/u-boot-usb 2009-07-26 22:44:27 +02:00
Jens Scharsig
35cf3b57ea update the EB+MCF-EV123 board support
This patch updates the support for EB+MCF-EV123 board and needs
the [PATCH 1/2 V3] new video driver for bus vcxk framebuffers

* remove the board framebuffer driver
* use the common bus_vcxk framebuffer driver
* adds bmp support
* adds splashimage support
* fix serveral cosmetical errors

Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
[agust@denx.de: fixed some style issues before applying]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2009-07-26 13:19:23 +02:00
Anatolij Gustschin
04538cdb75 video: bus_vcxk.c: fix style issues added by 50217dee
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2009-07-26 13:18:43 +02:00
Jens Scharsig
50217deeb0 new video driver for bus vcxk framebuffers
This patch adds a new video driver

* adds common bus_vcxk framebuffer driver

Signed-off-by: Jens Scharsig <esw@bus-elektronik.de>
[agust@denx.de: fixed lots of style issues before applying]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2009-07-26 13:17:21 +02:00
Alessandro Rubini
60e9741924 lcd.h: define extern vidinfo_t for all cases
include/lcd.h has different vidinfo for different platforms,
and several extern declaration, but one for the default case was
missing. This makes them a single extern declaration for everyone.

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
2009-07-26 13:16:50 +02:00
Anatolij Gustschin
bcf0b52489 mimc200.c: fix too long lines added by f68378d6
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2009-07-26 13:16:28 +02:00
Mark Jackson
f68378d60a Add LCD support to MIMC200 board
This patch updates the MIMC200 files to enable the LCD.

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
2009-07-26 13:14:33 +02:00
Mark Jackson
69f32e6c24 Add 16bit colour support in lcd.h
This patch adds support for LCD_COLOR16 in include/lcd.h.

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
2009-07-26 13:14:14 +02:00
Anatolij Gustschin
bdc873ea06 lib_avr32/board.c: fix too long line added by 716ece1d
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2009-07-26 13:13:28 +02:00
Mark Jackson
716ece1de9 Add AVR32 LCD support
This patch adds support for the AVR32 LCD controller.  This patch is
based off the latest u-boot-video.

A quick summary of what's going on:-

Enable LCDC pixel clock
Enable LCDC port pins
Add framebuffer pointer to global_data struct
Allocate framebuffer

To use the new code, update your board config to include something like
this:-

#define CONFIG_LCD			1

#if defined(CONFIG_LCD)
#define CONFIG_CMD_BMP
#define CONFIG_ATMEL_LCD		1
#define LCD_BPP				LCD_COLOR16
#define CONFIG_BMP_16BPP		1
#define CONFIG_FB_ADDR			0x10600000
#define CONFIG_WHITE_ON_BLACK		1
#define CONFIG_VIDEO_BMP_GZIP 		1
#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE		262144
#define CONFIG_ATMEL_LCD_BGR555		1
#define CONFIG_SYS_CONSOLE_IS_IN_ENV	1
#define CONFIG_SPLASH_SCREEN		1
#endif

The standard U-Boot BMP and Splash-screen features should just work.

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
[agust@denx.de: fixed some style issues]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2009-07-26 13:12:02 +02:00
Alessandro Rubini
6111722a92 video: move extern declarations from C to headers
This moves some extern declaration from lcd.c to lcd.h, removing
unneeded ifdef around a pair of them.  Additionally, since
gunzip_bmp() was declared static in cmd_bmp.c but extern in lcd.c, I
removed the static.  The extra "#include <lcd.h>" in cmd_bmp.c is
added to ensure the header is consistent with the source.

This has been compile-tested on both ARM (at91 boards) and PowerPC
(HH405_config, TQM823L_LCD_config, mcc200_config), to test all use
combinations.

Signed-off-by: Alessandro Rubini <rubini@gnudd.it>
[agust@denx.de: removed gunzip_bmp() fixes as commit c01171ea did it]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2009-07-25 23:13:51 +02:00
Mike Frysinger
f51e001143 Blackfin: restore EVT1 handling in linker script
Sadly, the Blackfin linker script unification lost a small #ifdef logic
needed on older parts.  Restore that CONFIG_BFIN_BOOTROM_USES_EVT1 logic.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-24 14:05:04 -04:00
Wolfgang Denk
f33b325af6 Revert "zlib: updated to v.1.2.3"
This reverts commit b201171f2b.

The commit caused problems for example when unpacking kernel images:

	   Uncompressing Kernel Image ... Error: inflate() returned -2
	   GUNZIP: uncompress, out-of-mem or overwrite error - must
	   RESET board to recover

Conflicts:

	include/u-boot/zlib.h
	lib_generic/zlib.c

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-24 14:24:07 +02:00
Stefan Roese
4b1389e0ce ppc4xx: Add chip_config command to AMCC Kilauea eval board
This patch removes the "alterpll" command and replaces it with the now
ppc4xx standard "chip_config" command to configure the I2C bootstrap
EEPROM.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 09:56:40 +02:00
Stefan Roese
f6af8ce0c8 ppc4xx: Fix EEPROM configuration on Kilauea
Kilauea has an AT24C02 EEPROM which has an 8 byte page. Without defining
CONFIG_SYS_EEPROM_PAGE_WRITE_BITS to 3 the "eeprom" command doesn't
work correctly.

Additionally the page write delay (CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS)
is set to a more defensive value of 10ms.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 09:56:18 +02:00
Matthias Fuchs
99d8b23bc7 ppc4xx: Add 405EP based PMC405DE board
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:47:40 +02:00
Matthias Fuchs
da799f66ad ppc4xx: Add struct for 4xx GPIO controller registers
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:47:33 +02:00
Matthias Fuchs
58ea142fb2 ppc4xx: Replace 4xx lowercase SPR references
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:47:17 +02:00
Stefan Roese
87c0b72908 Add "chip_config" command for PPC4xx bootstrap configuration
This patch adds a generic command for programming I2C bootstrap
eeproms on PPC4xx. An implementation for Canyonlands board is
included.

The command name is intentionally chosen not to be PPC4xx specific.
This way other CPU's/SoC's can implement a similar command under
the same name, perhaps with a different syntax.

Usage on Canyonlands:

=> chip_config
Available configurations (I2C address 0x52):
600-nor          - NOR  CPU: 600 PLB: 200 OPB: 100 EBC: 100
600-nand         - NAND CPU: 600 PLB: 200 OPB: 100 EBC: 100
800-nor          - NOR  CPU: 800 PLB: 200 OPB: 100 EBC: 100
800-nand         - NAND CPU: 800 PLB: 200 OPB: 100 EBC: 100
1000-nor         - NOR  CPU:1000 PLB: 200 OPB: 100 EBC: 100
1000-nand        - NAND CPU:1000 PLB: 200 OPB: 100 EBC: 100
1066-nor         - NOR  CPU:1066 PLB: 266 OPB:  88 EBC:  88 ***
1066-nand        - NAND CPU:1066 PLB: 266 OPB:  88 EBC:  88
=> chip_config 600-nor
Using configuration:
600-nor          - NOR  CPU: 600 PLB: 200 OPB: 100 EBC: 100
done (dump via 'i2c md 52 0.1 10')
Reset the board for the changes to take effect

Other 4xx boards will be migrated to use this command soon
as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
2009-07-24 06:42:32 +02:00
Peter Tyser
10c1b21855 xpedite1k: Move to X-ES vendor directory
The XPedite1000 is an X-ES product thus it can be put in board/xes along
with other X-ES boards.  Along with the move, the board was renamed to
XPedite1000 from XPedite1K to fit X-ES's standard naming convention.
Maintainership was also transfered to Peter Tyser.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:32 +02:00
Peter Tyser
54381b79d2 xpedite1k: Sync checkboard() with other X-ES boards
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:32 +02:00
Peter Tyser
9b4ef1f5dc xpedite1k: Sync up board config options with other X-ES boards
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:32 +02:00
Peter Tyser
4cdad5f43a xpedite1k: Sync organization of board config with other X-ES boards
This change should have no functional effect

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:32 +02:00
Peter Tyser
c4ae1a0257 xpedite1k: Sync up commands and environment with other X-ES boards
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:32 +02:00
Peter Tyser
fbc7951ea8 xpedite1k: Disable unused ethernet port 1
The XPedite1000 only has 2 available ethernet ports:
ppc_4xx_eth2 (EMAC2) and ppc_4xx_eth3 (EMAC3)

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:32 +02:00
Peter Tyser
767e32ad36 xpedite1k: Store environment in flash
Previously an I2C EEPROM was used.  The EEPROM had size, reliability,
and access issues which are resolved by storing the environment in
flash.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:32 +02:00
Peter Tyser
b88da157f9 xpedite1k: Add support for additional GPIO pins
Enable GPIO pins for an I2C EEPROM write protect, a system reset pin,
and a PMC #MONARCH pin.  These pins are not currently used in U-Boot,
but are used in OSes and may be used in U-Boot in the future.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:32 +02:00
Peter Tyser
42735815dd xpedite1k: Add support for optional flashes
The XPedite1000 can be built with 4 total flashes:
- 512KB AMD socketed
- 16MB Intel soldered
- 2 x 32MB AMD MirrorBit flashes

Add support for the optional 2 32MB CFI-compliant AMD flashes

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:32 +02:00
Peter Tyser
e02990764c xpedite1k: Cleanup coding style
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:32 +02:00
Peter Tyser
086ff34a3a xpedite1k: Remove support for reading MACs from EEPROM
By default, the XPedite1000 comes installed with xMon, a proprietary
bootloader.  xMon stores its MAC address in an onboard EEPROM.  Rather
than requiring a non-standard location in the EEPROM to be reserved for
MAC addresses, store the MAC addresses in U-Boot's standard environment.
A U-Boot application or OS application can be used to migrate xMon MAC
addresses to U-Boot's environment if necessary.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:32 +02:00
Peter Tyser
108d6d0099 xpedite1k: Remove support for fixed SDRAM configuration
All XPedite1000's have SPD EEPROMs present and no fixed configuration
parameters are currently defined or used

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:31 +02:00
Peter Tyser
c86d00a2ed xpedite1k: Remove CONFIG_SYS_DRAM_TEST support
POST or command line tests provide similar functionality

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:31 +02:00
Peter Tyser
11ad309c18 xpedite1k: Use standard CFI flash driver
Using the CFI flash driver will allow write access to the 16MB Intel
StrataFlash present on the XPedite1000.  The 512KB socketed (non
CFI-compliant flash) will no longer be writable.

The mapping of the 16MB Strata flash was moved to 0xff000000 and the
512KB AMD socketed flash was moved to 0xfe000000.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:31 +02:00
Matthias Fuchs
d4d2e79bb4 ppc4xx: Cleanup PLU405 board code
Some Coding style cleanup (braces, whitespaces, long lines)

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:31 +02:00
Dirk Eibach
b209a11482 ppc4xx: Add DL-Vision 405EP board support
Board support for the Guntermann & Drunck DL-Vision.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:31 +02:00
Dirk Eibach
9b1b8c8a1b ppc4xx: Fix missing freqOPB for 405EP
In cpu/ppc4xx/speed.c initialization of sysInfo->freqOPB for 405EP was
left out for no obvious reason.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-24 06:42:31 +02:00
Stefan Roese
0a371ca089 ppc4xx: Fix TLB reset problem with recent 44x images
Patch d873133f [ppc4xx: Add Sequoia RAM-booting target] broke "normal"
booting on some 44x platforms. This breakage is only noticed in some
cases while powercycling. As it seems, the code in question in start.S
didn't invalidate TLB #0. This makes sense since this TLB is used for
the bootrom mapping. With the patch mentioned above even TLB #0 got
invalidated resulting in an error later on.

This patch now fixes this issue by only invalidating TLB #0 in the RAM-
booting case.

Tested succesfully on Sequoia and Canyonlands.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Dirk Eibach <Eibach@gdsys.de>
2009-07-24 06:42:31 +02:00
Prafulla Wadaskar
44259bb9e6 usb: bugfix driver/usb/host/ehci-hcd.c function ehci_submit_root
This change is cheked in Linux source and fix found to be in sync.
This patch is tested for USB host interface on Kirkwood based
Sheevaplug platform (ARM little endian board)

Risk: the impact of this patch is not validated on big endian board.
This need to be checked...

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-07-23 23:27:06 +02:00
Wolfgang Denk
28958b8bea Coding Style cleanup; update CHANGELOG.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-23 22:23:23 +02:00
Mike Frysinger
2632c008e2 autoconf.mk: include before config.mk for top level files
By including autoconf.mk before config.mk, all top level files can use any
config options it sets up (like <arch>_config.mk) or the Makefile itself
without being forced to use lazy evaluation.
2009-07-23 21:44:07 +02:00
Mark Jackson
c01171eaec Remove static declaration from gunzip_bmp()
This patch removes the static declaration from gunzip_bmp()

Without it, the gunzip_bmp() function is not visible to
common/lcd.c and fails to compile with an error.

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
2009-07-23 21:34:01 +02:00
Peter Tyser
2d4a43e230 cmd_tsi148: General cleanup
- Fix command help message
- Disable DEBUG by default
- Fix whitespace issues
- Fix lines > 80 characters

Signed-off-by: Peter Tyser <ptyser@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
2009-07-23 21:33:02 +02:00
Mike Frysinger
9aef738885 unify HOST_CFLAGS and HOSTCFLAGS
The top build system sets up HOSTCFLAGS a bit and exports it, but other
places use HOST_CFLAGS instead.  Unify the two as HOSTCFLAGS so that the
values stay in sync.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-23 21:26:14 +02:00
Wolfgang Denk
2e9393f500 Update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-23 21:16:59 +02:00
André Schwarz
e3b39f84e9 update config for mvBC-P (MPC5200)
This patch adds I2C support for mvBC-P and defines flash layout
matching the shipped product.

Signed-off-by: Andr Schwarz <andre.schwarz@matrix-vision.de>
2009-07-23 21:12:41 +02:00
Kumar Gala
cb6d0b72c2 ahci: Fix gcc 4.4 compiler warning
ahci.c: In function 'ata_scsiop_read_capacity10':
ahci.c:616: warning: dereferencing type-punned pointer will break strict-aliasing rules

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-23 21:04:58 +02:00
Kumar Gala
51d91e1a25 drivers/bios_emulator: Fix gcc 4.4 compiler warning
biosemu.c: In function 'BE_setVGA':
biosemu.c:147: warning: dereferencing type-punned pointer will break strict-aliasing rules

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-23 21:03:33 +02:00
Detlev Zundel
f97ec30bb3 Re-add support for image type 'Standalone Program'
Support for this type was lost during the bootm refactoring.

Signed-off-by: Detlev Zundel <dzu@denx.de>
2009-07-23 21:02:09 +02:00
Detlev Zundel
ca95c9df02 Add error checking for unsupported OS types.
Signed-off-by: Detlev Zundel <dzu@denx.de>
2009-07-23 21:02:07 +02:00
Peter Tyser
982adfc610 ppc: Unlock cache-as-ram in a consistent manner
Previously, non-e500 architectures only unlocked their data cache which
was used as early RAM when booting to Linux using the "bootm" command.
This change causes all PPC boards with CONFIG_SYS_INIT_RAM_LOCK defined
to unlock their data cache during U-Boot's initialization.  This
improves U-Boot performance and provides a common cache state when
booting to different OSes.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-07-23 20:45:49 +02:00
Wolfgang Denk
4fb799aeaf Merge branch 'master' of git://git.denx.de/u-boot-net 2009-07-23 19:20:26 +02:00
Giuseppe CONDORELLI
b201171f2b zlib: updated to v.1.2.3
This patch updates zlib to the latest stable version.

Only relevant zlib parts were ported to u-boot tree, as was done for
the previously used version of zlib (0.95). New zlib gives faster
inflate performance and other improvements, see www.zlib.net

Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>
Reviewed-by: Angelo Castello <angelo.castello@st.com>

Edited commit message

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-23 19:12:55 +02:00
Robin Getz
97cfe86163 Save server's MAC address in environment
Linux's netconsole works much better when you can pass it the MAC address of
the server. (otherwise it just uses broadcast, which everyone else on my
network complains about :)

This sets the env var "serveraddr" (to match ethaddr), so that you can pass
it to linux with whatever bootargs you want to....

addnetconsole=set bootargs $(bootargs) netconsole=@$(ipaddr)/eth0,@$(serverip)/$(serveraddr)

Signed-of-by: Robin Getz <rgetz@blackfin.uclinux.org>

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-22 23:17:01 -07:00
Ilya Yanok
0b23fb368d fec_mxc: driver for FEC ethernet controller on i.MX27
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-22 22:59:07 -07:00
Alessio Centazzo
0544c63681 ppc4xx: Fixed compilation warning in 4xx_enet.c
This patch fixes a compilation warning for some Ethernet PHY-less
PPC4xx platforms (440SPE based ones) and a potential compilation
error for 440SP platforms (use of undefined 'ethgroup' variable).
In the original code and in case of 440SPE platforms, 'ethgroup'
is initialized to -1 and never modified.  Later in the function,
within an #ifdef statement, an 'if statement' executes code only
if 'ethgroup' is set to 4, therefore it is harmless to avoid
executing the 'if statement' by removing the CONFIG_440SPE from
the affected #ifdefs.  In case of 440SP platforms  with on-board
Ethernet PHY, 'ethgroup' is undefined but used (there are not such
platforms in the repository yet). All other architectures are not
affected by this change.

Signed-off-by: Alessio Centazzo acpatin@yahoo.com
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-22 22:53:45 -07:00
Michael Zaidman
09133f8580 DHCP regression on 2009-06
Fixed the DHCP/BOOTP/RARP regression introduced in u-boot-2009.06
by initializing our IP addr to 0 in order to accept any IP addr
assigned to us by the DHCP/BOOTP/RARP server.

Ack-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-22 22:53:45 -07:00
Prafulla Wadaskar
443ce4ac9d net: phy: bugfixes: mv88E61xx multichip addressing support
With these fixes, this driver works properly for multi chip
addressging mode

Bugfixes:
1. Build error fixed for function mv88e61xx_busychk_multic-fixed
2. PHY dev address error detection- fixed
3. wrong busy bit was refered in function mv88e61xx_busychk -fixed
4. invalid data read ptr was refered for RD_PHY in case of
	multichip addressing mode -fixed

The Multichip Address mode is tested with RD6281A board having
MV88E6165 switch on it

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-22 22:53:45 -07:00
Simon Kagstrom
16025ea455 arm: Kirkwood: Check the error summary bit for error detection
The Marvell documentation for the 88f6281 states that the error coding
is only valid if the error summary and last frame bits in the transmit
descriptor status field are set. This patch adds checks for these for
transmit (I would get transmit errors on bootp with the current check,
which I believe are spurious).

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-22 22:53:45 -07:00
Simon Kagstrom
7b05f5e027 arm: Kirkwood: Fix compiler optimization bug for kwgbe_send
kwgbe_send/recv both have loops waiting for the hardware to set  a bit.
GCC 4.3.3 cleverly optimizes the send case to ... a while(1); loop. This
patch uses readl to force a read from device memory. Other volatile
accesses have also been replaced with readl/writel where appropriate
(as per suggestions on the U-boot mailing list).

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-22 22:53:45 -07:00
Richard Retanubun
3f6b18ffd9 MIIPHYBB: Return 0xFFFF if the PHY is not asserting TA.
This patch sets the returned value to 0xFFFF if the PHY does not exist
and does not assert Transfer Acknowledge. A NULL check for the value
pointer is also added for buffer overflow protection.

Without this patch 'mii info' will  show 'phantom' devices because the
value will be not be initialized and return with some random value.

Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-22 22:53:44 -07:00
Ben Warren
736fead8fd Convert SMC911X Ethernet driver to CONFIG_NET_MULTI API
All in-tree boards that use this controller have CONFIG_NET_MULTI added
Also:
 - changed CONFIG_DRIVER_SMC911X* to CONFIG_SMC911X*
 - cleaned up line lengths
 - modified all boards that override weak function in this driver
 - added

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Tested-by: Mike Frysinger <vapier@gentoo.org>
2009-07-22 22:53:44 -07:00
Ben Warren
3bd0a877b7 Add warning about upcoming removal of old Ethernet API
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-22 22:53:44 -07:00
Poonam Aggrwal
b7fe25d2a8 P2020RDB Added support of Vitesse PHYs VSC8641(RGMII) and VSC8221(SGMII)
These PHYs are on P2020RDB platform.

Also revamped Freescale copyright message in drivers/net/tsec.c.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-22 22:53:44 -07:00
Robin Getz
1a32bf4188 Add DNS support
On 04 Oct 2008 Pieter posted a dns implementation for U-Boot.

http://www.mail-archive.com/u-boot-users@lists.sourceforge.net/msg10216.html
>
> DNS can be enabled by setting CFG_CMD_DNS. After performing a query,
> the serverip environment var is updated.
>
> Probably there are some cosmetic issues with the patch. Unfortunatly I
> do not have the time to correct these. So if anybody else likes DNS
> support in U-Boot and has the time, feel free to patch it in the main tree.

Here it is again - slightly modified & smaller:
  - update to 2009-06 (Pieter's patch was for U-Boot 1.2.0)
  - README.dns is added
  - syntax is changed (now takes a third option, the env var to store
    the result in)
  - add a random port() function in net.c
  - sort Makefile in ./net/Makefile
  - dns just returns unless a env var is given
  - run through checkpatch, and clean up style issues
  - remove packet from stack
  - cleaned up some comments
  - failure returns much faster (if server responds, don't wait for
    timeout)
  - use built in functions (memcpy) rather than byte copy.

Signed-off-by: Robin Getz <rgetz@blackfin.uclinux.org>
Signed-off-by: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-22 22:53:44 -07:00
Kim Phillips
88ad3fd91c net: tsec - fix dereferencing type-punned pointer will break strict-aliasing rules warning
fix this gcc 4.4 warning:

tsec.c: In function 'tsec_init':
tsec.c:200: warning: dereferencing type-punned pointer will break strict-aliasing rules

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-22 22:53:44 -07:00
Mike Frysinger
d9bec9f42a net: rename NetRxPkt to NetRxPacket
The net code is mostly consistent in using 'Packet' rather than 'Pkt', so
rename the minor detractor to follow suite.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-22 22:53:43 -07:00
Nobuhiro Iwamatsu
88a4c2e77c sh: sh_eth: Remove garbage from printf
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-22 22:53:43 -07:00
Andreas Pretzsch
2ea20efa47 smc911x: add support for LAN9221
Signed-off-by: Andreas Pretzsch <apr@cn-eng.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-22 22:53:43 -07:00
David Brownell
7168eba729 rm9200 ethernet driver: board-specific quirk (csb337)
CSB337 boards originally shipped with MicroMonitor, not U-Boot;
and with a version using a different convention for recording
Ethernet addresses than anyone else.  To avoid breaking Linux
when it uses U-Boot, have it use the same convention on that
hardware.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-22 22:39:23 -07:00
Wolfgang Denk
189eec7779 Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-07-23 01:00:17 +02:00
Wolfgang Denk
84efbf4d14 Merge branch 'master' of git://git.denx.de/u-boot-arm 2009-07-23 00:59:37 +02:00
Wolfgang Denk
faca03ca0e Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-07-23 00:57:21 +02:00
Wolfgang Denk
49a7720b21 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2009-07-23 00:57:18 +02:00
Wolfgang Denk
05c3734018 Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-07-23 00:52:30 +02:00
Wolfgang Denk
5a625149db Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2009-07-23 00:52:25 +02:00
Wolfgang Denk
46edbc545d Merge branch 'master' of /home/wd/git/u-boot/master/ 2009-07-23 00:48:20 +02:00
Heiko Schocher
57215cd2e5 arm, kirkwood: added kw_gpio_set_valid() in gpio.h
Signed-off-by: Heiko Schocher <hs@denx.de>
2009-07-23 00:20:33 +02:00
Dieter Kiermaier
ec16441085 Kirkwood: add Marvell Kirkwood gpio driver
Signed-off-by: Dieter Kiermaier <dk-arm-linux@gmx.de>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Tested-by: Heiko Schocher <hs@denx.de>
2009-07-23 00:19:28 +02:00
Heiko Schocher
688b6a0ff2 arm, kirkwood: added KW_TWSI_BASE in kirkwood.h
Signed-off-by: Heiko Schocher <hs@denx.de>
2009-07-23 00:16:18 +02:00
Prafulla Wadaskar
fbc8365ad7 Marvell RD6281A Board support
This is Marvell's 88F6281_A0 based reference design board

This patch is tested for-
1. Boot from DRAM/NAND flash/NFS
2. File transfer using tftp and loadb
3. NAND flash read/write/erase

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-07-23 00:14:40 +02:00
Piotr Ziecik
2906e6d654 api: Fix broken build on ARM.
This patch fixes broken build introduced by commit
84bf7ca522 (api: remove un-needed
ifdef CONFIG_API already handle by the Makefile).

Signed-off-by: Piotr Ziecik <kosmo@semihalf.com>
2009-07-23 00:10:53 +02:00
Wolfgang Denk
48677a1ef5 Fix "ld: cannot find -lstubs" build error
Commit 1bc15386 moved the examples/ to examples/standalone but failed
to adapt the Makefiles that need to link against libstubs.a

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-07-22 23:53:23 +02:00
Wolfgang Denk
ae71121a11 at91cap9adk: fix #ifdef/#endif pairing
The #ifdef/#endif pairing in this file was obviously messed up.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-22 23:51:52 +02:00
Minkyu Kang
6b96a20d51 ARM Cortex A8: Move OMAP3 specific reset handler
Because of the reset_cpu is soc specific, should be move to soc

Cc: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-07-22 23:39:42 +02:00
Kumar Gala
048e7efe91 85xx/86xx: Replace in8/out8 with in_8/out_8 on FSL boards
The pixis code used in8/out8 all over the place.  Replace it with
in_8/out_8 macros.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 10:16:55 -05:00
Peter Tyser
0a6d0c6320 xpedite5370: Enable NAND command support
Use the MPC8572's eLBC to access 1 GB (or greater) onboard NAND flash
via the 'nand' command.

Previously, the XPedite5370's NAND chip selects were properly
configured, but NAND support was not enabled.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 10:14:47 -05:00
Peter Tyser
39121c0896 xes: Increase CONFIG_SYS_BOOTM_LEN to 16MB
Increasing CONFIG_SYS_BOOTM_LEN from 8 MB to 16 MB is necessary to
support uncompressing images larger than 8 MB when using the bootm
command.

Note that recent Linux kernels for the 85xx and 86xx map greater than
16MB of memory on bootup, but we use 16MB to maintain compatibility with
older Linux kernels for now.

Signed-off-by: Nate Case <ncase@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 10:14:46 -05:00
Peter Tyser
58f31b602d xpedite5370: Fix I2C GPIO initialization typo
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Heiko Schocher<hs@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:43:49 -05:00
Peter Tyser
5ff821006c xpedite5200,5370: Use buffered NOR flash writes
Buffered writes are possible on the XPedite5200 and XPedite5370 and greatly
improve NOR flash write speeds

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:43:48 -05:00
Peter Tyser
d9c147f371 85xx, 86xx: Add common board_add_ram_info()
Previously, 85xx and 86xx boards would display DRAM information on
bootup such as:

...
I2C:   ready
DRAM:
Memory controller interleaving enabled: Bank interleaving!
 2 GB
FLASH: 256 MB
...

This patch moves the printing of the DRAM controller configuration to a
common board_add_ram_info() function which prints out DDR type, width,
CAS latency, and ECC mode.  It also makes the DDR interleaving
information print out in a more sane manner:

...
I2C:   ready
DRAM:   2 GB (DDR2, 64-bit, CL=4, ECC on)
       DDR Controller Interleaving Mode: bank
FLASH: 256 MB
...

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:43:48 -05:00
Peter Tyser
12a440ae6d tqm85xx: Remove board_add_ram_info()
This is in preparation for adding one common 8xxx board_add_ram_info()
function for all 8xxx boards

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:43:48 -05:00
Peter Tyser
ed2c9488bb xes: Remove 8xxx board_add_ram_info() function
This is in preparation for adding one common 8xxx board_add_ram_info()
fuction for all 8xxx boards

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:43:47 -05:00
Peter Tyser
e7ee23ec17 86xx: Rename ccsr_ddr's sdram_mode_1, sdram_cfg_1 fields
Rename sdram_mode_1 to sdram_mode and sdram_cfg_1 to sdram_cfg to match
the 86xx user's manual and other Freescale architectures

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:43:47 -05:00
Roy Zang
f6155c6fbb 85xx: Add pci/pcie E1000 ethernet support for MPC8544DS and MPC8536 boards
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:43:47 -05:00
Kumar Gala
6bb5b41229 85xx: Report which "bank" of NOR flash we are booting from on FSL boards
The p2020DS, MPC8536DS, MPC8572DS, MPC8544DS boards are capable of
swizzling the upper address bits of the NOR flash we boot out of which
creates the concept of "virtual" banks.  This is useful in that we can
flash a test of image of u-boot and reset to one of the virtual banks
while still maintaining a working image in "bank 0".

The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:42:22 -05:00
Kumar Gala
9af9c6bdc1 86xx: Report which "bank" of NOR flash we are booting from on MPC8641HPCN
The MPC8641HPCN board is capable of swizzling the upper address bit of
the NOR flash we boot out of which creates the concept of "virtual"
banks.  This is useful in that we can flash a test of image of u-boot
and reset to one of the virtual banks while still maintaining a
working image in "bank 0".

The PIXIS FPGA exposes registers on LBC which we can use to determine
which "bank" we are booting out of (as well as setting which bank to
boot out of).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-22 09:08:50 -05:00
Luigi 'Comio' Mantellini
caf72ff329 Refresh LZMA-lib to v4.65
Signed-off-by: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
2009-07-22 09:43:27 +02:00
Wolfgang Denk
70ebf31633 AT91: factor out ROUND() macro
A large number of boards (all AT91 based) duplicated the ROUND()
macro in their board specific config files. Add the definition to
include/common.h and clean up the board config files.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-22 09:30:31 +02:00
Kumar Gala
89188a6233 85xx: Bump up the BOOTMAP to 16M on FSL 85xx boards
We have always mapped at least 16M in the kernel and we have seen cases
with new kernel features that a kernel image needs more than 8M of
memory.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-21 09:02:40 -05:00
Peter Tyser
d4abc757c2 Move api_examples to examples/api
Also add a rule to remove demo.bin which was previously leftover
after a "make clean"

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-07-21 09:23:36 +02:00
Heiko Schocher
af1d7d984a 83xx, kmeter: fix compile error
CONFIG_SYS_MALLOC_LEN is defined in the board config, and
the keymile-common.h, which collects common options used
by all keymile-boards. This results in a compile error
when compiling the kmeter1 board. So remove this define
in the board config file.

Signed-off-by: Heiko Schocher <hs@denx.de>
2009-07-21 09:22:23 +02:00
Heiko Schocher
39df00d9ae i2c, mpc83xx: add CONFIG_SYS_I2C_INIT_BOARD for fsl_i2c
This patch adds the possibility to call a board specific
i2c bus reset routine for the fsl_i2c bus driver, and adds
this option for the keymile kmeter1 board.

The deblock sequence for this board is implemented and
tested in the following way:

CR = 0x20 (release SDA and SCL pin)
CR = 0xa0 (start read)
dummy read
dummy read
if 2. dummy read == 0x00
	3. dummy read

CR = 0x80 (SDA and SCL now 1 SR = 0x86)
CR = 0x00 (Modul reset SR=0x81)
CR = 0x80 (SDA and SCL = 1, SR = 0x81)

Signed-off-by: Heiko Schocher <hs@denx.de>
2009-07-21 07:06:26 +02:00
Peter Tyser
1bc1538613 Move examples/ to examples/standalone
The current files in examples are all standalone application examples,
so put them in their own subdirectory for organizational purposes

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-07-21 00:13:21 +02:00
Peter Tyser
b220c64d86 Move architecture specific config.mk files into subdirs
This cleans up U-Boot's toplevel directory a bit and makes the
architecture 'config.mk' file naming and location similar to board
and cpu 'config.mk' files

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-07-21 00:12:35 +02:00
Po-Yu Chuang
082becd0d5 Add "tags" to .gitignore file.
Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-21 00:10:21 +02:00
Heiko Schocher
dc71b248ef powerpc: updates for the keymile boards
- CONFIG_SYS_MAX_I2C_BUS changed to 1
  We use only one I2C hardwarecontroller on this boards, so
  change the CONFIG_SYS_MAX_I2C_BUS to 1.
- common: dont print errormsg if second IVM Block lacks.
- 82xx, mgcoge: fix double mtdpart entry in environment
- 82xx, mgcoge: activate on second Flash the second bank.
- common: CONFIG_ENV_SIZE 0x4000 for all keymile boards
- common: Change malloc size to 1MByte for all Keymile boards
    We need a bigger malloc area for the environment support (128k)
    on some Keymile boards (kmeter1) and the upcoming UBI support.
    Change it to 1MB for all Keymile boards to be on the save side.
    Also define CONFIG_SYS_64BIT_VSPRINTF which is needed for
    UBI/UBIFS support.
- Add UBI support to all Keymile boards
- change manner of writing "/localbus/ranges" node
    instead of writting the complete "/localbus/ranges" node
    before booting Linux, only update the ranges entries
    which gets dynamical detected (size of flashes).
    This is needed, because keymile adds in the DTS
    "/localbus/ranges" node entries, which u-boot must
    not overwrite/delete.
- kmeter, mgcoge: define 2 seperate regions needed for the Intel P30 chips
    The Intel P30 chip has 2 non-identical chips on
    one die, so we need to define 2 seperate regions
    that are scanned by physmap_of independantly.
- kmeter1: Add MTD concat support to Keymile boards
- 82xx, mgcoge: add "unlock=yes" to default environment
- added CONFIG_MTD_DEVICE to get in sync with mainline code

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-21 00:06:11 +02:00
galak
f14d81050a fsl_sata: Fix compiler warnings shown by gcc-4.4
Update fsl_sata to use common structures instead of casting
back and forth between the fsl specific ones and the common ones
(which are identical).

fsl_sata.c: In function 'scan_sata':
fsl_sata.c:550: warning: dereferencing pointer 'cfis' does break strict-aliasing rules
fsl_sata.c:549: warning: dereferencing pointer 'cfis' does break strict-aliasing rules
fsl_sata.c:548: warning: dereferencing pointer 'cfis' does break strict-aliasing rules
fsl_sata.c:545: note: initialized from here
fsl_sata.c:592: warning: dereferencing pointer 'cfis' does break strict-aliasing rules
fsl_sata.c:590: warning: dereferencing pointer 'cfis' does break strict-aliasing rules
fsl_sata.c:588: warning: dereferencing pointer 'cfis' does break strict-aliasing rules
fsl_sata.c:586: warning: dereferencing pointer 'cfis' does break strict-aliasing rules
fsl_sata.c:579: warning: dereferencing pointer 'cfis' does break strict-aliasing rules
...

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-20 23:54:58 +02:00
Simon Kagstrom
20938e54a2 Add unaligned.h for arm
This patch adds unaligned.h for ARM (needed to build with LZO
compression). The file is taken from the linux kernel, but includes
u-boot headers instead.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Stefan Roese <sr@denx.de>
2009-07-20 23:54:58 +02:00
Peter Tyser
433ea8abd6 Remove last remanants of unused CONFIG_I2C_CMD_TREE
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-07-20 23:54:57 +02:00
Andrzej Wolski
f6ca3b7094 ubi: help message correction
Fix incorrect information about size units and correct typo.

Signed-off-by: Andrzej Wolski <awolski@poczta.fm>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-20 23:54:57 +02:00
Wolfgang Denk
f15f14e528 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2009-07-20 22:57:25 +02:00
Wolfgang Denk
997d2681d5 Merge branch 'master' of git://git.denx.de/u-boot-ubi 2009-07-20 22:56:57 +02:00
Wolfgang Denk
725e53a70d Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2009-07-20 22:55:29 +02:00
Wolfgang Denk
23b5b1d3e1 Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2009-07-20 22:52:31 +02:00
Peter Tyser
22f2017c31 Remove last remanants of unused CONFIG_I2C_CMD_TREE
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-07-20 12:51:52 +02:00
Andrzej Wolski
f99a292aa6 ubi: help message correction
Fix incorrect information about size units and correct typo.

Signed-off-by: Andrzej Wolski <awolski@poczta.fm>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-20 09:21:45 +02:00
Ilya Yanok
b86b85e261 mmc: set bus width to 1 and clock to minimum early during initialization
We need to switch back to 1-bit before initialization or SD 2.0 cards
will fail to send SCR if we've switched to 4-bit already.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2009-07-19 22:07:29 +02:00
Shinya Kuribayashi
cff80f2cd1 config.mk: Remove unused HPATH
This variable is not unused anywhere.

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2009-07-19 21:50:59 +02:00
Grzegorz Bernacki
a781de1270 digsy mtc: Enable command line history.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2009-07-19 21:43:00 +02:00
Mike Frysinger
3756609076 compiler.h: unify system ifdef cruft here
Shove a lot of the HOSTCC and related #ifdef checking crap into the new
compiler.h header so that we can keep all other headers nice and clean.

Also introduce custom uswap functions so we don't have to rely on the non
standard implementations that a host may (or may not in the case of OS X)
provide.  This allows mkimage to finally build cleanly on an OS X system.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-19 21:41:46 +02:00
Kim Phillips
2a2ed845c0 common: fix 'dummy' is used uninitialized in this function warning
fix this gcc 4.4 warning:

xyzModem.c: In function 'xyzModem_stream_open':
xyzModem.c:564: warning: 'dummy' is used uninitialized in this function

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-19 21:37:02 +02:00
Mike Frysinger
1ea6bcd859 push CROSS_COMPILE out to $(ARCH)_config.mk
Each arch should handle setting a proper default CROSS_COMPILE value in
their own config.mk file rather than having to maintain a large ugly list
in the Makefile.  By using conditional assignment, we don't have to worry
about the variable already being set (env/cmdline/etc...).

The common config.mk file takes care of exporting CROSS_COMPILE already,
and while a few variables (toolchain ones) utilize CROSS_COMPILE before
including the arch config.mk, they do so with deferred assignment.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-19 21:36:11 +02:00
Jean-Christophe PLAGNIOL-VILLARD
60a3f404ac malloc.h: protect it against multiple include
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-07-19 21:34:45 +02:00
Wolfgang Denk
7640f41988 Fix boards broken after removal of legacy NAND and DoC support
Commit 2419169f removed support for legacy NAND and disk on chip but
missed to update the code for a few boards. This patch fixes the
resulting build issues.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-19 19:37:24 +02:00
Wolfgang Denk
1a4664b53a cmd_flash.c: fix fix compile error for boards with DataFlash
Commit 5669ed45 ("cmd_flash.c: fix warning: unused variable
'addr_first'/'addr_last'") changed the #ifdef logic areound the
declaration of these variables and missed a combination of settings
of HAS_DATAFLASH with SYS_NO_FLASH; this patch fixes this.

Also spotted by Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-19 19:36:14 +02:00
Wolfgang Denk
341245a288 pcm030: fix out-of-tree building
Commit 0a87dd90 that was supposed to fix out-of-tree building for the
pcm030 board was unfortunately incomplete.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-19 12:08:06 +02:00
Simon Kagstrom
8bf29b59fc Add unaligned.h for arm
This patch adds unaligned.h for ARM (needed to build with LZO
compression). The file is taken from the linux kernel, but includes
u-boot headers instead.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Stefan Roese <sr@denx.de>
2009-07-19 11:56:34 +02:00
Kazuaki Ichinohe
e405afab1d Canyonlands SATA harddisk driver
This patch adds a SATA harddisk driver for the canyonlands.
This patch is kernel driver's porting.
This patch corresponded to not cmd_scsi but cmd_sata.
This patch divided an unused member with ifndef __U_BOOT__ in the structure.

[environment variable, boot script]
setenv bootargs root=/dev/sda7 rw
setenv bootargs ${bootargs} console=ttyS0,115200
ext2load sata 0:2 0x400000 /canyonlands/uImage
ext2load sata 0:2 0x800000 /canyonlands/canyonlands.dtb
fdt addr 0x800000 0x4000
bootm 0x400000 - 0x800000

If you drive SATA-2 disk on Canyonlands, you must change parts from
PI2PCIE212 to PI2PCIE2212 on U25. We confirmed to boot by using
following disks:

1.Vendor: Fujitsu	 Type: MHW2040BS
2.Vendor: Fujitsu	 Type: MHW2060BK
3.Vendor: HAGIWARA SYS-COM:HFD25S-032GT
4.Vendor: WesternDigital Type: WD3200BJKT (CONFIG_LBA48 required)
5.Vendor: WesternDigital Type: WD3200BEVT (CONFIG_LBA48 required)
6.Vendor: Hitachi	 Type: HTS543232L9A300 (CONFIG_LBA48 required)
7.Vendor: Seagate	 Type: ST31000333AS (CONFIG_LBA48 required)
8.Vendor: Transcend	 Type: TS32GSSD25S-M
9.Vendor: MTRON		 Type: MSD-SATA1525-016

Signed-off-by: Kazuaki Ichinohe <kazuichi at fsi.co.jp>
2009-07-19 11:24:09 +02:00
Reinhard Arlt
52a0e2dee9 Add support for the Tundra TSI148 VME-bridge
From: Reinhard Arlt <reinhard.arlt@esd-electronics.com>

This patch adds support for the Tundra TSI148 VME-bridge. It's used on
the upcoming esd VME8349 board.

Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-19 11:21:08 +02:00
Mike Frysinger
8d1fea2c40 Blackfin: bf537-{minotaur,srv1}: do not hardcode CONFIG_ETHADDR
MAC addresses should not be hardcoded in boards to avoid random link level
conflicts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-18 21:16:08 -04:00
Mike Frysinger
baf3570503 Blackfin: bf533-stamp: back down SCLK a bit
While the 1.0 and 1.2 spin of the bf533-stamp boards can handle the higher
SCLK speeds just fine, the 1.1 spin cannot due to the bugs introduced with
the shortened SDRAM traces.  So lower the SCLK speed down to a value that
all three can handle.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-18 21:16:01 -04:00
Mike Frysinger
490fe73491 Blackfin: split cpu COBJS into multilines
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-18 21:15:54 -04:00
Mike Frysinger
909878fd3f Blackfin: add os log functions
Part of the mini Blackfin ABI with operating systems is that they can use
0x4f0-0x4f8 to pass log buffers to/from bootloaders.  So add support to
U-Boot for reading the log buffer.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-18 21:15:50 -04:00
Kim Phillips
9993e196da mpc83xx: convert all remaining boards over to 83XX_GENERIC_PCI
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-18 19:43:04 -05:00
Wolfgang Denk
d39041fcad PATI board: fix compiler warnings
Fix these:
pati.c: In function 'checkboard':
pati.c:358: warning: pointer targets in passing argument 2 of 'getenv_r' differ in signedness
../common/flash.c: In function 'write_word':
../common/flash.c:824: warning: dereferencing type-punned pointer will break strict-aliasing rules
cmd_pati.c: In function 'do_pati':
cmd_pati.c:279: warning: 'value' may be used uninitialized in this function

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-19 01:15:52 +02:00
Jean-Christophe PLAGNIOL-VILLARD
28c345042e mpl: printing current stdio devices cleanup
Currently the mpl boards duplicate the code to print the current
devices from common/console.c; use stdio_print_current_devices()
instead

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Edited commit message.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-19 01:05:51 +02:00
Jean-Christophe PLAGNIOL-VILLARD
7e3be7cf3b console: unify printing current devices
Create stdio_print_current_devices() for this purpose

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-07-19 01:02:46 +02:00
Wolfgang Denk
a694610d33 Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2009-07-19 00:38:23 +02:00
Wolfgang Denk
5669ed4557 cmd_flash.c: fix warning: unused variable 'addr_first'/'addr_last'
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-18 23:18:14 +02:00
Tom Rix
6bb6e6c75e OMAP3 Fix compiler warning for v7_flush_dcache_all
On build of omap3 targets in MAKEALL, the *.ERR files have

cpu.c: In function 'cleanup_before_linux':
cpu.c:64: warning: implicit declaration of function 'v7_flush_dcache_all'
cpu.c:64: warning: implicit declaration of function 'get_device_type

The functions v7_flush_dcache_all and get_device_type are declared
in include/asm-arm/arch-omap3/sys_proto.h, so use this file to
declare the functions.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-07-18 22:36:32 +02:00
Wolfgang Denk
dba107b967 ARM: make split_by_variant.sh output more useful
The board/armltd/integrator/split_by_variant.sh script used to print
"Configuring for integrator*p board..." no matter which board name
was being compiled. This made it difficult to match MAKEALL output to
board names. This patch fixes this.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-18 22:09:38 +02:00
Wolfgang Denk
2eb99ca802 NAND: Part 2: Fix warning Please define CONFIG_SYS_64BIT_VSPRINTF...
Commit 8d2effea added a warning for configurations that use NAND
without defining the (then necessary) CONFIG_SYS_64BIT_VSPRINTF but
failed to fix the affected boards.

This patch covers the non-PPC boards that were missed in the previous
patch (commit 170c1972).

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-18 21:56:15 +02:00
Wolfgang Denk
7024aa14df at91cap9adk: fix #ifdef/#endif pairing
The #ifdef/#endif pairing in this file was obviously messed up.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-18 20:46:38 +02:00
Prafulla Wadaskar
4abc5bffea Marvell MV88F6281GTW_GE Board support
This is Marvell's 88F6281_A0 based custom board developed
for wireless access point product

This patch is tested for-
1. Boot from DRAM/SPI flash/NFS
2. File transfer using tftp and loadb
3. SPI flash read/write/erase
4. Booting Linux kernel and RFS from SPI flash
5. Boot from USB supported

Reviewed-by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-07-18 20:41:42 +02:00
Prafulla Wadaskar
55dd4ba541 Marvell Sheevaplug Board support
Reference:
http://plugcomputer.org/
http://openplug.org/plugwiki/index.php/Das_U-boot_plug_support

This patch is tested for-
1. Boot from DRAM/NAND flash
2. File transfer using tftp
3. NAND flash read/write/erase
4. Linux kernel and RFS Boot from NAND
5. Enabled USB PHY init for kernel need
6. Boot from USB supported

Note: to boot Kirkwood kernel with USB support,
	you should add "usb start" in the boot sequence

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-07-18 18:46:09 +02:00
Wolfgang Denk
0a87dd90a7 pcm030: fix out-of-tree building
Commit c9969947, which added support for the pcm030 board
(aka phyCORE-MPC5200B-tiny), broke out-of-tree building.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-18 18:00:25 +02:00
Wolfgang Denk
9ff59601c7 MPC837XERDB: fix warning: "CONFIG_SYS_MONITOR_LEN" redefined
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-18 16:36:11 +02:00
Wolfgang Denk
2b5243fc24 8xxx: fix warning: implicit declaration of function 'uec_standard_init'
Commit 8e55258f created function uec_standard_init() to initialize
all UEC interfaces for 83xx and 85xx but failed to provide a
prototype for it.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-18 16:13:18 +02:00
Wolfgang Denk
5b54df2674 MIP405T: fix compile problem
The "stdio/device: rework function naming convention" patch
(commit 52cb4d4f) broke the MIP405T board; this patch fixes it.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-18 15:46:02 +02:00
Wolfgang Denk
170c19725e NAND: Fix warning Please define CONFIG_SYS_64BIT_VSPRINTF...
Commit 8d2effea added a warning for configurations that use NAND
without defining the (then necessary) CONFIG_SYS_64BIT_VSPRINTF but
failed to fix the affected boards.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-18 15:32:10 +02:00
Wolfgang Denk
6e897a661f CPCI750: fix compile problem
Commit bc0d3296 removed ppc_error_no.h from Marvell boards
but forgot to update board/esd/cpci750/mv_eth.h

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-18 15:05:44 +02:00
Wolfgang Denk
462b103873 Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-07-18 14:59:40 +02:00
Wolfgang Denk
0f1b3a2424 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2009-07-18 14:59:05 +02:00
Alessandro Rubini
6aee304834 cmd_i2c: bugfix: add missing brace
The sub-command parser missed a brace, so "return 0;" is always
taken and no error message is diplayed if you say "i2c scan"
instead of "i2c probe", for example.

Proper brace is added. Also, a misleading and unneeded else
is removed.

Signed-off-by: Alessandro Rubini <rubini@gnudd.com.it>
2009-07-18 10:17:53 +02:00
Jean-Christophe PLAGNIOL-VILLARD
52cb4d4fb3 stdio/device: rework function naming convention
So far the console API uses the following naming convention:

	======Extract======
	typedef struct device_t;

	int	device_register (device_t * dev);
	int	devices_init (void);
	int	device_deregister(char *devname);
	struct list_head* device_get_list(void);
	device_t* device_get_by_name(char* name);
	device_t* device_clone(device_t *dev);
	=======

which is too generic and confusing.

Instead of using device_XX and device_t we change this
into stdio_XX and stdio_dev

This will also allow to add later a generic device mechanism in order
to have support for multiple devices and driver instances.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Edited commit message.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-18 00:27:46 +02:00
Peter Tyser
f732a7598f ppc: Fix compile error for boards with CONFIG_DDR_ECC
A bug was introduced by commit e94e460c6e
which affected non-MPC83xx/85xx/86xx ppc boards which had CONFIG_DDR_ECC
defined and resulted in errors such as:

Configuring for canyonlands board...
fsl_dma.c:50:2: error: #error "Freescale DMA engine not supported on your
processor"
make[1]: *** No rule to make target `.depend', needed by `libdma.a'.  Stop.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-07-17 23:44:42 +02:00
Prafulla Wadaskar
18e067de9b include/config_cmd_default.h cleanup
arranged configurations in alphabetical order
CONFIG_CMD_FLASH moved under ifndef CONFIG_SYS_NO_FLASH

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-07-17 23:25:51 +02:00
Wolfgang Denk
dcf728a6af Merge branch 'master' of git://git.denx.de/u-boot-video 2009-07-17 23:05:41 +02:00
Wolfgang Denk
f889cedfad Merge branch 'master' of git://git.denx.de/u-boot-microblaze 2009-07-17 23:04:07 +02:00
Mike Frysinger
569460ebf1 sata: namespace curr_device variable
The curr_device variable really should be namespaced with a "sata_" prefix
since it is only used by the sata code.  It also avoids random conflicts
with other pieces of code (like cmd_mmc):
common/libcommon.a(cmd_sata.o):(.data.curr_device+0x0):
	multiple definition of `curr_device'
common/libcommon.a(cmd_mmc.o):(.data.curr_device+0x0): first defined here

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-17 22:15:27 +02:00
Mike Frysinger
02e22c2de1 cmd_mmc: make curr_device static
The curr_device variable isn't used outside of cmd_mmc, so mark it static
to avoid conflicts with other pieces of code (like sata which also exports
a curr_device).  Otherwise we end up with stuff like:
common/libcommon.a(cmd_sata.o):(.data.curr_device+0x0):
	multiple definition of `curr_device'
common/libcommon.a(cmd_mmc.o):(.data.curr_device+0x0): first defined here

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-17 22:14:41 +02:00
Mike Frysinger
2d8d2adde3 envcrc: add missing dependencies on env storage
When the envcrc building was made conditional, it missed a bunch of env
storage types, so add all currently supported types.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-17 22:14:05 +02:00
Scott Wood
2419169f57 Remove legacy NAND and disk on chip references from boards.
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-17 15:03:28 -05:00
Shinya Kuribayashi
12e9043c7e config.mk: Remove $(PCI_CLOCK) reference
The following commit introduced $(PCI_CLOCK) reference so that
we could tweak `PCI_66M' definition via an environment variable.

> commit f046ccd15c
> Author: Eran Liberty <liberty@freescale.com>
> Date:   Thu Jul 28 10:08:46 2005 -0500
>
>     * Patch by Eran Liberty
>       Add support for the Freescale MPC8349ADS board.

But I suggest a removal of it for the following reasons:

* In 2006, MPC8349ADS was merged into MPC8349EMDS port,
  and it seems that MPC8349EMDS port is PCI_66M free.

* OTOH, PCI_66M is used by MPC832XEMDS an MPC8360EMDS ports,
  but they don't need $(PCI_CLOCK) environment variable at all.
  PCI_66M is automatically configured via $(BOARD)_config names
  with the help of $(findstring _66_,$@).

* Unfortunately $(PCI_CLOCK) has been undocumented anywhere,
  so only a few people know the existence of it these days.

* Keep config.mk independent from $(BOARD) as much as possible.

Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-17 21:36:35 +02:00
Jean-Christophe PLAGNIOL-VILLARD
3db75d9c11 fix: missing autoconfig.mk from general Makefile
At the first run of make we generate the autoconf.mk and
autoconf.mk.dep if not already the case and we currently include only
to .dep

In order to use these autogenerated values we need to include it also
even if it's included in config.mk but it's done before their
generation

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-17 21:17:23 +02:00
Matthias Weisser
1ca298ced0 Added support for splash screen positioning
This patch adds support splash image positioning by adding an
additional variable "splashpos" to the environment. Please see
README for details.

Signed-off-by: Matthias Weisser <matthias.weisser@graf-syteco.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2009-07-17 15:23:41 +02:00
Anatolij Gustschin
9d173e0233 video: mb862xx: replace printf with puts
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2009-07-17 15:23:40 +02:00
Anatolij Gustschin
cce99b2a7d video: mb862xx: use macros instead of magic numbers
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2009-07-17 15:23:40 +02:00
Anatolij Gustschin
e86528671e video: mb862xx: fix coding style and remove dead code
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2009-07-17 15:23:40 +02:00
Michal Simek
292ed489db microblaze: Remove ignored return type for __arch__swab16 function
This change remove compilation warnings.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-17 08:02:52 +02:00
Michal Simek
e2776587c0 microblaze: Removed unused variables
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-17 08:02:51 +02:00
Scott Wood
be33b046b5 Remove legacy NAND and disk on chip code.
Legacy NAND had been scheduled for removal.  Any boards that use this
were already not building in the previous release due to an #error.

The disk on chip code in common/cmd_doc.c relies on legacy NAND,
and it has also been removed.  There is newer disk on chip code
in drivers/mtd/nand; someone with access to hardware and sufficient
time and motivation can try to get that working, but for now disk
on chip is not supported.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 19:07:47 -05:00
Stefan Roese
fbdaafaee7 nand: Change NAND_MAX_OOBSIZE to 218 as needed for some 4k page devices
This is needed for the MPC512x NAND driver (fsl_nfc_nand.c) which already
defines such a 4k plus 218 bytes ECC layout.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 17:52:03 -05:00
Stefan Roese
f2f376ab95 nand: ndfc: Remove unnecessary #ifdef's
Now that the 4xx NAND driver ndfc is moved to the common NAND driver
directory we don't need this #ifdef's anymore.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 17:52:03 -05:00
Stefan Roese
12582ac771 nand/ppc4xx: Move PPC4xx NAND driver to common NAND driver directory
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 17:52:02 -05:00
Valeriy Glushkov
3ebf70db54 nand: fixed failed reads on corrected ECC errors in nand_util.c
Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Paulraj, Sandeep <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 17:52:01 -05:00
David Brownell
ed727d394c Typo fix: use CONFIG_SOC_DM644X, not CONFIG_SOC_DM646.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 17:52:01 -05:00
Kyungmin Park
937076f84c MTD: OneNAND: Increase the environment size to 4KiB
Also use mtd operation instead of onenand functions

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-16 17:52:00 -05:00
Anton Vorontsov
bfadb17f69 mpc83xx: MPC837xEMDS: Use hwconfig instead of pci_external_arbiter variable
Since we have simple hwconfig interface now, we don't need
pci_external_arbiter variable any longer.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-16 22:47:10 +02:00
Anton Vorontsov
b8b71ffbc3 mpc83xx: MPC8315ERDB: Use hwconfig for board type selection
This patch simply converts the board to the hwconfig infrastructure.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-16 22:47:01 +02:00
Anton Vorontsov
c78c678354 mpc83xx: MPC837XEMDS: Fixup eSDHC nodes in device tree
fdt_fixup_esdhc() will either disable or enable eSDHC nodes, and
also will fixup clock-frequency property.

Plus, since DR USB and eSDHC are mutually exclusive, we should
only configure the eSDHC if asked through hwconfig.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-16 22:25:43 +02:00
Anton Vorontsov
c9646ed758 mpc83xx: MPC837XERDB: Add support for FSL eSDHC
This patch adds support for eSDHC on MPC837XERDB boards. The WP
switch doesn't seem to work on RDB boards though, the WP pin is
always asserted (can see the pin state when it's in GPIO mode).

FSL DR USB and FSL eSDHC are mutually exclusive because of pins
multiplexing, so user should specify 'esdhc' or 'dr_usb' options
in the hwconfig environment variable to choose between the
devices.

p.s.
Now we're very close to a monitor len limit (196 bytes left using
gcc-4.2.0), so also increase the monitor len by one sector (64 KB).

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-16 22:25:34 +02:00
Anton Vorontsov
b33433a63f fsl_esdhc: Add device tree fixups
This patch implements fdt_fixup_esdhc() function that is used to fixup
the device tree.

The function adds status = "disabled" propery if esdhc pins muxed away,
otherwise it fixups clock-frequency for esdhc nodes.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-16 22:24:06 +02:00
Anton Vorontsov
93f9dcf9e8 Add simple hwconfig infrastructure
This patch implements simple hwconfig infrastructure: an
interface for software knobs to control a hardware.

This is very simple implementation, i.e. it is implemented
via `hwconfig' environment variable. Later we could write
some "hwconfig <enable|disable|list>" commands, ncurses
interface for Award BIOS-like interface, and frame-buffer
interface for AMI GUI[1] BIOS-like interface with mouse
support[2].

Current implementation details/limitations:

1. Doesn't support options dependencies and mutual exclusion.
   We can implement this by integrating apt-get[3] into the
   u-boot. But I didn't bother yet.

2. Since we don't implement hwconfig command, i.e. we're working
   with the environement directly, there is no way to tell that
   toggling a particular option will need a reboot to take
   an effect. So, for now it's advised to always reboot the
   target after modifying hwconfig variable.

3. We support hwconfig options with arguments. For example,

   set hwconfig dr_usb:mode=peripheral,phy_type=ulpi

   That means:
   - dr_usb - enable Dual-Role USB controller;
   - dr_usb:mode=peripheral - USB in Function mode;
   - dr_usb:phy_type=ulpi - USB should work with ULPI PHYs;

The purpose of this simple implementation is to define some
internal API and then we can continue improving user experience
by adding more mature interface, like hwconfig command with
bells and whistles. Or not adding, if we feel that current
interface fits its needs.

[1] http://en.wikipedia.org/wiki/American_Megatrends
[2] Regarding ncurses and GUI with mouse support -- I'm just
    kidding.
[3] The comment regarding apt-get is also a joke, meaning that
    dependency tracking could be non-trivial. For example, for
    enabling HW feature X we may need to disable Y, and turn Z
    into reduced mode (like RMII-only interface for ethernet,
    no MII).

    It's quite trivial to implement simple cases though.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-16 22:23:53 +02:00
Wolfgang Denk
cd21a458da Merge branch 'master' of git://git.denx.de/u-boot-cfi-flash 2009-07-16 22:13:54 +02:00
Wolfgang Denk
10faafd5ff Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2009-07-16 22:13:45 +02:00
Wolfgang Denk
6973fb414c Merge branch 'asm-generic' of git://git.denx.de/u-boot-microblaze 2009-07-16 21:53:15 +02:00
Jerry Van Baren
6c3fef28b9 Improve U-Boot Porting Guide in the README
Update for...
* BDI2000 -> BDI3000 (BDI2000 is obsolete).
* Add a line to read the doc/README.* files
* Fix coding standard violations

Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
2009-07-16 21:45:51 +02:00
Kim Phillips
9578718c1b mtd: cfi - if defined, use MAX_FLASH_BANKS_DETECT for static declarations
a.k.a cfi_mtd.c does as cfi_flash.c does.  This also prevents
the TQM834x build from doing a:

cfi_mtd.c:36: error: variably modified 'cfi_mtd_info' at file scope
cfi_mtd.c:37: error: variably modified 'cfi_mtd_names' at file scope

using gcc 4.4.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-16 15:27:45 +02:00
Kim Phillips
4a9932a436 mpc83xx: increase MONITOR_LEN to offset growing pains
Saving the environment leads to overwriting u-boot itself,
bricking boards.  Increase u-boot's image size so the environment
base address doesn't end up overlapping u-boot text.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-14 14:58:39 -05:00
Valeriy Glushkov
c31e13260b usb: mpx8349itx: added support of loading images from USB storage (MPH/DR)
Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-14 14:55:46 -05:00
Valeriy Glushkov
d89e1c3689 usb: mpc834x: added support of the MPH USB controller in addition to the DR one
Signed-off-by: Valeriy Glushkov <gvv@lstec.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-14 14:53:52 -05:00
Kim Phillips
d9ac3d5a17 mpc83xx: set 64BIT_VSPRINTF for boards using nand_util
When enabling NAND support for a board, one must also define
CONFIG_SYS_64BIT_VSPRINTF because this is needed in nand_util.c
for correct output.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Dave Liu <daveliu@freescale.com>
Cc: Ron Madrid <ron_madrid@sbcglobal.net>
Cc: Anton Vorontsov <avorontsov@ru.mvista.com>
2009-07-14 14:47:21 -05:00
TsiChung Liew
052c089165 ColdFire: Update bootargs
Add a bootargs for M53017EVB and update bootargs
for M54451EVB

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-07-14 09:46:42 -05:00
TsiChung Liew
6e8d58d366 Command for accessing serial flash update
Change strtoul number base of argv 3 from 0 to 16

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-07-14 09:46:39 -05:00
TsiChung Liew
ee0a846246 ColdFire: Add DSPI support for MCF5227x and MCF5445x
Remove individual CPU specific DSPI driver.
Add required feature for the common DSPI driver in cpu_init and
in platform configuration file.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-07-14 09:46:34 -05:00
TsiChung Liew
dec61c7851 Coldfire: Consolidate DSPI driver
Unify both MCF5227x and MCF5445x DSPI driver in CPU to
driver/spi folder for common use.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-07-14 09:46:09 -05:00
TsiChung Liew
11d88b26a6 ColdFire: Remove compiler warning messages
Remove unused variables and printf type mismatch in
lib_m68k/board.c

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-07-14 09:27:24 -05:00
TsiChung Liew
4567c7bff2 ColdFire: Fix M53017EVB flash size
Increase the flash size from 8MB to 16MB

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-07-14 09:27:20 -05:00
TsiChung Liew
bf9a521529 ColdFire: Add M5208EVB and MCF520x CPU support
Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-07-14 09:27:17 -05:00
TsiChung Liew
709b384b64 ColdFire: Update for M54451EVB
Update serial boot DRAM's Internal RAM, vector table and DRAM in
start.S, serial flash's read status command over SPI and NOR
flash.

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-07-14 09:27:14 -05:00
TsiChung Liew
bbf6bbffca ColdFire: Update configuration file to use flash buffer write
Update M52277EVB, M53017EVB and M54455EVB platform configuration
file to use flash buffer write

Signed-off-by: TsiChung Liew <tsicliew@gmail.com>
2009-07-14 09:27:10 -05:00
Wolfgang Denk
7d4450a977 mpc5121ads: add JFFS2 and MTDPARTS support; adjust flash map
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-14 00:02:49 +02:00
Wolfgang Denk
1f1f82f3de aria: add JFFS2 and MTDPARTS support; adjust flash map
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-14 00:02:47 +02:00
Wolfgang Denk
a6d6d46a4f aria: enable NAND flash support
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-14 00:02:45 +02:00
Wolfgang Denk
13946925e8 MPC512x: fix typo in comment listing the NAND driver name
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-07-14 00:02:44 +02:00
Wolfgang Denk
2ca6f74d09 mecp5123: cleanup - remove dead code
Remove dead code that was obviously a left-over from copy & paste.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-07-14 00:02:43 +02:00
Wolfgang Denk
25671c8672 aria: adjust memory controller initialization
Needed for Rev. 2 silicon at 400 MHz

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-14 00:02:42 +02:00
Wolfgang Denk
7629f1c06b MPC512x: factor out common code
Now that we have 3 boards for the MPC512x it turns out that they all
use the very same fixed_sdram() code.

This patch factors out this common code into cpu/mpc512x/fixed_sdram.c
and adds a new header file, include/asm-ppc/mpc512x.h, with some
macros, inline functions and prototype definitions specific to MPC512x
systems.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-07-14 00:02:41 +02:00
Wolfgang Denk
0549353a6b mecp5123: fix build error
The mecp5123 board did not compile because the MSCAN Clock Control
Registers were missing; these got added, but as an array instead
of 4 individual registers. Adapt the code so it builds.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-07-14 00:01:58 +02:00
Wolfgang Denk
a9905db5d2 MPC512x: Add MSCAN1...4 Clock Control Registers
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-07-14 00:01:32 +02:00
Wolfgang Denk
f5489c4200 MPC512x: enabling NAND support requires CONFIG_SYS_64BIT_VSPRINTF
When enabling NAND support for a board, one must also define
CONFIG_SYS_64BIT_VSPRINTF because this is needed in nand_util.c
for correct output.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-07-14 00:00:39 +02:00
Wolfgang Denk
87abce6e91 Merge branch 'master' of /home/wd/git/u-boot/master 2009-07-14 00:00:04 +02:00
Wolfgang Denk
bb272ec8df Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-07-13 23:45:10 +02:00
Wolfgang Denk
c3ae126c2c Merge branch 'master' of git://git.denx.de/u-boot-arm 2009-07-13 23:45:02 +02:00
Wolfgang Denk
9833865a2b Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-07-13 23:38:29 +02:00
Wolfgang Denk
227ad917c5 Merge branch 'master' of git://git.denx.de/u-boot-cfi-flash 2009-07-13 23:38:27 +02:00
Wolfgang Denk
4b96cb6777 Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-07-13 23:37:59 +02:00
Wolfgang Denk
ed01c4f59d Merge branch 'master' of git://git.denx.de/u-boot-sh 2009-07-13 23:37:55 +02:00
Wolfgang Denk
17f098bd4a Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-07-13 23:34:33 +02:00
Wolfgang Denk
5db1dcce91 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2009-07-13 23:34:30 +02:00
Wolfgang Denk
70ad83376d Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-07-13 23:33:20 +02:00
Wolfgang Denk
116a0a544d Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2009-07-13 23:33:16 +02:00
Wolfgang Denk
6a6bf27f26 Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-07-13 23:32:08 +02:00
Wolfgang Denk
d821f38022 Merge branch 'master' of git://git.denx.de/u-boot-usb 2009-07-13 23:32:01 +02:00
Wolfgang Denk
1f7fea4ebe Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-07-13 23:28:55 +02:00
Wolfgang Denk
585887b87d Merge branch 'master' of git://git.denx.de/u-boot-ubi 2009-07-13 23:28:37 +02:00
Po-Yu Chuang
b4db4a7638 issue write command to base for JEDEC flash
For JEDEC flash, we should issue word programming command relative to
base address rather than sector base address. Original source makes
SST Flash fails to program sectors which are not on the 0x10000 boundaries.

e.g.
SST39LF040 uses addr1=0x5555 and addr2=0x2AAA, however, each sector
is 0x1000 bytes.

Thus, if we issue command to "sector base (0x41000) + offset(0x5555)",
it sends to 0x46555 and the chip fails to recognize that address.

This patch is tested with SST39LF040.

Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-13 11:01:31 +02:00
Jean-Christophe PLAGNIOL-VILLARD
986922714f versatile: update config and merge to cfi flash driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Peter Pearse <peter.pearse@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
2009-07-12 21:59:52 +02:00
Jean-Christophe PLAGNIOL-VILLARD
d6e8ed832b versatile: specify the board type on the prompt
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Peter Pearse <peter.pearse@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
2009-07-12 21:59:50 +02:00
Sedji Gaouaou
5ccc2d99d6 at91: Introduction of at91sam9g10 SOC.
AT91sam9g10 is an ARM 926ej-s SOC. It is an evolution of the at91sam9261 with a
faster clock speed: 266/133MHz.

Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
2009-07-12 17:56:11 +02:00
Sedji Gaouaou
22ee647380 at91: Introduction of at91sam9g45 SOC.
AT91sam9g45 series is an ARM 926ej-s SOC family clocked at 400/133MHz.
It embeds USB high speed host and device, LCD, DDR2 RAM, and a full set of
peripherals.

The first board that embeds at91sam9g45 chip is the AT91SAM9G45-EKES.
On the board you can find 2 USART, USB high speed,
a 480*272 LG lcd, ethernet, gpio/joystick/buttons.

Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
2009-07-12 17:43:34 +02:00
Daniel Mack
c33c5990ce pxa: fix CKEN_B register bits
The current defition for CKEN_B register bits is nonsense. Adding 32 to
the shifted value is equal to '| (1 << 5)', and this bit is marked
'reserved' in the PXA docs.

Signed-off-by: Daniel Mack <daniel@caiaq.de>
2009-07-12 17:43:32 +02:00
Daniel Mack
bd876be46f pxa: add clock for system bus 2 arbiter
This clock is needed for systems using the USB2 device unit or the 2d
graphics accelerator.

Signed-off-by: Daniel Mack <daniel@caiaq.de>
2009-07-12 17:43:31 +02:00
Grazvydas Ignotas
b016000a95 OMAP3 pandora: Fix CKE1 MUX setting to allow self-refresh
Pandora is using both SDRC CSes. The MUX setting is needed
for the second CS clock signal to allow the 2 RAM parts to
be put in self-refresh correctly.

Based on similar patch for beagle and overo by
Jean Pihet and Steve Sakoman.
2009-07-12 17:43:29 +02:00
Grazvydas Ignotas
8672c28870 OMAP3 pandora: setup pulls for various GPIOs
Set pullups or pulldowns for GPIOs which need them.
Disable them for others, which have external pulls.
Also make disabled pull setting consistent (some pins had
type set to "up" even if pull type selection was disabled).
2009-07-12 17:43:28 +02:00
Grazvydas Ignotas
5ff78122f2 OMAP3 pandora: setup pin mux for pins used on rev3 boards
Setup pin mux for GPIO pins connected on rev3 or later
boards. Also change NUB2 IRQ pin. This should not affect
older boards because they don't have any nubs (analog
controllers) attached to them.
2009-07-12 17:43:26 +02:00
Grazvydas Ignotas
67c97c346b OMAP3 pandora: pin mux cleanup
Remove configuration of not unused pins, effectively
leaving them in safe mode.
2009-07-12 17:43:24 +02:00
Prafulla Wadaskar
b996165f5a arm: Kirkwood: bugfix: UART1 bar correction
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-07-12 17:43:15 +02:00
Kumar Gala
50243e3e7a usb: Fix compiler warning with gcc4.4
ehci-hcd.c: In function 'ehci_submit_root':
ehci-hcd.c:719: warning: value computed is not used
ehci-hcd.c:748: warning: value computed is not used

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-07-11 11:30:17 +02:00
Nobuhiro Iwamatsu
04366d070a sh: Update pci config for Renesas r7780mp board
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-07-11 09:03:41 +09:00
Nobuhiro Iwamatsu
74d9c16a68 sh: Add support ESPT-GIGA borad
ESPT-Giga is SH7763-based reference board.
Board support is relatively sparse, presently supporting serial,
gigabit ethernet, USB host, and MTD.

More information (in Japanese) available at:
http://www.cente.jp/product/cente_hard/ESPT-Giga.html

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-07-11 09:02:21 +09:00
Matthias Fuchs
dae4e0148a Add ESD PCI vendor ID
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
2009-07-11 01:02:20 +02:00
Peter Tyser
876b3cef53 api_examples/Makefile: General cleanup
* Remove symlinking of files located outside api_examples/

* Auto generate dependencies for files located outside api_examples/

* Update names of variables to be similar to those in tools/Makefile

* Fix out of tree build error
  Dependencies are calculated for all files in the SRCS variable.
  Previously, the SRCS variable contained files which were symlinked
  into the api_examples/ directory.  These symlinked files did not exist
  when dependencies were calculated when building out of tree.  This
  resulted in errors such as:
    make[1]: *** No rule to make target `/work/wd/tmp-ppc/api_examples/.depend', needed by `_depend'.  Stop.
    make[1]: Leaving directory `/home/wd/git/u-boot/work/api_examples'
    make: *** [depend] Error 2

  Since symlinked source files are no longer used, this bug no longer
  exists.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
2009-07-11 00:31:05 +02:00
Peter Tyser
522f6f02ad api_examples/Makefile: Get rid of unnecessary intermediate LIB target
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
2009-07-11 00:30:38 +02:00
Peter Tyser
117d0ab5e6 api_examples/Makefile: Combine ELF and BIN targets
Combining the two rules cleans up the Makefile a bit

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
2009-07-11 00:30:25 +02:00
Peter Tyser
644cb38108 api_examples/Makefile: Split up variable declarations
This cleans up the Makefile a bit and simplifies future changes

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Rafal Jaworowski <raj@semihalf.com>
2009-07-11 00:30:17 +02:00
Timur Tabi
890d242fac remove _IO_BASE and KSEG1ADDR from board configuration files
The KSEG1ADDR macro used to be necessary for the RTL8139 Ethernet
driver, but the code that used that macro was removed over a year
ago, so board configuration files no longer need to define it.

The _IO_BASE macro is also automatically defined to 0 if it isn't
already set, so there's no need to define that macro either in the
board configuration files.

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Andy Fleming <afleming@freescale.com>
Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
2009-07-11 00:19:16 +02:00
Jon Smirl
c9969947a4 board support patch for phyCORE-MPC5200B-tiny
Add support for the Phytec phyCORE-MPC5200B-tiny.
Code originally from Pengutronix.de.
Created CONFIG_SYS_ATA_CS_ON_TIMER01 define for when IDE CS is on
Timer 0/1

Signed-off-by: Jon Smirl <jonsmirl@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
2009-07-10 23:21:32 +02:00
Mike Frysinger
7bd49ad12c kallsyms: fix escaping of NUL char in strings
The current kallsyms code is using \\0 to escape the backslash in the awk
code, but the shell too needs escaping.  This way we make sure gcc is
passed the \0.  Then gcc itself will consume this as an octal, so we have
to use 000 so gcc will create the final NUL.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-10 23:04:15 +02:00
Harald Krapfenbauer
ed540f07b8 Blackfin: cm-bf561: add example settings for EXT-BF5xx-USB-ETH2 add-on
The cm-bf561 module can easily hook up to the EXT-BF5xx-USB-ETH2 extender
board, so add a simple example of how to do that in the board config.

Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-10 02:36:30 -04:00
Mike Frysinger
f8bf54b408 Blackfin: blackstamp: update spi flash settings
The latest blackstamp boards can only run the SPI flash at 15MHz before
they start to crap out, so lower the max speeds accordingly.  The new SPI
flash also has different sector requirements, so update the environment
sizes as well.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-10 02:36:28 -04:00
Mike Frysinger
286070ddc8 Blackfin: add cache_dump commands
A few debug-type commands used to dump the raw icache/dcache data.  Useful
when trying to track down cache-related bugs.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-10 02:36:26 -04:00
Matthias Fuchs
632e9b671e ppc4xx: Set default PCI device ID for 405EP boards
Current code only sets the PCI vendor id to 0x1014 and
leaved device id to 0x0000.

Ths patch ....
a) uses the correct PCI_VENDOR_ID_IBM macro for this
b) sets the default device ID as stated in the UM to 0x0156
   by using PCI_DEVICE_ID_IBM_405GP for this.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-10 08:26:11 +02:00
Matthias Fuchs
123f102ec0 ppc4xx: Move 405EP pci code from cpu_init_f() to __pci_pre_init()
This patch moves some basic PCI initialisation from the 4xx cpu_init_f()
to cpu/ppc4xx/4xx_pci.c.

The original cpu_init_f() function enabled the 405EP's internal arbiter
in all situations. Also the HCE bit in cpc0_pci is always set.
The first is not really wanted for PCI adapter designs and the latter
is a general bug for PCI adapter U-Boots. Because it enables
PCI configuration by the system CPU even when the PCI configuration has
not been setup by the 405EP. The one and only correct place is
in pci_405gp_init() (see "Set HCE bit" comment).

So for compatibility reasons the arbiter is still enabled in any case,
but from weak pci_pre_init() so that it can be replaced by board specific
code.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-10 08:26:03 +02:00
Matthias Fuchs
c71103f9dc ppc4xx: Make is_pci_host() available for all 440 and 405 CPUs
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-10 08:25:55 +02:00
Prafulla Wadaskar
1d8937a469 usb: add Marvell Kirkwood ehci host controller driver
This driver is tested on Sheevaplug platform

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-07-09 21:33:15 +02:00
Vivek Mahajan
db7b43e468 mpc83xx: USB: fix: access of ehci struct elements
It fixes the access to the 'ehci' struct elements for mpc83xx which
should have been taken care of in 4ef01010aa
Sorry about that.

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-07-09 21:33:15 +02:00
Vivek Mahajan
0806615273 mpc8xxx: USB: fix: access of ehci struct elements
This patch fixes the access to the 'ehci' struct elements which should
have been taken care off in 4ef01010aa
Sorry about that.

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-07-09 21:33:15 +02:00
Bryan Wu
c3a012ce65 usb: musb: add timeout via CONFIG_MUSB_TIMEOUT
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-07-09 21:33:15 +02:00
Mike Frysinger
7984967a94 usb: musb: drop old musb read/write prototypes
These functions are no longer defined, so remove their prototypes.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-07-09 21:33:15 +02:00
Kim Phillips
4e04f16020 usb: fix CONFIG_SYS_MPC83xx_USB_ADDR not defined error
fix a stray CONFIG_MPC83XX that escaped commit
0f89860494.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-07-09 21:33:14 +02:00
Michal Simek
bc0d3296f1 asm-generic: Consolidate errno.h to asm-generic/errno.h
This patch use blackfin errno.h implementation which
correspond Linux kernel one.

MIPS implemetation is different that's why I keep it.

I removed ppc_error_no.h from Marvell boards which
was the same too.

I have got ack from ppc40x, blackfin, arm, coldfire and avr custodians.

Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-07-09 14:07:11 +02:00
Simon Kagstrom
2896b5851f Command improvements for ubifs
Check that an argument is passed to ubifsmount and that addresses and
sizes are actually numbers for ubifsload. Also improve the instructions
a bit.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-09 13:04:25 +02:00
Simon Kagstrom
25c8f40059 Handle VID header offset in ubi part command
The VID header offset is sometimes needed to initialize the UBI
partition. This patch adds it (optionally) to the command line
for the ubi part command.

(Lines have been properly wrapped since last version)

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-09 09:57:54 +02:00
Wolfgang Denk
3672cd5c3b MAINTAINERS: fix sorting, remove duplicates.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-09 09:56:16 +02:00
Wolfgang Denk
a350d0d37d Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-07-08 22:01:54 +02:00
Wolfgang Denk
d073aeea4f Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2009-07-08 22:01:50 +02:00
Wolfgang Denk
23bca26ab0 Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-07-08 21:51:17 +02:00
Heiko Schocher
efbf14e9a2 all platforms: make show_boot_progress() work again
Signed-off-by: Heiko Schocher <hs@denx.de>
2009-07-08 21:38:35 +02:00
Prafulla Wadaskar
205a0988d8 nand: Add Marvell Kirkwood NAND driver
This patch adds a NAND driver for the Marvell Kirkwood SoC's

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2009-07-08 21:20:10 +02:00
Matthias Fuchs
0580e48f53 ppc4xx: Make pll_write global
This patch makes pll_write on PPC405EP boards
global and callable from C code.

pll_write can be used to dynamically modify the PLB:PCI divider
as it is required for 33/66 MHz pci adapters based on the 405EP.

board_early_init_f() is a good place to do that (check M66EN signal
and call pll_write() when it is required).

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-08 10:59:07 +02:00
Stefan Roese
20b3c4b528 ppc4xx: Remove compilation warning "pci_async_enabled defined but not used"
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-08 10:59:07 +02:00
Matthias Fuchs
d0a1364f91 ppc4xx: Implement is_pci_host() for 405 CPUs
This patch implements the is_pci_host() function in a similiar way
as it is used on 440 targets.

The former path with CONFIG_PCI_HOST == PCI_HOST_AUTO does not
build on 405EP targets because checking the PCI arbiter is different.
So putting the fixed code into a separate function makes the code
more readable.

Also using is_pci_host() on 405 brings 405 and 440 PCI code
a little bit closer.

In preparation for an upcoming 405EP based PMC module I made this
function weak so that it can be overwritten from board specific code.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-08 10:59:07 +02:00
Alessio Centazzo
04ddae915f ppc4xx: Fixed PPC4xx debug compilation error in uic.c
This patch fixes a debug compilation error for PPC4xx platforms, all
other architectures are not affected by this change.  The 'handler'
pointer was undefined.  The fix is exercised and has effect only if
DEBUG is defined.

Signed-off-by: Alessio Centazzo acpatin@yahoo.com
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-08 10:59:07 +02:00
Felix Radensky
48e2b535a0 4xx: Fix compilation warnings and MQ registers dump in SPD DDR2 code
This patch fixes printf format string compilation warnings in several
debug statements. It also fixes the dump of DDR controller MQ registers
found on some 44x and 46x platforms. The current register dump code
uses incorrect DCRs to access these registers.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-08 10:59:07 +02:00
Felix Radensky
26d37f0061 ppc4xx: Fix FDT EBC mappings on Canyonlands
This patch fixes 2 problems with FDT EBC mappings on Canyonlands.
First, NAND EBC mapping was missing, making Linux NAND driver
unusable on this board. Second, NOR remapping code assumed that
NOR is always on CS0, however when booting from NAND NOR is on CS3.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-08 10:59:06 +02:00
Nobuhiro Iwamatsu
baa9f9ba43 sh: Revised the build with newest compiler
The check of data became severe from newest gcc.
This patch checked in gcc-4.2 and 4.3 .

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-07-08 11:43:16 +09:00
Jean-Christophe PLAGNIOL-VILLARD
be45c63256 sh3/sh4: rename config option TMU_CLK_DIVIDER to CONFIG_SYS_TMU_CLK_DIV
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-07-08 11:43:16 +09:00
Jean-Christophe PLAGNIOL-VILLARD
8dd29c87ba sh3/sh4: fix CONFIG_SYS_HZ to 1000
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-07-08 11:43:15 +09:00
Jean-Christophe PLAGNIOL-VILLARD
add380f51f sh: introduce clock framework
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-07-08 11:43:15 +09:00
Jean-Christophe PLAGNIOL-VILLARD
3931a375de sh: unify linker script
all sh boards use the same cpu linker script so move it to cpu/$(CPU)

that could be overwrite in following order
SOC
BOARD
via the corresponding config.mk

tested on r2dplus

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-07-08 11:43:15 +09:00
Jean-Christophe PLAGNIOL-VILLARD
236aad8758 sh: make the linker scripts more generic
currently we need to sync the linker script enty and TEXT_BASE manualy
and the reloc_dst is based on it

instead provide it now from the ldflags

tested on r2dplus

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-07-08 11:43:15 +09:00
Jean-Christophe PLAGNIOL-VILLARD
ce29817212 sh7785lcr: fix out of tree build
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2009-07-08 11:43:14 +09:00
HeungJun Kim
2e8a6f551c env_onenand: change env_address type from unsigned long to loff_t
If use the onenand boot, the env_relocate_spec() calls mtd->read(),
and the type of the argument #2 of mtd->read() was changed to loff_t.
But, the "env_addr" type is still unsigned long, thus this patch change
the type from unsigned long to loff_t.

Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:11 -05:00
Mingkai Hu
66372fe2ab fsl_elbc_nand: redirect the pointer of bbt pattern to RAM
The bbt descriptors contains the pointer to the bbt pattern which
are statically initialized memory struct. When relocated to RAM,
these pointers will continue point to NOR flash(or L2 SRAM, or
other boot device). If the contents of NOR flash changed or L2
SRAM disabled, it'll hang the system.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:10 -05:00
Scott Wood
1dac3a5187 nand_spl: Fix cmd_ctrl usage in nand_boot.c.
When adding large page NAND support to this file, I had a misunderstanding
about the exact semantics of NAND_CTRL_CHANGE (which isn't documented
anywhere I can find) -- it is apparently just a hint to drivers,
which aren't required to preserve the old value for subsequent
non-"change" invocations.

This change makes nand_boot.c no longer assume this.  Note that this
happened to work by chance with some NAND drivers, which don't preserve
the value, but treat 0 equivalently to NAND_CTRL_ALE.

I don't have hardware to test this, so any testing is appreciated.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:10 -05:00
kevin.morfitt@fearnside-systems.co.uk
98713d2663 Bug-fix in drivers mtd nand Makefile
The S3C2410 NAND driver source file is included in the makefile instead of
the object file.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:09 -05:00
Guennadi Liakhovetski
b74ab73736 nand_spl: read environment early, when booting from NAND using nand_spl
Currently, when booting from NAND using nand_spl, in the beginning the default
environment is used until later in boot process the dynamic environment is read
out. This way environment variables that must be interpreted early, like the
baudrate or "silent", cannot be modified dynamically and remain at their
default values. Fix this problem by reading out main and redundand (if used)
copies of the environment in the nand_spl code.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:07 -05:00
Jean-Christophe PLAGNIOL-VILLARD
378adfcdf4 mtd: nand: use loff_t for offset
nand_util currently uses size_t which is arch dependent and not always a
unsigned long.  Now use loff_t, as does the linux mtd layer.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:06 -05:00
Wolfgang Denk
8360b66bac nand/onenand: Fix missing argument checking for "markbad" command
The "nand markbad" and "onenand markbad" commands did not check if an
argument was passed; if this was forgotten, no error was raised but
block 0 was marked as bad.

While fixing this bug, clean up the code a bit and allow to pass more
than one block address, thus allowing to mark several blocks as bad
in a single command invocation.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:05 -05:00
Mike Frysinger
cd84423a09 mtd: nand: new base driver for memory mapped nand devices
The BF537-STAMP Blackfin board had a driver for working with NAND devices
that are simply memory mapped.  Since there is nothing Blackfin specific
about this, generalize the driver a bit so that everyone can leverage it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:04 -05:00
Guennadi Liakhovetski
d27bc728cf env_nand: remove unused variable.
Remove an unused "total" variable in multiple functions.

Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:03 -05:00
David Brownell
154b5484ac davinci_nand chipselect/init cleanup
Update chipselect handling in davinci_nand.c so that it can
handle 2 GByte chips the same way Linux does:  as one device,
even though it has two halves with independent chip selects.
For such chips the "nand info" command reports:

  Device 0: 2x nand0, sector size 128 KiB

Switch to use the default chipselect function unless the board
really needs its own.  The logic for the Sonata board moves out
of the driver into board-specific code.  (Which doesn't affect
current build breakage if its NAND support is enabled...)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:03 -05:00
Sandeep Paulraj
496863b244 NAND DaVinci: Update to ALE/CLE Mask values
All DaVinci SOC's use a CLE mask of 0x10 and an ALE mask of 0x8
except the DM646x. This was decided by the design team driving the design.
This patch updates the CLE and ALE values for DM646x.
Updated patches for DM646x will be sent shortly.
This applies to u-boot-nand-flash git

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:02 -05:00
Sandeep Paulraj
0c1684437e ARM DaVinci: Changing ALE Mask Value
The ALE mask used by DaVinci SOCs is wrong. The patch changes the mask value
from '0xa' to '0x8'. This is the mask we use for all TI releases.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:02 -05:00
David Brownell
6e29ed8e57 davinci_nand: cleanup II (CONFIG_SYS_DAVINCI_BROKEN_ECC)
Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option.  It's not just nasty;
it's also unused by any current boards, and doesn't even match the
main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC
on newer chips that support it).

DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30,
match non-BROKEN code paths for 1-bit HW ECC.  The BROKEN code paths
do seem to partially match what MontaVista/TI kernels (4.0/2.6.10,
and 5.0/2.6.18) do ... but only for small pages.  Large page support
is really broken (and it's unclear just what software it was trying
to match!), and the ECC layout was making three more bytes available
for use by filesystem (or whatever) code.

Since this option itself seems broken, remove it.  Add a comment
about the MV/TI compat issue, and the most straightforward way to
address it (should someone really need to solve it).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:58:01 -05:00
David Brownell
fcb7747775 davinci_nand: cleanup I (minor)
Minor cleanup for DaVinci NAND code:

 - Use I/O addresses from nand_chip; CONFIG_SYS_NAND_BASE won't
   be defined when there are multiple chipselect lines in use
   (as with common 2 GByte chips).

 - Cleanup handling of EMIF control registers
    * Only need one pointer pointing to them
    * Remove incorrect and unused struct supersetting them

 - Use the standard waitfunc; we don't need a custom version

 - Partial legacy cleanup:
    * Don't initialize every board like it's a DM6446 EVM
    * #ifdef a bit more code for BROKEN_ECC

Sanity checked with small page NAND on dm355 and dm6446 EVMs;
and large page on dm355 EVM (packaged as two devices, not one).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-07-07 17:44:55 -05:00
Wolfgang Denk
59869ca72d Merge branch 'master' of git://git.denx.de/u-boot-video 2009-07-07 23:18:03 +02:00
Wolfgang Denk
8e5e9b940c Coding style cleanup; update CHANGELOG
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-07 22:35:02 +02:00
Wolfgang Denk
a48ecc969f Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
	drivers/spi/Makefile

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-07-07 22:22:05 +02:00
Wolfgang Denk
bec9cab929 Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxx 2009-07-07 21:06:07 +02:00
Wolfgang Denk
37572cde7f Merge branch 'master' of git://git.denx.de/u-boot-ubi 2009-07-07 20:58:30 +02:00
Wolfgang Denk
bc1bdab940 Merge branch 'sf' of git://git.denx.de/u-boot-blackfin 2009-07-07 20:56:56 +02:00
Wolfgang Denk
73e1140b49 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2009-07-07 20:54:12 +02:00
Stefan Roese
d318d0c44d UBI: Fix build problem noticed on Apollon (arm/testing repo)
This patch fixes a build problem noticed on Apollon by using
mtd_dev_by_eb() instead of "/" as done in the Linux UBI version.
So this brings the U-Boot UBI version more in sync with the Linux
version again.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-07-07 16:33:44 +02:00
Prafulla Wadaskar
2efee52b09 sf: Macronix additional chips supported
new chips supported:-
MX25L1605D, MX25L3205D, MX25L6405D, MX25L12855E
out of which MX25L6405D and MX25L12855E tested on Kirkwood platforms

Modified the Macronix flash support to use 2 bytes of device id instead of 1
This was required to support MX25L12855E

Signed-off-by: Piyush Shah <spiyush@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-06 18:46:20 -04:00
Mike Frysinger
dd54126715 sf: sst: add sst25vf###b ids
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-06 18:46:20 -04:00
Mike Frysinger
7d907f0ea9 sf: sst: fix sector size
Looks like when I was encoding the sector sizes, I forgot to divide by 8
(due to the stupid marketing driven process that declares all sizes in
useless megabits and not megabytes).

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-07-06 18:46:20 -04:00
Jean-Christophe PLAGNIOL-VILLARD
ceb70b466e nhk8815: fix MAKEALL
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-07-06 21:53:21 +02:00
Magnus Lilja
d08e5ca301 MX31: Add NAND SPL boot support to i.MX31 PDK board.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2009-07-06 21:53:18 +02:00
Prafulla Wadaskar
78eabb90b7 arm: Kirkwood: arch specific updated for ehci-Kirkwood driver support
This patch abstracts Kirkwood arch specific changes to support ehci-kirkwood driver

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-07-06 21:53:15 +02:00
Alessandro Rubini
095a460b49 arm nomadik: use 1000 as HZ value and rewrite timer code
This sets CONFIG_SYS_HZ to 1000 as required, and completely rewrites
timer code, which is now both correct and much smaller.  Unused
functions like udelay_masked() have been removed as no driver uses
them, even the ones that are not currently active for this board.
mtu.h is copied literally from the kernel sources.

Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-07-06 21:53:08 +02:00
Alessandro Rubini
f7aa59b29a arm nomadik: allow Nand and OneNand to coexists
The evaluation kit has both Nand and OneNand, both drivers are there
and the two configurations only select a different default for the
jffs partition. This adds the OneNand driver and cleans up storage.

Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
2009-07-06 21:53:06 +02:00
Alessandro Rubini
fd14c41a86 arm nomadik: cleanup reset
There is only one public release of the Nomadik chip, so the ifdef
in reset code as well as a define in the config file are not needed

Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
2009-07-06 21:53:03 +02:00
Alessandro Rubini
ee1363f2da arm nomadik: rename board to nhk8815
This is an error in my side in the initial submission: nobody
calls it ""nmdk8815", it's "nomadik hardware kit", nhk8815, instead.

Signed-off-by: Alessandro Rubini <rubini@unipv.it>
Acked-by: Andrea Gallo <andrea.gallo@stericsson.com>
2009-07-06 21:53:00 +02:00
Stefano Babic
040f8f63e9 xscale: add support for the polaris board
The Polaris board is based on the TrizepsIV module of
Keith & Koep (http://www.keith-koep.com).

Signed-off-by: Stefano Babic <sbabic@denx.de>
2009-07-06 21:52:58 +02:00
Stefano Babic
88bd975013 xscale: fix USB initialization for Trizepsiv module
Due to change in the usb_board_init() prototype, the USB for
the TrizepsIV was not correctly initialized.
Removed dummy print from usb_board_stop().

Signed-off-by: Stefano Babic <sbabic@denx.de>
2009-07-06 21:52:55 +02:00
Prafulla Wadaskar
0b785ddd60 net: merge bugfix: Marvell Kirkwood gigabit ethernet driver
This patch looks okay on u-boot-net.git/next branch
but when it was merged to u-boot.git/master the last line is missing

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
2009-07-06 21:52:53 +02:00
Daniel Gorsulowski
33b1d3f43a at91: Add esd gmbh MEESC board support
This patch adds support for esd gmbh MEESC board.
The MEESC is based on an Atmel AT91SAM9263 SoC.

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
2009-07-06 21:52:50 +02:00
Jean-Christophe PLAGNIOL-VILLARD
21761540b4 ARM: Update mach-types
update against linux v2.6.30

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-07-06 21:52:47 +02:00
Daniel Gorsulowski
45627fce18 at91: Add CAN init function
To enable CAN init, CONFIG_CAN has to be defined in the board config file
and at91_can_hw_init() has to be called in the board specific code.

CAN is available on AT91SAM9263 and AT91CAP9 SoC.

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
2009-07-06 21:52:43 +02:00
Simon Kagstrom
2e23008e5d arm: Kirkwood: Correct header define
Correct define typo (. -> ,)

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-07-06 21:52:41 +02:00
Magnus Lilja
8449f287f5 MX31: Add basic support for Freescale i.MX31 PDK board.
Add support for Freescale's i.MX31 PDK board (a.k.a. 3 stack board).

This patch assumes that some other program performs the actual
NAND boot.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
Acked-by: Fabio Estevam <fabioestevam@yahoo.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-07-06 21:52:38 +02:00
Jean-Christophe PLAGNIOL-VILLARD
8d460a573e S3C24x0: extract interrupts from timer
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-07-06 21:52:35 +02:00
Jean-Christophe PLAGNIOL-VILLARD
c8badbe500 dm355/pm9261: add missing CONFIG_NET_MULTI
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-07-06 21:52:33 +02:00
Jean-Christophe PLAGNIOL-VILLARD
798bf9a9ad arm920t/interrupts: Move conditional compilation to Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-07-06 21:52:30 +02:00
Kim, Heung Jun
06e758e75c move L2 cache enable/disable function to cache.c in the omap3 SoC directory
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
CC: Dirk Behme <dirk.behme@googlemail.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-07-06 21:52:25 +02:00
Thomas Lange
d583ef5147 ARM DaVinci: EMIF settings
NAND module should not modify EMIF registers unrelated to CS2
that is used for NAND, i.e. do not modify EWAIT config register
or registers for other Chip Selects.

Without this patch, EMIF configurations made in board_init()
will be invalidated.

Signed-off-by: Thomas Lange <thomas@corelatus.se>
2009-07-06 21:52:23 +02:00
Jean-Christophe PLAGNIOL-VILLARD
2600b8571a versatile: config coding style cleanup
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Peter Pearse <peter.pearse@arm.com>
2009-07-06 21:52:19 +02:00
Prafulla Wadaskar
4efb77d41f arm: Kirkwood: Basic SOCs support
Kirkwood family controllers are highly integrated SOCs
based on Feroceon-88FR131/Sheeva-88SV131/arm926ejs cpu core.

SOC versions supported:-
1) 88F6281-A0       define CONFIG_KW88F6281_A0
2) 88F6192-A0       define CONFIG_KW88F6192_A0

Other supported features:-
1) get_random_hex() fucntion
2) PCI Express port initialization
3) NS16550 driver support

Contributors:
Yotam Admon <yotam@marvell.com>
Michael Blostein <michaelbl@marvell.com

Reviewed-by: Ronen Shitrit <rshitrit@marvell.com>
Acked-by: Stefan Rose <sr@denx.de>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-07-06 21:52:17 +02:00
Prafulla Wadaskar
5c3d5817e5 arm: generic cache.h for ARM architectures
This patch is required for Kirkwood SoC support
may be used by other ARM architectures

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-07-06 21:52:15 +02:00
Matthias Ludwig
9c8c706c92 OMAP3EVM: fix typo. replace CS6 by CS5, no functionality change
Signed-off-by: Matthias Ludwig <mludwig@ultratronik.de>
2009-07-06 21:52:12 +02:00
Sedji Gaouaou
0aafde1dc7 at91sam9260/9263: add back up for the rst(reset controller).
On the boards at91sam9260ek, at91sam9263ek and afed9260, the rstc register was
set to 0 after being set to 500 ms for the PHY reset.
Do backup the old reset length and restore it after the MACB initialisation.

Signed-off-by: Sedji Gaouaou <sedji.gaouaou@atmel.com>
Signed-off-by: Stelian Pop <stelian@popies.net>
2009-07-06 21:50:09 +02:00
Kumar Gala
afb0b1315c fsl: Fix compiler warnings from gcc-4.4 in sys_eeprom code
sys_eeprom.c: In function 'do_mac':
sys_eeprom.c:323: warning: dereferencing type-punned pointer will break strict-aliasing rules
sys_eeprom.c: In function 'mac_read_from_eeprom':
sys_eeprom.c:395: warning: dereferencing type-punned pointer will break strict-aliasing rules

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-03 12:46:47 -05:00
Peter Tyser
e94e460c6e 83xx: Add support for fsl_dma driver
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Reviewed-by: Ira W. Snyder <iws@ovro.caltech.edu>
Tested-by: Ira W. Snyder <iws@ovro.caltech.edu>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-02 11:15:57 -05:00
Peter Tyser
9adda5459c 83xx: Replace CONFIG_ECC_INIT_VIA_DDRC references
Update 83xx architecture's CONFIG_ECC_INIT_VIA_DDRC references to
CONFIG_ECC_INIT_VIA_DDRCONTROLLER, which other Freescale architectures
use

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-02 11:15:49 -05:00
Poonam Aggrwal
039594a430 8xxx: Second UART port added for MPC85xx, MPC83xx, MPC86xx processors
Defining the next two configs allows to switch the serial port from the
console using the setenv stdin and stdout
  1. #define CONFIG_SERIAL_MULTI 1 /* Enable both serial ports */
  2. #define CONFIG_SYS_CONSOLE_IS_IN_ENV /* determine from environment */

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-02 08:34:13 -05:00
Poonam Aggrwal
546b103290 85xx: Adds GPIO registers to MPC85xx Memory Map.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-02 08:33:20 -05:00
Peter Tyser
5da6f806b4 86xx: XPedite5170 board support
Initial support for Extreme Engineering Solutions XPedite5170 -
a MPC8640-based 3U VPX single board computer with a PMC/XMC
site.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-01 23:25:48 -05:00
Timur Tabi
e66f38da84 fsl_ddr: Fix DDR3 calculation of rank density with 8GB or more
The calculate for rank density in compute_ranksize() for DDR3 used all
integers for the expression, so the result was also a 32-bit integer, even
though the 'bsize' variable is a u64.  Fix the expression to calculate a
true 64-bit value.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-01 23:21:43 -05:00
Peter Tyser
6af015b86b fsl_dma: Make DMA transactions snoopable
Make DMA transactions snoopable so that CPUs can keep caches up-to-date.
This allows dma transactions to be used for operations such as memory
copies without any additional cache control operations.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-01 23:12:05 -05:00
Peter Tyser
0d595f76bc fsl_dma: Break out common memory initialization function
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-01 23:12:01 -05:00
Peter Tyser
79f4333ceb 8xxx: Move dma_init() call to common code
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-01 23:12:00 -05:00
Peter Tyser
191c711859 fsl_dma: Move dma function prototypes to common header file
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-01 23:11:52 -05:00
Peter Tyser
7892f619d4 8xxx: Rename dma_xfer() to dmacpy()
Also update dmacpy()'s argument order to match memcpy's and use
phys_addr_t/phy_size_t for address/size arguments

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-01 23:07:47 -05:00
Peter Tyser
484919cf33 fsl_dma: Fix Channel Start bug in dma_check()
The Channel Start (CS) bit in the Mode Register (MR) should actually be
cleared as the comment in the code suggests.  Previously, CS was being
set, not cleared.

Assuming normal operation of the DMA engine, this change shouldn't have
any real affect.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-01 23:07:45 -05:00
Peter Tyser
51402ac12b fsl_dma: Add support for arbitrarily large transfers
Support DMA transfers larger than the DMA controller's limit of
(2 ^ 26 - 1) bytes

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-01 23:07:43 -05:00
Peter Tyser
a730393a36 fsl_dma: Use proper I/O access functions
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-01 23:02:24 -05:00
Peter Tyser
9c06071a60 fsl_dma: Add bitfield definitions for common registers
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-01 23:01:55 -05:00
Peter Tyser
017f11f68e 8xxx: Break out DMA code to a common file
DMA support is now enabled via the CONFIG_FSL_DMA define instead of the
previous CONFIG_DDR_ECC

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-07-01 23:01:51 -05:00
Mark Jackson
6bbced6717 Atmel LCD driver GUARDTIME fix
This patch allows the guard time parameter to be set in
the Atmel LCDC driver.

By default, the previous value of 1 is used, unless the
setting is defined elsewhere.

Signed-off-by: Mark Jackson <mpfj@mimc.co.uk>
2009-06-30 16:22:35 +02:00
Roy Zang
29c3518246 85xx: Add pci e1000 Ethernet support for P2020 board
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-30 08:26:34 -05:00
Kumar Gala
156984a361 8xxx: Fix PCI bus address setup for 36-bit configs
We want the outbound PCI memory map to end at the 4G boundary so we
can maximize the amount of space available for inbound mappings if
we have large amounts of memory.

This matches the device tree setup in the kernel for the 36-bit physical
configs for the platforms that have one (MPC8641 HPCN & MPC8572 DS).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-30 08:24:22 -05:00
Kumar Gala
480f617905 86xx: Add CPU_TYPE_ENTRY support
Unify with 83xx and 85xx and use CPU_TYPE_ENTRY.  We are going to use
this to convey the # of cores and DDR width in the near future so its
good to keep in sync.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-30 08:24:22 -05:00
Peter Meerwald
98ab14e858 Blackfin: TWI/I2C: fix pure writes
If doing a pure write with register address and data (not a read/write
combo transfer), we don't set the initial transfer length properly which
ends up causing only the register address to be transferred.

While we're here, fix the i2c_write() parameter description of the buffer.

Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-30 08:27:45 +02:00
Prafulla Wadaskar
5710de4580 spi: Add Marvell Kirkwood SPI driver
This patch adds a SPI driver for the Marvell Kirkwood SoC's.

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-06-26 00:59:09 +02:00
Minkyu Kang
6bde171a4c s3c64xx: move the reset_cpu function
Because of the reset_cpu is soc specific, should be move to soc
And read reset value from SYS_ID register instead of hard code
this patch also supports s3c6410

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-06-26 00:02:35 +02:00
Jean-Christophe PLAGNIOL-VILLARD
576afd4fae integrator: merge integratorap and integratorcp
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Peter Pearse <peter.pearse@arm.com>
2009-06-23 00:10:04 +02:00
Jean-Christophe PLAGNIOL-VILLARD
46937b2742 integratorap/cp: use cfi driver
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Peter Pearse <peter.pearse@arm.com>
2009-06-23 00:10:04 +02:00
Jean-Christophe PLAGNIOL-VILLARD
de7a01abd8 integratorap/cp/versatile: remove non used functions
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Peter Pearse <peter.pearse@arm.com>
2009-06-23 00:10:04 +02:00
Jean-Christophe PLAGNIOL-VILLARD
f54851a6e3 integratorcp: split timer support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Peter Pearse <peter.pearse@arm.com>
2009-06-23 00:10:03 +02:00
Jean-Christophe PLAGNIOL-VILLARD
2bcef0723e integratorap: split timer support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Peter Pearse <peter.pearse@arm.com>
2009-06-23 00:10:03 +02:00
Jean-Christophe PLAGNIOL-VILLARD
86baa085c5 integratorap: split pci support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Peter Pearse <peter.pearse@arm.com>
2009-06-23 00:10:03 +02:00
Ilya Yanok
379e9fc0a3 arm: add support for CONFIG_GENERIC_MMC
Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2009-06-21 16:18:13 +02:00
Ilya Yanok
47d19da4d3 serial_mx31: allow it to work with mx27 too and rename to serial_mxc
UART hardware on i.MX27 is the same as on the i.MX31 so we just
need to provide the driver with correct address of the registers.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2009-06-21 16:18:13 +02:00
Ilya Yanok
1dc4da749d mx27: basic cpu support
This patch adds generic code to support Freescale's i.MX27 SoCs.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2009-06-21 16:18:13 +02:00
Magnus Lilja
dd2f6965a6 i.MX31: Create a common device file.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2009-06-21 16:18:13 +02:00
Jean-Christophe PLAGNIOL-VILLARD
958f7da788 ARM: Add macros.h to be used in assembler file.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-21 16:18:12 +02:00
Magnus Lilja
40c642bc19 MX31: Add NAND SPL for i.MX31.
This patch adds the NAND SPL framework needed to boot i.MX31 boards
from NAND.

It has been tested on a i.MX31 PDK board with large page NAND. Small
page NANDs should work as well, but this has not been tested.

Note: The i.MX31 NFC uses a non-standard layout for large page NANDs,
whether this is compatible with a particular setup depends on how
the NAND device is programmed by the flash programmer (e.g. JTAG
debugger).

The patch is based on the work by Maxim Artamonov.

Signed-off-by: Maxim Artamonov <scn1874@yandex.ru>
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2009-06-21 16:18:12 +02:00
Magnus Lilja
df81238b3e ARM1136: Introduce CONFIG_PRELOADER macro.
Currently CONFIG_ONENAND_IPL is used in a number of #ifdef's
in start.S. In preparation for adding support for NAND SPL
the macro CONFIG_PRELOADER is introducted and replaces the
CONFIG_ONENAND_IPL in start.S.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2009-06-21 16:18:12 +02:00
Jean-Christophe PLAGNIOL-VILLARD
8096c51fd4 at91: unify nor boot support
the lowlevel init sequence is the same so unify it

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-21 16:18:12 +02:00
Jean-Christophe PLAGNIOL-VILLARD
1b3b7c640d at91sam9263ek: add nor flash support
this will allow you to store use it for the env and to boot directly U-Boot from

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-21 16:18:11 +02:00
Ilko Iliev
3294923297 at91: add support for the PM9261 board of Ronetix GmbH
The PM9261 board is based on the AT91SAM9261-EK board.

Here is the page on Ronetix website:
http://www.ronetix.at/starter_kit_9261.html

Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-21 16:18:11 +02:00
Jean-Christophe PLAGNIOL-VILLARD
01550a2b65 pm9263: use macro instead of hardcode value for the lowlevel_init
optimize a few the RAM init

Signed-off-by: Ilko Iliev <iliev@ronetix.at>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-21 16:18:11 +02:00
Jean-Christophe PLAGNIOL-VILLARD
7a11c7f974 pm9263: lowlevel init update
move PSRAM init to pm9263.c
this will allow us after to make the nor lowlevel_init generic

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-21 16:18:11 +02:00
Mike Frysinger
3e88337b22 Blackfin: move ALL += u-boot.ldr to blackfin_config.mk
The way the ALL variable is used allows for config.mk's to add more
targets themselves without having to clutter up the top level Makefile.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-15 13:30:27 -04:00
Mike Frysinger
afac8b0717 Blackfin: fix SPI flash speed define name
The SPI flash define is named CONFIG_SF_DEFAULT_SPEED, not
CONFIG_SF_DEFAULT_HZ, so fix the typos in the Blackfin boards.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-15 13:30:21 -04:00
Mike Frysinger
9ae55ccf60 Blackfin: enable -O2 in lib_generic/ for ADI/Bluetechnix boards
Building the compression code in lib_generic/ with -O2 rather than -Os
gives a nice speed boost without too much code size increase.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-15 13:30:19 -04:00
Mike Frysinger
fea63e2a44 Blackfin: bf548-ezkit: bump up monitor size
The latest version of U-Boot got a bit fatter in the BSS section which
caused overflows in the RAM region, so increase the monitor size.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-15 13:30:18 -04:00
Vivi Li
bc43a8d899 Blackfin: bf533-stamp/bf537-stamp: fix env settings for SPI flash
The SPI flash layer is much stricter about sector usage than the eeprom
layer we used to use, so update the env settings to better match the
sector alignment of the flashes we use.

Signed-off-by: Vivi Li <vivi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-15 13:30:16 -04:00
Vivi Li
63cb0f4eb2 Blackfin: bump up default JTAG console timeout
The debug tools that interface with the other side of the JTAG console
got much slower when generalizing things, so bump up the default timeout
value on the U-Boot side to cope.  Hopefully at some point we can improve
the debug tools to speed things back up.

Signed-off-by: Vivi Li <vivi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-15 13:30:08 -04:00
Wolfgang Denk
57fe30194d Merge branch 'master' of /home/wd/git/u-boot/custodians 2009-06-15 11:16:04 +02:00
Wolfgang Denk
c9005a72fe Merge branch 'master' of git://git.denx.de/u-boot-net 2009-06-15 11:15:54 +02:00
Mike Frysinger
c11ff779f4 Blackfin: add jtagconsole helper script
This script is similar to the netconsole script, but instead works with
the JTAG console device driver that exists on Blackfin parts.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-15 11:15:04 +02:00
Remy Bohmer
60f61e6d76 Convert DM9000 driver for CONFIG_NET_MULTI
All drivers need to be converted to CONFIG_NET_MULTI.
This patch converts the dm9000 driver.

Signed-off-by: Thomas Smits <ts.smits@gmail.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-06-15 00:13:55 -07:00
Prafulla Wadaskar
9131589ada net: Add Marvell Kirkwood gigabit ethernet driver
This patch adds a egiga driver for the Marvell Kirkwood SoC's.

Contributors:
Yotam Admon <yotam@marvell.com>
Michael Blostein <michaelbl@marvell.com

Reviewed-by: Ronen Shitrit <rshitrit@marvell.com>
Acked-by: Stefan Rose <sr@denx.de>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-06-15 00:13:55 -07:00
s-paulraj@ti.com
7835f4b949 DaVinci Network Driver Updates
Different flavours of DaVinci SOC's have differences in their EMAC IP
This patch does the following
1) Updates base addresses for DM365
2) Updates MDIO frequencies for DM365 and DM646x
3) Update EMAC wrapper registers for DM365 and DM646x

Patch applies to u-boot-net git. the EMAC driver itself
will be updated shortly to add support for DM365 and DM646x

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-06-15 00:13:55 -07:00
Richard Retanubun
44578bea14 Subject: [PATCH] [repost] Standardize the use of MCFFEC_TOUT_LOOP as a udelay(1) loop counter.
From 584b5fbd4abfc43f920cc1c329633e03816e28be Mon Sep 17 00:00:00 2001
From: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Date: Wed, 20 May 2009 18:26:01 -0400
Subject: [PATCH] Standardize the use of MCFFEC_TOUT_LOOP as a udelay(1) loop counter.

Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-06-15 00:13:55 -07:00
Norbert van Bolhuis
c9a2aab151 A VLAN tagged DHCP request/discover is 4 bytes short
The problem is that BOOTP_SIZE uses ETHER_HDR_SIZE which is 14 bytes.
If sending a VLAN tagged frame (when env variable vlan is set) this
should be VLAN_ETHER_HDR_SIZE=18 which is what NetSetEther returns.

Signed-off-by: Norbert van Bolhuis <nvbolhuis@aimvalley.nl>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-06-15 00:13:55 -07:00
Ben Warren
6e0d2fc7fe Remove support for non-CONFIG_NET_MULTI on PPC4xx EMAC
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-06-15 00:13:54 -07:00
Ben Warren
8453587ef9 Switched davinci_emac Ethernet driver to use newer API
Added CONFIG_NET_MULTI to all Davinci boards
Removed all calls to Davinci network driver from board code
Added cpu_eth_init() to cpu/arm926ejs/cpu.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-06-15 00:13:54 -07:00
Ben Warren
8cc13c13f1 Initial cleanup of Davinci Ethernet driver
Removed pointless #ifdefs
 Moved functions around in file in preparation for switch to newer API

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-06-15 00:13:54 -07:00
Ben Warren
09cdd1b9b0 Moved Davinci Ethernet driver to drivers/net
This driver has been renamed davinci_emac.c

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-06-15 00:13:54 -07:00
Prafulla Wadaskar
6f51deb7f2 Marvell MV88E61XX Switch Driver support
Chips supported:-
1. 88E6161 6 port gbe swtich with 5 integrated PHYs
2. 88E6165 6 port gbe swtich with 5 integrated PHYs
2. 88E6132 3 port gbe swtich with 2 integrated PHYs
Platform specific configuration supported for:-
default or router port vlan configuration
led_init configuration
mdip/n polarity reversal configuration

Note: This driver is supported and tested against
kirkwood egiga interface

Contributors:
Yotam Admon <yotam@marvell.com>
Michael Blostein <michaelbl@marvell.com

Reviewed by: Ronen Shitrit <rshitrit@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-06-15 00:13:54 -07:00
Zach LeRoy
091dc9f6ad tsec: Add support for BCM5482S PHY
Signed-off-by: Zach LeRoy <zleroy@xes-inc.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2009-06-15 00:13:54 -07:00
Mike Frysinger
9ff67e5e4c Blackfin: unify u-boot linker scripts
All the Blackfin linker scripts were duplicated across the board dirs with
no difference save from the semi-often used ENV_IS_EMBEDDED option.  So
unify all of them in the lib_blackfin/ dir and for the few boards that
need to embedded the environment directly, add a LDS_BOARD_TEXT define for
them to customize via their board config file.  This is much simpler than
forcing them to duplicate the rest of the linker script.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:14 -04:00
Mike Frysinger
f52efcae98 Blackfin: bf518f-ezbrd: enable SST SPI flash driver
The BF51xF parts have an internal SST SPI flash, so make sure the driver is
enabled by default so we can access it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:13 -04:00
Mike Frysinger
f348ab85f7 Blackfin: convert specific pre/post config headers to common method
The Blackfin port was using asm/blackfin-config-{pre,post}.h to setup
common Blackfin board defines.  The common method now is to use config.h,
so convert blackfin-config-post.h to that.  Rename the still Blackfin
specific blackfin-config-pre.h to config-pre.h so the naming conventions
at least line up.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:13 -04:00
Mike Frysinger
7c7503ee6c Blackfin: enable LZMA for all ADI boards
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:12 -04:00
Mike Frysinger
0e63dc0679 Blackfin: make default ADI env more flexible
Allow boards to easily override the root= and default bootcmd, allow
people to tweak the file used in default bootcmds at runtime via one env
var, and add a stock nandboot command.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:12 -04:00
Hoan Hoang
0f52b560f1 Blackfin: ibf-dsp561: new board port
Signed-off-by: Hoan Hoang <hnhoan@i-syst.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:11 -04:00
Mike Frysinger
3088189a15 Blackfin: blackstamp: new board port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:11 -04:00
Mike Frysinger
59ac972970 Blackfin: bf537-srv1: new board port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:10 -04:00
Mike Frysinger
d7fdc1410b Blackfin: bf537-minotaur: new board port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:09 -04:00
Mike Frysinger
cb4b5e874f Blackfin: bf537-pnav: new board port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:08 -04:00
Mike Frysinger
59e4be945b Blackfin: cm-bf527: new board port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:07 -04:00
Mike Frysinger
8b219cf07c Blackfin: cm-bf548: new board port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:07 -04:00
Mike Frysinger
9417d9a213 Blackfin: tcm-bf537: new board port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:06 -04:00
Mike Frysinger
e548321af0 Blackfin: cm-bf561: new board port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:06 -04:00
Mike Frysinger
8a9bab08a6 Blackfin: cm-bf537e: new board port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:05 -04:00
Mike Frysinger
e82d8a1f02 Blackfin: cm-bf533: new board port
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:04 -04:00
Mike Frysinger
dd14af7640 Blackfin: new spibootldr command
Newer Blackfin parts can an on-chip ROM that can boot LDRs over SPI flashes,
so add a new 'spibootldr' command to take advantage of it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:04 -04:00
Mike Frysinger
67c2829b64 Blackfin: support embedding the environment into loader files (LDRs)
For the most part, the Blackfin processor boots files in the LDR format
rather than binary/ELF files.  So we want to export the environment as a
raw blob to the LDR utility so it can embed it at the right location.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 20:01:03 -04:00
Mike Frysinger
31f30c9eb6 add %.c->%.i and %.c->%.s rules
The Linux kernel has some helper rules which allow you to quickly produce
some of the intermediary files from C source.  Specifically, you can
create .i files which is the preprocessed output and you can create .s
files which is the assembler output.  This is useful when you are trying
to track down header/macro expansion errors or inline assembly errors.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-14 23:36:47 +02:00
Mike Frysinger
6d1ce38787 make sure toplevel $(SUBDIRS) is always declared
The $(SUBDIRS) variable is only declared when U-Boot has been configured,
but it gets used all the time.  In the non-configured case, it is used to
generate a helpful error message, but it needs to be set properly for that
to occur.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-14 23:12:30 +02:00
Grzegorz Bernacki
1260233982 digsy mtc: Add description to GPIO initial configuration.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2009-06-14 23:06:03 +02:00
Grzegorz Bernacki
12304871bc digsy MTC: Add 'mtc' command.
New command allows to:
     o check FW version
     o set LED status
     o set digital output status
     o get digital input status

Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2009-06-14 23:04:37 +02:00
Grzegorz Bernacki
f1f66edfc7 digsy MTC: Add SPI support.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2009-06-14 23:03:57 +02:00
Grzegorz Bernacki
6325b7780d mpc52xx: Add SPI driver.
Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
2009-06-14 23:01:38 +02:00
Mike Frysinger
5ec5529b82 allow boards to customize compiler options on a per-file/dir basis
With our Blackfin boards, we like to build the compression routines with
-O2 as our tests show a pretty good size/speed tradeoff.  For the rest of
U-Boot though, we want to stick with the default -Os as that is mostly
control code.  So in our case, we would add a line like so to the board
specific config.mk file:
	CFLAGS_lib_generic += -O2

Now all files under lib_generic/ will have -O2 appended to their build.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-14 22:44:24 +02:00
Wolfgang Denk
92afd368bb Merge branch 'next' of ../master 2009-06-14 22:05:42 +02:00
Peter Tyser
388517e4b7 xes: Update Freescale clock code to work with 86xx processors
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:23:47 -05:00
Peter Tyser
25623937bb xes: Update Freescale DDR code to work with 86xx processors
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:23:45 -05:00
Peter Tyser
bef3013908 xes: Update Freescale PCI code to work with 86xx processors
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:23:43 -05:00
Peter Tyser
6442b71b52 85xx: Add PORBMSR and PORDEVSR shift defines
Add defines similar to those already used for the the 86xx architecture.
This will ease sharing of PCI code between the 85xx and 86xx
architectures.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:20:52 -05:00
Peter Tyser
2f21ce4d54 fsl/85xx, 86xx: Sync up DMA code
The following changes were made to sync up the DMA code between the 85xx
and 86xx architectures which will make it easier to break out common
8xxx DMA code:

85xx:
- Don't set STRANSINT and SPCIORDER fields in SATR register.  These bits
  only have an affect when the SBPATMU bit is set.
- Write 0xffffffff instead of 0xfffffff to clear errors in the DMA
  status register.  We may as well clear all 32 bits of the register...

86xx:
- Add CONFIG_SYS_MPC86xx_DMA_ADDR define to address DMA registers
- Add clearing of errors in the DMA status register when initializing
  the controller
- Clear the channel start bit in the DMA mode register after a transfer

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:58 -05:00
Peter Tyser
b1f12650d3 fsl: Create common fsl_dma.h for 85xx and 86xx cpus
Break out DMA structures for the Freescale MPC85xx and MPC86xx cpus to
reduce a large amount of code duplication

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:45 -05:00
Haiying Wang
3bd8e532b5 85xx: Add UEC6 and UEC8 at SGMII mode for MPC8569MDS
On MPC8569MDS board, UCC6 and UCC8 can be configured to work at SGMII mode via
UEM on PB board. Since MPC8569 supports up to 4 Gigabit Ethernet ports, we
disable UEC6 and UEC8 by default.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:02 -05:00
Haiying Wang
e8efef7c1b drivers/qe: add sgmii support in for UEC driver
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:02 -05:00
Haiying Wang
8e55258f14 qe: Pass in uec_info struct through uec_initialize
The uec driver contains code to hard code configuration information for the uec
ethernet controllers. This patch creates an array of uec_info structures, which
are then parsed by the corresponding driver instance to determine configuration.
It also creates function uec_standard_init() to initialize all UEC interfaces
for 83xx and 85xx.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:02 -05:00
Haiying Wang
9a6110897f fsl: Update the number of ethxaddr in reading system eeprom
We support up to 8 mac addresses in system eeprom, so we define the macro
MAX_NUM_PORTS to limit the mac_count to 8, and update the number of ethxaddr
according to mac_count.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:01 -05:00
Haiying Wang
f82107f637 85xx: Add RMII support for MPC8569MDS
This patch supports UCC working at RMII mode on PIB board, fixup fdt blob to
support rmii in kernel. It also changes the name of enable_mpc8569mds_qe_mdio to
enalbe_mpc8569mds_qe_uec which is  more accurate.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:01 -05:00
Haiying Wang
750098d33b 85xx: Add UEC3 and UEC4 support for MPC8569MDS
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:00 -05:00
Haiying Wang
4e7b25e4fe drivers/qe: Add more SNUM number for QE
Some QE chips like 8569 need more SNUM numbers for supporting 4 UECs in RGMII-
1000 mode.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:17:00 -05:00
Haiying Wang
7211fbfa18 drivers/qe: Change QE RISC ALLOCATION to support 4 RISCs
Also define the QE_RISC_ALLOCATION_RISCs to MACROs instead of using enum, and
define MAX_QE_RISC for QE based silicons.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:16:59 -05:00
Haiying Wang
b3d7f20f43 85xx: Add QE clk support
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Acked-by: Timur Tabi <Timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:16:59 -05:00
Kumar Gala
71b358cc26 85xx: Added MPC8535/E identifiers
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:16:26 -05:00
Kumar Gala
22419d7797 85xx: Always attempt ethernet device tree fixup
Its reasonable that we may have ethernet devices but dont have drivers
or support enabled for them in u-boot and want the device tree fixed up.
Unconditionally calling the ethernet fixup is fine since if we dont have
ethernet nodes that match (or aliases) we will not attempt to do
anything.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Timur Tabi <timur@freescale.com>
2009-06-12 17:16:26 -05:00
Haiying Wang
52d6ad5ecf drivers/qe: Rename the camel-case identifiers in uec
Rename riscRx/riscTx to risc_rx/risc_tx to comply with Codingstyle.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
2009-06-12 17:16:25 -05:00
Srikanth Srinivasan
feb7838f97 85xx: Add P2020DS support
The patch adds support for P2020DS reference platform.
DDR3 interface uses hard-coded initialization rather than SPD
for now and was tested at 667Mhz. Some PIXIS register
definitions and associated code sections need to be fixed.
TSEC1/2/3, NOR flash, MAC/SYS ID EEPROM, PCIE1/2/3 are all
tested under u-boot.

Signed-off-by: Srikanth Srinivasan <srikanth.srinivasan@freescale.com>
Signed-off-by: Travis Wheatley <Travis.Wheatley@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-06-12 17:16:25 -05:00
Stefan Roese
229549a56d mpc512x: MPC5121ADS: Add NAND support
This patch adds NAND support to the MPC5121ADS board. Please
note that the image size increased since NAND support didn't
fit in the current image size (256k).

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2009-06-12 20:47:19 +02:00
Stefan Roese
35f2edbb6c nand/mpc512x: Add MPC512x NAND support (NFC)
This patch adds NAND Flash Controller driver for MPC5121 revision 2.
All device features, except hardware ECC and power management, are
supported.

This NFC driver replaces the one orignally posted by John Rigby:

"[PATCH] Freescale NFC NAND driver"

It's a port of the Linux driver version posted by Piotr Ziecik a few
weeks ago. Using this driver has the following advantages (from my
point of view):

- Compatibility with the Linux NAND driver (e.g. ECC usage)
- Better code quality in general
- Resulting U-Boot image is a bit smaller (approx. 3k)
- Better to sync with newer Linux driver versions

The only disadvantage I can see, is that HW-ECC is not supported right
now. But this could be added later (e.g. port from Linux driver after
it's supported there). Using HW-ECC on the MCP5121 NFC has a general
problem because of the ECC usage in the spare area. This collides with
JFFS2 for example.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Piotr Ziecik <kosmo@semihalf.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
Cc: Scott Wood <scottwood@freescale.com>
2009-06-12 20:47:19 +02:00
Stefan Roese
e53b507cee mpc512x: Add esd gmbh mecp5123 board support
MECP5123 is a MPC5121E based module by esd gmbh.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-06-12 20:47:19 +02:00
Stefan Roese
6bd55cc65d mcp512x: Add macros for SCFR LPC divisor access
Thos macros will be used by the esd mecp5123 board.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:47:19 +02:00
Stefan Roese
c60dc8527d mpc512x: Fix problem with I2C access before relocation
This is needed for the upcoming esd MECP5123 board port which uses
I2C EEPROM for environment storage.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Acked-by: Heiko Schocher<hs@denx.de>
2009-06-12 20:47:18 +02:00
Stefan Roese
58f10460b0 74xx_7xx: CPCI750: Add CPCI adapter/target support
The CPCI750 can be built as CPCI host or adapter/target board. This patch
adds support for runtime detection of those variants.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-06-12 20:47:18 +02:00
Stefan Roese
ae7a2739d7 74xx_7xx: CPCI750: Enable access to PCI function > 0
The Marvell bridge 64360 supports serveral PCI functions, not only 0. This
patch enables access to those functions.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-06-12 20:47:18 +02:00
Stefan Roese
e5b563e9ec 74xx_7xx: CPCI750: Minor coding style cleanup of cpci750.c
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-06-12 20:47:18 +02:00
Stefan Roese
0e5ef07d0d 74xx_7xx: CPCI750: Add loadpci command
This command is used to load/boot an OS-image which is transferred from
the CPCI host to the CPCI target/adapter.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-06-12 20:47:18 +02:00
Stefan Roese
0a14d6b8f4 74xx_7xx: CPCI750: Add commandline editing/history
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
2009-06-12 20:47:18 +02:00
Stefan Roese
60cfe87bd3 UBI: Add compile-time check for correct malloc area configuration
UBI is quite memory greedy and requires at least approx. 512k of malloc
area. This patch adds a compile-time check, so that boards will not
build with less memory reserved for this area (CONFIG_SYS_MALLOC_LEN).

Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:47:18 +02:00
Prafulla Wadaskar
7ce6031afc sf: new Macronix MX25xx SPI flash driver
Added macronix SF driver for MTD framework
MX25L12805D is supported and tested
TBD: sector erase implementation, other deivces support

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-12 20:47:18 +02:00
Todor I Mollov
2a6cc58869 sf: atmel: implement power-of-two write/erase funcs
Signed-off-by: Todor I Mollov <tmollov@ucsd.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
CC: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2009-06-12 20:47:18 +02:00
Vivek Mahajan
4bc6eb79be mpc85xx: 8536ds: Add USB related CONFIGs
This patch adds CONFIGs for enabling USB in mpc8536ds and also
adds usb_phy_type in CONFIG_EXTRA_ENV_SETTINGS. Also revamps its
Copyright.

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-06-12 20:47:18 +02:00
Vivek Mahajan
6823e9b012 mpc83xx: 8315erdb: Add USB related CONFIGs
This patch adds CONFIGs for enabling USB in mpc8315erdb and also
adds usb_phy_type in CONFIG_EXTRA_ENV_SETTINGS. Also revamps its
Copyright.

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-06-12 20:47:18 +02:00
Vivek Mahajan
a07bf180ef mpc85xx: USB: Add support
The following patch adds 85xx-specific USB support and also
revamps Copyright in immap_85xx.h

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-06-12 20:47:17 +02:00
Vivek Mahajan
4ef01010aa mpc83xx: USB: Reorganized its support
The following patch reorganizes/reworks the USB support for mpc83xx
as under:-

  * Moves the 83xx USB clock init from drivers/usb/host/ehci-fsl.c to
    cpu/mpx83xx/cpu_init.c

  * Board specific usb_phy_type is read from the environment

  * Adds USB EHCI specific structure in include/usb/ehci-fsl.h

  * Copyrights revamped in most of the following files

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-06-12 20:47:17 +02:00
Vivek Mahajan
ed90d2c871 mpc8xxx: USB: Relocates ehci-fsl.h to include/usb
The following patch moves 8xxx-specifc USB #defines from
drivers/usb/host/ehci-fsl.h to include/usb.

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-06-12 20:47:17 +02:00
Vivek Mahajan
cfd39cdf94 mpc8xxx: USB: Removed reenablement of its interface
To prepare for the 85xx USB support, which requires interface enablement
only once in (specified) order, no different than instructions for
enabling the interface under 83xx.  It is unknown why the original author
enabled the interface twice (checked for references in errata, etc).

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2009-06-12 20:47:17 +02:00
Peter Tyser
2c7920afaf 83xx: Replace CONFIG_MPC83[0-9]X with MPC83[0-9]x
Use the standard lowercase "x" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-06-12 20:47:17 +02:00
Peter Tyser
0f89860494 83xx: Replace CONFIG_MPC83XX with CONFIG_MPC83xx
Use the standard lowercase "xx" capitalization that other Freescale
architectures use for CPU defines to prevent confusion and errors

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-06-12 20:47:17 +02:00
Stefan Roese
ba4feae90c mpc512x: Use serial_setbrg() in serial_init() to not duplicate the code
This patch removes the duplicated code for baudrate generator configuration
in the PSC serial_init() implementation by calling serial_setbrg() instead
of duplicating the code.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:47:17 +02:00
Stefan Roese
b8c1d6a54f mpc512x: Fix PSC divisor calculation for baudrate setting
The wrong input frequency was used in serial_setbrg(). This patch fixes
this by using ips_clk as input frequency for the PSC baudrate generator.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:47:17 +02:00
Wolfgang Denk
52568c3654 MPC512x: add support for ARIA board
ARIA is a MPC5121E based COM Express module by Dave/DENX.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
2009-06-12 20:47:16 +02:00
Wolfgang Denk
3b74e7ec58 MPC512x: remove include/mpc512x.h
Move needed definitions (register descriptions etc.) from
include/mpc512x.h  into  include/asm-ppc/immap_512x.h.

Instead of using a #define'd register offset, use a function that
provides the PATA controller's base address.

All the rest of include/mpc512x.h are register offset definitions
which can be eliminated by proper use of C structures.

There are only a few register offsets remaining that are needed in
cpu/mpc512x/start.S; for these we provide cpu/mpc512x/asm-offsets.h
which is intended as a temporary workaround only. In a later patch
this file will be removed, too, and then auto-generated from the
respective C structs.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
2009-06-12 20:47:16 +02:00
Wolfgang Denk
a927e491b2 MPC512x FEC: get rid of duplicated struct ethernet_regs
Use existing struct fec512x instead.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
2009-06-12 20:47:16 +02:00
Wolfgang Denk
843efb1192 MPC512x: use I/O accessors instead of pointer accesses
This commit changes the MPC512x code to use I/O accessor calls (i.e.
out_*() and in_*()) instead of using deprecated pointer accesses.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
2009-06-12 20:47:16 +02:00
Wolfgang Denk
19dc7e1792 MPC512x: add more hardware description to immap_512x.h
- add GPIO module description
- add Address Latch Timing Register description
- add IO Control Memory Map
- add FEC Memory Map

Also change board/freescale/mpc5121ads/mpc5121ads.c and
cpu/mpc512x/iopin.c as needed.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
2009-06-12 20:47:16 +02:00
Wolfgang Denk
72601d04fd Rename ads5121 board into mpc5121ads
We rename the board so we use a consistent name in U-Boot and in
Linux.  Also, we use this opportunity to move the board into the
Freecale vendor directory.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
2009-06-12 20:47:16 +02:00
Wolfgang Denk
debf874155 cpu/mpc512x/diu.c: fix warning: assignment from incompatible pointer type
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
2009-06-12 20:47:16 +02:00
Wolfgang Denk
8b25126319 cpu/mpc512x/pci.c: minor coding style cleanup
Get rid of variable declaration in the middle of the code.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
2009-06-12 20:47:16 +02:00
Wolfgang Denk
de26ef99bd mpc512x: Move common files to share them by several boards
We will soon see several new MPC521x based boards added.  This patch
moves files that are not board specific to a common directory so they
can be shared by all such ports.  It also splits off common IDE code
into a new file, cpu/mpc512x/ide.c .

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
2009-06-12 20:47:16 +02:00
Wolfgang Denk
03e069dc0a mpc512x: change cpu/mpc512x/Makefile to use Kconfig style
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
2009-06-12 20:47:16 +02:00
Wolfgang Denk
a89c33db96 General help message cleanup
Many of the help messages were not really helpful; for example, many
commands that take no arguments would not print a correct synopsis
line, but "No additional help available." which is not exactly wrong,
but not helpful either.

Commit ``Make "usage" messages more helpful.'' changed this
partially. But it also became clear that lots of "Usage" and "Help"
messages (fields "usage" and "help" in struct cmd_tbl_s respective)
were actually redundant.

This patch cleans this up - for example:

Before:
	=> help dtt
	dtt - Digital Thermometer and Thermostat

	Usage:
	dtt         - Read temperature from digital thermometer and thermostat.

After:
	=> help dtt
	dtt - Read temperature from Digital Thermometer and Thermostat

	Usage:
	dtt

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-06-12 20:47:16 +02:00
Wolfgang Denk
94796d8544 Make "usage" messages more helpful.
In case of incorrect command invocations U-Boot used to print pretty
useless "usage" messages, for example:

	=> nand markbad
	Usage:
	nand - NAND sub-system

In the result, the user would have to run the "help" command to get
the (available) information about correct command usage. Change this,
so that this information gets always printed.

Note that this changes the user interface of all commands, but
hopefully to the better.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-06-12 20:45:48 +02:00
Mike Frysinger
4c94f6c54b nvedit: speed up printing of environment
The printing code would check the same environment byte multiple times and
write to the console one byte at a time.  For some devices (such as the
Blackfin JTAG console which operates in 8 bytes at a time), this is pretty
damned slow.  So create a small 16 byte buffer to fill up and send to puts
as needed.  In the process, unify the different print functions, shrink
the resulting code (source and compiled), and avoid excess env reads as
those too can be somewhat expensive depending on the board.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-12 20:45:48 +02:00
Jean-Christophe PLAGNIOL-VILLARD
3112030a43 config.mk: remove un-needed REMOTE_BUILD check
as $(obj) is empty when in tree build

%.s:	%.S
	$(CPP) $(AFLAGS) -o $@ $<

and

$(obj)%.s:	%.S
	$(CPP) $(AFLAGS) -o $@ $<

are the same

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2009-06-12 20:45:48 +02:00
Tom Rix
651351fe98 FAT replace compare_sign with strncmp.
The static function compare_sign is only used to compare the fs_type string
and does not do anything more than what strncmp does.

The addition of the trailing '\0' to fs_type, while legal, is not needed
because the it is never printed out and strncmp does not depend on NULL
terminated strings.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-06-12 20:45:48 +02:00
Mike Frysinger
ecb1dc8922 Add support for Linux-like kallsysms
The kernel stores address<->symbol names in it so things can be decoded at
runtime.  Do it in U-Boot, and we get nice symbol decoding when crashing.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-12 20:45:48 +02:00
Wolfgang Denk
36c9169aa6 cmd_mtdparts.c: allow to omit definitions for default settings
There is actually no good reason to enforce that all board
configuations must define default settings for "mtdids" and
"mtdparts".  Actually this may be difficult to handle, especially on
boards where different sizes of flash chips can be fit, so there is no
real "default" partition map for all boards.

Lift this arbitrary limitation.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-06-12 20:45:48 +02:00
Stefan Roese
864aa034f3 cmd_mtdparts: Move to common handling of FLASH devices via MTD layer
This patch removes all references to the direct CFI FLASH interface
(via flash_info[]). Now that all FLASH types currently handled in
mtdparts are available (if selected, see below) via the MTD infrastructure.
This is NOR, NAND and OneNAND right now. This can be achieved by defining
the following options:

CONFIG_MTD_DEVICE (for all FLASH types)

plus

CONFIG_FLASH_CFI_MTD (for NOR FLASH)

So we need to add those defines to the board config headers currently
using the mtdparts commands. This is done via another patch, so
we shouldn't break mtdparts compatibility.

One big advantage from this solution is that the cmd_mtdparts.c is
*much* cleaner now. Lot's of #ifdef's are removed and the code itself
is smaller. Additionally the newly added MDT concatenation feature
can new be used via the mtdparts infrastructure and therefor via
UBI etc.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Ladislav Michl <ladis@linux-mips.org>
Cc: Scott Wood <scottwood@freescale.com>
2009-06-12 20:45:48 +02:00
Stefan Roese
d558107c18 mtd: Introduce CONFIG_MTD_DEVICE to select compilation of mtdcore.o
This new define enables mtdcore.c compilation and with this we can
select the MTD device infrastructure needed for the reworked mtdparts
command.

We now have the 2 MTD infrastructure defines, CONFIG_MTD_DEVICE and
CONFIG_MTD_PARTITIONS. CONFIG_MTD_DEVICE is needed (as explained above)
for the "mtdparts" command and CONFIG_MTD_PARTITIONS is needed for UBI.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
2009-06-12 20:45:47 +02:00
Stefan Roese
942556a92a mtd: MTD related config header changes (mtdparts command)
By changing the cmd_mtdparts to only use the MTD infrastructure and
not the direct interface to the CFI NOR FLASH driver we now need
to add the MTD infrastructure to all boards using those mtdparts
commands. This patch adds those components:

CONFIG_MTD_DEVICE (for all FLASH types)

plus

CONFIG_FLASH_CFI_MTD (for NOR FLASH)

To all board maintainers: Please test this on your platforms and
report any problems/issues found. Thanks.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Ron Madrid <info@sheldoninst.com>
Cc: Georg Schardt <schardt@team-ctech.de>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Ladislav Michl <ladis@linux-mips.org>
Cc: Martin Krause <martin.krause@tqs.de>
Cc: Gary Jennejohn <garyj@denx.de>
Cc: Ricardo Ribalda <ricardo.ribalda@uam.es>
2009-06-12 20:45:47 +02:00
Stefan Roese
8d2effea23 mtd: Update MTD infrastructure to support 64bit device size
This patch brings the U-Boot MTD infrastructure in sync with the current
Linux MTD version (2.6.30-rc3). Biggest change is the 64bit device size
support and a resync of the mtdpart.c file which has seen multiple fixes
meanwhile.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Kyungmin Park <kmpark@infradead.org>
2009-06-12 20:45:47 +02:00
Stefan Roese
0a57265533 mtd: Add MTD concat support to concatenate multiple MTD NOR devices
This patch adds concatenation support to the U-Boot MTD infrastructure.
By enabling CONFIG_MTD_CONCAT this MTD CFI wrapper will concatenate
all found NOR devices into one single MTD device. This can be used by
e.g by UBI to access a partition that spans over multiple NOR chips.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:45:47 +02:00
Jean-Christophe PLAGNIOL-VILLARD
55e0ed6078 make MODEM SUPPORT generic instead of duplicate it
and fix comment

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

Adjusted Copyright message.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-06-12 20:45:47 +02:00
Tom Rix
a30f519bd0 ZOOM2 detect the version of the zoom2 board at runtime.
There are currently 3 versions of the zoom2 board.
The production board, that is currently being released.
The beta board, similar in form to the production board but not released.
The alpha board, a set of PCBs with a very limited circulation.

GPIO 94 is used to determine the version of the board. If GPIO 94 is clear,
the board is a production board, otherwise it is a beta board.

The alpha board will likely be mistaken for a beta board.  An alpha board
was unavailible for testing.

This has been tested on the beta and production boards.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:45:47 +02:00
Tom Rix
718763c474 Beagle Convert the board version detection to use the OMAP3 GPIO interface.
There is no new functionality in the change.

This change is a conversion from the using raw register access to using
the OMAP3 GPIO API described in doc/README.omap3.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
2009-06-12 20:45:47 +02:00
Tom Rix
7caa13fdd2 Fix a typo in the instructions on using omap3's gpio interface.
Using the example for reading a gpio, shows the problem.
NULL should be the gpio number.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
2009-06-12 20:45:47 +02:00
Tom Rix
0c9520efd6 ZOOM2 Define GPIO banks used.
Enable the function and interface clocks for banks 2,3,5 and 6.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
2009-06-12 20:45:47 +02:00
Tom Rix
708cfb74b7 OMAP3 Turn on the GPIO bank clocks
The function and interface clocks for each GPIO bank, except the first, must
be explicitly turned on.  These are controlled by the config level defines
CONFIG_OMAP3_GPIO_n where n is from 2 to 6.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
2009-06-12 20:45:47 +02:00
Richard Retanubun
59272620c2 Coldfire M5271: Activate u-boot system timer interrupt.
This patch assigns the u-boot system timer interrupt to
interrupt level 3, priority 6. Without this patch the interrupt
will be a level 0, priority 0, which disables it and cause
u-boot functions that relies on the timer (e.g. sleep command)
to never return.

Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
2009-06-12 20:45:47 +02:00
Richard Retanubun
dc26965ad3 Compier warning cleanup
Follow up to git commit: 19b5b533cc

Cleanup on compiler warnings on unused variables now that
bd->bi_enetaddr is no longer used.

Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
2009-06-12 20:45:46 +02:00
Richard Retanubun
42a83765d5 Adds WATCHDOG_RESET() function call to lib_m68k dtimer_interrupt.
Ported from lib_ppc/interrupts.c, this adds the ability for
the coldfire system timer to auto-reset the watchdog when
dtimer_interrupts is called.

Signed-off-by: Richard Retanubun <RichardRetanubun@RuggedCom.com>
2009-06-12 20:45:46 +02:00
Prafulla Wadaskar
a24d96e40e arch_misc_init support for ARM architectures
This patch is required for Kirkwood support
may be used by other ARM architectures

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-06-12 20:45:46 +02:00
Jean-Christophe PLAGNIOL-VILLARD
b2403589b4 at91: move cpu info print to cpu
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:45:46 +02:00
Jean-Christophe PLAGNIOL-VILLARD
b32e189079 at91: move cpu name define to arm/arch/ cpu header
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:53 +02:00
Jean-Christophe PLAGNIOL-VILLARD
5bb59b3c90 at91: extract reset from timer
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:53 +02:00
Jean-Christophe PLAGNIOL-VILLARD
61cf851b09 omap24xx: rename reset file
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:53 +02:00
Dirk Behme
9d4fc99dbd OMAP3: Fix CKE1 MUX setting to allow self-refresh
The Beagle rev Cx and Overo boards are using both SDRC CSes. The MUX
setting is needed for the second CS clock signal to allow the 2 RAM
parts to be put in self-refresh correctly. This also works on rev B
Beagle boards with 128M of RAM.

From: Steve Sakoman <steve@sakoman.com>
From: Jean Pihet <jpihet@mvista.com>
Signed-off-by: Jean Pihet <jpihet@mvista.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-06-12 20:39:53 +02:00
Dirk Behme
3962c4f9fc OMAP3: Zoom2: Enable Board and CPU info
With other OMAP3 boards we recently switched to CPU and Board
info API. From parallel merge, this is missing for Zoom2.
Enable it for Zoom2, too.

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
2009-06-12 20:39:53 +02:00
Tom Rix
83ae698ff2 ZOOM2 Add led support.
This patch controls the large LED on the top left of the zoom2.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-06-12 20:39:53 +02:00
Tom Rix
660888b7fb ZOOM2 Add serial support.
Zoom2 serial is in general supplied by one of the 4 UARTS on the debug board.
The default serial is from the USB connector on left side of the debug board.
The USB connector will produce 2 of the 4 UARTS.  On your host pick the first
enumeration.

The details of the setting of the serial gpmc setup are not available.
The values were provided by another party.

The serial port set up is the same with Zoom1.
Baud rate 115200, 8 bit data, no parity, 1 stop bit, no flow.

The kernel bootargs are
console=ttyS3,115200n8

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-06-12 20:39:53 +02:00
Jean-Christophe PLAGNIOL-VILLARD
3ea201b016 lh7a40x: move serial driver to drivers/serial
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:53 +02:00
Jean-Christophe PLAGNIOL-VILLARD
379be585eb pxa: move serial driver to drivers/serial
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:52 +02:00
Jean-Christophe PLAGNIOL-VILLARD
ad7e8aac69 arm: remove cpu_init
move s3c44b0 to arch_cpu_init and as noone use cpu_init remove it

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:52 +02:00
Jean-Christophe PLAGNIOL-VILLARD
c358d9c3f1 arm: unify interrupt init
all arm init the IRQ stack the same way
so unify it in lib_arm/interrupts.c and then call arch specific interrupt init

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:52 +02:00
Jean-Christophe PLAGNIOL-VILLARD
10a451cd57 arm: unify linker script
all arm boards except a few use the same cpu linker script
so move it to cpu/$(CPU)

that could be overwrite in following order
SOC
BOARD
via the corresponding config.mk

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:52 +02:00
Jean-Christophe PLAGNIOL-VILLARD
9475c63c78 afeb9260: fix macb device init
uses PA10, PA11 for ETX2 and ETX3.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:52 +02:00
Stefan Roese
1bbae2b816 ppc4xx: Remove PCI async bootup message if PCI is not used
Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:39:52 +02:00
Wolfgang Denk
a3455c0051 TQM834x: use buffered writes to accelerate writing to flash
Also enable display of 'E'mpty sectors in "flinfo" output.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-06-12 20:39:52 +02:00
Wolfgang Denk
4681e673a5 TQM834x: add FDT support
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-06-12 20:39:52 +02:00
Wolfgang Denk
929b79a0b5 TQM834x: fix environment size; add redundant env.
Also reserve more space for U-Boot as it will probably grow soon.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2009-06-12 20:39:52 +02:00
Thomas Lange
2ae0f35fd6 ARM DaVinci: Reset with watchdog enabled
Once the Davinci watchdog has been enabled, the timeout
value cannot be changed. If the timeout in use is long,
it can take a long time for card to reset. By writing
an invalid service key, we can trigger an immediate reset.

Signed-off-by: Thomas Lange <thomas@corelatus.se>
2009-06-12 20:39:51 +02:00
Wolfgang Denk
6cc7ba9ed4 video: Add an option to skip video initialization
This patch adds an option to skip the video initialization on for all
video drivers. This is needed for the CPCI750 which can be built as
CPCI host and adapter/target board. And the adapter board can't
access the video cards located on the CompactPCI bus.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>

Rebased against simplifying patch.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-06-12 20:39:51 +02:00
Wolfgang Denk
f62f64692f drv_video_init(): simplify logic
Simplify nesting of drv_video_init() and use a consistent way of
indicating failure / success. Before, it took me some time to realize
which of the returns was due to an error condition and which of them
indicated success.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
2009-06-12 20:39:51 +02:00
Jean-Christophe PLAGNIOL-VILLARD
1699da6297 at91: regroup IP hw init in one file per soc
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:51 +02:00
David Brownell
28b00324be dm355 evm support
Initial U-Boot support for the DaVinci DM355 EVM.  This is a board
from Spectrum Digital.  Board docs include schematic and firmware
for its microcontroller:

  http://c6000.spectrumdigital.com/evmdm355/revd/

Most of the DM355 chip is fully documented by TI, the most notable
exception being the MPEG/JPEG coprocessor (programmable using codecs
available at no cost from TI), which is omitted from its DM335 sibling:

  http://focus.ti.com/docs/prod/folders/print/tms320dm355.html

This version can boot from the on-board DM9000 Ethernet chip, after
being loaded (from NAND, MMC/SD, or UART).  In the near future, NAND
and USB support could be added ... NAND support is being held back
until the support for the 4-bit ECC hardware is ready.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-06-12 20:39:51 +02:00
Sanjeev Premi
136cf92dc9 OMAP3EVM: Set default bootfile
The current configuration doesn't define default
bootfile; leading to this warning at execution:

OMAP3_EVM # dhcp
...
...
DHCP client bound to address 192.168.1.11
*** Warning: no boot file name; using 'AC18BE16.img'
TFTP from server 0.0.0.0; our IP address is 192.168.1.11;
sending through gateway 192.168.1.1
Filename 'AC18BE16.img'.
Load address: 0x82000000
Loading: *
TFTP error: 'File not found' (1)

Signed-off-by: Sanjeev Premi <premi@ti.com>
2009-06-12 20:39:51 +02:00
s-paulraj@ti.com
1a09d05abf ARM DaVinci: Minor Updates to base addresses
Patch adds base addresses for DaVinci DM365. Updated patches for DM365
will be posted soon.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-06-12 20:39:50 +02:00
Tom Rix
de193e8e36 ZOOM2 Add support for debug board detection.
The logicpd web site is a good source for general information on this board.
Please start looking here if the below links are broken.
http://www.logicpd.com

This is a pdf of the product
http://www.logicpd.com/sites/default/files/1012659A_Zoom_OMAP34x-II_MDP_Brief.pdf

This is a pdf of the product quick start guide.
The debug board is described here.
http://support.logicpd.com/downloads/1165/

This is a wiki showing the debug board in use
https://omapzoom.org/gf/project/omapzoom/wiki/?pagename=GettingStartedWithZoomII_AKA_OMAP34XII_MDP

The zoom2 has an auxillary board that contains the serial, net, jtag and
battery simulator.  This change supports a runtime check if the debug board is
connected.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-06-12 20:39:50 +02:00
Tom Rix
0c872ecd01 OMAP3 Port kernel omap gpio interface.
Port version 2.6.27 of the linux kernel's omap gpio interface to u-boot.
The orignal source is in linux/arch/arm/plat-omap/gpio.c

See doc/README.omap3 for instructions on use.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-06-12 20:39:50 +02:00
Tom Rix
376aee78dd ZOOM2 Add initial support for Zoom2
Zoom2 is a new board from Texas Instruments and LogicPD

The logicpd web site is a good source for general information on this board.
Please start looking here if the below links are broken.
http://www.logicpd.com

This is a pdf of the product
http://www.logicpd.com/sites/default/files/1012659A_Zoom_OMAP34x-II_MDP_Brief.pdf
This is the product description web page
http://www.logicpd.com/products/development-kits/texas-instruments-zoom%E2%84%A2-omap34x-ii-mdp

This patch provides a zoom2 base target by copying zoom1 and by making some
obvious changes.

To configure, run
make omap3_zoom2_config

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-06-12 20:39:50 +02:00
Sandeep Paulraj
53925acf1b ARM DaVinci:Consolidate common u-boot.lds
The u-boot.lds is common for all DaVinci boards. The patch removes
multiple instances and moves the u-boot.lds to /cpu/arm926ejs/davinci
folder. This addresses one of the comments i received while submitting
patches for DM3xx

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-06-12 20:39:49 +02:00
Tom Rix
68a531fd46 OMAP Consolidate common u-boot.lds to cpu layer.
The u-boot.lds file is common for all omap boards.
Move a cleaned up version to the cpu layer and add makefile logic to use it.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-06-12 20:39:49 +02:00
Jean-Christophe PLAGNIOL-VILLARD
65a76d4f94 arm/dcc: add xscale support
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:49 +02:00
Jean-Christophe PLAGNIOL-VILLARD
66e8f9da68 arm/dcc: use static support to allow to use it at anytime
the dcc can be used at the start of the cpu

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:49 +02:00
Jean-Christophe PLAGNIOL-VILLARD
7893aa1eb6 ARM: Update mach-types
update against linux v2.6.29

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:49 +02:00
Jean-Christophe PLAGNIOL-VILLARD
2907798926 arm920/926/926: remove non needed header
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:49 +02:00
David Brownell
269dfea017 davinci dm6446evm NAND update
This updates the optional (non-default!) NAND support for the
DaVinci DM6446 EVM:

 - include MTD partitioning, defaulting to what Linux uses

 - use a flash-based BBT, which among other things speeds bootup

This matches code that's now queued for mainline Linux, and might
even merge in an upcoming 2.6.30-rc; and the MTIDS are set up so
that the U-Boot $mtdparts environment variable can be passed as-is
on the kernel command line as a cmdlinepart override.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-06-12 20:39:49 +02:00
David Brownell
7a4f511b59 davinci: display correct clock info
Move the clock-rate dumping code into the cpu/.../davinci area
where it should have been, enabled by CONFIG_DISPLAY_CPUINFO,
updating the format and showing the DSP clock (where relevant).

Switch boards to use the cpuinfo() hook for this stuff.

Remove a few now-obsolete PLL #defines.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-06-12 20:39:49 +02:00
Tom Rix
daea928829 ZOOM1 Remove more legacy NAND defines.
These legacy NAND defines are no longer needed by this target.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-06-12 20:39:49 +02:00
Tom Rix
65fd21c80f LED Add documentation describing the status_led and colour led API.
This document describes the u-boot status LED API.
This allows common u-boot commands to use a board's leds to
provide status for activities like booting and downloading files.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-06-12 20:39:49 +02:00
Tom Rix
7cdf804f34 ARM Add blue colour LED to status_led.
There is exiting support for red,yellow,green but no blue.
The main LED on the zoom2 is a blue LED.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-06-12 20:39:49 +02:00
Jean-Christophe PLAGNIOL-VILLARD
b54384e3ba arm: timer and interrupt init rework
actually the timer init use the interrupt_init as init callback
which make the interrupt and timer implementation difficult to follow

so now rename it as int timer_init(void) and use interrupt_init for interrupt

btw also remane the corresponding file to the functionnality implemented

as ixp arch implement two timer - one based on interrupt - so all the timer
related code is moved to timer.c

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:48 +02:00
Jean-Christophe PLAGNIOL-VILLARD
5b4bebe1d2 OMAP3: Reorganize Makefile style
Reformat COBJS handling.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-06-12 20:39:48 +02:00
Jean-Christophe PLAGNIOL-VILLARD
b196698271 OMAP3: Remove dublicated interrupt code
Remove duplicated interrupt code. Original, identical code can be found
in lib_arm/interrupts.c

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
2009-06-12 20:39:48 +02:00
Jean-Christophe PLAGNIOL-VILLARD
ac7260a419 at91rm9200: move reset code to reset.c
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:48 +02:00
Jean-Christophe PLAGNIOL-VILLARD
2c75c78d94 ixp/interrupts: Move conditional compilation to Makefile
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:48 +02:00
Jean-Christophe PLAGNIOL-VILLARD
8fc3bb4b06 arm: cleanup remaining CONFIG_INIT_CRITICAL
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:48 +02:00
Jean-Christophe PLAGNIOL-VILLARD
c20e28f49a arm946es: remove non used timer
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2009-06-12 20:39:48 +02:00
David Brownell
f1d944e30e davinci: add basic dm355/dm350/dm335 support
Add some basic declarations for DaVinci DM355/DM350/DM335 support,
keyed on CONFIG_SOC_DM355.  (DM35X isn't quite right because the
DM357 is very different; while the DM355 is like a DM355 without
the MPEG/JPEG coprocessor).

These have different peripherals than the DM6446, and some of
the peripherals are at different addresses.  Notably for U-Boot,
there's no EMAC, and the NAND controller address is different

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-06-12 20:39:48 +02:00
David Brownell
bd36fdc146 davinci: fix dm644x buglets
Fix two buglets in the dm644x support:  don't set two must-be-zero
bits in the UART management register; and only include the I2C hooks
if the I2C driver is being included.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-06-12 20:39:48 +02:00
David Brownell
f79043681f davinci: split out some dm644x-specific bits from psc
Split out DaVinci DM6446-specific bits from more generic bits:

 - Add a CONFIG_SOC_DM644X.  All current boards use DM6446 chips;
   DM6443 and DM6441 chips differ in available peripherals.

 - Move most DM644X-specific bits from psc.c to a new dm644x.c file,
   which is conditionally built.  It provides device-specific setup.

Plus minor coding style and comment updates with respect to the PSC.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-06-12 20:39:48 +02:00
David Brownell
48ef572955 davinci: cpu-specific build uses conditional make syntax
Update cpu/arm926ejs/davinci/Makefile to use COBJ-y type syntax.
Add the first conditional: for EMAC driver support.  Not all
chips have an EMAC; and boards might not use it, anyway.

This doesn't touch PHY configuration; that should eventually
become conditional too.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-06-12 20:39:47 +02:00
David Brownell
7b7808ae6d davinci: move psc support board-->cpu
Move DaVinci PSC support from board/* to cpu/* where it belongs.
The PSC module manages clocks and resets for all DaVinci-family
SoCs, and isn't at all board-specific.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-06-12 20:39:47 +02:00
David Brownell
84f7411cb9 DaVinci now respects SKIP_LOWLEVEL_INIT
Don't needlessly include lowlevel init code; that's only really
needed with boot-from NOR (not boot-from-NAND).  The 2nd stage
loader (UBL) handles that before it loads U-Boot.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2009-06-12 20:39:47 +02:00
David Brownell
641e0925e4 DaVinci Ethernet cleanup
Chips without the EMAC controller won't need the utilities
it uses to read an Ethernet address from EEPROM; so don't
include them needlessly.

Use is_valid_ether() to validate the address from EEPROM.
All-zero addresses aren't the only invalid addresses.
A fully erased EEPROM returns all-ones, also invalid...

Switch those Ethernet utilities to use "%pM" for printing
MAC addresses; and not say ROM when they mean EEPROM.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
2009-06-12 20:39:47 +02:00
Stefan Roese
c790b04d23 lib_arch/board.c: Move malloc initialization before flash_init()
This patch moves the malloc initialization before calling flash_init().
Upcoming changes to the NOR FLASH common CFI driver with optional
MTD infrastructure and MTD concatenation support will call malloc().
And nothing really speaks against enabling malloc just a little earlier
in the boot stage. Some architectures already enable malloc before
calling flash_init() so they don't need any changes here.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Scott McNutt <smcnutt@psyent.com>
Cc: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Daniel Hellstrom <daniel@gaisler.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: John Rigby <jcrigby@gmail.com>
2009-06-12 20:39:47 +02:00
Stefan Roese
d873133f2b ppc4xx: Add Sequoia RAM-booting target
This patch adds another build target for the AMCC Sequoia PPC440EPx
eval board. This RAM-booting version is targeted for boards without
NOR FLASH (NAND booting) which need a possibility to initially
program their NAND FLASH. Using a JTAG debugger (e.g. BDI2000/3000)
configured to setup the SDRAM, this debugger can load this RAM-
booting image to the target address in SDRAM (in this case 0x1000000)
and start it there. Then U-Boot's standard NAND commands can be
used to program the NAND FLASH (e.g. "nand write ...").

Here the commands to load and start this image from the BDI2000:

440EPX>reset halt
440EPX>load 0x1000000 /tftpboot/sequoia/u-boot.bin
440EPX>go 0x1000000

Please note that this image automatically scans for an already
initialized SDRAM TLB (detected by EPN=0). This TLB will not be
cleared. This TLB doesn't need to be TLB #0, this RAM-booting
version will detect it and preserve it. So booting via BDI2000
will work and booting with a complete different TLB init via
U-Boot works as well.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:39:47 +02:00
Mike Frysinger
837db3d87f tools/envcrc: add --binary option to export embedded env
The --binary option to envcrc can be used to export the embedded env as a
binary blob so that it can be manipulated/examined/whatever externally.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-06-12 20:39:47 +02:00
Ben Warren
18cc7afd9a Enable CONFIG_NET_MULTI on all remaining PPC4xx boards
All in-tree PPC4xx boards now use CONFIG_NET_MULTI

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:39:47 +02:00
Matthias Fuchs
70be6c2d40 4xx: Add support for DP405 hardware variants
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:39:47 +02:00
Matthias Fuchs
de47a34d4d 4xx: Remove binary cpld bitstream from DP405 board
This patch removes the cpld binary bitstream that is
used by esd's cpld command on DP405 boards.

Because u-boot with an external cpld bitstream may not
take more space in flash than before the u-boot binary is
shrinked a little bit. Some unused featues have been
removed therefore.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:39:47 +02:00
Matthias Fuchs
700d553fd3 4xx: Remove binary cpld bitstream from VOM405 board
This patch removes the cpld binary bitstream that is
used by esd's cpld command on VOM405 boards.

Because u-boot with an external cpld bitstream may not
take more space in flash than before the u-boot binary is
shrinked a little bit.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:39:46 +02:00
Matthias Fuchs
0bb1063036 4xx: Remove binary cpld bitstream from PMC405 board
This patch removes the cpld binary bitstream that is
used by esd's cpld command on PMC405 boards.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:39:46 +02:00
Matthias Fuchs
7cc635fb35 4xx: Remove binary cpld bitstream from CMS700 board
This patch removes the cpld binary bitstream that is
used by esd's cpld command on CMS700 boards.

Because u-boot with an external cpld bitstream may not
take more space in flash than before the u-boot binary is
shrinked a little bit. Some unused featues have been
removed therefore.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:39:46 +02:00
Matthias Fuchs
c1b2f79788 esd/common: extend cpld command with address parameter
This patch adds support for an address parameter to esd's
cpld command. This is in preparation to remove compiled-in
binary cpld (xsvf) bitstreams.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-06-12 20:39:46 +02:00
Peter Tyser
9166b77635 cmd_i2c: Fix i2c help command output when CONFIG_I2C_MUX
When CONFIG_I2C_MUX was defined the output of 'help i2c' was not
correct, eg:

=> help i2c
i2c bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes.
speed [speed] - show or set I2C bus speed
i2c dev [dev] - show or set current I2C bus
...

It has been changed to:
i2c speed [speed] - show or set I2C bus speed
i2c bus [muxtype:muxaddr:muxchannel] - add a new bus reached over muxes
i2c dev [dev] - show or set current I2C bus
...

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-06-12 20:39:46 +02:00
Peter Tyser
0a45a6357b cmd_i2c: Clean up trivial helper functions
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-06-12 20:39:46 +02:00
Peter Tyser
e96ad5d3ab cmd_i2c: Clean up i2c command argument parsing
argc and argv should only be modified once instead of once for
every i2c sub-command

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-06-12 20:39:46 +02:00
Peter Tyser
0f89c54be9 i2c: Update references to individual i2c commands
The individual i2c commands imd, imm, inm, imw, icrc32, iprobe, iloop,
and isdram are no longer available so all references to them have been
updated to the new form of "i2c <cmd>".

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-06-12 20:39:46 +02:00
Peter Tyser
d48eb5131d i2c: Remove deprecated individual i2c commands
The following individual I2C commands have been removed: imd, imm, inm,
imw, icrc32, iprobe, iloop, isdram.

The functionality of the individual commands is still available via
the 'i2c' command.

This change only has an impact on those boards which did not have
CONFIG_I2C_CMD_TREE defined.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-06-12 20:39:46 +02:00
Peter Tyser
655b34a78a i2c: Create common default i2c_[set|get]_bus_speed() functions
New default, weak i2c_get_bus_speed() and i2c_set_bus_speed() functions
replace a number of architecture-specific implementations.

Also, providing default functions will allow all boards to enable
CONFIG_I2C_CMD_TREE.  This was previously not possible since the
tree-form of the i2c command provides the ability to display and modify
the i2c bus speed which requires i2c_[set|get]_bus_speed() to be
present.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-06-12 20:39:45 +02:00
Peter Tyser
8229e9c04f cm5200: Make function test command names more unique
Add "_test" to cm5200's function test command names to prevent
overlap with common, global function names.  Originally, the
"do_i2c" function test command interfered with
common/cmd_i2c.c's "do_i2c" when CONFIG_I2C_CMD_TREE was defined.

The functions were also made static as they are not globally accessed.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-06-12 20:39:45 +02:00
Peter Tyser
f0722ee762 tsi108_i2c: Add i2c_init() stub function
Add the i2c_init() function so that the tsi108_i2c.c driver fits
U-Boot's standard I2C API which is utilized by cmd_i2c.c

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-06-12 20:39:45 +02:00
Peter Tyser
8d907e79bc mpc7448hpc2: Add CONFIG_SYS_I2C_SPEED define
Add standard CONFIG_SYS_I2C_SPEED define for the mpc7448hpc2 so that
it can use the common 'i2c speed' command.  Note that the I2C controller
utilized by the mpc7448hpc2 has a fixed speed and cannot be changed
dynamically.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-06-12 20:39:45 +02:00
Peter Tyser
a056b1ce9e Marvell: i2c cleanup
The following changes were made, primarily to bring the Marvell i2c
driver in line with U-Boot's current I2C API:
- Made i2c_init() globally accessible
- Made i2c_read() and i2c_write() return an integer
- Updated i2c_init() calls to pass in CONFIG_SYS_I2C_SLAVE in the
  offhand chance someone adds slave support in the future

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-06-12 20:39:45 +02:00
Peter Tyser
54afc6ee10 cpci750: i2c cleanup
The following changes were made, primarily to bring the cpci750 i2c
driver in line with U-Boot's current I2C API:
- Made i2c_init() globally accessible
- Made i2c_read() and i2c_write() return an integer
- Updated i2c_init() calls to pass in CONFIG_SYS_I2C_SLAVE in the
  offhand chance someone adds slave support in the future

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-06-12 20:39:45 +02:00
Peter Tyser
9c90a2c8e8 i2c.h: Provide a default CONFIG_SYS_I2C_SLAVE value
Many boards/controllers/drivers don't support an I2C slave interface,
however CONFIG_SYS_I2C_SLAVE is used in common code so provide a
default

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-06-12 20:39:45 +02:00
1576 changed files with 74007 additions and 42610 deletions

1
.gitignore vendored
View File

@@ -54,6 +54,7 @@ series
cscope.*
# tags files
/tags
/ctags
/etags

8663
CHANGELOG

File diff suppressed because it is too large Load Diff

View File

@@ -28,9 +28,12 @@ Pantelis Antoniou <panto@intracom.gr>
Reinhard Arlt <reinhard.arlt@esd-electronics.com>
cpci5200 MPC5200
mecp5123 MPC5121
mecp5200 MPC5200
pf5200 MPC5200
vme8349 MPC8349
CPCI750 PPC750FX/GX
Yuli Barcohen <yuli@arabellasw.com>
@@ -75,6 +78,8 @@ Wolfgang Denk <wd@denx.de>
IceCube_5100 MGT5100
IceCube_5200 MPC5200
ARIA MPC5121e
AMX860 MPC860
ETX094 MPC850
FPS850L MPC850
@@ -132,6 +137,9 @@ Jon Diekema <jon.diekema@smiths-aerospace.com>
Dirk Eibach <eibach@gdsys.de>
compactcenter PPC460EX
devconcenter PPC460EX
dlvision PPC405EP
gdppc440etx PPC440EP/GR
neo PPC405EP
@@ -168,6 +176,7 @@ Matthias Fuchs <matthias.fuchs@esd-electronics.com>
PCI405 PPC405GP
PLU405 PPC405EP
PMC405 PPC405GP
PMC405DE PPC405EP
PMC440 PPC440EPx
VOH405 PPC405EP
VOM405 PPC405EP
@@ -206,6 +215,7 @@ Klaus Heydeck <heydeck@kieback-peter.de>
Ilko Iliev <iliev@ronetix.at>
PM9261 AT91SAM9261
PM9263 AT91SAM9263
Gary Jennejohn <garyj@denx.de>
@@ -377,7 +387,6 @@ Travis Sawyer (travis.sawyer@sandburst.com>
KAREF PPC440GX
METROBOX PPC440GX
XPEDITE1K PPC440GX
Georg Schardt <schardt@team-ctech.de>
@@ -407,6 +416,10 @@ Andre Schwarz <andre.schwarz@matrix-vision.de>
mvbc_p MPC5200
mvblm7 MPC8343
Jon Smirl <jonsmirl@gmail.com>
pcm030 MPC5200
Timur Tabi <timur@freescale.com>
MPC8349E-mITX MPC8349
@@ -428,6 +441,8 @@ Rune Torgersen <runet@innovsys.com>
Peter Tyser <ptyser@xes-inc.com>
XPEDITE1000 PPC440GX
XPEDITE5170 MPC8640
XPEDITE5200 MPC8548
XPEDITE5370 MPC8572
@@ -497,6 +512,11 @@ Rowel Atienza <rowel@diwalabs.com>
armadillo ARM720T
Stefano Babic <sbabic@denx.de>
polaris xscale
trizepsiv xscale
Dirk Behme <dirk.behme@gmail.com>
omap3_beagle ARM CORTEX-A8 (OMAP3530 SoC)
@@ -525,10 +545,22 @@ Thomas Elste <info@elste.org>
modnet50 ARM720T (NET+50)
Fabio Estevam <Fabio.Estevam@freescale.com>
mx31pdk i.MX31
Peter Figuli <peposh@etc.sk>
wepep250 xscale
Daniel Gorsulowski <daniel.gorsulowski@esd.eu>
meesc ARM926EJS (AT91SAM9263 SoC)
Sedji Gaouaou<sedji.gaouaou@atmel.com>
at91sam9g10ek ARM926EJS (AT91SAM9G10 SoC)
at91sam9m10g45ek ARM926EJS (AT91SAM9G45 SoC)
Marius Gröger <mag@sysgo.de>
impa7 ARM720T (EP7211)
@@ -565,6 +597,10 @@ Prakash Kumar <prakash@embedx.com>
cerf250 xscale
Sergey Lapin <slapin@ossfans.org>
afeb9260 ARM926EJS (AT91SAM9260 SoC)
Guennadi Liakhovetski <g.liakhovetski@gmx.de>
imx31_phycore_eet i.MX31
@@ -610,6 +646,10 @@ Stelian Pop <stelian.pop@leadtechdesign.com>
at91sam9263ek ARM926EJS (AT91SAM9263 SoC)
at91sam9rlek ARM926EJS (AT91SAM9RL SoC)
Tom Rix <Tom.Rix@windriver.com>
omap3_zoom2 ARM CORTEX-A8 (OMAP3xx SoC)
Stefan Roese <sr@denx.de>
ixdpg425 xscale
@@ -651,6 +691,12 @@ Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
SFFSDR ARM926EJS
Prafulla Wadaskar <prafulla@marvell.com>
mv88f6281gtw_ge ARM926EJS (Kirkwood SoC)
rd6281a ARM926EJS (Kirkwood SoC)
sheevaplug ARM926EJS (Kirkwood SoC)
Richard Woodruff <r-woodruff2@ti.com>
omap2420h4 ARM1136EJS
@@ -660,10 +706,6 @@ Alex Z
lart SA1100
dnp1110 SA1110
Sergey Lapin <slapin@ossfans.org>
afeb9260 ARM926EJS (AT91SAM9260 SoC)
-------------------------------------------------------------------------
Unknown / orphaned boards:
@@ -760,14 +802,14 @@ Michal Simek <monstr@monstr.eu>
# Board CPU #
#########################################################################
Matthias Fuchs <matthias.fuchs@esd-electronics.com>
TASREG MCF5249
Hayden Fraser <Hayden.Fraser@freescale.com>
M5253EVBE mcf52x2
Matthias Fuchs <matthias.fuchs@esd-electronics.com>
TASREG MCF5249
TsiChung Liew <Tsi-Chung.Liew@freescale.com>
M52277EVB mcf5227x
@@ -840,10 +882,6 @@ Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
MS7720SE SH7720
R0P77850011RL SH7785
Yusuke Goda <goda.yusuke@renesas.com>
MIGO-R SH7722
#########################################################################
# Blackfin Systems: #
# #
@@ -859,11 +897,38 @@ Blackfin Team <u-boot-devel@blackfin.uclinux.org>
BF527-EZKIT BF527
BF533-EZKIT BF533
BF533-STAMP BF533
BF537-PNAV BF537
BF537-STAMP BF537
BF538F-EZKIT BF538
BF548-EZKIT BF548
BF561-EZKIT BF561
Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org>
Blackfin Team <u-boot-devel@blackfin.uclinux.org>
CM-BF527 BF527
CM-BF533 BF533
CM-BF537E BF537
CM-BF548 BF548
CM-BF561 BF561
TCM-BF537 BF537
Martin Strubel <strubel@section5.ch>
Blackfin Team <u-boot-devel@blackfin.uclinux.org>
BF537-minotaur BF537
BF537-srv1 BF537
Wojtek Skulski <skulski@pas.rochester.edu>
Benjamin Matthews <mben12@gmail.com>
BLACKSTAMP BF532
I-SYST Micromodule <support@i-syst.com>
Blackfin Team <u-boot-devel@blackfin.uclinux.org>
IBF-DSP561 BF561
#########################################################################
# End of MAINTAINERS list #
#########################################################################

76
MAKEALL
View File

@@ -60,6 +60,7 @@ LIST_5xxx=" \
munices \
MVBC_P \
o2dnt \
pcm030 \
pf5200 \
PM520 \
TB5200 \
@@ -77,7 +78,9 @@ LIST_5xxx=" \
#########################################################################
LIST_512x=" \
ads5121 \
aria \
mecp5123 \
mpc5121ads \
"
#########################################################################
@@ -181,6 +184,7 @@ LIST_4xx=" \
canyonlands \
canyonlands_nand \
CMS700 \
compactcenter \
CPCI2DP \
CPCI405 \
CPCI4052 \
@@ -191,6 +195,8 @@ LIST_4xx=" \
csb272 \
csb472 \
DASA_SIM \
devconcenter \
dlvision \
DP405 \
DU405 \
DU440 \
@@ -234,6 +240,7 @@ LIST_4xx=" \
PIP405 \
PLU405 \
PMC405 \
PMC405DE \
PMC440 \
PPChameleonEVB \
quad100hd \
@@ -255,7 +262,7 @@ LIST_4xx=" \
WUH405 \
xilinx-ppc440-generic \
xilinx-ppc440-generic_flash \
XPEDITE1K \
XPEDITE1000 \
yellowstone \
yosemite \
yucca \
@@ -359,6 +366,7 @@ LIST_83xx=" \
sbc8349 \
SIMPC8313_LP \
TQM834x \
vme8349 \
"
@@ -380,6 +388,8 @@ LIST_85xx=" \
MPC8569MDS \
MPC8572DS \
MPC8572DS_36BIT \
P2020DS \
P2020DS_36BIT \
PM854 \
PM856 \
sbc8540 \
@@ -407,6 +417,7 @@ LIST_86xx=" \
MPC8610HPCD \
MPC8641HPCN \
sbc8641d \
XPEDITE5170 \
"
#########################################################################
@@ -505,17 +516,21 @@ LIST_ARM9=" \
cp946es \
cp966 \
lpd7a400 \
mv88f6281gtw_ge \
mx1ads \
mx1fs2 \
netstar \
nmdk8815 \
nhk8815 \
nhk8815_onenand \
omap1510inn \
omap1610h2 \
omap1610inn \
omap5912osk \
omap730p2 \
rd6281a \
sbc2410x \
scb9328 \
sheevaplug \
smdk2400 \
smdk2410 \
trab \
@@ -528,6 +543,7 @@ LIST_ARM9=" \
davinci_schmoogie \
davinci_sffsdr \
davinci_sonata \
davinci_dm355evm \
"
#########################################################################
@@ -549,6 +565,8 @@ LIST_ARM11=" \
imx31_phycore \
imx31_phycore_eet \
mx31ads \
mx31pdk \
mx31pdk_nand \
qong \
smdk6400 \
"
@@ -562,28 +580,33 @@ LIST_ARM_CORTEX_A8=" \
omap3_evm \
omap3_pandora \
omap3_zoom1 \
omap3_zoom2 \
"
#########################################################################
## AT91 Systems
#########################################################################
LIST_at91=" \
afeb9260 \
at91cap9adk \
at91rm9200dk \
at91rm9200ek \
at91sam9260ek \
at91sam9261ek \
at91sam9263ek \
at91sam9g20ek \
at91sam9rlek \
cmc_pu2 \
csb637 \
kb9202 \
mp2usb \
m501sk \
pm9263 \
LIST_at91=" \
afeb9260 \
at91cap9adk \
at91rm9200dk \
at91rm9200ek \
at91sam9260ek \
at91sam9261ek \
at91sam9263ek \
at91sam9g10ek \
at91sam9g20ek \
at91sam9m10g45ek \
at91sam9rlek \
cmc_pu2 \
csb637 \
kb9202 \
meesc \
mp2usb \
m501sk \
pm9261 \
pm9263 \
"
#########################################################################
@@ -598,7 +621,9 @@ LIST_pxa=" \
innokom \
lubbock \
pleb2 \
polaris \
pxa255_idp \
trizepsiv \
wepep250 \
xaeniax \
xm250 \
@@ -752,6 +777,7 @@ LIST_coldfire=" \
EB+MCF-EV123 \
EB+MCF-EV123_internal \
idmr \
M5208EVBE \
M52277EVB \
M5235EVB \
M5249EVB \
@@ -796,10 +822,21 @@ LIST_blackfin=" \
bf527-ezkit \
bf533-ezkit \
bf533-stamp \
bf537-minotaur \
bf537-pnav \
bf537-srv1 \
bf537-stamp \
bf538f-ezkit \
bf548-ezkit \
bf561-ezkit \
blackstamp \
cm-bf527 \
cm-bf533 \
cm-bf537e \
cm-bf548 \
cm-bf561 \
ibf-dsp561 \
tcm-bf537 \
"
#########################################################################
@@ -823,6 +860,7 @@ LIST_sh4=" \
sh7763rdp \
sh7785lcr \
ap325rxa \
espt \
"
LIST_sh=" \

367
Makefile
View File

@@ -22,9 +22,9 @@
#
VERSION = 2009
PATCHLEVEL = 06
PATCHLEVEL = 08
SUBLEVEL =
EXTRAVERSION =
EXTRAVERSION = -rc3
ifneq "$(SUBLEVEL)" ""
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
else
@@ -137,56 +137,31 @@ ifeq ($(ARCH),powerpc)
ARCH = ppc
endif
# The "tools" are needed early, so put this first
# Don't include stuff already done in $(LIBS)
SUBDIRS = tools \
examples/standalone \
examples/api
.PHONY : $(SUBDIRS)
ifeq ($(obj)include/config.mk,$(wildcard $(obj)include/config.mk))
# Include autoconf.mk before config.mk so that the config options are available
# to all top level build files. We need the dummy all: target to prevent the
# dependency target in autoconf.mk.dep from being the default.
all:
sinclude $(obj)include/autoconf.mk.dep
sinclude $(obj)include/autoconf.mk
# load ARCH, BOARD, and CPU configuration
include $(obj)include/config.mk
export ARCH CPU BOARD VENDOR SOC
ifndef CROSS_COMPILE
# set default to nothing for native builds
ifeq ($(HOSTARCH),$(ARCH))
CROSS_COMPILE =
else
ifeq ($(ARCH),ppc)
CROSS_COMPILE = ppc_8xx-
CROSS_COMPILE ?=
endif
ifeq ($(ARCH),arm)
CROSS_COMPILE = arm-linux-
endif
ifeq ($(ARCH),i386)
CROSS_COMPILE = i386-linux-
endif
ifeq ($(ARCH),mips)
CROSS_COMPILE = mips_4KC-
endif
ifeq ($(ARCH),nios)
CROSS_COMPILE = nios-elf-
endif
ifeq ($(ARCH),nios2)
CROSS_COMPILE = nios2-elf-
endif
ifeq ($(ARCH),m68k)
CROSS_COMPILE = m68k-elf-
endif
ifeq ($(ARCH),microblaze)
CROSS_COMPILE = mb-
endif
ifeq ($(ARCH),blackfin)
CROSS_COMPILE = bfin-uclinux-
endif
ifeq ($(ARCH),avr32)
CROSS_COMPILE = avr32-linux-
endif
ifeq ($(ARCH),sh)
CROSS_COMPILE = sh4-linux-
endif
ifeq ($(ARCH),sparc)
CROSS_COMPILE = sparc-elf-
endif # sparc
endif # HOSTARCH,ARCH
endif # CROSS_COMPILE
export CROSS_COMPILE
# load other configuration
include $(TOPDIR)/config.mk
@@ -238,7 +213,6 @@ LIBS += drivers/misc/libmisc.a
LIBS += drivers/mmc/libmmc.a
LIBS += drivers/mtd/libmtd.a
LIBS += drivers/mtd/nand/libnand.a
LIBS += drivers/mtd/nand_legacy/libnand_legacy.a
LIBS += drivers/mtd/onenand/libonenand.a
LIBS += drivers/mtd/ubi/libubi.a
LIBS += drivers/mtd/spi/libspi_flash.a
@@ -247,6 +221,7 @@ LIBS += drivers/net/phy/libphy.a
LIBS += drivers/net/sk98lin/libsk98lin.a
LIBS += drivers/pci/libpci.a
LIBS += drivers/pcmcia/libpcmcia.a
LIBS += drivers/power/libpower.a
LIBS += drivers/spi/libspi.a
ifeq ($(CPU),mpc83xx)
LIBS += drivers/qe/qe.a
@@ -280,15 +255,17 @@ LIBBOARD = board/$(BOARDDIR)/lib$(BOARD).a
LIBBOARD := $(addprefix $(obj),$(LIBBOARD))
# Add GCC lib
PLATFORM_LIBS += -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -lgcc
# The "tools" are needed early, so put this first
# Don't include stuff already done in $(LIBS)
SUBDIRS = tools \
examples \
api_examples
.PHONY : $(SUBDIRS)
ifdef USE_PRIVATE_LIBGCC
ifeq ("$(USE_PRIVATE_LIBGCC)", "yes")
PLATFORM_LIBGCC = -L $(OBJTREE)/lib_$(ARCH) -lgcc
else
PLATFORM_LIBGCC = -L $(USE_PRIVATE_LIBGCC) -lgcc
endif
else
PLATFORM_LIBGCC = -L $(shell dirname `$(CC) $(CFLAGS) -print-libgcc-file-name`) -lgcc
endif
PLATFORM_LIBS += $(PLATFORM_LIBGCC)
export PLATFORM_LIBS
ifeq ($(CONFIG_NAND_U_BOOT),y)
NAND_SPL = nand_spl
@@ -306,10 +283,8 @@ __LIBS := $(subst $(obj),,$(LIBS)) $(subst $(obj),,$(LIBBOARD))
#########################################################################
#########################################################################
# Always append ALL so that arch config.mk's can add custom ones
ALL += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map $(U_BOOT_NAND) $(U_BOOT_ONENAND)
ifeq ($(ARCH),blackfin)
ALL += $(obj)u-boot.ldr
endif
all: $(ALL)
@@ -323,6 +298,7 @@ $(obj)u-boot.bin: $(obj)u-boot
$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
$(obj)u-boot.ldr: $(obj)u-boot
$(obj)tools/envcrc --binary > $(obj)env-ldr.o
$(LDR) -T $(CONFIG_BFIN_CPU) -c $@ $< $(LDR_FLAGS)
$(obj)u-boot.ldr.hex: $(obj)u-boot.ldr
@@ -344,12 +320,21 @@ $(obj)u-boot.sha1: $(obj)u-boot.bin
$(obj)u-boot.dis: $(obj)u-boot
$(OBJDUMP) -d $< > $@
$(obj)u-boot: depend $(SUBDIRS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT)
GEN_UBOOT = \
UNDEF_SYM=`$(OBJDUMP) -x $(LIBBOARD) $(LIBS) | \
sed -n -e 's/.*\($(SYM_PREFIX)__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\
cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
--start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \
-Map u-boot.map -o u-boot
$(obj)u-boot: depend $(SUBDIRS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT) $(obj)u-boot.lds
$(GEN_UBOOT)
ifeq ($(CONFIG_KALLSYMS),y)
smap=`$(call SYSTEM_MAP,u-boot) | \
awk '$$2 ~ /[tTwW]/ {printf $$1 $$3 "\\\\000"}'` ; \
$(CC) $(CFLAGS) -DSYSTEM_MAP="\"$${smap}\"" \
-c common/system_map.c -o $(obj)common/system_map.o
$(GEN_UBOOT) $(obj)common/system_map.o
endif
$(OBJS): depend
$(MAKE) -C cpu/$(CPU) $(if $(REMOTE_BUILD),$@,$(notdir $@))
@@ -366,6 +351,9 @@ $(SUBDIRS): depend
$(LDSCRIPT): depend
$(MAKE) -C $(dir $@) $(notdir $@)
$(obj)u-boot.lds: $(LDSCRIPT)
$(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
$(NAND_SPL): $(TIMESTAMP_FILE) $(VERSION_FILE) $(obj)include/autoconf.mk
$(MAKE) -C nand_spl/board/$(BOARDDIR) all
@@ -422,7 +410,6 @@ TAG_SUBDIRS += drivers/misc
TAG_SUBDIRS += drivers/mmc
TAG_SUBDIRS += drivers/mtd
TAG_SUBDIRS += drivers/mtd/nand
TAG_SUBDIRS += drivers/mtd/nand_legacy
TAG_SUBDIRS += drivers/mtd/onenand
TAG_SUBDIRS += drivers/mtd/spi
TAG_SUBDIRS += drivers/net
@@ -448,10 +435,12 @@ cscope:
> cscope.files
cscope -b -q -k
$(obj)System.map: $(obj)u-boot
@$(NM) $< | \
SYSTEM_MAP = \
$(NM) $1 | \
grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
sort > $(obj)System.map
LC_ALL=C sort
$(obj)System.map: $(obj)u-boot
@$(call SYSTEM_MAP,$<) > $(obj)System.map
#
# Auto-generate the autoconf.mk file (which is included by all makefiles)
@@ -463,7 +452,7 @@ $(obj)include/autoconf.mk.dep: $(obj)include/config.h include/common.h
@$(XECHO) Generating $@ ; \
set -e ; \
: Generate the dependancies ; \
$(CC) -x c -DDO_DEPS_ONLY -M $(HOST_CFLAGS) $(CPPFLAGS) \
$(CC) -x c -DDO_DEPS_ONLY -M $(HOSTCFLAGS) $(CPPFLAGS) \
-MQ $(obj)include/autoconf.mk include/common.h > $@
$(obj)include/autoconf.mk: $(obj)include/config.h
@@ -474,8 +463,6 @@ $(obj)include/autoconf.mk: $(obj)include/config.h
sed -n -f tools/scripts/define2mk.sed > $@.tmp && \
mv $@.tmp $@
sinclude $(obj)include/autoconf.mk.dep
#########################################################################
else # !config.mk
all $(obj)u-boot.hex $(obj)u-boot.srec $(obj)u-boot.bin \
@@ -687,6 +674,16 @@ MVBC_P_config: unconfig
o2dnt_config: unconfig
@$(MKCONFIG) o2dnt ppc mpc5xxx o2dnt
pcm030_config \
pcm030_LOWBOOT_config: unconfig
@mkdir -p $(obj)include $(obj)board/phytec/pcm030
@ >$(obj)include/config.h
@[ -z "$(findstring LOWBOOT_,$@)" ] || \
{ echo "TEXT_BASE = 0xFF000000" >$(obj)board/phytec/pcm030/config.tmp ; \
echo "... with LOWBOOT configuration" ; \
}
@$(MKCONFIG) -a pcm030 ppc mpc5xxx pcm030 phytec
pf5200_config: unconfig
@$(MKCONFIG) pf5200 ppc mpc5xxx pf5200 esd
@@ -812,15 +809,20 @@ v38b_config: unconfig
## MPC512x Systems
#########################################################################
ads5121_config \
ads5121_rev2_config \
aria_config: unconfig
@$(MKCONFIG) -a aria ppc mpc512x aria davedenx
mecp5123_config: unconfig
@$(MKCONFIG) -a mecp5123 ppc mpc512x mecp5123 esd
mpc5121ads_config \
mpc5121ads_rev2_config \
: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring rev2,$@)" ] ; then \
echo "#define CONFIG_ADS5121_REV2 1" > $(obj)include/config.h; \
fi
@$(MKCONFIG) -a ads5121 ppc mpc512x ads5121
@$(MKCONFIG) -a mpc5121ads ppc mpc512x mpc5121ads freescale
#########################################################################
## MPC8xx Systems
@@ -1286,6 +1288,14 @@ CATcenter_33_config: unconfig
CMS700_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cms700 esd
# Compact-Center & DevCon-Center use different U-Boot images
compactcenter_config \
devconcenter_config: unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
tr '[:lower:]' '[:upper:]')" >$(obj)include/config.h
@$(MKCONFIG) -n $@ -a compactcenter ppc ppc4xx compactcenter gdsys
CPCI2DP_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx cpci2dp esd
@@ -1311,6 +1321,9 @@ csb472_config: unconfig
DASA_SIM_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx dasa_sim esd
dlvision_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx dlvision gdsys
DP405_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx dp405 esd
@@ -1470,6 +1483,9 @@ PLU405_config: unconfig
PMC405_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx pmc405 esd
PMC405DE_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx pmc405de esd
PMC440_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx pmc440 esd
@@ -1533,6 +1549,17 @@ rainier_nand_config: unconfig
@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
sequoia_ramboot_config \
rainier_ramboot_config: unconfig
@mkdir -p $(obj)include $(obj)board/amcc/sequoia
@echo "#define CONFIG_SYS_RAMBOOT" > $(obj)include/config.h
@echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h
@$(MKCONFIG) -n $@ -a sequoia ppc ppc4xx sequoia amcc
@echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/sequoia/config.tmp
@echo "LDSCRIPT = board/amcc/sequoia/u-boot-ram.lds" >> \
$(obj)board/amcc/sequoia/config.tmp
taihu_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx taihu amcc
@@ -1607,8 +1634,8 @@ xilinx-ppc440-generic_config: unconfig
>> $(obj)board/xilinx/ppc440-generic/config.tmp
@$(MKCONFIG) xilinx-ppc440-generic ppc ppc4xx ppc440-generic xilinx
XPEDITE1K_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx xpedite1k
XPEDITE1000_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx xpedite1000 xes
yosemite_config \
yellowstone_config: unconfig
@@ -1971,6 +1998,9 @@ ZPC1900_config: unconfig
## Coldfire
#########################################################################
M5208EVBE_config : unconfig
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5208evbe freescale
M52277EVB_config \
M52277EVB_spansion_config \
M52277EVB_stmicro_config : unconfig
@@ -2075,18 +2105,15 @@ M5373EVB_config : unconfig
@$(MKCONFIG) -a M5373EVB m68k mcf532x m5373evb freescale
M54451EVB_config \
M54451EVB_spansion_config \
M54451EVB_stmicro_config : unconfig
@case "$@" in \
M54451EVB_config) FLASH=SPANSION;; \
M54451EVB_spansion_config) FLASH=SPANSION;; \
M54451EVB_config) FLASH=NOR;; \
M54451EVB_stmicro_config) FLASH=STMICRO;; \
esac; \
if [ "$${FLASH}" = "SPANSION" ] ; then \
echo "#define CONFIG_SYS_SPANSION_BOOT" >> $(obj)include/config.h ; \
if [ "$${FLASH}" = "NOR" ] ; then \
echo "TEXT_BASE = 0x00000000" > $(obj)board/freescale/m54451evb/config.tmp ; \
cp $(obj)board/freescale/m54451evb/u-boot.spa $(obj)board/freescale/m54451evb/u-boot.lds ; \
$(XECHO) "... with SPANSION boot..." ; \
$(XECHO) "... with NOR boot..." ; \
fi; \
if [ "$${FLASH}" = "STMICRO" ] ; then \
echo "#define CONFIG_CF_SBF" >> $(obj)include/config.h ; \
@@ -2353,8 +2380,23 @@ MPC837XERDB_config: unconfig
MVBLM7_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx mvblm7 matrix_vision
sbc8349_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx sbc8349
sbc8349_config \
sbc8349_PCI_33_config \
sbc8349_PCI_66_config: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _PCI_,$@)" ] ; then \
$(XECHO) -n "... PCI HOST at " ; \
echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _33_,$@)" ] ; then \
$(XECHO) -n "33MHz... " ; \
echo "#define PCI_33M" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _66_,$@)" ] ; then \
$(XECHO) -n "66MHz... " ; \
echo "#define PCI_66M" >>$(obj)include/config.h ; \
fi ;
@$(MKCONFIG) -a sbc8349 ppc mpc83xx sbc8349
SIMPC8313_LP_config \
SIMPC8313_SP_config: unconfig
@@ -2374,6 +2416,8 @@ SIMPC8313_SP_config: unconfig
TQM834x_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx tqm834x tqc
vme8349_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx vme8349 esd
#########################################################################
## MPC85xx Systems
@@ -2456,6 +2500,15 @@ MPC8572DS_config: unconfig
fi
@$(MKCONFIG) -a MPC8572DS ppc mpc85xx mpc8572ds freescale
P2020DS_36BIT_config \
P2020DS_config: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _36BIT_,$@)" ] ; then \
echo "#define CONFIG_PHYS_64BIT" >>$(obj)include/config.h ; \
$(XECHO) "... enabling 36-bit physical addressing." ; \
fi
@$(MKCONFIG) -a P2020DS ppc mpc85xx p2020ds freescale
PM854_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx pm854
@@ -2547,6 +2600,9 @@ MPC8641HPCN_config: unconfig
sbc8641d_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc86xx sbc8641d
XPEDITE5170_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc86xx xpedite5170 xes
#########################################################################
## 74xx/7xx Systems
#########################################################################
@@ -2707,12 +2763,22 @@ at91sam9xeek_config : unconfig
at91sam9261ek_nandflash_config \
at91sam9261ek_dataflash_cs0_config \
at91sam9261ek_dataflash_cs3_config \
at91sam9261ek_config : unconfig
at91sam9261ek_config \
at91sam9g10ek_nandflash_config \
at91sam9g10ek_dataflash_cs0_config \
at91sam9g10ek_dataflash_cs3_config \
at91sam9g10ek_config : unconfig
@mkdir -p $(obj)include
@if [ "$(findstring 9g10,$@)" ] ; then \
echo "#define CONFIG_AT91SAM9G10EK 1" >>$(obj)include/config.h ; \
$(XECHO) "... 9G10 Variant" ; \
else \
echo "#define CONFIG_AT91SAM9261EK 1" >>$(obj)include/config.h ; \
fi;
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
$(XECHO) "... with environment variable in NAND FLASH" ; \
elif [ "$(findstring dataflash_cs3,$@)" ] ; then \
elif [ "$(findstring dataflash_cs0,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_DATAFLASH_CS3 1" >>$(obj)include/config.h ; \
$(XECHO) "... with environment variable in SPI DATAFLASH CS3" ; \
else \
@@ -2721,6 +2787,8 @@ at91sam9261ek_config : unconfig
fi;
@$(MKCONFIG) -a at91sam9261ek arm arm926ejs at91sam9261ek atmel at91
at91sam9263ek_norflash_config \
at91sam9263ek_norflash_boot_config \
at91sam9263ek_nandflash_config \
at91sam9263ek_dataflash_config \
at91sam9263ek_dataflash_cs0_config \
@@ -2729,10 +2797,17 @@ at91sam9263ek_config : unconfig
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
$(XECHO) "... with environment variable in NAND FLASH" ; \
elif [ "$(findstring norflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NORFLASH 1" >>$(obj)include/config.h ; \
$(XECHO) "... with environment variable in NOR FLASH" ; \
else \
echo "#define CONFIG_SYS_USE_DATAFLASH 1" >>$(obj)include/config.h ; \
$(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
fi;
@if [ "$(findstring norflash_boot,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_BOOT_NORFLASH 1" >>$(obj)include/config.h ; \
$(XECHO) "... and boot from NOR FLASH" ; \
fi;
@$(MKCONFIG) -a at91sam9263ek arm arm926ejs at91sam9263ek atmel at91
at91sam9rlek_nandflash_config \
@@ -2749,6 +2824,37 @@ at91sam9rlek_config : unconfig
fi;
@$(MKCONFIG) -a at91sam9rlek arm arm926ejs at91sam9rlek atmel at91
meesc_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs meesc esd at91
pm9261_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs pm9261 ronetix at91
at91sam9m10g45ek_nandflash_config \
at91sam9m10g45ek_dataflash_config \
at91sam9m10g45ek_dataflash_cs0_config \
at91sam9m10g45ek_config \
at91sam9g45ekes_nandflash_config \
at91sam9g45ekes_dataflash_config \
at91sam9g45ekes_dataflash_cs0_config \
at91sam9g45ekes_config : unconfig
@mkdir -p $(obj)include
@if [ "$(findstring 9m10,$@)" ] ; then \
echo "#define CONFIG_AT91SAM9M10G45EK 1" >>$(obj)include/config.h ; \
$(XECHO) "... 9M10G45 Variant" ; \
else \
echo "#define CONFIG_AT91SAM9G45EKES 1" >>$(obj)include/config.h ; \
fi;
@if [ "$(findstring _nandflash,$@)" ] ; then \
echo "#define CONFIG_SYS_USE_NANDFLASH 1" >>$(obj)include/config.h ; \
$(XECHO) "... with environment variable in NAND FLASH" ; \
else \
echo "#define CONFIG_ATMEL_SPI 1" >>$(obj)include/config.h ; \
$(XECHO) "... with environment variable in SPI DATAFLASH CS0" ; \
fi;
@$(MKCONFIG) -a at91sam9m10g45ek arm arm926ejs at91sam9m10g45ek atmel at91
pm9263_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs pm9263 ronetix at91
@@ -2764,7 +2870,7 @@ ap720t_config \
ap920t_config \
ap926ejs_config \
ap946es_config: unconfig
@board/armltd/integratorap/split_by_variant.sh $@
@board/armltd/integrator/split_by_variant.sh ap $@
integratorcp_config \
cp_config \
@@ -2776,7 +2882,7 @@ cp966_config \
cp922_config \
cp922_XA10_config \
cp1026_config: unconfig
@board/armltd/integratorcp/split_by_variant.sh $@
@board/armltd/integrator/split_by_variant.sh cp $@
davinci_dvevm_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs dvevm davinci davinci
@@ -2790,10 +2896,16 @@ davinci_sffsdr_config : unconfig
davinci_sonata_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
davinci_dm355evm_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs dm355evm davinci davinci
lpd7a400_config \
lpd7a404_config: unconfig
@$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x
mv88f6281gtw_ge_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
mx1ads_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t mx1ads NULL imx
@@ -2803,17 +2915,17 @@ mx1fs2_config : unconfig
netstar_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm925t netstar
nmdk8815_config \
nmdk8815_onenand_config: unconfig
nhk8815_config \
nhk8815_onenand_config: unconfig
@mkdir -p $(obj)include
@ > $(obj)include/config.h
@if [ "$(findstring _onenand, $@)" ] ; then \
echo "#define CONFIG_BOOT_ONENAND" >> $(obj)include/config.h; \
$(XECHO) "... configured for OneNand Flash"; \
$(XECHO) "... configured to boot from OneNand Flash"; \
else \
$(XECHO) "... configured for Nand Flash"; \
$(XECHO) "... configured to boot from Nand Flash"; \
fi
@$(MKCONFIG) -a nmdk8815 arm arm926ejs nmdk8815 st nomadik
@$(MKCONFIG) -a nhk8815 arm arm926ejs nhk8815 st nomadik
omap1510inn_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm925t omap1510inn
@@ -2859,12 +2971,18 @@ omap730p2_cs3boot_config : unconfig
fi;
@$(MKCONFIG) -a $(call xtract_omap730p2,$@) arm arm926ejs omap730p2 NULL omap
rd6281a_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
sbc2410x_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t sbc2410x NULL s3c24x0
scb9328_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t scb9328 NULL imx
sheevaplug_config: unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood
smdk2400_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm920t smdk2400 samsung s3c24x0
@@ -2983,6 +3101,9 @@ omap3_pandora_config : unconfig
omap3_zoom1_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom1 omap3 omap3
omap3_zoom2_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm_cortexa8 zoom2 omap3 omap3
#########################################################################
## XScale Systems
#########################################################################
@@ -3041,8 +3162,13 @@ scpu_config: unconfig
pxa255_idp_config: unconfig
@$(MKCONFIG) $(@:_config=) arm pxa pxa255_idp
polaris_config \
trizepsiv_config : unconfig
@$(MKCONFIG) $(@:_config=) arm pxa trizepsiv
@mkdir -p $(obj)include
@if [ "$(findstring polaris,$@)" ] ; then \
echo "#define CONFIG_POLARIS 1" >>$(obj)include/config.h ; \
fi;
@$(MKCONFIG) -a trizepsiv arm pxa trizepsiv
wepep250_config : unconfig
@$(MKCONFIG) $(@:_config=) arm pxa wepep250
@@ -3084,13 +3210,23 @@ imx31_phycore_config : unconfig
mx31ads_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 mx31ads freescale mx31
mx31pdk_config \
mx31pdk_nand_config : unconfig
@mkdir -p $(obj)include
@if [ -n "$(findstring _nand_,$@)" ]; then \
echo "#define CONFIG_NAND_U_BOOT" >> $(obj)include/config.h; \
else \
echo "#define CONFIG_SKIP_LOWLEVEL_INIT" >> $(obj)include/config.h; \
echo "#define CONFIG_SKIP_RELOCATE_UBOOT" >> $(obj)include/config.h; \
fi
@$(MKCONFIG) -a mx31pdk arm arm1136 mx31pdk freescale mx31
omap2420h4_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 omap2420h4 NULL omap24xx
qong_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm1136 qong davedenx mx31
#########################################################################
## ARM1176 Systems
#########################################################################
@@ -3347,7 +3483,16 @@ suzaku_config: unconfig
# Analog Devices boards
BFIN_BOARDS = bf518f-ezbrd bf526-ezbrd bf527-ezkit bf533-ezkit bf533-stamp \
bf537-stamp bf538f-ezkit bf548-ezkit bf561-ezkit
bf537-pnav bf537-stamp bf538f-ezkit bf548-ezkit bf561-ezkit
# Bluetechnix tinyboards
BFIN_BOARDS += cm-bf527 cm-bf533 cm-bf537e cm-bf548 cm-bf561 tcm-bf537
# Misc third party boards
BFIN_BOARDS += bf537-minotaur bf537-srv1 blackstamp
# I-SYST Micromodule
BFIN_BOARDS += ibf-dsp561
$(BFIN_BOARDS:%=%_config) : unconfig
@$(MKCONFIG) $(@:_config=) blackfin blackfin $(@:_config=)
@@ -3447,18 +3592,14 @@ sh7763rdp_config : unconfig
xtract_sh7785lcr = $(subst _32bit,,$(subst _config,,$1))
sh7785lcr_32bit_config \
sh7785lcr_config : unconfig
@ >include/config.h
@echo "#define CONFIG_SH7785LCR 1" >> include/config.h
@mkdir -p $(obj)include
@mkdir -p $(obj)board/renesas/sh7785lcr
@echo "#define CONFIG_SH7785LCR 1" > $(obj)include/config.h
@if [ "$(findstring 32bit, $@)" ] ; then \
echo "#define CONFIG_SH_32BIT 1" >> $(obj)include/config.h ; \
cp $(obj)board/renesas/sh7785lcr/u-boot_32bit \
$(obj)board/renesas/sh7785lcr/u-boot.lds ; \
echo "TEXT_BASE = 0x8ff80000" > \
$(obj)board/renesas/sh7785lcr/config.tmp ; \
$(XECHO) " ... enable 32-Bit Address Extended Mode" ; \
else \
cp $(obj)board/renesas/sh7785lcr/u-boot_29bit \
$(obj)board/renesas/sh7785lcr/u-boot.lds ; \
fi
@$(MKCONFIG) -a $(call xtract_sh7785lcr,$@) sh sh4 sh7785lcr renesas
@@ -3467,6 +3608,11 @@ ap325rxa_config : unconfig
@echo "#define CONFIG_AP325RXA 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) sh sh4 ap325rxa renesas
espt_config : unconfig
@mkdir -p $(obj)include
@echo "#define CONFIG_ESPT 1" > $(obj)include/config.h
@$(MKCONFIG) -a $(@:_config=) sh sh4 espt
#========================================================================
# SPARC
#========================================================================
@@ -3505,11 +3651,16 @@ grsim_leon2_config : unconfig
#########################################################################
clean:
@rm -f $(obj)examples/82559_eeprom $(obj)examples/eepro100_eeprom \
$(obj)examples/hello_world $(obj)examples/interrupt \
$(obj)examples/mem_to_mem_idma2intr \
$(obj)examples/sched $(obj)examples/smc91111_eeprom \
$(obj)examples/test_burst $(obj)examples/timer
@rm -f $(obj)examples/standalone/82559_eeprom \
$(obj)examples/standalone/eepro100_eeprom \
$(obj)examples/standalone/hello_world \
$(obj)examples/standalone/interrupt \
$(obj)examples/standalone/mem_to_mem_idma2intr \
$(obj)examples/standalone/sched \
$(obj)examples/standalone/smc91111_eeprom \
$(obj)examples/standalone/test_burst \
$(obj)examples/standalone/timer
@rm -f $(obj)examples/api/demo{,.bin}
@rm -f $(obj)tools/bmp_logo $(obj)tools/easylogo/easylogo \
$(obj)tools/env/{fw_printenv,fw_setenv} \
$(obj)tools/envcrc \
@@ -3521,13 +3672,14 @@ clean:
$(obj)board/netstar/{eeprom,crcek,crcit,*.srec,*.bin} \
$(obj)board/trab/trab_fkt $(obj)board/voiceblue/eeprom \
$(obj)board/armltd/{integratorap,integratorcp}/u-boot.lds \
$(obj)board/bf5{18f,26,27,33,38f,48,61}-ez{brd,kit}/u-boot.lds \
$(obj)board/bf5{33,37}-stamp/u-boot.lds \
$(obj)lib_blackfin/u-boot.lds \
$(obj)u-boot.lds \
$(obj)cpu/blackfin/bootrom-asm-offsets.[chs]
@rm -f $(obj)include/bmp_logo.h
@rm -f $(obj)nand_spl/{u-boot-spl,u-boot-spl.map,System.map}
@rm -f $(obj)nand_spl/{u-boot.lds,u-boot-spl,u-boot-spl.map,System.map}
@rm -f $(obj)onenand_ipl/onenand-{ipl,ipl.bin,ipl-2k.bin,ipl-4k.bin,ipl.map}
@rm -f $(obj)api_examples/demo $(TIMESTAMP_FILE) $(VERSION_FILE)
@rm -f $(obj)onenand_ipl/u-boot.lds
@rm -f $(TIMESTAMP_FILE) $(VERSION_FILE)
@find $(OBJTREE) -type f \
\( -name 'core' -o -name '*.bak' -o -name '*~' \
-o -name '*.o' -o -name '*.a' -o -name '*.exe' \) -print \
@@ -3546,7 +3698,6 @@ clobber: clean
@rm -f $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
@[ ! -d $(obj)nand_spl ] || find $(obj)nand_spl -name "*" -type l -print | xargs rm -f
@[ ! -d $(obj)onenand_ipl ] || find $(obj)onenand_ipl -name "*" -type l -print | xargs rm -f
@[ ! -d $(obj)api_examples ] || find $(obj)api_examples -name "*" -type l -print | xargs rm -f
ifeq ($(OBJTREE),$(SRCTREE))
mrproper \

126
README
View File

@@ -603,7 +603,6 @@ The following options need to be configured:
CONFIG_CMD_DATE * support for RTC, date/time...
CONFIG_CMD_DHCP * DHCP support
CONFIG_CMD_DIAG * Diagnostics
CONFIG_CMD_DOC * Disk-On-Chip Support
CONFIG_CMD_DS4510 * ds4510 I2C gpio commands
CONFIG_CMD_DS4510_INFO * ds4510 I2C info command
CONFIG_CMD_DS4510_MEM * ds4510 I2C eeprom/sram commansd
@@ -1074,6 +1073,26 @@ The following options need to be configured:
allows for a "silent" boot where a splash screen is
loaded very quickly after power-on.
CONFIG_SPLASH_SCREEN_ALIGN
If this option is set the splash image can be freely positioned
on the screen. Environment variable "splashpos" specifies the
position as "x,y". If a positive number is given it is used as
number of pixel from left/top. If a negative number is given it
is used as number of pixel from right/bottom. You can also
specify 'm' for centering the image.
Example:
setenv splashpos m,m
=> image at center of screen
setenv splashpos 30,20
=> image at x = 30 and y = 20
setenv splashpos -10,m
=> vertically centered image
at x = dspWidth - bmpWidth - 9
- Gzip compressed BMP image support: CONFIG_VIDEO_BMP_GZIP
If this option is set, additionally to standard BMP
@@ -1165,6 +1184,11 @@ The following options need to be configured:
Defines a default value for the IP address of a TFTP
server to contact when using the "tftboot" command.
CONFIG_KEEP_SERVERADDR
Keeps the server's MAC address, in the env 'serveraddr'
for passing to bootargs (like Linux's netconsole option)
- Multicast TFTP Mode:
CONFIG_MCAST_TFTP
@@ -1315,11 +1339,6 @@ The following options need to be configured:
clock chips. See common/cmd_i2c.c for a description of the
command line interface.
CONFIG_I2C_CMD_TREE is a recommended option that places
all I2C commands under a single 'i2c' root command. The
older 'imm', 'imd', 'iprobe' etc. commands are considered
deprecated and may disappear in the future.
CONFIG_HARD_I2C selects a hardware I2C controller.
CONFIG_SOFT_I2C configures u-boot to use a software (aka
@@ -1435,9 +1454,9 @@ The following options need to be configured:
CONFIG_SYS_I2C_NOPROBES
This option specifies a list of I2C devices that will be skipped
when the 'i2c probe' command is issued (or 'iprobe' using the legacy
command). If CONFIG_I2C_MULTI_BUS is set, specify a list of bus-device
pairs. Otherwise, specify a 1D array of device addresses
when the 'i2c probe' command is issued. If CONFIG_I2C_MULTI_BUS
is set, specify a list of bus-device pairs. Otherwise, specify
a 1D array of device addresses
e.g.
#undef CONFIG_I2C_MULTI_BUS
@@ -1851,6 +1870,17 @@ The following options need to be configured:
These options enable and control the auto-update feature;
for a more detailed description refer to doc/README.update.
- MTD Support (mtdparts command, UBI support)
CONFIG_MTD_DEVICE
Adds the MTD device infrastructure from the Linux kernel.
Needed for mtdparts command support.
CONFIG_MTD_PARTITIONS
Adds the MTD partitioning infrastructure from the Linux
kernel. Needed for UBI support.
Legacy uImage format:
Arg Where When
@@ -2422,6 +2452,12 @@ to save the current settings.
to a block boundary, and CONFIG_ENV_SIZE must be a multiple of
the NAND devices block size.
- CONFIG_NAND_ENV_DST
Defines address in RAM to which the nand_spl code should copy the
environment. If redundant environment is used, it will be copied to
CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE.
- CONFIG_SYS_SPI_INIT_OFFSET
Defines offset to the initial SPI buffer area in DPRAM. The
@@ -2696,6 +2732,11 @@ Low Level (hardware related) configuration options:
some other boot loader or by a debugger which
performs these initializations itself.
- CONFIG_PRELOADER
Modifies the behaviour of start.S when compiling a loader
that is executed before the actual U-Boot. E.g. when
compiling a NAND SPL.
Building the Software:
======================
@@ -2871,14 +2912,7 @@ mw - memory write (fill)
cp - memory copy
cmp - memory compare
crc32 - checksum calculation
imd - i2c memory display
imm - i2c memory modify (auto-incrementing)
inm - i2c memory modify (constant address)
imw - i2c memory write (fill)
icrc32 - i2c checksum calculation
iprobe - probe to discover valid I2C chip addresses
iloop - infinite loop on address range
isdram - print SDRAM configuration information
i2c - I2C sub-system
sspi - SPI utility commands
base - print or set address offset
printenv- print environment variables
@@ -3982,15 +4016,15 @@ U-Boot Porting Guide:
list, October 2002]
int main (int argc, char *argv[])
int main(int argc, char *argv[])
{
sighandler_t no_more_time;
signal (SIGALRM, no_more_time);
alarm (PROJECT_DEADLINE - toSec (3 * WEEK));
signal(SIGALRM, no_more_time);
alarm(PROJECT_DEADLINE - toSec (3 * WEEK));
if (available_money > available_manpower) {
pay consultant to port U-Boot;
Pay consultant to port U-Boot;
return 0;
}
@@ -3998,35 +4032,47 @@ int main (int argc, char *argv[])
Subscribe to u-boot mailing list;
if (clueless) {
email ("Hi, I am new to U-Boot, how do I get started?");
}
if (clueless)
email("Hi, I am new to U-Boot, how do I get started?");
while (learning) {
Read the README file in the top level directory;
Read http://www.denx.de/twiki/bin/view/DULG/Manual ;
Read http://www.denx.de/twiki/bin/view/DULG/Manual;
Read applicable doc/*.README;
Read the source, Luke;
/* find . -name "*.[chS]" | xargs grep -i <keyword> */
}
if (available_money > toLocalCurrency ($2500)) {
Buy a BDI2000;
} else {
if (available_money > toLocalCurrency ($2500))
Buy a BDI3000;
else
Add a lot of aggravation and time;
if (a similar board exists) { /* hopefully... */
cp -a board/<similar> board/<myboard>
cp include/configs/<similar>.h include/configs/<myboard>.h
} else {
Create your own board support subdirectory;
Create your own board include/configs/<myboard>.h file;
}
Edit new board/<myboard> files
Edit new include/configs/<myboard>.h
Create your own board support subdirectory;
Create your own board config file;
while (!running) {
do {
Add / modify source code;
} until (compiles);
Debug;
if (clueless)
email ("Hi, I am having problems...");
while (!accepted) {
while (!running) {
do {
Add / modify source code;
} until (compiles);
Debug;
if (clueless)
email("Hi, I am having problems...");
}
Send patch file to the U-Boot email list;
if (reasonable critiques)
Incorporate improvements from email list code review;
else
Defend code as written;
}
Send patch file to Wolfgang;
return 0;
}

View File

@@ -53,5 +53,3 @@ int platform_sys_info(struct sys_info *si)
return 1;
}
#endif /* CONFIG_API */

View File

@@ -53,7 +53,7 @@ int platform_sys_info(struct sys_info *si)
#define bi_bar bi_immr_base
#elif defined(CONFIG_MPC5xxx)
#define bi_bar bi_mbar_base
#elif defined(CONFIG_MPC83XX)
#elif defined(CONFIG_MPC83xx)
#define bi_bar bi_immrbar
#elif defined(CONFIG_MPC8220)
#define bi_bar bi_mbar_base

View File

@@ -1,7 +0,0 @@
crc32.c
ctype.c
demo
demo.bin
ppcstring.S
string.c
vsprintf.c

View File

@@ -1,108 +0,0 @@
#
# (C) Copyright 2007 Semihalf
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundatio; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
ifeq ($(ARCH),ppc)
LOAD_ADDR = 0x40000
endif
ifeq ($(ARCH),arm)
LOAD_ADDR = 0x1000000
endif
include $(TOPDIR)/config.mk
ELF-$(CONFIG_API) += demo
BIN-$(CONFIG_API) += demo.bin
ELF := $(ELF-y)
BIN := $(BIN-y)
#CFLAGS += -v
COBJS-$(CONFIG_API) += $(ELF:=.o)
SOBJS-$(CONFIG_API) += crt0.o
ifeq ($(ARCH),ppc)
SOBJS-$(CONFIG_API) += ppcstring.o
endif
COBJS := $(COBJS-y)
SOBJS := $(SOBJS-y)
LIB = $(obj)libglue.a
LIBCOBJS-$(CONFIG_API) += glue.o crc32.o ctype.o string.o vsprintf.o \
libgenwrap.o
LIBCOBJS := $(LIBCOBJS-y)
LIBOBJS = $(addprefix $(obj),$(SOBJS) $(LIBCOBJS))
SRCS := $(COBJS:.o=.c) $(LIBCOBJS:.o=.c) $(SOBJS:.o=.S)
OBJS := $(addprefix $(obj),$(COBJS))
ELF := $(addprefix $(obj),$(ELF))
BIN := $(addprefix $(obj),$(BIN))
gcclibdir := $(shell dirname `$(CC) -print-libgcc-file-name`)
CPPFLAGS += -I..
all: $(obj).depend $(OBJS) $(LIB) $(ELF) $(BIN)
#########################################################################
$(LIB): $(obj).depend $(LIBOBJS)
$(AR) $(ARFLAGS) $@ $(LIBOBJS)
$(ELF):
$(obj)%: $(obj)%.o $(LIB)
$(LD) $(obj)crt0.o -Ttext $(LOAD_ADDR) \
-o $@ $< $(LIB) \
-L$(gcclibdir) -lgcc
$(BIN):
$(obj)%.bin: $(obj)%
$(OBJCOPY) -O binary $< $@ 2>/dev/null
$(obj)crc32.c:
@rm -f $(obj)crc32.c
ln -s $(src)../lib_generic/crc32.c $(obj)crc32.c
$(obj)ctype.c:
@rm -f $(obj)ctype.c
ln -s $(src)../lib_generic/ctype.c $(obj)ctype.c
$(obj)string.c:
@rm -f $(obj)string.c
ln -s $(src)../lib_generic/string.c $(obj)string.c
$(obj)vsprintf.c:
@rm -f $(obj)vsprintf.c
ln -s $(src)../lib_generic/vsprintf.c $(obj)vsprintf.c
ifeq ($(ARCH),ppc)
$(obj)ppcstring.S:
@rm -f $(obj)ppcstring.S
ln -s $(src)../lib_ppc/ppcstring.S $(obj)ppcstring.S
endif
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -1,5 +1,5 @@
/*
* (C) Copyright 2005
* (C) Copyright 2005-2009
* BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
*
* (C) Copyright 2000-2003
@@ -27,7 +27,18 @@
#include <common.h>
#include <command.h>
#include "asm/m5282.h"
#include "VCxK.h"
#include <bmp_layout.h>
#include <status_led.h>
#include <bus_vcxk.h>
/*---------------------------------------------------------------------------*/
DECLARE_GLOBAL_DATA_PTR;
unsigned long display_width;
unsigned long display_height;
/*---------------------------------------------------------------------------*/
int checkboard (void)
{
@@ -89,7 +100,6 @@ phys_size_t initdram (int board_type)
return size;
}
#if defined(CONFIG_SYS_DRAM_TEST)
int testdram (void)
{
@@ -126,37 +136,99 @@ int testdram (void)
int misc_init_r(void)
{
init_vcxk();
#ifdef CONFIG_HW_WATCHDOG
hw_watchdog_init();
#endif
#ifndef CONFIG_VIDEO
vcxk_init(16, 16);
#endif
return 1;
}
#if defined(CONFIG_VIDEO)
/*
****h* EB+CPU5282-T1/drv_video_init
* FUNCTION
***
*/
int drv_video_init(void)
{
char *s;
unsigned long splash;
printf("Init Video as ");
if ((s = getenv("displaywidth")) != NULL)
display_width = simple_strtoul(s, NULL, 10);
else
display_width = 256;
if ((s = getenv("displayheight")) != NULL)
display_height = simple_strtoul(s, NULL, 10);
else
display_height = 256;
printf("%lu x %lu pixel matrix\n", display_width, display_height);
MCFCCM_CCR &= ~MCFCCM_CCR_SZEN;
MCFGPIO_PEPAR &= ~MCFGPIO_PEPAR_PEPA2;
vcxk_init(display_width, display_height);
#ifdef CONFIG_SPLASH_SCREEN
if ((s = getenv("splashimage")) != NULL) {
debug("use splashimage: %s\n", s);
splash = simple_strtoul(s, NULL, 16);
debug("use splashimage: %x\n", splash);
vcxk_acknowledge_wait();
video_display_bitmap(splash, 0, 0);
}
#endif
return 0;
}
#endif
/*---------------------------------------------------------------------------*/
int do_vcimage (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
#ifdef CONFIG_VIDEO
int do_brightness(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int rcode = 0;
ulong source;
ulong side;
ulong bright;
switch (argc) {
case 2:
source = simple_strtoul(argv[1],NULL,16);
vcxk_loadimage(source);
rcode = 0;
case 3:
side = simple_strtoul(argv[1], NULL, 10);
bright = simple_strtoul(argv[2], NULL, 10);
if ((side >= 0) && (side <= 3) &&
(bright >= 0) && (bright <= 1000)) {
vcxk_setbrightness(side, bright);
rcode = 0;
} else {
printf("parameters out of range\n");
printf("Usage:\n%s\n", cmdtp->usage);
rcode = 1;
}
break;
default:
cmd_usage(cmdtp);
printf("Usage:\n%s\n", cmdtp->usage);
rcode = 1;
break;
}
return rcode;
}
/***************************************************/
/*---------------------------------------------------------------------------*/
U_BOOT_CMD(
vcimage, 2, 0, do_vcimage,
"loads an image to Display",
"vcimage addr\n"
bright, 3, 0, do_brightness,
"sets the display brightness\n",
" <side> <0..1000>\n side: 0/3=both; 1=first; 2=second\n"
);
/* EOF EB+MCF-EV123c */
#endif
/* EOF EB+MCF-EV123.c */

View File

@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS = $(BOARD).o cfm_flash.o flash.o VCxK.o
COBJS = $(BOARD).o cfm_flash.o flash.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))

View File

@@ -1,136 +0,0 @@
/*
* (C) Copyright 2005
* BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/m5282.h>
#include "VCxK.h"
vu_char *vcxk_bws = (vu_char *)(CONFIG_SYS_CS3_BASE);
#define VCXK_BWS vcxk_bws
static ulong vcxk_driver;
ulong search_vcxk_driver(void);
void vcxk_cls(void);
void vcxk_setbrightness(short brightness);
int vcxk_request(void);
int vcxk_acknowledge_wait(void);
void vcxk_clear(void);
int init_vcxk(void)
{
VIDEO_Invert_CFG &= ~VIDEO_Invert_IO;
VIDEO_INVERT_PORT |= VIDEO_INVERT_PIN;
VIDEO_INVERT_DDR |= VIDEO_INVERT_PIN;
VIDEO_REQUEST_PORT |= VIDEO_REQUEST_PIN;
VIDEO_REQUEST_DDR |= VIDEO_REQUEST_PIN;
VIDEO_ACKNOWLEDGE_DDR &= ~VIDEO_ACKNOWLEDGE_PIN;
vcxk_driver = search_vcxk_driver();
if (vcxk_driver)
{
/* use flash resist driver */
}
else
{
vcxk_cls();
vcxk_cls();
vcxk_setbrightness(1000);
}
VIDEO_ENABLE_DDR |= VIDEO_ENABLE_PIN;
VIDEO_ENABLE_PORT |= VIDEO_ENABLE_PIN;
VIDEO_ENABLE_PORT &= ~VIDEO_ENABLE_PIN;
return 1;
}
void vcxk_loadimage(ulong source)
{
int cnt;
vcxk_acknowledge_wait();
for (cnt=0; cnt<16384; cnt++)
{
VCXK_BWS[cnt*2] = (*(vu_char*) source);
source++;
}
vcxk_request();
}
void vcxk_cls(void)
{
vcxk_acknowledge_wait();
vcxk_clear();
vcxk_request();
}
void vcxk_clear(void)
{
int cnt;
for (cnt=0; cnt<16384; cnt++)
{
VCXK_BWS[cnt*2] = 0x00;
}
}
void vcxk_setbrightness(short brightness)
{
VCXK_BWS[0x8000]=(brightness >> 4) +2;
VCXK_BWS[0xC000]= (brightness + 23) >> 8;
VCXK_BWS[0xC001]= (brightness + 23) & 0xFF;
}
int vcxk_request(void)
{
if (vcxk_driver)
{
/* use flash resist driver */
}
else
{
VIDEO_REQUEST_PORT &= ~VIDEO_REQUEST_PIN;
VIDEO_REQUEST_PORT |= VIDEO_REQUEST_PIN;
}
return 1;
}
int vcxk_acknowledge_wait(void)
{
if (vcxk_driver)
{
/* use flash resist driver */
}
else
{
while (!(VIDEO_ACKNOWLEDGE_PORT & VIDEO_ACKNOWLEDGE_PIN));
}
return 1;
}
ulong search_vcxk_driver(void)
{
return 0;
}
/* eof */

View File

@@ -1,48 +0,0 @@
/*
* (C) Copyright 2005
* BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef __VCXK_H_
#define __VCXK_H_
extern int init_vcxk(void);
void vcxk_loadimage(ulong source);
#define VIDEO_ACKNOWLEDGE_PORT MCFGPTB_GPTPORT
#define VIDEO_ACKNOWLEDGE_DDR MCFGPTB_GPTDDR
#define VIDEO_ACKNOWLEDGE_PIN 0x0001
#define VIDEO_ENABLE_PORT MCFGPTB_GPTPORT
#define VIDEO_ENABLE_DDR MCFGPTB_GPTDDR
#define VIDEO_ENABLE_PIN 0x0002
#define VIDEO_REQUEST_PORT MCFGPTB_GPTPORT
#define VIDEO_REQUEST_DDR MCFGPTB_GPTDDR
#define VIDEO_REQUEST_PIN 0x0004
#define VIDEO_Invert_CFG MCFGPIO_PEPAR
#define VIDEO_Invert_IO MCFGPIO_PEPAR_PEPA2
#define VIDEO_INVERT_PORT MCFGPIO_PORTE
#define VIDEO_INVERT_DDR MCFGPIO_DDRE
#define VIDEO_INVERT_PIN MCFGPIO_PORT2
#endif

View File

@@ -34,7 +34,7 @@
*/
#include <common.h>
#include <asm/processor.h>
#include <devices.h>
#include <stdio_dev.h>
#include "ps2kbd.h"
@@ -226,7 +226,7 @@ int overwrite_console (void)
int drv_isa_kbd_init (void)
{
int error;
device_t kbddev ;
struct stdio_dev kbddev ;
char *stdinname = getenv ("stdin");
if(isa_kbd_init() == -1)
@@ -239,7 +239,7 @@ int drv_isa_kbd_init (void)
kbddev.getc = kbd_getc ;
kbddev.tstc = kbd_testc ;
error = device_register (&kbddev);
error = stdio_register (&kbddev);
if(error==0) {
/* check if this is the standard input device */
if(strcmp(stdinname,DEVNAME)==0) {

View File

@@ -22,7 +22,7 @@
*/
#include <common.h>
#include <devices.h>
#include <stdio_dev.h>
#include "memio.h"
#include <part.h>
@@ -98,7 +98,7 @@ int video_inited = 0;
int drv_video_init(void)
{
int error, devices = 1 ;
device_t vgadev ;
struct stdio_dev vgadev ;
if (video_inited) return 1;
video_inited = 1;
video_init();
@@ -112,7 +112,7 @@ int drv_video_init(void)
vgadev.tstc = NULL;
vgadev.start = video_start;
error = device_register (&vgadev);
error = stdio_register (&vgadev);
if (error == 0)
{

View File

@@ -26,6 +26,7 @@
#include <common.h>
#include <mpc8xx.h>
#include <malloc.h>
#include <i2c.h>
#include "../include/mv_gen_reg.h"
#include "../include/core.h"
@@ -42,7 +43,7 @@
/* Assuming that there is only one master on the bus (us) */
static void i2c_init (int speed, int slaveaddr)
void i2c_init (int speed, int slaveaddr)
{
unsigned int n, m, freq, margin, power;
unsigned int actualN = 0, actualM = 0;
@@ -367,7 +368,7 @@ i2c_set_dev_offset (uchar dev_addr, unsigned int offset, int ten_bit,
return 0; /* sucessful completion */
}
uchar
int
i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data,
int len)
{
@@ -376,7 +377,8 @@ i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data,
DP (puts ("i2c_read\n"));
i2c_init (i2cFreq, 0); /* set the i2c frequency */
/* set the i2c frequency */
i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
status = i2c_start ();
@@ -396,7 +398,8 @@ i2c_read (uchar dev_addr, unsigned int offset, int alen, uchar * data,
return status;
}
i2c_init (i2cFreq, 0); /* set the i2c frequency again */
/* set the i2c frequency again */
i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
status = i2c_start ();
if (status) {
@@ -442,7 +445,7 @@ void i2c_stop (void)
/* */
/* returns 0 = succesful */
/* anything but zero is failure */
uchar
int
i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data,
int len)
{
@@ -451,7 +454,8 @@ i2c_write (uchar dev_addr, unsigned int offset, int alen, uchar * data,
DP (puts ("i2c_write\n"));
i2c_init (i2cFreq, 0); /* set the i2c frequency */
/* set the i2c frequency */
i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
status = i2c_start (); /* send a start bit */
@@ -504,7 +508,8 @@ int i2c_probe (uchar chip)
DP (puts ("i2c_probe\n"));
i2c_init (i2cFreq, 0); /* set the i2c frequency */
/* set the i2c frequency */
i2c_init (i2cFreq, CONFIG_SYS_I2C_SLAVE);
status = i2c_start (); /* send a start bit */

View File

@@ -37,8 +37,7 @@
#include <common.h>
#include <net.h>
#include "mv_regs.h"
#include "../common/ppc_error_no.h"
#include <asm/errno.h>
/*************************************************************************
**************************************************************************

View File

@@ -37,7 +37,7 @@
#include <common.h>
#include <net.h>
#include "mv_regs.h"
#include "../common/ppc_error_no.h"
#include <asm/errno.h>
/*************************************************************************

View File

@@ -0,0 +1,51 @@
#
# (C) Copyright 2009
# Marvell Semiconductor <www.marvell.com>
# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
# MA 02110-1301 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := mv88f6281gtw_ge.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -0,0 +1,25 @@
#
# (C) Copyright 2009
# Marvell Semiconductor <www.marvell.com>
# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
# MA 02110-1301 USA
#
TEXT_BASE = 0x00600000

View File

@@ -0,0 +1,141 @@
/*
* Maintainer : Prafulla Wadaskar <prafulla@marvell.com>
*
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#include <common.h>
#include <netdev.h>
#include <asm/arch/kirkwood.h>
#include <asm/arch/mpp.h>
#include "mv88f6281gtw_ge.h"
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
/*
* default gpio configuration
* There are maximum 64 gpios controlled through 2 sets of registers
* the below configuration configures mainly initial LED status
*/
kw_config_gpio(MV88F6281GTW_GE_OE_VAL_LOW,
MV88F6281GTW_GE_OE_VAL_HIGH,
MV88F6281GTW_GE_OE_LOW, MV88F6281GTW_GE_OE_HIGH);
/* Multi-Purpose Pins Functionality configuration */
u32 kwmpp_config[] = {
MPP0_SPI_SCn,
MPP1_SPI_MOSI,
MPP2_SPI_SCK,
MPP3_SPI_MISO,
MPP4_GPIO,
MPP5_GPO,
MPP6_SYSRST_OUTn,
MPP7_SPI_SCn,
MPP8_TW_SDA,
MPP9_TW_SCK,
MPP10_UART0_TXD,
MPP11_UART0_RXD,
MPP12_GPO,
MPP13_GPIO,
MPP14_GPIO,
MPP15_GPIO,
MPP16_GPIO,
MPP17_GPIO,
MPP18_GPO,
MPP19_GPO,
MPP20_GPIO,
MPP21_GPIO,
MPP22_GPIO,
MPP23_GPIO,
MPP24_GPIO,
MPP25_GPIO,
MPP26_GPIO,
MPP27_GPIO,
MPP28_GPIO,
MPP29_GPIO,
MPP30_GPIO,
MPP31_GPIO,
MPP32_GPIO,
MPP33_GPIO,
MPP34_GPIO,
MPP35_GPIO,
MPP36_GPIO,
MPP37_GPIO,
MPP38_GPIO,
MPP39_GPIO,
MPP40_GPIO,
MPP41_GPIO,
MPP42_GPIO,
MPP43_GPIO,
MPP44_GPIO,
MPP45_GPIO,
MPP46_GPIO,
MPP47_GPIO,
MPP48_GPIO,
MPP49_GPIO,
0
};
kirkwood_mpp_conf(kwmpp_config);
/*
* arch number of board
*/
gd->bd->bi_arch_number = MACH_TYPE_MV88F6281GTW_GE;
/* adress of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
return 0;
}
int dram_init(void)
{
int i;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
gd->bd->bi_dram[i].start = kw_sdram_bar(i);
gd->bd->bi_dram[i].size = kw_sdram_bs(i);
}
return 0;
}
#ifdef CONFIG_MV88E61XX_SWITCH
void reset_phy(void)
{
/* configure and initialize switch */
struct mv88e61xx_config swcfg = {
.name = "egiga0",
.vlancfg = MV88E61XX_VLANCFG_ROUTER,
.rgmii_delay = MV88E61XX_RGMII_DELAY_EN,
.led_init = MV88E61XX_LED_INIT_EN,
.mdip = MV88E61XX_MDIP_REVERSE,
.portstate = MV88E61XX_PORTSTT_FORWARDING,
.cpuport = (1 << 5),
.ports_enabled = 0x3f
};
mv88e61xx_switch_initialize(&swcfg);
}
#endif /* CONFIG_MV88E61XX_SWITCH */

View File

@@ -0,0 +1,36 @@
/*
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#ifndef __MV88F6281GTW_GE_H
#define __MV88F6281GTW_GE_H
#define MV88F6281GTW_GE_OE_LOW (~((1 << 7) | (1 << 12) \
|(1 << 20) | (1 << 21))) /*enable GLED,RLED */
#define MV88F6281GTW_GE_OE_HIGH (~((1 << 4)|(1 << 6)|(1 << 7)|(1 << 12) \
|(1 << 13)|(1 << 16)|(1 << 17)))
#define MV88F6281GTW_GE_OE_VAL_LOW (1 << 20) /*make GLED on */
#define MV88F6281GTW_GE_OE_VAL_HIGH ((1 << 6)|(1 << 13)|(1 << 16)|(1 << 17))
#endif /* __MV88F6281GTW_GE_H */

View File

@@ -0,0 +1,51 @@
#
# (C) Copyright 2009
# Marvell Semiconductor <www.marvell.com>
# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
# MA 02110-1301 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := rd6281a.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -0,0 +1,25 @@
#
# (C) Copyright 2009
# Marvell Semiconductor <www.marvell.com>
# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
# MA 02110-1301 USA
#
TEXT_BASE = 0x00600000

View File

@@ -0,0 +1,179 @@
/*
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#include <common.h>
#include <miiphy.h>
#include <netdev.h>
#include <asm/arch/kirkwood.h>
#include <asm/arch/mpp.h>
#include "rd6281a.h"
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
/*
* default gpio configuration
* There are maximum 64 gpios controlled through 2 sets of registers
* the below configuration configures mainly initial LED status
*/
kw_config_gpio(RD6281A_OE_VAL_LOW,
RD6281A_OE_VAL_HIGH,
RD6281A_OE_LOW, RD6281A_OE_HIGH);
/* Multi-Purpose Pins Functionality configuration */
u32 kwmpp_config[] = {
MPP0_NF_IO2,
MPP1_NF_IO3,
MPP2_NF_IO4,
MPP3_NF_IO5,
MPP4_NF_IO6,
MPP5_NF_IO7,
MPP6_SYSRST_OUTn,
MPP7_GPO,
MPP8_TW_SDA,
MPP9_TW_SCK,
MPP10_UART0_TXD,
MPP11_UART0_RXD,
MPP12_SD_CLK,
MPP13_SD_CMD,
MPP14_SD_D0,
MPP15_SD_D1,
MPP16_SD_D2,
MPP17_SD_D3,
MPP18_NF_IO0,
MPP19_NF_IO1,
MPP20_GE1_0,
MPP21_GE1_1,
MPP22_GE1_2,
MPP23_GE1_3,
MPP24_GE1_4,
MPP25_GE1_5,
MPP26_GE1_6,
MPP27_GE1_7,
MPP28_GPIO,
MPP29_GPIO,
MPP30_GE1_10,
MPP31_GE1_11,
MPP32_GE1_12,
MPP33_GE1_13,
MPP34_GE1_14,
MPP35_GPIO,
MPP36_AUDIO_SPDIFI,
MPP37_AUDIO_SPDIFO,
MPP38_GPIO,
MPP39_TDM_SPI_CS0,
MPP40_TDM_SPI_SCK,
MPP41_TDM_SPI_MISO,
MPP42_TDM_SPI_MOSI,
MPP43_TDM_CODEC_INTn,
MPP44_GPIO,
MPP45_TDM_PCLK,
MPP46_TDM_FS,
MPP47_TDM_DRX,
MPP48_TDM_DTX,
MPP49_GPIO,
0
};
kirkwood_mpp_conf(kwmpp_config);
/*
* arch number of board
*/
gd->bd->bi_arch_number = MACH_TYPE_RD88F6281;
/* adress of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
return 0;
}
int dram_init(void)
{
int i;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
gd->bd->bi_dram[i].start = kw_sdram_bar(i);
gd->bd->bi_dram[i].size = kw_sdram_bs(i);
}
return 0;
}
void mv_phy_88e1116_init(char *name)
{
u16 reg;
u16 devadr;
if (miiphy_set_current_dev(name))
return;
/* command to read PHY dev address */
if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
printf("Err..%s could not read PHY dev address\n",
__FUNCTION__);
return;
}
/*
* Enable RGMII delay on Tx and Rx for CPU port
* Ref: sec 4.7.2 of chip datasheet
*/
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
/* reset the phy */
if (miiphy_read (name, devadr, PHY_BMCR, &reg) != 0) {
printf("Err..(%s) PHY status read failed\n", __FUNCTION__);
return;
}
if (miiphy_write (name, devadr, PHY_BMCR, reg | 0x8000) != 0) {
printf("Err..(%s) PHY reset failed\n", __FUNCTION__);
return;
}
printf("88E1116 Initialized on %s\n", name);
}
/* Configure and enable Switch and PHY */
void reset_phy(void)
{
/* configure and initialize switch */
struct mv88e61xx_config swcfg = {
.name = "egiga0",
.vlancfg = MV88E61XX_VLANCFG_ROUTER,
.rgmii_delay = MV88E61XX_RGMII_DELAY_EN,
.led_init = MV88E61XX_LED_INIT_EN,
.portstate = MV88E61XX_PORTSTT_FORWARDING,
.cpuport = (1 << 5),
.ports_enabled = 0x3f,
};
mv88e61xx_switch_initialize(&swcfg);
/* configure and initialize PHY */
mv_phy_88e1116_init("egiga1");
}

View File

@@ -0,0 +1,41 @@
/*
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#ifndef __RD6281A_H
#define __RD6281A_H
#define RD6281A_OE_LOW (~(1 << 7))
#define RD6281A_OE_HIGH (~(1 << 2 | 1 << 12))
#define RD6281A_OE_VAL_LOW (0)
#define RD6281A_OE_VAL_HIGH (1 << 12)
/* PHY related */
#define MV88E1116_LED_FCTRL_REG 10
#define MV88E1116_CPRSP_CR3_REG 21
#define MV88E1116_MAC_CTRL_REG 21
#define MV88E1116_PGADR_REG 22
#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
#endif /* __RD6281A_H */

View File

@@ -0,0 +1,51 @@
#
# (C) Copyright 2009
# Marvell Semiconductor <www.marvell.com>
# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
# MA 02110-1301 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := sheevaplug.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak .depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -0,0 +1,25 @@
#
# (C) Copyright 2009
# Marvell Semiconductor <www.marvell.com>
# Written-by: Prafulla Wadaskar <prafulla@marvell.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
# MA 02110-1301 USA
#
TEXT_BASE = 0x00600000

View File

@@ -0,0 +1,155 @@
/*
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#include <common.h>
#include <miiphy.h>
#include <asm/arch/kirkwood.h>
#include <asm/arch/mpp.h>
#include "sheevaplug.h"
DECLARE_GLOBAL_DATA_PTR;
int board_init(void)
{
/*
* default gpio configuration
* There are maximum 64 gpios controlled through 2 sets of registers
* the below configuration configures mainly initial LED status
*/
kw_config_gpio(SHEEVAPLUG_OE_VAL_LOW,
SHEEVAPLUG_OE_VAL_HIGH,
SHEEVAPLUG_OE_LOW, SHEEVAPLUG_OE_HIGH);
/* Multi-Purpose Pins Functionality configuration */
u32 kwmpp_config[] = {
MPP0_NF_IO2,
MPP1_NF_IO3,
MPP2_NF_IO4,
MPP3_NF_IO5,
MPP4_NF_IO6,
MPP5_NF_IO7,
MPP6_SYSRST_OUTn,
MPP7_GPO,
MPP8_UART0_RTS,
MPP9_UART0_CTS,
MPP10_UART0_TXD,
MPP11_UART0_RXD,
MPP12_SD_CLK,
MPP13_SD_CMD,
MPP14_SD_D0,
MPP15_SD_D1,
MPP16_SD_D2,
MPP17_SD_D3,
MPP18_NF_IO0,
MPP19_NF_IO1,
MPP20_GPIO,
MPP21_GPIO,
MPP22_GPIO,
MPP23_GPIO,
MPP24_GPIO,
MPP25_GPIO,
MPP26_GPIO,
MPP27_GPIO,
MPP28_GPIO,
MPP29_TSMP9,
MPP30_GPIO,
MPP31_GPIO,
MPP32_GPIO,
MPP33_GPIO,
MPP34_GPIO,
MPP35_GPIO,
MPP36_GPIO,
MPP37_GPIO,
MPP38_GPIO,
MPP39_GPIO,
MPP40_GPIO,
MPP41_GPIO,
MPP42_GPIO,
MPP43_GPIO,
MPP44_GPIO,
MPP45_GPIO,
MPP46_GPIO,
MPP47_GPIO,
MPP48_GPIO,
MPP49_GPIO,
0
};
kirkwood_mpp_conf(kwmpp_config);
/*
* arch number of board
*/
gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG;
/* adress of boot parameters */
gd->bd->bi_boot_params = kw_sdram_bar(0) + 0x100;
return 0;
}
int dram_init(void)
{
int i;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
gd->bd->bi_dram[i].start = kw_sdram_bar(i);
gd->bd->bi_dram[i].size = kw_sdram_bs(i);
}
return 0;
}
#ifdef CONFIG_RESET_PHY_R
/* Configure and enable MV88E1116 PHY */
void reset_phy(void)
{
u16 reg;
u16 devadr;
char *name = "egiga0";
if (miiphy_set_current_dev(name))
return;
/* command to read PHY dev address */
if (miiphy_read(name, 0xEE, 0xEE, (u16 *) &devadr)) {
printf("Err..%s could not read PHY dev address\n",
__FUNCTION__);
return;
}
/*
* Enable RGMII delay on Tx and Rx for CPU port
* Ref: sec 4.7.2 of chip datasheet
*/
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 2);
miiphy_read(name, devadr, MV88E1116_MAC_CTRL_REG, &reg);
reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
miiphy_write(name, devadr, MV88E1116_MAC_CTRL_REG, reg);
miiphy_write(name, devadr, MV88E1116_PGADR_REG, 0);
/* reset the phy */
miiphy_reset(name, devadr);
printf("88E1116 Initialized on %s\n", name);
}
#endif /* CONFIG_RESET_PHY_R */

View File

@@ -0,0 +1,41 @@
/*
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301 USA
*/
#ifndef __SHEEVAPLUG_H
#define __SHEEVAPLUG_H
#define SHEEVAPLUG_OE_LOW (~(0))
#define SHEEVAPLUG_OE_HIGH (~(0))
#define SHEEVAPLUG_OE_VAL_LOW (1 << 29) /* USB_PWEN low */
#define SHEEVAPLUG_OE_VAL_HIGH (1 << 17) /* LED pin high */
/* PHY related */
#define MV88E1116_LED_FCTRL_REG 10
#define MV88E1116_CPRSP_CR3_REG 21
#define MV88E1116_MAC_CTRL_REG 21
#define MV88E1116_PGADR_REG 22
#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
#endif /* __SHEEVAPLUG_H */

View File

@@ -2,3 +2,5 @@ TEXT_BASE = 0x00e00000
# include NPE ethernet driver
BOARDLIBS = cpu/ixp/npe/libnpe.a
LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds

View File

@@ -2,3 +2,5 @@ TEXT_BASE = 0x00e00000
# include NPE ethernet driver
BOARDLIBS = cpu/ixp/npe/libnpe.a
LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds

View File

@@ -2,3 +2,5 @@ TEXT_BASE = 0x00e00000
# include NPE ethernet driver
BOARDLIBS = cpu/ixp/npe/libnpe.a
LDSCRIPT := $(SRCTREE)/board/$(BOARDDIR)/u-boot.lds

View File

@@ -1,432 +0,0 @@
/*
* (C) Copyright 2007 DENX Software Engineering
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <mpc512x.h>
#include <asm/bitops.h>
#include <command.h>
#include <asm/processor.h>
#include <fdt_support.h>
#ifdef CONFIG_MISC_INIT_R
#include <i2c.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
/* Clocks in use */
#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \
CLOCK_SCCR1_LPC_EN | \
CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \
CLOCK_SCCR1_PSCFIFO_EN | \
CLOCK_SCCR1_DDR_EN | \
CLOCK_SCCR1_FEC_EN | \
CLOCK_SCCR1_PATA_EN | \
CLOCK_SCCR1_PCI_EN | \
CLOCK_SCCR1_TPR_EN)
#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \
CLOCK_SCCR2_SPDIF_EN | \
CLOCK_SCCR2_DIU_EN | \
CLOCK_SCCR2_I2C_EN)
#define CSAW_START(start) ((start) & 0xFFFF0000)
#define CSAW_STOP(start, size) (((start) + (size) - 1) >> 16)
long int fixed_sdram(void);
int board_early_init_f (void)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
u32 lpcaw;
/*
* Initialize Local Window for the CPLD registers access (CS2 selects
* the CPLD chip)
*/
im->sysconf.lpcs2aw = CSAW_START(CONFIG_SYS_CPLD_BASE) |
CSAW_STOP(CONFIG_SYS_CPLD_BASE, CONFIG_SYS_CPLD_SIZE);
im->lpc.cs_cfg[2] = CONFIG_SYS_CS2_CFG;
/*
* According to MPC5121e RM, configuring local access windows should
* be followed by a dummy read of the config register that was
* modified last and an isync
*/
lpcaw = im->sysconf.lpcs2aw;
__asm__ __volatile__ ("isync");
/*
* Disable Boot NOR FLASH write protect - CPLD Reg 8 NOR FLASH Control
*
* Without this the flash identification routine fails, as it needs to issue
* write commands in order to establish the device ID.
*/
#ifdef CONFIG_ADS5121_REV2
*((volatile u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) = 0xC1;
#else
if (*((u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) & 0x04) {
*((volatile u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) = 0xC1;
} else {
/* running from Backup flash */
*((volatile u8 *)(CONFIG_SYS_CPLD_BASE + 0x08)) = 0x32;
}
#endif
/*
* Configure Flash Speed
*/
*((volatile u32 *)(CONFIG_SYS_IMMR + LPC_OFFSET + CS0_CONFIG)) = CONFIG_SYS_CS0_CFG;
if (SVR_MJREV (im->sysconf.spridr) >= 2) {
*((volatile u32 *)(CONFIG_SYS_IMMR + LPC_OFFSET + CS_ALE_TIMING_CONFIG)) = CONFIG_SYS_CS_ALETIMING;
}
/*
* Enable clocks
*/
im->clk.sccr[0] = SCCR1_CLOCKS_EN;
im->clk.sccr[1] = SCCR2_CLOCKS_EN;
#if defined(CONFIG_IIM) || defined(CONFIG_CMD_FUSE)
im->clk.sccr[1] |= CLOCK_SCCR2_IIM_EN;
#endif
return 0;
}
phys_size_t initdram (int board_type)
{
u32 msize = 0;
msize = fixed_sdram ();
return msize;
}
/*
* fixed sdram init -- the board doesn't use memory modules that have serial presence
* detect or similar mechanism for discovery of the DRAM settings
*/
long int fixed_sdram (void)
{
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
u32 msize = CONFIG_SYS_DDR_SIZE * 1024 * 1024;
u32 msize_log2 = __ilog2 (msize);
u32 i;
/* Initialize IO Control */
im->io_ctrl.regs[IOCTL_MEM/4] = IOCTRL_MUX_DDR;
/* Initialize DDR Local Window */
im->sysconf.ddrlaw.bar = CONFIG_SYS_DDR_BASE & 0xFFFFF000;
im->sysconf.ddrlaw.ar = msize_log2 - 1;
/*
* According to MPC5121e RM, configuring local access windows should
* be followed by a dummy read of the config register that was
* modified last and an isync
*/
i = im->sysconf.ddrlaw.ar;
__asm__ __volatile__ ("isync");
/* Enable DDR */
im->mddrc.ddr_sys_config = CONFIG_SYS_MDDRC_SYS_CFG_EN;
/* Initialize DDR Priority Manager */
im->mddrc.prioman_config1 = CONFIG_SYS_MDDRCGRP_PM_CFG1;
im->mddrc.prioman_config2 = CONFIG_SYS_MDDRCGRP_PM_CFG2;
im->mddrc.hiprio_config = CONFIG_SYS_MDDRCGRP_HIPRIO_CFG;
im->mddrc.lut_table0_main_upper = CONFIG_SYS_MDDRCGRP_LUT0_MU;
im->mddrc.lut_table0_main_lower = CONFIG_SYS_MDDRCGRP_LUT0_ML;
im->mddrc.lut_table1_main_upper = CONFIG_SYS_MDDRCGRP_LUT1_MU;
im->mddrc.lut_table1_main_lower = CONFIG_SYS_MDDRCGRP_LUT1_ML;
im->mddrc.lut_table2_main_upper = CONFIG_SYS_MDDRCGRP_LUT2_MU;
im->mddrc.lut_table2_main_lower = CONFIG_SYS_MDDRCGRP_LUT2_ML;
im->mddrc.lut_table3_main_upper = CONFIG_SYS_MDDRCGRP_LUT3_MU;
im->mddrc.lut_table3_main_lower = CONFIG_SYS_MDDRCGRP_LUT3_ML;
im->mddrc.lut_table4_main_upper = CONFIG_SYS_MDDRCGRP_LUT4_MU;
im->mddrc.lut_table4_main_lower = CONFIG_SYS_MDDRCGRP_LUT4_ML;
im->mddrc.lut_table0_alternate_upper = CONFIG_SYS_MDDRCGRP_LUT0_AU;
im->mddrc.lut_table0_alternate_lower = CONFIG_SYS_MDDRCGRP_LUT0_AL;
im->mddrc.lut_table1_alternate_upper = CONFIG_SYS_MDDRCGRP_LUT1_AU;
im->mddrc.lut_table1_alternate_lower = CONFIG_SYS_MDDRCGRP_LUT1_AL;
im->mddrc.lut_table2_alternate_upper = CONFIG_SYS_MDDRCGRP_LUT2_AU;
im->mddrc.lut_table2_alternate_lower = CONFIG_SYS_MDDRCGRP_LUT2_AL;
im->mddrc.lut_table3_alternate_upper = CONFIG_SYS_MDDRCGRP_LUT3_AU;
im->mddrc.lut_table3_alternate_lower = CONFIG_SYS_MDDRCGRP_LUT3_AL;
im->mddrc.lut_table4_alternate_upper = CONFIG_SYS_MDDRCGRP_LUT4_AU;
im->mddrc.lut_table4_alternate_lower = CONFIG_SYS_MDDRCGRP_LUT4_AL;
/* Initialize MDDRC */
im->mddrc.ddr_sys_config = CONFIG_SYS_MDDRC_SYS_CFG;
im->mddrc.ddr_time_config0 = CONFIG_SYS_MDDRC_TIME_CFG0;
im->mddrc.ddr_time_config1 = CONFIG_SYS_MDDRC_TIME_CFG1;
im->mddrc.ddr_time_config2 = CONFIG_SYS_MDDRC_TIME_CFG2;
/* Initialize DDR */
for (i = 0; i < 10; i++)
im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_PCHG_ALL;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_RFSH;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_RFSH;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_INIT_DEV_OP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_EM2;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_PCHG_ALL;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_EM2;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_EM3;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_EN_DLL;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_INIT_DEV_OP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_PCHG_ALL;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_RFSH;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_INIT_DEV_OP;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_OCD_DEFAULT;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_PCHG_ALL;
im->mddrc.ddr_command = CONFIG_SYS_MICRON_NOP;
/* Start MDDRC */
im->mddrc.ddr_time_config0 = CONFIG_SYS_MDDRC_TIME_CFG0_RUN;
im->mddrc.ddr_sys_config = CONFIG_SYS_MDDRC_SYS_CFG_RUN;
return msize;
}
int misc_init_r(void)
{
u8 tmp_val;
extern int ads5121_diu_init(void);
/* Using this for DIU init before the driver in linux takes over
* Enable the TFP410 Encoder (I2C address 0x38)
*/
i2c_set_bus_num(2);
tmp_val = 0xBF;
i2c_write(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
/* Verify if enabled */
tmp_val = 0;
i2c_read(0x38, 0x08, 1, &tmp_val, sizeof(tmp_val));
debug("DVI Encoder Read: 0x%02lx\n", tmp_val);
tmp_val = 0x10;
i2c_write(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
/* Verify if enabled */
tmp_val = 0;
i2c_read(0x38, 0x0A, 1, &tmp_val, sizeof(tmp_val));
debug("DVI Encoder Read: 0x%02lx\n", tmp_val);
#ifdef CONFIG_FSL_DIU_FB
#if !(defined(CONFIG_VIDEO) || defined(CONFIG_CFB_CONSOLE))
ads5121_diu_init();
#endif
#endif
return 0;
}
static iopin_t ioregs_init[] = {
/* FUNC1=FEC_RX_DV Sets Next 3 to FEC pads */
{
IOCTL_SPDIF_TXCLK, 3, 0,
IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
/* Set highest Slew on 9 PATA pins */
{
IOCTL_PATA_CE1, 9, 1,
IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
/* FUNC1=FEC_COL Sets Next 15 to FEC pads */
{
IOCTL_PSC0_0, 15, 0,
IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
/* FUNC1=SPDIF_TXCLK */
{
IOCTL_LPC_CS1, 1, 0,
IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
},
/* FUNC2=SPDIF_TX and sets Next pin to SPDIF_RX */
{
IOCTL_I2C1_SCL, 2, 0,
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
},
/* FUNC2=DIU CLK */
{
IOCTL_PSC6_0, 1, 0,
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
},
/* FUNC2=DIU_HSYNC */
{
IOCTL_PSC6_1, 1, 0,
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
},
/* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */
{
IOCTL_PSC6_4, 26, 0,
IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
}
};
static iopin_t rev2_silicon_pci_ioregs_init[] = {
/* FUNC0=PCI Sets next 54 to PCI pads */
{
IOCTL_PCI_AD31, 54, 0,
IO_PIN_FMUX(0) | IO_PIN_HOLD(0) | IO_PIN_DS(0)
}
};
int checkboard (void)
{
ushort brd_rev = *(vu_short *) (CONFIG_SYS_CPLD_BASE + 0x00);
uchar cpld_rev = *(vu_char *) (CONFIG_SYS_CPLD_BASE + 0x02);
volatile immap_t *im = (immap_t *) CONFIG_SYS_IMMR;
printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n",
brd_rev, cpld_rev);
/* initialize function mux & slew rate IO inter alia on IO Pins */
iopin_initialize(ioregs_init, sizeof(ioregs_init) / sizeof(ioregs_init[0]));
if (SVR_MJREV (im->sysconf.spridr) >= 2) {
iopin_initialize(rev2_silicon_pci_ioregs_init, 1);
}
return 0;
}
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
void ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
}
#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
void init_ide_reset (void)
{
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
debug ("init_ide_reset\n");
/*
* Clear the reset bit to reset the interface
* cf. RefMan MPC5121EE: 28.4.1 Resetting the ATA Bus
*/
immr->pata.pata_ata_control = 0;
udelay(100);
/* Assert the reset bit to enable the interface */
immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
udelay(100);
}
void ide_set_reset (int idereset)
{
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
debug ("ide_set_reset(%d)\n", idereset);
if (idereset) {
immr->pata.pata_ata_control = 0;
udelay(100);
} else {
immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
udelay(100);
}
}
#define CALC_TIMING(t) (t + period - 1) / period
int ide_preinit (void)
{
volatile immap_t *immr = (immap_t *) CONFIG_SYS_IMMR;
long t;
const struct {
short t0;
short t1;
short t2_8;
short t2_16;
short t2i;
short t4;
short t9;
short tA;
} pio_specs = {
.t0 = 600,
.t1 = 70,
.t2_8 = 290,
.t2_16 = 165,
.t2i = 0,
.t4 = 30,
.t9 = 20,
.tA = 50,
};
union {
u32 config;
struct {
u8 field1;
u8 field2;
u8 field3;
u8 field4;
}bytes;
}cfg;
debug ("IDE preinit using PATA peripheral at IMMR-ADDR %08x\n",
(u32)&immr->pata);
/* Set the reset bit to 1 to enable the interface */
immr->pata.pata_ata_control = FSL_ATA_CTRL_ATA_RST_B;
/* Init timings : we use PIO mode 0 timings */
t = 1000000000 / gd->ips_clk; /* period in ns */
cfg.bytes.field1 = 3;
cfg.bytes.field2 = 3;
cfg.bytes.field3 = (pio_specs.t1 + t) / t;
cfg.bytes.field4 = (pio_specs.t2_8 + t) / t;
immr->pata.pata_time1 = cfg.config;
cfg.bytes.field1 = (pio_specs.t2_8 + t) / t;
cfg.bytes.field2 = (pio_specs.tA + t) / t + 2;
cfg.bytes.field3 = 1;
cfg.bytes.field4 = (pio_specs.t4 + t) / t;
immr->pata.pata_time2 = cfg.config;
cfg.config = immr->pata.pata_time3;
cfg.bytes.field1 = (pio_specs.t9 + t) / t;
immr->pata.pata_time3 = cfg.config;
debug ("PATA preinit complete.\n");
return 0;
}
#endif /* defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET) */

View File

@@ -81,6 +81,8 @@ static void afeb9260_nand_hw_init(void)
#ifdef CONFIG_MACB
static void afeb9260_macb_hw_init(void)
{
unsigned long rstc;
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
@@ -103,6 +105,8 @@ static void afeb9260_macb_hw_init(void)
pin_to_mask(AT91_PIN_PA28),
pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
/* Need to reset PHY -> 500ms reset */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
AT91_RSTC_ERSTL | (0x0D << 8) |
@@ -115,7 +119,7 @@ static void afeb9260_macb_hw_init(void)
/* Restore NRST value */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
AT91_RSTC_ERSTL | (0x0 << 8) |
(rstc) |
AT91_RSTC_URSTEN);
/* Re-enable pull-up */

View File

@@ -97,5 +97,5 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD(
bootstrap, 3, 0, do_bootstrap,
"program the I2C bootstrap EEPROM",
"<cpu-freq> <nor|nand> - program the I2C bootstrap EEPROM\n"
);
"<cpu-freq> <nor|nand> - program the I2C bootstrap EEPROM"
);

View File

@@ -25,10 +25,11 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := $(BOARD).o
COBJS += bootstrap.o
COBJS-y := $(BOARD).o
COBJS-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
SOBJS := init.o
COBJS := $(COBJS-y)
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))

View File

@@ -1,195 +0,0 @@
/*
* (C) Copyright 2008
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <command.h>
#include <i2c.h>
#include <asm/io.h>
/*
* NOR and NAND boot options change bytes 5, 6, 8, 9, 11. The
* values are independent of the rest of the clock settings.
*/
#define NAND_COMPATIBLE 0x01
#define NOR_COMPATIBLE 0x02
#define I2C_EEPROM_ADDR 0x52
static char *config_labels[] = {
"CPU: 600 PLB: 200 OPB: 100 EBC: 100",
"CPU: 800 PLB: 200 OPB: 100 EBC: 100",
"CPU:1000 PLB: 200 OPB: 100 EBC: 100",
"CPU:1066 PLB: 266 OPB: 88 EBC: 88",
NULL
};
static u8 boot_configs[][17] = {
{
(NAND_COMPATIBLE | NOR_COMPATIBLE),
0x86, 0x80, 0xce, 0x1f, 0x79, 0x80, 0x00, 0xa0, 0x40, 0x08,
0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
},
{
(NAND_COMPATIBLE | NOR_COMPATIBLE),
0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0, 0x40, 0x08,
0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
},
{
(NAND_COMPATIBLE | NOR_COMPATIBLE),
0x86, 0x82, 0x96, 0x19, 0xb9, 0x80, 0x00, 0xa0, 0x40, 0x08,
0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
},
{
(NAND_COMPATIBLE | NOR_COMPATIBLE),
0x86, 0x80, 0xb3, 0x01, 0x9d, 0x80, 0x00, 0xa0, 0x40, 0x08,
0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
},
{
0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
}
};
/*
* Bytes 5,6,8,9,11 change for NAND boot
*/
#if 0
/*
* Values for 512 page size NAND chips, not used anymore, just
* keep them here for reference
*/
static u8 nand_boot[] = {
0x90, 0x01, 0xa0, 0x68, 0x58
};
#else
/*
* Values for 2k page size NAND chips
*/
static u8 nand_boot[] = {
0x90, 0x01, 0xa0, 0xe8, 0x58
};
#endif
static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
u8 *buf, b_nand;
int x, y, nbytes, selcfg;
extern char console_buffer[];
if (argc < 2) {
cmd_usage(cmdtp);
return 1;
}
if ((strcmp(argv[1], "nor") != 0) &&
(strcmp(argv[1], "nand") != 0)) {
printf("Unsupported boot-device - only nor|nand support\n");
return 1;
}
/* set the nand flag based on provided input */
if ((strcmp(argv[1], "nand") == 0))
b_nand = 1;
else
b_nand = 0;
printf("Available configurations: \n\n");
if (b_nand) {
for(x = 0, y = 0; boot_configs[x][0] != 0; x++) {
/* filter on nand compatible */
if (boot_configs[x][0] & NAND_COMPATIBLE) {
printf(" %d - %s\n", (y+1), config_labels[x]);
y++;
}
}
} else {
for(x = 0, y = 0; boot_configs[x][0] != 0; x++) {
/* filter on nor compatible */
if (boot_configs[x][0] & NOR_COMPATIBLE) {
printf(" %d - %s\n", (y+1), config_labels[x]);
y++;
}
}
}
do {
nbytes = readline(" Selection [1-x / quit]: ");
if (nbytes) {
if (strcmp(console_buffer, "quit") == 0)
return 0;
selcfg = simple_strtol(console_buffer, NULL, 10);
if ((selcfg < 1) || (selcfg > y))
nbytes = 0;
}
} while (nbytes == 0);
y = (selcfg - 1);
for (x = 0; boot_configs[x][0] != 0; x++) {
if (b_nand) {
if (boot_configs[x][0] & NAND_COMPATIBLE) {
if (y > 0)
y--;
else if (y < 1)
break;
}
} else {
if (boot_configs[x][0] & NOR_COMPATIBLE) {
if (y > 0)
y--;
else if (y < 1)
break;
}
}
}
buf = &boot_configs[x][1];
if (b_nand) {
buf[5] = nand_boot[0];
buf[6] = nand_boot[1];
buf[8] = nand_boot[2];
buf[9] = nand_boot[3];
buf[11] = nand_boot[4];
}
if (i2c_write(I2C_EEPROM_ADDR, 0, 1, buf, 16) != 0)
printf("Error writing to EEPROM at address 0x%x\n", I2C_EEPROM_ADDR);
udelay(CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
printf("Done\n");
printf("Please power-cycle the board for the changes to take effect\n");
return 0;
}
U_BOOT_CMD(
bootstrap, 2, 0, do_bootstrap,
"program the I2C bootstrap EEPROM",
"<nand|nor> - strap to boot from NAND or NOR flash\n"
);

View File

@@ -40,6 +40,24 @@ DECLARE_GLOBAL_DATA_PTR;
#define BOARD_GLACIER 3
#define BOARD_ARCHES 4
/*
* Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
* board specific values.
*/
#if defined(CONFIG_ARCHES)
u32 ddr_wrdtr(u32 default_val) {
return (SDRAM_WRDTR_LLWP_1_CYC | SDRAM_WRDTR_WTR_0_DEG | 0x823);
}
#else
u32 ddr_wrdtr(u32 default_val) {
return (SDRAM_WRDTR_LLWP_1_CYC | SDRAM_WRDTR_WTR_180_DEG_ADV | 0x823);
}
u32 ddr_clktr(u32 default_val) {
return (SDRAM_CLKTR_CLKP_90_DEG_ADV);
}
#endif
#if defined(CONFIG_ARCHES)
/*
* FPGA read/write helper macros
@@ -76,13 +94,23 @@ static inline void board_cpld_write(int offset, int data)
out_8((void *)(CONFIG_SYS_CPLD_ADDR), offset);
out_8((void *)(CONFIG_SYS_CPLD_DATA), data);
}
#else
static int pvr_460ex(void)
{
u32 pvr = get_pvr();
if ((pvr == PVR_460EX_RA) || (pvr == PVR_460EX_SE_RA) ||
(pvr == PVR_460EX_RB))
return 1;
return 0;
}
#endif /* defined(CONFIG_ARCHES) */
int board_early_init_f(void)
{
#if !defined(CONFIG_ARCHES)
u32 sdr0_cust0;
u32 pvr = get_pvr();
#endif
/*
@@ -157,7 +185,7 @@ int board_early_init_f(void)
mtdcr(AHB_TOP, 0x8000004B);
mtdcr(AHB_BOT, 0x8000004B);
if ((pvr == PVR_460EX_RA) || (pvr == PVR_460EX_SE_RA)) {
if (pvr_460ex()) {
/*
* Configure USB-STP pins as alternate and not GPIO
* It seems to be neccessary to configure the STP pins as GPIO
@@ -216,17 +244,16 @@ int get_cpu_num(void)
int checkboard(void)
{
char *s = getenv("serial#");
u32 pvr = get_pvr();
if ((pvr == PVR_460GT_RA) || (pvr == PVR_460GT_SE_RA)) {
printf("Board: Glacier - AMCC PPC460GT Evaluation Board");
gd->board_type = BOARD_GLACIER;
} else {
if (pvr_460ex()) {
printf("Board: Canyonlands - AMCC PPC460EX Evaluation Board");
if (in_8((void *)(CONFIG_SYS_BCSR_BASE + 3)) & CONFIG_SYS_BCSR3_PCIE)
gd->board_type = BOARD_CANYONLANDS_PCIE;
else
gd->board_type = BOARD_CANYONLANDS_SATA;
} else {
printf("Board: Glacier - AMCC PPC460GT Evaluation Board");
gd->board_type = BOARD_GLACIER;
}
switch (gd->board_type) {
@@ -286,18 +313,6 @@ int checkboard(void)
}
#endif /* !defined(CONFIG_ARCHES) */
/*
* Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
* board specific values.
*/
u32 ddr_wrdtr(u32 default_val) {
return (SDRAM_WRDTR_LLWP_1_CYC | SDRAM_WRDTR_WTR_180_DEG_ADV | 0x823);
}
u32 ddr_clktr(u32 default_val) {
return (SDRAM_CLKTR_CLKP_90_DEG_ADV);
}
#if defined(CONFIG_NAND_U_BOOT)
/*
* NAND booting U-Boot version uses a fixed initialization, since the whole
@@ -492,7 +507,6 @@ int misc_init_r(void)
{
u32 sdr0_srst1 = 0;
u32 eth_cfg;
u32 pvr = get_pvr();
u8 val;
/*
@@ -507,7 +521,7 @@ int misc_init_r(void)
/* Set the for 2 RGMII mode */
/* GMC0 EMAC4_0, GMC0 EMAC4_1, RGMII Bridge 0 */
eth_cfg &= ~SDR0_ETH_CFG_GMC0_BRIDGE_SEL;
if ((pvr == PVR_460EX_RA) || (pvr == PVR_460EX_SE_RA))
if (pvr_460ex())
eth_cfg |= SDR0_ETH_CFG_GMC1_BRIDGE_SEL;
else
eth_cfg &= ~SDR0_ETH_CFG_GMC1_BRIDGE_SEL;
@@ -575,24 +589,11 @@ int misc_init_r(void)
#endif /* !defined(CONFIG_ARCHES) */
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
extern void __ft_board_setup(void *blob, bd_t *bd);
void ft_board_setup(void *blob, bd_t *bd)
{
u32 val[4];
int rc;
ft_cpu_setup(blob, bd);
/* Fixup NOR mapping */
val[0] = 0; /* chip select number */
val[1] = 0; /* always 0 */
val[2] = CONFIG_SYS_FLASH_BASE_PHYS_L; /* we fixed up this address */
val[3] = gd->bd->bi_flashsize;
rc = fdt_find_and_setprop(blob, "/plb/opb/ebc", "ranges",
val, sizeof(val), 1);
if (rc) {
printf("Unable to update property NOR mapping, err=%s\n",
fdt_strerror(rc));
}
__ft_board_setup(blob, bd);
if (gd->board_type == BOARD_CANYONLANDS_SATA) {
/*

View File

@@ -0,0 +1,89 @@
/*
* (C) Copyright 2008-2009
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <asm/ppc4xx_config.h>
struct ppc4xx_config ppc4xx_config_val[] = {
{
"600-nor", "NOR CPU: 600 PLB: 200 OPB: 100 EBC: 100",
{
0x86, 0x80, 0xce, 0x1f, 0x79, 0x80, 0x00, 0xa0,
0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
}
},
{
"800-nor", "NOR CPU: 800 PLB: 200 OPB: 100 EBC: 100",
{
0x86, 0x80, 0xba, 0x14, 0x99, 0x80, 0x00, 0xa0,
0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
}
},
{
"1000-nor", "NOR CPU:1000 PLB: 200 OPB: 100 EBC: 100",
{
0x86, 0x82, 0x96, 0x19, 0xb9, 0x80, 0x00, 0xa0,
0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
}
},
{
"1066-nor", "NOR CPU:1066 PLB: 266 OPB: 88 EBC: 88",
{
0x86, 0x80, 0xb3, 0x01, 0x9d, 0x80, 0x00, 0xa0,
0x40, 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
}
},
#if !defined(CONFIG_ARCHES)
{
"600-nand", "NAND CPU: 600 PLB: 200 OPB: 100 EBC: 100",
{
0x86, 0x80, 0xce, 0x1f, 0x79, 0x90, 0x01, 0xa0,
0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
}
},
{
"800-nand", "NAND CPU: 800 PLB: 200 OPB: 100 EBC: 100",
{
0x86, 0x80, 0xba, 0x14, 0x99, 0x90, 0x01, 0xa0,
0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
}
},
{
"1000-nand", "NAND CPU:1000 PLB: 200 OPB: 100 EBC: 100",
{
0x86, 0x82, 0x96, 0x19, 0xb9, 0x90, 0x01, 0xa0,
0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
}
},
{
"1066-nand", "NAND CPU:1066 PLB: 266 OPB: 88 EBC: 88",
{
0x86, 0x80, 0xb3, 0x01, 0x9d, 0x90, 0x01, 0xa0,
0xa0, 0xe8, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
}
},
#endif
};
int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);

View File

@@ -214,5 +214,5 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD(
bootstrap, 3, 1, do_bootstrap,
"program the serial device strap",
"wrclk [prom0|prom1] - program the serial device strap\n"
);
"wrclk [prom0|prom1] - program the serial device strap"
);

View File

@@ -25,8 +25,10 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS = $(BOARD).o cmd_pll.o
COBJS-y := $(BOARD).o
COBJS-$(CONFIG_CMD_CHIP_CONFIG) += chip_config.o
COBJS := $(COBJS-y)
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))

View File

@@ -0,0 +1,89 @@
/*
* (C) Copyright 2009
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
#include <common.h>
#include <asm/ppc4xx_config.h>
/* NAND booting versions differ in bytes: 6, 8, 9, 11, 12 */
struct ppc4xx_config ppc4xx_config_val[] = {
{
"333-nor","NOR CPU: 333 PLB: 166 OPB: 83 EBC: 83",
{
0x8c, 0x12, 0xec, 0x12, 0x98, 0x00, 0x0a, 0x00,
0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
}
},
{
"400-133-nor", "NOR CPU: 400 PLB: 133 OPB: 66 EBC: 66",
{
0x8e, 0x0e, 0xe8, 0x13, 0x98, 0x00, 0x0a, 0x00,
0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
}
},
{
"400-nor", "NOR CPU: 400 PLB: 200 OPB: 100 EBC: 100",
{
0x8e, 0x0e, 0xe8, 0x12, 0x98, 0x00, 0x0a, 0x00,
0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
}
},
{
"533-nor", "NOR CPU: 533 PLB: 177 OPB: 88 EBC: 88",
{
0x8e, 0x43, 0x60, 0x13, 0x98, 0x00, 0x0a, 0x00,
0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
}
},
{
"533-nand", "NOR CPU: 533 PLB: 177 OPB: 88 EBC: 88",
{
0x8e, 0x43, 0x60, 0x13, 0x98, 0x00, 0x0f, 0x00,
0xa0, 0x68, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
}
},
{
"600-nor", "NOR CPU: 600 PLB: 200 OPB: 100 EBC: 100",
{
0x8d, 0x02, 0x34, 0x13, 0x98, 0x00, 0x0a, 0x00,
0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
}
},
{
"600-nand", "NOR CPU: 600 PLB: 200 OPB: 100 EBC: 100",
{
0x8d, 0x02, 0x34, 0x13, 0x98, 0x00, 0x0f, 0x00,
0xa0, 0x68, 0x23, 0x58, 0x0d, 0x05, 0x00, 0x00
}
},
{
"666-nor", "NOR CPU: 666 PLB: 222 OPB: 111 EBC: 111",
{
0x8d, 0x03, 0x78, 0x13, 0x98, 0x00, 0x0a, 0x00,
0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
}
},
};
int ppc4xx_config_count = ARRAY_SIZE(ppc4xx_config_val);

View File

@@ -1,297 +0,0 @@
/*
* (C) Copyright 2000, 2001
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
*/
/*
* ehnus: change pll frequency.
* Wed Sep 5 11:45:17 CST 2007
* hsun@udtech.com.cn
*/
#include <common.h>
#include <config.h>
#include <command.h>
#include <i2c.h>
#ifdef CONFIG_CMD_EEPROM
#define EEPROM_CONF_OFFSET 0
#define EEPROM_TEST_OFFSET 16
#define EEPROM_SDSTP_PARAM 16
#define PLL_NAME_MAX 12
#define BUF_STEP 8
/* eeprom_wirtes 8Byte per op. */
#define EEPROM_ALTER_FREQ(freq) \
do { \
int __i; \
for (__i = 0; __i < 2; __i++) \
eeprom_write (CONFIG_SYS_I2C_EEPROM_ADDR, \
EEPROM_CONF_OFFSET + __i*BUF_STEP, \
pll_select[freq], \
BUF_STEP + __i*BUF_STEP); \
} while (0)
#define PDEBUG
#ifdef PDEBUG
#define PLL_DEBUG pll_debug(EEPROM_CONF_OFFSET)
#else
#define PLL_DEBUG
#endif
typedef enum {
PLL_ebc20,
PLL_333,
PLL_4001,
PLL_4002,
PLL_533,
PLL_600,
PLL_666, /* For now, kilauea can't support */
RCONF,
WTEST,
PLL_TOTAL
} pll_freq_t;
static const char
pll_name[][PLL_NAME_MAX] = {
"PLL_ebc20",
"PLL_333",
"PLL_400@1",
"PLL_400@2",
"PLL_533",
"PLL_600",
"PLL_666",
"RCONF",
"WTEST",
""
};
/*
* ehnus:
*/
static uchar
pll_select[][EEPROM_SDSTP_PARAM] = {
/* 0: CPU 333MHz EBC 20MHz, for test only */
{
0x8c, 0x12, 0xec, 0x12, 0x88, 0x00, 0x0a, 0x00,
0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
},
/* 0: 333 */
{
0x8c, 0x12, 0xec, 0x12, 0x98, 0x00, 0x0a, 0x00,
0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
},
/* 1: 400_266 */
{
0x8e, 0x0e, 0xe8, 0x13, 0x98, 0x00, 0x0a, 0x00,
0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
},
/* 2: 400 */
{
0x8e, 0x0e, 0xe8, 0x12, 0x98, 0x00, 0x0a, 0x00,
0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
},
/* 3: 533 */
{
0x8e, 0x43, 0x60, 0x13, 0x98, 0x00, 0x0a, 0x00,
0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
},
/* 4: 600 */
{
0x8d, 0x02, 0x34, 0x13, 0x98, 0x00, 0x0a, 0x00,
0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
},
/* 5: 666 */
{
0x8d, 0x03, 0x78, 0x13, 0x98, 0x00, 0x0a, 0x00,
0x40, 0x08, 0x23, 0x50, 0x00, 0x05, 0x00, 0x00
},
{}
};
static uchar
testbuf[EEPROM_SDSTP_PARAM] = {
0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77,
0x88, 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff
};
static void
pll_debug(int off)
{
int i;
uchar buffer[EEPROM_SDSTP_PARAM];
memset(buffer, 0, sizeof(buffer));
eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, off,
buffer, EEPROM_SDSTP_PARAM);
printf("Debug: SDSTP[0-3] at offset \"0x%02x\" lists as follows: \n", off);
for (i = 0; i < EEPROM_SDSTP_PARAM; i++)
printf("%02x ", buffer[i]);
printf("\n");
}
static void
test_write(void)
{
printf("Debug: test eeprom_write ... ");
/*
* Write twice, 8 bytes per write
*/
eeprom_write (CONFIG_SYS_I2C_EEPROM_ADDR, EEPROM_TEST_OFFSET,
testbuf, 8);
eeprom_write (CONFIG_SYS_I2C_EEPROM_ADDR, EEPROM_TEST_OFFSET+8,
testbuf, 16);
printf("done\n");
pll_debug(EEPROM_TEST_OFFSET);
}
int
do_pll_alter (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
char c = '\0';
pll_freq_t pll_freq;
if (argc < 2) {
cmd_usage(cmdtp);
goto ret;
}
for (pll_freq = PLL_ebc20; pll_freq < PLL_TOTAL; pll_freq++)
if (!strcmp(pll_name[pll_freq], argv[1]))
break;
switch (pll_freq) {
case PLL_ebc20:
case PLL_333:
case PLL_4001:
case PLL_4002:
case PLL_533:
case PLL_600:
EEPROM_ALTER_FREQ(pll_freq);
break;
case PLL_666: /* not support */
printf("Choose this option will result in a boot failure."
"\nContinue? (Y/N): ");
c = getc(); putc('\n');
if ((c == 'y') || (c == 'Y')) {
EEPROM_ALTER_FREQ(pll_freq);
break;
}
goto ret;
case RCONF:
pll_debug(EEPROM_CONF_OFFSET);
goto ret;
case WTEST:
printf("DEBUG: write test\n");
test_write();
goto ret;
default:
printf("Invalid options\n\n");
cmd_usage(cmdtp);
goto ret;
}
printf("PLL set to %s, "
"reset the board to take effect\n", pll_name[pll_freq]);
PLL_DEBUG;
ret:
return 0;
}
U_BOOT_CMD(
pllalter, CONFIG_SYS_MAXARGS, 1, do_pll_alter,
"change pll frequence",
"pllalter <selection> - change pll frequence \n\n\
** New freq take effect after reset. ** \n\
----------------------------------------------\n\
PLL_ebc20: Board: AMCC 405EX(r) Evaluation Board\n\
\t Same as PLL_333 \n\
\t except \n\
\t EBC: 20 MHz \n\
----------------------------------------------\n\
PLL_333: Board: AMCC 405EX(r) Evaluation Board\n\
\t VCO: 666 MHz \n\
\t CPU: 333 MHz \n\
\t PLB: 166 MHz \n\
\t OPB: 83 MHz \n\
\t DDR: 83 MHz \n\
------------------------------------------------\n\
PLL_400@1: Board: AMCC 405EX(r) Evaluation Board\n\
\t VCO: 800 MHz \n\
\t CPU: 400 MHz \n\
\t PLB: 133 MHz \n\
\t OPB: 66 MHz \n\
\t DDR: 133 MHz \n\
------------------------------------------------\n\
PLL_400@2: Board: AMCC 405EX(r) Evaluation Board\n\
\t VCO: 800 MHz \n\
\t CPU: 400 MHz \n\
\t PLB: 200 MHz \n\
\t OPB: 100 MHz \n\
\t DDR: 200 MHz \n\
----------------------------------------------\n\
PLL_533: Board: AMCC 405EX(r) Evaluation Board\n\
\t VCO: 1066 MHz \n\
\t CPU: 533 MHz \n\
\t PLB: 177 MHz \n\
\t OPB: 88 MHz \n\
\t DDR: 177 MHz \n\
----------------------------------------------\n\
PLL_600: Board: AMCC 405EX(r) Evaluation Board\n\
\t VCO: 1200 MHz \n\
\t CPU: 600 MHz \n\
\t PLB: 200 MHz \n\
\t OPB: 100 MHz \n\
\t DDR: 200 MHz \n\
----------------------------------------------\n\
PLL_666: Board: AMCC 405EX(r) Evaluation Board\n\
\t VCO: 1333 MHz \n\
\t CPU: 666 MHz \n\
\t PLB: 166 MHz \n\
\t OPB: 83 MHz \n\
\t DDR: 166 MHz \n\
-----------------------------------------------\n\
RCONF: Read current eeprom configuration. \n\
-----------------------------------------------\n\
WTEST: Test EEPROM write with predefined values\n\
-----------------------------------------------\n"
);
#endif /* CONFIG_CMD_EEPROM */

View File

@@ -331,5 +331,5 @@ U_BOOT_CMD(
l2cache, 2, 1, do_l2cache,
"enable or disable L2 cache",
"[on, off]\n"
" - enable or disable L2 cache\n"
);
" - enable or disable L2 cache"
);

View File

@@ -291,7 +291,7 @@ U_BOOT_CMD(
RCONF: Read current eeprom configuration. \n\
-----------------------------------------------\n\
WTEST: Test EEPROM write with predefined values\n\
-----------------------------------------------\n"
);
-----------------------------------------------"
);
#endif /* CONFIG_CMD_EEPROM */

View File

@@ -227,5 +227,5 @@ static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD(
bootstrap, 2, 0, do_bootstrap,
"program the I2C bootstrap EEPROM",
"<nand|nor> - strap to boot from NAND or NOR flash\n"
);
"<nand|nor> - strap to boot from NAND or NOR flash"
);

View File

@@ -43,12 +43,19 @@ tlbtab:
/* vxWorks needs this as first entry for the Machine Check interrupt */
tlbentry( 0x40000000, SZ_256M, 0, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
/*
* The RAM-boot version skips the SDRAM TLB (identified by EPN=0). This
* entry is already configured for SDRAM via the JTAG debugger and mustn't
* be re-initialized by this RAM-booting U-Boot version.
*/
#ifndef CONFIG_SYS_RAMBOOT
/* TLB-entry for DDR SDRAM (Up to 2GB) */
#ifdef CONFIG_4xx_DCACHE
tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G)
#else
tlbentry( CONFIG_SYS_SDRAM_BASE, SZ_256M, CONFIG_SYS_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
#endif
#endif /* CONFIG_SYS_RAMBOOT */
/* TLB-entry for EBC */
tlbentry( CONFIG_SYS_BCSR_BASE, SZ_256M, CONFIG_SYS_BCSR_BASE, 1, AC_R|AC_W|AC_X|SA_G|SA_I )

View File

@@ -54,7 +54,8 @@ extern void denali_core_search_data_eye(void);
************************************************************************/
phys_size_t initdram (int board_type)
{
#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
#if !(defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_SYS_RAMBOOT)) || \
defined(CONFIG_NAND_SPL)
ulong speed = get_bus_freq(0);
mtsdram(DDR0_02, 0x00000000);

View File

@@ -33,7 +33,9 @@
DECLARE_GLOBAL_DATA_PTR;
#if !defined(CONFIG_SYS_NO_FLASH)
extern flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
#endif
extern void __ft_board_setup(void *blob, bd_t *bd);
ulong flash_get_size(ulong base, int banknum);
@@ -122,16 +124,19 @@ int board_early_init_f(void)
int misc_init_r(void)
{
#if !defined(CONFIG_SYS_NO_FLASH)
uint pbcr;
int size_val = 0;
u32 reg;
#endif
#ifdef CONFIG_440EPX
unsigned long usb2d0cr = 0;
unsigned long usb2phy0cr, usb2h0cr = 0;
unsigned long sdr0_pfc1;
char *act = getenv("usbact");
#endif
u32 reg;
#if !defined(CONFIG_SYS_NO_FLASH)
/* Re-do flash sizing to get full correct info */
/* adjust flash start and offset */
@@ -171,6 +176,7 @@ int misc_init_r(void)
CONFIG_ENV_ADDR_REDUND + 2*CONFIG_ENV_SECT_SIZE - 1,
&flash_info[0]);
#endif
#endif /* CONFIG_SYS_NO_FLASH */
/*
* USB suff...
@@ -515,7 +521,7 @@ int post_hotkeys_pressed(void)
}
#endif /* CONFIG_POST */
#if defined(CONFIG_NAND_U_BOOT)
#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_SYS_RAMBOOT)
/*
* On NAND-booting sequoia, we need to patch the chips select numbers
* in the dtb (CS0 - NAND, CS3 - NOR)

View File

@@ -0,0 +1,126 @@
/*
* (C) Copyright 2009
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_ARCH(powerpc)
SECTIONS
{
/* Read-only sections, merged into text segment: */
. = + SIZEOF_HEADERS;
.interp : { *(.interp) }
.hash : { *(.hash) }
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
.rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
.rela.data : { *(.rela.data) }
.rel.rodata : { *(.rel.rodata) }
.rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
.rela.ctors : { *(.rela.ctors) }
.rel.dtors : { *(.rel.dtors) }
.rela.dtors : { *(.rela.dtors) }
.rel.bss : { *(.rel.bss) }
.rela.bss : { *(.rela.bss) }
.rel.plt : { *(.rel.plt) }
.rela.plt : { *(.rela.plt) }
.init : { *(.init) }
.plt : { *(.plt) }
.text :
{
cpu/ppc4xx/start.o (.text)
*(.text)
*(.fixup)
*(.got1)
}
_etext = .;
PROVIDE (etext = .);
.rodata :
{
*(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
}
.fini : { *(.fini) } =0
.ctors : { *(.ctors) }
.dtors : { *(.dtors) }
/* Read-write section, merged into data segment: */
. = (. + 0x00FF) & 0xFFFFFF00;
_erotext = .;
PROVIDE (erotext = .);
.reloc :
{
*(.got)
_GOT2_TABLE_ = .;
*(.got2)
_FIXUP_TABLE_ = .;
*(.fixup)
}
__got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
__fixup_entries = (. - _FIXUP_TABLE_)>>2;
.data :
{
*(.data)
*(.data1)
*(.sdata)
*(.sdata2)
*(.dynamic)
CONSTRUCTORS
}
_edata = .;
PROVIDE (edata = .);
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = .;
__start___ex_table = .;
__ex_table : { *(__ex_table) }
__stop___ex_table = .;
. = ALIGN(256);
__init_begin = .;
.text.init : { *(.text.init) }
.data.init : { *(.data.init) }
. = ALIGN(256);
__init_end = .;
__bss_start = .;
.bss (NOLOAD) :
{
*(.sbss) *(.scommon)
*(.dynbss)
*(.bss)
*(COMMON)
. = ALIGN(4);
}
_end = . ;
PROVIDE (end = .);
}

View File

@@ -233,25 +233,25 @@ static int do_lcd_cur (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD(
lcd_cls, 1, 1, do_lcd_clear,
"lcd clear display",
NULL
);
""
);
U_BOOT_CMD(
lcd_puts, 2, 1, do_lcd_puts,
"display string on lcd",
"<string> - <string> to be displayed\n"
);
"<string> - <string> to be displayed"
);
U_BOOT_CMD(
lcd_putc, 2, 1, do_lcd_putc,
"display char on lcd",
"<char> - <char> to be displayed\n"
);
"<char> - <char> to be displayed"
);
U_BOOT_CMD(
lcd_cur, 3, 1, do_lcd_cur,
"shift cursor on lcd",
"<count> <dir> - shift cursor on lcd <count> times, direction is <dir> \n"
" <count> - 0..31\n"
" <dir> - 0=backward 1=forward\n"
);
" <dir> - 0=backward 1=forward"
);

View File

@@ -94,8 +94,8 @@ static int do_sw_stat(cmd_tbl_t* cmd_tp, int flags, int argc, char *argv[])
U_BOOT_CMD (
sw2_stat, 1, 1, do_sw_stat,
"show status of switch 2",
NULL
);
""
);
static int do_led_ctl(cmd_tbl_t* cmd_tp, int flags, int argc, char *argv[])
{
@@ -134,8 +134,8 @@ U_BOOT_CMD (
led_ctl, 3, 1, do_led_ctl,
"make led 1 or 2 on or off",
"<led_no> <on/off> - make led <led_no> on/off,\n"
"\tled_no is 1 or 2\t"
);
"\tled_no is 1 or 2"
);
#define SPI_CS_GPIO0 0
#define SPI_SCLK_GPIO14 14

View File

@@ -128,5 +128,5 @@ static int update_boot_eeprom(cmd_tbl_t* cmdtp, int flag, int argc, char *argv[]
U_BOOT_CMD (
update_boot_eeprom, 1, 1, update_boot_eeprom,
"update boot eeprom content",
NULL
);
""
);

View File

@@ -254,18 +254,18 @@ static int do_lcd_cur(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
return 0;
}
U_BOOT_CMD(lcd_test, 1, 1, do_lcd_test, "lcd test display", NULL);
U_BOOT_CMD(lcd_cls, 1, 1, do_lcd_clear, "lcd clear display", NULL);
U_BOOT_CMD(lcd_test, 1, 1, do_lcd_test, "lcd test display", "");
U_BOOT_CMD(lcd_cls, 1, 1, do_lcd_clear, "lcd clear display", "");
U_BOOT_CMD(lcd_puts, 2, 1, do_lcd_puts,
"display string on lcd",
"<string> - <string> to be displayed\n");
"<string> - <string> to be displayed");
U_BOOT_CMD(lcd_putc, 2, 1, do_lcd_putc,
"display char on lcd",
"<char> - <char> to be displayed\n");
"<char> - <char> to be displayed");
U_BOOT_CMD(lcd_cur, 3, 1, do_lcd_cur,
"shift cursor on lcd",
"<count> <dir>- shift cursor on lcd <count> times, direction is <dir> \n"
" <count> - 0~31\n" " <dir> - 0,backward; 1, forward\n");
" <count> - 0~31\n" " <dir> - 0,backward; 1, forward");
#if 0 /* test-only */
void set_phy_loopback_mode(void)
@@ -373,8 +373,8 @@ static int do_led_test_on(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
}
U_BOOT_CMD(ledon, 1, 1, do_led_test_on,
"led test light on", NULL);
"led test light on", "");
U_BOOT_CMD(ledoff, 1, 1, do_led_test_off,
"led test light off", NULL);
"led test light off", "");
#endif

View File

@@ -168,7 +168,7 @@ int do_show_xbridge_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
}
U_BOOT_CMD(xbriinfo, 1, 1, do_show_xbridge_info,
"Show PCIX bridge info", NULL);
"Show PCIX bridge info", "");
#define TAISHAN_PCI_DEV_ID0 0x800
#define TAISHAN_PCI_DEV_ID1 0x1000
@@ -222,7 +222,7 @@ int do_show_pcix_device_info(cmd_tbl_t * cmdtp, int flag, int argc,
}
U_BOOT_CMD(xdevinfo, 1, 1, do_show_pcix_device_info,
"Show PCIX Device info", NULL);
"Show PCIX Device info", "");
extern void show_reset_reg(void);
@@ -233,4 +233,4 @@ int do_show_reset_reg_info(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
}
U_BOOT_CMD(resetinfo, 1, 1, do_show_reset_reg_info,
"Show Reset REG info", NULL);
"Show Reset REG info", "");

View File

@@ -74,5 +74,5 @@ int do_update_boot_eeprom(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
}
U_BOOT_CMD(update_boot_eeprom, 1, 1, do_update_boot_eeprom,
"update bootstrap eeprom content", NULL);
"update bootstrap eeprom content", "");
#endif

View File

@@ -282,5 +282,5 @@ static int setBootStrapClock(cmd_tbl_t *cmdtp, int incrflag, int flag,
U_BOOT_CMD(
evb440spe, 3, 1, do_evb440spe,
"program the serial device strap",
"wrclk [prom0|prom1] - program the serial device strap\n"
"wrclk [prom0|prom1] - program the serial device strap"
);

View File

@@ -670,14 +670,14 @@ U_BOOT_CMD (temp, 6, 0, do_temp_sensor,
" - Set config options.\n"
"\n"
"All values can be decimal or hex (hex preceded with 0x).\n"
"Only whole numbers are supported for external limits.\n");
"Only whole numbers are supported for external limits.");
#if 0
U_BOOT_CMD (loadace, 2, 0, do_loadace,
"load fpga configuration from System ACE compact flash",
"N\n"
" - Load configuration N (0-7) from System ACE compact flash\n"
"loadace\n" " - loads default configuration\n");
"loadace\n" " - loads default configuration");
#endif
U_BOOT_CMD (swconfig, 2, 0, do_swconfigbyte,
@@ -685,19 +685,19 @@ U_BOOT_CMD (swconfig, 2, 0, do_swconfigbyte,
"N [ADDRESS]\n"
" - set software configuration byte to N, optionally use ADDRESS as\n"
" location of buffer for flash copy\n"
"swconfig\n" " - display software configuration byte\n");
"swconfig\n" " - display software configuration byte");
U_BOOT_CMD (pause, 2, 0, do_pause,
"sleep processor until any key is pressed with poll time of N seconds",
"N\n"
" - sleep processor until any key is pressed with poll time of N seconds\n"
"pause\n"
" - sleep processor until any key is pressed with poll time of 1 second\n");
" - sleep processor until any key is pressed with poll time of 1 second");
U_BOOT_CMD (swrecon, 1, 0, do_swreconfig,
"trigger a board reconfigure to the software selected configuration",
"\n"
" - trigger a board reconfigure to the software selected configuration\n");
" - trigger a board reconfigure to the software selected configuration");
int board_eth_init(bd_t *bis)
{

View File

@@ -487,7 +487,7 @@ U_BOOT_CMD (eeprom, 4, 0, do_eeprom,
" - store contents of eeprom at address ADD\n"
"eeprom p ADD\n"
" - put data stored at address ADD into the eeprom\n"
"eeprom d\n" " - return eeprom to default contents\n");
"eeprom d\n" " - return eeprom to default contents");
unsigned int PowerSpanRead (unsigned int theOffset)
{

View File

@@ -1,55 +0,0 @@
/*
* (C) Copyright 2000
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/arm720t/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

View File

@@ -1,2 +0,0 @@
/integratorap/u-boot.lds
/integratorcp/u-boot.lds

View File

@@ -0,0 +1,58 @@
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# (C) Copyright 2004
# ARM Ltd.
# Philippe Robin, <philippe.robin@arm.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
SOBJS-y := lowlevel_init.o
COBJS-y := integrator.o
COBJS-$(CONFIG_PCI) += pci.o
COBJS-y += timer.o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
COBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(COBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(COBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(COBJS)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -0,0 +1,5 @@
#
# image should be loaded at 0x01000000
#
TEXT_BASE = 0x01000000

View File

@@ -0,0 +1,135 @@
/*
* (C) Copyright 2002
* Sysgo Real-Time Solutions, GmbH <www.elinos.com>
* Marius Groeger <mgroeger@sysgo.de>
*
* (C) Copyright 2002
* David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
*
* (C) Copyright 2003
* Texas Instruments, <www.ti.com>
* Kshitij Gupta <Kshitij@ti.com>
*
* (C) Copyright 2004
* ARM Ltd.
* Philippe Robin, <philippe.robin@arm.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#ifdef CONFIG_PCI
#include <netdev.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
void peripheral_power_enable (void);
#if defined(CONFIG_SHOW_BOOT_PROGRESS)
void show_boot_progress(int progress)
{
printf("Boot reached stage %d\n", progress);
}
#endif
#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
/*
* Miscellaneous platform dependent initialisations
*/
int board_init (void)
{
/* arch number of Integrator Board */
#ifdef CONFIG_ARCH_CINTEGRATOR
gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
#else
gd->bd->bi_arch_number = MACH_TYPE_INTEGRATOR;
#endif
/* adress of boot parameters */
gd->bd->bi_boot_params = 0x00000100;
gd->flags = 0;
#ifdef CONFIG_CM_REMAP
extern void cm_remap(void);
cm_remap(); /* remaps writeable memory to 0x00000000 */
#endif
icache_enable ();
return 0;
}
int misc_init_r (void)
{
#ifdef CONFIG_PCI
pci_init();
#endif
setenv("verify", "n");
return (0);
}
/******************************
Routine:
Description:
******************************/
int dram_init (void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#ifdef CONFIG_CM_SPD_DETECT
{
extern void dram_query(void);
unsigned long cm_reg_sdram;
unsigned long sdram_shift;
dram_query(); /* Assembler accesses to CM registers */
/* Queries the SPD values */
/* Obtain the SDRAM size from the CM SDRAM register */
cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
/* Register SDRAM size
*
* 0xXXXXXXbbb000bb 16 MB
* 0xXXXXXXbbb001bb 32 MB
* 0xXXXXXXbbb010bb 64 MB
* 0xXXXXXXbbb011bb 128 MB
* 0xXXXXXXbbb100bb 256 MB
*
*/
sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift;
}
#endif /* CM_SPD_DETECT */
return 0;
}
#ifdef CONFIG_PCI
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}
#endif

View File

@@ -34,77 +34,13 @@
*/
#include <common.h>
#ifdef CONFIG_PCI
#include <pci.h>
#endif
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
void flash__init (void);
void ether__init (void);
void peripheral_power_enable (void);
#if defined(CONFIG_SHOW_BOOT_PROGRESS)
void show_boot_progress(int progress)
{
printf("Boot reached stage %d\n", progress);
}
#endif
#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
static inline void delay (unsigned long loops)
{
__asm__ volatile ("1:\n"
"subs %0, %1, #1\n"
"bne 1b":"=r" (loops):"0" (loops));
}
/*
* Miscellaneous platform dependent initialisations
*/
int board_init (void)
{
/* arch number of Integrator Board */
gd->bd->bi_arch_number = MACH_TYPE_INTEGRATOR;
/* adress of boot parameters */
gd->bd->bi_boot_params = 0x00000100;
gd->flags = 0;
#ifdef CONFIG_CM_REMAP
extern void cm_remap(void);
cm_remap(); /* remaps writeable memory to 0x00000000 */
#endif
icache_enable ();
flash__init ();
return 0;
}
int misc_init_r (void)
{
#ifdef CONFIG_PCI
pci_init();
#endif
setenv("verify", "n");
return (0);
}
/*
* Initialize PCI Devices, report devices found.
*/
#ifdef CONFIG_PCI
#ifndef CONFIG_PCI_PNP
static struct pci_config_table pci_integrator_config_table[] = {
{ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0f, PCI_ANY_ID,
pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
@@ -112,7 +48,7 @@ static struct pci_config_table pci_integrator_config_table[] = {
PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
{ }
};
#endif
#endif /* CONFIG_PCI_PNP */
/* V3 access routines */
#define _V3Write16(o,v) (*(volatile unsigned short *)(PCI_V3_BASE + (unsigned int)(o)) = (unsigned short)(v))
@@ -458,199 +394,3 @@ void pci_init_board (void)
hose->last_busno = pci_hose_scan (hose);
}
#endif
/******************************
Routine:
Description:
******************************/
void flash__init (void)
{
}
/*************************************************************
Routine:ether__init
Description: take the Ethernet controller out of reset and wait
for the EEPROM load to complete.
*************************************************************/
void ether__init (void)
{
}
/******************************
Routine:
Description:
******************************/
int dram_init (void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#ifdef CONFIG_CM_SPD_DETECT
{
extern void dram_query(void);
unsigned long cm_reg_sdram;
unsigned long sdram_shift;
dram_query(); /* Assembler accesses to CM registers */
/* Queries the SPD values */
/* Obtain the SDRAM size from the CM SDRAM register */
cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
/* Register SDRAM size
*
* 0xXXXXXXbbb000bb 16 MB
* 0xXXXXXXbbb001bb 32 MB
* 0xXXXXXXbbb010bb 64 MB
* 0xXXXXXXbbb011bb 128 MB
* 0xXXXXXXbbb100bb 256 MB
*
*/
sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift;
}
#endif /* CM_SPD_DETECT */
return 0;
}
/* The Integrator/AP timer1 is clocked at 24MHz
* can be divided by 16 or 256
* and is a 16-bit counter
*/
/* U-Boot expects a 32 bit timer running at CONFIG_SYS_HZ*/
static ulong timestamp; /* U-Boot ticks since startup */
static ulong total_count = 0; /* Total timer count */
static ulong lastdec; /* Timer reading at last call */
static ulong div_clock = 256; /* Divisor applied to the timer clock */
static ulong div_timer = 1; /* Divisor to convert timer reading
* change to U-Boot ticks
*/
/* CONFIG_SYS_HZ = CONFIG_SYS_HZ_CLOCK/(div_clock * div_timer) */
#define TIMER_LOAD_VAL 0x0000FFFFL
#define READ_TIMER ((*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4)) & 0x0000FFFFL)
/* all function return values in U-Boot ticks i.e. (1/CONFIG_SYS_HZ) sec
* - unless otherwise stated
*/
/* starts a counter
* - the Integrator/AP timer issues an interrupt
* each time it reaches zero
*/
int interrupt_init (void)
{
/* Load timer with initial value */
*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL;
/* Set timer to be
* enabled 1
* free-running 0
* XX 00
* divider 256 10
* XX 00
*/
*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = 0x00000088;
total_count = 0;
/* init the timestamp and lastdec value */
reset_timer_masked();
div_timer = CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ;
div_timer /= div_clock;
return (0);
}
/*
* timer without interrupts
*/
void reset_timer (void)
{
reset_timer_masked ();
}
ulong get_timer (ulong base_ticks)
{
return get_timer_masked () - base_ticks;
}
void set_timer (ulong ticks)
{
timestamp = ticks;
total_count = ticks * div_timer;
reset_timer_masked();
}
/* delay x useconds */
void udelay (unsigned long usec)
{
ulong tmo, tmp;
/* Convert to U-Boot ticks */
tmo = usec * CONFIG_SYS_HZ;
tmo /= (1000000L);
tmp = get_timer_masked(); /* get current timestamp */
tmo += tmp; /* wake up timestamp */
while (get_timer_masked () < tmo) { /* loop till event */
/*NOP*/;
}
}
void reset_timer_masked (void)
{
/* reset time */
lastdec = READ_TIMER; /* capture current decrementer value */
timestamp = 0; /* start "advancing" time stamp from 0 */
}
/* converts the timer reading to U-Boot ticks */
/* the timestamp is the number of ticks since reset */
/* This routine does not detect wraps unless called regularly
ASSUMES a call at least every 16 seconds to detect every reload */
ulong get_timer_masked (void)
{
ulong now = READ_TIMER; /* current count */
if (now > lastdec) {
/* Must have wrapped */
total_count += lastdec + TIMER_LOAD_VAL + 1 - now;
} else {
total_count += lastdec - now;
}
lastdec = now;
timestamp = total_count/div_timer;
return timestamp;
}
/* waits specified delay value and resets timestamp */
void udelay_masked (unsigned long usec)
{
udelay(usec);
}
/*
* This function is derived from PowerPC code (read timebase as long long).
* On ARM it just returns the timer value.
*/
unsigned long long get_ticks(void)
{
return get_timer(0);
}
/*
* Return the timebase clock frequency
* i.e. how often the timer decrements
*/
ulong get_tbclk (void)
{
return CONFIG_SYS_HZ_CLOCK/div_clock;
}
int board_eth_init(bd_t *bis)
{
return pci_eth_init(bis);
}

View File

@@ -0,0 +1,235 @@
#!/bin/sh
mkdir -p ${obj}include
mkdir -p ${obj}board/armltd/integrator
config_file=${obj}include/config.h
if [ "$1" = "ap" ]
then
# ---------------------------------------------------------
# Set the platform defines
# ---------------------------------------------------------
echo -n "/* Integrator configuration implied " > ${config_file}
echo " by Makefile target */" >> ${config_file}
echo -n "#define CONFIG_INTEGRATOR" >> ${config_file}
echo " /* Integrator board */" >> ${config_file}
echo -n "#define CONFIG_ARCH_INTEGRATOR" >> ${config_file}
echo " 1 /* Integrator/AP */" >> ${config_file}
# ---------------------------------------------------------
# Set the core module defines according to Core Module
# ---------------------------------------------------------
cpu="arm_intcm"
variant="unknown core module"
if [ "$2" = "" ]
then
echo "$0:: No parameters - using arm_intcm"
else
case "$2" in
ap7_config)
cpu="arm_intcm"
variant="unported core module CM7TDMI"
;;
ap966)
cpu="arm_intcm"
variant="unported core module CM966E-S"
;;
ap922_config)
cpu="arm_intcm"
variant="unported core module CM922T"
;;
integratorap_config | \
ap_config)
cpu="arm_intcm"
variant="unspecified core module"
;;
ap720t_config)
cpu="arm720t"
echo -n "#define CONFIG_CM720T" >> ${config_file}
echo " 1 /* CPU core is ARM720T */ " >> ${config_file}
variant="Core module CM720T"
;;
ap922_XA10_config)
cpu="arm_intcm"
variant="unported core module CM922T_XA10"
echo -n "#define CONFIG_CM922T_XA10" >> ${config_file}
echo " 1 /* CPU core is ARM922T_XA10 */" >> ${config_file}
;;
ap920t_config)
cpu="arm920t"
variant="Core module CM920T"
echo -n "#define CONFIG_CM920T" >> ${config_file}
echo " 1 /* CPU core is ARM920T */" >> ${config_file}
;;
ap926ejs_config)
cpu="arm926ejs"
variant="Core module CM926EJ-S"
echo -n "#define CONFIG_CM926EJ_S" >> ${config_file}
echo " 1 /* CPU core is ARM926EJ-S */ " >> ${config_file}
;;
ap946es_config)
cpu="arm946es"
variant="Core module CM946E-S"
echo -n "#define CONFIG_CM946E_S" >> ${config_file}
echo " 1 /* CPU core is ARM946E-S */ " >> ${config_file}
;;
*)
echo "$0:: Unknown core module"
variant="unknown core module"
cpu="arm_intcm"
;;
esac
fi
case "$cpu" in
arm_intcm)
echo "/* Core module undefined/not ported */" >> ${config_file}
echo "#define CONFIG_ARM_INTCM 1" >> ${config_file}
echo -n "#undef CONFIG_CM_MULTIPLE_SSRAM" >> ${config_file}
echo -n " /* CM may not have " >> ${config_file}
echo "multiple SSRAM mapping */" >> ${config_file}
echo -n "#undef CONFIG_CM_SPD_DETECT " >> ${config_file}
echo -n " /* CM may not support SPD " >> ${config_file}
echo "query */" >> ${config_file}
echo -n "#undef CONFIG_CM_REMAP " >> ${config_file}
echo -n " /* CM may not support " >> ${config_file}
echo "remapping */" >> ${config_file}
echo -n "#undef CONFIG_CM_INIT " >> ${config_file}
echo -n " /* CM may not have " >> ${config_file}
echo "initialization reg */" >> ${config_file}
echo -n "#undef CONFIG_CM_TCRAM " >> ${config_file}
echo " /* CM may not have TCRAM */" >> ${config_file}
echo -n " /* May not be processor " >> ${config_file}
echo "without cache support */" >> ${config_file}
echo "#define CONFIG_SYS_NO_ICACHE 1" >> ${config_file}
echo "#define CONFIG_SYS_NO_DCACHE 1" >> ${config_file}
;;
arm720t)
echo -n " /* May not be processor " >> ${config_file}
echo "without cache support */" >> ${config_file}
echo "#define CONFIG_SYS_NO_ICACHE 1" >> ${config_file}
echo "#define CONFIG_SYS_NO_DCACHE 1" >> ${config_file}
;;
esac
else
# ---------------------------------------------------------
# Set the platform defines
# ---------------------------------------------------------
echo -n "/* Integrator configuration implied " > ${config_file}
echo " by Makefile target */" >> ${config_file}
echo -n "#define CONFIG_INTEGRATOR" >> ${config_file}
echo " /* Integrator board */" >> ${config_file}
echo -n "#define CONFIG_ARCH_CINTEGRATOR" >> ${config_file}
echo " 1 /* Integrator/CP */" >> ${config_file}
cpu="arm_intcm"
variant="unknown core module"
if [ "$2" = "" ]
then
echo "$0:: No parameters - using arm_intcm"
else
case "$2" in
ap966)
cpu="arm_intcm"
variant="unported core module CM966E-S"
;;
ap922_config)
cpu="arm_intcm"
variant="unported core module CM922T"
;;
integratorcp_config | \
cp_config)
cpu="arm_intcm"
variant="unspecified core module"
;;
cp922_XA10_config)
cpu="arm_intcm"
variant="unported core module CM922T_XA10"
echo -n "#define CONFIG_CM922T_XA10" >> ${config_file}
echo " 1 /* CPU core is ARM922T_XA10 */" >> ${config_file}
;;
cp920t_config)
cpu="arm920t"
variant="Core module CM920T"
echo -n "#define CONFIG_CM920T" >> ${config_file}
echo " 1 /* CPU core is ARM920T */" >> ${config_file}
;;
cp926ejs_config)
cpu="arm926ejs"
variant="Core module CM926EJ-S"
echo -n "#define CONFIG_CM926EJ_S" >> ${config_file}
echo " 1 /* CPU core is ARM926EJ-S */ " >> ${config_file}
;;
cp946es_config)
cpu="arm946es"
variant="Core module CM946E-S"
echo -n "#define CONFIG_CM946E_S" >> ${config_file}
echo " 1 /* CPU core is ARM946E-S */ " >> ${config_file}
;;
cp1136_config)
cpu="arm1136"
variant="Core module CM1136EJF-S"
echo -n "#define CONFIG_CM1136EJF_S" >> ${config_file}
echo " 1 /* CPU core is ARM1136JF-S */ " >> ${config_file}
;;
*)
echo "$0:: Unknown core module"
variant="unknown core module"
cpu="arm_intcm"
;;
esac
fi
if [ "$cpu" = "arm_intcm" ]
then
echo "/* Core module undefined/not ported */" >> ${config_file}
echo "#define CONFIG_ARM_INTCM 1" >> ${config_file}
echo -n "#undef CONFIG_CM_MULTIPLE_SSRAM" >> ${config_file}
echo -n " /* CM may not have " >> ${config_file}
echo "multiple SSRAM mapping */" >> ${config_file}
echo -n "#undef CONFIG_CM_SPD_DETECT " >> ${config_file}
echo -n " /* CM may not support SPD " >> ${config_file}
echo "query */" >> ${config_file}
echo -n "#undef CONFIG_CM_REMAP " >> ${config_file}
echo -n " /* CM may not support " >> ${config_file}
echo "remapping */" >> ${config_file}
echo -n "#undef CONFIG_CM_INIT " >> ${config_file}
echo -n " /* CM may not have " >> ${config_file}
echo "initialization reg */" >> ${config_file}
echo -n "#undef CONFIG_CM_TCRAM " >> ${config_file}
echo " /* CM may not have TCRAM */" >> ${config_file}
fi
fi # ap
# ---------------------------------------------------------
# Complete the configuration
# ---------------------------------------------------------
$MKCONFIG -a -n "${2%%_config}" integrator$1 arm $cpu integrator armltd
echo "Variant: $variant with core $cpu"

View File

@@ -36,109 +36,13 @@
#include <common.h>
#include <div64.h>
DECLARE_GLOBAL_DATA_PTR;
void flash__init (void);
void ether__init (void);
void peripheral_power_enable (void);
#if defined(CONFIG_SHOW_BOOT_PROGRESS)
void show_boot_progress(int progress)
{
printf("Boot reached stage %d\n", progress);
}
#ifdef CONFIG_ARCH_CINTEGRATOR
#define DIV_CLOCK_INIT 1
#define TIMER_LOAD_VAL 0xFFFFFFFFL
#else
#define DIV_CLOCK_INIT 256
#define TIMER_LOAD_VAL 0x0000FFFFL
#endif
#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
/*
* Miscellaneous platform dependent initialisations
*/
int board_init (void)
{
/* arch number of Integrator Board */
gd->bd->bi_arch_number = MACH_TYPE_CINTEGRATOR;
/* adress of boot parameters */
gd->bd->bi_boot_params = 0x00000100;
gd->flags = 0;
#ifdef CONFIG_CM_REMAP
extern void cm_remap(void);
cm_remap(); /* remaps writeable memory to 0x00000000 */
#endif
icache_enable ();
flash__init ();
ether__init ();
return 0;
}
int misc_init_r (void)
{
setenv("verify", "n");
return (0);
}
/******************************
Routine:
Description:
******************************/
void flash__init (void)
{
}
/*************************************************************
Routine:ether__init
Description: take the Ethernet controller out of reset and wait
for the EEPROM load to complete.
*************************************************************/
void ether__init (void)
{
}
/******************************
Routine:
Description:
******************************/
int dram_init (void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
#ifdef CONFIG_CM_SPD_DETECT
{
extern void dram_query(void);
unsigned long cm_reg_sdram;
unsigned long sdram_shift;
dram_query(); /* Assembler accesses to CM registers */
/* Queries the SPD values */
/* Obtain the SDRAM size from the CM SDRAM register */
cm_reg_sdram = *(volatile ulong *)(CM_BASE + OS_SDRAM);
/* Register SDRAM size
*
* 0xXXXXXXbbb000bb 16 MB
* 0xXXXXXXbbb001bb 32 MB
* 0xXXXXXXbbb010bb 64 MB
* 0xXXXXXXbbb011bb 128 MB
* 0xXXXXXXbbb100bb 256 MB
*
*/
sdram_shift = ((cm_reg_sdram & 0x0000001C)/4)%4;
gd->bd->bi_dram[0].size = 0x01000000 << sdram_shift;
}
#endif /* CM_SPD_DETECT */
return 0;
}
/* The Integrator/CP timer1 is clocked at 1MHz
* can be divided by 16 or 256
* and can be set up as a 32-bit timer
@@ -147,14 +51,14 @@ extern void dram_query(void);
/* Keep total timer count to avoid losing decrements < div_timer */
static unsigned long long total_count = 0;
static unsigned long long lastdec; /* Timer reading at last call */
static unsigned long long div_clock = 1; /* Divisor applied to timer clock */
/* Divisor applied to timer clock */
static unsigned long long div_clock = DIV_CLOCK_INIT;
static unsigned long long div_timer = 1; /* Divisor to convert timer reading
* change to U-Boot ticks
*/
/* CONFIG_SYS_HZ = CONFIG_SYS_HZ_CLOCK/(div_clock * div_timer) */
static ulong timestamp; /* U-Boot ticks since startup */
static ulong timestamp; /* U-Boot ticks since startup */
#define TIMER_LOAD_VAL ((ulong)0xFFFFFFFF)
#define READ_TIMER (*(volatile ulong *)(CONFIG_SYS_TIMERBASE+4))
/* all function return values in U-Boot ticks i.e. (1/CONFIG_SYS_HZ) sec
@@ -163,26 +67,39 @@ static ulong timestamp; /* U-Boot ticks since startup */
/* starts up a counter
* - the Integrator/CP timer can be set up to issue an interrupt */
int interrupt_init (void)
int timer_init (void)
{
/* Load timer with initial value */
*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 0) = TIMER_LOAD_VAL;
#ifdef CONFIG_ARCH_CINTEGRATOR
/* Set timer to be
* enabled 1
* periodic 1
* no interrupts 0
* X 0
* divider 1 00 == less rounding error
* 32 bit 1
* wrapping 0
* enabled 1
* periodic 1
* no interrupts 0
* X 0
* divider 1 00 == less rounding error
* 32 bit 1
* wrapping 0
*/
*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = 0x000000C2;
#else
/* Set timer to be
* enabled 1
* free-running 0
* XX 00
* divider 256 10
* XX 00
*/
*(volatile ulong *)(CONFIG_SYS_TIMERBASE + 8) = 0x00000088;
#endif
/* init the timestamp */
total_count = 0ULL;
reset_timer_masked();
div_timer = (unsigned long long)(CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ);
div_timer /= div_clock;
div_timer = CONFIG_SYS_HZ_CLOCK;
do_div(div_timer, CONFIG_SYS_HZ);
do_div(div_timer, div_clock);
return (0);
}
@@ -203,7 +120,7 @@ ulong get_timer (ulong base_ticks)
void set_timer (ulong ticks)
{
timestamp = ticks;
total_count = (unsigned long long)ticks * div_timer;
total_count = ticks * div_timer;
}
/* delay usec useconds */
@@ -226,7 +143,7 @@ void udelay (unsigned long usec)
void reset_timer_masked (void)
{
/* capure current decrementer value */
lastdec = (unsigned long long)READ_TIMER;
lastdec = READ_TIMER;
/* start "advancing" time stamp from 0 */
timestamp = 0L;
}
@@ -236,7 +153,7 @@ void reset_timer_masked (void)
ulong get_timer_masked (void)
{
/* get current count */
unsigned long long now = (unsigned long long)READ_TIMER;
unsigned long long now = READ_TIMER;
if(now > lastdec) {
/* Must have wrapped */
@@ -244,7 +161,7 @@ ulong get_timer_masked (void)
} else {
total_count += lastdec - now;
}
lastdec = now;
lastdec = now;
/* Reuse "now" */
now = total_count;
@@ -266,7 +183,7 @@ void udelay_masked (unsigned long usec)
*/
unsigned long long get_ticks(void)
{
return (unsigned long long)get_timer(0);
return get_timer(0);
}
/*
@@ -275,5 +192,9 @@ unsigned long long get_ticks(void)
*/
ulong get_tbclk (void)
{
return (ulong)(((unsigned long long)CONFIG_SYS_HZ_CLOCK)/div_clock);
unsigned long long tmp = CONFIG_SYS_HZ_CLOCK;
do_div(tmp, div_clock);
return tmp;
}

View File

@@ -1,11 +0,0 @@
#
# image should be loaded at 0x01000000
#
TEXT_BASE = 0x01000000
ifneq ($(OBJTREE),$(SRCTREE))
# We are building u-boot in a separate directory, use generated
# .lds script from OBJTREE directory.
LDSCRIPT := $(OBJTREE)/board/$(BOARDDIR)/u-boot.lds
endif

View File

@@ -1,473 +0,0 @@
/*
* (C) Copyright 2001
* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
*
* (C) Copyright 2001-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* (C) Copyright 2003
* Texas Instruments, <www.ti.com>
* Kshitij Gupta <Kshitij@ti.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <linux/byteorder/swab.h>
#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
/* Board support for 1 or 2 flash devices */
#undef FLASH_PORT_WIDTH32
#define FLASH_PORT_WIDTH16
#ifdef FLASH_PORT_WIDTH16
#define FLASH_PORT_WIDTH ushort
#define FLASH_PORT_WIDTHV vu_short
#define SWAP(x) __swab16(x)
#else
#define FLASH_PORT_WIDTH ulong
#define FLASH_PORT_WIDTHV vu_long
#define SWAP(x) __swab32(x)
#endif
#define FPW FLASH_PORT_WIDTH
#define FPWV FLASH_PORT_WIDTHV
#define mb() __asm__ __volatile__ ("" : : : "memory")
/* Flash Organization Structure */
typedef struct OrgDef {
unsigned int sector_number;
unsigned int sector_size;
} OrgDef;
/* Flash Organizations */
OrgDef OrgIntel_28F256L18T[] = {
{4, 32 * 1024}, /* 4 * 32kBytes sectors */
{255, 128 * 1024}, /* 255 * 128kBytes sectors */
};
/*-----------------------------------------------------------------------
* Functions
*/
unsigned long flash_init (void);
static ulong flash_get_size (FPW * addr, flash_info_t * info);
static int write_data (flash_info_t * info, ulong dest, FPW data);
static void flash_get_offsets (ulong base, flash_info_t * info);
void inline spin_wheel (void);
void flash_print_info (flash_info_t * info);
void flash_unprotect_sectors (FPWV * addr);
int flash_erase (flash_info_t * info, int s_first, int s_last);
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
/*-----------------------------------------------------------------------
*/
unsigned long flash_init (void)
{
int i;
ulong size = 0;
for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
switch (i) {
case 0:
flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
break;
default:
panic ("configured too many flash banks!\n");
break;
}
size += flash_info[i].size;
}
/* Protect monitor and environment sectors
*/
flash_protect (FLAG_PROTECT_SET,
CONFIG_SYS_FLASH_BASE,
CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
return size;
}
/*-----------------------------------------------------------------------
*/
static void flash_get_offsets (ulong base, flash_info_t * info)
{
int i;
OrgDef *pOrgDef;
pOrgDef = OrgIntel_28F256L18T;
if (info->flash_id == FLASH_UNKNOWN) {
return;
}
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
for (i = 0; i < info->sector_count; i++) {
if (i > 255) {
info->start[i] = base + (i * 0x8000);
info->protect[i] = 0;
} else {
info->start[i] = base +
(i * PHYS_FLASH_SECT_SIZE);
info->protect[i] = 0;
}
}
}
}
/*-----------------------------------------------------------------------
*/
void flash_print_info (flash_info_t * info)
{
int i;
if (info->flash_id == FLASH_UNKNOWN) {
printf ("missing or unknown FLASH type\n");
return;
}
switch (info->flash_id & FLASH_VENDMASK) {
case FLASH_MAN_INTEL:
printf ("INTEL ");
break;
default:
printf ("Unknown Vendor ");
break;
}
switch (info->flash_id & FLASH_TYPEMASK) {
case FLASH_28F256L18T:
printf ("FLASH 28F256L18T\n");
break;
default:
printf ("Unknown Chip Type\n");
break;
}
printf (" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
printf (" Sector Start Addresses:");
for (i = 0; i < info->sector_count; ++i) {
if ((i % 5) == 0)
printf ("\n ");
printf (" %08lX%s",
info->start[i], info->protect[i] ? " (RO)" : " ");
}
printf ("\n");
return;
}
/*
* The following code cannot be run from FLASH!
*/
static ulong flash_get_size (FPW * addr, flash_info_t * info)
{
volatile FPW value;
/* Write auto select command: read Manufacturer ID */
addr[0x5555] = (FPW) 0x00AA00AA;
addr[0x2AAA] = (FPW) 0x00550055;
addr[0x5555] = (FPW) 0x00900090;
mb ();
value = addr[0];
switch (value) {
case (FPW) INTEL_MANUFACT:
info->flash_id = FLASH_MAN_INTEL;
break;
default:
info->flash_id = FLASH_UNKNOWN;
info->sector_count = 0;
info->size = 0;
addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
return (0); /* no or unknown flash */
}
mb ();
value = addr[1]; /* device ID */
switch (value) {
case (FPW) (INTEL_ID_28F256L18T):
info->flash_id += FLASH_28F256L18T;
info->sector_count = 259;
info->size = 0x02000000;
break; /* => 32 MB */
default:
info->flash_id = FLASH_UNKNOWN;
break;
}
if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
printf ("** ERROR: sector count %d > max (%d) **\n",
info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
}
addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
return (info->size);
}
/* unprotects a sector for write and erase
* on some intel parts, this unprotects the entire chip, but it
* wont hurt to call this additional times per sector...
*/
void flash_unprotect_sectors (FPWV * addr)
{
#define PD_FINTEL_WSMS_READY_MASK 0x0080
*addr = (FPW) 0x00500050; /* clear status register */
/* this sends the clear lock bit command */
*addr = (FPW) 0x00600060;
*addr = (FPW) 0x00D000D0;
}
/*-----------------------------------------------------------------------
*/
int flash_erase (flash_info_t * info, int s_first, int s_last)
{
int flag, prot, sect;
ulong type, start, last;
int rcode = 0;
if ((s_first < 0) || (s_first > s_last)) {
if (info->flash_id == FLASH_UNKNOWN) {
printf ("- missing\n");
} else {
printf ("- no sectors to erase\n");
}
return 1;
}
type = (info->flash_id & FLASH_VENDMASK);
if ((type != FLASH_MAN_INTEL)) {
printf ("Can't erase unknown flash type %08lx - aborted\n",
info->flash_id);
return 1;
}
prot = 0;
for (sect = s_first; sect <= s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
}
if (prot) {
printf ("- Warning: %d protected sectors will not be erased!\n",
prot);
} else {
printf ("\n");
}
start = get_timer (0);
last = start;
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts ();
/* Start erase on unprotected sectors */
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
FPWV *addr = (FPWV *) (info->start[sect]);
FPW status;
printf ("Erasing sector %2d ... ", sect);
flash_unprotect_sectors (addr);
/* arm simple, non interrupt dependent timer */
reset_timer_masked ();
*addr = (FPW) 0x00500050;/* clear status register */
*addr = (FPW) 0x00200020;/* erase setup */
*addr = (FPW) 0x00D000D0;/* erase confirm */
while (((status =
*addr) & (FPW) 0x00800080) !=
(FPW) 0x00800080) {
if (get_timer_masked () >
CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
/* suspend erase */
*addr = (FPW) 0x00B000B0;
/* reset to read mode */
*addr = (FPW) 0x00FF00FF;
rcode = 1;
break;
}
}
/* clear status register cmd. */
*addr = (FPW) 0x00500050;
*addr = (FPW) 0x00FF00FF;/* resest to read mode */
printf (" done\n");
}
}
return rcode;
}
/*-----------------------------------------------------------------------
* Copy memory to flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
* 4 - Flash not identified
*/
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
ulong cp, wp;
FPW data;
int count, i, l, rc, port_width;
if (info->flash_id == FLASH_UNKNOWN) {
return 4;
}
/* get lower word aligned address */
#ifdef FLASH_PORT_WIDTH16
wp = (addr & ~1);
port_width = 2;
#else
wp = (addr & ~3);
port_width = 4;
#endif
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
data = 0;
for (i = 0, cp = wp; i < l; ++i, ++cp) {
data = (data << 8) | (*(uchar *) cp);
}
for (; i < port_width && cnt > 0; ++i) {
data = (data << 8) | *src++;
--cnt;
++cp;
}
for (; cnt == 0 && i < port_width; ++i, ++cp) {
data = (data << 8) | (*(uchar *) cp);
}
if ((rc = write_data (info, wp, SWAP (data))) != 0) {
return (rc);
}
wp += port_width;
}
/*
* handle word aligned part
*/
count = 0;
while (cnt >= port_width) {
data = 0;
for (i = 0; i < port_width; ++i) {
data = (data << 8) | *src++;
}
if ((rc = write_data (info, wp, SWAP (data))) != 0) {
return (rc);
}
wp += port_width;
cnt -= port_width;
if (count++ > 0x800) {
spin_wheel ();
count = 0;
}
}
if (cnt == 0) {
return (0);
}
/*
* handle unaligned tail bytes
*/
data = 0;
for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
data = (data << 8) | *src++;
--cnt;
}
for (; i < port_width; ++i, ++cp) {
data = (data << 8) | (*(uchar *) cp);
}
return (write_data (info, wp, SWAP (data)));
}
/*-----------------------------------------------------------------------
* Write a word or halfword to Flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
static int write_data (flash_info_t * info, ulong dest, FPW data)
{
FPWV *addr = (FPWV *) dest;
ulong status;
int flag;
/* Check if Flash is (sufficiently) erased */
if ((*addr & data) != data) {
printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
return (2);
}
flash_unprotect_sectors (addr);
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts ();
*addr = (FPW) 0x00400040; /* write setup */
*addr = data;
/* arm simple, non interrupt dependent timer */
reset_timer_masked ();
/* wait while polling the status register */
while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) {
*addr = (FPW) 0x00FF00FF; /* restore read mode */
return (1);
}
}
*addr = (FPW) 0x00FF00FF; /* restore read mode */
return (0);
}
void inline spin_wheel (void)
{
static int p = 0;
static char w[] = "\\/-";
printf ("\010%c", w[p]);
(++p == 3) ? (p = 0) : 0;
}

View File

@@ -1,131 +0,0 @@
#!/bin/sh
# ---------------------------------------------------------
# Set the platform defines
# ---------------------------------------------------------
echo -n "/* Integrator configuration implied " > tmp.fil
echo " by Makefile target */" >> tmp.fil
echo -n "#define CONFIG_INTEGRATOR" >> tmp.fil
echo " /* Integrator board */" >> tmp.fil
echo -n "#define CONFIG_ARCH_INTEGRATOR" >> tmp.fil
echo " 1 /* Integrator/AP */" >> tmp.fil
# ---------------------------------------------------------
# Set the core module defines according to Core Module
# ---------------------------------------------------------
cpu="arm_intcm"
variant="unknown core module"
if [ "$1" = "" ]
then
echo "$0:: No parameters - using arm_intcm"
else
case "$1" in
ap7_config)
cpu="arm_intcm"
variant="unported core module CM7TDMI"
;;
ap966)
cpu="arm_intcm"
variant="unported core module CM966E-S"
;;
ap922_config)
cpu="arm_intcm"
variant="unported core module CM922T"
;;
integratorap_config | \
ap_config)
cpu="arm_intcm"
variant="unspecified core module"
;;
ap720t_config)
cpu="arm720t"
echo -n "#define CONFIG_CM720T" >> tmp.fil
echo " 1 /* CPU core is ARM720T */ " >> tmp.fil
variant="Core module CM720T"
;;
ap922_XA10_config)
cpu="arm_intcm"
variant="unported core module CM922T_XA10"
echo -n "#define CONFIG_CM922T_XA10" >> tmp.fil
echo " 1 /* CPU core is ARM922T_XA10 */" >> tmp.fil
;;
ap920t_config)
cpu="arm920t"
variant="Core module CM920T"
echo -n "#define CONFIG_CM920T" >> tmp.fil
echo " 1 /* CPU core is ARM920T */" >> tmp.fil
;;
ap926ejs_config)
cpu="arm926ejs"
variant="Core module CM926EJ-S"
echo -n "#define CONFIG_CM926EJ_S" >> tmp.fil
echo " 1 /* CPU core is ARM926EJ-S */ " >> tmp.fil
;;
ap946es_config)
cpu="arm946es"
variant="Core module CM946E-S"
echo -n "#define CONFIG_CM946E_S" >> tmp.fil
echo " 1 /* CPU core is ARM946E-S */ " >> tmp.fil
;;
*)
echo "$0:: Unknown core module"
variant="unknown core module"
cpu="arm_intcm"
;;
esac
fi
case "$cpu" in
arm_intcm)
echo "/* Core module undefined/not ported */" >> tmp.fil
echo "#define CONFIG_ARM_INTCM 1" >> tmp.fil
echo -n "#undef CONFIG_CM_MULTIPLE_SSRAM" >> tmp.fil
echo -n " /* CM may not have " >> tmp.fil
echo "multiple SSRAM mapping */" >> tmp.fil
echo -n "#undef CONFIG_CM_SPD_DETECT " >> tmp.fil
echo -n " /* CM may not support SPD " >> tmp.fil
echo "query */" >> tmp.fil
echo -n "#undef CONFIG_CM_REMAP " >> tmp.fil
echo -n " /* CM may not support " >> tmp.fil
echo "remapping */" >> tmp.fil
echo -n "#undef CONFIG_CM_INIT " >> tmp.fil
echo -n " /* CM may not have " >> tmp.fil
echo "initialization reg */" >> tmp.fil
echo -n "#undef CONFIG_CM_TCRAM " >> tmp.fil
echo " /* CM may not have TCRAM */" >> tmp.fil
echo -n " /* May not be processor " >> tmp.fil
echo "without cache support */" >> tmp.fil
echo "#define CONFIG_SYS_NO_ICACHE 1" >> tmp.fil
echo "#define CONFIG_SYS_NO_DCACHE 1" >> tmp.fil
;;
arm720t)
echo -n " /* May not be processor " >> tmp.fil
echo "without cache support */" >> tmp.fil
echo "#define CONFIG_SYS_NO_ICACHE 1" >> tmp.fil
echo "#define CONFIG_SYS_NO_DCACHE 1" >> tmp.fil
;;
esac
mkdir -p ${obj}include
mkdir -p ${obj}board/armltd/integratorap
mv tmp.fil ${obj}include/config.h
# ---------------------------------------------------------
# Ensure correct core object loaded first in U-Boot image
# ---------------------------------------------------------
sed -r 's/CPU_FILE/cpu\/'$cpu'\/start.o/; s/#.*//' ${src}board/armltd/integratorap/u-boot.lds.template > ${obj}board/armltd/integratorap/u-boot.lds
# ---------------------------------------------------------
# Complete the configuration
# ---------------------------------------------------------
$MKCONFIG -a integratorap arm $cpu integratorap armltd;
echo "Variant:: $variant with core $cpu"

View File

@@ -1,53 +0,0 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
# Template used during configuration to emsure the core module processor code,
# from CPU_FILE, is placed at the start of the image */
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
CPU_FILE (.text)
*(.text)
}
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

View File

@@ -1,11 +0,0 @@
#
# image should be loaded at 0x01000000
#
TEXT_BASE = 0x01000000
ifneq ($(OBJTREE),$(SRCTREE))
# We are building u-boot in a separate directory, use generated
# .lds script from OBJTREE directory.
LDSCRIPT := $(OBJTREE)/board/$(BOARDDIR)/u-boot.lds
endif

View File

@@ -1,564 +0,0 @@
/*
* (C) Copyright 2004
* Xiaogeng (Shawn) Jin, Agilent Technologies, xiaogeng_jin@agilent.com
*
* (C) Copyright 2001
* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
*
* (C) Copyright 2001-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* (C) Copyright 2003
* Texas Instruments, <www.ti.com>
* Kshitij Gupta <Kshitij@ti.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <linux/byteorder/swab.h>
#define DEBUG
#define PHYS_FLASH_SECT_SIZE 0x00040000 /* 256 KB sectors (x2) */
flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
/* Board support for 1 or 2 flash devices */
#define FLASH_PORT_WIDTH32
#undef FLASH_PORT_WIDTH16
#ifdef FLASH_PORT_WIDTH16
#define FLASH_PORT_WIDTH ushort
#define FLASH_PORT_WIDTHV vu_short
#define SWAP(x) __swab16(x)
#else
#define FLASH_PORT_WIDTH ulong
#define FLASH_PORT_WIDTHV vu_long
#define SWAP(x) __swab32(x)
#endif
#define FPW FLASH_PORT_WIDTH
#define FPWV FLASH_PORT_WIDTHV
#define mb() __asm__ __volatile__ ("" : : : "memory")
/* Flash Organization Structure */
typedef struct OrgDef {
unsigned int sector_number;
unsigned int sector_size;
} OrgDef;
/* Flash Organizations */
OrgDef OrgIntel_28F256L18T[] = {
{4, 32 * 1024}, /* 4 * 32kBytes sectors */
{255, 128 * 1024}, /* 255 * 128kBytes sectors */
};
/* CP control register base address */
#define CPCR_BASE 0xCB000000
#define CPCR_EXTRABANK 0x8
#define CPCR_FLASHSIZE 0x4
#define CPCR_FLWREN 0x2
#define CPCR_FLVPPEN 0x1
/*-----------------------------------------------------------------------
* Functions
*/
unsigned long flash_init (void);
static ulong flash_get_size (FPW * addr, flash_info_t * info);
static int write_data (flash_info_t * info, ulong dest, FPW data);
static void flash_get_offsets (ulong base, flash_info_t * info);
void inline spin_wheel (void);
void flash_print_info (flash_info_t * info);
void flash_unprotect_sectors (FPWV * addr);
int flash_erase (flash_info_t * info, int s_first, int s_last);
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
/*-----------------------------------------------------------------------
*/
unsigned long flash_init (void)
{
int i, nbanks;
ulong size = 0;
vu_long *cpcr = (vu_long *)CPCR_BASE;
/* Check if there is an extra bank of flash */
if (cpcr[1] & CPCR_EXTRABANK)
nbanks = 2;
else
nbanks = 1;
if (nbanks > CONFIG_SYS_MAX_FLASH_BANKS)
nbanks = CONFIG_SYS_MAX_FLASH_BANKS;
/* Enable flash write */
cpcr[1] |= 3;
for (i = 0; i < nbanks; i++) {
flash_get_size ((FPW *)(CONFIG_SYS_FLASH_BASE + size), &flash_info[i]);
flash_get_offsets (CONFIG_SYS_FLASH_BASE + size, &flash_info[i]);
size += flash_info[i].size;
}
#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
/* monitor protection */
flash_protect (FLAG_PROTECT_SET,
CONFIG_SYS_MONITOR_BASE,
CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]);
#endif
#ifdef CONFIG_ENV_IS_IN_FLASH
/* ENV protection ON */
flash_protect(FLAG_PROTECT_SET,
CONFIG_ENV_ADDR,
CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
&flash_info[0]);
#endif
/* Protect SIB (0x24800000) and bootMonitor (0x24c00000) */
flash_protect (FLAG_PROTECT_SET,
flash_info[0].start[62],
flash_info[0].start[63] + PHYS_FLASH_SECT_SIZE - 1,
&flash_info[0]);
return size;
}
/*-----------------------------------------------------------------------
*/
static void flash_get_offsets (ulong base, flash_info_t * info)
{
int i;
if (info->flash_id == FLASH_UNKNOWN) {
return;
}
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
for (i = 0; i < info->sector_count; i++) {
info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
info->protect[i] = 0;
}
}
}
/*-----------------------------------------------------------------------
*/
void flash_print_info (flash_info_t * info)
{
int i;
if (info->flash_id == FLASH_UNKNOWN) {
printf ("missing or unknown FLASH type\n");
return;
}
switch (info->flash_id & FLASH_VENDMASK) {
case FLASH_MAN_INTEL:
printf ("INTEL ");
break;
default:
printf ("Unknown Vendor ");
break;
}
/* Integrator CP board uses 28F640J3C or 28F128J3C parts,
* which have the same device id numbers as 28F640J3A or
* 28F128J3A
*/
switch (info->flash_id & FLASH_TYPEMASK) {
case FLASH_28F256L18T:
printf ("FLASH 28F256L18T\n");
break;
case FLASH_28F640J3A:
printf ("FLASH 28F640J3C\n");
break;
case FLASH_28F128J3A:
printf ("FLASH 28F128J3C\n");
break;
default:
printf ("Unknown Chip Type\n");
break;
}
printf (" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
printf (" Sector Start Addresses:");
for (i = 0; i < info->sector_count; ++i) {
if ((i % 5) == 0)
printf ("\n ");
printf (" %08lX%s",
info->start[i], info->protect[i] ? " (RO)" : " ");
}
printf ("\n");
return;
}
/*
* The following code cannot be run from FLASH!
*/
static ulong flash_get_size (FPW * addr, flash_info_t * info)
{
volatile FPW value;
vu_long *cpcr = (vu_long *)CPCR_BASE;
int nsects;
/* Check the flash size */
if (cpcr[1] & CPCR_FLASHSIZE)
nsects = 128;
else
nsects = 64;
if (nsects > CONFIG_SYS_MAX_FLASH_SECT)
nsects = CONFIG_SYS_MAX_FLASH_SECT;
/* Write auto select command: read Manufacturer ID */
addr[0x5555] = (FPW) 0x00AA00AA;
addr[0x2AAA] = (FPW) 0x00550055;
addr[0x5555] = (FPW) 0x00900090;
mb ();
value = addr[0];
switch (value) {
case (FPW) INTEL_MANUFACT:
info->flash_id = FLASH_MAN_INTEL;
break;
default:
info->flash_id = FLASH_UNKNOWN;
info->sector_count = 0;
info->size = 0;
addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
return (0); /* no or unknown flash */
}
mb ();
value = addr[1]; /* device ID */
switch (value) {
case (FPW) (INTEL_ID_28F256L18T):
info->flash_id += FLASH_28F256L18T;
info->sector_count = 259;
info->size = 0x02000000;
break; /* => 32 MB */
case (FPW) (INTEL_ID_28F640J3A):
info->flash_id += FLASH_28F640J3A;
info->sector_count = nsects;
info->size = nsects * PHYS_FLASH_SECT_SIZE;
break;
case (FPW) (INTEL_ID_28F128J3A):
info->flash_id += FLASH_28F128J3A;
info->sector_count = nsects;
info->size = nsects * PHYS_FLASH_SECT_SIZE;
break;
default:
info->flash_id = FLASH_UNKNOWN;
break;
}
if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
printf ("** ERROR: sector count %d > max (%d) **\n",
info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
}
addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
return (info->size);
}
/* unprotects a sector for write and erase
* on some intel parts, this unprotects the entire chip, but it
* wont hurt to call this additional times per sector...
*/
void flash_unprotect_sectors (FPWV * addr)
{
FPW status;
*addr = (FPW) 0x00500050; /* clear status register */
/* this sends the clear lock bit command */
*addr = (FPW) 0x00600060;
*addr = (FPW) 0x00D000D0;
reset_timer_masked();
while (((status = *addr) & (FPW)0x00800080) != 0x00800080) {
if (get_timer_masked() > CONFIG_SYS_FLASH_ERASE_TOUT) {
printf("Timeout");
break;
}
}
*addr = (FPW) 0x00FF00FF;
}
/*-----------------------------------------------------------------------
*/
int flash_erase (flash_info_t * info, int s_first, int s_last)
{
int flag, prot, sect;
ulong type;
int rcode = 0;
if ((s_first < 0) || (s_first > s_last)) {
if (info->flash_id == FLASH_UNKNOWN) {
printf ("- missing\n");
} else {
printf ("- no sectors to erase\n");
}
return 1;
}
type = (info->flash_id & FLASH_VENDMASK);
if ((type != FLASH_MAN_INTEL)) {
printf ("Can't erase unknown flash type %08lx - aborted\n",
info->flash_id);
return 1;
}
prot = 0;
for (sect = s_first; sect <= s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
}
if (prot) {
printf ("- Warning: %d protected sectors will not be erased!\n",
prot);
} else {
printf ("\n");
}
/* Start erase on unprotected sectors */
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
FPWV *addr = (FPWV *) (info->start[sect]);
FPW status;
printf ("Erasing sector %2d ... ", sect);
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts ();
/* flash_unprotect_sectors (addr); */
/* arm simple, non interrupt dependent timer */
reset_timer_masked ();
*addr = (FPW) 0x00500050; /* clear status register */
*addr = (FPW) 0x00200020; /* erase setup */
*addr = (FPW) 0x00D000D0; /* erase confirm */
mb();
udelay(1000); /* Let's wait 1 ms */
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
if (get_timer_masked () > CONFIG_SYS_FLASH_ERASE_TOUT) {
*addr = (FPW)0x00700070;
status = *addr;
if ((status & (FPW) 0x00400040) == (FPW) 0x00400040) {
/* erase suspended? Resume it */
reset_timer_masked();
*addr = (FPW) 0x00D000D0;
} else {
#ifdef DEBUG
printf ("Timeout,0x%08lx\n", status);
#else
printf("Timeout\n");
#endif
*addr = (FPW) 0x00500050;
*addr = (FPW) 0x00FF00FF; /* reset to read mode */
rcode = 1;
break;
}
}
}
*addr = (FPW) 0x00FF00FF; /* resest to read mode */
printf (" done\n");
}
}
return rcode;
}
/*-----------------------------------------------------------------------
* Copy memory to flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
* 4 - Flash not identified
*/
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
ulong cp, wp;
FPW data;
int count, i, l, rc, port_width;
if (info->flash_id == FLASH_UNKNOWN) {
return 4;
}
/* get lower word aligned address */
#ifdef FLASH_PORT_WIDTH16
wp = (addr & ~1);
port_width = 2;
#else
wp = (addr & ~3);
port_width = 4;
#endif
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
data = 0;
for (i = 0, cp = wp; i < l; ++i, ++cp) {
data = (data << 8) | (*(uchar *) cp);
}
for (; i < port_width && cnt > 0; ++i) {
data = (data << 8) | *src++;
--cnt;
++cp;
}
for (; cnt == 0 && i < port_width; ++i, ++cp) {
data = (data << 8) | (*(uchar *) cp);
}
if ((rc = write_data (info, wp, SWAP (data))) != 0) {
return (rc);
}
wp += port_width;
}
/*
* handle word aligned part
*/
count = 0;
while (cnt >= port_width) {
data = 0;
for (i = 0; i < port_width; ++i) {
data = (data << 8) | *src++;
}
if ((rc = write_data (info, wp, SWAP (data))) != 0) {
return (rc);
}
wp += port_width;
cnt -= port_width;
if (count++ > 0x800) {
spin_wheel ();
count = 0;
}
}
if (cnt == 0) {
return (0);
}
/*
* handle unaligned tail bytes
*/
data = 0;
for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
data = (data << 8) | *src++;
--cnt;
}
for (; i < port_width; ++i, ++cp) {
data = (data << 8) | (*(uchar *) cp);
}
return (write_data (info, wp, SWAP (data)));
}
/*-----------------------------------------------------------------------
* Write a word or halfword to Flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
static int write_data (flash_info_t * info, ulong dest, FPW data)
{
FPWV *addr = (FPWV *) dest;
ulong status;
int flag;
/* Check if Flash is (sufficiently) erased */
if ((*addr & data) != data) {
printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
return (2);
}
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts ();
/* flash_unprotect_sectors (addr); */
*addr = (FPW) 0x00400040; /* write setup */
*addr = data;
mb();
/* re-enable interrupts if necessary */
if (flag)
enable_interrupts();
/* arm simple, non interrupt dependent timer */
reset_timer_masked ();
/* wait while polling the status register */
while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) {
#ifdef DEBUG
*addr = (FPW) 0x00700070;
status = *addr;
printf("## status=0x%08lx, addr=0x%p\n", status, addr);
#endif
*addr = (FPW) 0x00500050; /* clear status register cmd */
*addr = (FPW) 0x00FF00FF; /* restore read mode */
return (1);
}
}
*addr = (FPW) 0x00FF00FF; /* restore read mode */
return (0);
}
void inline spin_wheel (void)
{
static int p = 0;
static char w[] = "\\/-";
printf ("\010%c", w[p]);
(++p == 3) ? (p = 0) : 0;
}

View File

@@ -1,214 +0,0 @@
/*
* Board specific setup info
*
* (C) Copyright 2003, ARM Ltd.
* Philippe Robin, <philippe.robin@arm.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <version.h>
/* Reset using CM control register */
.global reset_cpu
reset_cpu:
mov r0, #CM_BASE
ldr r1,[r0,#OS_CTRL]
orr r1,r1,#CMMASK_RESET
str r1,[r0,#OS_CTRL]
reset_failed:
b reset_failed
/* Set up the platform, once the cpu has been initialized */
.globl lowlevel_init
lowlevel_init:
/* If U-Boot has been run after the ARM boot monitor
* then all the necessary actions have been done
* otherwise we are running from user flash mapped to 0x00000000
* --- DO NOT REMAP BEFORE THE CODE HAS BEEN RELOCATED --
* Changes to the (possibly soft) reset defaults of the processor
* itself should be performed in cpu/arm<>/start.S
* This function affects only the core module or board settings
*/
#ifdef CONFIG_CM_INIT
/* CM has an initialization register
* - bits in it are wired into test-chip pins to force
* reset defaults
* - may need to change its contents for U-Boot
*/
/* set the desired CM specific value */
mov r2,#CMMASK_LOWVEC /* Vectors at 0x00000000 for all */
#if defined (CONFIG_CM10200E) || defined (CONFIG_CM10220E)
orr r2,r2,#CMMASK_INIT_102
#else
#if !defined (CONFIG_CM920T) && !defined (CONFIG_CM920T_ETM) && \
!defined (CONFIG_CM940T)
/* CMxx6 code */
#ifdef CONFIG_CM_MULTIPLE_SSRAM
/* set simple mapping */
and r2,r2,#CMMASK_MAP_SIMPLE
#endif /* #ifdef CONFIG_CM_MULTIPLE_SSRAM */
#ifdef CONFIG_CM_TCRAM
/* disable TCRAM */
and r2,r2,#CMMASK_TCRAM_DISABLE
#endif /* #ifdef CONFIG_CM_TCRAM */
#if defined (CONFIG_CM926EJ_S) || defined (CONFIG_CM1026EJ_S) || \
defined (CONFIG_CM1136JF_S)
and r2,r2,#CMMASK_LE
#endif /* cpu with little endian initialization */
orr r2,r2,#CMMASK_CMxx6_COMMON
#endif /* CMxx6 code */
#endif /* ARM102xxE value */
/* read CM_INIT */
mov r0, #CM_BASE
ldr r1, [r0, #OS_INIT]
/* check against desired bit setting */
and r3,r1,r2
cmp r3,r2
beq init_reg_OK
/* lock for change */
mov r3, #CMVAL_LOCK1
and r3, r3, #CMVAL_LOCK2
str r3, [r0, #OS_LOCK]
/* set desired value */
orr r1,r1,r2
/* write & relock CM_INIT */
str r1, [r0, #OS_INIT]
mov r1, #CMVAL_UNLOCK
str r1, [r0, #OS_LOCK]
/* soft reset so new values used */
b reset_cpu
init_reg_OK:
#endif /* CONFIG_CM_INIT */
mov pc, lr
#ifdef CONFIG_CM_SPD_DETECT
/* Fast memory is available for the DRAM data
* - ensure it has been transferred, then summarize the data
* into a CM register
*/
.globl dram_query
dram_query:
stmfd r13!,{r4-r6,lr}
/* set up SDRAM info */
/* - based on example code from the CM User Guide */
mov r0, #CM_BASE
readspdbit:
ldr r1, [r0, #OS_SDRAM] /* read the SDRAM register */
and r1, r1, #0x20 /* mask SPD bit (5) */
cmp r1, #0x20 /* test if set */
bne readspdbit
setupsdram:
add r0, r0, #OS_SPD /* address the copy of the SDP data */
ldrb r1, [r0, #3] /* number of row address lines */
ldrb r2, [r0, #4] /* number of column address lines */
ldrb r3, [r0, #5] /* number of banks */
ldrb r4, [r0, #31] /* module bank density */
mul r5, r4, r3 /* size of SDRAM (MB divided by 4) */
mov r5, r5, ASL#2 /* size in MB */
mov r0, #CM_BASE /* reload for later code */
cmp r5, #0x10 /* is it 16MB? */
bne not16
mov r6, #0x2 /* store size and CAS latency of 2 */
b writesize
not16:
cmp r5, #0x20 /* is it 32MB? */
bne not32
mov r6, #0x6
b writesize
not32:
cmp r5, #0x40 /* is it 64MB? */
bne not64
mov r6, #0xa
b writesize
not64:
cmp r5, #0x80 /* is it 128MB? */
bne not128
mov r6, #0xe
b writesize
not128:
/* if it is none of these sizes then it is either 256MB, or
* there is no SDRAM fitted so default to 256MB
*/
mov r6, #0x12
writesize:
mov r1, r1, ASL#8 /* row addr lines from SDRAM reg */
orr r2, r1, r2, ASL#12 /* OR in column address lines */
orr r3, r2, r3, ASL#16 /* OR in number of banks */
orr r6, r6, r3 /* OR in size and CAS latency */
str r6, [r0, #OS_SDRAM] /* store SDRAM parameters */
#endif /* #ifdef CONFIG_CM_SPD_DETECT */
ldmfd r13!,{r4-r6,pc} /* back to caller */
#ifdef CONFIG_CM_REMAP
/* CM remap bit is operational
* - use it to map writeable memory at 0x00000000, in place of flash
*/
.globl cm_remap
cm_remap:
stmfd r13!,{r4-r10,lr}
mov r0, #CM_BASE
ldr r1, [r0, #OS_CTRL]
orr r1, r1, #CMMASK_REMAP /* set remap and led bits */
str r1, [r0, #OS_CTRL]
/* Now 0x00000000 is writeable, replace the vectors */
ldr r0, =_start /* r0 <- start of vectors */
ldr r2, =_armboot_start /* r2 <- past vectors */
sub r1,r1,r1 /* destination 0x00000000 */
copy_vec:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
ble copy_vec
ldmfd r13!,{r4-r10,pc} /* back to caller */
#endif /* #ifdef CONFIG_CM_REMAP */

View File

@@ -1,114 +0,0 @@
#!/bin/sh
# ---------------------------------------------------------
# Set the platform defines
# ---------------------------------------------------------
echo -n "/* Integrator configuration implied " > tmp.fil
echo " by Makefile target */" >> tmp.fil
echo -n "#define CONFIG_INTEGRATOR" >> tmp.fil
echo " /* Integrator board */" >> tmp.fil
echo -n "#define CONFIG_ARCH_CINTEGRATOR" >> tmp.fil
echo " 1 /* Integrator/CP */" >> tmp.fil
cpu="arm_intcm"
variant="unknown core module"
if [ "$1" = "" ]
then
echo "$0:: No parameters - using arm_intcm"
else
case "$1" in
ap966)
cpu="arm_intcm"
variant="unported core module CM966E-S"
;;
ap922_config)
cpu="arm_intcm"
variant="unported core module CM922T"
;;
integratorcp_config | \
cp_config)
cpu="arm_intcm"
variant="unspecified core module"
;;
cp922_XA10_config)
cpu="arm_intcm"
variant="unported core module CM922T_XA10"
echo -n "#define CONFIG_CM922T_XA10" >> tmp.fil
echo " 1 /* CPU core is ARM922T_XA10 */" >> tmp.fil
;;
cp920t_config)
cpu="arm920t"
variant="Core module CM920T"
echo -n "#define CONFIG_CM920T" >> tmp.fil
echo " 1 /* CPU core is ARM920T */" >> tmp.fil
;;
cp926ejs_config)
cpu="arm926ejs"
variant="Core module CM926EJ-S"
echo -n "#define CONFIG_CM926EJ_S" >> tmp.fil
echo " 1 /* CPU core is ARM926EJ-S */ " >> tmp.fil
;;
cp946es_config)
cpu="arm946es"
variant="Core module CM946E-S"
echo -n "#define CONFIG_CM946E_S" >> tmp.fil
echo " 1 /* CPU core is ARM946E-S */ " >> tmp.fil
;;
cp1136_config)
cpu="arm1136"
variant="Core module CM1136EJF-S"
echo -n "#define CONFIG_CM1136EJF_S" >> tmp.fil
echo " 1 /* CPU core is ARM1136JF-S */ " >> tmp.fil
;;
*)
echo "$0:: Unknown core module"
variant="unknown core module"
cpu="arm_intcm"
;;
esac
fi
if [ "$cpu" = "arm_intcm" ]
then
echo "/* Core module undefined/not ported */" >> tmp.fil
echo "#define CONFIG_ARM_INTCM 1" >> tmp.fil
echo -n "#undef CONFIG_CM_MULTIPLE_SSRAM" >> tmp.fil
echo -n " /* CM may not have " >> tmp.fil
echo "multiple SSRAM mapping */" >> tmp.fil
echo -n "#undef CONFIG_CM_SPD_DETECT " >> tmp.fil
echo -n " /* CM may not support SPD " >> tmp.fil
echo "query */" >> tmp.fil
echo -n "#undef CONFIG_CM_REMAP " >> tmp.fil
echo -n " /* CM may not support " >> tmp.fil
echo "remapping */" >> tmp.fil
echo -n "#undef CONFIG_CM_INIT " >> tmp.fil
echo -n " /* CM may not have " >> tmp.fil
echo "initialization reg */" >> tmp.fil
echo -n "#undef CONFIG_CM_TCRAM " >> tmp.fil
echo " /* CM may not have TCRAM */" >> tmp.fil
fi
mkdir -p ${obj}include
mkdir -p ${obj}board/armltd/integratorcp
mv tmp.fil ${obj}include/config.h
# ---------------------------------------------------------
# Ensure correct core object loaded first in U-Boot image
# ---------------------------------------------------------
sed -r 's/CPU_FILE/cpu\/'$cpu'\/start.o/; s/#.*//' ${src}board/armltd/integratorcp/u-boot.lds.template > ${obj}board/armltd/integratorcp/u-boot.lds
# ---------------------------------------------------------
# Complete the configuration
# ---------------------------------------------------------
$MKCONFIG -a integratorcp arm $cpu integratorcp armltd;
echo "Variant:: $variant with core $cpu"

View File

@@ -1,53 +0,0 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
# Template used during configuration to emsure the core module processor code,
# from CPU_FILE, is placed at the start of the image */
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
CPU_FILE (.text)
*(.text)
}
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

View File

@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS := versatile.o flash.o
COBJS := versatile.o
SOBJS := lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)

View File

@@ -1,514 +0,0 @@
/*
* (C) Copyright 2001
* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
*
* (C) Copyright 2001-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* (C) Copyright 2003
* Texas Instruments, <www.ti.com>
* Kshitij Gupta <Kshitij@ti.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <linux/byteorder/swab.h>
#define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */
flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
/* Board support for 1 or 2 flash devices */
#define FLASH_PORT_WIDTH32
#undef FLASH_PORT_WIDTH16
#ifdef FLASH_PORT_WIDTH16
#define FLASH_PORT_WIDTH ushort
#define FLASH_PORT_WIDTHV vu_short
#define SWAP(x) __swab16(x)
#else
#define FLASH_PORT_WIDTH ulong
#define FLASH_PORT_WIDTHV vu_long
#define SWAP(x) __swab32(x)
#endif
#define FPW FLASH_PORT_WIDTH
#define FPWV FLASH_PORT_WIDTHV
#define mb() __asm__ __volatile__ ("" : : : "memory")
/* Flash Organization Structure */
typedef struct OrgDef {
unsigned int sector_number;
unsigned int sector_size;
} OrgDef;
/* Flash Organizations */
OrgDef OrgIntel_28F256K3[] = {
{256, 128 * 1024}, /* 256 * 128kBytes sectors */
};
/*-----------------------------------------------------------------------
* Functions
*/
unsigned long flash_init (void);
static ulong flash_get_size (FPW * addr, flash_info_t * info);
static int write_data (flash_info_t * info, ulong dest, FPW data);
static void flash_get_offsets (ulong base, flash_info_t * info);
void inline spin_wheel (void);
void flash_print_info (flash_info_t * info);
void flash_unprotect_sectors (FPWV * addr);
int flash_erase (flash_info_t * info, int s_first, int s_last);
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
/*-----------------------------------------------------------------------
*/
static void flash_vpp(int on)
{
unsigned int tmp;
tmp = *(unsigned int *)(VERSATILE_FLASHCTRL);
if (on)
tmp |= VERSATILE_FLASHPROG_FLVPPEN;
else
tmp &= ~VERSATILE_FLASHPROG_FLVPPEN;
*(unsigned int *)(VERSATILE_FLASHCTRL) = tmp;
}
unsigned long flash_init (void)
{
int i;
ulong size = 0;
for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
switch (i) {
case 0:
flash_vpp(1);
flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
flash_vpp(0);
break;
default:
panic ("configured too many flash banks!\n");
break;
}
size += flash_info[i].size;
}
/* Protect monitor and environment sectors
*/
flash_protect (FLAG_PROTECT_SET,
CONFIG_SYS_FLASH_BASE,
CONFIG_SYS_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
return size;
}
/*-----------------------------------------------------------------------
*/
static void flash_get_offsets (ulong base, flash_info_t * info)
{
int i;
OrgDef *pOrgDef;
pOrgDef = OrgIntel_28F256K3;
if (info->flash_id == FLASH_UNKNOWN) {
return;
}
if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
for (i = 0; i < info->sector_count; i++) {
if (i > 255) {
info->start[i] = base + (i * 0x8000);
info->protect[i] = 0;
} else {
info->start[i] = base +
(i * PHYS_FLASH_SECT_SIZE);
info->protect[i] = 0;
}
}
}
}
/*-----------------------------------------------------------------------
*/
void flash_print_info (flash_info_t * info)
{
int i;
if (info->flash_id == FLASH_UNKNOWN) {
printf ("missing or unknown FLASH type\n");
return;
}
switch (info->flash_id & FLASH_VENDMASK) {
case FLASH_MAN_INTEL:
printf ("INTEL ");
break;
default:
printf ("Unknown Vendor ");
break;
}
switch (info->flash_id & FLASH_TYPEMASK) {
case FLASH_28F256L18T:
printf ("FLASH 28F256L18T\n");
break;
case FLASH_28F256K3:
printf ("FLASH 28F256K3\n");
break;
default:
printf ("Unknown Chip Type\n");
break;
}
printf (" Size: %ld MB in %d Sectors\n",
info->size >> 20, info->sector_count);
printf (" Sector Start Addresses:");
for (i = 0; i < info->sector_count; ++i) {
if ((i % 5) == 0)
printf ("\n ");
printf (" %08lX%s",
info->start[i], info->protect[i] ? " (RO)" : " ");
}
printf ("\n");
return;
}
/*
* The following code cannot be run from FLASH!
*/
static ulong flash_get_size (FPW * addr, flash_info_t * info)
{
volatile FPW value;
/* Write auto select command: read Manufacturer ID */
addr[0x5555] = (FPW) 0x00AA00AA;
addr[0x2AAA] = (FPW) 0x00550055;
addr[0x5555] = (FPW) 0x00900090;
mb ();
value = addr[0];
switch (value) {
case (FPW) INTEL_MANUFACT:
info->flash_id = FLASH_MAN_INTEL;
break;
default:
info->flash_id = FLASH_UNKNOWN;
info->sector_count = 0;
info->size = 0;
addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
return (0); /* no or unknown flash */
}
mb ();
value = addr[1]; /* device ID */
switch (value) {
case (FPW) (INTEL_ID_28F256L18T):
info->flash_id += FLASH_28F256L18T;
info->sector_count = 259;
info->size = 0x02000000;
break; /* => 32 MB */
case (FPW)(INTEL_ID_28F256K3):
info->flash_id += FLASH_28F256K3;
info->sector_count = 256;
info->size = 0x02000000;
break;
default:
info->flash_id = FLASH_UNKNOWN;
break;
}
if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
printf ("** ERROR: sector count %d > max (%d) **\n",
info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
}
addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
return (info->size);
}
/* unprotects a sector for write and erase
* on some intel parts, this unprotects the entire chip, but it
* wont hurt to call this additional times per sector...
*/
void flash_unprotect_sectors (FPWV * addr)
{
#define PD_FINTEL_WSMS_READY_MASK 0x0080
*addr = (FPW) 0x00500050; /* clear status register */
/* this sends the clear lock bit command */
*addr = (FPW) 0x00600060;
*addr = (FPW) 0x00D000D0;
}
/*-----------------------------------------------------------------------
*/
int flash_erase (flash_info_t * info, int s_first, int s_last)
{
int flag, prot, sect;
ulong type, start, last;
int rcode = 0;
if ((s_first < 0) || (s_first > s_last)) {
if (info->flash_id == FLASH_UNKNOWN) {
printf ("- missing\n");
} else {
printf ("- no sectors to erase\n");
}
return 1;
}
type = (info->flash_id & FLASH_VENDMASK);
if ((type != FLASH_MAN_INTEL)) {
printf ("Can't erase unknown flash type %08lx - aborted\n",
info->flash_id);
return 1;
}
prot = 0;
for (sect = s_first; sect <= s_last; ++sect) {
if (info->protect[sect]) {
prot++;
}
}
if (prot) {
printf ("- Warning: %d protected sectors will not be erased!\n",
prot);
} else {
printf ("\n");
}
flash_vpp(1);
start = get_timer (0);
last = start;
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts ();
/* Start erase on unprotected sectors */
for (sect = s_first; sect <= s_last; sect++) {
if (info->protect[sect] == 0) { /* not protected */
FPWV *addr = (FPWV *) (info->start[sect]);
FPW status;
printf ("Erasing sector %2d ... ", sect);
flash_unprotect_sectors (addr);
/* arm simple, non interrupt dependent timer */
reset_timer_masked ();
*addr = (FPW) 0x00500050;/* clear status register */
*addr = (FPW) 0x00200020;/* erase setup */
*addr = (FPW) 0x00D000D0;/* erase confirm */
while (((status =
*addr) & (FPW) 0x00800080) !=
(FPW) 0x00800080) {
if (get_timer_masked () >
CONFIG_SYS_FLASH_ERASE_TOUT) {
printf ("Timeout\n");
/* suspend erase */
*addr = (FPW) 0x00B000B0;
/* reset to read mode */
*addr = (FPW) 0x00FF00FF;
rcode = 1;
break;
}
}
/* clear status register cmd. */
*addr = (FPW) 0x00500050;
*addr = (FPW) 0x00FF00FF;/* resest to read mode */
printf (" done\n");
}
}
flash_vpp(0);
return rcode;
}
/*-----------------------------------------------------------------------
* Copy memory to flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
* 4 - Flash not identified
*/
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
ulong cp, wp;
FPW data;
int count, i, l, rc, port_width;
if (info->flash_id == FLASH_UNKNOWN) {
return 4;
}
/* get lower word aligned address */
#ifdef FLASH_PORT_WIDTH16
wp = (addr & ~1);
port_width = 2;
#else
wp = (addr & ~3);
port_width = 4;
#endif
flash_vpp(1);
/*
* handle unaligned start bytes
*/
if ((l = addr - wp) != 0) {
data = 0;
for (i = 0, cp = wp; i < l; ++i, ++cp) {
data = (data << 8) | (*(uchar *) cp);
}
for (; i < port_width && cnt > 0; ++i) {
data = (data << 8) | *src++;
--cnt;
++cp;
}
for (; cnt == 0 && i < port_width; ++i, ++cp) {
data = (data << 8) | (*(uchar *) cp);
}
if ((rc = write_data (info, wp, SWAP (data))) != 0) {
flash_vpp(0);
return (rc);
}
wp += port_width;
}
/*
* handle word aligned part
*/
count = 0;
while (cnt >= port_width) {
data = 0;
for (i = 0; i < port_width; ++i) {
data = (data << 8) | *src++;
}
if ((rc = write_data (info, wp, SWAP (data))) != 0) {
flash_vpp(0);
return (rc);
}
wp += port_width;
cnt -= port_width;
if (count++ > 0x800) {
spin_wheel ();
count = 0;
}
}
if (cnt == 0) {
flash_vpp(0);
return (0);
}
/*
* handle unaligned tail bytes
*/
data = 0;
for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
data = (data << 8) | *src++;
--cnt;
}
for (; i < port_width; ++i, ++cp) {
data = (data << 8) | (*(uchar *) cp);
}
rc = write_data (info, wp, SWAP (data));
flash_vpp(0);
return rc;
}
/*-----------------------------------------------------------------------
* Write a word or halfword to Flash, returns:
* 0 - OK
* 1 - write timeout
* 2 - Flash not erased
*/
static int write_data (flash_info_t * info, ulong dest, FPW data)
{
FPWV *addr = (FPWV *) dest;
ulong status;
int flag;
/* Check if Flash is (sufficiently) erased */
if ((*addr & data) != data) {
printf ("not erased at %08lx (%lx)\n", (ulong) addr, (ulong) *addr);
return (2);
}
flash_vpp(1);
flash_unprotect_sectors (addr);
/* Disable interrupts which might cause a timeout here */
flag = disable_interrupts ();
*addr = (FPW) 0x00400040; /* write setup */
*addr = data;
/* arm simple, non interrupt dependent timer */
reset_timer_masked ();
/* wait while polling the status register */
while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
if (get_timer_masked () > CONFIG_SYS_FLASH_WRITE_TOUT) {
*addr = (FPW) 0x00FF00FF; /* restore read mode */
flash_vpp(0);
return (1);
}
}
*addr = (FPW) 0x00FF00FF; /* restore read mode */
flash_vpp(0);
return (0);
}
void inline spin_wheel (void)
{
static int p = 0;
static char w[] = "\\/-";
printf ("\010%c", w[p]);
(++p == 3) ? (p = 0) : 0;
}

View File

@@ -46,13 +46,6 @@ void show_boot_progress(int progress)
#define COMP_MODE_ENABLE ((unsigned int)0x0000EAEF)
static inline void delay (unsigned long loops)
{
__asm__ volatile ("1:\n"
"subs %0, %1, #1\n"
"bne 1b":"=r" (loops):"0" (loops));
}
/*
* Miscellaneous platform dependent initialisations
*/

View File

@@ -61,7 +61,6 @@ static void at91cap9_slowclock_hw_init(void)
if (at91_sys_read(AT91_PMC_VER) == ARCH_ID_AT91CAP9_REVC) {
unsigned i, tmp = at91_sys_read(AT91_SCKCR);
if ((tmp & AT91CAP9_SCKCR_OSCSEL) == AT91CAP9_SCKCR_OSCSEL_RC) {
extern void timer_init(void);
timer_init();
tmp |= AT91CAP9_SCKCR_OSC32EN;
at91_sys_write(AT91_SCKCR, tmp);

View File

@@ -1,57 +0,0 @@
/*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
/*OUTPUT_FORMAT("elf32-arm", "elf32-arm", "elf32-arm")*/
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
cpu/arm920t/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
}

View File

@@ -86,6 +86,8 @@ static void at91sam9260ek_nand_hw_init(void)
#ifdef CONFIG_MACB
static void at91sam9260ek_macb_hw_init(void)
{
unsigned long rstc;
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9260_ID_EMAC);
@@ -108,6 +110,8 @@ static void at91sam9260ek_macb_hw_init(void)
pin_to_mask(AT91_PIN_PA28),
pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
/* Need to reset PHY -> 500ms reset */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
(AT91_RSTC_ERSTL & (0x0D << 8)) |
@@ -120,7 +124,7 @@ static void at91sam9260ek_macb_hw_init(void)
/* Restore NRST value */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
(AT91_RSTC_ERSTL & (0x0 << 8)) |
(rstc) |
AT91_RSTC_URSTEN);
/* Re-enable pull-up */

View File

@@ -36,6 +36,7 @@
#include <atmel_lcdc.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_DRIVER_DM9000)
#include <net.h>
#include <netdev.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -56,6 +57,16 @@ static void at91sam9261ek_nand_hw_init(void)
csa | AT91_MATRIX_CS3A_SMC_SMARTMEDIA);
/* Configure SMC CS3 for NAND/SmartMedia */
#ifdef CONFIG_AT91SAM9G10EK
at91_sys_write(AT91_SMC_SETUP(3),
AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
at91_sys_write(AT91_SMC_PULSE(3),
AT91_SMC_NWEPULSE_(3) | AT91_SMC_NCS_WRPULSE_(7) |
AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(7));
at91_sys_write(AT91_SMC_CYCLE(3),
AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(7));
#else
at91_sys_write(AT91_SMC_SETUP(3),
AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
@@ -64,6 +75,7 @@ static void at91sam9261ek_nand_hw_init(void)
AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(3));
at91_sys_write(AT91_SMC_CYCLE(3),
AT91_SMC_NWECYCLE_(5) | AT91_SMC_NRDCYCLE_(5));
#endif
at91_sys_write(AT91_SMC_MODE(3),
AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
AT91_SMC_EXNWMODE_DISABLE |
@@ -91,6 +103,21 @@ static void at91sam9261ek_nand_hw_init(void)
static void at91sam9261ek_dm9000_hw_init(void)
{
/* Configure SMC CS2 for DM9000 */
#ifdef CONFIG_AT91SAM9G10EK
at91_sys_write(AT91_SMC_SETUP(2),
AT91_SMC_NWESETUP_(3) | AT91_SMC_NCS_WRSETUP_(0) |
AT91_SMC_NRDSETUP_(3) | AT91_SMC_NCS_RDSETUP_(0));
at91_sys_write(AT91_SMC_PULSE(2),
AT91_SMC_NWEPULSE_(6) | AT91_SMC_NCS_WRPULSE_(8) |
AT91_SMC_NRDPULSE_(6) | AT91_SMC_NCS_RDPULSE_(8));
at91_sys_write(AT91_SMC_CYCLE(2),
AT91_SMC_NWECYCLE_(20) | AT91_SMC_NRDCYCLE_(20));
at91_sys_write(AT91_SMC_MODE(2),
AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
AT91_SMC_EXNWMODE_DISABLE |
AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 |
AT91_SMC_TDF_(1));
#else
at91_sys_write(AT91_SMC_SETUP(2),
AT91_SMC_NWESETUP_(2) | AT91_SMC_NCS_WRSETUP_(0) |
AT91_SMC_NRDSETUP_(2) | AT91_SMC_NCS_RDSETUP_(0));
@@ -104,6 +131,7 @@ static void at91sam9261ek_dm9000_hw_init(void)
AT91_SMC_EXNWMODE_DISABLE |
AT91_SMC_BAT_WRITE | AT91_SMC_DBW_16 |
AT91_SMC_TDF_(1));
#endif
/* Configure Reset signal as output */
at91_set_gpio_output(AT91_PIN_PC10, 0);
@@ -168,7 +196,11 @@ static void at91sam9261ek_lcd_hw_init(void)
at91_sys_write(AT91_PMC_SCER, AT91_PMC_HCK1);
#ifdef CONFIG_AT91SAM9G10EK
gd->fb_base = CONFIG_AT91SAM9G10_LCD_BASE;
#else
gd->fb_base = AT91SAM9261_SRAM_BASE;
#endif
}
#ifdef CONFIG_LCD_INFO
@@ -206,8 +238,13 @@ int board_init(void)
/* Enable Ctrlc */
console_init_f();
#ifdef CONFIG_AT91SAM9G10EK
/* arch number of AT91SAM9G10EK-Board */
gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G10EK;
#else
/* arch number of AT91SAM9261EK-Board */
gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9261EK;
#endif
/* adress of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
@@ -227,6 +264,12 @@ int board_init(void)
return 0;
}
#ifdef CONFIG_DRIVER_DM9000
int board_eth_init(bd_t *bis)
{
return dm9000_initialize(bis);
}
#endif
int dram_init(void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM;

View File

@@ -33,9 +33,9 @@ COBJS-y += at91sam9263ek.o
COBJS-y += led.o
COBJS-$(CONFIG_HAS_DATAFLASH) += partition.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)

View File

@@ -91,6 +91,8 @@ static void at91sam9263ek_nand_hw_init(void)
#ifdef CONFIG_MACB
static void at91sam9263ek_macb_hw_init(void)
{
unsigned long rstc;
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9263_ID_EMAC);
@@ -108,6 +110,8 @@ static void at91sam9263ek_macb_hw_init(void)
pin_to_mask(AT91_PIN_PE26),
pin_to_controller(AT91_PIN_PE0) + PIO_PUDR);
rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL;
/* Need to reset PHY -> 500ms reset */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
(AT91_RSTC_ERSTL & (0x0D << 8)) |
@@ -120,7 +124,7 @@ static void at91sam9263ek_macb_hw_init(void)
/* Restore NRST value */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
(AT91_RSTC_ERSTL & (0x0 << 8)) |
(rstc) |
AT91_RSTC_URSTEN);
/* Re-enable pull-up */
@@ -196,9 +200,16 @@ static void at91sam9263ek_lcd_hw_init(void)
#include <nand.h>
#include <version.h>
#ifndef CONFIG_SYS_NO_FLASH
extern flash_info_t flash_info[];
#endif
void lcd_show_board_info(void)
{
ulong dram_size, nand_size;
#ifndef CONFIG_SYS_NO_FLASH
ulong flash_size;
#endif
int i;
char temp[32];
@@ -215,9 +226,19 @@ void lcd_show_board_info(void)
nand_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i].size;
lcd_printf (" %ld MB SDRAM, %ld MB NAND\n",
#ifndef CONFIG_SYS_NO_FLASH
flash_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++)
flash_size += flash_info[i].size;
#endif
lcd_printf (" %ld MB SDRAM, %ld MB NAND",
dram_size >> 20,
nand_size >> 20 );
#ifndef CONFIG_SYS_NO_FLASH
lcd_printf (",\n %ld MB NOR",
flash_size >> 20);
#endif
lcd_puts ("\n");
}
#endif /* CONFIG_LCD_INFO */
#endif

View File

@@ -0,0 +1,55 @@
#
# (C) Copyright 2003-2008
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# (C) Copyright 2008
# Stelian Pop <stelian.pop@leadtechdesign.com>
# Lead Tech Design <www.leadtechdesign.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS-y += at91sam9m10g45ek.o
COBJS-y += led.o
SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -0,0 +1,334 @@
/*
* (C) Copyright 2007-2008
* Stelian Pop <stelian.pop@leadtechdesign.com>
* Lead Tech Design <www.leadtechdesign.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/sizes.h>
#include <asm/arch/at91sam9g45.h>
#include <asm/arch/at91sam9_matrix.h>
#include <asm/arch/at91sam9_smc.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_rstc.h>
#include <asm/arch/clk.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
#include <asm/arch/hardware.h>
#include <lcd.h>
#include <atmel_lcdc.h>
#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB)
#include <net.h>
#endif
#include <netdev.h>
DECLARE_GLOBAL_DATA_PTR;
/* ------------------------------------------------------------------------- */
/*
* Miscelaneous platform dependent initialisations
*/
#ifdef CONFIG_CMD_NAND
static void at91sam9m10g45ek_nand_hw_init(void)
{
unsigned long csa;
/* Enable CS3 */
csa = at91_sys_read(AT91_MATRIX_EBICSA);
at91_sys_write(AT91_MATRIX_EBICSA,
csa | AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA);
/* Configure SMC CS3 for NAND/SmartMedia */
at91_sys_write(AT91_SMC_SETUP(3),
AT91_SMC_NWESETUP_(1) | AT91_SMC_NCS_WRSETUP_(0) |
AT91_SMC_NRDSETUP_(1) | AT91_SMC_NCS_RDSETUP_(0));
at91_sys_write(AT91_SMC_PULSE(3),
AT91_SMC_NWEPULSE_(4) | AT91_SMC_NCS_WRPULSE_(3) |
AT91_SMC_NRDPULSE_(3) | AT91_SMC_NCS_RDPULSE_(2));
at91_sys_write(AT91_SMC_CYCLE(3),
AT91_SMC_NWECYCLE_(7) | AT91_SMC_NRDCYCLE_(4));
at91_sys_write(AT91_SMC_MODE(3),
AT91_SMC_READMODE | AT91_SMC_WRITEMODE |
AT91_SMC_EXNWMODE_DISABLE |
#ifdef CONFIG_SYS_NAND_DBW_16
AT91_SMC_DBW_16 |
#else /* CONFIG_SYS_NAND_DBW_8 */
AT91_SMC_DBW_8 |
#endif
AT91_SMC_TDF_(3));
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_PIOC);
/* Configure RDY/BSY */
at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
/* Enable NandFlash */
at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
}
#endif
#ifdef CONFIG_MACB
static void at91sam9m10g45ek_macb_hw_init(void)
{
unsigned long rstc;
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_EMAC);
/*
* Disable pull-up on:
* RXDV (PA15) => PHY normal mode (not Test mode)
* ERX0 (PA12) => PHY ADDR0
* ERX1 (PA13) => PHY ADDR1 => PHYADDR = 0x0
*
* PHY has internal pull-down
*/
writel(pin_to_mask(AT91_PIN_PA15) |
pin_to_mask(AT91_PIN_PA12) |
pin_to_mask(AT91_PIN_PA13),
pin_to_controller(AT91_PIN_PA0) + PIO_PUDR);
rstc = at91_sys_read(AT91_RSTC_MR);
/* Need to reset PHY -> 500ms reset */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
(AT91_RSTC_ERSTL & (0x0D << 8)) |
AT91_RSTC_URSTEN);
at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST);
/* Wait for end hardware reset */
while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL));
/* Restore NRST value */
at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY |
(rstc) |
AT91_RSTC_URSTEN);
/* Re-enable pull-up */
writel(pin_to_mask(AT91_PIN_PA15) |
pin_to_mask(AT91_PIN_PA12) |
pin_to_mask(AT91_PIN_PA13),
pin_to_controller(AT91_PIN_PA0) + PIO_PUER);
at91_macb_hw_init();
}
#endif
#ifdef CONFIG_LCD
vidinfo_t panel_info = {
vl_col: 480,
vl_row: 272,
vl_clk: 9000000,
vl_sync: ATMEL_LCDC_INVLINE_NORMAL |
ATMEL_LCDC_INVFRAME_NORMAL,
vl_bpix: 3,
vl_tft: 1,
vl_hsync_len: 45,
vl_left_margin: 1,
vl_right_margin:1,
vl_vsync_len: 1,
vl_upper_margin:40,
vl_lower_margin:1,
mmio: AT91SAM9G45_LCDC_BASE,
};
void lcd_enable(void)
{
at91_set_A_periph(AT91_PIN_PE6, 1); /* power up */
}
void lcd_disable(void)
{
at91_set_A_periph(AT91_PIN_PE6, 0); /* power down */
}
static void at91sam9m10g45ek_lcd_hw_init(void)
{
at91_set_A_periph(AT91_PIN_PE0, 0); /* LCDDPWR */
at91_set_A_periph(AT91_PIN_PE2, 0); /* LCDCC */
at91_set_A_periph(AT91_PIN_PE3, 0); /* LCDVSYNC */
at91_set_A_periph(AT91_PIN_PE4, 0); /* LCDHSYNC */
at91_set_A_periph(AT91_PIN_PE5, 0); /* LCDDOTCK */
at91_set_A_periph(AT91_PIN_PE7, 0); /* LCDD0 */
at91_set_A_periph(AT91_PIN_PE8, 0); /* LCDD1 */
at91_set_A_periph(AT91_PIN_PE9, 0); /* LCDD2 */
at91_set_A_periph(AT91_PIN_PE10, 0); /* LCDD3 */
at91_set_A_periph(AT91_PIN_PE11, 0); /* LCDD4 */
at91_set_A_periph(AT91_PIN_PE12, 0); /* LCDD5 */
at91_set_A_periph(AT91_PIN_PE13, 0); /* LCDD6 */
at91_set_A_periph(AT91_PIN_PE14, 0); /* LCDD7 */
at91_set_A_periph(AT91_PIN_PE15, 0); /* LCDD8 */
at91_set_A_periph(AT91_PIN_PE16, 0); /* LCDD9 */
at91_set_A_periph(AT91_PIN_PE17, 0); /* LCDD10 */
at91_set_A_periph(AT91_PIN_PE18, 0); /* LCDD11 */
at91_set_A_periph(AT91_PIN_PE19, 0); /* LCDD12 */
at91_set_B_periph(AT91_PIN_PE20, 0); /* LCDD13 */
at91_set_A_periph(AT91_PIN_PE21, 0); /* LCDD14 */
at91_set_A_periph(AT91_PIN_PE22, 0); /* LCDD15 */
at91_set_A_periph(AT91_PIN_PE23, 0); /* LCDD16 */
at91_set_A_periph(AT91_PIN_PE24, 0); /* LCDD17 */
at91_set_A_periph(AT91_PIN_PE25, 0); /* LCDD18 */
at91_set_A_periph(AT91_PIN_PE26, 0); /* LCDD19 */
at91_set_A_periph(AT91_PIN_PE27, 0); /* LCDD20 */
at91_set_B_periph(AT91_PIN_PE28, 0); /* LCDD21 */
at91_set_A_periph(AT91_PIN_PE29, 0); /* LCDD22 */
at91_set_A_periph(AT91_PIN_PE30, 0); /* LCDD23 */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_LCDC);
gd->fb_base = CONFIG_AT91SAM9G45_LCD_BASE;
}
#ifdef CONFIG_LCD_INFO
#include <nand.h>
#include <version.h>
void lcd_show_board_info(void)
{
ulong dram_size, nand_size;
int i;
char temp[32];
lcd_printf ("%s\n", U_BOOT_VERSION);
lcd_printf ("(C) 2008 ATMEL Corp\n");
lcd_printf ("at91support@atmel.com\n");
lcd_printf ("%s CPU at %s MHz\n",
AT91_CPU_NAME,
strmhz(temp, get_cpu_clk_rate()));
dram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++)
dram_size += gd->bd->bi_dram[i].size;
nand_size = 0;
for (i = 0; i < CONFIG_SYS_MAX_NAND_DEVICE; i++)
nand_size += nand_info[i].size;
lcd_printf (" %ld MB SDRAM, %ld MB NAND\n",
dram_size >> 20,
nand_size >> 20 );
}
#endif /* CONFIG_LCD_INFO */
#endif
int board_init(void)
{
/* Enable Ctrlc */
console_init_f();
/* arch number of AT91SAM9M10G45EK-Board */
#ifdef CONFIG_AT91SAM9M10G45EK
gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9M10G45EK;
#elif defined CONFIG_AT91SAM9G45EKES
gd->bd->bi_arch_number = MACH_TYPE_AT91SAM9G45EKES;
#endif
/* adress of boot parameters */
gd->bd->bi_boot_params = PHYS_SDRAM + 0x100;
at91_serial_hw_init();
#ifdef CONFIG_CMD_NAND
at91sam9m10g45ek_nand_hw_init();
#endif
#ifdef CONFIG_HAS_DATAFLASH
at91_spi0_hw_init(1 << 0);
#endif
#ifdef CONFIG_ATMEL_SPI
at91_spi0_hw_init(1 << 4);
#endif
#ifdef CONFIG_MACB
at91sam9m10g45ek_macb_hw_init();
#endif
#ifdef CONFIG_LCD
at91sam9m10g45ek_lcd_hw_init();
#endif
return 0;
}
int dram_init(void)
{
gd->bd->bi_dram[0].start = PHYS_SDRAM;
gd->bd->bi_dram[0].size = PHYS_SDRAM_SIZE;
return 0;
}
#ifdef CONFIG_RESET_PHY_R
void reset_phy(void)
{
#ifdef CONFIG_MACB
/*
* Initialize ethernet HW addr prior to starting Linux,
* needed for nfsroot
*/
eth_init(gd->bd);
#endif
}
#endif
int board_eth_init(bd_t *bis)
{
int rc = 0;
#ifdef CONFIG_MACB
rc = macb_eth_initialize(0, (void *)AT91SAM9G45_BASE_EMAC, 0x00);
#endif
return rc;
}
/* SPI chip select control */
#ifdef CONFIG_ATMEL_SPI
#include <spi.h>
int spi_cs_is_valid(unsigned int bus, unsigned int cs)
{
return bus == 0 && cs < 2;
}
void spi_cs_activate(struct spi_slave *slave)
{
switch(slave->cs) {
case 1:
at91_set_gpio_output(AT91_PIN_PB18, 0);
break;
case 0:
default:
at91_set_gpio_output(AT91_PIN_PB3, 0);
break;
}
}
void spi_cs_deactivate(struct spi_slave *slave)
{
switch(slave->cs) {
case 1:
at91_set_gpio_output(AT91_PIN_PB18, 1);
break;
case 0:
default:
at91_set_gpio_output(AT91_PIN_PB3, 1);
break;
}
}
#endif /* CONFIG_ATMEL_SPI */

View File

@@ -0,0 +1 @@
TEXT_BASE = 0x73f00000

View File

@@ -23,13 +23,19 @@
*/
#include <common.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91sam9g45.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
void at91_uhp_hw_init(void)
void coloured_LED_init(void)
{
/* Enable VBus on UHP ports */
at91_set_gpio_output(AT91_PIN_PA21, 0);
at91_set_gpio_output(AT91_PIN_PA24, 0);
/* Enable clock */
at91_sys_write(AT91_PMC_PCER, 1 << AT91SAM9G45_ID_PIODE);
at91_set_gpio_output(CONFIG_RED_LED, 1);
at91_set_gpio_output(CONFIG_GREEN_LED, 1);
at91_set_gpio_value(CONFIG_RED_LED, 0);
at91_set_gpio_value(CONFIG_GREEN_LED, 1);
}

View File

@@ -307,19 +307,19 @@ int barcobcd_boot_image (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD (
try_working, 1, 1, barcobcd_boot_image,
"check flash value and boot the appropriate image",
"\n"
""
);
U_BOOT_CMD (
boot_working, 1, 1, barcobcd_boot_image,
"check flash value and boot the appropriate image",
"\n"
""
);
U_BOOT_CMD (
boot_default, 1, 1, barcobcd_boot_image,
"check flash value and boot the appropriate image",
"\n"
""
);
/*
* We are not using serial communication, so just provide empty functions

View File

@@ -198,7 +198,7 @@ U_BOOT_CMD (dip, 1, 1, cmd_dip,
"\n"
" - prints the state of the dip switch and/or\n"
" external configuration inputs as hex value.\n"
" - \"Config 1\" is the LSB\n");
" - \"Config 1\" is the LSB");
/*
@@ -229,7 +229,7 @@ static int cmd_buz (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD (buz, 2, 1, cmd_buz,
"turns buzzer on/off",
"\n" "buz <on/off>\n" " - turns the buzzer on or off\n");
"\n" "buz <on/off>\n" " - turns the buzzer on or off");
#endif /* CONFIG_BC3450_BUZZER */
@@ -326,14 +326,14 @@ U_BOOT_CMD (fp, 3, 1, cmd_fp,
"\n"
"fp bl <on/off>\n"
" - turns the CCFL backlight of the display on/off\n"
"fp <on/off>\n" " - turns the whole display on/off\n"
"fp <on/off>\n" " - turns the whole display on/off"
#ifdef CONFIG_BC3450_CRT
"\n"
"fp crt <on/off>\n"
" - enables/disables the crt output (debug only)\n"
" - enables/disables the crt output (debug only)"
#endif /* CONFIG_BC3450_CRT */
);
/*
* temp - DS1620 thermometer
*/
@@ -524,7 +524,7 @@ static int cmd_temp (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD (temp, 3, 1, cmd_temp,
"print current temperature",
"\n" "temp\n" " - print current temperature\n");
"\n" "temp\n" " - print current temperature");
#ifdef CONFIG_BC3450_CAN
/*
@@ -818,10 +818,11 @@ int cmd_test (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
U_BOOT_CMD (test, 2, 1, cmd_test, "unit test routines", "\n"
#ifdef CONFIG_BC3450_CAN
"test can\n"
" - connect CAN1 (X8) with CAN2 (X9) for this test\n"
"test can\n"
" - connect CAN1 (X8) with CAN2 (X9) for this test\n"
#endif /* CONFIG_BC3450_CAN */
"test unit-off\n"
" - turns off the BC3450 unit\n"
" WARNING: Unsaved environment variables will be lost!\n");
"test unit-off\n"
" - turns off the BC3450 unit\n"
" WARNING: Unsaved environment variables will be lost!"
);
#endif

View File

@@ -1 +0,0 @@
/u-boot.lds

View File

@@ -35,12 +35,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

View File

@@ -26,7 +26,8 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
CFLAGS_lib_generic += -O2
CFLAGS_lzma += -O2
# Set some default LDR flags based on boot mode.
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

View File

@@ -1 +0,0 @@
/u-boot.lds

View File

@@ -36,12 +36,9 @@ SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS) $(obj)u-boot.lds
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
$(obj)u-boot.lds: u-boot.lds.S
$(CPP) $(CPPFLAGS) -D__ASSEMBLY__ -P $^ > $@
clean:
rm -f $(SOBJS) $(OBJS)

View File

@@ -26,7 +26,8 @@
# This is not actually used for Blackfin boards so do not change it
#TEXT_BASE = do-not-use-me
LDSCRIPT = $(obj)board/$(BOARDDIR)/u-boot.lds
CFLAGS_lib_generic += -O2
CFLAGS_lzma += -O2
# Set some default LDR flags based on boot mode.
LDR_FLAGS += $(LDR_FLAGS-$(CONFIG_BFIN_BOOT_MODE))

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