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1412 Commits

Author SHA1 Message Date
Wolfgang Denk
908614f20f Prepare v2010.12-rc1
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-27 22:49:13 +02:00
Wolfgang Denk
071bc92330 Coding Style cleanup
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-27 22:48:30 +02:00
Enric Balletbo i Serra
57ff9f2421 cmd_onenand.c: Fix command usage help.
Running the onenand command without arguments does nothing, with this
patch shows the command usage.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
2010-10-27 20:51:22 +02:00
Lei Wen
0158126e25 mmc: seperate block number into small parts for multi-write cmd
Constraint the mmc framework to only send no more than 65535
blocks in one go during the multi-write command. This constraint
comes due to the limitation of 16bit width block counter register
at some hardware.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Cc: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-10-27 20:39:33 +02:00
Wolfgang Denk
73bb4c7240 Merge branch 'master' of git://git.denx.de/u-boot-sparc 2010-10-27 20:37:33 +02:00
Stefano Babic
a3110f01c4 env_sf: updated to the new environment code
Functions to store/retrieve the environment from a SPI flash was not updated
to the new environment code. The non-redundant case was
not working correctly, reporting ""Environment SPI flash not initialized"
and the code was not compiled clean in the redundant case.

The patch fixes these issue and makes the code more coherent
with other environment storage (nand, flash).

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-27 20:30:23 +02:00
Wolfgang Denk
f0fee6a646 Makefile: fix dependencies for building NAND_SPL
Building of NAND based boards failed sometimes (especially on MP
systems) because of incorrect / missing dependencies.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
2010-10-27 20:18:34 +02:00
Wolfgang Denk
e4691f5ed1 make-asm-offsets: fix sed script
When copying the "sed" script to generate the asm-offsets.h file from
the Linux Kbuild script into the make-asm-offsets file I missed the
fact that the former runs in a "make" context and thus uses double
"$$" to escape a single "$", while the latter is a shell script, where
this must not be done.  Unfortunately the problem did not show up
during the initial tests on Power Architecture systems, but on ARM the
generated asm-offsets.h was not correct.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
2010-10-27 20:16:52 +02:00
Wolfgang Denk
f503d52a9e mcu25: fix out of tree building
Out of tree building of the Netstal mcu25 board failed like
that:

Configuring for mcu25 board...
Assembler messages: Fatal error: can't create /work/wd/tmp-ppc/board/netstal/mcu25/../common/fixed_sdram.o: No such file or directory
Assembler messages: Fatal error: can't create /work/wd/tmp-ppc/board/netstal/mcu25/../common/nm_bsp.o: No such file or directory

Adapt (and simplify) the Makefile.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Niklaus Giger <niklaus.giger@netstal.com>
2010-10-27 20:13:46 +02:00
Wolfgang Denk
ec5c04cdb5 Revert "cmd_net: drop spurious comma in U_BOOT_CMD"
This commit causes build errors like this:

cmd_net.c:301:1: error: macro "U_BOOT_CMD" requires 6 arguments, but only 5 given
cmd_net.c:298: warning: data definition has no type or storage class
cmd_net.c:298: warning: type defaults to 'int' in declaration of 'U_BOOT_CMD'

This reverts commit 8f4cb77ef7.
2010-10-27 20:13:46 +02:00
Wolfgang Denk
8343f8a764 post/drivers/i2c.c: fix compile error
Commit 7e263ce "post/i2c: Clean up detection logic" added a "const"
qualifier to the declaration of i2c_addr_list[], missing the fact that
the list gets modified later in the code, which results in build
errors like these:

i2c.c: In function 'i2c_post_test':
i2c.c:88: error: assignment of read-only location

Remove the incorrect "const".

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2010-10-27 20:09:59 +02:00
Wolfgang Denk
79e6313936 ARM: use the same branch insn on all architectures
For the "fixloop" implementation in start.S a number of different
instructions was used.  Unify code so all architectures use "blo"
here because it is more robust in case of incorrect alignments.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.aribaud@free.fr>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
2010-10-26 21:19:19 +02:00
Sughosh Ganu
f760d14acc Remove config.mk for da8xxevm based boards.
Move CONFIG_SYS_TEXT_BASE to the board's config file, and remove the
now unnecessary config.mk file.

Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
2010-10-26 21:17:24 +02:00
Heiko Schocher
1336cad298 arm, bootm: Fix compile warning
Fix warning:

bootm.c: In function 'bootm_linux_fdt':
bootm.c:181: warning: unused variable 's'
bootm.c:180: warning: unused variable 'bd'

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-10-26 21:15:35 +02:00
Mike Frysinger
8f4cb77ef7 cmd_net: drop spurious comma in U_BOOT_CMD
Building for boards that have CONFIG_CMD_CDP enabled fail with:
cmd_net.c:301: error: expected expression before ',' token

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-26 21:14:55 +02:00
Darius Augulis
ea34c9d6ed arm1176: fix relocation
Fix relocation code for arm1176, do it like other ARM
CPU's are doing.
Tested only with CONFIG_SKIP_RELOCATE_UBOOT defined
and using nand_spl (booting from nand). Test done on
s3c6410 based board (not yet supported in main line).

Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
2010-10-26 21:12:53 +02:00
Darius Augulis
123fb7deb2 ARM: fix address setup in start.S
Fix address setup bug for ARM.
This bug stops u-boot booting if
CONFIG_SKIP_RELOCATE_UBOOT is defined.

Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
2010-10-26 21:11:58 +02:00
Wolfgang Denk
25ddd1fb0a Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value
CONFIG_SYS_GBL_DATA_SIZE has always been just a bad workarond for not
being able to use "sizeof(struct global_data)" in assembler files.
Recent experience has shown that manual synchronization is not
reliable enough.  This patch renames CONFIG_SYS_GBL_DATA_SIZE into
GENERATED_GBL_DATA_SIZE which gets automatically generated by the
asm-offsets tool.  In the result, all definitions of this value can be
deleted from the board config files.  We have to make sure that all
files that reference such data include the new <asm-offsets.h> file.

No other changes have been done yet, but it is obvious that similar
changes / simplifications can be done for other, related macro
definitions as well.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-26 21:05:30 +02:00
Wolfgang Denk
16a354f920 include/asm-offsets.h: automatically generate assembler constants
A recurrent issue is that certain C level constructs like sizeof() or
offsetof() cannot be used in assembler files, which is inconvenient
when such constructs are used in the definition of macro names etc.

To avoid duplication of such definitions (and thus another cause of
problems), we adapt the Linux way to automatically generate the
respective definitions from the respective C header files.

In Linux, this is implemented in include/linux/kbuild.h, Kbuild, and
arch/*/kernel/asm-offsets.c; we adapt the code from the Linux v2.6.36
kernel tree.

We also copy the concept of the include/generated/ directory which can
be used to hold other automatically generated files as well.

We start with an architecture-independent lib/asm-offsets.c which
generates include/generated/generic-asm-offsets.h (included by
include/asm-offsets.h, which is what will be referred to in the actual
source code).  Later this may be extended by architecture-specific
arch/*/lib/asm-offsets.c files that will generate a
include/generated/asm-offsets.h.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-26 21:04:34 +02:00
Wolfgang Denk
553f09823c Rename CONFIG_SYS_INIT_RAM_END into CONFIG_SYS_INIT_RAM_SIZE
CONFIG_SYS_INIT_RAM_END was a misnomer as it suggests this might be
some end address; to make the meaning more clear we rename it into
CONFIG_SYS_INIT_RAM_SIZE

No other code changes are performed in this patch, only minor editing
of white space (due to the changed length) and the comments was done,
where noticed.

Note that the code for the PATI and cmi_mpc5xx board configurations
looks seriously broken.  Last known maintainers on Cc:

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Denis Peter <d.peter@mpl.ch>
Cc: Martin Winistoerfer <martinwinistoerfer@gmx.ch>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-26 21:03:25 +02:00
Wolfgang Denk
9685951464 Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2010-10-26 20:58:49 +02:00
Wolfgang Denk
7ad1a5f69d Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2010-10-26 20:57:41 +02:00
Wolfgang Denk
90d8cff099 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2010-10-26 20:55:39 +02:00
Gray Remlin
8c0c2b9050 ARM: Use consistent assembler syntax
Signed-off-by: Gray Remlin <g_remlin@rocketmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
2010-10-26 20:52:23 +02:00
Mike Frysinger
58d7570cd3 Blackfin: adi boards: set compiled size limits
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-25 22:07:18 -04:00
Mike Frysinger
36cf8cb456 Blackfin: bf527-ezkit-v2: move to boards.cfg
Now that the boards.cfg file supports options to mkconfig, we can move
the bf527-ezkit-v2 target out of the Makefile and into boards.cfg.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-25 22:07:18 -04:00
Dirk Eibach
a605ea7e83 ppc4xx: Add Io and IoCon 405EP board support
Board support for the Guntermann & Drunck CATCenter Io.
Board support for the Guntermann & Drunck IoCon.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-25 17:07:46 +02:00
Wolfgang Denk
c163f4478c Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master 2010-10-25 08:06:52 +02:00
Steve Sakoman
4df6689495 ARMV7: OMAP: I2C driver: Fix bug found in 37XX testing
On OMAP36/37XX the standard on chip pullups are not sufficient to
ensure proper i2c operation without external pullups or switching
to high speed mode and enabling special on chip pullups.

This is an issue for Beagle xM, which does not have external pullups
on the expansion board i2c lines.

The issue manifests itself as an AL (arbitration lost) error when
probing for a non-existent device (i.e. on a Beagle xM with no expansion
boards attached).  This issue does not occur on expansion boards that
include pullups or on Overo 37XX COM's since they include pull-ups.

This patch fixes the issue by checking for the AL bit in the i2c_probe
function.

Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
2010-10-25 07:57:20 +02:00
Wolfgang Denk
1339657abd hcu4, hcu5: fix out of tree building
Out of tree building of the Netstal hcu4 and hcu5 boards failed like
that:

Assembler messages:
Fatal error: can't create /work/wd/tmp-ppc/board/netstal/hcu4/../common/fixed_sdram.o: No such file or directory
Assembler messages:
Fatal error: can't create /work/wd/tmp-ppc/board/netstal/hcu4/../common/nm_bsp.o: No such file or directory
make[1]: *** [/work/wd/tmp-ppc/board/netstal/hcu4/../common/fixed_sdram.o] Error 2

Adapt (and simplify) the respective Makefiles.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Niklaus Giger <niklaus.giger@netstal.com>
2010-10-24 16:49:12 +02:00
Wolfgang Denk
1db3fca719 MPC8315ERD: fix build error
Commit 29c6fbe "MPC5121: Add USB EHCI support" renamed
CONFIG_SYS_MPC8xxx_USB_ADDR into CONFIG_SYS_FSL_USB_ADDR but missed
to update arch/powerpc/cpu/mpc83xx/cpu_init.c, resulting in:

cpu_init.c: In function 'cpu_init_f':
cpu_init.c:332: error: 'CONFIG_SYS_MPC8xxx_USB_ADDR' undeclared (first use in this function)
cpu_init.c:332: error: (Each undeclared identifier is reported only once
cpu_init.c:332: error: for each function it appears in.)
make[1]: *** [/work/wd/tmp-ppc/arch/powerpc/cpu/mpc83xx/cpu_init.o] Error 1

Fix this.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
2010-10-24 16:13:40 +02:00
Wolfgang Denk
26fe3d2b8f VoVPN-GW_100MHz: drop unsupported board configuration
The 100MHz configuation of the VoVPN-GW has never been supported, so
drop it now.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-24 15:46:08 +02:00
Wolfgang Denk
bc5e1701f3 lite5200b_PM: fix compile warning
Fix warning:

icecube.c: In function 'lite5200b_wakeup':
icecube.c:83: warning: format '%08lx' expects type 'long unsigned int', but argument 2 has type 'void (*)(void)'

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-24 15:37:12 +02:00
Mike Frysinger
6d79c39958 MAKEALL: drop non-existent i386 config 2010-10-23 22:58:07 +02:00
Enric Balletbo i Serra
cdb1d4f97e ARM: fix relocation support for onenand device.
We also have to relocate the onenand command table manually, otherwise
onenand command don't work.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
2010-10-23 22:55:47 +02:00
Andre Schwarz
116ef54d68 MVBLM7: make TSEC2 work again.
SICRH has been misconfigured, i.e. TSEC2 clock + D[0:3] are GPIOs.
Fix this to be RGMII signals again.

Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
2010-10-23 22:12:16 +02:00
Kumar Gala
c4b115f536 hwconfig: Utilize getenv_f before relocation to allow for larger buffer
Since we use hwconfig in cases before relocation (like getting DDR
params on FSL PPC systems), we can have strings that exceed the early
small (32 byte) buffer size that getenv will handle.

So we explicitly allocate our own buffer on the stack and use if to
handle getting the hwconfig env string.  We currently utilize a string
length of 128 bytes.

This allows us to get rid of boot messages like:

env_buf too small [32]

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-23 22:10:54 +02:00
Peter Tyser
3f7ffa440a env_flash: Disable debug print statements
With debug the follow is printed:
  => saveenv
  Saving Environment to Flash...
  Data to save 0x18000
  Data (start 0xfff48000, len 0x18000) saved at 0x7fe63f20
  Protect off FFF40000 ... FFF5FFFF
  Un-Protected 1 sectors
  Erasing Flash...
  . done
  Erased 1 sectors
  Writing to Flash... Restoring the rest of data to 0xfff48000 len 0x18000
  done
  Protected 1 sectors
  =>

Without debug:
  => saveenv
  Saving Environment to Flash...
  Un-Protected 1 sectors
  Erasing Flash...
  . done
  Erased 1 sectors
  Writing to Flash... done
  Protected 1 sectors
  =>

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-10-23 22:10:14 +02:00
Wolfgang Denk
02cf8fd6fb Merge branch 'for-wd-master' of git://git.denx.de/u-boot-pxa 2010-10-23 22:08:33 +02:00
Wolfgang Denk
f2b382ea06 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2010-10-23 21:59:42 +02:00
Wolfgang Denk
33a08c10c7 Merge branch 'master' of git://git.denx.de/u-boot-video 2010-10-23 21:56:51 +02:00
Wolfgang Denk
b4039a5415 Merge branch 'master' of git://git.denx.de/u-boot-usb 2010-10-23 21:49:28 +02:00
Wolfgang Denk
678150f155 Merge branch 'master' of git://git.denx.de/u-boot-sh 2010-10-23 21:45:57 +02:00
Ilya Yanok
e36aff6822 a4m072: add CONFIG_SYS_FLASH_BANKS_SIZES define
This patch adds CONFIG_SYS_FLASH_BANKS_SIZES define to make use of new
cfi_flash driver ability to detect flash chips that are bigger than a
corresponding address window (we have such situation on some revs of
a4m072).

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2010-10-23 21:05:08 +02:00
Ilya Yanok
ec50a8e389 cfi_flash: handle 'chip size exceeds address window' situation
On some boards we have flash mapped high in the address space with
considerably small window (say 0xFE000000 and 32MB). When we install
bigger chip (say 64MB) on such a board strange things happen
(flash_write() doesn't work at all, for ex). That's because cfi_flash
driver doesn't care about window size at all.
Of course, cleanest solution would probably be to just extend address
window to be able to map the whole flash but for legacy/compatibility
reasons some people prefer just truncate the flash size and never use
the upper part.
This patch adds an option for cfi_flash driver to handle this situation
properly. To achieve this we add the new function cfi_flash_bank_size()
which can be provided by the board code and weak-aliased to default
implementation that returns value from the CONFIG_SYS_FLASH_BANKS_SIZES
array if it's defined or 0 otherwise (the last case is added for
compatibility).
If non-zero flash bank size is provided and detected chip size is bigger
than provided address window size the warning will be displayed and
flash chip will be truncated.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>

Changed cfi_flash_bank_size() return type to unsigned long
to match caller function.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-23 21:04:49 +02:00
Wolfgang Denk
09c83a45b7 ehci-hcd.c: fix hanging under higher load
This patch solves a problem with USB hanging under higher load on a
i.MX31 board.  It falls into class of typical USB problems and fixes:
if you don't understand the real cause, add a delay somewhere.

The problem appeared after introduction of ELF relocation, which
results in smaller code, which appears to run faster (probably because
it fits better in the cache); turning off the instruction cache,
adding debug printf()s and increasing the delay have all been found to
make the problem go away.

Moving the original "udelay(1)" up in the code to it's new place made
the problem appear much less frequently. Increasing the delay to 2
microseconds then made the code run reliably in all (hour-long) tests.
To be on the safe side, we set it to 5 microseconds here.

Signed-off-by: Heiko schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
2010-10-22 21:44:37 +02:00
Mike Frysinger
2ff1228542 usb_storage: constify us_direction lookup table
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-22 21:41:46 +02:00
Mike Frysinger
0228348e9c usb: musb: constify a bit
These ep and root hub structures need not be writable.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-22 21:41:46 +02:00
Wolfgang Denk
8b675fe18e USB: fix Queue Element Transfer Descriptor changes
Commit 3ed1607 "USB: sync Queue Element Transfer Descriptor against
EHCI spec" added an "__attribute__ ((aligned (32)))" to the
declaration of struct qTD, as used for example in the Linux kernel as
well.

However, it turns out that this attribute causes errors in "usb start"
(like "ERROR: NOT USB_CONFIG_DESC 7b" and similar). Drop the attribute
again.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Dan Lykowski <lykowdk@gmail.com>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
2010-10-22 21:41:45 +02:00
Florian Fainelli
af68c06670 ehci-pci: print hccr, hcor and hc_lenght
It is useful to know the EHCI-PCI hccr, hcor and hc_lenght to make sure it was
successfully registered, and at the correct location.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2010-10-22 21:41:45 +02:00
Wolfgang Denk
9038e0e702 ehci-hcd.c: fix hanging under higher load
This patch solves a problem with USB hanging under higher load on a
i.MX31 board.  It falls into class of typical USB problems and fixes:
if you don't understand the real cause, add a delay somewhere.

The problem appeared after introduction of ELF relocation, which
results in smaller code, which appears to run faster (probably because
it fits better in the cache); turning off the instruction cache,
adding debug printf()s and increasing the delay have all been found to
make the problem go away.

Moving the original "udelay(1)" up in the code to it's new place made
the problem appear much less frequently. Increasing the delay to 2
microseconds then made the code run reliably in all (hour-long) tests.
To be on the safe side, we set it to 5 microseconds here.

Signed-off-by: Heiko schocher <hs@denx.de>
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Stefano Babic <sbabic@denx.de>
2010-10-22 14:21:56 +02:00
Magnus Sjalander
997faf2edf SPARC: added unaligned definitions
Signed-off-by: Daniel Hellstrom <daniel@gaisler.com>
2010-10-22 11:10:18 +02:00
John Schmoller
bfe18815e8 XPedite5500 board support
Initial support for Extreme Engineering Solutions XPedite5500 -
a P2020-based PMC/XMC single board computer.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 03:04:41 -05:00
Peter Tyser
66a8b440af xes: Add POST support for 8xxx boards
Add memory and I2C posts to the XPedite517x/520x/537x board families.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 03:04:37 -05:00
Peter Tyser
65f23519d6 mpc86xx: Add generic POST word read/write support
The PIC's TFRR register doesn't affect hardware and is generally unused,
so use as storage for the POST word.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 03:04:34 -05:00
Peter Tyser
9d921f19b3 post/i2c: Add ability to ignore I2C devices
Add the ability to not report an I2C POST error for a set of given I2C
addresses on bootup.  This is useful for cases when a device may or may
not be present, and neither case is considered an error.  For example:

- Some form factors such as XMC and Compact PCI Express have an I2C
  EEPROM whose address changes based on geographical address.  Eg
  installed in one slot its EEPROM address is, 0x50, in another its
  0x51, etc.  This allows multiple devices to have their EEPROMs present
  on the same I2C bus.  Thus the I2C devices present for an XMC or
  CPCIe card depend on if and where other cards are installed in the
  same system.

- Some cards have optional I2C devices.  Eg one hardware build
  configuration has different I2C devices than another and software
  can't determine if the optional device should be present or not.

- Some cards have optional daughtercards with I2C devices on them.

- I2C EEPROMs address range depends on their size.  Its possible to
  support differently size EEPROMs by only probing the EEPROM's base
  address and ignoring the other addresses that are impacted by its
  size.

A new CONFIG_SYS_POST_I2C_IGNORES define has been added which specifies
a list of I2C addresses for the I2C POST to ignore.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 02:19:14 -05:00
Peter Tyser
60aaaa0782 post/i2c: Rename I2C_ADDR_LIST to CONFIG_SYS_POST_I2C_ADDRS
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 02:19:00 -05:00
Peter Tyser
9f949c9ac2 post/i2c: Don't probe address 0
According to the I2C specification device address 0 is the "general call
address", ie a broadcast address.  The I2C specification states that the
format of a general call uses at least 2 bytes, which U-Boot's probing
routine does not adhere to.

Not probing device address 0 will prevent possible issues with devices
that accept general calls.  Additionally, this change shouldn't reduce
POST coverage since each I2C device should still be accessed via its
own, unique address.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 02:18:42 -05:00
Peter Tyser
7e263cea88 post/i2c: Clean up detection logic
The logic previously used in the I2C post was a bit convoluted.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 02:18:36 -05:00
Peter Tyser
b9b1bc8542 post/i2c: General clean up
- Clean up ifdeffery
- Update coding style

No functional change should have occurred.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Heiko Schocher <hs@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 02:18:30 -05:00
Peter Tyser
c00ac259f6 xes: Make X-ES board names more generic
Some U-Boot images for X-ES boards support multiple products in the same
family.  For example, the XPedite5370, XPedite5371, and XPedite5372 are
similar enough that one U-Boot image can work on all 3 cards.  To make it
clear that a U-Boot image can work on boards of the same family, rename
the boards with the least significant digit of 'x'.

While we're at it, change the board config file and make targets to be
lowercase.

Also change the default uImage and fdt filenames to "board.uImage" and
"board.dtb" to be more generic.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 02:17:23 -05:00
John Schmoller
72fb68d53c xes: Add board_flash_wp_on()
Add board_flash_wp_on() to check a pca9557 gpio pin to see
if non-volatile memory write protection is enabled.

Previously, write protected NOR flashes would fail initialization which
resulted in a bootup error such as:

 ...
 DTT:   53 C local / 64 C remote (adt7461@4c)
 DTT:   54 C local (ds1621@48)
 FLASH: Executed from FLASH1
 POST memory PASSED
 FLASH: ## Unknown FLASH on Bank 1 - Size = 0x00000000 = 0 MB
 ## Unknown FLASH on Bank 2 - Size = 0x00000000 = 0 MB
 *** failed ***
 ### ERROR ### Please RESET the board ###

With this patch, NOR flash initialization is skipped:

 ...
 DTT:   53 C local / 64 C remote (adt7461@4c)
 DTT:   54 C local (ds1621@48)
 FLASH: Executed from FLASH1
 POST memory PASSED
 FLASH: Uninitialized - Write Protect On
 L2:    1024 KB enabled
 NAND:  1024 MiB
 ...

Note that flash related commands such as flinfo and saveenv will error
out when flash write protection is enabled.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 02:17:19 -05:00
John Schmoller
92af6549b8 xes: Consolidate checkboard()
Create a common checkboard() function to support all X-ES's Freescale
boards.

Also, add a get_board_derivative() function which reads hardware
strapping resistors to determine what model a board is.  This allows one
U-Boot image to support multiple boards.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 02:17:16 -05:00
John Schmoller
96d6160324 pci: Add ability to re-enumerate PCI buses
Add a new 'pci enum' command which re-enumerates the PCI buses.  This
command is enabled via the CONFIG_CMD_PCI_ENUM define and can be useful
in boards with FPGAs connected via PCI/PCIe, boards that support PCI
hot-plugging, or during PCI debug.

Also enable the 'pci enum' command for X-ES's Freescale-based boards.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2010-10-22 02:17:12 -05:00
Peter Tyser
9660c5de74 xes: Use common PCI initialization code
Common Freescale code for PCI initialization now exists, so migrate X-ES
boards to use it.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 02:17:02 -05:00
Kumar Gala
4c66447ae7 corenet_ds: Update CONFIG_SYS_GBL_DATA_SIZE to deal with growth in gd_t
The recent change the env code added an additional 32 bytes into gd_t
and that causes to grow pass the previous CONFIG_SYS_GBL_DATA_SIZE size.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-22 02:14:54 -05:00
Marek Vasut
4262a7c934 PXA: Remove "xsengine" board
This board is broken and it's not possible to repair it.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:38:01 +02:00
Marek Vasut
736947847d PXA: Remove "wepep250" board
This board is broken and impossible to repair without deep knowledge or
availability of the hardware.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:38:01 +02:00
Marek Vasut
75e203584a PXA: Remove "delta" board
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:38:01 +02:00
Marek Vasut
9b3d167fde PXA: zipitz2: Add missing CONFIG_SYS_TEXT_BASE
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:38:01 +02:00
Marek Vasut
06491b87de PXA: vpac270: Add missing CONFIG_SYS_TEXT_BASE
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:38:01 +02:00
Marek Vasut
6a880e3965 PXA: xm250: Fix for reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:38:00 +02:00
Marek Vasut
1123d4122d PXA: xaeniax: Fix for reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:38:00 +02:00
Marek Vasut
cc72ac660d PXA: trizepsiv: Fix for reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:38:00 +02:00
Marek Vasut
65bd6a9099 PXA: pxa255_idp: Fix for reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:38:00 +02:00
Marek Vasut
08eb21ee32 PXA: pleb2: Fix for reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:38:00 +02:00
Marek Vasut
0f7c54fba9 PXA: palmtc: Fix for reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:38:00 +02:00
Marek Vasut
d2942ee5e3 PXA: palmld: Fix for reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:37:59 +02:00
Marek Vasut
3c43ca2ae2 PXA: lubbock: Fix for reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:37:59 +02:00
Marek Vasut
df1ac0ec54 PXA: innokom: Fix for reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:37:59 +02:00
Marek Vasut
38f8eb33a0 PXA: csb226: Fix for reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:37:59 +02:00
Marek Vasut
eb0e11bd2a PXA: cradle: Fix for reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:37:59 +02:00
Marek Vasut
d94bbbeb16 PXA: colibri_pxa270: Fix for reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:37:59 +02:00
Marek Vasut
caeb8c0ac2 PXA: cerf250: Fix for reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:37:58 +02:00
Marek Vasut
4abf2f7a23 PXA: Use pxa-regs.h register definitions in start.S
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:37:58 +02:00
Marek Vasut
6e96cf9a81 PXA: Implement ELF relocation
Based on patch by: Albert Aribaud <albert.aribaud@free.fr>

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-22 01:37:58 +02:00
Stefano Babic
a0152c4ba1 MX51: Add video support to vision2 board
The patch adds support for LCD to the vision2 board.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-22 00:05:05 +02:00
Stefano Babic
5dda7945d1 MX51: Add video support
Add framebuffer driver for the MX51 processor
working on the IPUv3 internal graphic processor.
The port is based on the driver found in the kernel
delivered by Freescale as part of i.MX BSP:

[kernel 2.6.31 commit cc4fe714041805997b601fe8e5dd585d8a99297f]

[agust@denx.de: some style fixes and dead code removal]
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-10-22 00:05:05 +02:00
Stefano Babic
575001e40c MX51: Add IPU driver for video support
The patch is a porting of the IPU Linux driver
developed by Freescale to have framebuffer
functionalities in u-boot. The port is based on
kernel 2.6.31 commit cc4fe714041805997b601fe8e5dd585d8a99297f,
as delivered by Freescale [i.MX BSP].
Most features are dropped from the original driver and
only LCD support is the goal of this porting.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-22 00:05:05 +02:00
Stefano Babic
bf90ecd3c3 Add linux framebuffer header include/linux/fb.h
[port of linux 2.6.34 commit 6a9ee8af344e3bd7dbd61e67037096cdf7f83289]

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-22 00:05:05 +02:00
Ilya Yanok
e03e4b7312 led_display: remove unused DISPLAY_MARK define
DISPLAY_MARK subcommand of display_set() is not used anywhere so
we can remove it safely.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2010-10-21 22:25:04 +02:00
Ilya Yanok
8f54dd4f13 a4m072: change 'display' command implementation
This patch changes implementation of 'display' command for a4m072
that uses 7-segment LED display as customer requested:

a) The "display" command shall _not_ turn on the decimal point.

b) Exception: "display ." shall turn on (only) the decimal point.

c) Hex digits (0-9, A-F, a-f) shall be displayed as usual.

d) Letters U, P, Y, L, S, T, H shall be displayed as usual (lower
   case letters identical to upper case letters)

e) 'I' (and 'i') shall be displayed like '1'

f) 'O' (and 'o') shall be displayed like '0'

g) all other Characters shall be displayed like ' ' (all segments off).

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2010-10-21 22:16:31 +02:00
Ilya Yanok
7ae549926a a4m072: changes to the default environment
The default values for 'addip' and 'norargs' changed per customer
request. Everything else cleaned up to fit into 80 symbol line.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2010-10-21 22:15:14 +02:00
Anatolij Gustschin
fff6ec382c Fix building for 83xx boards with USB support
Commit 29c6fbe047 broke
building for 83xx boards with USB support:

ehci-fsl.c: In function 'ehci_hcd_init':
ehci-fsl.c:43: error: 'CONFIG_SYS_FSL_USB_ADDR' undeclared (first use in this function)
ehci-fsl.c:43: error: (Each undeclared identifier is reported only once
ehci-fsl.c:43: error: for each function it appears in.)
make[1]: *** [ehci-fsl.o] Error 1

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-10-21 20:00:41 +02:00
Nobuhiro Iwamatsu
03626be3f4 sh: sh4: Move to boards.cfg
Move the sh4 target boards out of the Makefile and into boards.cfg.
And fix sh4 of MAKEALL.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2010-10-21 10:42:24 +09:00
Nobuhiro Iwamatsu
3771c69d78 sh: sh3: Move to boards.cfg
Move the sh3 target boards out of the Makefile and into boards.cfg.
And fix sh3 of MAKEALL.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2010-10-21 10:42:24 +09:00
Nobuhiro Iwamatsu
e0f0e527f8 sh: rsk7203: Move to boards.cfg
Move the rsk7203 target out of the Makefile and into boards.cfg.
And fix sh2 of MAKEALL.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2010-10-21 10:42:24 +09:00
Nobuhiro Iwamatsu
41f2747b9a sh: sh7785lcr: Add CONFIG_SYS_TEXT_BASE for 32bit mode
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2010-10-21 10:42:23 +09:00
Nobuhiro Iwamatsu
de03f8bc4a sh: Fix warning about uninitialized value of ramdisk_flags
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2010-10-21 10:42:23 +09:00
Nobuhiro Iwamatsu
006442b352 sh: Rename TEXT_BASE to CONFIG_SYS_TEXT_BASE
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2010-10-21 10:42:23 +09:00
Nobuhiro Iwamatsu
915d6b7d2b sh: sh7785lcr: Add CONFIG_SH_SDRAM_OFFSET
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2010-10-21 10:42:23 +09:00
Nobuhiro Iwamatsu
cf2c87d322 sh: Add support load and boot of Initrd.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2010-10-21 10:42:23 +09:00
John Schmoller
c62491d260 ppc: Don't initialize write protected NOR flashes
If a NOR flash is write protected it can not be initialized/detected so
add the ability for boards to skip NOR initialization on bootup.  A
board can skip NOR initialization by implementing the
board_flash_wp_on() function.

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
CC: sr@denx.de
Acked-by: Stefan Roese <sr@denx.de>
2010-10-20 21:58:16 +02:00
Wolfgang Denk
7a8ddeea5e MPC52xx, motionpro: update default configuration
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-20 21:54:31 +02:00
Macpaul Lin
0284816e98 ftrtc010.c : enhance code according to original datasheet
Add missing codes according to original datasheet.
This patch also makes ftrtc010 could be adapted to PCLK and EXT_CLK.

Signed-off-by: Macpaul Lin <macpaul@andestech.com>
2010-10-20 21:46:30 +02:00
Wolfgang Denk
b76335178e Merge branch 'master' of git://git.denx.de/u-boot-i2c 2010-10-20 21:23:22 +02:00
Wolfgang Denk
d9d47d18e8 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2010-10-20 21:20:24 +02:00
Steve Sakoman
fbad355562 ARMV7: OMAP: I2C driver: Restructure i2c_probe function
This patch removes the "magic number" delays and instead
monitors state changes in the status register bits.

Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
Tested-by: Heiko Schocher <hs@denx.de>
2010-10-20 15:28:48 +02:00
Steve Sakoman
d480c46773 ARMV7: OMAP: I2C driver: Restructure i2c_write_byte function
This patch removes the "magic number" delays and instead
monitors state changes in the status register bits.

Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
Tested-by: Heiko Schocher <hs@denx.de>
2010-10-20 15:28:41 +02:00
Steve Sakoman
da0cc665bc ARMV7: OMAP: I2C driver: Restructure i2c_read_byte function
This patch removes the "magic number" delays and instead
monitors state changes in the status register bits.

Signed-off-by: Steve Sakoman <steve.sakomanlinaro.org>
Tested-by: Heiko Schocher <hs@denx.de>
2010-10-20 15:28:37 +02:00
Steve Sakoman
73e8747fe4 ARMV7: OMAP: I2C driver: Use same timeout value as linux kernel driver
This patch matches the poll interval (1 millisecond) and timeout (1 second)
used in the linux driver. It also adds a return value of 0 in the event of
a timeout error and cleans up some formatting errors in that section of the
code.

Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
Tested-by: Heiko Schocher <hs@denx.de>
2010-10-20 15:28:33 +02:00
Stefan Roese
acfbbb90b2 ppc4xx: Fix default environment for AMCC boards
Commit 0ad7f0950a [ppc4xx: cleanup
default environment for AMCC boards] broke the default env for
many PPC4xx boards. The '\0' character got removed at the end
of some environment commands like "update". This patch adds the
missing '\0' characters again.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-20 10:08:56 +02:00
Stefan Roese
4adcbdc6be ppc4xx: Enable NOR flash support in sequoia_ramboot target
Until now, the Sequoia RAM-booting image disabled NOR flash support
as this image was mainly created for NAND-only boards. This patch
now enables NOR flash support for this RAM-booting version as well.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-20 10:08:16 +02:00
Stefan Roese
834a45d7ee ppc4xx/POST: Add board specific UART POST test to lwmon5
Add CONFIG_POST_UART to implement a board specific UART POST test.
This is done since lwmon5 needs to set POST_ALWAYS to run this
test on each reboot. And we don't want to change the default
behavious of this this.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-20 10:08:08 +02:00
Stefan Roese
f472069fb7 ppc4xx: Change tsr/tcr macros to upper case
Remove uneccessary functions to access the TCR/TSR registers as well.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-20 10:07:55 +02:00
Kumar Gala
0ef911934f Fix compile warning in uli526x driver
uli526x.c: In function 'uli526x_init_one':
uli526x.c:314:2: warning: dereferencing type-punned pointer will break strict-aliasing rules
uli526x.c:314:2: warning: dereferencing type-punned pointer will break strict-aliasing rules

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:41 -05:00
Peter Tyser
fbe53f59bd 85xx: Use gc-sections to reduce image size
On an XPedite5370 over 11KBytes were saved:
  Before:
       text	   data	    bss	    dec	    hex	filename
   332456	  33364	  33476	 399296	  617c0	./u-boot

  After:
      text	   data	    bss	    dec	    hex	filename
   321075	  33836	  33476	 388387	  5ed23	./u-boot

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:41 -05:00
Peter Tyser
68337fb5f6 86xx: Use gc-sections to reduce image size
On an XPedite5170 over 11KBytes were saved:
  Before:
     text	   data	    bss	    dec	    hex	filename
   319488	  28700	  33204	 381392	  5d1d0	./u-boot

  After:
     text	   data	    bss	    dec	    hex	filename
   307663	  29144	  33204	 370011	  5a55b	./u-boot

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:41 -05:00
Kumar Gala
bd9715e3db 86xx: Create common linker script
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:41 -05:00
Peter Tyser
d333819479 mpc8640: Update the io_sel fields for PCI Express
Previously io_sel=0xe incorrect stated PCIE1 was enabled.  Also add
support for the mpc8640's PCIE2 interface.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:40 -05:00
Peter Tyser
06412756e7 tqm85xx: Update PCI code
Update to use the recent, common FSL PCI initialization code.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
CC: sr@denx.de
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:40 -05:00
Peter Tyser
4e339b83e9 sbc8641d: Update PCI code
Update to use the recent, common FSL PCI initialization code.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
CC: joe.hamman@embeddedspecialties.com
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:40 -05:00
Peter Tyser
9a268e4b7c mpc8641hpcn: Update PCI code
Update to use the recent, common FSL PCI initialization code.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:40 -05:00
Aaron Sierra
9d64c6bb4a 85xx: Add support for not releasing secondary cores via 'mp_holdoff'
Some OSes require that secondary cores not be initialized when they
are booted (eg VxWorks).  By default when U-Boot is compiled with the
CONFIG_MP option all secondary cores are brought out of reset and held
in spinloops.  Setting the "mp_holdoff" environment variable to 'yes'
or '1' will cause U-Boot to leave secondary cores in their default
state.

Signed-off-by: Aaron Sierra <asierra@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:40 -05:00
York Sun
58edbc9caa Disable unused chip-select for DDR controller interleaving
When DDR controller interleaving is eabled and less than all bank (chip-select)
interleaving is seletected, the unused chip-select should be disabled.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:40 -05:00
York Sun
28a966715b Adding fixed sdram setting for cornet_ds board
800, 900, 1000, 1200MT/s data rate parameters are added for fixed sdram
setting. SPD based parameters and fixed parameters can be toggled by hwconfig.
To use fixed parameters,

hwconfig=fsl_ddr:sdram=fixed

To use SPD parameters,

hwconfig=fsl_ddr:ctlr_intlv=cacheline,bank_intlv=cs0_cs1

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:39 -05:00
York Sun
84bc00300f Enable POST memory test for P2020DS
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:39 -05:00
York Sun
4672e1ea2d Enable POST memory test for corenet_ds
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:39 -05:00
York Sun
8790ac0399 Setup POST word for generic mpc85xx
Using PIC TFRR register for post word load/store for generic MPC85xx.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:38:07 -05:00
York Sun
ebbe11dd36 Add memory test feature for mpc85xx POST.
The memory test is performed after DDR initialization when U-boot stills runs
in flash and cache. On recent mpc85xx platforms, the total memory can be more
than 2GB. To cover whole memory, it needs be mapped 2GB at a time using a
sliding TLB window. After the testing, DDR is remapped with up to 2GB memory
from the lowest address as normal.

If memory test fails, DDR DIMM SPD and DDR controller registers are dumped for
further debugging.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:28:00 -05:00
York Sun
c02ce6e5a1 Adding more control to physical address mapping
A worker function setup_ddr_tlbs_phys() is introduced to implement more
control on physical address mapping.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:28:00 -05:00
Timur Tabi
43b08af53e always relocate fdt into an lmb-allocated memory block
The device tree (fdt) must always exist in within the bootmap (usually the
first 16MB of RAM).  If it doesn't, then boot_relocate_fdt() will allocate
an LMB region in the bootmap and copy the fdt into that region.  It will
also increase the size of the fdt.

If the fdt is already in the bootmap, then previously the memory was just
reserved.  There was no contingency if the reservation failed, however.

By always allocating an lmb region and copying/resizing the fdt into that
region, the code is simplified and the memory region is always allocated
properly.

Also change the types of some variables to avoid some typecasts.

Signed-off-by: Timur Tabi <timur@freescale.com>
Tested-by: Ira Snyder <iws@ovro.caltech.edu>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:28:00 -05:00
Kumar Gala
a1964ea5c2 powerpc/8xxx: Add fdt_fixup_phy_connection helper
Add a common helper that will set the PHY connection type based on enum.
We use this on eTSEC, UCC, and will with Fman in the future.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:27:18 -05:00
Kumar Gala
f8c42495e0 powerpc/fsl: Introduce common enum for PHY types
Have a common enum for phy types that we use in the UCC driver.  We will
also use this enum for dealing with phy connection fixup in the device
tree.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-20 02:27:18 -05:00
Stefano Babic
11c8dd36ed FAT: buffer overflow with FAT12/16
Last commit 3831530dcb was intended
"explicitly specify FAT12/16 root directory parsing buffer size, instead
of relying on cluster size". Howver, the underlying function requires
the size of the buffer in blocks, not in bytes, and instead of passing
a double sector size a request for 1024 blocks is sent. This generates
a buffer overflow with overwriting of other structure (in the case seen,
USB structures were overwritten).

Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Mikhail Zolotaryov <lebon@lebon.org.ua>
2010-10-20 09:14:38 +02:00
Wolfgang Denk
70994c79ca common/fdt_support.c: Fix compile warnings
Commit a6bd9e8 "FDT: Add fixup support for multiple banks of memory"
removed code but forgot to remove the variables used by it, resulting
in warnings:

fdt_support.c: In function 'fdt_fixup_memory_banks':
fdt_support.c:399: warning: unused variable 'sizecell'
fdt_support.c:399: warning: unused variable 'addrcell'

Remove the declarations, too.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-20 08:59:16 +02:00
Wolfgang Denk
3ed16071b0 USB: sync Queue Element Transfer Descriptor against EHCI spec
Appendix B "EHCI 64-Bit Data Structures" of the "Enhanced Host
Controller Interface Specification for Universal Serial Bus" (Rev.
1.0, March 12, 2002) defines additional fields which were missing in
U-Boot's struct qTD; as these are also present in recent versions of
struct ehci_qtd in the Linux kernel, we add them here, too.

This fixes some nasty memory corruption problems.

Reported-by: Dan Lykowski <lykowdk@gmail.com>
See http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/76942

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
Cc: Dan Lykowski <lykowdk@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>
2010-10-20 00:23:57 +02:00
Stefano Babic
d078b7c2ec MX31: Removed warnings for iomux function
Removed warnings generated in the mx31_set_pad() function.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-20 00:18:23 +02:00
Wolfgang Denk
b18815752f Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-10-20 00:10:07 +02:00
Eric Cooper
2ea88b063e Makefile: rename TEXT_BASE to CONFIG_SYS_TEXT_BASE 2010-10-19 23:56:00 +02:00
Richard Retanubun
683e9f1ea5 board_init_r: Removed unused cmdtp variable
Follow up to commit 620f1f6a64
removed compiler warning for (now) unused cmd_tbl_t* cmdtp
2010-10-19 23:55:09 +02:00
Stefan Roese
ae8082c7e0 Add UBI README
This patch adds a small README to describe the usage of the
U-Boot UBI commands.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-19 23:53:45 +02:00
Stefano Babic
a790b5b232 cmd_fpga: cleanup help and check parameters
The usage and help for the fpga command is wrong and incomplete,
and the parameters are not checked before to be passed to the
underlying subfunction.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-19 23:52:45 +02:00
Stefano Babic
c56ded6a6e FPGA: Add missing prototype
Add prototype function for ispVMFreeMem to remove warnings
when support for Lattice FPGA is compiled.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-19 23:52:20 +02:00
Mike Frysinger
5e7efccdd3 boards.cfg: update local documentation
The "options" field at the moment is only documented in the changelog
which isn't terribly useful to people without git.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-19 23:51:50 +02:00
Jens Scharsig
cebcf7da21 update board EB+CPUx9K2
* update to support arm reloaction
* unnecessary environment variables removed

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
2010-10-19 23:47:20 +02:00
Kristoffer Ericson
80bf2bb501 Add support for HP Jornada flashrom boards
This patch adds support for the HP Jornada flashboards
that were made in 2008. Older flashroms should work if
memory registers are adjusted.

Signed-off-by: Kristoffer Ericson <kristoffer.ericson@gmail.com>

Adpted for TEXT_BASE -> CONFIG_SYS_TEXT_BASE rename.
Removed now redundant board/jornada/config.mk file.
Removed unused empty jornada_init() function to silence
"jornada.c:35: warning: 'jornada_init' defined but not used"

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-19 23:44:22 +02:00
Mike Frysinger
f3a14d377e Makefile: allow boards to check file size limits
Boards often have a reserved size limit on the flash where they're stored.
Sometimes during upgrades or config changes, those limits are exceeded,
but no one notices until they try to upgrade and the limit screws things
up.  Either not enough of U-Boot is written to flash (and so the reboot
fails), or too much is written (and so things after it get clobbered).

So allow boards to declare a size limit (in bytes) and have the build
system check it while building.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-19 23:28:53 +02:00
John Rigby
e9319f111d drivers/net/fec_mxc.c: write mac address in init
Call fec_set_hwaddr in init routine to setup MAC address so when ethaddr is set
late via setenv the change will propagate to the hw.

Signed-off-by: John Rigby <john.rigby@linaro.org>
CC: Ben Warren <biggerbadderben@gmail.com>
2010-10-19 23:27:19 +02:00
Marek Vasut
7c957c0e74 Build: PXA: Fix TrizepsIV build variants
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 23:05:19 +02:00
Marek Vasut
f97e9c65b3 Build: PXA: Fix Vpac270 build variants
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 23:05:15 +02:00
Marek Vasut
451a0c39ae PXA: Fix vpac270 OneNAND booter
NOTE: The modification in Makefile will be superseded by a pending patch!

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 23:05:12 +02:00
Marek Vasut
20ae5193e3 PXA: Fix Balloon3 for Reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 23:05:09 +02:00
Marek Vasut
24e84c3dcb PXA: Fix ZipitZ2 for Reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 23:05:05 +02:00
Marek Vasut
720a650caa PXA: Fix vpac270 for Reloc
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 23:05:02 +02:00
Marek Vasut
2cad92fd67 PXA: Fix reloc, Push lowlevel init into C code
Firstly, this fixes relocation issues. I had to use part of Dcache as RAM for a
while. I also moved around the lowlevel init code. It turned out so most of the
lowlevel init code ended in cpu.c (and eventually was rewritten into C).

This will also allow easier operation with FDT, multi-CPU-model support etc. in
later releases.

NOTE: This breaks most of the PXA boards (actually, the reloc stuff did already,
this only finishes the doom).

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 23:04:35 +02:00
Marek Vasut
6ef6eb91cd PXA: Add necessary information for RELOC
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 22:47:34 +02:00
Mikhail Kshevetskiy
80124df14f PXA: fix MDREFR[APD] bit setting
pxa_mem_setup macro use r6 to store CONFIG_SYS_MDREFR_VAL during memory
initialization. This reg is modified during execution of pxa_wait_ticks.
Later we use r6 to setup MDREFR[APD] bit. As result MDREFR[APD] is always
zero.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
2010-10-19 22:47:31 +02:00
Mikhail Kshevetskiy
11934fbf52 PXA: fix environment sector size, kernel and environment location for vpac270
Define ENV_ADDR as MONITOR_BASE + MONITOR_LEN. Fix environment sector
size (NOR: 32Kb for first four sectors and 128Kb for other; OneNAND: 128Kb).

Last but not least: we have MONITOR_LEN = 0x40000 and one sector for
environment (size = 0x20000), so the kernel may start from 0x00060000 only.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
2010-10-19 22:47:28 +02:00
Mikhail Kshevetskiy
b2b67baca3 PXA: cleanup vpac270 config and set CONFIG_SYS_HZ to 1000
* CONFIG_SYS_CLKS_IN_HZ is not used anywhere, so removing it
* CONFIG_SYS_HZ is set to 1000 on most architectures, so it
  seems to be the safe default

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
2010-10-19 22:47:24 +02:00
Mikhail Kshevetskiy
5aa576220c PXA: remove unused u-boot.lds from board/vpac270
This file is not used, automatically generated u-boot.lds is used instead

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com>
2010-10-19 22:47:21 +02:00
Marek Vasut
c6d64c7cb1 PXA: Add missing MAINTAINERS entries
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 22:47:18 +02:00
Marek Vasut
10da95a13a PXA: Balloon3 board support
The following hardware is currently supported:
- UART
- USB Host
- FPGA

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 22:47:15 +02:00
Marek Vasut
f905432c04 PXA: Voipac270 improvements
128MB NOR module support.
Define __io to get harddrive working.
Fix saving of environment into OneNAND.
Boot from harddrive when possible.
Add missing MAINTAINERS entry.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 22:47:13 +02:00
Marek Vasut
6375dadab3 PXA: Add initial Palm LifeDrive support
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 22:47:09 +02:00
Marek Vasut
aaa2a2fc9b PXA: Palm Tungsten|C Support
This patch adds support for the Palm Tungsten|C PXA255 board. The support
includes:
- LCD
- MMC
- UART
- NOR

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 22:47:02 +02:00
Marek Vasut
dd88d79e31 common: Enable serial for PXA250
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 22:46:59 +02:00
Marek Vasut
8b71d2b710 PXA: pxafb: Marvell Littleton LCD definition
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 22:46:56 +02:00
Marek Vasut
42222be43c PXA: pxafb: Add support for Sharp LQ038J7DH53
This LCD panel is found in Palm LifeDrive handheld

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 22:46:52 +02:00
Marek Vasut
f7d58d9166 PXA: pxafb: Add ACX517AKN support
ACX517AKN LCD panel is found in Palm Tungsten|C

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 22:46:43 +02:00
Marek Vasut
3ba8bf7c6d PXA: pxa-regs.h cleanup
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 22:46:22 +02:00
Marek Vasut
9f80a20e05 PXA: pxafb: Fix indent problems
Also change the initializer style

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-19 22:46:18 +02:00
York Sun
284170309c Expand POST memory test to support arch-depended implementation.
Add weak functions to enable architecture depended preparation, address
advancing, cleaning up and error handling.

These weak functions provides the framwork to implemente arch/platform
dependent code for initializing/maintenance/restore the start address, size,
physical address as well as memory mapping before/between/after memory test.
arch_memory_failure_handle can also be implemented in case more care is needed
for arch/platform.

Signed-off-by: York Sun <yorksun@freescale.com>
2010-10-19 22:28:59 +02:00
Wolfgang Denk
1ed3b710d0 Merge branch 'at91' of git://git.denx.de/u-boot-atmel 2010-10-19 22:10:47 +02:00
Wolfgang Denk
923527aace doc/README.scrapyard: add documentation for abandoned boards
Add a document to maintain a list of boards removed from the current
source tree, so archeologists can check more easily if here is
something they might want to dig for...

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-19 21:46:25 +02:00
Wolfgang Denk
6d8d4ef994 Merge branch 'elf_reloc'
Conflicts:
	arch/arm/include/asm/config.h
	board/LaCie/edminiv2/config.mk
	board/karo/tx25/config.mk
	board/logicpd/imx27lite/config.mk
	doc/README.arm-relocation

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-19 21:07:52 +02:00
Wolfgang Denk
083d506937 Merge branch 'master' of git://git.denx.de/u-boot-imx
Conflicts:
	board/logicpd/imx31_litekit/config.mk
	boards.cfg

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-19 20:58:16 +02:00
Reinhard Meyer
5dca710a3d AT91 clock/timer: move static data to global_data struct
clock.c / timer.c used static data and are called before relocation.
Move all static variables into global_data structure. Also cleanup
timer.c from unused stubs and make it truly use 64 bit tick values.

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-10-19 15:12:29 +02:00
Andreas Bießmann
3b83522bcf at91rm9200ek: enbable USB support
This patch enables USB for at91rm9200ek board.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-10-19 15:12:04 +02:00
Andreas Bießmann
ab8fe79c99 at91rm9200: enable USB support
This patch fixes arch-at91/hardware.h to have the relevant defines for
at91rm9200 devices to support existing at91 usb driver.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-10-19 15:11:55 +02:00
Andreas Bießmann
99fa97e955 at91rm9200ek: convert to at91
This patch removes some functionality from at91rm9200ek board but the
remaining functionality does now work with newer at91 code and
arm-relocation.

Currently missing features are:
 - dataflash booting (due to missing HW for testing)
 - MMC/SD-Card
 - first stage bootloader support is completely removed (not needed for
   NOR)

Cause this board was (some days ago) reference for all at91rm9200 based
boards this should be a good starting point to convert all remaining
at91rm9200 borads to at91 code. Aside from that this is a good base to
get some drivers between at91sam/at91rm/avr32 merged.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-10-19 15:11:46 +02:00
Wolfgang Denk
333d86d15a NC650/CP850: remove code for yet another corpse
The NC650 / CP850 boards have long been unmaintained and left broken.
As obviously nobody is interested in that code any more, we may as
well remove it.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-19 14:56:57 +02:00
Wolfgang Denk
b952c24ade QONG: fix and update board config file
Fix flash memory map and other updates for QONG board:

- adjust/fix "kernel_addr" settings
- adjust/fix mtdparts NOR flash settings
- add mtdparts NAND flash mapping
- sort command list
- enable "setexpr" command
- enable ext2 support
- delete bogus comment

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2010-10-19 12:55:16 +02:00
Magnus Lilja
68a75d0b54 i.MX31: Fix Litekit board to use new ARM relocation support.
Tested on hardware. Boots Linux nicely.

Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2010-10-19 12:29:31 +02:00
Jason Liu
65e62d6941 MX5: Remove dead code with ENABLE_IMPRECISE_ABORT
This code section is dead due to we never define
ENABLE_IMPRECISE_ABORT for MX5

Signed-off-by: Jason Liu <r64343@freescale.com>
2010-10-19 12:28:08 +02:00
Wolfgang Denk
c8d76eaf60 Rename TEXT_BASE: fix merge conflicts
Commit 14d0a02a "Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE" missed a
few places, especially for boards that were added inbetween. Fix the
remaining issues.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 23:48:15 +02:00
John Rigby
b485556be5 ARM: enable device tree for beagle
For testing ARM device tree support

Signed-off-by: John Rigby <john.rigby@linaro.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:54:30 +02:00
John Rigby
2d1916e48b ARM: add flat device tree support
Based on other architectures already supported.
Tested on OMAP3 Beagle board and another unnamed ARM platform.

Signed-off-by: John Rigby <john.rigby@linaro.org>
Tested-by: Rob Herring <rob.herring@smooth-stone.com>
Acked-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:54:00 +02:00
John Rigby
fca43cc801 boot: change some arch ifdefs to feature ifdefs
The routines boot_ramdisk_high, boot_get_cmdline and boot_get_kbd
are currently enabled by various combinations of CONFIG_M68K,
CONFIG_POWERPC and CONFIG_SPARC.

Use CONFIG_SYS_BOOT_<FEATURE> defines instead.

CONFIG_SYS_BOOT_RAMDISK_HIGH
CONFIG_SYS_BOOT_GET_CMDLINE
CONFIG_SYS_BOOT_GET_KBD

Define these as appropriate in arch/include/asm/config.h files.

Signed-off-by: John Rigby <john.rigby@linaro.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:53:32 +02:00
John Rigby
5a75e12107 FDT: only call boot_get_fdt from generic code
All arches except nios2 and microblaze call boot_get_fdt
from bootm_start in common/cmd_bootm.c.

Having nios2 and microblaze do so as well removes code from
their respective do_bootm_linux routines and allows removal of
a nasty ifdef from bootm_start.

In the case where boot_get_fdt returns an error bootm_start
returns and the platform specific do_bootm_linux routines
will never get called.

Also only check argv[3] for an fdt addr if argc > 3 first.
This is already the case for nios2.

Signed-off-by: John Rigby <john.rigby@linaro.org>
CC: Scott McNutt <smcnutt@psyent.com>
CC: Michal Simek <monstr@monstr.eu>
CC: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Wolfgang Denk <wd@denx.de>
Acked-by: Michal Simek <monstr@monstr.eu>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
2010-10-18 22:52:10 +02:00
John Rigby
a6bd9e83ab FDT: Add fixup support for multiple banks of memory
Add fdt_fixup_memory_banks and reimplement fdt_fixup_memory
using it.  Tested on OMAP3 beagle board with two banks of
memory.

Signed-off-by: John Rigby <john.rigby@linaro.org>
CC: Jerry Van Baren <vanbaren@cideas.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
2010-10-18 22:50:53 +02:00
John Rigby
d1263fced2 common/image.c remove extra calls to be32_to_cpu in boot_get_fdt
fdt_totalsize returns size in cpu endian so don't call be32_to_cpu
on the result.  This was harmless on big endian platforms but not
on little endian ARMs.

Signed-off-by: John Rigby <john.rigby@linaro.org>
2010-10-18 22:50:17 +02:00
John Rigby
758b39979d common/image.c fix length calculation in boot_relocate_fdt
boot_relocate_fdt is called on platforms with CONFIG_SYS_BOOTMAPSZ
defined to relocate the device tree blob to be inside the
boot map area between bootmap_base and bootmap_base+CONFIG_SYS_BOOTMAPSZ.

For the case where the blob needs to be relocated, space is
allocated inside the bootmap by calling lmb_alloc_base with
size passed in plus some padding:

    of_len = *of_size + CONFIG_SYS_FDT_PAD;

For the case where the blob is already inside the bounds of the boot map
area, lmb_reserve is called to reserve the the space where the blob is
already residing.  The calculation for this case is currently:

    of_len = (CONFIG_SYS_BOOTMAPSZ + bootmap_base) - (ulong)fdt_blob;

This is wrong because it reserves all the space in the boot map area
from the blob to the end ignoring completely the actual size. The
worst case is where the blob is at the beginning and the entire boot map
area get reserved. Fix this by changing the length calculation to this:

    of_len = *of_size + CONFIG_SYS_FDT_PAD;

This bug has likely never manifested itself because bootm has never
been called with the fdt blob already in the bootmap area.  In my
testing on an OMAP3 beagle board I initially worked around the bug
by simply moving the initial location of the fdt blob.  I have tested
with the new calculation with the fdt blob both inside and outside
the boot map area.

Signed-off-by: John Rigby <john.rigby@linaro.org>
2010-10-18 22:49:47 +02:00
Joakim Tjernlund
1ba91ba233 dlmalloc.c: Fix gcc alias warning
Fix these warnings:
dlmalloc.c: In function 'free':
dlmalloc.c:2507: warning: dereferencing pointer '({anonymous})' does break strict-aliasing rules
dlmalloc.c:2507: warning: dereferencing pointer '({anonymous})' does break strict-aliasing rules
dlmalloc.c:2507: warning: dereferencing pointer '({anonymous})' does break strict-aliasing rules

Some page(http://blog.worldofcoding.com/2010/02/solving-gcc-44-strict-aliasing-problems.html)
suggests adding __attribute__((__may_alias__)). Doing so makes the warnings go away.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 22:44:31 +02:00
Joakim Tjernlund
d1e0b10acc powerpc: do not fixup NULL ptrs
The fixup routine must not fixup NULL pointers.
Problem can be seen by
 char *testfun(void) __attribute__((weak));
 char *(*myfun)(void) = testfun;

Then add
  printf("myfun:%p, &myfun:%p\n", myfun, &myfun);
before relocation and after relocation.
myfun should be NULL in both cases but it is not.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
2010-10-18 22:39:37 +02:00
Peter Tyser
d98b0523cf powerpc: Cleanup BOOTFLAG_* references
Now that warm booting is not supported, there isn't a need for the
BOOTFLAG_COLD and BOOTFLAG_WARM defines, so remove them.

Note that this change makes the board info bd_bootflags field useless.
It will always be set to 0, but we leave it around so that we don't
break the board info structure that some OSes are expecting to be passed
from U-Boot.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-10-18 22:38:56 +02:00
Damien Dusha
29c6fbe047 MPC5121: Add USB EHCI support
Signed-off-by: Francesco Rendine <francesco.rendine@valueteam.com>
Signed-off-by: Damien Dusha <d.dusha@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>

Coding style cleanup; slight file restructuring.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Remy Bohmer <linux@bohmer.net>
2010-10-18 22:33:32 +02:00
Wolfgang Denk
6f119c558b Merge branch 'master' of /home/wd/git/u-boot/master/ 2010-10-18 22:29:40 +02:00
Enric Balletbo i Serra
9c3c78870f MAINTAINERS: Fix alphabetical order in ARM subsection
I'm noticed that IGEP maintainer isn't in the correct place within
the ARM subsection: it's supposed to be in alphabetical order by
maintainer. This patch fix this.

Signed-off-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
2010-10-18 22:25:03 +02:00
Wolfgang Denk
d48455ad8c Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2010-10-18 22:23:36 +02:00
Wolfgang Denk
1211a46485 config.mk cleanup: drop "-I$(TOPDIR)/board" entries
After the recent cleanups, a number of config.mk files consist only of
a "PLATFORM_CPPFLAGS += -I$(TOPDIR)/board" entry whih is not needed.
Remove such entries.  In most cases, that means that the whole
config.mk file can be removed.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:14:22 +02:00
Wolfgang Denk
0777eafb3a MAKEALL: allow additional board selections
Add command line handling to select boards to be built by
architecture, CPU family, vendor or SoC name.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:13:01 +02:00
Wolfgang Denk
2ae1824196 Makefile: move all Power Architecture boards into boards.cfg
Clean up Makefile, and drop a lot of the config.mk files on the way.

We now also automatically pick all boards that are listed in
boards.cfg (and with all configurations), so we can drop the redundant
entries from MAKEALL to avoid building these twice.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:12:04 +02:00
Wolfgang Denk
2bad5df727 autoconfig.mk: avoid apostophes around hex values
When generating include/autoconfig.mk, hex numbers would be quoted.
This caused some false positives during automatic testing of the
builds, and is known to cause some real issues for some Blackfin
configurations. Don't use apostophes for decimal and hex numbers (nor
for octal numbers).

Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 22:08:22 +02:00
Wolfgang Denk
14d0a02a16 Rename TEXT_BASE into CONFIG_SYS_TEXT_BASE
The change is currently needed to be able to remove the board
configuration scripting from the top level Makefile and replace it by
a simple, table driven script.

Moving this configuration setting into the "CONFIG_*" name space is
also desirable because it is needed if we ever should move forward to
a Kconfig driven configuration system.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 22:07:10 +02:00
Wolfgang Denk
d24f2d321d mkconfig: change CONFIG_MK_ prefix into plain CONFIG_
When planning for more generalization and Makefile cleanup it became
obvious that the introduction of a separate CONFIG_MK_ name space for
config options that were set through scripting in the Makefile was
not a good idea.

Originally the idea was to provide a script-free approach to supply
configuration options - there was no real need for a separate name
space. But when we now convert the existing Makefile entries to make
use of this approach, it would mean that we have to touch a large
number of board config files and add #ifdef / #define sequences to
"convert" from the CONFIG_MK_ to the CONFIG_ name space.

It seems much cleaner to get rid of this somewhat arbitrary _MK
string now for the few boards that actually use it.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-10-18 22:01:21 +02:00
Marek Vasut
9329cdfb30 Build: Add "board options" column to boards.cfg
There are some boards where it's currently not possible to detect all
board information at runtime, therefore a new column was added to
boards.cfg .

This column can contain multiple options: a board configuration name,
optionally followed by a colon (':') and a list of options, which are
separated by comma (',').

In case of simple options like '256M_U_BOOT', these expand to
"#define CONFIG_MK_256M_U_BOOT 1" in config.h . In case of
assignments like 'RAM=8192', these expand to "#define CONFIG_MK_RAM
8192" in config.h .

Example:

	FOO:HAS_BAR,BAZ=64

means:
	- the name of the board config file is include/configs/FOO.h
	- the generated file include/config.h will contain these
	  lines:

		#define CONFIG_HAS_BAR  1
		#define CONFIG_BAZ  64

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>

[wd@denx.de: edited commit message; added code to deal with an
optional board configuration name]

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 21:58:59 +02:00
Wolfgang Denk
74c7a95f28 Makefile: clean MatrixVision builds
"make clean" after builds of MatrixVision boards would leave stale
files around:

	board/matrix_vision/mvblm7/bootscript.img
	board/matrix_vision/mvsmr/bootscript.img

Fix this.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-18 21:57:26 +02:00
Scott Wood
16e00992d8 Fix warning in nand unlock command
Commit ea533c260a changed
arg_off_size to take a pointer to a device index, rather than
to the device itself.  When updating callers, the nand unlock
code was missed.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2010-10-18 14:54:08 -05:00
Kim Phillips
e2229352c1 mpc83xx: fix 837x MDS PCI HOST build
commit 6aa3d3bfaa
"83xx: Remove warmboot parameter from PCI init functions" missed
one mpc83xx_pcie_init callsite, causing this build error:

Configuring for MPC837XEMDS_HOST board...
pci.c: In function 'pci_init_board':
pci.c:141: error: too many arguments to function 'mpc83xx_pcie_init'

this patch extends the commit to include that callsite.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-10-18 21:53:30 +02:00
Wolfgang Denk
ae188d48ec MPC832XEMDS: fix pci.c build warning
Doubled use of DECLARE_GLOBAL_DATA_PTR caused compile warning:

pci.c:71: warning: register used for two global register variables

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
2010-10-18 21:50:24 +02:00
Wolfgang Denk
059e778246 logodl: remove code for yet another corpse
The logodl board has long been unmaintained and left broken.
As obviously nobody is interestedin that code any more, we may as well
remove it.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: August Hoeraendl <august.hoerandl@gmx.at>
Cc: Robert Schwebel <r.schwebel@pengutronix.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
2010-10-18 21:48:26 +02:00
Wolfgang Denk
b6e7bd9740 schmoogie: fix build error due to removal of forceenv()
commit 6d014adf dropped support for the forceenv() function, but failed
to remove references to it from board/davinci/schmoogie/schmoogie.c

Replace forceenv() by setenv() and set CONFIG_ENV_OVERWRITE instead in
the board config file to allow overwriting the serial number.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Sergey Kubushyn <ksi@koi8.net>
Acked-by: Sergey Kubushyn <ksi@koi8.net>
2010-10-18 21:46:37 +02:00
Wolfgang Denk
439f6f7ec1 FPGA: fix support for non-Lattice devices
Commit 3b8ac464 "FPGA: add support for downloading Lattice bitstream"
added support for Lattice devices, but failed to add #ifdef's that are
needed when building for non-Lattice devices, which results in build
failures like these:

Configuring for GEN860T board...
drivers/fpga/libfpga.a(fpga.o): In function `fpga_dev_info':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:145: undefined reference to `lattice_info'
drivers/fpga/libfpga.a(fpga.o): In function `fpga_dump':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:269: undefined reference to `lattice_dump'
drivers/fpga/libfpga.a(fpga.o): In function `fpga_load':
/home/wd/git/u-boot/work/drivers/fpga/fpga.c:233: undefined reference to `lattice_load'
make: *** [u-boot] Error 1

Add the missing code.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2010-10-18 21:32:14 +02:00
Stefano Babic
a2f9bff998 MX31: add delay between USB port setup and reset
Sometimes a usb tree is not popolated after a system reset.
It seems a delay is required after setting the USB ports
for the MX.31 before resetting the ehci controller.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-18 15:21:36 +02:00
Jason Liu
ff9f475d5d MX5: rename mx51 to mx5
Rename mx51 to mx5 in order to support more mx51
like-style SOCs such as MX53 and the followings.

Signed-off-by: Jason Liu <r64343@freescale.com>
2010-10-18 10:43:19 +02:00
Wolfgang Denk
cacc342d5a Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-10-17 20:25:05 +02:00
Ben Gardiner
59e0d611ad da850evm: fix linux bootparam address
This patch fixes the LINUX_BOOT_PARAM_ADDR define to be based off of
PHYS_SDRAM_1 instead of CONFIG_SYS_MEMTEST_START. On da830 they are the same
thing but on da850 the CONFIG_SYS_MEMSTART define is offset from the
PHYS_SDRAM_1 start.

Without this patch it is not possible to boot linux on da850 -- bootm hangs
at "Uncompressing Linux... done, booting the kernel."

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-10-17 20:14:59 +02:00
Ben Gardiner
3d248d37e1 da850evm: basic MII EMAC support
The current da850evm support in u-boot/master omits any use of
the davinci EMAC. This patch adds basic support for the EMAC using
the MII PHY found on the baseboard of the EVM. The MAC address is
read from the environment variable 'ethadd'. Note that this is
different from the da850evm support in the u-boot omapl1 tree
where the MAC address is read from SPI flash.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Sandeep Paulraj <s-paulraj@ti.com>
CC: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-10-17 20:14:55 +02:00
Ben Gardiner
771d028aff da850evm: add mtdpart and ubi commands with NAND support
This patch enables also the mtdpart, ubi and ubifs commands when NAND support
is enabled.

Signed-off-by: Ben Gardiner<bengardiner@nanometrics.ca>
To: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-10-17 20:14:50 +02:00
Ben Gardiner
6b2c646895 da850evm: setup NAND support under CONFIG_USE_NAND
The current da850evm config is missing the pieces for NAND support that can be
found in Sandeep's u-boot-davinci tree [1].

This patch adds NAND support in the spirit of the support in the u-boot-davinci
tree where NAND support for the da850evm can be enabled by putting a single
'#define CONFIG_USE_NAND' at the top of the include/configs/da850evm.h file.

[1] http://arago-project.org/git/people/?p=sandeep/u-boot-davinci.git;a=tree

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-10-17 20:14:48 +02:00
Ben Gardiner
a3f88293dd da850evm: setup the NAND flash timings
The default NAND flash timings are very conservative. This patch assigns the
timings reccomended in the recent linux kernel patch [1] from Sekhar Nori. The
speedup, as reported in that patch, is 5.3x for reads.

[1] http://www.spinics.net/lists/arm-kernel/msg100278.html

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-10-17 20:14:47 +02:00
Ben Gardiner
756d1fe7ac da850evm : enable NAND even when not in NAND boot mode
There is currently no NAND pinmux enabled by the da850evm board setup code.
This is fine when booting from NAND since the early boot code (UBL) will setup
the pinmux; however, when the boot mode is any other setting NAND is unusable
when enabled in the config.

This patch adds a pinmux list for NAND and enables it when NAND is enabled in
the config. Tested by booting from SPI on the da850evm and verifying NAND
was usable.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-10-17 20:14:45 +02:00
Ben Gardiner
10d6ac94e0 davinci_nand, trivial : use symbolic ECC start command
The ECC calculations were started by writing 1 << 13 to the nand FCR register;
that value is also defined as DAVINCI_NANDFCR_4BIT_CALC_START in emif_defs.h.

This patch substitutes the macro DAVINCI_NANDFCR_4BIT_CALC_START for the
magic number '1 << 13'.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-10-17 20:14:43 +02:00
Enric Balletbo i Serra
1a832dc4f8 OMAP3: Add support for the OMAP3 IGEP module.
The IGEP module is a low-power, high performance production-ready
system-on-module (SOM) based on TI's OMAP3 family.The IGEP module
solution based upon TI OMAP3 provides a low-power/low-cost platform
for a variety of consumer/industrial/medical devices.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-10-17 20:14:42 +02:00
Enric Balletbo i Serra
8a3f6bb6fb OMAP3: Add support for the IGEP v2 board.
The IGEP v2 board is a low-cost, fan-less and industrial temperature
range single board computer that unleashes laptop-like performance and
expandability without the bulk, expense, or noise of typical desktop
machines. Its architecture shares much in common with other OMAP3 boards.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Acked-by: Steve Sakoman <steve.sakoman@linaro.org>
Tested-by: Steve Sakoman <steve.sakoman@linaro.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-10-17 20:14:40 +02:00
Enric Balletbo i Serra
84b6631038 OMAP3: SDRC: Introduce Numonyx DDR type
Introduce Numonyx DDR timings and provide CONFIG_OMAP3_NUMONYX_DDR
config options to allow for platform files to setup their timings.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Acked-by: Steve Sakoman <steve.sakoman@linaro.org>
Tested-by: Steve Sakoman <steve.sakoman@linaro.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-10-17 20:14:39 +02:00
Steve Sakoman
57b512b2ec ARMV7: OMAP4: Implement relocation for Panda and OMAP4430SDP
This patch fixes the build breakage introduced by the recent relocation
changes for ARMV7

Signed-off-by: Steve Sakoman <steve@sakoman.com>
2010-10-17 20:14:30 +02:00
Steve Sakoman
136c69ad79 ARMV7: OMAP3: Fix bug in get_sdr_cs_offset()
This patch fixes a typo in the routine to calculate the cs offset
based upon the contents of the SDRC cs_cfg register.  This function
mistakenly shifts the CS1STARTLOW field 17 bits right instead of
17 bits left.

This hasn't been an issue to date because all OMAP3 boards currently
are configured to have zeros in this field.

Reported-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
2010-10-17 20:14:28 +02:00
Steve Sakoman
68b0fbf085 ARMV7: OMAP3: Enable cache support on Overo
Signed-off-by: Steve Sakoman <steve@sakoman.com>
2010-10-17 20:14:27 +02:00
Steve Sakoman
4d7d7bc36d ARMV7: OMAP3: Implement relocation for Overo
This patch fixes the build breakage introduced by the recent relocation
changes for ARMV7

Signed-off-by: Steve Sakoman <steve@sakoman.com>
2010-10-17 20:14:24 +02:00
Sukumar Ghorai
64455352ad ARMV7: OMAP4: Enable saveenv to eMMC for SDP4430
The SDP4430 does not have onboard NAND, it has eMMC on the second
MMC slot.  This patch adds support for saving the u-boot environment
to eMMC.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
2010-10-17 20:14:22 +02:00
Steve Sakoman
cd7c57262f ARMV7: OMAP4: Use generic mmc driver on Overo
This patch switches from the legacy mmc driver to the new generic mmc driver

Signed-off-by: Steve Sakoman <steve@sakoman.com>
2010-10-17 20:14:19 +02:00
Steve Sakoman
0cd3114424 ARMV7: OMAP4: Use generic mmc driver on Beagle
This patch switches from the legacy mmc driver to the new generic mmc driver

Signed-off-by: Steve Sakoman <steve@sakoman.com>
2010-10-17 20:14:18 +02:00
Sukumar Ghorai
084c4c1bc1 ARMV7: OMAP4: Use generic mmc driver on SDP4430
This patch switches from the legacy mmc driver to the new generic mmc driver

Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
2010-10-17 20:14:15 +02:00
Sukumar Ghorai
7e982c956d ARMV7: OMAP4: Use generic mmc driver on Panda
This patch switches from the legacy mmc driver to the new generic mmc driver

Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
2010-10-17 20:14:13 +02:00
Sukumar Ghorai
de941241a0 ARMV7: OMAP: Add new mmc driver compatible with CONFIG_GENERIC_MMC
OMAP boards currently use a legacy mmc driver. This patch adds a new
mmc driver which will work with the generic mmc driver in u-boot.

This new driver will work with both OMAP3 and OMAP4 boards.

This patch does not remove the old driver.  It should remain in the
tree until all boards that use it switch to the new driver.

Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
2010-10-17 20:14:10 +02:00
Sukumar Ghorai
d23e2c09a7 MMC: Fix for capacity calculation on eMMC
The current mmc driver returns erroneous capacity information for
  eMMC.  The capacity of eMMC devices is available only in the ext-CSD
  register.  This patch add code to read the ext-CDSD register and
  correctly calculate eMMC capacity.

Signed-off-by: Sukumar Ghorai <s-ghorai@ti.com>
Acked-by: Steve Sakoman <steve@sakoman.com>
2010-10-17 20:14:06 +02:00
Steve Sakoman
7b7903ec6a ARMV7: OMAP: Use default vendor/product ID for USB gadget
TI hasn't reserved a USB Product ID for gadgets, so use the default
vendor and product ID to avoid confusion.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
2010-10-17 20:14:03 +02:00
Wolfgang Denk
6ca803750e Merge branch 'master' of git://git.denx.de/u-boot-imx 2010-10-17 19:57:38 +02:00
Mike Frysinger
5641f34f8b Blackfin: workaround anomaly 05000440
We cannot rely on the syscontrol rom func to program PLL_DIV with anomaly
05000440 is in effect, so manually program the MMR when necessary.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-14 20:23:26 -04:00
Mike Frysinger
e5d8984be6 Blackfin: update anomaly lists to latest sheets
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-14 20:23:26 -04:00
Loic Minier
edad84c299 mx51evk: add u-boot.imx to ALL target
Signed-off-by: Loic Minier <loic.minier@linaro.org>
CC: stefano babic <sbabic@denx.de>
2010-10-14 10:23:24 +02:00
Lei Wen
e79f48393d env_mmc: fix cannot save env issue
The env change its implementation after this log, while env mmc
didn't change it immediately, which cause issue. Follow to the
new style to fix it.

commit ea882baf9c
Author: Wolfgang Denk <wd@denx.de>
Date:   Sun Jun 20 23:33:59 2010 +0200

    New implementation for internal handling of environment variables.

Signed-off-by: Lei Wen <leiwen@marvell.com>
2010-10-13 22:02:32 +02:00
Stefan Roese
1a2d9b30e3 ns16550: Add WATCHDOG_RESET to putc for short watchdog timeout boards
Call watchdog_reset() upon newline. This is done here in putc
since the environment code uses a single puts() to print the complete
envrironment upon "printenv". So we can't put this watchdog call
in puts().

This is needed for boards with a very short watchdog timeout, like the
lwmon5 with a 100ms timeout. Without this patch this board resets in the
commands with long outputs, like "printenv" or "fdt print".

Note that the image size is not increased with this patch when
CONFIG_HW_WATCHDOG or CONFIG_WATCHDOG are not defined since the compiler
optimizes this additional code away.

Signed-off-by: Stefan Roese <sr@denx.de>

Fix typo in comment.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-13 21:59:31 +02:00
Steve Sakoman
d470a6f60a env_mmc: Fix crashing bug encountered after enabling ARM relocation
The crash was occuring in env_relocate because it was being called prior
to mmc_initialize.  This patch moves the MMC initialization earlier in
the init process.

This patch also cleans up the env_relocate_spec code in env_mmc.c

Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
Acked-by: Stefano Babic <sbabic@denx.de>
2010-10-13 21:52:13 +02:00
Peter Tyser
4bbfd3e279 ppc: Conditionally compile bat_rw.c
Only a few PPC boards actually use the common BAT manipulation
functions, so only compile it for them.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-10-13 21:44:10 +02:00
mark.vels@team-embedded.nl
812493ad87 Fix define for MPC5121 ADS board.
Originally the Makefile defines CONFIG_ADS5121_REV2 when configuring
for board mpc5121ads_rev2. The config in include/configs/mpc5121ads.h
expects a define CONFIG_MPC5121ADS_REV2 for this.
Therefore there are two defines used but only 1 is defined.
This patch renames references to CONFIG_ADS5121_REV2 to CONFIG_MPC5121ADS_REV2
to have one common define.

This patch fixes faulty mem size detection caused by wrong config in
include/configs/mpc5121ads.h

Signed-off-by: Mark Vels <mark.vels@team-embedded.nl>
2010-10-13 21:28:54 +02:00
Wolfgang Denk
e1b4c57096 Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-10-13 20:59:47 +02:00
Wolfgang Denk
da61f6c45a Merge branch 'sf' of git://git.denx.de/u-boot-blackfin 2010-10-13 20:58:51 +02:00
Wolfgang Denk
9de9932693 Merge branch 'master' of git://git.denx.de/u-boot-usb 2010-10-13 20:57:34 +02:00
Matthew McClintock
cb2707af7a common/fdt_support.c: fix compile error
Fix build error introduced in beca5a5f5b

common/libcommon.a(fdt_support.o): In function `fdt_add_edid':
/local/hudson/jobs/mirrors-u-boot.git/workspace/common/fdt_support.c:1205: undefined reference to `fdt_increase_size'
make: *** [u-boot] Error 1

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-10-13 20:25:33 +02:00
Stefano Babic
d7dc464be4 MX31: Add USB Host support to the QONG board
Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-13 18:11:55 +02:00
Stefano Babic
5b591502f9 MX31: Add support for MXC EHCI controller
The patch adds the EHCI controller for the i.MX31 Soc.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-13 18:11:44 +02:00
Stefano Babic
f76888c294 MX31: add support for setting pin pads
The patch adds a utility function and defines
to set the pad as it is done in linux.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-13 18:11:30 +02:00
Stefano Babic
b9eb3fdf2f MX31: Add support to update FPGA bitstream
The patch adds the possibility to update the QONG
FPGA (a Lattice XP2-5E) with u-boot using some GPIOs
to drive the JTAG interface.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-13 18:10:56 +02:00
Stefano Babic
70e23264ff MX31: Adding missing iomux pin to MX.31 registers
Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-13 18:10:32 +02:00
Stefano Babic
3b8ac464f2 FPGA: add support for downloading Lattice bitstream
The patch adds support to load a Lattice's bitstream
image (called VME file) into a Lattice FPGA. The code
containing the state machine delivered as part of
Lattice's ispVMtools is integrated.

The FPGA is programmed using the JTAG interface. The
board maintainer must provide accessors to drive the
JTAG signals TCK, TMS, TDI and to get the value of the
input signal TDO.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-13 18:09:31 +02:00
Bryan Wu
4ee691f6ac usb: musb: only write CLRDATATOG when appropriate
This is a change similar to what is already in the Linux driver.  We
should only program the CLRDATATOG bit when the current mode indicates
that it is needed.

Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-13 12:08:43 +02:00
Ludovic Courtès
99e9ed1f49 usb: Add support for multiple-LUN mass storage devices
This patch changes `usb_stor_scan' to scan all the LUNs of each mass
storage device.  It also fixes the various commands to correctly set
the LUN field.

Notably, it allows each LUN of GuruPlug's microSD card reader to be
accessed.

Signed-off-by: Ludovic Courtès <ludo@gnu.org>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-10-13 12:07:58 +02:00
Vitaly Kuzmichev
98fae9707f USB-CDC: Prevent rx_req being enqueued twice
After gadget reinitializaton (after tftp has been done once)
packet_received may become equal to 1 due to nuking OUT_EP
while disabling it in eth_reset_config.

rx_submit called from usb_eth_init queues rx_req first time.
But the first call of usb_eth_recv from NetLoop queues rx_req
again due to packet_received = 1.

The following flow shows the path of functions calls when
this happens:

 net/net.c:NetLoop
 |
 +-net/eth.c:eth_init
 |   ether.c:usb_eth_init
 |   |
 |   +-udc_driver:usb_gadget_handle_interrupts
 |   |   udc_driver:...
 |   |     ether.c:eth_setup
 |   |       ether.c:eth_set_config
 |   |         ether.c:eth_reset_config
 |   |           udc_driver:usb_ep_disable
 |   |             udc_driver:nuke
 |   |               ether.c:rx_complete
 |   |                 ether.c: packet_received = 1;
 |   |
 |   +-ether.c:rx_submit
 |       udc_driver:usb_ep_queue --- The first time when rx_req is queued
 |
 +-net/eth.c:eth_rx
     ether.c:usb_eth_recv
     |
     +-udc_driver:usb_gadget_handle_interrupts
     |   udc_driver:... --- no interrupts, returning
     +-ether.c: if (packet_received) { ...
         ether.c:rx_submit
           udc_driver:usb_ep_queue --- The second time!

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2010-10-13 12:07:58 +02:00
Vitaly Kuzmichev
ac5d32d15c USB-CDC: Fix tx/rx_req memory leaks
Remove and fix needless and destructive operations with tx/rx_req.

1) 'req' in rx_complete is always not NULL and always equals to rx_req
2) Free allocated tx_req if rx_req allocation has failed
3) Do not zero out tx/rx_req in usb_eth_init, leave this for
eth_reset_config which will be called at the next use of usb0
4) Additional check in usb_eth_recv is not required

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2010-10-13 12:07:58 +02:00
Marek Vasut
f2443d10ff USB: Make non-bulk delay longer in OHCI
This fixes TIMEOUT with my Kingston 32GB USB3.0 flashdrive, which I experienced
on my PXA270 (USB 1.1) Vpac270 board.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-10-13 12:07:58 +02:00
Heiko Schocher
bafe7437a4 arm1136, qong: add support for ELF relocations
Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: Albert ARIBAUD <albert.aribaud@free.fr>
2010-10-13 10:12:52 +02:00
Heiko Schocher
c3d3a5418d armv7, beagle: add support for ELF relocations
Signed-off-by: Heiko Schocher <hs@denx.de>
2010-10-13 10:12:25 +02:00
Heiko Schocher
9710504d20 arm926ejs, tx25: add support for ELF relocations
Signed-off-by: Heiko Schocher <hs@denx.de>
2010-10-13 10:12:01 +02:00
Heiko Schocher
4a8fd13af8 arm926ejs, magnesium: add support for ELF relocations
Signed-off-by: Heiko Schocher <hs@denx.de>
2010-10-13 10:11:32 +02:00
Albert Aribaud
0693923cd2 edminiv2: add support for ELF relocations
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-10-13 10:10:22 +02:00
Albert Aribaud
92d5ecba47 arm: implement ELF relocations
ELF relocation tables generated with linker option -pie can
be used to fixup code and data in a single loop at relocation,
removing the need for manual fixups anywhere else in the code.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-10-13 10:10:21 +02:00
Andreas Bießmann
89bca0ab69 board/armltd/integrator/split_by_variant.sh: fix 'echo -n'
This patch fixes an error when running MAKEALL for ARM9.

On OS X /bin/sh uses builtin echo which does not utilise '-n' switch.
GNU manual for builtins recomend to use here-document style to solve
this portability issue.

This patch removes the usage of 'echo -n' and replace by here-document
style or a oneline echo command.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
CC: Peter Pearse <peter.pearse@arm.com>
2010-10-13 10:00:16 +02:00
Matt Waddel
249d5219c4 ARMV7: Fixed baudrate setting in pl01x driver
The pl01x serial driver was lacking the code to switch baudrates from the
command line.  Fixed by simply saving the new baudrate and calling
serial_init() again.  Also fixed CamelCase variables, I/O accessors and
comment style.

Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
2010-10-13 09:59:43 +02:00
Matt Waddel
b80e41ac54 ARMV7: Versatile Express Coretile CortexA9x4 support
Adds support for the ARM quad-core Cortex-A9 processor

This system includes a motherboard(Versatile Express), daughterboard
(Coretile), and SOC(Cortex-A9 quad core).  The serial port, ethernet,
and flash systems work with these additions.  The naming convention
is:
   SOC -> CortexA9 quad core = ca9x4
   daughterboard -> Coretile = ct
   motherboard -> Versatile Express = vxp
This gives ca9x4_ct_vxp.c as the board support file.

Signed-off-by: Matt Waddel <matt.waddel@linaro.org>
2010-10-13 09:59:39 +02:00
Andreas Bießmann
a4a87d8a93 arch/arm/include/asm/sizes.h: cleanups
Merge several sizes.h in asm/arch subdirectories into a single
asm/sizes.h file.

Fixup usage of asm/arch/sizes.h in some files to use the merged file.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2010-10-13 09:59:33 +02:00
Wolfgang Denk
bfe8fe87ba Merge branch 'master' of git://git.denx.de/u-boot-marvell 2010-10-13 09:59:13 +02:00
Ben Gardiner
11080ab66d ARM: relocation: don't undef CONFIG_SYS_ARM_WITHOUT_RELOC
There were some #undef's of CONFIG_SYS_ARM_WITHOUT_RELOC added to a few board
configs as part of the arm relocation series; but these are not needed now as we
do not #undef what is not #defined in the first place.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Heiko Schocher <hs@denx.de>
2010-10-13 09:57:47 +02:00
Heiko Schocher
a784c01adc ARM: relocation: fix typo in comment
Signed-off-by: Heiko Schocher <hs@denx.de>
2010-10-13 09:50:55 +02:00
Prafulla Wadaskar
0b20ed76c0 Kirkwood: Changes specific to ARM relocation support
All Kirkwood based boards are supported for this new implementation
ref: docs/README.arm-relocation

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-10-13 09:36:20 +02:00
Prafulla Wadaskar
54e999a30a kirkwood: added common config file mv-common.h
It is observed that, in most of the board configs the code is being
duplicated, also for any common change all board files needs update
This issue was under discussion from long on mailing list and we
converge on introducing common config file.

With this patch-
1. Total Kirkwood specific configuration code is reduced by 210 lines
2. All common configuration can be shared by multiple boards
3. Easy to manage common updates like ARM relocation changes

mv-common.h file is added to include/configs/
It contains all common configuration supported for all Kirkwood boards
The respective board configs are updated for its usage

Build tested for guruplug, mv88f6281gtw_ge, openrd_base,
rd6281a and sheevaplug
Binary execution tested for sheevaplug

Todo:
1. Other custom Kirkwood boards to be synced
2. The support to be extended for Orion5X based boards

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-10-13 09:36:10 +02:00
Prafulla Wadaskar
beeb258976 Kirkwood: dram_init is moved to dram.c
For all Kirkwood boards so far dram_init function is duplicated
dram_init function is moved to dram.c and relevant code from all
board specific files removed

If any board needs specific dram init handling than standard one,
then, a macro CONFIG_SYS_BOARD_DRAM_INIT should be defined in
board config header file and the dram_init function can be put
in board specific source file
For ex. keymile boards

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-10-13 09:36:07 +02:00
Albert Aribaud
500f2ff52a orion5x: optimize window size computation
Signed-off-by: Chris Moore <moore@free.fr>
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-10-13 09:36:02 +02:00
Prafulla Wadaskar
c0cd02073d Kirkwood: print_cpuinfo fixed for valid devid revid
Earlier Device Identification register was used to detect
the type for SoC, considering 88F6282 support to be added,
It is not possible to detect the same using current
algorithm.

With this patch, device ID is being read using PCIE devid
register, also valid chip revision ID will also be read and
displayed

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-10-13 09:35:58 +02:00
Albert Aribaud
d3497138ff mvsata_ide: adjust port init sequence
mvsata_ide_initialize_port(): adjust init sequence (SStatus
should be checked only after all writes to SControl) and
return success/failure to ide_preinit().

Also, as some tests showed init durations in the hundreds
of us, raise the time-out to 01 ms to be on the safe side.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-10-13 09:35:54 +02:00
Reinhard Meyer
0d3fe2b153 sf: turn probe switch into a lookup table
This allows for arbitrarily long manufacturer ids following the JEDEC
standard of 0x7f continuation bytes.  It also makes adding new entries
easier as it's just one element in an array.  The downside is that it
increases code size a bit, but we're talking ~50 bytes.

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-12 21:08:25 -04:00
Brent Darley
076f1be8e1 TSI148: Fix argument parsing
This patch does 2 things:
 - Fix the argument number assigned to the vdw (VME data width) value.
   Previously, a nonexistent 7th arument was read as the vdw variable.

 - Reduce the size of the argument array for the tsi148 command from
   8 to 7.  The tsi148 command itself is argument index 0, and the
   maximum number arguments passed to the command is 6, making a total
   of 7 for the array.

Signed-off-by: Brent Darley <bdarley@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-10-12 23:31:10 +02:00
Peter Tyser
52ebd9c1e5 powerpc: Remove warm reset entry point
No boards utilize the warm reset entry point, so remove it.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-10-12 23:01:32 +02:00
Peter Tyser
3792d7436e ppmc7xx: Use _start as reset entry point
Previously the _warm_start label was used as an entry point.  These 2
entry points should be functionally identical after the removal of the
BOOTFLAG_WARM define.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-10-12 23:01:03 +02:00
Peter Tyser
a1c4864ab0 powerpc: Zero out board info struct on bootup
This puts the board info struct in a known state and allows the removal
of other code which initialized board info fields to 0.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-10-12 23:00:30 +02:00
Stefan Roese
eaadb44edf cp/cmp: Add WATCHDOG_RESET in copy and compare loop
On some boards with a very short watchdog timeout, the "cp" and
"cmp" commands may reset the board. This patch adds some
watchdog resets inside the loops. Otherwise for example the lwmon5
board will reset while doing something like this:

=> cp.b fc000000 1000000 100000

Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-12 22:50:19 +02:00
Peter Tyser
c91d456c05 examples/standalone: Use gcc's -fno-toplevel-reorder
Using -fno-toplevel-reorder causes gcc to not reorder functions.  This
ensures that an application's entry point will be the first function in
the application's source file.

This change, along with commit 620bbba524
should cause a standalone application's entry point to be at the base of
the compiled binary.  Previously, the entry point could change depending
on gcc version and flags.

Note -fno-toplevel-reorder is only available in gcc version 4.2 or
greater.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-10-12 22:47:03 +02:00
Ilya Yanok
92d1a400bc a4m072: support for SHOW_BOOT_PROGRESS feature using LED display
This patch adds support for displaying boot progress codes on a4m072 board
using LED display. As we can display only one symbol at any time on the hardware
(two symbols with blinking) we can't display progress codes directly and have
to map them to 2-symbol codes.
We use the following mapping on the a4m972 board:
 [1, 8] U [100, 108]					-> 5
 [-9, -1] U [-101, -100] U [-113, -103]			-> -5
 [9, 14] U [120, 123] U [125, 129]			-> 8
 [-13, -10] U [-122, -120] U [-127, -124] U {-129}	-> -8
 {15}							-> 9
 [-32, -30]						-> -A
 [-40, -35] U [-51, -42] U [-58, -53] U
		[-83, -80] U {-64, -130, -140, -150}	-> -B

Other progress code are ignored. One symbol codes are displayed steady while
two-symbol codes are displayed using blinking. Boot progress codes are
displayed with decimal got unset (as opposed to 'display' command output).

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2010-10-12 22:44:34 +02:00
Ilya Yanok
cb5639cbc0 a4m072: led display support
This patch adds support for LED display on a4m072 board. Hardware is
capable of displaying only one symbol at any time. We support displaying
two symbols in software (via blinking).

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2010-10-12 22:44:33 +02:00
Ilya Yanok
7f0d241d5c led_display: split led display support into generic and hw-dependent parts
Split the display command into generic interface and hardware-specific
realization for PDSP188x LED display found on hmi1001 and manroland
boards. Simple interface for LED displays is defined in
include/led-display.h and described in doc/README.LED_display.
Driver-specific implementation was moved into drivers/misc/pdsp188x.c
file (enabled with CONFIG_PDSP188x set).

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
2010-10-12 22:44:33 +02:00
Sergei Poselenov
9531a2388c A4M072: Added support for the board.
This patch provides support for the A4M072 board with the following features:
 UART
 NOR flash
 FEC Ethernet
 External SRAM
 I2C EEPROM
 CompactFlash cards on IDE/ATA port
 USB Host
 PCI initialization

The 7-segment LED indicator is not yet supported.

Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2010-10-12 22:44:33 +02:00
Mikhail Zolotaryov
3831530dcb VFAT: fix processing of scattered long file name entries
The U-Boot code has the following bugs related to the processing of Long File
Name (LFN) entries scattered across several clusters/sectors :

1) get_vfatname() function is designed to gather scattered LFN entries by
cluster chain processing - that doesn't work for FAT12/16 root directory.
In other words, the function expects the following input data:
 1.1) FAT32 directory (which is cluster chain based);
        OR
 1.2) FAT12/16 non-root directory (which is also cluster chain based);
        OR
 1.3) FAT12/16 root directory (allocated as contiguous sectors area), but
 all necessary information MUST be within the input buffer of filesystem cluster
 size (thus cluster-chain jump is never initiated).

In order to accomplish the last condition, root directory parsing code in
do_fat_read() uses the following trick: read-out cluster-size block, process
only first sector (512 bytes), then shift 512 forward, read-out cluster-size
block and so on. This works great unless cluster size is equal to 512 bytes
(in a case you have a small partition), or long file name entries are scattered
across three sectors, see 4) for details.

2) Despite of the fact that get_vfatname() supports FAT32 root directory
browsing, do_fat_read() function doesn't send current cluster number correctly,
so root directory look-up doesn't work correctly.

3) get_vfatname() doesn't gather scattered entries correctly also is the case
when all LFN entries are located at the end of the source cluster, but real
directory entry (which must be returned) is at the only beginning of the
next one. No error detected, the resulting directory entry returned contains
a semi-random information (wrong size, wrong start cluster number and so on)
i.e. the entry is not accessible.

4) LFN (VFAT) allows up to 20 entries (slots) each containing 26 bytes (13
UTF-16 code units) to represent a single long file name i.e. up to 520 bytes.
U-Boot allocates 256 bytes buffer instead, i.e. 10 or more LFN slots record
may cause buffer overflow / memory corruption.
Also, it's worth to mention that 20+1 slots occupy 672 bytes space which may
take more than one cluster of 512 bytes (medium-size FAT32 or small FAT16
partition) - get_vfatname() function doesn't support such case as well.

The patch attached fixes these problems in the following way:
- keep using 256 bytes buffer for a long file name, but safely prevent a
possible buffer overflow (skip LFN processing, if it contains 10 or more
slots).

- explicitly specify FAT12/16 root directory parsing buffer size, instead
of relying on cluster size. The value used is a double sector size (to store
current sector and the next one). This fixes the first problem and increases
performance on big FAT12/16 partitions;

- send current cluster number (FAT32) to get_vfatname() during root
directory processing;

- use LFN counter to seek the real directory entry in get_vfatname() - fixes the
third problem;

- skip deleted entries in the root directory (to prevent bogus buffer
overflow detection and LFN counter steps).

Note: it's not advised to split up the patch, because a separate part may
operate incorrectly.

Signed-off-by: Mikhail Zolotaryov <lebon@lebon.org.ua>
2010-10-12 22:39:14 +02:00
Daniel Hobi
b75a2dde47 tools/imls: fix comment in Makefile
Commit d984fed0 (makefiles: fixes for building build tools)
changed the variable name FIT_CFLAGS to HOSTCFLAGS_NOPED
but forgot to update to corresponding comment.

Signed-off-by: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
2010-10-12 21:49:28 +02:00
Lei Wen
d259079d6d env: don't set to default env twice when use CONFIG_ENV_IS_NOWHERE
When use the CONFIG_ENV_IS_NOWHERE, I met such issue:

	DRAM:  256 MiB
	Using default environment

	*** Warning - bad CRC, using default environment

Signed-off-by: Lei Wen <leiwen@marvell.com>
2010-10-12 21:31:04 +02:00
Stefan Roese
be4424c73d zlib: Add further watchdog reset calls
Patch 253cb831 [zlib: add watchdog reset call] added already a few
watchdog reset calls to the new zlib U-Boot port. But on some boards
this is not enough. Additional calls are needed on boards with
short watchdog timeouts.

This was detected and tested on the lwmon5 board with a very short
watchdog timeout. Without this patch, the board resets during Linux
kernel decompression. With it, the decompression succeeds.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-10-12 21:16:01 +02:00
Stefan Roese
f852628638 zlib/gunzip: Use WATCHDOG_RESET macro
As usually done in U-Boot, the watchdog_reset code is called via a
macro (WATCHDOG_RESET). In zlib.c this was done differently, by using
a function pointer which is initialized with WATCHDOG_RESET upon watchdog
usage or with NULL otherwise. This patch now uses the plain
WATCHDOG_RESET macros to call the function resulting in slightly smaller
U-Boot images and simpler code.

U-Boot code size reduction:

PowerPC board with watchdog support (lwmon5):
-> 80 bytes smaller image size

PowerPC board without watchdog support (sequoia):
-> 112 bytes smaller image size

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Detlev Zundel <dzu@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-10-12 21:15:10 +02:00
Anatolij Gustschin
6213b8ffa5 pdm360ng: add EDID property to FDT display node
PDM360NG board uses this functionality to pass display
timing info to the Linux Framebuffer driver.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-10-12 21:07:13 +02:00
Anatolij Gustschin
beca5a5f5b fdt_support: support adding EDID property to FDT display nodes
Boards can pass display timing info for drivers using EDID
block. Provide common function to add board specific EDID
data to the device tree. Subsequent patch makes use of this
functionality.

Detailed timing descriptor data from EDID is used for
programming the display controller. This is currently
implemented on the Linux side by the fsl-diu-fb frame
buffer driver and it is documented there in
Documentation/powerpc/dts-bindings/fsl/diu.txt.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Cc: Gerald Van Baren <vanbaren@cideas.com>
2010-10-12 21:05:58 +02:00
Alexander Stein
c000808b6a CONFIG_CMD_JFFS2 is not necessary to use mtdparts on erase & protect on/off
The include <jffs2/jffs2.h> is still necessary though.

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
Acked-by: Stefan Roese <sr@denx.de>
2010-10-12 21:02:55 +02:00
Wolfgang Denk
c0c3590bb2 Merge branch 'master' of git://git.denx.de/u-boot-cfi-flash 2010-10-12 20:49:27 +02:00
Wolfgang Denk
655c549752 Merge branch 'master' of git://git.denx.de/u-boot-microblaze 2010-10-12 20:48:01 +02:00
Wolfgang Denk
0ee8746a93 Merge branch 'master' of git://git.denx.de/u-boot-net 2010-10-12 20:44:46 +02:00
Prafulla Wadaskar
d30b5706d8 Kirkwood: Changes specific to ARM relocation support
All Kirkwood based boards are supported for this new implementation
ref: docs/README.arm-relocation

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-10-12 14:39:16 +05:30
Prafulla Wadaskar
44f1ec6c5e kirkwood: added common config file mv-common.h
It is observed that, in most of the board configs the code is being
duplicated, also for any common change all board files needs update
This issue was under discussion from long on mailing list and we
converge on introducing common config file.

With this patch-
1. Total Kirkwood specific configuration code is reduced by 210 lines
2. All common configuration can be shared by multiple boards
3. Easy to manage common updates like ARM relocation changes

mv-common.h file is added to include/configs/
It contains all common configuration supported for all Kirkwood boards
The respective board configs are updated for its usage

Build tested for guruplug, mv88f6281gtw_ge, openrd_base,
rd6281a and sheevaplug
Binary execution tested for sheevaplug

Todo:
1. Other custom Kirkwood boards to be synced
2. The support to be extended for Orion5X based boards

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-10-12 14:39:16 +05:30
Prafulla Wadaskar
6edf0f121f Kirkwood: dram_init is moved to dram.c
For all Kirkwood boards so far dram_init function is duplicated
dram_init function is moved to dram.c and relevant code from all
board specific files removed

If any board needs specific dram init handling than standard one,
then, a macro CONFIG_SYS_BOARD_DRAM_INIT should be defined in
board config header file and the dram_init function can be put
in board specific source file
For ex. keymile boards

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-10-12 14:39:15 +05:30
Albert Aribaud
3b467ec444 orion5x: optimize window size computation
Signed-off-by: Chris Moore <moore@free.fr>
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-10-12 14:39:15 +05:30
Prafulla Wadaskar
35883cca8a Kirkwood: print_cpuinfo fixed for valid devid revid
Earlier Device Identification register was used to detect
the type for SoC, considering 88F6282 support to be added,
It is not possible to detect the same using current
algorithm.

With this patch, device ID is being read using PCIE devid
register, also valid chip revision ID will also be read and
displayed

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-10-12 14:39:15 +05:30
Albert Aribaud
7054cfda65 mvsata_ide: adjust port init sequence
mvsata_ide_initialize_port(): adjust init sequence (SStatus
should be checked only after all writes to SControl) and
return success/failure to ide_preinit().

Also, as some tests showed init durations in the hundreds
of us, raise the time-out to 01 ms to be on the safe side.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-10-12 14:39:15 +05:30
John Schmoller
0e3fa01a63 cfi_flash: Fix "Unknown FLASH" error message
When a CFI flash chip could not be detected an error message similar to
the following would be printed on bootup:

 FLASH: ## Unknown FLASH on Bank 1 - Size = 0x01000000 = 0 MB

The printf incorrectly converted the flash size into megabytes.  This
patch fixes the printing of the flash size in megabytes:

 FLASH: ## Unknown FLASH on Bank 1 - Size = 0x01000000 = 16 MB

Signed-off-by: John Schmoller <jschmoller@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-12 08:59:15 +02:00
Michal Simek
b98cba0911 microblaze: Support little-endian microblaze target
Microblaze little-endian toolchain should export
__MICROBLAZEEL__.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-10-12 16:51:34 +10:00
Michal Simek
d69f8f41af microblaze: Add support for NET_MULTI api
Microblaze hasn't supported NET_MULTI support.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-10-12 16:51:34 +10:00
Michal Simek
4aecfb1602 microblaze: Fix microblaze-generic config file
1. Fix preprocessor statements
2. Clean coding style

Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-10-12 16:44:21 +10:00
Stephan Linz
c82a541d47 microblaze: generic: rename MTD partition set to 'flash-0'
Signed-off-by: Stephan Linz <linz@li-pro.net>
Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-10-12 16:44:21 +10:00
Stephan Linz
3faf987de5 microblaze: generic: adding DHCP support
Signed-off-by: Stephan Linz <linz@li-pro.net>
Signed-off-by: Michal Simek <monstr@monstr.eu>
2010-10-12 16:44:21 +10:00
Thomas Chou
1ca6d0df3e smc91111: add write_hwaddr
Add smc_write_hwaddr() to set mac address.
Clear dev before use.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-10-11 23:07:28 -07:00
Ben Gardiner
7b37a27e14 davinci_emac: davinci_eth_set_mac_addr to ->write_hwaddr
This patch proposes to migrate the davinci_emac driver to using the
eth_device->write_hwaddr function pointer as suggested by Ben Warren.

All the davinci boards had the behaviour, prior to this patch, of
sync'ing the environment variable enetaddr with the MAC address read
from non-volatile storage on boot -- when the two locations disagreed,
the environment variable value took precendence. This patch keeps the
same behaviour but lets eth_initialize take care of it.

This patch refactors davinci_emac setup in the boards so that the MAC
address is read from non-volatile storage into the environment variable
and then the environment variable value is use in eth_intialize. The
only exception is the direct call to davinci_eth_set_mac_addr made by
the da830evm board init which was changed into an assignment of the
enetaddr field.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Tested-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-10-11 23:07:17 -07:00
Michal Simek
042272a6f2 net: Move Emaclite to NET_MULTI
Emaclite was using old net api that's why
this patch move emaclite to NET_MULTI api.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-10-11 23:07:04 -07:00
Peter Tyser
bf6cb247a5 rarp: Condtionally compile rarp support
Most people don't use the 'rarpboot' command, so only enable it when
CONFIG_CMD_RARP is defined.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-10-11 23:00:29 -07:00
Michal Simek
3f91ec0fa1 net: Fix emaclite driver to support little-endian microblaze
Support New emaclite AXI IP.

Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-10-11 23:00:29 -07:00
Ilya Yanok
f87a6f27e6 mpc5xxx_fec: add call to reset_phy() after PHY initialization
Some boards need their board-specific PHY quirks to be called
to PHY to work normally. As mpc5xxx_fec driver uses on demand
PHY initialization and can even reinit PHY during normal operation
we can't count on reset_phy() call from arch/<arch>/lib/board.c
(it is most likely called _before_ we init the PHY from the
driver) so we need to add call to reset_phy() directly in the
driver.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-10-11 23:00:29 -07:00
Andreas Bießmann
77179067db drivers/net/at91_emac.c: change return values
Some return values pretended correct pass. This patch changes them according
to README.drivers.net. This patch changes e.g. command 'dhcp' to stop after
errorneous autonegotiation.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-10-11 23:00:29 -07:00
Andreas Bießmann
e63ac4cf11 drivers/net/at91_emac.c: increase timeout for autonegotiation
This patch increases timeout for autonegotiation from 1 second to 3 seconds.
Some boards (e.g. at91rm9200ek) did not negotiate within 1 second.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-10-11 23:00:28 -07:00
Reinhard Meyer
a61a81967f NET: add ENC28J60 driver using SPI framework
V3: further refinements:
- use priv member instead of container method
- allow setting of MAC address by write_hwaddr method
- avoid shutting down link between commands

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-10-11 22:47:48 -07:00
Joakim Tjernlund
f29c181cd4 UEC PHY: Speed up initial PHY neg.
Instead of always performing an autoneg, check if the PHY
already has a link and if it matches one of the requested
modes. Initially only 100MbFD is optimized this way.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-10-11 22:47:48 -07:00
Ben Warren
68e1ede88a Net: Remove redundant CONFIG_NET_MULTI directives
All are within an #ifdef CONFIG_NET_MULTI block already

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-10-11 22:47:48 -07:00
Joakim Tjernlund
b0a75d7aa3 UEC PHY: Remove strange 0.5 sec delay
This udelay looks bogus and doesn't help my board.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-10-11 22:47:48 -07:00
Joakim Tjernlund
bd6c25afd2 UEC: Don't udelay needlessly
uec_init() adds an udelay(100000) even though
the PHY status read went well, don't do that.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-10-11 22:47:48 -07:00
Reinhard Meyer (-VC)
b7081d9197 NET: move legacy enc28j60.c to sidetrack as enc28j60_lpc2292.c
This patch is required before the upcoming new enc28j60 driver
using SPI framework patch can be applied:
- Move legacy enc28j60.c to enc28j60_lpc2292.c.
- Change Makefile and the two affected boards' definition files.

Tested with ./MAKEALL ARM7 that both boards still compile.

Signed-off-by: Reinhard Meyer<info@emk-elektronik.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-10-11 22:47:48 -07:00
Joakim Tjernlund
91955834f5 net: Fix faulty definition of uec_initialize()
The correct definition is in drivers/qe/uec.h so just
remove this one.

Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-10-11 22:47:47 -07:00
Enric Balletbo i Serra
456be17dbe mtd: OneNAND: add support for OneNAND manufactured by Numonyx
This patch adds the Numonyx manufacturer code (0x20) to
onenand manufacturers.

Signed-off-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Steve Sakoman <steve.sakoman@linaro.org>
Tested-by: Steve Sakoman <steve.sakoman@linaro.org>
2010-10-11 15:15:45 -05:00
Scott Wood
fdd813def8 README: Add new NAND env features
CONFIG_ENV_SIZE does not need block alignment.

Document CONFIG_ENV_RANGE and CONFIG_ENV_OFFSET_OOB.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2010-10-11 15:11:33 -05:00
Scott Wood
36650ca9f1 Followup fixes on the mtdparts spread patchset
Consolidate some code in mtd_get_len_incl_bad(), and fix a condition
where a valid partition could be reported as truncated if it has a
good block at the end of the device (unlikely, since the BBT is usually
there).

Fix mid-block declarations in net_part_size().

Signed-off-by: Scott Wood <scottwood@freescale.com>
Reviewed-by: Ben Gardiner <bengardiner@nanometrics.ca>
2010-10-11 15:11:01 -05:00
Ben Gardiner
59a50d2de1 mtdparts: new add.spread: add part skipping bad blocks
This patch adds a new 'mtdparts add' variant: add.spread. This command variant
adds a new partition to the mtdparts variable but also increases the partitions
size by skipping bad blocks and aggregating any additional bad blocks found at
the end of the partition.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Wolfgang Denk <wd@denx.de>
CC: Scott Wood <scottwood@freescale.com>
2010-10-11 15:11:01 -05:00
Ben Gardiner
ca75b20ebb mtdparts: add new sub-command "spread"
This patch introduces the 'spread' sub-command of the mtdparts command.
This command will modify the existing mtdparts variable by increasing
the size of the partitions such that 1) each partition's net size is at
least as large as the size specified in the mtdparts variable and 2)
each partition starts on a good block.

The new subcommand is implemented by iterating over the mtd device
partitions and collecting a bad blocks count in each -- including any
trailing bad blocks -- and then modifying that partitions's part_info
structure and checking if the modification affects the next partition.

This patch is based on a port of the 'dynnamic partitions' feature by
Harald Welte <laforge@gnumonks.org>; ported from commit
e05835df019027391f58f9d8ce5e1257d6924798 of
git://git.openmoko.org/u-boot.git. Whereas Harald's feature used a
compile-time array to specify partitions, the feature introduced by
this patch uses the mtdparts environment variable.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Harald Welte <laforge@gnumonks.org>
CC: Wolfgang Denk <wd@denx.de>
CC: Scott Wood <scottwood@freescale.com>
2010-10-11 15:11:01 -05:00
Ben Gardiner
04ac380288 mtdparts: show net size in mtdparts list
This patch adds an additional column to the output of list_partitions. The
additional column will contain the net size and a '(!)' beside it if the net
size is not equal to the partition size.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Wolfgang Denk <wd@denx.de>
CC: Scott Wood <scottwood@freescale.com>
2010-10-11 15:11:00 -05:00
Ben Gardiner
4ba692fb1e mtd: add an mtd method for get_len_incl_bad()
The logic to 'spread' mtd partitions needs to calculate the length in
the mtd device, including bad blocks.

This patch introduces a new function, mtd_get_len_incl_bad that can
return both the length including bad blocks and whether that length
was truncated on the device. This new function will be used by the
mtdparts spread command later in this series. The definition of the
function is #ifdef'd out in configurations that do not use the new
'mtdparts spread' command.

Signed-off-by: Ben Gardiner<bengardiner@nanometrics.ca>
CC: Scott Wood <scottwood@freescale.com>
2010-10-11 15:11:00 -05:00
Ben Gardiner
0a026d3e86 mtdparts: regroup calls to get_mtd_device_nm
The get_mtd_device_nm function is called in a couple places and the
string that is passed to it is not really used after the calls.

This patch regroups the calls to this function into a new function,
get_mtd_info.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Acked-by: Stefan Roese <sr@denx.de>
CC: Wolfgang Denk <wd@denx.de>
2010-10-11 15:11:00 -05:00
Scott Wood
5b8e6bb517 nand: remove dead code and suspend/resume
Get rid of the several "#if 0" sections that were keeping around Linux
code that isn't relevant to U-Boot.  Besides cluttering the code, these
sections make tracking upstream changes harder, rather than easier.
It's easy to discard obviously irrelevant diff hunks that patch rejects,
but it's not as easy to notice hunks that apply cleanly to the #if 0
section, but *are* relevant to U-Boot and require modification elsewhere.

Also remove suspend/resume, as this is not applicable to U-Boot.  Removal
saves 232 bytes on powerpc.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
2010-10-11 15:10:35 -05:00
Scott Wood
8c5659a6da nand commands: make only "dump" repeatable.
The dump command is made to increment its address on repeat,
as md does.  Other commands do not make sense to issue repeatedly,
and can be irritating when it happens accidentally, so don't.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
2010-10-11 15:10:26 -05:00
Scott Wood
3048632251 nand erase: .spread, .part, .chip subcommands
A while back, in http://lists.denx.de/pipermail/u-boot/2009-June/054428.html,
Michele De Candia posted a patch to not count bad blocks toward the
requested size to be erased.  This is desireable when you're passing in
something like $filesize, but not when you're trying to erase a partition.

Thus, a .spread subcommand (named for consistency with
http://lists.denx.de/pipermail/u-boot/2010-August/075163.html) is introduced
to make explicit the user's desire to erase for a given amount of data,
rather than to erase a specific region of the chip.

While passing $filesize to "nand erase" is useful, accidentally passing
something like $fliesize currently produces quite unpleasant results, as the
variable evaluates to nothing and U-Boot assumes that you want to erase
the entire rest of the chip/partition.  To improve the safety of the
erase command, require the user to make explicit their intentions by
using a .part or .chip subcommand.  This is an incompatible user interface
change, but keeping compatibility would eliminate the safety gain, and IMHO
it's worth it.

While touching nand_erase_opts(), make it accept 64-bit offsets and sizes,
fix the percentage display when erase length is rounded up, eliminate
an inconsistent warning about rounding up the erase length which only
happened when the length was less than one block (rounding up for $filesize
is normal operation), and add a diagnostic if there's an attempt to erase
beginning at a non-block boundary.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
2010-10-11 15:10:17 -05:00
Scott Wood
ea533c260a cmd_nand: some infrastructure fixes and refactoring
- If the current device is overridden by a named partition,
  - update the caller's pointer/index, rather than copy over the
    nand_info struct, and
  - be sure to call board_nand_select_device even when the device
    is overridden by a named partition.
- Support 64-bit offsets/sizes in a few more places.
- Refactor arg_off_size for added readability and flexibility,
  and some added checks such as partition size.
- Remove redundant check for bad subcommands -- if there's no match
  it'll print usage when it gets to the end anyway.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
2010-10-11 15:09:54 -05:00
Scott Wood
f9a5254111 nand util: read/write: accept unaligned length
The underlying code in nand_base.c already supports non-page-aligned reads
and writes, but the block-skipping wrapper code did not.

With block skipping, an unaligned start address is not useful since you
really want to be starting at the beginning of a partition -- or at least
that's where you want to start checking for blocks to skip, but we don't
(yet) support that.  So we still require the start address to be aligned.

An unaligned length, though, is useful for passing $filesize to the
read/write command, and handling it does not complicate block skipping.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
2010-10-11 15:09:23 -05:00
Albert Aribaud
d778a2fbb3 orion5x: fix relocation-incompatible code
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-10-11 14:35:45 +02:00
Albert Aribaud
da90d4ce38 arm: bugfix: replace ble with blo in start.S files
Generalized misuse of ble within relocation and bss
initialization loops caused one iteration too many.
Instead of ble ('branch if lower or equal'), use
blo ('branch if lower').

While we're at it, fix all 'addreee' typos.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-10-11 10:28:43 +02:00
Wolfgang Denk
ddf71e4cff Merge branch 'at91' of git://git.denx.de/u-boot-atmel 2010-10-11 10:24:22 +02:00
Wolfgang Denk
e67f462864 Merge branch 'master' of git://git.denx.de/u-boot-imx 2010-10-11 10:19:04 +02:00
Wolfgang Denk
bfc7bea6ad Merge branch 'master' of git://git.denx.de/u-boot-x86 2010-10-11 10:00:34 +02:00
Wolfgang Denk
29840de6b6 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2010-10-11 09:56:34 +02:00
Wolfgang Denk
02b117d42b Merge branch 'sf' of git://git.denx.de/u-boot-blackfin 2010-10-11 09:52:16 +02:00
Timur Tabi
bfb707191a fsl: add support for NXID v1 EEPROM format
Freescale application note AN3638 describes an update to the NXID format,
which stores MAC addresses and related data on an on-board EEPROM.  The new
version adds support for up to 23 MAC addresses, instead of just 8.  Since
the initial implementation of NXID had a "0" in the 'version' field, this
new version is called "v1".

Boards that are shipped with EEPROMs in the NXID v1 format should define
CONFIG_SYS_I2C_EEPROM_NXID_1 instead of CONFIG_SYS_I2C_EEPROM_NXID.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:57:07 -05:00
Kim Phillips
e95a0611f2 powerpc/85xx: fix rev.2 job queue LIODN error storm
pumping line-rate traffic though a p4080 rev.2, which
is configured to encrypt packets prior to forwarding through
an IPsec tunnel, gets this error:

of_platform ffe302000.jq: DECO: desc idx 22: LIODN error. DECO was trying
to share from itself or from another DECO but the two Non-SEQ LIODN
values didn't match or the "shared from" DECO's Descriptor required that
the SEQ LIODNs be the same and they aren't.

Since high traffic rates cause DECOs to begin to start sharing
shared descriptors amongst themselves, and DECOs inherit job queue
LIODNs when accessing shared descriptors, and a recently discovered
rev.2 h/w erratum requires all sharing job queues in a partition
have same liodn assignment, reassign the first job queue's liodn
assignment to the rest.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Kumar Gala
3c6a22b962 powerpc/p4080: Add new CPC register - HDBCR0
Manual was updated to add a new register for disabling CDQ speculation.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Kumar Gala
1bf8e9fd74 powerpc/85xx: Add support for 4th PCI controller on corenet_ds
We configure the controller but dont have virtual address space thus any
devices on the 4th controller are not accessible in u-boot.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Emil Medve
c2b3b6408b powerpc/corenet_ds: Various updates to initial env cfg
* Make the U-Boot update command sequence conditional.  Helps prevent
  accidental erasing if an upload or previous step fails
* Make it easier to update other FLASH banks
* Enable DDR controller cache line interleaving and bank cs0/cs1 by default

Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Timur Tabi
3addcb9343 fsl: verify writes to the MAC address EEPROM
Update the code which writes to the on-board EEPROM so that it can detect if
the write failed because the EEPROM is write-protected.  Most of the 8xxx-class
Freescale reference boards use an AT24C02 EEPROM to store MAC addresses and
similar information.  With this patch, if the EEPROM is protected, the
"mac save" command will display an error message indicating that the write
has not succeeded.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Timur Tabi
a2d12f8812 p1022ds: add audclk hwconfig setting to enable codec reference clock
The Freescale P1022DS can use either a 12.288MHz or a 11.2896MHz reference
clock for the audio codec, but by default both are disabled.  Add a 'audclk'
hwconfig option that allows the user to choose which clock he wants.

The 12.288MHz clock allows the codec to use sampling rates of 16, 24, 32, 48,
64, and 96KHz.  The 11.2896 clock allows 14700, 22050, 29400, 44100, 58800, and
88200Hz.

Also configure a pin muxing to select some SSI signals, which will disable
I2C1.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Haiying Wang
b6bde93090 mpc8569mds: fix some ddr settings
Enable half drive strength, set RTT to 60Ohm and set write leveling override.

Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Haiying Wang
3aed550742 mpc8569mds: fix consuming long time while relocating code.
The original code maps boot flash as non-cacheable region. When calling
relocate_code in flash to copy u-boot from flash to ddr, every loop copy command
is read from flash. The flash read speed will be the bottleneck, which consuming
long time to do this operation. To resovle this, map the boot flash as
write-through cache via tlb. And set tlb to remap the flash after code
executing in ddr, to confirm flash erase operation properly done.

Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Haiying Wang
1b8e4fa1a0 mpc8569mds: fix CONFIG_ENV_SIZE
CONFIG_ENV_SIZE of MPC8569MDS was wrongly set to CONFIG_ENV_SECT_SIZE which
is 128KB, so it took longer time to do crc32 calculation for ENV than it should
do. It causes the bootup for MPC8569MDS significantly slow. This patch fixs it
to 0x2000(8KB), also fix the comment for CONFIG_ENV_SECT_SIZE to correct size.

Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-10-07 09:49:47 -05:00
Graeme Russ
c868af3e57 x86: Implement fully relocatable image
u-boot.bin can be loaded at any 4-byte aligned memory location and directly
'jumped' to using the 'go' command using the load address as the start
address. Doing so performs a 'warm boot' which skips memory initialisation
and other low-level initialisations, relocates U-Boot to upper memory and
starts U-Boot in RAM as per normal 'cold boot'
2010-10-07 20:03:33 +11:00
Graeme Russ
f2ff75c0a2 x86: Use loops instead of memcpy/memset in board_init_f
Provides a small speed increase and prepares for fully relocatable image.
Downside is the TEXT_BASE, bss, load address etc must ALL be aligned on a
a 4-byte boundary which is not such a terrible restriction as everything
is already 4-byte aligned anyway
2010-10-07 20:03:33 +11:00
Graeme Russ
2219142658 x86: Rearrange linker script
Tidy up the linker script and discard some sections to save space
2010-10-07 20:03:32 +11:00
Graeme Russ
067f9b1071 x86: Rename linker script symbols
Create more generic names for the symbols exported from the linker script
2010-10-07 20:03:31 +11:00
Graeme Russ
c81b26beb8 x86: Set cold/warm boot flag 2010-10-07 20:03:30 +11:00
Graeme Russ
161b3589ea x86: Place global data below stack before entering C
By reserving space for the Global Data immediately below the stack during
assembly level initialisation, the C declaration of the static global data
can be removed, along with the 'RAM Bootstrap' function. This results in
cleaner code, and the ability to pass boot-up flags from assembler into C
2010-10-07 20:03:29 +11:00
Graeme Russ
5a3876d2ac x86: Dont clobber %eax after getting memory size
By using another register, reduce code size by one instruction
2010-10-07 20:03:28 +11:00
Graeme Russ
5f2679055d x86: Don't clobber %ebx
%ebx will hold low-level boot flags and must be preserved
2010-10-07 20:03:28 +11:00
Graeme Russ
88fa0a6eb9 x86: Remove usage of %ebp as a return pointer
Using %ebp as a return pointer prevents creating 'load anywhere' images
2010-10-07 20:03:27 +11:00
Graeme Russ
00940a229d x86: Move ECC initialisation outside RAM initialisation
To allow for 'load anywhere' images, the %ebp return pointer 'hack' must
be removed, so we cannot have two 'calls' to get_mem_size
2010-10-07 20:03:26 +11:00
Graeme Russ
6ae032a86a x86: Remove progress indication in low-level init
Progress indication is not relocation friendly so remove it in
preperation for full relocatability support
2010-10-07 20:03:24 +11:00
Graeme Russ
7228efa3cb x86: Fix %ss and %esp in register structure for interrupts 2010-10-07 20:03:23 +11:00
Graeme Russ
5c161653db x86: Change compiler options
Change to:
 - reparam=3
 - no-from-pointer
 - no-stack-protector
 - preferred-stack-boundary=2
 - no-top-level-reorder

These options make the code a little smaller and faster
2010-10-07 20:03:23 +11:00
Graeme Russ
8ffb2e8f33 x86: Coding Style Cleanup
Perform some basic code cleanups of the x86 files
2010-10-07 20:03:21 +11:00
Graeme Russ
59c6d0ef9a x86: Move loading of GTD to C code
Linux has C macros and code to load the GTD after switching to Protected
Mode. Using these greatly simplifies the assembler code
2010-10-07 20:03:21 +11:00
Graeme Russ
d664adb6bb x86: use gc sections to reduce image size
Follow the discussion of Charles Manning and Mike Frysinger.
Using gc_sections helps reduce image size.
2010-10-07 20:03:20 +11:00
Graeme Russ
abe98f49e1 x86: zboot update
The header of recent Linux Kernels includes the size of the image, and
therefore is not needed to be passed to zboot. Still process the third
parameter (size of image) in the event that an older kernel is being loaded
2010-10-07 20:03:19 +11:00
Graeme Russ
de25059404 x86: Use TEXT_BASE in linker scripts
Use TEXT_BASE rather than a hard-coded base address on x86 linker scripts.
This will allow any board to define its base link address without having
to modify the linker script
2010-10-07 20:03:18 +11:00
Graeme Russ
76d5763a49 x86: Make CONFIG_RELOC_FIXUP_WORKS generic for all x86 boards
Relocation is not board-specific for the x86 architectrure, so
CONFIG_RELOC_FIXUP_WORKS can be defined globally in the config.h
2010-10-07 20:03:18 +11:00
Graeme Russ
458379d674 x86: Remove bi_env from do_bdinfo
Commit 55e97429d1 removed the definition
from /arch/i386/include/asm/u-boot.h but not its usage in do_bdinfo()
2010-10-07 20:03:17 +11:00
Stefano Babic
f8f8acd724 MX51: Support for TTECH vision2 board
The patch adds support for TTECH vision2 board.
The board has 512MB RAM, SDHC slot and 4MB SPI
device from StMicron.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-10-07 10:14:04 +02:00
Reinhard Meyer
21032b35a0 sspi: add options to specify bus and mode
and clean up error messages and help,
removed pointless debug() call.

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-06 20:50:38 -04:00
David Jander
ff0dc2c433 sf: spansion: add support for S25FL032P parts
This patch introduces an extra mask-field in spansion_spi_flash_params
to support flash chips with 1-byte extended ID (like the S25FL032P).

Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-06 20:50:38 -04:00
Marc-André Hébert
c3cb09207f sf: spansion: fixing erasing when sector size >64KiB
The spansion_erase currently only works when the sector size is 64KB.
cmd[1] should contain the higher 8 bit of the 24 bit address of the
sector to be erased. Currently it is holding the sector index to be
erased which happens to be the same thing when the sector size is
64KB.

Signed-off-by: Marc-Andre Hebert <marc-andre.hebert@humanware.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-06 20:50:38 -04:00
Andreas Bießmann
5933645904 include/compiler.h: remove uint typedef for __MACH__
uint is typedefed twice if __MACH__ is defined. This generates an error
when calling MAKEALL for netstar bord on OS X.

This patch removes the typedef for __MACH__ case in favor of general
definiton some lines below.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2010-10-06 23:09:42 +02:00
Peter Tyser
8804ae3b7a Replace MAX_CMDBUF_SIZE references with CONFIG_SYS_CBSIZE
The MAX_CMDBUF_SIZE define is unneeded as it should always
equal CONFIG_SYS_CBSIZE.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-10-06 23:02:37 +02:00
Jeff Dischler
7d85f1dc5c ds1621: Fix negative temperature readings
Fix bug where signed data was processed as unsigned.  The bug previously
resulted in negative temperature readings wrapping around, eg -10 became
245.

Signed-off-by: Jeff Dischler <jdischler@xes-inc.com>
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-10-06 23:01:22 +02:00
Peter Tyser
9a6c80b0cf ds1621: Clean up coding style
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-10-06 23:01:21 +02:00
Peter Tyser
c3e5fa0b53 ds1621: Poll for register write completion
Poll the ds1621 NV Memory Busy bit instead of waiting a static amount of
time for register writes.

Also add config retister bit defines.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2010-10-06 23:01:19 +02:00
Andreas Bießmann
fc5fc76bda lib/hashtable.c: add CONFIG_ENV_MIN_ENTRIES
This patch adds a new config parameter for adjusting the calculation of
hash table size when importing a buffer.

When importing a extremely small buffer (e.g. the default_environment)
the old calculation generated a hash table which could hold at most the
buffer content but no more entires.

The new calculation add a fixed number of entries to the result to fit
better for small import buffers. This amount may be configured by the
user in board file to adjust the behaviour.

Signed-off-by: Andreas Biemann <andreas.devel@googlemail.com>
2010-10-06 22:46:35 +02:00
Mike Frysinger
f44a928e7e cmd_elf: add an option for loading ELFs according to PHDRs
The current ELF loading function does a lot of work above and beyond a
simple "loading".  It ignores the real load addresses and loads things
into their virtual (runtime) address.  This is undesirable when we just
want it to load an ELF and let the ELF do the actual C runtime init.

So add a command line option to let people choose to load via either the
program or section headers.  I'd prefer to have program header loading
be the default, but this would break historical behavior, so I'll leave
section header loading as the norm.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-06 22:42:14 +02:00
Andre Schwarz
76221a6cfa PowerPC: change board specific early pci_init() into generic.
Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
2010-10-06 22:37:35 +02:00
Stefan Roese
e64901c01a serial.c: Fix build breakage introduced with commit e3c78c9b
This patch fixes the compilation problem introduced with commit
e3c78c9b [ppc4xx: Remove now unused CONFIG_UART1_CONSOLE]:

-> ./MAKEALL TB5200
Configuring for TB5200 board...
serial.c: In function '__default_serial_console':
serial.c:94: warning: no return statement in function returning non-void

I accidentally removed an "#else" line. This patch adds it back.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-06 22:35:49 +02:00
Heiko Schocher
60f7da1f42 env: fix cmd_env_sub fct pointers if CONFIG_RELOC_FIXUP_WORKS is not defined
commit ea882baf9c introduces
a command_sub_table for the "env" command. On arm, avr32, m68k,
mips and sparc architectures, relocation needs manual fixups,
so add these fixups for this sub command table too.

Tested on arm/qong board.
          mips board (Ben NanoNote) from Xiangfu Liu
          arm/AT91 board from Reinhard Meyer

Signed-off-by: Heiko Schocher <hs@denx.de>

cc: Wolfgang Denk <wd@denx.de>
cc: Shinya Kuribayashi <skuribay@ruby.dti.ne.jp>
cc: Xiangfu Liu <xiangfu@openmobilefree.net>
cc: Reinhard Meyer <u-boot@emk-elektronik.de>
cc: sshtylyov@mvista.com
2010-10-06 22:34:30 +02:00
Peter Tyser
a7d54346e0 board/mpl: Remove mpl-specific memory test command
The mpl-specfic memory test is only documented for one board, doesn't
compile cleanly, uses improper coding style, and overlaps functionality
with U-Boot's common 'mtest' command, so lets get rid of it.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
CC: d.peter@mpl.ch
CC: d.mueller@elsoft.ch
CC: wd@denx.de
2010-10-06 22:25:38 +02:00
Steve Sakoman
a2f69d35f9 env_mmc: Fix broken build due to set_default_env() change
Previously the function was set_default_env(void), it is now
set_default_env(const char *s). This patch adds the required
parameter. This fixes a broken build on OMAP4430 SDP.

Signed-off-by: Steve Sakoman <steve.sakoman@linaro.org>
2010-10-06 22:23:30 +02:00
Wolfgang Denk
dff07e18e5 CCM: remove code for yet another corpse
The CCM board has long reached EOL, and support for it is no longer
relevant in current versions of U-Boot.  Remove it.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-06 22:22:26 +02:00
Wolfgang Denk
544d97e9aa PCU_E: remove code for yet another corpse
The PCU_E board has long reached EOL, and support for it is no longer
relevant in current versions of U-Boot.  Remove it.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-06 22:22:24 +02:00
Wolfgang Denk
6f984adb31 pm9g45: fix compile warning
Fix warning:

	pm9g45.c: In function 'pm9g45_macb_hw_init':
	pm9g45.c:99: warning: unused variable 'pio'

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Ilko Iliev <iliev@ronetix.at>
2010-10-06 22:21:14 +02:00
Wolfgang Denk
65a14cadff pm9263: fix compile warning
Fix warning:

	pm9263.c: In function 'pm9263_macb_hw_init':
	pm9263.c:99: warning: unused variable 'pio'

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Ilko Iliev <iliev@ronetix.at>
2010-10-06 22:21:09 +02:00
Wolfgang Denk
b15fbd4996 rules.mk: make sure we always create a .depend file
There are some cases where "make depend" would always run when
entering a directory.  This happened when both the $(SRCS) and
$(HOSTSRCS) lists were empty (which is for example typical for the
examples/api/ directory).  Avoid this by making sure that a ".depend"
file gets always created, even if empty.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-10-06 22:19:58 +02:00
Graeme Smecher
74f9e0d8a0 sf: winbond: add support W25Q64 parts
Adds support for Winbond's W25Q64 SPI flash. These devices are used on
(among others) Xilinx' SP601 and SP605 Spartan-6 evaluation boards.
Tested with "sf" commands.

Signed-off-by: Graeme Smecher <graeme.smecher@mail.mcgill.ca>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-06 03:34:10 -04:00
Alexander Stein
c8f6d84d10 at91: Add arch_preboot_os which disables PIT in a faster way
When disabled the PIT runs until it reaches the CPIV value.
The Linux PIT driver stops the PIT and waits until it stopped. This can
take over 100ms. Simply stopping in u-boot isn't sufficient as the PIT
will still be running when Linux is waiting until it stopped.
So, we stop it in u-boot by setting the compare value to a value slightly
greater than the current running counter to make the PIT stopped in short
time.

Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
2010-10-05 16:58:57 +02:00
Andreas Bießmann
125637c572 atmel_usart: change register access to C structure
This patch introduces C structure definition for register footprint of atmel's
 usart.

Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
2010-10-05 16:58:56 +02:00
Andreas Bießmann
b944ad22b4 at91_emac.h: fix typo in register definition
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Jens Scharsig <js_at_ng@scharsoft.de>
2010-10-05 16:58:56 +02:00
Reinhard Meyer
6341c5cf87 AT91: convert cpu.c to struct SoC access
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-10-05 16:58:56 +02:00
Andreas Bießmann
38bda019e4 at91_emac.c: poll for IDLE when writing PHY
This patch replaces the unnecessary waiting in at91emac_read() and
at91emac_write() by checking the IDLE flag.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2010-10-05 16:58:55 +02:00
Andreas Bießmann
4b8d77bb93 at91_emac.c: fix 'Warning: eth device name has a space!'
This patch also removes conditional nameing of at91_emac driver whether it's
connection to PHY is RMII or MII.

Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2010-10-05 16:58:55 +02:00
Wolfgang Denk
d628866474 Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2010-10-05 14:42:32 +02:00
Wolfgang Denk
db682a0b59 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2010-10-05 14:37:25 +02:00
Wolfgang Denk
bbf2abc0f5 Merge branch 'next' of git://git.denx.de/u-boot-video 2010-10-05 14:31:48 +02:00
Rupjyoti Sarmah
709d9481e9 ppc44x: config GPIOs for USB on canyonlands board
The GPIO 16 and 19 reconfiguration should be done once USB is initialized.
So moved the reconfiguration to the USB init  function.

Signed-off-by: Rupjyoti Sarmah <rsarmah@apm.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-04 11:23:59 +02:00
Stefan Roese
eb011d27aa ppc4xx: Remove some testing hacks from ppc4xx.h
I accidentally left these hacks in the code while doing the big header
cleanup. Let's remove it now.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-04 11:20:11 +02:00
Stefan Roese
5d7c73e65b ppc4xx: Use common ns16550 functions in 4xx UART POST driver
This patch changes the PPC4xx POST UART driver to use the common
NS16550 functions for receiving and sending. Additionally the
local function for SoC divisor setup are removed. Instead the
functions from arch/powerpc/cpu/ppc4xx/4xx_uart.c are used. This
removes code duplication.

Also the common CONFIG_SYS_NS16550_COMx defines are now used
to describe the POST UART's.

And a compile breakage is fixed, introduced by a git merge of
the ppc4xx/next branch into master. Now "ppc4xx.h" is moved to
"asm/ppc4xx.h". Fixed as well with this patch.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-04 11:20:02 +02:00
Stefan Roese
98303292ad ppc4xx: Small whitespace cleanup in canyonlands.c
Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-04 11:19:56 +02:00
Stefan Roese
2778a01431 ppc4xx/fdt/flash: Fix bug in fdt_fixup_nor_flash_node()
This patch fixes a bug in fdt_fixup_nor_flash_node() when the reg
property has multiple reg tuples, like:

	reg = <0 0x00000000 0x04000000
	       0 0x04000000 0x04000000>;

In this case this function did not update the reg property correctly.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-04 11:19:49 +02:00
Stefan Roese
c96be63aab ppc4xx: Add defines for COM3 & COM4 (UART2 & UART3) on 440EPx/GRx
Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-04 11:19:43 +02:00
Sascha Laue
f14ae4180a ppc4xx: Big lwmon5 board support rework/update
This patch brings the lwmon5 board support up-to-date. Here a
summary of the changes:

lwmon5 board port related:
- GPIO's changed to control the LSB transmitter
- Reset USB PHY's upon power-up
- Enable CAN upon power-up
- USB init error workaround (errata CHIP_6)
- EBC: Enable burstmode and modify the timings for the GDC memory
- EBC: Speed up NOR flash timings

lwmon5 board POST related:
- Add FPGA memory test
- Add GDC memory test
- DSP POST reworked
- SYSMON POST: Fix handling of negative temperatures
- Add output for sysmon1 POST
- HW-watchdog min. time test reworked

Additionally some coding-style changes were done.

Signed-off-by: Sascha Laue <sascha.laue@liebherr.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-04 11:19:35 +02:00
Tirumala Marri
d0e6665a24 APM821xx: Add bluestone board support
Add support code for bluestone board wth APM821XX processor based.
This patch includes early board init, misc init, configure EBC,
initializes UIC, MAKEALL, board.cfg and MAINTAINERS file.

Signed-off-by: Tirumala R Marri <tmarri@apm.com
Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-04 11:17:38 +02:00
Tirumala Marri
1b8fec1393 APM821xx: Add CPU support
APM821XX is a new line of SoCs which are derivatives of
PPC44X family of processors. This patch adds support of CPU, cache,
tlb, 32k ocm, bootstraps, PLB and AHB bus.

Signed-off-by: Tirumala R Marri <tmarri@apm.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-10-04 11:15:02 +02:00
Wolfgang Denk
dd09985499 hmi1001, mucmc52, uc100, uc101: move boards to vendor directory
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Roderik Wildenburg <roderik.wildenburg@manroland.com>
2010-10-04 10:58:38 +02:00
Wolfgang Denk
d483a22eca CONFIG_SYS_ARM_WITHOUT_RELOC: document feature removal
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-10-04 10:56:25 +02:00
Mike Frysinger
fcbd5b73d7 Blackfin: otp: fix build after constification of args[]
The OTP code does a little shuffling of arguments that aren't really
necessary, so use a local variable instead to fix build errors now
that the args[] parameter is const.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:40 -04:00
Mike Frysinger
4c95ff6419 Blackfin: bf537-pnav: increase monitor len
Building this board for parallel flash fills up the bss section and thus
fails to link, so bump up the monitor size a bit.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:40 -04:00
Mike Frysinger
504af55edf Blackfin: bf527-ad7160-eval: fix GPIO CS define
Rather than use a hardcoded "7", use the new Blackfin global define.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:40 -04:00
Mike Frysinger
abaa5ba4e3 Blackfin: bf548-ezkit: bump SPI flash size up
The current size used (256KiB) is smaller than the LDR created for
the bf548-ezkit, so 'run update' doesn't work correctly.  So bump
up the size a bit by making this flexible per-board config.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:40 -04:00
Mike Frysinger
d3c07a5d24 Blackfin: fix MMC init output alignment
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:40 -04:00
Wojtek Skulski
3bbed7f88a Blackfin: blackvme: new board port
The board includes:
 * ADSP-BF561 rev. 0.5
 * 32-bit SDRAM (2 * MT48LC16M16A2TG or MT48LC32M16A2TG)
 * Gigabit Ether AX88180 (ASIX) + 88E1111 rev. B2 (Marvell)
 * SPI  boot flash on PF2 (M25P64 8MB, or M25P128 16 MB)
 * FPGA boot flash on PF3 (M25P64 8MB, or M25P128 16 MB)
 * Spartan6-LX150 (memory-mapped; both PPIs also connected)
 * See http://www.skutek.com/

Signed-off-by: Wojtek Skulski <skulski@pas.rochester.edu>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:40 -04:00
Mike Frysinger
48c00fe25c Blackfin: propagate target cpu defines when building embedded env
Since we're no longer extracting the env from the target ELF file (since
upstream wouldn't take that change), we're back to the problem of cpu
defines not properly propagating to the env setup stage.  So the embedded
env built by the host compiler doesn't match the one that is linked into
the u-boot env.

Reported-by: Vivi Li <vivi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:40 -04:00
Mike Frysinger
cec11d5014 Blackfin: cmd_gpio: accept upper case pin names
The intention all along was to accept pin names irrelevant of their case.
But I guess I forgot to test/implement support for that.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:40 -04:00
Mike Frysinger
301e66a956 Blackfin: bf526-ezbrd: enable BootROM-OOB layout when booting from NAND
We need to use the Blackfin BootROM-specific OOB layout when we boot out
of NAND as that is what the on-chip ROM expects.

Also need to increase the monitor size a little to accommodate the extra
NAND code overhead.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:39 -04:00
Mike Frysinger
4cd4c2d20a Blackfin: adi config: enable nand lock/unlock support
We use the lock/unlock options in our default nand code, so enabl
support for the options.

Reported-by: Vivi Li <vivi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:39 -04:00
Peter Meerwald
063993299f Blackfin: bct-brettl2: new board port
Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:39 -04:00
Mike Frysinger
56f0c57b4b Blackfin: adi config: allow boards to tweak a little more
Let people easily override bootdelay and network settings.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:39 -04:00
Mike Frysinger
73b6f4046b Blackfin: cmd_gpio: return gpio value to caller
Make the GPIO command usable in a scripting environment by returning
the GPIO value rather than always 0.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:39 -04:00
Mike Frysinger
581e97df38 Blackfin: bf527-sdp: new board port
Support for the Blackfin System Development Platform (SDP) base module.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:39 -04:00
Mike Frysinger
c2d8b9652e Blackfin: adi config: add a hook for boards to append the env
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:39 -04:00
Mike Frysinger
f453220c1e Blackfin: adi config: add an "all spi flashes" option to unify board lists
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:39 -04:00
Peter Meerwald
68409f844f Blackfin: support a 3rd gpio cfi pin
Signed-off-by: Peter Meerwald <pmeerw@pmeerw.net>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:39 -04:00
Mike Frysinger
1729615875 Blackfin: cmd_gpio: document/extend input sub-option
The input sub command was missing from the help text, and it didn't show
the actual value currently read on the GPIO.  This allows people to read
the value of input pins.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:39 -04:00
Mike Frysinger
821ad16fa9 Blackfin: move CONFIG_BFIN_CPU to board config.mk
The CONFIG_BFIN_CPU option is largely used in the build system, so move
it out of the board config.h and into the board config.mk.  It'd be nice
to keep everything in the config.h, but the patch to extract that value
early was rejected.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:38 -04:00
Mike Frysinger
543ef36586 Blackfin: bf561: merge headers
Only the BF561 port was using the common dual core headers, so merge them
into the BF561 specific headers.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:38 -04:00
Mike Frysinger
c489762ac2 Blackfin: bf533: merge headers
Only the BF533 port was using the common extended headers, so merge them
into the BF533 specific headers.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:38 -04:00
Mike Frysinger
9615398dc2 Blackfin: unify core MMRs
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:38 -04:00
Mike Frysinger
aa79cbbf27 Blackfin: bf52x: unify arch header duplication
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:38 -04:00
Mike Frysinger
9d291d816b Blackfin: bf537: unify arch header duplication
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:38 -04:00
Mike Frysinger
94e3e444de Blackfin: punt old *p style volatile MMR defines
These are unused now, so punt them to clean things up.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:38 -04:00
Mike Frysinger
d56b7068ce Blackfin: bf527-ad7160-eval: convert from old style MMR macros
The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:37 -04:00
Mike Frysinger
5182186e8f Blackfin: cm-bf548: video: convert from old style MMR macros
The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:37 -04:00
Mike Frysinger
bf0a29ca11 Blackfin: bf548-ezkit: video: convert from old style MMR macros
The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:37 -04:00
Mike Frysinger
989ab87e15 Blackfin: bf527-ezkit: video: convert from old style MMR macros
The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:37 -04:00
Mike Frysinger
0049053ff3 Blackfin: bf537-stamp: post: update old MMR style macros
The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.

For the GPIO MMR usage, convert to the new GPIO framework.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:37 -04:00
Mike Frysinger
0c7148170b Blackfin: bfin_mac: convert from old style MMR macros
The old MMR defines are being scrubbed, so convert the driver to use the
new standard helper macros.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:37 -04:00
Mike Frysinger
f47a5a83a2 Blackfin: punt headers for non-existent BF541
There is no BF541 processor variant, so punt headers for it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:37 -04:00
Mike Frysinger
71dcc2c2b1 Blackfin: unify gpio cfi implementations
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:37 -04:00
Mike Frysinger
6815f540db Blackfin: bfin_sdh: clean up send_cmd
Simplify the command setup and status checking steps, and add a proper
timeout to the status polling code to avoid possible infinite hangs.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:37 -04:00
Mike Frysinger
6f070e1867 Blackfin: bfin_spi: add optional DMA support
This moves the last piece from the old spi_flash driver to the new SPI
framework -- optional DMA RX support.  This typically cuts speeds by ~40%
at the cost of additional ~300 bytes.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:36 -04:00
Mike Frysinger
2c0a6f2d4f Blackfin: add support for BF51x parts
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:36 -04:00
Mike Frysinger
180e311f28 Blackfin: add support for BF538/BF539 processors
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-10-02 16:00:36 -04:00
Stefano Babic
f3554dfdd9 MX51: Register definitions cannot be included in board config file
Due to wrong dependencies, it is not possible to include imx_regs.h
inside the board configuration file.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-09-30 14:42:14 +02:00
Stefano Babic
2f721d1733 MXC: Fix byte-ordering in SPI driver for i.MX31/i.MX51
The actual SPI driver for i.MX31 and i.MX51 controller
use a wrong byte ordering, because it is supposed
to work only with Freescale's devices, as the Power
Controllers (PMIC). The driver is not suitable for
general purposes, because the buffers passed to spi_xfer
must be 32-bit aligned, as it is used mainly to send
integer to PMIC devices.

The patch drops any kind of limitation and makes the
driver useful with devices controlled sending commands
composed by single bytes (or by a odd number of bytes), such as
spi flash, sensor, etc.

Because the byte ordering is changed,
any current driver using this controller must be adapted, too.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-09-30 14:42:14 +02:00
Stefano Babic
9f481e95ba MXC: Correct SPI_CPOL setting in SPI driver
The handling of the SPI_CPOL bit inside the SPI
driver was wrong. As reported by the manual,
the meaning of the SSPOL inside the
configuration register is the same as reported
by SPI specification (0 if low in idle, 1 is high
on idle). The driver inverts this logic.

Because this patch sets the logic as specified, it is required
to clear the CPOL bit in the configuration file to adapt
to the correct logic.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: David Jander <david.jander@protonic.nl>
2010-09-30 14:42:13 +02:00
Stefano Babic
4d0e49d336 MX51: Drop unused header file for mx51evk
As stated in 2720178533,
the mx51evk has not CPLD and all references must be removed.
This patch drop a .h file that still remains in board
directory.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-09-29 11:24:31 +02:00
Stefano Babic
4ec3d2a745 MXC: Add watchdog support to serial driver
Calls WATCHDOG_RESET() inside serial driver
for boards enabling watchdog.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-09-29 11:24:31 +02:00
Stefano Babic
9583dfab1d MX51: add structure to access System Reset Controller
Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-09-29 11:24:31 +02:00
Stefano Babic
35af33da00 MX51: Added pins definition to set up pads
Add pins definitions to set up RAM pads. Pins have only
a pad, there is no entry in the multiplexer.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-09-29 11:24:31 +02:00
Stefano Babic
87d98d3b8e ARM: Use syslib functions for all CORTEXA8
The OMAP3 cpu directory contains a syslib file with some utilities
that can be shared by all targets using arm cortexa8 processors,
not only OMAP.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-09-29 11:24:31 +02:00
Stefano Babic
c4ea142424 Use common function to set GPIOs for MX3 and MX5
The patch adds support for setting gpios to the
MX51 processor and change name to the corresponding
functions for MX31. In this way, it is possible to get rid
of nasty #ifdef switches related to the processor type.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-09-29 11:24:30 +02:00
Wolfgang Denk
2e6e1772c0 Merge branch 'next' of /home/wd/git/u-boot/next
Conflicts:
	include/ppc4xx.h

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-28 23:30:47 +02:00
Wolfgang Denk
1e4e5ef046 Prepare v2010.09
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-28 23:20:55 +02:00
Wolfgang Denk
949c80e100 mpc512x: fix build issues
Commit 800eb0964 "POST cleanup." removed file
arch/powerpc/cpu/mpc512x/common.c but failed to remove the reference
to it from arch/powerpc/cpu/mpc512x/Makefile which causes somewhat
obscure build errors:

make[1]: *** No rule to make target `/work/wd/tmp-ppc/arch/powerpc/cpu/mpc512x/.depend', needed by `_depend'.  Stop.

Fix these.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-28 23:02:05 +02:00
Steve Sakoman
e299e3f7a3 ARMV7: OMAP3: Update Beagle xM pinmux with USB hub and DVI gpio setup
This patch adds missing pinmux setup for 4 GPIO signals used on the Beagle xM:
 - USB hub reset (gpio_56)
 - P8 USB hub reset (gpio_63)
 - DVI enable (gpio_129)
 - P8 DVI enable (gpio_170)

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-28 13:54:47 -04:00
Aneesh V
7ca3f9c568 ARMV7: OMAP4: Calculate SDRAM size
Calculate the SDRAM size from DMM configuration registers instead of using
hard-coded values. This gives correct values for all different boards.

It's assumed that DMM sections do not overlap memory areas.

Signed-off-by: Aneesh V <aneesh@ti.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-28 13:54:43 -04:00
Steve Sakoman
c1244e852f ARMV7: OMAP4: Fix Panda pinmux setting to enable Wifi/BT Module
This patch corrects the pinmux settings to enable proper functioning
of the wifi/bluetooth module.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-28 13:54:37 -04:00
Thomas Weber
85d3eba90d ixp/npe: Remove duplicated comment
Signed-off-by: Thomas Weber <weber@corscience.de>
2010-09-28 14:48:44 +02:00
Thomas Weber
68c3d64391 bmw: Remove duplicated include of header file
Signed-off-by: Thomas Weber <weber@corscience.de>
2010-09-28 14:47:23 +02:00
Torkel Lundgren
3df6195793 Add support for operating system OSE
Add OSE as operating system for mkimage and bootm.

Signed-off-by: Torkel Lundgren <torkel.lundgren@enea.com>
2010-09-28 14:42:26 +02:00
Thomas Weber
360d883aa0 README: Fix description of version numbering scheme
The version numbering scheme was changed in Oct, 2008.
This patch brings the documentation to the actual level.
The description is taken from:
http://www.denx.de/wiki/U-Boot/ReleaseCycle

Signed-off-by: Thomas Weber <weber@corscience.de>

Changed text slightly.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-28 14:37:58 +02:00
Karl Beldan
86af10cac4 Fix "ubi part" cmd re-entrancy
Commit 2ee951ba (UBI: Enable re-initializing of the "ubi part" command)
reset mtd_devs in ubi_exit() but missed ubi_init()'s failure path.

Signed-off-by: Karl Beldan <karl.beldan@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-27 15:06:00 +02:00
Alexander Stein
cdfcedbf25 atmel_lcd: Allow contrast polarity to be either positive or negative
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
2010-09-25 15:22:51 +02:00
Timur Tabi
55b05237b9 p1022ds: use weak CFI flash accessors when DIU is enabled
On the Freescale P1022, the DIU and the LBC share address pins, which means
that when the DIU is active (e.g. the console is on the DVI display), NOR flash
cannot be accessed.  So we use the weak accessor function feature of the CFI
flash code to temporarily switch the pin mux from DIU to LBC whenever we want
to read or write flash.  This has a significant performance penalty, but it's
the only way to make it work.

This change allows the 'saveenv' command to work when the video display is
enabled.  Erasing flash and writing to flash (with the 'cp' command) works,
but reading from flash (with the 'md' and 'cp' commands) does not.  Also, while
flash is being written, the video display will be blank.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-09-25 14:42:11 +02:00
Timur Tabi
d5e01e49f8 p1022ds: add video support
Add support for the DIU controller.  If CONFIG_VIDEO is defined, then
the console will appear on a DVI monitor instead of the serial port.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-09-25 13:10:10 +02:00
Anatolij Gustschin
9e70d1378c fsl_diu_fb: further refactoring of FSL DIU code
Move common code to the fsl_diu_fb.c file and remove obsolete
code from board files (aria, mpc8610hpcd and pdm360ng).
Move fsl_diu_fb.h file to the include directory.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-09-25 13:10:03 +02:00
Wolfgang Denk
d03161b455 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2010-09-23 21:16:32 +02:00
Peter Tyser
6aa3d3bfaa 83xx: Remove warmboot parameter from PCI init functions
This change lays the groundwork for the BOOTFLAG_* flags being removed.

This change has the small affect of delaying 100ms on PCI initialization
after a warm boot as opposed to the optimal 1ms on some boards.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>

included the mpc8308_p1m board.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-23 21:14:42 +02:00
Kim Phillips
9eda770b46 mpc83xx: extend CONFIG_SYS_BOOTMAPSZ increase to mpc8308_p1m
continuation of commit 39da1ba923d55f316f9f1bb3a960e4ed91dc17ac:
"e300: increase CONFIG_SYS_BOOTMAPSZ to allow booting large kernels"

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-23 21:14:33 +02:00
Kim Phillips
654d49b401 mpc83xx: fix pcie build warning
Configuring for MPC8308RDB board...
pcie.c: In function 'mpc83xx_pcie_register_hose':
pcie.c:143: warning: assignment makes pointer from integer without a cast

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-23 21:14:25 +02:00
Ilya Yanok
bc8f8c2614 mpc8308_p1m: support for MPC8308 P1M board
This patch provides support for MPC8308 P1M board with the following
set of features:
 Dual UART is supported
 NOR flash is supported
 Both TSEC Ethernet controllers are supported
 PCI Express initialization is supported
 Both I2C controllers are supported

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-23 21:14:17 +02:00
Ilya Yanok
65ea758939 MPC8308RDB: various clean ups
This patch cleans up the Freescale MPC8308RDB Development board support.
Things fixed:
 - Removed unused PCIE2 definitions from configuration
 - SICR{L,H} defines used for System I/O Configuration Registers values
   instead of hardcoding
 - CONFIG_SYS_SCCR_PCIEXP1CM used to enable PCIE clock instead of
   writing to SCCR from the board code
 - sleep mode stuff removed as MPC8308 has no support for deep sleep and
   PMCCR1 register. board_early_init_f() removed.
 - MPC8308 has no ERRATA for DDR controller so workaround removed
 - 'assignment in if statement' issues solved
 - use LBLAWAR_* defines instead of hardcoding

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-23 21:14:08 +02:00
Ilya Yanok
f3ce250d96 mpc8308: add SICR{L,H} fields definitions
This patch adds defines to set supported fields in System I/O
Configuration Registers High and Low on Freescale MPC8308 CPU.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-23 21:14:02 +02:00
Ilya Yanok
f1371048ab mpc83xx: add support for setting PCIE clocks
This patch adds support for setting PCIE clocks in cpu_init.c by
providing CONFIG_SYS_SCCR_PCIEXP{1,2} in configuration.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-23 21:13:56 +02:00
Ilya Yanok
bab00b95b7 mpc83xx/pcie: make it compile with PCIE2 unconfigured
MPC8308 has only one PCIE host controller so we want it to compile
without CONFIG_SYS_PCIE2_CFG_{BASE,SIZE} defined.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-23 21:13:44 +02:00
Ira W. Snyder
9f530d59e6 e300: increase CONFIG_SYS_BOOTMAPSZ to allow booting large kernels
Newer Linux kernels can overrun the initial memory window used for
booting with their BSS area. When this happens, they overwrite the FDT
and silently fail to boot.

On e300 CPUs, the Linux kernel uses an initial BAT covering the first
256MB of RAM. See arch/powerpc/kernel/head_32.S for details. Increase
the value of CONFIG_SYS_BOOTMAPSZ to accommodate the maximum value
allowed by Linux. This will allow very large kernels to boot.

Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-23 21:13:32 +02:00
Scott Wood
e8d3ca8b33 mpc831xerdb: enable mtdparts for NAND
The default partition table matches the .dts files for these boards in
Linux.  This allows these partitions to be used by name with U-Boot's
"nand" command.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-23 21:13:22 +02:00
Victor Gallardo
ad876fff34 ppc4xx: Disable trace broadcast for 44x non debug mode
By default the trace broadcast is enabled on 44x systems.

To reduce power consumption when instruction tracing is
not needed, disable trace broadcast.

Check External Debug Mode (EDM) bit to detect if it should be
disabled or not.

Resetting system via a debugger will set the DBCR0[EDM] bit.
Resetting via u-boot or OS will not.

Signed-off-by: Victor Gallardo <vgallardo@apm.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:06 +02:00
Stefan Roese
e02d449644 ppc4xx: Cleanup of PVR detection code in cpu.c
This patch cleans the PVR detection code in check_cpu() up a bit.
Basically the strings are better seperated, resulting in an easier
to understand and maintain code version.

The #ifdef's couldn't be removed easily because of two reasons:

- Some SoC revisions have the same PVR, so need a way to differentiate
  between those two SoC's.
- In some case statements registers only available in this SoC variant
  are referenced.

Instead I moved the CONFIG_440 #ifdef a bit, so that 405 platforms don't
add this 440 detection code and vice versa. Resulting in this U-Boot
image size change:

405EX (Kilauea):     408 bytes less
440EPx (Sequoia):    604 bytes less
460EX (Canyonlands): 564 bytes less

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2010-09-23 09:02:06 +02:00
Matthias Fuchs
5b9144638e ppx4xx: remove unused functionality for DU405 boards
Remove some unused functionality to make U-Boot build again.
Especially PCI is not used on the board.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:06 +02:00
Stefan Roese
24956642ef Remove unused CONFIG_SERIAL_SOFTWARE_FIFO feature
This patch removes the completely unused CONFIG_SERIAL_SOFTWARE_FIFO
feature from U-Boot. It has only been implemented for PPC4xx and was not
used at all. So let's remove it and make the code smaller and cleaner.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
e3c78c9b3c ppc4xx: Remove now unused CONFIG_UART1_CONSOLE
CONFIG_UART1_CONSOLE was a PPC4xx specific implementation and is now
removed since the move from the 4xx UART driver to the common NS16550
UART driver. Let's remove all references to this define now.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
550650ddd0 ppc4xx: Use common NS16550 driver for PPC4xx UART
This patch removes the PPC4xx UART driver. Instead the common NS16550
driver is used, since all PPC4xx SoC's use this peripheral device.

The file 4xx_uart.c now only implements the UART clock calculation
function which also sets the SoC internal UART divisors.

All PPC4xx board config headers are changed to use this common NS16550
driver now.

Tested on these boards:
acadia, canyonlands, katmai, kilauea, sequoia, zeus

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
afabb498b7 ppc4xx: Big header cleanup part 2, mostly PPC405 related
This cleanup is done by creating header files for all SoC versions and
moving the SoC specific defines into these special headers. This way the
common header ppc405.h and ppc440.h can be cleaned up finally.

As a part from this cleanup, the GPIO definitions for PPC405EP are
corrected. The high and low parts of the registers (for example
CONFIG_SYS_GPIO0_OSRL vs. CONFIG_SYS_GPIO0_OSRH) have been defined in
the wrong order. This patch now fixes this issue by switching these
xxxH and xxxL values. This brings the GPIO 405EP port in sync with all
other PPC4xx ports.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
5e7abce991 ppc4xx: Big header cleanup, mostly PPC440 related
This patch starts a bit PPC4xx header cleanup. First patch mostly
touches PPC440 files. A later patch will touch the PPC405 files as well.

This cleanup is done by creating header files for all SoC versions and
moving the SoC specific defines into these special headers. This way the
common header ppc405.h and ppc440.h can be cleaned up finally.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
0988776288 ppc4xx: Move gpio.h to ppc4xx-gpio.h since its ppc4xx specific
Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
b36df56115 ppc4xx: Move ppc4xx headers to powerpc include directory
This patch moves some ppc4xx related headers from the common include
directory (include/) to the powerpc specific one
(arch/powerpc/include/asm/). This way to common include directory is not
so cluttered with files.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
4ad0df2b7c ppc4xx: Remove unreferenced file include/405_dimm.h
Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 09:02:05 +02:00
Stefan Roese
8a805df136 ppc4xx/fdt/flash: Change fdt_fixup_nor_flash_node() to not rely on cs size
This patch changes the behaviour of the fdt_fixup_nor_flash_node()
function. Now it doesn't patch the size of the "reg" property with the
chip-select size, but with the size returned from the new function
flash_get_bank_size(). This function will return per weak default the
flash size of the bank (bank = chip-select numer) detected by the flash
driver. If this does not fit your needs, this function may be overridden
by a board specific one.

For this the parameters needed to be changed. So I intentionally squashed
the PPC4xx stuff using this routine into this patch. Otherwise it would
not be git-bisectable anymore.

The board specific function for the AMCC/APM Ebony eval board is now
included in this patch version.

Signed-off-by: Stefan Roese <sr@denx.de>
Tested-by: Detlev Zundel <dzu@denx.de>
Cc: Gerald Van Baren <vanbaren@cideas.com>
Cc: Wolfgang Denk <wd@denx.de>
2010-09-23 08:49:49 +02:00
Stefan Roese
ab25e880ca ppc4xx: POST UART: Use in/out_8() io-accessor functions
This patch fixes a problem in the PPC4xx POST UART driver. This driver
incorrectly used the in/out8() io-accessor functions. This could lead to
problems since these functions don't guarantee execution ordering. This
patch now replaces these functions with the correct ones.

Additionally the driver is converted to using the NS16550 struct instead
of macros for the register offsets.

And some common code is factored out for better maintainability.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 08:43:56 +02:00
Stefan Roese
6aa9195dae ppc4xx: Fix CATcenter build
Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-23 08:32:02 +02:00
Wolfgang Denk
2675244fa4 Merge branch 'master' of git://git.denx.de/u-boot-video 2010-09-22 22:37:49 +02:00
Wolfgang Denk
e6e1fb3050 Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2010-09-22 22:36:42 +02:00
Wolfgang Denk
d1475d8aab Merge branch 'master' of /home/wd/git/u-boot/master 2010-09-22 22:35:44 +02:00
Mike Frysinger
55fed6fd0b Blackfin: bfin_spi: use same gpio cs define as Linux
Linux uses an offset of 8 to switch from hardware cs to a gpio cs,
so have u-boot use the same value.  Also make sure it is public
for boards to access.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-21 18:22:14 -04:00
Mike Frysinger
3d7c8cf5ec Blackfin: update some missed board config.mk files
Seems these two files were missed during the big lib shuffle.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-21 18:22:14 -04:00
Timur Tabi
e69e520f9d fsl: refactor MPC8610 and MPC5121 DIU code to use existing bitmap and logo features
The Freescale MPC8610 and MPC5121 DIU code had re-implement two features that already
existed in U-Boot: bitmap drawing and top-of-screen logo (CONFIG_VIDEO_LOGO).
So delete the 8610-specific code and use the built-in features instead.

Signed-off-by: Timur Tabi <timur@freescale.com>
2010-09-21 22:46:02 +02:00
Timur Tabi
68f6618bcd video: cfb_console: add support for 4bpp bitmaps with GDF_32BIT_X888RGB
Add support for 4bpp bitmaps, currently only for GDF_32BIT_X888RGB
frame buffer format.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-09-21 22:44:59 +02:00
Timur Tabi
ef351fe1f7 logos: add Freescale logo
Add the Freescale logo and update the Makefile to build it when building
a Freescale board.

Signed-off-by: Timur Tabi <timur@freescale.com>
2010-09-21 22:44:53 +02:00
Timur Tabi
c88777e09f video: cfb_console: fix definition and usage of CURSOR_xxx macros
The CURSOR_ON, CURSOR_OFF, and CURSOR_SET macros are defined incorrectly.  If
cursor support is disabled, then these macros are defined to nothing, but
then they are used like this:

	if (console_col < CONSOLE_COLS)
		CURSOR_OFF
	console_row++;

which was compiled like this:

	if (console_col < CONSOLE_COLS)
		console_row++;

This is obviously not what was intended.

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-09-21 22:27:43 +02:00
Kim Phillips
d70d8ccc20 silence config step commands display during MAKEALL builds
[u-boot next]$ ./MAKEALL 83xx
awk '(NF && $1 !~ /^#/) { print $1 ": " $1 "_config; $(MAKE)" }' boards.cfg > .boards.depend
Configuring for ve8313 board...

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-09-21 21:46:49 +02:00
Matthias Weisser
b9d74b4810 arm: Make jadecpu board use relocation
This patch modifies jadecpu board so that it is usable
with the relocation patches by Heiko Schocher

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2010-09-21 21:42:01 +02:00
Michael Zaidman
800eb09641 POST cleanup.
- Revives POST for blackfin arch;
- Removes redundant code:
     arch/blackfin/lib/post.c
     arch/powerpc/cpu/ppc4xx/commproc.c
     arch/powerpc/cpu/mpc512x/common.c
- fixes up the post_word_{load|store} usage.

Signed-off-by: Michael Zaidman <michael.zaidman@gmail.com>
Acked-by: Detlev Zundel <dzu@denx.de>
Tested-by: Anatolij Gustschin <agust@denx.de>

List of the maintainers of the affected by patch boards:
Cc: Stephan Linz <linz@li-pro.net>
Cc: Denis Peter <d.peter@mpl.ch>
Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Mike Frysinger <vapier@gentoo.org>
Cc: Niklaus Giger <niklaus.giger@netstal.com>
Cc: Larry Johnson <lrj@acm.org>
Cc: Feng Kan <fkan@amcc.com>
2010-09-21 21:39:31 +02:00
Mike Frysinger
e2fad3fce9 cmd_mmc: use common usage function
Rather than using a custom "Usage:", use the common cmd_usage() function,
and tail into it now that it returns 1 for us.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-21 21:37:08 +02:00
Mike Frysinger
16e66cf194 setlocalversion: add some more fallbacks for git describe
If working out of a custom git tree that lacks annotated tags, the
'git describe' operation spews "fatal: cannot describe" errors all
over the place.  So add some fallback code in case the best naming
was unable to locate something useful.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-21 21:33:16 +02:00
Wolfgang Denk
696f6cc9ba Merge branch 'next' of ../custodians into next 2010-09-21 09:34:37 +02:00
Wolfgang Denk
0cc89de8ef Merge branch 'master' of /home/wd/git/u-boot/master 2010-09-21 09:34:16 +02:00
Wolfgang Denk
e7eb046a24 Merge branch 'next' of git://git.denx.de/u-boot-usb into next 2010-09-21 09:34:02 +02:00
Wolfgang Denk
b65e86d8d8 Merge branch 'next' of ../custodians into next 2010-09-21 09:22:17 +02:00
Vitaly Kuzmichev
6142e0ae0f USB-CDC: Fix coding style issues
Fixes most of checkpatch warnings and errors in USB gadget stack.

The most frequently encountered problems are:
1) "(foo*)", "foo * bar", "foo* bar"
2) C99 // comments
3) No spaces before/after/around '?', ':', '=', '==', ',', '&', '('
4) Spaces before '['
5) Spaces between function names and '('
6) Block braces in wrong places
7) Spaces before tabs
8) Macros with complex values not enclosed in parenthesis
9) Multiline comments start just after /*

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2010-09-20 21:57:17 +02:00
Stefano Babic
a170f2c797 USB-CDC: called handle_interrupts inside usb_eth_send
The patch removes an endless loop  in the usb_eth_send
if the tx_complete is not called before going
in the loop. The driver interrupt routine is called
allowing the driver to check if the TX is completed.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-09-20 21:57:17 +02:00
Stefano Babic
8046077219 USB-CDC: correct wrong alignment in ether.c
The buffer for the status request must be word aligned
because it is accessed with 32 bit pointer in the
eth_status_complete function.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-09-20 21:57:17 +02:00
Vitaly Kuzmichev
c0ef513188 USB-CDC: change simple_strtol to simple_strtoul
The patch is based on commit bb9496c6f7e853e5d4edd5397c9d45f1968d623c
(done by Julia Lawall <julia@diku.dk>) from linux-2.6.git.

Since num is unsigned, it would seem better to use simple_strtoul that
simple_strtol.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2010-09-20 21:57:17 +02:00
Vitaly Kuzmichev
d5292c1647 USB-CDC: ethernet error path potential oops fix
Fix potential oops on rare error path.
The patch is based on commit e7b13ec9235b9fded90f826ceeb8c34548631351
(done by David Brownell <david-b@pacbell.net>) from linux-2.6.git.

Description of the issue taken from linux kernel bugzilla:
(https://bugzilla.kernel.org/show_bug.cgi?id=9594)

The potential error can be tracked down as follows:

(1) line 807: let the second conjunct on the "if" statment be false
    meaning "dev->status_ep" is null. This means the "if" evaluates
    to false.

follow thru the code until...

(2) line 808: usb_ep_disable(dev->status_ep) passes in a null argument,
    however "usb_ep_disable" cannot handle that:

(from include/linux/usb/gadget.h)
191 static inline int
192 usb_ep_disable (struct usb_ep *ep)
193 {
194         return ep->ops->disable (ep);
195 }

--

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2010-09-20 21:57:17 +02:00
Vitaly Kuzmichev
df559c1d21 USB-CDC: Correct stat_req initialization
Fix possible oops on stat_req->buf initialization and fix ep0 and
status_ep confusion (last one is just intended for stat_req keeping).

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-09-20 21:57:17 +02:00
Vitaly Kuzmichev
2e12abe654 USB-CDC: Replace 'strcpy' by 'strlcpy'
Replace 'strcpy' by more safe 'strlcpy' that is implemented in ether.c

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2010-09-20 21:57:17 +02:00
Vitaly Kuzmichev
0129e327f4 USB-CDC: Correct freeing usb requests
Fix in_ep and out_ep confusion (rx_req was allocated from out_ep, not
from in_ep) and add lost dev->req freeing.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2010-09-20 21:57:17 +02:00
Vitaly Kuzmichev
7de7318591 USB-CDC: Use native debug printout macros
Replace Linux-like debug printout macros by native ones.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>

Applied after removing dead code like '#define DEBUG/#undef DEBUG'
2010-09-20 21:57:17 +02:00
Vitaly Kuzmichev
2721dbf1dd USB-CDC: Add lost 'qmult' definition
Add lost 'qmult' definition for High Speed devices and make it
configurable through CONFIG_USB_ETH_QMULT.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2010-09-20 21:57:16 +02:00
Vitaly Kuzmichev
7b2f390611 USB-CDC: Restuct USB gadget Makefile
Prohibit simultaneous usage of both old and new gadget stacks and
allow UDC drivers to be dependent on CONFIG_USB_ETHER.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2010-09-20 21:57:16 +02:00
Remy Bohmer
23cd138503 Integrate USB gadget layer and USB CDC driver layer
Derived from Linux kernel 2.6.27

Signed-off-by: Thomas Smits <ts.smits@gmail.com>
Signed-off-by: Remy Bohmer <linux@bohmer.net>
2010-09-20 21:57:16 +02:00
Mike Frysinger
70fccb3f24 usb: musb: stub out MUSB_TXCSR_MODE for Blackfin parts
The MUSB_TXCSR_MODE register setting isn't supported on Blackfin musb
parts, so stub it out to 0.  This matches Linux behavior.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-20 21:56:42 +02:00
Stefan Roese
3c29975e94 cfi_flash: Remove uneccessary #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
Now that the defines are moved to header files we don't need this
conditional compilation any more. Remove it.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-20 15:09:00 +02:00
Stefan Roese
ca5def3f30 cfi_flash: Simplify dynamic flash bank number detection
This patch simplifies the use of CONFIG_SYS_MAX_FLASH_BANKS_DETECT. By
moving these optional variables and defines into the common code, board
specific code is minimized. Currently only the following board use
this feature:

APC405, IDS8247, TQM834x

And IDS8247 doesn't seem to really need this feature, since its not
updating the bank number variable at all. So this patch removes the
definition of CONFIG_SYS_MAX_FLASH_BANKS_DETECT from this board port.

This new framework will be used by the upcoming lwmon5 update as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
2010-09-20 15:08:51 +02:00
Stefan Roese
b00e19cc6b cfi_flash: Add weak default for cfi_flash_bank_addr()
cfi_flash_bank_addr(int bank_nr) returns the base addresses of the
requested bank. Introducing this weak default enables boards to override
this functions with a board specific version when required.

This feature will be used in the lwmon5 board update, supporting runtime
detection of 2 board revisions with different flash layouts.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-20 15:08:43 +02:00
Stefan Roese
cba34aafde cfi_flash: Simplify flash_get_info()
This patch removes an unecessary check in the return statement. This is
not needed, since "info" is initializes to NULL. And "info" will not be
written to again, if the flash address is not found.

Additionally "info" is not initialized to "0" but to "NULL".

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-20 15:08:33 +02:00
Wolfgang Denk
69434e4c94 Remove spieval board support
Recent changes caused that the spieval board now is included in the
boards built by MAKEALL, which revealed that compilation for this
board has been broken for a long time:

mpc5xxx_fec.c:899:2: error: #error fec->xcv_type not initialized.
mpc5xxx_fec.c:899:2: error: #error fec->xcv_type not initialized.

The board is orphaned.  Drop support for it.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-19 21:34:31 +02:00
Wolfgang Denk
9ddc3af8a1 Remove smmaco4 board support
Recent changes caused that the smmaco4 board now is included in the
boards built by MAKEALL, which revealed that compilation for this
board has been broken for a long time:

mpc5xxx_fec.c:899:2: error: #error fec->xcv_type not initialized.

The board is orphaned.  Drop support for it.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-19 21:32:37 +02:00
Wolfgang Denk
77efe35fec Remove HMI10 board support
Recent changes caused that the HMI10 board now is included in the
boards built by MAKEALL, which revealed that compilation for this
board has been broken for a long time:

ps2ser.c: In function 'ps2ser_init':
ps2ser.c:155: error: 'UART_LCR' undeclared (first use in this function)
ps2ser.c:155: error: (Each undeclared identifier is reported only once
ps2ser.c:155: error: for each function it appears in.)
ps2ser.c:156: error: 'UART_DLL' undeclared (first use in this function)
ps2ser.c:157: error: 'UART_DLM' undeclared (first use in this function)
ps2ser.c:159: error: 'UART_IER' undeclared (first use in this function)
ps2ser.c:160: error: 'UART_MCR' undeclared (first use in this function)
ps2ser.c:161: error: 'UART_FCR' undeclared (first use in this function)
ps2ser.c:162: error: 'UART_FCR_ENABLE_FIFO' undeclared (first use in this function)
ps2ser.c:166: error: 'UART_LSR' undeclared (first use in this function)
ps2ser.c: In function 'ps2ser_putc':
ps2ser.c:198: error: 'UART_LSR' undeclared (first use in this function)
ps2ser.c:200: error: 'UART_TX' undeclared (first use in this function)
ps2ser.c: In function 'ps2ser_getc_hw':
ps2ser.c:224: error: 'UART_LSR' undeclared (first use in this function)
ps2ser.c:225: error: 'UART_RX' undeclared (first use in this function)
ps2ser.c: In function 'ps2ser_interrupt':
ps2ser.c:293: error: 'UART_IIR' undeclared (first use in this function)

The board is orphaned, and AFAICT has reached EOL.
Drop support for it.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-19 21:28:25 +02:00
Wolfgang Denk
ff377b1c0e canmb board: Fix compiler warnings
Recent changes caused thatthe aev board now is included in the boards
built by MAKEALL, which revealed that compilation for this board
has been broken for a long time:

canmb.c: In function 'initdram':
canmb.c:109: warning: pointer targets in passing argument 1 of 'get_ram_size' differ in signedness
canmb.c:111: warning: pointer targets in passing argument 1 of 'get_ram_size' differ in signedness
canmb.c:137: warning: pointer targets in passing argument 1 of 'get_ram_size' differ in signedness
canmb.c:140: warning: pointer targets in passing argument 1 of 'get_ram_size' differ in signedness

Fix these.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-19 19:29:57 +02:00
Wolfgang Denk
90964353ff aev board: Fix compile problems
Recent changes caused thatthe aev board now is included in the boards
built by MAKEALL, which revealed that compilation for this board has
been broken for a long time:

mpc5xxx_fec.c:899:2: error: #error fec->xcv_type not initialized.
mpc5xxx_fec.c:899:2: error: #error fec->xcv_type not initialized.

Fix it.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-19 19:29:57 +02:00
Ben Gardiner
9700375624 da8xx: fixup ARM relocation support
Split the existing dram_init for da8xx when ARM reloc is enabled, like the
changes to arch/arm/cpu/arm926ejs/orion5x/dram.c in
0f234d263b17ccf1b8fd776eb8c15b7cdb27a887 by Heiko Schocher <hs@denx.de>.

Without these changes gd->ram_size is '0' which leads to incorrect relocation
when CONFIG_SYS_ARM_WITHOUT_RELOC is defined and the board does not boot.

We use get_ram_size to dynamically calculate the available RAM because it runs
on different board version with different ram, as suggested by Heiko in private
communication.

Tested on a da850evm with 128M of DDR2 installed; with both
CONFIG_SYS_ARM_WITHOUT_RELOC defined and undefined.

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Reviewed-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
CC: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
CC: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:56 +02:00
Heiko Schocher
a51dd67a03 ARM: implement relocation for arm1176
Change the implementation for arm1176 to relocate the code to
an arbitrary address in RAM.

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:56 +02:00
Heiko Schocher
abef7b859d ARM: implement relocation for arm720t
Change the implementation for arm720t to relocate the code to
an arbitrary address in RAM.

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:56 +02:00
Heiko Schocher
c6c2ceb124 ARM: implement relocation for arm_intcm
Change the implementation for arm_intcm to relocate the code to
an arbitrary address in RAM.

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:56 +02:00
Heiko Schocher
ec985e94a2 ARM: implement relocation for lh7a40x
Change the implementation for lh7a40x to relocate the code to
an arbitrary address in RAM.

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:55 +02:00
Heiko Schocher
0110955a79 ARM: implement relocation for s3c44b0
Change the implementation for s3c44b0 to relocate the code to
an arbitrary address in RAM.

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:55 +02:00
Heiko Schocher
e30ceca21f ARM: implement relocation for sa1100
Change the implementation for sa1100 to relocate the code to
an arbitrary address in RAM.

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:55 +02:00
Heiko Schocher
2af0a099ac ARM: implement relocation for ixp
Change the implementation for ixp to relocate the code to
an arbitrary address in RAM.

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:55 +02:00
Heiko Schocher
5347f68c85 ARM: implement relocation for pxa
Change the implementation for pxa to relocate the code to
an arbitrary address in RAM.

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:55 +02:00
Heiko Schocher
5a8a87ed0e ARM: implement relocation for ARM946
Change the implementation for arm946 to relocate the code to
an arbitrary address in RAM.

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:54 +02:00
Heiko Schocher
405d023b71 ARM: implement relocation for ARM925
Change the implementation for arm925 to relocate the code to
an arbitrary address in RAM.

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:54 +02:00
Heiko Schocher
cc7cdcbd1d ARM: implement relocation for ARM920
Change the implementation for arm920 to relocate the code to
an arbitrary address in RAM.

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:54 +02:00
Heiko Schocher
ab86f72c35 ARM: implement relocation for ARM926
Change the implementation for arm926 to relocate the code to
an arbitrary address in RAM.

Adapt the TX25 (i.MX25), magnesium board to test the changes.

On the tx25 board TEXT_BASE is set to the final relocation
address to prevent one more copying of u-boot code
when relocating. More info see:
doc/README.arm-relocation

da850 board:
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Ben Gardiner <bengardiner@nanometrics.ca>
2010-09-19 19:29:54 +02:00
Heiko Schocher
561142af20 ARM: implement relocation for ARM V7 (OMAP)
Change the implementation for ARM V7 to relocate the code to an
arbitrary address in RAM.

Adapt the Beagle board (Cortex A8) to test the changes.

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:53 +02:00
Heiko Schocher
e48b7c0aad ARM: implement relocation for ARM11
Change the implementation for ARM11 to relocate the code to an
arbitrary address in RAM.

Tested on the qong board.

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:53 +02:00
Heiko Schocher
f1d2b313c9 ARM: add relocation support
!! This breaks support for all arm boards !!

To compile in old style, you must define
CONFIG_SYS_ARM_WITHOUT_RELOC or you can compile
with "CONFIG_SYS_ARM_WITHOUT_RELOC=1 ./MAKEALL board"

!! This define will be removed soon, so convert your
board to use relocation support

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>

Fix boot from NAND for non-ARM systems
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-19 19:29:53 +02:00
Heiko Schocher
4fff329df2 nand_boot_fsl_nfc.c: make "nfc" a "static const" pointer
With -fPIC enabled, this variable needs an entry in the GOT, which
causes the image size to exceed 2 KiB which is the maximum allowed for
some systems. Making it a "static const" avoids the GOT entry and thus
reduces the image size to < 2 KiB.

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Scott Wood <scottwood@freescale.com>
2010-09-19 19:29:52 +02:00
Heiko Schocher
1724fe9adf i2c, omap24xx: set bus_initialized only after relocation.
Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:52 +02:00
Heiko Schocher
23090dacd2 disk/part.c: fix relocation fixup
Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:52 +02:00
Heiko Schocher
4444b221f2 i2c: fix command usage help
Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:52 +02:00
Heiko Schocher
3fbeeea633 common: move TOTAL_MALLOC_LEN to include/common.h
Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:52 +02:00
Heiko Schocher
620f1f6a64 relocation: fixup cmdtable
fixup_cmdtable() did all work for fixing up the cmdtable,
if CONFIG_RELOC_FIXUP_WORKS is not defined.

CONFIG_RELOC_FIXUP_WORKS is missing for i386! I talked
with Graeme Russ, and he will fix this soon.

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:51 +02:00
Heiko Schocher
7e4a9e6dc8 ARM (ARM11): add data cache support, test on Qong board
Add data cache support for arm1136 systems.

Enable "cache" command on Qong board and test performance.

    Test 1: Loading 127 MB of data from NAND flash into RAM:

    Instr. Cache	off	on	on
      Data Cache	off	off	on
    --------------------------------------------------
    QONG (ARM11)	177s	95s	43s	= x 4.1

    Test 2: uncompressing a gzipped image from RAM to RAM
            (size compressed: 6.5 MiB, uncompressed: 35 MiB):

    Instr. Cache	off	on	on
      Data Cache	off	off	on
    --------------------------------------------------
    QONG (ARM11)	1.54s	0.95s	0.18s	= x 8.6

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:51 +02:00
Heiko Schocher
95c6f6d34d ARM V7 (OMAP): add data cache support, test on Beagle board
Add data cache support for ARM V7 systems. Used cache flush
functions from linux:arch/arm/mm/cache-v7.S developed from
Catalin Marinas.

Enable "cache" command on Beagle board and test performance.

    Test 1: Loading 127 MB of data from NAND flash into RAM:

    Instr. Cache	off	on	on
      Data Cache	off	off	on
    --------------------------------------------------
    Beagle (Cortex A8)	116s	106s	30.3s	= x 3.8

    Test 2: uncompressing a gzipped image from RAM to RAM
            (size compressed: 6.5 MiB, uncompressed: 35 MiB):

    Instr. Cache	off	on	on
      Data Cache	off	off	on
    --------------------------------------------------
    Beagle (Cortex A8)	1.84s	1.64s	0.12s	= x 15.3

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Ben Gardiner<bengardiner@nanometrics.ca>
2010-09-19 19:29:51 +02:00
Heiko Schocher
c3330e9d6a ARM (ARM926ejs): add data cache support, tested on magnesium and tx25 board
Enable "cache" command on tx25 and magnesium board and test performance.

    Test 1: Loading 127 MB of data from NAND flash into RAM:

    Instr. Cache        off     on      on
      Data Cache        off     off     on
    --------------------------------------------------
    magnesium           32,6s   22,5s   30s     = x 1,09
    tx25 (29MB only)    9,69s   5,05s   8,16s   = x 1,19

    Test 2: uncompressing a gzipped image from RAM to RAM
            (size compressed: 6.5 MiB, uncompressed: 35 MiB):

    Instr. Cache        off     on      on
      Data Cache        off     off     on
    --------------------------------------------------
    magnesium           4,25s   2,08s   1,72s   = x 2,47
    tx25                4,82s   2,04s   1,84s   = x 2,62

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Alessandro Rubini <rubini@gnudd.com>
2010-09-19 19:29:51 +02:00
Heiko Schocher
880eff5cfb ARM: cp15: setup mmu and enable dcache
This has been tested on at91sam9263 and STN8815.
Again, I didn't check if it has bad effects
on non-arm926 cores.

Initially I had a "done" bit to only set up page tables
at the beginning. However, since the aligmnent requirement
was for the whole object file, this extra integer tool 16kB
in BSS, so I chose to remove it.

Also, note not all boards use PHYS_SDRAM, but it looks like
it's the most used name (more than CONFIG_SYS_DRAM_BASE for
example).

Portions of this work were supported by funding from
the CE Linux Forum.

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:50 +02:00
Heiko Schocher
55e97429d1 arm: get rid of bi_env
bi_env is nowhere used, so delete it!

Signed-off-by: Heiko Schocher <hs@denx.de>

similar patch posted from Dirk Behme Tue Jul 27 18:36:09 CEST 2010
http://lists.denx.de/pipermail/u-boot/2010-July/074542.html
2010-09-19 19:29:50 +02:00
Heiko Schocher
d1831c5ee6 mpc52xx: Cleanup use of CONFIG_SYS_SRAM_BASE and CONFIG_SYS_SRAM_SIZE
cleanup for the uc101 and the mucmc52 board.

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-09-19 19:29:50 +02:00
Mike Frysinger
570d7d50b0 tools: enable img2srec for "tools-all" target
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-19 19:29:50 +02:00
Mike Frysinger
abd315a135 tools/env: use host build flags
Convert the tools/env/Makefile to use the same host tool syntax as the
other tool subdirs.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-19 19:29:49 +02:00
Mike Frysinger
0358df427f unify toplevel tools targets
Most tool subdirs do not rely on a configured tree, so move those targets
out of the config checks and unify them in the process.

Also add an easylogo target so people can easily build that.

Also add these new tool targets to the 'tools-all' target.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-19 19:29:49 +02:00
Mike Frysinger
8e0ec82eb4 tools: update .gitignore
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-19 19:29:49 +02:00
Mike Frysinger
9ec49f8f8e MAKEALL: cut down on duplication of targets
Merge the other significant source of board name duplication with the new
boards.cfg file.  I cleaned up most targets, but the ARM and MIPS trees
are such a mess than I didn't bother.  If those maintainers care, they can
take are of it.

While we're at it, we can be a bit more clever in the LIST_xxx handling
and avoid duplicating the list names too.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Reviewed-by: Ben Gardiner <bengardiner@nanometrics.ca>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
2010-09-19 19:29:49 +02:00
Mike Frysinger
727ebd9fd9 Makefile: restore support for board shortcut targets
The helpful shortcut for doing a board config + make was dropped recently
as it conflicted with some new build code.  However, the reason for using
pattern targets originally was to avoid managing a duplicate list of
boards.  Since we now have one centralized place for a list of boards (the
new boards.cfg), we don't need a pattern target -- we can generate the
exact list of boards on the fly.  So do just that.

When cleaning things up, the top level gitignore file ignores all things
that end with ".depend", but the clean target only deletes files that are
named exactly ".depend".  Keep these in sync by having the clean target
punt all files that match the pattern that gitignore is using.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-09-19 19:29:48 +02:00
Wolfgang Denk
ea882baf9c New implementation for internal handling of environment variables.
Motivation:

* Old environment code used a pessimizing implementation:
  - variable lookup used linear search => slow
  - changed/added variables were added at the end, i. e. most
    frequently used variables had the slowest access times => slow
  - each setenv() would calculate the CRC32 checksum over the whole
    environment block => slow
* "redundant" envrionment was locked down to two copies
* No easy way to implement features like "reset to factory defaults",
  or to select one out of several pre-defined (previously saved) sets
  of environment settings ("profiles")
* No easy way to import or export environment settings

======================================================================

API Changes:

- Variable names starting with '#' are no longer allowed

  I didn't find any such variable names being used; it is highly
  recommended to follow standard conventions and start variable names
  with an alphanumeric character

- "printenv" will now print a backslash at the end of all but the last
  lines of a multi-line variable value.

  Multi-line variables have never been formally defined, allthough
  there is no reason not to use them. Now we define rules how to deal
  with them, allowing for import and export.

- Function forceenv() and the related code in saveenv() was removed.
  At the moment this is causing build problems for the only user of
  this code (schmoogie - which has no entry in MAINTAINERS); may be
  fixed later by implementing the "env set -f" feature.

Inconsistencies:

- "printenv" will '\\'-escape the '\n' in multi-line variables, while
  "printenv var" will not do that.

======================================================================

Advantages:

- "printenv" output much better readable (sorted)
- faster!
- extendable (additional variable properties can be added)
- new, powerful features like "factory reset" or easy switching
  between several different environment settings ("profiles")

Disadvantages:

- Image size grows by typically 5...7 KiB (might shrink a bit again on
  systems with redundant environment with a following patch series)

======================================================================

Implemented:

- env command with subcommands:

  - env print [arg ...]

    same as "printenv": print environment

  - env set [-f] name [arg ...]

    same as "setenv": set (and delete) environment variables

    ["-f" - force setting even for read-only variables - not
    implemented yet.]

  - end delete [-f] name

    not implemented yet

    ["-f" - force delete even for read-only variables]

  - env save

    same as "saveenv": save environment

  - env export [-t | -b | -c] addr [size]

    export internal representation (hash table) in formats usable for
    persistent storage or processing:

	-t:	export as text format; if size is given, data will be
		padded with '\0' bytes; if not, one terminating '\0'
		will be added (which is included in the "filesize"
		setting so you can for exmple copy this to flash and
		keep the termination).
	-b:	export as binary format (name=value pairs separated by
		'\0', list end marked by double "\0\0")
	-c:	export as checksum protected environment format as
		used for example by "saveenv" command
	addr:	memory address where environment gets stored
	size:	size of output buffer

	With "-c" and size is NOT given, then the export command will
	format the data as currently used for the persistent storage,
	i. e. it will use CONFIG_ENV_SECT_SIZE as output block size and
	prepend a valid CRC32 checksum and, in case of resundant
	environment, a "current" redundancy flag. If size is given, this
	value will be used instead of CONFIG_ENV_SECT_SIZE; again, CRC32
	checksum and redundancy flag will be inserted.

	With "-b" and "-t", always only the real data (including a
	terminating '\0' byte) will be written; here the optional size
	argument will be used to make sure not to overflow the user
	provided buffer; the command will abort if the size is not
	sufficient. Any remainign space will be '\0' padded.

        On successful return, the variable "filesize" will be set.
        Note that filesize includes the trailing/terminating '\0'
        byte(s).

        Usage szenario: create a text snapshot/backup of the current
	settings:

		=> env export -t 100000
		=> era ${backup_addr} +${filesize}
		=> cp.b 100000 ${backup_addr} ${filesize}

	Re-import this snapshot, deleting all other settings:

		=> env import -d -t ${backup_addr}

  - env import [-d] [-t | -b | -c] addr [size]

    import external format (text or binary) into hash table,
    optionally deleting existing values:

	-d:	delete existing environment before importing;
		otherwise overwrite / append to existion definitions
	-t:	assume text format; either "size" must be given or the
		text data must be '\0' terminated
	-b:	assume binary format ('\0' separated, "\0\0" terminated)
	-c:	assume checksum protected environment format
	addr:	memory address to read from
	size:	length of input data; if missing, proper '\0'
		termination is mandatory

  - env default -f

    reset default environment: drop all environment settings and load
    default environment

  - env ask name [message] [size]

    same as "askenv": ask for environment variable

  - env edit name

    same as "editenv": edit environment variable

  - env run

    same as "run": run commands in an environment variable

======================================================================

TODO:

- drop default env as implemented now; provide a text file based
  initialization instead (eventually using several text files to
  incrementally build it from common blocks) and a tool to convert it
  into a binary blob / object file.

- It would be nice if we could add wildcard support for environment
  variables; this is needed for variable name auto-completion,
  but it would also be nice to be able to say "printenv ip*" or
  "printenv *addr*"

- Some boards don't link any more due to the grown code size:
  DU405, canyonlands, sequoia, socrates.

	=> cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>,
	       Stefan Roese <sr@denx.de>,
	       Heiko Schocher <hs@denx.de>

- Dropping forceenv() causes build problems on schmoogie

	=> cc: Sergey Kubushyn <ksi@koi8.net>

- Build tested on PPC and ARM only; runtime tested with NOR and NAND
  flash only => needs testing!!

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>,
Cc: Stefan Roese <sr@denx.de>,
Cc: Heiko Schocher <hs@denx.de>
Cc: Sergey Kubushyn <ksi@koi8.net>
2010-09-19 19:29:48 +02:00
Wolfgang Denk
91a76751a0 Make getenv() work before relocation.
So far, getenv() would work before relocation is most cases, even
though it was not intended to be used that way.  When switching to a
hash table based implementation, this would break a number of boards.

For convenience, we make getenv() check if it's running before
relocation and, if so, use getenv_f() internally.

Note that this is limited to simple cases, as we use a small static
buffer (32 bytes) in the global data for this purpose.

For this reason, it is also not a good idea to convert all current
uses of getenv_f() into getenv() - some of the existing use cases need
to be able to deal with longer variable values, so getenv_f() is still
needed and recommended for use before relocation.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-19 19:29:48 +02:00
Wolfgang Denk
6d014adfa2 Remove support for CONFIG_HAS_UID and "forceenv" command
This (undocumented) concept was only in use for the MVSMR and
davinci_schmoogie Sergey Kubushyn <ksi@koi8.net> boards.
Drop it for now.  If really needed, it should be reimplemented
later in the context of the new environment command set.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andre Schwarz <andre.schwarz@matrix-vision.de>
Cc: Sergey Kubushyn <ksi@koi8.net>
Acked-by: Sergey Kubushyn <ksi@koi8.net>
2010-09-19 19:29:47 +02:00
Wolfgang Denk
a6826fbc5c Add hash table support as base for new environment code
This implementation is based on code from uClibc-0.9.30.3 but was
modified and extended for use within U-Boot.

Major modifications and extensions:

* hsearch() [modified / extended]:
  - While the standard version does not make any assumptions about
    the type of the stored data objects at all, this implementation
    works with NUL terminated strings only.
  - Instead of storing just pointers to the original objects, we
    create local copies so the caller does not need to care about the
    data any more.
  - The standard implementation does not provide a way to update an
    existing entry.  This version will create a new entry or update an
    existing one when both "action == ENTER" and "item.data != NULL".
  - hsearch_r(): Instead of returning 1 on success, we return the
    index into the internal hash table, which is also guaranteed to be
    positive.  This allows us direct access to the found hash table
    slot for example for functions like hdelete().
* hdelete() [added]:
  - The standard implementation of hsearch(3) does not provide any way
    to delete any entries from the hash table.  We extend the code to
    do that.
* hexport() [added]:
  - Export the data stored in the hash table in linearized form:
    Entries are exported as "name=value" strings, separated by an
    arbitrary (non-NUL, of course) separator character. This allows to
    use this function both when formatting the U-Boot environment for
    external storage (using '\0' as separator), but also when using it
    for the "printenv" command to print all variables, simply by using
    as '\n" as separator. This can also be used for new features like
    exporting the environment data as text file, including the option
    for later re-import.
  - The entries in the result list will be sorted by ascending key
    values.
* himport() [added]:
  - Import linearized data into hash table.  This is the inverse
    function to hexport(): it takes a linear list of "name=value"
    pairs and creates hash table entries from it.
  - Entries without "value", i. e. consisting of only "name" or
    "name=", will cause this entry to be deleted from the hash table.
  - The "flag" argument can be used to control the behaviour: when
    the H_NOCLEAR bit is set, then an existing hash table will kept,
    i. e. new data will be added to an existing hash table;
    otherwise, old data will be discarded and a new hash table will
    be created.
  - The separator character for the "name=value" pairs can be
    selected, so we both support importing from externally stored
    environment data (separated by NUL characters) and from plain text
    files (entries separated by newline characters).
  - To allow for nicely formatted text input, leading white space
    (sequences of SPACE and TAB chars) is ignored, and entries
    starting (after removal of any leading white space) with a '#'
    character are considered comments and ignored.
  - NOTE: this means that a variable name cannot start with a '#'
    character.
  - When using a non-NUL separator character, backslash is used as
    escape character in the value part, allowing for example fo
    multi-line values.
  - In theory, arbitrary separator characters can be used, but only
    '\0' and '\n' have really been tested.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-19 19:29:47 +02:00
Wolfgang Denk
54c6977e9c Add qsort - add support for sorting data arrays
Code adapted from uClibc-0.9.30.3

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-19 19:29:47 +02:00
Wolfgang Denk
65cd3fa81f Add basic errno support.
Needed for hash table support; probably useful in a lot of other
places as well.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-19 19:29:47 +02:00
Wolfgang Denk
a2a649d73c 4xx: adjust TEXT_BASE to increase U-Boot image size
On some boards (canyonlands, luan, sequoia) we need more room for the
U-Boot image to allow for new features like the new environment code.
Shift TEXT_BASE as needed.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2010-09-19 19:29:47 +02:00
Wolfgang Denk
d2e22731c8 IceCube.h: update configuration
Increase malloc size,
enable command line editing and history,
enable hush shell.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-19 19:29:46 +02:00
Wolfgang Denk
3611665044 Cleanup use of CONFIG_SYS_SRAM_BASE and CONFIG_SYS_SRAM_SIZE
Traditionally many boards used local definitions for SRAM base address
and size (like SRAM_BASE, SRAM_LEN and/or SRAM_SIZE), while the (now)
"official" names are CONFIG_SYS_SRAM_BASE and CONFIG_SYS_SRAM_SIZE.

The corresponding code in arch/powerpc/lib/board.c was board specific,
and has never actually been maintained well. Replace this by feature-
specific code and adapt the boards that actually use this.

NOTE: there is still a ton of boards using the old #defines, which
therefor contain incorrect values in bi_sramstart and bi_sramsize.

All respective board maintainers are requested to clean up their
respective configurations.  Thanks.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Josef Wagner <Wagner@Microsys.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
2010-09-19 19:29:46 +02:00
Wolfgang Denk
bf56080769 4xx: add missing CONFIG_SYS_SRAM_SIZE definition
A number of boards define CONFIG_SYS_SRAM_BASE but fail to define
CONFIG_SYS_SRAM_SIZE which is needed when cleaning up the code that
prints this information with the bdinfo command.

Add the missing deinitions.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2010-09-19 19:29:46 +02:00
Wolfgang Denk
07517e7f4f Prepare v2010.09-rc2
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-19 17:47:52 +02:00
Terry Lv
a80603598c Save environment data to mmc.
This patch is to save environment data to mmc card.
It uses interfaces defined in generic mmc.

Signed-off-by: Terry Lv <r65388@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2010-09-19 17:47:29 +02:00
Wolfgang Denk
3adfd1143b socrates: adjust TEXT_BASE to increase U-Boot image size
We need more room for the U-Boot image.
Shift TEXT_BASE as needed.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-19 12:31:02 +02:00
Wolfgang Denk
fe64fd4238 mmc: fix compiler warnings
Commit d2bf29e3 caused a number of compiler warnings:

mmc.c: In function 'mmc_bwrite':
mmc.c:97: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'long unsigned int'
mmc.c:97: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'lbaint_t'
mmc.c: In function 'mmc_bread':
mmc.c:229: warning: format '%x' expects type 'unsigned int', but argument 2 has type 'long unsigned int'
mmc.c:229: warning: format '%x' expects type 'unsigned int', but argument 3 has type 'lbaint_t'

Fix these.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Lei Wen <leiwen@marvell.com>
2010-09-19 12:30:54 +02:00
Daniel Hobi
29ccd7c312 tools/env: fail on invalid options
Signed-off-by: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
2010-09-18 23:56:19 +02:00
Daniel Hobi
122bc08845 tools/env: allow option "-n" for fw_printenv
In commit bd7b26f8 (Tools: set multiple variable with fw_setenv utility),
the option parsing was changed to getopt_long(3), but option "-n"
of fw_printenv was not included.

This leads to an error message "invalid option -- 'n'" on stderr,
although the output on stdout is correct.

Signed-off-by: Daniel Hobi <daniel.hobi@schmid-telecom.ch>
2010-09-18 23:56:02 +02:00
Thomas Weber
c54b5923da ARM: Update ARM mach-types
This patch updates the mach-types.h based on the latest linux kernel

Signed-off-by: Thomas Weber <weber@corscience.de>
2010-09-18 23:54:50 +02:00
Lei Wen
8f3b96427a mmc: print out partition table
Signed-off-by: Lei Wen <leiwen@marvell.com>
2010-09-18 23:47:28 +02:00
Lei Wen
d2bf29e399 mmc: add boundary check for mmc operation
Signed-off-by: Lei Wen <leiwen@marvell.com>
2010-09-18 23:46:24 +02:00
Timur Tabi
6561863678 video: cfb_console: fix definition and usage of CURSOR_xxx macros
The CURSOR_ON, CURSOR_OFF, and CURSOR_SET macros are defined incorrectly.  If
cursor support is disabled, then these macros are defined to nothing, but
then they are used like this:

	if (console_col < CONSOLE_COLS)
		CURSOR_OFF
	console_row++;

which was compiled like this:

	if (console_col < CONSOLE_COLS)
		console_row++;

This is obviously not what was intended.

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-09-16 00:44:06 +02:00
Wolfgang Denk
a12555c02d Merge branch 'master' of git://git.denx.de/u-boot-nand-flash 2010-09-15 22:06:32 +02:00
Wolfgang Denk
e6060a7f18 Merge branch 'master' of git://git.denx.de/u-boot-x86 2010-09-15 22:04:42 +02:00
Wolfram Sang
1075b07e2c nand/davinci: make sure ECC calculation has really started
Due to a register glitch (result code <4 might show up right after the
start-calculation-bit was set), make sure the ECC has really started.

See 1c3275b656045aff9a75bb2c9f3251af1043ebb3 in the kernel.

Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-13 14:43:05 -05:00
Reinhard Meyer
150f723665 display_buffer: fix misaligned buffer
use a union to cause necessary alignment per architecture

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-09-13 13:15:07 +02:00
Graeme Russ
215e1cb33c x86: Remove Unmaintained Boards
The SC520 CDP boards originally implemented by Daniel Engström are now
very broken. Attempts to contact Daniel via the email address on the
copyright notice have failed. Remove these boards from mainline
2010-09-13 07:20:02 +10:00
Graeme Russ
797960fda1 x86: Fix x86 Cold Boot
Commit 077e1958ca broke the ability of the
x86 port to boot from a cold-reset by removing the initial IDT. Re-
instate the initial IDT to allow cold-booting of x86 boards
2010-09-13 07:20:02 +10:00
Graeme Russ
a806ee6fae x86: Add do_bdinfo()
x86 failed to compile with a message "a case for this architecture does
not exist!" - Add do_bdinfo() for this arch
2010-09-13 07:20:02 +10:00
Graeme Russ
e69c0cba8f x86: Fix do_go_exec() - const argv[]
Commit 54841ab50c made the argv parameter
to do_go_exec() const but did not allow for the fact that argv[-1] is
set to point to the global data structure and relies on argv being non-
const.

With this patch, do_go_exec() creates a new copy of the argv array with
an extra element to store global data pointer rather than simply
clobbering an arbitrary memory location.
2010-09-13 07:20:02 +10:00
Bryan Wu
93ceb4790d usb: musb: set target address for non-multipoint devices
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-11 09:49:22 +02:00
Bryan Wu
8dd7a23007 usb: musb: setup TXCOUNT for Blackfin musb
The Blackfin implementation of musb has a TXCOUNT register that needs to
be programmed when transmitting data.

Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Cliff Cai <cliff.cai@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-09-11 09:49:21 +02:00
Wolfgang Denk
2d941de9d5 Prepare v2010.09-rc1
Coding style cleanup.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-10 00:16:19 +02:00
Wolfgang Denk
8fea51a4ac Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-09-09 21:39:46 +02:00
Stefano Babic
ec99d98341 MX51: Update responsible for mx51evk
Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-09-09 19:55:22 +02:00
Wolfgang Denk
a78ded1311 Merge branch 'master' of git://git.denx.de/u-boot-ti 2010-09-09 19:55:02 +02:00
Wolfgang Denk
40e74c852b bedbug_860.c, bedbug_603e.c: Fix return type to silence compile warnings.
commit 47e26b1b "cmd_usage(): simplify return code handling" caused
the following compile warnings:

bedbug_860.c: In function 'bedbug860_do_break':
bedbug_860.c:73: warning: 'return' with a value, in function returning void
bedbug_860.c:121: warning: 'return' with a value, in function returning void

Fix the return type.

Actually these files could need some cleanup - commands should
return proper error codes, and there are coding style issues.
=> To be fixed later.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-09-08 22:02:54 +02:00
Ricardo Salveti de Araujo
6696ac19ad ARMV7: Fix pad mux for Panda LEDs
Correctly set PAD1_FREF_CLK4_REQ and PAD0_FREF_CLK4_OUT to enable and
activate both LEDs while setting pad mux.

Since this increases the line length, this patch also adjusts the white
space in this section of code to allign the pad mux signal description
comments.

Signed-off-by: Ricardo Salveti de Araujo <ricardo.salveti@canonical.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:51:51 -04:00
Steve Sakoman
a06e1629f4 ARMV7: OMAP: Overo: Autodetect presence/absence of transceiver on mmc2
An upcoming version of Overo uses a Wifi/BT module with 1.8V signaling,
eliminating the need for an external transceiver to handle the level
shifting.  This patch detects whether an external transceiver is present
and adjusts the pinmux settings as appropriate.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:51:45 -04:00
Steve Sakoman
08cbba2abf ARMV7: OMAP3: Add support for Beagle xM
This patch adds support for the Beagle xM.  It uses the board ID
GPIO bits to recognize this revision and perform appropriate setup.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:51:40 -04:00
Steve Sakoman
60c2317305 ARMV7: OMAP3: Add CONFIG_SYS_NAND_QUIET_TEST to Beagle and Overo configs
Future versions of these boards have options for POP memory with no NAND.
This option prevents display of error messages when no NAND is detected.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:51:35 -04:00
Steve Sakoman
4c468397cf mtd: nand: supress 'unknown NAND' warning if no nand is found
This printk was added recently and results in ugly output on systems
with no NAND:

NAND:  nand_get_flash_type: unknown NAND device: Manufacturer ID: 0x00, Chip ID: 0x00 0 MiB

instead of:

NAND:  0 MiB

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:51:29 -04:00
Steve Sakoman
3667cbeed5 ARMV7: OMAP3: Remove erroneous hard coded sdram setup for 128MB/bank
Upcoming Beagle and Overo revisions use POP memory with 256MB or 512MB
per bank.  This patches uses the SDRC settings from x-load or the config
header to set up timing properly.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:51:24 -04:00
Steve Sakoman
543431b66d ARMV7: OMAP3: Fix broken reset command on OMAP36XX/37XX and OMAP4
Using the reset command on OMAP36XX/37XX and OMAP4 caused a hang. This
patch uses the reset bit appropriate for each CPU architecture.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:51:18 -04:00
Mans Rullgard
0c0a0e0781 ARMV7: OMAP3: Apply Cortex-A8 errata workarounds only on affected revisions
The workarounds for errata 621766 and 725233 should only be applied
on affected Cortex-A8 revisions.  Recent chips use r3px cores where
these have been fixed.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:51:13 -04:00
Mans Rullgard
096ca838b5 ARMV7: OMAP3: Convert setup_auxcr() to pure asm
This function consists entirely of inline asm statements, so writing
it directly in a .S file is simpler. Additionally, the inline asm is
not safe as is, since registers are not guaranteed to be preserved
between asm() statements.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:51:09 -04:00
Mans Rullgard
2984470746 ARMV7: OMAP3: Fix and clean up L2 cache enable/disable functions
On OMAP34xx ES1.0, the L2 enable bit can only be set in secure mode,
so an SMC call to the ROM monitor is required.  On later versions,
and on newer devices, this bit is banked and we can set it directly.

The code checked only the ES revision of the chip, and hence incorrectly
used the ROM call on ES1.0 versions of other devices.

This patch adds a check for chip family as well as revision, and also
removes some code duplication between the enable and disable functions.

Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:51:04 -04:00
Steve Sakoman
7c281c985c ARMV7: OMAP3: Add clock setup for OMAP36XX/37XX
This patch configures clocks properly when a 36XX/37XX
processor is detected.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:50:58 -04:00
Steve Sakoman
b2b9169f0b ARMV7: OMAP3: Update CPU type detection for AM35XX/OMAP36XX/37XX
TI has added new processors to the OMAP3 family.  This patch enhances
the code in sysinfo.c to detect which family member is present.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:50:52 -04:00
Steve Sakoman
ba9a11e4ea ARMV7: OMAP: Configure Overo's second network chip
Confiures GPMC timings for both chips and also configures pinmux
for GPIO_65, which is used as the interrupt signal for the second chip

Signed-off-by: Scott Ellis <scott@jumpnowtek.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:50:47 -04:00
Steve Sakoman
06b95bd50d ARMV7: OMAP: Add detection and support for Beagle C4 revision
This patch enhances the revision detection function and adds
support for the C4 revision.  The board revision is printed
and approriate revision specific setup is done automatically.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:50:42 -04:00
Steve Sakoman
c2d5b34120 ARMV7: OMAP: Add board revision detection for Overo
The latest Overo COM modules encode their revision number on
GPIOs 115, 113, and 112.  All boards to date have no pullups on these pins
and hence appear as revision 0.

This patch reads and prints the revision information.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:50:38 -04:00
Steve Sakoman
5af3246034 ARMV7: OMAP: Add mpurate boot arg for Overo and Beagle
Allows one to set the processor clock rate via "setenv mpurate 720" for example

Default is set to a "safe" 500 Mhz.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:50:33 -04:00
Steve Sakoman
9314961329 ARMV7: OMAP: Enable input driver on Overo's MMC1_CLK and MMC3_CLK pinmux setup
This patch modifies the pinmux setup for MMC1_CLK and MMC3_CLK to enable
the input driver.  MMC2_CLK was already properly configured.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:50:27 -04:00
Steve Sakoman
5a0a82f42b ARMV7: OMAP: add convenience function to set TWL4030 regulator voltages
This patch adds a function to allow one to easily set the target
voltage for the TWL4030 regulators.  It also modifies the existing
code to use this new function.  Applicable definitions are moved
out of the driver file and into the header file so that they are
generally accessible

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:50:23 -04:00
Steve Sakoman
0e7b62179f ARMV7: OMAP: Move syslib.c to omap-common since it can be shared by OMAP3 and OMAP4
The functions in syslib.c can be shared, so this patch moves it from
cpu/omap3 to cpu/omap-common

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-09-08 14:50:17 -04:00
Wolfgang Denk
f8736c2125 Merge branch 'avr32' of git://git.denx.de/u-boot-atmel 2010-09-08 00:48:27 +02:00
Wolfgang Denk
cf64fda38e Merge branch 'at91' of git://git.denx.de/u-boot-atmel 2010-09-08 00:42:00 +02:00
Wolfgang Denk
09b4a9cf40 Merge branch 'master' of git://git.denx.de/u-boot-samsung 2010-09-08 00:03:22 +02:00
Wolfgang Denk
27130f133e Merge branch 'master' of git://git.denx.de/u-boot-marvell 2010-09-07 23:20:53 +02:00
Wolfgang Denk
f91506e283 Merge branch 'master' of /home/wd/git/u-boot/master 2010-09-07 22:19:49 +02:00
Wolfgang Denk
2df0e6fc6b Merge branch 'master' of git://git.denx.de/u-boot-mips 2010-09-07 21:55:06 +02:00
Wolfgang Denk
c0026fc581 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2010-09-07 21:52:29 +02:00
Wolfgang Denk
1b43b5d7a6 Merge branch 'master' of git://git.denx.de/u-boot-sh 2010-09-07 21:49:47 +02:00
Wolfgang Denk
6050c754b0 Merge branch 'next' of git://git.denx.de/u-boot-nios 2010-09-07 21:46:14 +02:00
Wolfgang Denk
67bd94148e Merge branch 'master' of git://git.denx.de/u-boot-i2c 2010-09-07 21:28:20 +02:00
Xiangfu Liu
4093031607 MIPS: update the MIPS u-boot.lds
From the document, if set all arguments in "OUTPUT_FORMAT" to
"tradbigmips", then even add "-EL" to gcc we still get EB format.

pb1x00 is only used in Little-endian, so its default endian should be
set to LE.

Signed-off-by: Xiangfu Liu <xiangfu@openmobilefree.net>
Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
2010-09-04 11:52:17 +09:00
Alexander Stein
5c3dab97c7 at91_pit: Fix AT91_PIT_MR_PIV_MASK macro
Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com>
2010-09-03 16:26:45 +02:00
Haavard Skinnemoen
1f36f73fe7 avr32: Add simple paging support
Use the MMU hardware to set up 1:1 mappings between physical and virtual
addresses. This allows us to bypass the cache when accessing the flash
without having to do any physical-to-virtual address mapping in the CFI
driver.

The virtual memory mappings are defined at compile time through a sorted
array of virtual memory range objects. When a TLB miss exception
happens, the exception handler does a binary search through the array
until it finds a matching entry and loads it into the TLB. The u-boot
image itself is covered by a fixed TLB entry which is never replaced.

This makes the 'saveenv' command work again on ATNGW100 and other boards
using the CFI driver, hopefully without breaking any rules.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2010-09-03 15:13:02 +02:00
Haavard Skinnemoen
9cec2fc209 avr32: Use uncached() macro to get an address for SDRAM init
The paging system which is required to set up caching properties has not
yet been initialized when the SDRAM is initialized. So when the
map_physmem() function is converted to return the physical address
unchanged, the SDRAM initialization will break on some boards.

The avr32-specific uncached() macro will return an address which will
always cause uncached accessed to be made. Since this happens in the
board code, using avr32-specific features should be ok, and will allow
the SDRAM initialization to keep working.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2010-09-03 15:12:52 +02:00
Haavard Skinnemoen
8d1334a787 avr32: Print unrelocated PC on exception
In addition to the real PC value, also print the value of PC after
subtracting the relocation offset. This value will match the address in
the ELF file so it's much easier to figure out where things went wrong.

Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
2010-09-03 15:12:42 +02:00
Reinhard Meyer
7588ad12ba AT91: add option to enable pullups in at91sam9260_devices.c
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-09-03 11:22:49 +02:00
Reinhard Meyer
f09d3b2896 AT91/AVR32: atmel_spi.c: flush RDR before next SPI transaction
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-09-03 11:22:25 +02:00
Reinhard Meyer
e0cd44c3c1 AT91: reset.c: fix comments, add option
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-09-03 11:21:51 +02:00
Reinhard Meyer
93dfcbe3c8 AT91: fix at91sam9260.h for AT91SAM9XE
Define the different location of the GPBRs for the 9XE
Define the proper CPU Name

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-09-03 11:21:02 +02:00
Reinhard Meyer
d88bebe16d AT91SAM9XE: add embedded flash support
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-09-03 11:20:31 +02:00
Reinhard Meyer
c7260d1539 AT91: add RTT and GPBR based RTC
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-09-03 11:20:02 +02:00
Reinhard Meyer
1592ef8596 AT91: MCI: add SD/MMC driver using mmc framework
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-09-03 11:19:01 +02:00
Stefan Roese
f3cac53840 ppc4xx: Invalidate d-cache when used as init-ram
We need to invalidate the data cache after it has been used as init-ram.

This problem was detected on the lwmon5 update.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-03 11:14:26 +02:00
Stefan Roese
c1ab75c7d4 ppc4xx: Fix 440EPx bug in reconfigure_pll()
This patch fixes a bug in reconfigure_pll(), where the detection of
the current bootstrap option is wrong. The ICS bits where incorrectly
shifted. This bug was found on the lwmon5 board, which uses bootstrap
option H (I2C bootstrap EEPROM).

Additionally a bit of code was moved into the if statement, since its
only used after later on. No need to run this code all the time.

Also, a few empty lines are added to make the code better readable.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Rupjyoti Sarmah <rsarmah@amcc.com>
Cc: Victor Gallardo <vgallardo@appliedmicro.com>
2010-09-03 11:14:21 +02:00
Matthias Fuchs
38570b2ff3 ppc4xx: Fix APC405 board support
Opps, after a long time I tested recent u-boot on our
APC405 board. This simple fix makes networking work again.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-09-03 11:14:13 +02:00
York Sun
359ec49319 powerpc/8xxx: Fix dma for 36bit addressing
Use more bits to support 36-bit addressing

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-31 11:23:15 -05:00
York Sun
8d9207c792 Fix parameters to support RDIMM for P2020DS
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-31 11:23:04 -05:00
Jens Scharsig
c982d866ea AT91 Fix: return value of get_tbclk
* Fix: return value of get_tbclk
 * this fixes issue with prematurely restart/retry, if BOOT_RETRY_TIMEOUT is used

Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
2010-08-31 10:38:35 +02:00
Albert Aribaud
c2ca44c24b edminiv2: add I2C support using mvtwsi driver
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar<prafulla@marvell.com>
Acked-by: Heiko Schocher<hs@denx.de>
2010-08-30 14:10:45 +02:00
Albert Aribaud
306563a773 i2c: rewrite mvtwsi, support orion5x and kirkwood
This rewrite of the mvtwsi driver is 25% smaller and much
faster and simpler than the previous code.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar<prafulla@marvell.com>
Acked-by: Heiko Schocher<hs@denx.de>
2010-08-30 14:10:35 +02:00
Albert Aribaud
01ec99d969 i2c: rename kirkwood_i2c to mvtwsi
This driver is not kirkwood-specific and can also be used
e.g. by orion5x. Rename to a SoC-neutral name.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar<prafulla@marvell.com>
Acked-by: Heiko Schocher<hs@denx.de>
2010-08-30 14:10:23 +02:00
Albert Aribaud
2fefa2ae86 suen3: remove CONFIG_HARD_I2C and related defines
These are not used on this board, which uses soft I2C instead.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar<prafulla@marvell.com>
Acked-by: Heiko Schocher<hs@denx.de>
2010-08-30 14:10:11 +02:00
Nobuhiro Iwamatsu
3594f1987c sh: Update lowlevel_init.S of mpr2
Fix data size.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2010-08-30 17:02:49 +09:00
Nobuhiro Iwamatsu
339719373a sh: Update lowlevel_init.S of ms7750se
Fix data size.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2010-08-30 17:02:49 +09:00
Nobuhiro Iwamatsu
fc0db1325a sh: Update lowlevel_init.S of ms7720se
Fix data size.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2010-08-30 17:02:49 +09:00
Nobuhiro Iwamatsu
ebd0d062ac sh: Add support do_bdinfo function
SH did not support do_bdinfo fuction.
This code based avr32 stuff.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2010-08-30 17:02:49 +09:00
Nobuhiro Iwamatsu
72d5cdb71a sh: Update lowlevel_init.S of ap325rxa
Fix data size.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2010-08-30 17:02:49 +09:00
Nobuhiro Iwamatsu
edb3205a8d sh: Update lowlevel_init.S of r2dplus
Fix data size.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2010-08-30 17:02:48 +09:00
Nobuhiro Iwamatsu
45c710dd40 sh: Update lowlevel_init.S of espt-giga
Fix data size.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2010-08-30 17:02:48 +09:00
Nobuhiro Iwamatsu
3106732180 sh: Update lowlevel_init.S of sh7763rdp
Fix data size.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2010-08-30 17:02:48 +09:00
Nobuhiro Iwamatsu
e77ff55203 sh: Update lowlevel_init.S of MigoR
Fix data size.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2010-08-30 17:02:48 +09:00
Nobuhiro Iwamatsu
20962771fa sh: Update lowlevel_init.S of sh7785lcr
Fix data size.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2010-08-30 17:02:48 +09:00
Nobuhiro Iwamatsu
ed56fb1d77 sh: Update lowlevel_init.S of rsk7203
Update data address size and fix typo of register.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
2010-08-30 17:02:48 +09:00
Minkyu Kang
a87bc64cb4 ARMV7: S5P: rename the member of gpio structure
Typically we declare the name of gpio structure to "gpio",
so it was duplicated around the name. (e.g: gpio->gpio_a)
This patch modified the naming that is removing "gpio_".

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2010-08-30 14:44:33 +09:00
Minkyu Kang
f70409aff3 ARMV7: S5P: separate the peripheral clocks
Because of peripheral devices can select clock sources,
separate the peripheral clocks. (pwm, uart and so on)
It just return the pclk at s5pc1xx SoC,
but s5pc210 SoC must be calculated by own clock register setting.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2010-08-30 14:44:16 +09:00
Albert Aribaud
438c37e1b3 orion5x: fix comment-in-comment typo in cpu.h
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-08-27 21:41:48 +05:30
Prafulla Wadaskar
f106056095 Kirkwood: bugfix: window size (mis)calculation
Fixed kw_winctrl_calcsize() off-by-1 bug which caused mapping
windows size to be cut by half.
This corrected all windows address configuration

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-08-26 14:43:55 +05:30
Albert Aribaud
4e4479a892 Orion5x: bugfix: window size (mis)calculation
Fix orion5x_winctrl_calcsize() off-by-1 bug which caused mapping
windows to be cut by half. This afected all windows including NOR
flash (causing half the flash to be unaccessible) but DRAM was and
still is fine as its size is determined otherwise.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-08-26 14:05:19 +05:30
Minkyu Kang
545dabbeef ARMV7: S5P: fix the macro at samsung_get_base function
New line is unnecessary at last line of macro.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-08-26 17:34:38 +09:00
Minkyu Kang
889a275d42 ARMV7: S5P: rename from CONFIG_S5PC1XX to CONFIG_S5P
Use the same configuration around S5P SoCs.
(s5pc100, s5pc110, s5pc210 and so on)

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-08-26 17:33:23 +09:00
Reinhard Meyer
7a92e53cd0 CMD_I2C: make alen=0 work
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-08-26 08:33:24 +02:00
Minkyu Kang
da70a2bb4a S5P: mmc: fix the mmc offset
This patch fixed the size of mmc structure.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-08-23 15:34:37 +09:00
Minkyu Kang
37168dab52 ARMV7: S5P: rename from s5pc1xx to s5p
Because of these are common files around s5p Socs, rename from s5pc1xx to s5p.
And getting cpu_id is SoC specific, so move to SoC's header file.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2010-08-23 15:34:25 +09:00
Minkyu Kang
852bd07c80 ARMV7: S5P: make s5p-common for sharing the code between s5pc1xx and s5pc2xx
This patch adds basic support for s5pc210.
s5p-common will be used by all of s5p SoCs.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2010-08-23 15:34:20 +09:00
Nishanth Menon
a947f4b68b omap2: i2c: remove redundant header definitions
Remove the register offset and common defines which are
already present in drivers/i2c/omap24xx.h. All of these
defines carry the same value even.

Cc: Steve Sakoman <steve@sakoman.com>
Cc: Heiko <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Wolfang Denk <wd@denx.de>

Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Steve Sakoman <steve@sakoman.com>
2010-08-23 08:09:04 +02:00
Nishanth Menon
46d8ece4e8 omap2: i2c: add syss offset
OMAP2420 ES2.3 trm defines syss register offset as 0x10. Add it.

Cc: Steve Sakoman <steve@sakoman.com>
Cc: Heiko <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Wolfang Denk <wd@denx.de>

Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Steve Sakoman <steve@sakoman.com>
2010-08-23 08:08:49 +02:00
Nishanth Menon
07cf5e207e i2c: omap2+: change header guard to be generic
Make the header guard to be generic to stop conflicting with
omap2 i2c header file arch/arm/include/asm/arch-omap24xx/i2c.h

Cc: Steve Sakoman <steve@sakoman.com>
Cc: Heiko <hs@denx.de>
Cc: Sandeep Paulraj <s-paulraj@ti.com>
Cc: Wolfang Denk <wd@denx.de>

Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Steve Sakoman <steve@sakoman.com>
2010-08-23 08:08:31 +02:00
Eric Bénard
0ca6c526f6 cpuat91: update defaut environement
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-08-20 16:42:02 +02:00
Eric Bénard
af4b8b4bdb cpuat91: convert to new at91 soc architecture
convert the board to the new soc architecture
update default config
i2c upgrade taken from eb_cpux9k2.h & board/BuS/eb_cpux9k2/cpux9k2.c

Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-08-20 16:41:57 +02:00
Daniel Gorsulowski
64037fb453 at91: Enabeling USB host on meesc board
There was an redesign, so USB is available now.

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-08-20 16:17:52 +02:00
Daniel Gorsulowski
d4562e0940 at91: Update meesc board to new SoC access
* convert meesc board to use c stucture SoC access
* change gpio access to at91_gpio syntax
* moved CONFIG_SYS_HZ below board and cpu defines (purely cosmetic)

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-08-20 16:17:48 +02:00
Daniel Gorsulowski
9f07dedeb0 at91: Defined main clock frequency on esd at91 boards
Autodetection is undesired now

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-08-20 16:17:41 +02:00
Scott Wood
6395f318e9 fdt: call fdt_parent_offset fewer times while translating addresses
fdt_parent_offset() is an expensive operation, so we'd like to reduce
unnecessary calls to it.

Further, the practice of iterating up to the root if address/size cells
aren't found was apparently done for Linux for compatibility with certain
buggy Open Firmware implementations, and U-Boot inherited the code.  The
compliant behavior is to treat a missing #address-cells as 2, and a missing
#size-cells as 1 -- never looking anywhere but the immediate parent of the
node of interest.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19 21:21:41 -05:00
Matthew McClintock
b80d30546e mpx85xx/fdt: Add cpu-release-addr for all cores
We currently do not add a cpu-release-addr for core 0, this is needed
when we want to reset core 0 and later restart it from Linux

Signed-off-by: Matthew McClintock <msm@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19 21:20:10 -05:00
Thomas Chou
7a6a7d10e6 nios2: fix out of reach case for do_reset
There is a limitation (or bug?) of nios2 toolchain. The nios2 gcc
didn't generate correct code when the reset vector is passed as a
constant. It just generated a direct "call", which was wrong when
the reset vector was not located in the same 256MB span as u-boot.

The "Nios II Processor Reference Handbook" said,
"call can transfer execution anywhere within the 256 MByte range
determined by PC31..28. The Nios II GNU linker does not automatically
handle cases in which the address is out of this range."

So we have to use registered "callr" instruction to do the job.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2010-08-19 22:15:49 -04:00
Thomas Chou
62a0557382 nios2: fix bootm error on fdt args
We should check argv[3] only if there are enough args. Otherwise,
it might cause invalid memory access fault.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2010-08-19 22:15:49 -04:00
Kumar Gala
a2243b84bf powerpc/83xx: Fix build issue with ve8313 board due to lbus changes
We get two build errors:

fsl_elbc_nand.c: In function 'fsl_elbc_run_command':
fsl_elbc_nand.c:231: error: 'fsl_lbc_t' has no member named 'lsor'
make[1]: *** [/work/wd/tmp-ppc/drivers/mtd/nand/fsl_elbc_nand.o] Error 1

and

ve8313.c: In function 'initdram':
ve8313.c:104: error: expected '=', ',', ';', 'asm' or '__attribute__'
before '*' token
ve8313.c:104: error: 'lbc' undeclared (first use in this function)
ve8313.c:104: error: (Each undeclared identifier is reported only once
ve8313.c:104: error: for each function it appears in.)
ve8313.c:104: error: 'immap_t' has no member named 'lbus'
make[1]: *** [ve8313.o] Error 1
make: *** [board/ve8313/libve8313.a] Error 2

Due to changes to unifiy local bus struct definitions.

Reported-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19 13:24:00 -05:00
Lian Minghuan
0e159024ea powerpc/85xx: Fix SRIO LAW setup on corenet_ds boards
In function board_early_init_r(), serdes will not be initialize yet.
Thus sRIO was always considered disabled.  Move the check for sRIO into
misc_init_r() which is called after fsl_serdes_init().

Also, fixed warning associated with gur variable possibly not being
used.

Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Lian Minghuan <B31939@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19 02:06:14 -05:00
york
90870d9846 powerpc/8xxx: Fix quad-rank DIMMs support on corenet_ds board.
The board specific parameters associated with quad rank dimms where
missing.  This fixes it so the board will function if quad rank dimms
are placed in it.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19 02:06:14 -05:00
Kumar Gala
ed062e0f6c powerpc/85xx: Rename Security Engine Job Queue to Job Ring to match docs
Official docs call it the Job Ring not Job Queue for the p4080 security
block.  Match the docs to reduce confusion.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19 02:06:13 -05:00
Kim Phillips
680c613a5c powerpc/8xxx: share PIC defines among 85xx and 86xx
fixes breakeage introduced by commit
a37c36f4e7 "powerpc/8xxx: query
feature reporting register for num cores on unknown cpus"

Reported-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-19 02:06:13 -05:00
Wolfgang Denk
5549d22b65 Merge branch 'master' of /home/wd/git/u-boot/master 2010-08-18 21:19:00 +02:00
Wolfgang Denk
bd23130781 Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master 2010-08-18 21:16:35 +02:00
Sandeep Paulraj
9ce2c4b7f7 ARM: Update ARM mach-types
This patch updates the mach-types.h based on the latest linux kernel

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-08-18 21:15:57 +02:00
Philippe De Muyter
54652991ca Work around bug in Numonyx P33/P30 256-Mbit 65nm flash chips.
I have "ported" U-boot to a in house made board with Numonyx Axcell P33/P30
256-Mbit 65nm flash chips.

After some time :( searching for bugs in our board or soft, we have
discovered that those chips have a small but annoying bug, documented in
"Numonyx Axcell P33/P30 256-Mbit Specification Update"

It states :
When customer uses [...] block unlock, the block lock status might be
altered inadvertently. Lock status might be set to either 01h or 03h
unexpectedly (00h as expected data), which leads to program/erase failure
on certain blocks.

A working workaround is given, which I have applied and tested with success :

Workaround:  If the interval between 60h and its subsequent command
	     can be guaranteed within 20us, Option I is recommended,
	     otherwise Option II (involves hardware) should be selected.
Option I: The table below lists the detail command sequences:
Command
	      Data bus           Address bus       Remarks
Sequence
  1              90h            Block Address
						   Read Lock Status
  2             Read         Block Address + 02h
 (2)(3)                                      (1)
3                60h           Block Address
 (2)(3)                                      (1)   Lock/Unlock/RCR Configuration
4           D0h/01h/03h        Block Address
Notes:
(1) Block Address refers to RCR configuration data only when the 60h
    command sequence is used to set RCR register combined with 03h
    subsequent command.
(2) For the third and fourth command sequences, the Block Address must
    be the same.
(3) The interval between 60h command and its subsequent D0h/01h/2Fh/03h
    commands should be less than 20us.

And here is a log comparison of a simple (destructive) flash test without
and with the workaround.

 diff without-numonyx-workaround.log with-numonyx-workaround.log
 -U-Boot 2010.06-00696-g22b002c-dirty (Aug 16 2010 - 15:07:47)
 +U-Boot 2010.06-00696-g22b002c-dirty (Aug 16 2010 - 15:25:19)

  CPU:   Freescale MCF5484
         CPU CLK 200 MHz BUS CLK 100 MHz
  Board: Macq Electronique ME2060
  I2C:   ready
  DRAM:  64 MiB
  FLASH: 32 MiB
  In:    serial
  Out:   serial
  Err:   serial
  Net:   FEC0, FEC1
  -> flinfo

  Bank # 1: CFI conformant FLASH (16 x 16)  Size: 32 MB in 259 Sectors
    Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x8922
    Erase timeout: 4096 ms, write timeout: 1 ms
    Buffer write timeout: 5 ms, buffer size: 1024 bytes

    Sector Start Addresses:
    FE000000 RO   FE008000 RO   FE010000 RO   FE018000 RO   FE020000 RO
    FE040000 RO   FE060000 RO   FE080000 RO   FE0A0000 RO   FE0C0000 RO
    ...
    FFF80000 RO   FFFA0000 RO   FFFC0000 RO   FFFE0000 RO
  -> protect off all
  Un-Protect Flash Bank # 1
  ................... done
  -> erase all
  Erase Flash Bank # 1
  ................... done
  -> cp.b 1000000 fe000000 2000000
 -Copy to Flash... Flash not Erased
 +Copy to Flash... done
  ->

Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-08-18 09:09:00 +02:00
Stefan Roese
70084df712 cfi_flash: Cleanup flash_print_info()
This patch does the following:

- Extract code to detect if sector is erased into function
  sector_erased().
- Because of this, we don't have variable declarations inside the
  sector loop in flash_print_info()
- Change "return" to "break" in the "if (ctrlc()) statement:
  This fixes a problem with the resulting output. Before this
  patch the output was:

  Sector Start Addresses:
  FC000000        FC020000        FC040000   =>

  With this patch it is now:

  Sector Start Addresses:
  FC000000        FC020000        FC040000
  =>

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Kim Phillips <kim.phillips@freescale.com>
Cc: Wolfgang Denk <wd@denx.de>
2010-08-18 09:09:00 +02:00
Philippe De Muyter
d77c7ac47e Fix printing & reading of 16-bit CFI device identifiers
Fix reading and printing of CFI flashes 16-bit devices identifiers

Nowadays CFI flashes have a 16-bit device identifier.  U-boot still
print them and read them as if they were only 8-bit wide.  Fix that.
Before:
  Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x1B
After:
  Intel Extended command set, Manufacturer ID: 0x89, Device ID: 0x881B

Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-08-18 09:09:00 +02:00
Kim Phillips
2e97394a6d cfi_flash: flinfo: allow user interrupt in flash print info fn
flashes getting larger, users more impatient.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-08-18 09:09:00 +02:00
Minkyu Kang
d93d0f0cfe S5P: Use accessor functions instead of SoC specific defines to access the base address
This patch is intended to prepare the other S5P SoC. (s5pc210)
If use SoC specific defines then can't share with other SoC.
So, make the accessor functions for access the base address by common way.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2010-08-17 11:38:19 +09:00
Mike Frysinger
962ad59e25 env_nand: return error when no device is found
Currently, if there is an error probing the NAND chip and the env is based
in NAND, the readenv() function will use a NULL function pointer and thus
jump to address 0.

Here I just check for a non-zero value of blocksize as that shouldn't be
zero when a valid device is found, but perhaps there is a better way for
someone familiar with the NAND internals to suggest.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Ben Gardiner <bengardiner@nanometrics.ca>
2010-08-13 13:32:42 -05:00
Wolfgang Denk
ae37a0704a Merge branch 'master' of git://git.denx.de/u-boot-ti 2010-08-12 23:08:05 +02:00
Wolfgang Denk
668a6b4591 Merge branch 'master' of git://git.denx.de/u-boot-usb 2010-08-12 23:05:22 +02:00
Grazvydas Ignotas
dc41b8bf3d mmc: omap3: fix block read function
The OMAP3 block read function is not following API and always returning
1 instead of read block count, fix it. Also to simplify code, merge it
with with a helper function, which was only called from the block read
function.

After this patch ext2 filesystem can be used properly.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-08-12 13:50:25 -04:00
Grazvydas Ignotas
8bbf4307c7 mmc: omap3: make local symbols static
Make driver local variables and functions static and
remove them from the arch header.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Tested-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-08-12 13:50:19 -04:00
Sergei Poselenov
842404ea07 Fixed clobbered output of the "help usb" command
The "usb help" doesn't format the output correctly:

=> help usb
usb - USB sub-system

Usage:
usb reset - reset (rescan) USB controller
usb stop [f]  - stop USB [f]=force stop
usb tree  - show USB device tree
usb info [dev] - show available USB devices
usb storage  - show details of USB storage devices
usb dev [dev] - show or set current USB storage device
usb part [dev] - print partition table of one or all USB storage devices
usb read addr blk# cnt - read `cnt' blocks starting at block `blk#'
    to memory address `addr'usb write addr blk# cnt - write `cnt'
blocks starting at block `blk#' from memory address `addr'
=>

With fix below applied, the output is correct:

=> help usb
usb - USB sub-system

Usage:
usb reset - reset (rescan) USB controller
usb stop [f]  - stop USB [f]=force stop
usb tree  - show USB device tree
usb info [dev] - show available USB devices
usb storage  - show details of USB storage devices
usb dev [dev] - show or set current USB storage device
usb part [dev] - print partition table of one or all USB storage devices
usb read addr blk# cnt - read `cnt' blocks starting at block `blk#'
    to memory address `addr'
usb write addr blk# cnt - write `cnt' blocks starting at block `blk#'
    from memory address `addr'
=>

Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
2010-08-12 16:40:00 +02:00
Ajay Kumar Gupta
7dc27b05a4 AM3517EVM: musb: add usb config
Enabling USB HOST in defconfig.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
2010-08-12 16:40:00 +02:00
Ajay Kumar Gupta
5689f4b5b4 musb: am35x: Workaround for fifo read issue
AM35x supports only 32bit read operations so we need to have
workaround for 8bit and 16bit read operations.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
2010-08-12 16:40:00 +02:00
Ajay Kumar Gupta
dbea324200 musb: MSC host support for AM35x
Tested MSC Host on AM3517EVM.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
2010-08-12 16:40:00 +02:00
Ajay Kumar Gupta
a7e9c513b6 AM35x: Adding SCM general register definitions
Adding general register structure of system control module (SCM)
of AM35x. This would be required to access devconf2 and ip_sw_reset
register in musb module.

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
2010-08-12 16:39:59 +02:00
Mike Frysinger
5d89115c53 Blackfin: re-use board data in cpu banner
The bi_cpu field of the board data is already set to the relevant cpu
string, so there is no need for us to use the define directly.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-11 11:29:19 -04:00
Mike Frysinger
98ae6070c1 Blackfin: cm-bf548: increase monitor len
Recent features enabled by default require a larger monitor size for the
cm-bf548 port, so bump it up a bit.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-11 11:29:14 -04:00
Michael Hennerich
5fc564eda7 Blackfin: shutdown video DMA when booting Linux
In case there is no frame buffer driver present in Linux to hand over the
PPI LCD DMA upon boot, the DMA initiated by u-boot to display the splash
screen runs unattended.  Therefore always stop the video driver in u-boot
before starting Linux.  If people don't want this behavior, then they can
simply stub out the video_stop() function in their board video driver.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-11 11:29:08 -04:00
Matthias Weisser
18a056a18f ARM: Add support for jadecpu board based on MB86R01 SoC
This patch adds support for the jadecpu board using the
MB86R01 'Jade' SoC from Fujitsu.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2010-08-10 23:14:35 +02:00
Matthias Weisser
b2621bcb8c video: add support for display controller in MB86R0x SoCs
This patch adds support for the display controller in
the MB86R0x SoCs.

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
Acked-by: Anatolij Gustschin <agust@denx.de>
2010-08-10 23:14:21 +02:00
Matthias Weisser
6052ac8386 ARM: Add support for MB86R0x SoCs
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2010-08-10 23:13:28 +02:00
Sergei Trofimovich
69a2a4d9a5 disk/part.c: 'usb storage' avoiding overflow when output capacity
Before:
    Marvell>> usb storage
      Device 0: Vendor: StoreJet Rev:  Prod:  Transcend
                Type: Hard Disk
                Capacity: 28759.9 MB = 28.0 GB (488397168 x 512)
After:
    Marvell>> usb storage
      Device 0: Vendor: StoreJet Rev:  Prod:  Transcend
                Type: Hard Disk
                Capacity: 238475.1 MB = 232.8 GB (488397168 x 512)

Signed-off-by: Sergei Trofimovich <slyfox@gentoo.org>
2010-08-10 23:08:55 +02:00
Wolfgang Denk
b9d51fbb18 Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-08-10 23:03:15 +02:00
Wolfgang Denk
42441b8a1a Merge branch 'master' of git://git.denx.de/u-boot-net 2010-08-10 22:57:54 +02:00
Wolfgang Denk
b77f380115 Merge branch 'master' of git://git.denx.de/u-boot-imx 2010-08-10 22:49:09 +02:00
Albert Aribaud
4cfa0ab2c9 orion5x: allow overriding default mappings windows
Turn all ORION5X_DEF{ADR,SZ}_xxx macros into ORION5X_{ADR,SZ}_xxx
and allow defining them from board code to override defaults. This
is particularly useful for defining board-specific FLASH address
and size in board header file rather than having to tweak orion5x
code.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-08-10 22:44:12 +02:00
Wolfgang Denk
fe8d63c8c7 Merge branch 'master' of git://git.denx.de/u-boot-marvell 2010-08-10 22:37:27 +02:00
Wolfgang Denk
9844d027b5 Merge branch 'master' of git://git.denx.de/u-boot-ti 2010-08-10 22:20:51 +02:00
Wolfgang Denk
201532a69c Merge branch 'master' of ../master 2010-08-10 22:20:27 +02:00
Li Haibo
51b5870bdc MX51EVK: fix return value of get_timer_masked
get_timer_masked() should return current timestamp,
not current ticks from hardware register.

Tested on one custom board with NAND flash.
Without this patch, NAND write always TIMEOUT
because get_timer(0) return a big value.

This patch applies for u-boot-2010.06

Signed-off-by: Li Haibo <hbli@sinocastel.com>
2010-08-10 09:46:44 +02:00
Reinhard Meyer
a9804be868 fix cmd_mmc.c, line 136 missing "
Remove warning for missing " at the end of line 136

Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
2010-08-10 09:43:26 +02:00
Minkyu Kang
6a69e11a79 S5P: mmc: use the standard debug macro
Use the standard debug macro instead of the costom macro

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Wolfgang Denk <wd@denx.de>
2010-08-10 13:42:23 +09:00
Ben Warren
d7fb9bcfb2 Fix compile warnings for const correctness
Commit 6e37b1a3a25004d3df5867de49fff6b3fc9c4f04 modifies several net calls
to take a (const char *) parameter instead of (char *), but in some cases
the modified functions call other functions taking (char *).  The end result
is warnings about discarding the const qualifier.

This patch fixes these other function signatures.

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-08-09 11:52:30 -07:00
Mike Frysinger
ede16ea32d miiphy: leverage current_mii cache more
For code that uses miiphy_{read,write}, every call invokes a full look up
of the mii list.  There is already a "current_mii" cache that is used by
some code, but have the miiphy_{read,write} function use it as well.  This
does increase the code size slightly, but I think it's worth it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-08-09 11:52:30 -07:00
Mike Frysinger
0daac97801 miiphy: unify device list lookup
Rather than have every func re-implement the list walking code, do it one
local function.  This shrinks the resulting object code a little while
making the source much more manageable.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-08-09 11:52:29 -07:00
Mike Frysinger
5700bb6352 miiphy: constify device name
The driver name does not need to be writable, so constify it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-08-09 11:52:29 -07:00
Kim Phillips
78b7a8ef8b net: rename "FSL UECx" net interfaces "UECx"
continuation of commit 2ecc2262d66a286e3aac79005bcb5f461312dea8
"net ppc: fix ethernet device names with spaces" (currently in
u-boot-net.git) for QE based parts.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-08-09 11:52:29 -07:00
Heiko Schocher
48690d8024 net ppc: fix ethernet device names with spaces
since commit 1384f3bb8a ethernet names
with spaces drop a

Warning: eth device name has a space!

message. This patch fix it for:

- "FEC ETHERNET" devices found on
  mpc512x, mpc5xxx, mpc8xx and mpc8220 boards.
  renamed to "FEC".
- "SCC ETHERNET" devices found on
  mpc8xx, mpc82xx based boards. Renamed to "SCC".
- "HDLC ETHERNET" devices found on mpc8xx boards
  Renamed to "HDLC"
- "FCC ETHERNET" devices found on mpc8260 and mpc85xx based
  boards. Renamed to "FCC"

Tested on the kup4k board.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-08-09 11:52:28 -07:00
Stefano Babic
f699fe1e1f net,fec: Shorten device name as done for other drivers
After discussion on the ML it is suggested to drop unrequired
and not useful characters from the device name.
This patch changes the name for the fec_mxc driver from
"FEC_MXC" to "FEC".

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-08-09 11:52:27 -07:00
Stefan Roese
fc21cd552b ppc4xx: Fix/Update katmai board header
This patch has the following fixes/changes:

- Set 'kernel_addr' and 'ramdisk_addr' to correct values and add
  'fdt_addr' environment variable
- Remove 'kozio' environment variable
- Remove environmant variables to boot ancient arch/ppc Linux kernels
- Remove CONFIG_SYS_BOOTMAPSZ definition. It's already defined to
  the same value in amcc-common.h

Signed-off-by: Stefan Roese <sr@denx.de>
2010-08-09 16:05:37 +02:00
Heiko Schocher
5bea7e6ce3 ppc4xx: Fix building of sc3 board
Update image size after addition of new environment handling.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-08-09 16:05:18 +02:00
Matthias Fuchs
5baefbba38 ppc4xx: Fix building of PMC440 board
Update image size and default environment
after addition of new environment handling.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-08-09 16:05:07 +02:00
Matthias Fuchs
a00c137e04 ppc4xx: Fix building of CANBT board
Update image size after addition of new environment handling.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-08-09 16:05:03 +02:00
Matthias Fuchs
f3dc7f1977 ppc4xx: Fix building of AR405 board
Update image size after addition of new environment handling.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-08-09 16:04:59 +02:00
Wolfgang Denk
0ad7f0950a ppc4xx: cleanup default environment for AMCC boards
None of the AMCC boards uses an embedded environment, so there is no
need to run "saveenv" after updating U-Boot.  Drop the redundant
commands from the default environment.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-08-09 16:02:05 +02:00
Marek Vasut
b417260d87 PXA: Declare __io for vpac270 IDE
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-08-09 01:15:22 +02:00
Marek Vasut
c7e61334bc PXA: Fix missing includes
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-08-09 01:15:21 +02:00
Marek Vasut
68e8a289dc PXA: Fix off-the-tree build problems
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-08-09 01:13:59 +02:00
Mike Frysinger
f534c7cdc6 config.mk: avoid -traditional-cpp on OS X 10.5
Simply trying to include a basic header file like stdlib.h on OS X 10.5
and then building with -traditional-cpp fails with lots of errors like:
In file included from /usr/include/stdlib.h:63,
                 from test.c:3:
/usr/include/available.h:85: error: stray '#' in program
/usr/include/available.h:85: error: syntax error before numeric constant
/usr/include/available.h:86: error: stray '#' in program

In the past, I hadn't noticed because the old logic for these flags were
restricted to Darwin running on PowerPC systems while I'm running on an
Intel system.  But after some recent clean ups and changes, the flag was
being applied to all Darwin systems and my host tools broke.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-09 01:11:58 +02:00
Feng Wang
3840ebfaf8 fdt: Fix bug in size calculation in fdt_resize() with initrd use
Original bug description from Feng (fdt_resize() bug caused "WARNING:
could not set linux, initrd-start FDT_ERR_NOSPACE."):

What I got is an error: "WARNING: could not set linux,initrd-start
FDT_ERR_NOSPACE." after loading Device Tree blob. This in turn caused
linux to miss init part.

After some digging, I found out the reason for this error, it is caused
by fdt_resize().

FDT blob got resized after filling in all board specific information of
PowerPC. (in boot_body_linux()). It reduced blob size with only extra
space for two fdt_reserve_entry, one for fdt itself, and one for initrd.
Then it's aligned to a 0x1000 page boundary. However, later in
fdt_initrd(), it could add two more properties, initrd-start AND
initrd-end, each one needs at least two fdt_reserve_entry sizes done by
_fdt_add_property() (name and value). Thus, the two fdt_reserve_entry
extra space is not sufficient.

So for some specific fdt size which is just under the page boundary
after resizing, this will cause an error of FDT_ERR_NOSPACE in
fdt_initrd() when setting those two properties, and failed to pass
initrd information to linux.

My fix is in fdt_resize(), leave at least 4 fdt_reserve_entry for
initrd. So instead of 2*sizeof(struct fdt_reserve_entry) for
actual_totalsize, use 5*sizeof(struc fdt_reserve_entry).

Stefan: I got this same error on katmai, when trying to boot with
initrd (run flash_self). This patch fixes this issue.

Signed-off-by: Feng Wang <fwang02@harris.com>
Tested-by: Stefan Roese <sr@denx.de>
Cc: Jerry Van Baren <gvb.uboot@gmail.com>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
2010-08-09 01:10:30 +02:00
Frans Meulenbroeks
75b5bbdef6 board/purple/flash.c: removed unneded variable
removed a variable that was not used

Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
2010-08-09 01:08:09 +02:00
Frans Meulenbroeks
388a29d024 various cmd_* files: fixed layout a little bit
Most of the files have U_BOOT_CMD on a separate line,
but a few didn't and had the first line on the same line
as U_BOOT_CMD.

This changes these files by adding a line break and a tab

Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
2010-08-09 01:07:37 +02:00
Frans Meulenbroeks
cc9f607beb various cmd_* files: remove the command name from the help message
removed the command name from the help message as it is already printed.
for cmd_mmc also rewrote the message a little bit

Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
2010-08-09 01:06:34 +02:00
Detlev Zundel
0aef7bc719 tools/env/fw_printenv: Make redundant env work on locked flashes also
The invalidation of the old environment instance did not work for flashes
supporting hardware locking.  Now we unlock/lock around this update also.

Signed-off-by: Detlev Zundel <dzu@denx.de>
2010-08-09 01:05:37 +02:00
Mike Frysinger
a4e8d9f5f9 flash_protect: check for NULL flash info
If a flash is unable to be detected, and then someone calls flash_protect
on it (like the common code does in flash_init), the flash_protect logic
will dereference a NULL pointer.

Since flash_protect already does sanity checking on the info structs, add
a NULL pointer check in there.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-09 01:03:54 +02:00
Wolfgang Denk
9ed4a9582f getenv_f(): fix handling of too short buffers
Fix error handling in getenv_f() when the user provided buffer is too
short to hold the variable name; make sure to truncate and
NUL-terminate without overwriting the buffer limits.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-08-09 00:53:57 +02:00
Mike Frysinger
739b8080af dataflash mmc mux: use common cmd_usage function
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-09 00:32:26 +02:00
Mike Frysinger
a7481b353b mflash: use common cmd_usage function
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-09 00:32:06 +02:00
Mike Frysinger
64419e4751 print_buffer: optimize & shrink
Applying a little creative format string allows us to shrink the initial
data read & display loop by only calling printf once.  Re-using the local
data buffer to generate the string we want to display then allows us to
output everything with just one printf call instead of multiple calls to
the putc function.

The local stack buffer needs increasing by 1 byte, but the resulting code
shrink and speed up is worth it I think.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-09 00:28:38 +02:00
Mike Frysinger
8faba4894c cmd editing: optimize/shrink output blanking
No need to output spaces 1 char at a time in a loop when the printf code
can do the same thing with the right format string.  This shrinks things
and gives a nice speed up when killing off lines more than a byte or two
as printf will send out the buffer in one big chunk.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-09 00:26:04 +02:00
Heiko Schocher
8011ec638e 8xx, kup4k/kup4x: add FDT support
Signed-off-by: Heiko Schocher <hs@denx.de>
2010-08-09 00:12:00 +02:00
Heiko Schocher
e604e40916 8xx, kup4k/kup4x: configuration changes, code cleanup
- nfs-options removed
- hda->sda changed
- mtd parts added
- loadaddress changed
- cmd-line length increased
- lcd stuff removed
- code cleanup (use I/O accessors etc.)

Signed-off-by: Klaus Heydeck <heydeck@kieback-peter.de>
2010-08-09 00:09:20 +02:00
Stephan Linz
958e120643 fdt relocate: have more attention to use a bootmap or not
Platforms with flat device tree support can use a bootmap to relocate
the fdt_blob. This is not a must. That's why the relocation function
boot_relocate_fdt() should be use only if CONFIG_OF_LIBFDT was defined
together with CONFIG_SYS_BOOTMAPSZ (see common/cmd_bootm.c).

On MicroBlaze platforms there is no need to use a bootmap to relocate
a fdt blob. So we need a more precise focus on the compilation and usage
of boot_relocate_fdt().

In general it is valid to exclude the function boot_relocate_fdt() if
the bootmap size CONFIG_SYS_BOOTMAPSZ is not defined.

Signed-off-by: Stephan Linz <linz@li-pro.net>
2010-08-08 22:16:05 +02:00
Nobuhiro Iwamatsu
cd1535564c Add mkimage manpage
Some Linux distributions include the "mkimage" as a package.
This commit provides a manual page for mkimage.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

Added documentation for FIT images and examples.
Moved to doc/ directory.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-08-08 21:14:37 +02:00
Prafulla Wadaskar
86cf2ae492 Kirkwood: openrd_base: Added SATA support
This patch enables mvsata driver and related filesystem support.
The patch is tested for ide reset and ext2ls operation for a disk drive connected on SATA port0.
This patch depends upon the patche-series http://lists.denx.de/pipermail/u-boot/2010-August/074908.html

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-08-08 05:17:55 +05:30
Prafulla Wadaskar
5f30500316 cmd_ide: add support for Kirkwood
Added MVSATAC definitions to Kirkwood.
Added support for Kirkwood in cmd_ide.

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-08-08 05:17:55 +05:30
Albert Aribaud
ecaf3af297 edminiv2: add mvsata_ide and cmd_ide support
Add mvsata_ide and cmd_ide configuration in edminiv2 config

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-08-08 05:17:06 +05:30
Albert Aribaud
113bfe48bc cmd_ide: add support for orion5x
Add MVSATAHC definitions to orion5x.
Add support for orion5x in cmd_ide.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-08-08 05:17:06 +05:30
Albert Aribaud
39419ce589 ide: add mvsata_ide driver
This driver only provides initialization code; actual driving
is done by cmd_ide.c using the ATA compatibility mode of the
Marvell SATAHC controller.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-08-08 05:17:06 +05:30
Albert Aribaud
4fc7d2872d ide: reorder object files alphabetically
Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-08-08 05:17:05 +05:30
Albert Aribaud
f2a37fcd9b ide: add configuration
CONFIG_IDE_SWAP_IO

This configuration option replaces a complex conditional
in cmd_ide.c with an explicit define to be added to SoC or
board configs.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
2010-08-08 05:17:05 +05:30
Matthias Weisser
60fdc5f2f0 LZMA and LZO causes compile error
If both LZMA and LZO compressions are used there is a compile error
in cmd_bootm.c

Signed-off-by: Matthias Weisser <weisserm@arcor.de>
2010-08-07 23:49:59 +02:00
Aaron Pace
a2740dd00d ext2fs: Fix optimization bug for doubly-indirect block pointers
Doubly-indirect block numbers are compared against the first-level
indirect block when checking for a cached copy.  This is causing the
doubly-indirect block to be re-read each time it is accessed.
Repairing this reduces load time for a 70M file from 72 seconds
to 38 seconds.

Signed-off-by: Aaron Pace <Aaron.Pace@alcatel-lucent.com>
2010-08-07 22:44:08 +02:00
Marek Vasut
560639806d ARM: Define __raw_readX and __raw_writeX
These functions are undefined on ARM when using __io. These are the commonly
used versions and can be redefined.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-08-07 22:34:25 +02:00
Wolfgang Denk
3df4f46f32 Merge branch 'master' of /home/wd/git/u-boot/master 2010-08-07 22:33:06 +02:00
Matthew McClintock
c519facc64 Fix condition where bootm_size not set and wrong memory size reported
If the user sets bootm_low and does not set bootm_size, u-boot will
report the memory node in the flat device tree incorrectly. Instead
of reporting the remaining size of memory, it will report the total
available memory which is incorrect.

Specifically this fixes the situation when booting a relocatable
kernel and the memory is reported as an offset and size in the
device tree, and the size needs to be adjusted accordingly.

Signed-off-by: Matthew McClintock <msm@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-07 21:55:03 +02:00
Wolfgang Denk
b1f95b4438 Replace CHANGELOG files by auto-generated "snapshot.commit"
Idea and implementation courtesy of Kim Phillips <kim.phillips@freescale.com>

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-08-07 00:32:50 +02:00
Wolfgang Denk
82369c09d9 net 52xx: fix ethernet device names with spaces
Some commands (like 'mii') use this name to select devices, but they
break when those names contain spaces. So drop the space from
Ethernet driver names (cf. commit 1384f3bb).

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
2010-08-05 21:31:54 +02:00
Steve Sakoman
1b03eede4f ARMV7: Update default environment for OMAP4 boards
Specify vram on command line, remove erroneous call to nandboot
in the boot script, add CONFIG_BOOTDELAY

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Acked-by: Nishanth Menon <menon.nishanth@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-08-05 10:11:50 -04:00
Steve Sakoman
cbd7b09cb3 ARMV7: Enable musb driver and usbtty on OMAP4 Panda
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-08-05 10:11:44 -04:00
Steve Sakoman
325abab7c1 ARMV7: Enable musb driver and usbtty on OMAP4430 SDP
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-08-05 10:11:39 -04:00
Steve Sakoman
9b16757758 ARMV7: Restructure omap3 musb driver to allow code sharing between OMAP3 and OMAP4
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-08-05 10:11:34 -04:00
Steve Sakoman
516799f677 ARMV7: Add support for the TWL6030 I2C power chip used in OMAP4 systems
This patch add the basic infrastructure for the TWL6030 driver and enables
support in the two existing OMAP4 boards, Panda and OMAP4430 SDP

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-08-05 10:11:30 -04:00
Steve Sakoman
d708395d2f ARMV7: Modify i2c driver for more reliable operation on OMAP4
This patch modifies the init routine to follow the TRM
recommendations. It also modifies the i2c_read_byte function
to reflect subtle differences between the i2c controller in
OMAP3 and OMAP4.

Signed-off-by:  Steve Sakoman <steve@sakoman.com>
Acked-by: Nishanth Menon <menon.nishanth@gmail.com>
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-08-05 10:11:24 -04:00
Steve Sakoman
674e0b217f ARMV7: Fix udelay for OMAP4
The OMAP4 x-load code sets gptimer1 clock source to 32Khz.  This isn't
acceptable for udelay.  This patch changes from gptimer1 to gptimer2,
which uses sys_clk at 38.4 Mhz.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-08-05 10:11:20 -04:00
Steve Sakoman
2ad853c348 ARMV7: Add pad mux support for OMAP4
Add functional multiplexing support for OMAP4 pads.
Configure all the pads for the OMAP4430 SDP
and OMAP4 Panda boards

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-08-05 10:11:14 -04:00
Wolfgang Denk
cdb749778a Rename getenv_r() into getenv_f()
While running from flash, i. e. before relocation, we have only a
limited C runtime environment without writable data segment. In this
phase, some configurations (for example with environment in EEPROM)
must not use the normal getenv(), but a special function.  This
function had been called getenv_r(), with the idea that the "_r"
suffix would mean the same as in the _r_eentrant versions of some of
the C library functions (for example getdate vs. getdate_r, getgrent
vs. getgrent_r, etc.).

Unfortunately this was a misleading name, as in U-Boot the "_r"
generally means "running from RAM", i. e. _after_ relocation.

To avoid confusion, rename into getenv_f() [as "running from flash"]

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
2010-08-04 00:45:36 +02:00
Mike Frysinger
78e1e84677 bootm: fix pointer warning with lzma
Avoid warning:
cmd_bootm.c: In function 'bootm_load_os':
cmd_bootm.c:394: warning: passing argument 2 of
	'lzmaBuffToBuffDecompress' from incompatible pointer type

For 32 bit systems, this change shouldn't make a difference to code size
since sizeof(size_t) and sizeof(unsigned int) are equal.  But it does fix
the warning.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-08-04 00:43:53 +02:00
Wolfgang Denk
9efac4a1eb Merge branch 'master' of git://git.denx.de/u-boot-samsung 2010-08-04 00:35:10 +02:00
Wolfgang Denk
36448c6038 Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2010-08-04 00:30:50 +02:00
Wolfgang Denk
ac956293be Merge branch 'master' of /home/wd/git/u-boot/master 2010-08-03 22:45:13 +02:00
Minkyu Kang
87f314e98b s5p_goni: enable mmc0
Adds the board_mmc_init function and enable the mmc command

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2010-08-03 10:18:23 +09:00
Minkyu Kang
5000284872 S5P: support mmc driver
This patch adds support mmc driver for s5p SoC

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2010-08-03 10:18:15 +09:00
Kim Phillips
a37c36f4e7 powerpc/8xxx: query feature reporting register for num cores on unknown cpus
doing so helps avant garde users, such as those using simulators that
allow users to configure the number of cores, so as to not have to
manually adjust u-boot sources.  h/w should also be reliably setting
FRR NCPU in the future.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-01 11:18:45 -05:00
Kim Phillips
5be58f5fc8 powerpc/85xx: configure autocompletion support
because it's convenient.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-01 11:18:44 -05:00
Kumar Gala
d17123696c powerpc/p4080: Add support for the P4080DS board
Add support for the P4080DS board, with the following features:

* 36-bit only
* Boots from NOR flash
* FMAN drivers NOT supported
* SPD DDR initialization

Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Ashish Kalra <Ashish.Kalra@freescale.com>
Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Lan Chunhe-B25806 <b25806@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-08-01 11:18:40 -05:00
Mike Frysinger
c8cf4fc407 Blackfin: gpio: use common usage func
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-29 13:29:52 -04:00
york
394c46caf9 powerpc/p2020ds: Integrated with P2020DS DDR change and enabled hwconfig
Enabled SPD
Enabled DDR2
Enabled hwconfig

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:10 -05:00
york
5fb8a8a731 powerpc/8xxx: Improvement to DDR parameters
Changes for P2020DS DDR applies to other 8xxx platform

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:10 -05:00
york
9490ff4864 powerpc/8xxx: Enable DDR3 RDIMM support
Enabled registered DIMMs using data from SPD. RDIMMs have registers
which need to be configured before using. The register configuration
words are stored in SPD byte 60~116 (JEDEC standard No.21-C). Software
should read those RCWs and put into DDR controller before initialization.

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:10 -05:00
york
7fd101c97b powerpc/8xxx: Enabled address hashing for 85xx
For 85xx silicon which supports address hashing, it can be activated by
hwconfig.

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:09 -05:00
york
5800e7ab32 powerpc/8xxx: Enable quad-rank DIMMs.
Previous code presumes each DIMM has up to two rank (chip select). Newer
DDR controller supports up to four chip select on one DIMM.

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:09 -05:00
york
076bff8f47 powerpc/8xxx: Fix bug in memctrl interleaving & bank interleaving on cs0~cs4
Verified on MPC8641HPCN with four DDR2 dimms. Each dimm has dual
rank with 512MB each rank.

Also check dimm size and rank size for memory controller interleaving

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:09 -05:00
Kumar Gala
79e4e6480b powerpc/8xxx: Enabled hwconfig for memory interleaving
Replace environmental variables memctl_intlv_ctl and ba_intlv_ctl with
hwconfig parameters. The syntax is

    setenv hwconfig "fsl_ddr:ctlr_intlv=<mode>,bank_intlv=<mode>"

The mode values for memory controller interleaving are
    cacheline
    page
    bank
    superbank

The mode values for bank interleaving are
    cs0_cs1
    cs2_cs3
    cs0_cs1_and_cs2_cs3
    cs0_cs1_cs2_cs3

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:16:08 -05:00
Kumar Gala
fd3c9befa8 powerpc/p4080: Add workaround for erratum CPU22
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 13:07:57 -05:00
Kumar Gala
61054ffa16 powerpc/p4080: Add workaround for errata SERDES8
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 13:07:57 -05:00
Kumar Gala
34a8258fea powerpc/p4080: Add support for initializing SERDES
Add support for initializing the SERDES blocks on CoreNet style QoriQ
devices and the p4080 specific SERDES tables to know which actual
componetns are enabled.

Additionally, split out the Frame Manger (FMAN) into its specific ethernet
ports instead of gross level of the full FMAN.

Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 13:07:57 -05:00
Kumar Gala
db977abfc8 powerpc/85xx: Add support to initialize LIODN registers and portals
On the new QorIQ/CoreNet based platforms we need to initialize the
"portals" as access into the Data Path subystem as well as Logical IO
Device Numbers (LIODN) that are used for the IOMMU (PAMU).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 13:07:56 -05:00
Kumar Gala
b4b847e951 fdt: Add function to alloc phandle values
If we are creating reference (handles) to nodes in a device tree we need
to first create a new phandle in node and this needs a new phandle
value.  So we search through the whole dtb to find the max phandle value
and return the next greater value for a new phandle allocation.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
2010-07-26 13:07:56 -05:00
Kumar Gala
6aba33e939 powerpc/p4080: Add support for CPC(Corenet platform cache) on CoreNet platforms
The CoreNet style platforms can have a L3 cache that fronts the memory
controllers.  Enable that cache as well as add information into the
device tree about it.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 13:07:56 -05:00
york
d51cc7a0cd powerpc/p2020: Move INIT_RAM_ADDR physical address higher for 36-bit for P2020DS
If 36-bit is enabled, move INIT_RAM_ADDR physical address higher
to free lowest 4GB address space.

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:07:53 -05:00
york
a3f18529ec powerpc/85xx: Move INIT_RAM_ADDR physical address to 36-bit space
If 36-bit physical address is used, move the INIT_RAM_ADDR to higher
address. This frees the low 4GB address space for better use.

Signed-off-by: York Sun <yorksun@freescale.com>
2010-07-26 13:07:49 -05:00
Kumar Gala
ebd7cb0ba9 powerpc/fsl_fman: Add initial fman immap structures
Add basic structures for Frame Manager on P4080/P3041/P5020 devices

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 08:07:47 -05:00
Kumar Gala
9ab87d04a8 powerpc/85xx: Add additional p4080 platform related defines/structs
* Added PCIE4 address, offset, DEVDISR & LAW target ID
* Added new p4080 DDR registers and defines to immap
* Add missing corenet platform DEVDISR related defines
* Updated ccsr_gur to include LIODN registers
* Add RCWSR defines
* Added Basic qman, pme, bman immap structs
* Added SATA related offsets & addresses
* Added Frame Manager 1/2 offsets & addresses
* Renamed CONFIG_SYS_TSEC1_OFFSET to CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET
* Added various offsets and addresses that where missing

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-26 08:07:47 -05:00
Mike Frysinger
b990c7bda4 Blackfin: jtag-console: handle newline stuffing
Serial devices currently have to manually stuff \r after every \n found,
but this is a bit more difficult with the jtag console since we process
everything in chunks of 4 bit.  So we have to scan & stuff the whole
string rather than what most serial drivers do which is output on a byte
per byte basis.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-25 15:17:34 -04:00
Mike Frysinger
4fff5ac2f8 Blackfin: jtag-console: add debug markers
While we're in here, add some useful debug points.  We need custom debug
statements because we need the output to only go to the serial port.  If
we used the standard debug helpers, the output would also go to the stdout
(which would be the jtag console) and make it hard to figure out what is
going where exactly.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-25 15:17:31 -04:00
Mike Frysinger
5079d8bbad Blackfin: jtag-console: robustify against missing peer
If the other side isn't listening, we should reset the state to ignore
the whole message and not just the part we missed.  This makes it easier
to connect at any time to the jtag console without worrying about the two
sides getting out of sync and thus sending garbage back and forth.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-25 15:17:27 -04:00
Mike Frysinger
f5ff2030bf Blackfin: jtagconsole: disable output processing
Avoid extra carriage returns in the output by disabling output processing.
Otherwise, whenever the remote sends a \r\n, we end up with \r\r\n.

Reported-by: Vivi Li <vivi.li@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-25 15:17:23 -04:00
Mike Frysinger
beb60e777d Blackfin: bf533/bf561 boards: convert to new soft gpio i2c code
Use the new common gpio framework to simplify and unify the soft i2c
configuration settings.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Heiko Schocher <hs@denx.de>
2010-07-25 15:16:21 -04:00
Wolfgang Denk
7385c28e9b fs/fat: Big code cleanup.
- reformat
- throw out macros like FAT_DPRINT and FAT_DPRINT
- remove dead code

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-07-24 20:54:46 +02:00
Wolfgang Denk
226fa9bb9e usb_storage.c: change progress output in debug() message
The dots printed by common/usb_storage.c as progress meter corrupt the
output for example of "fatls usb" commands like this:

=> fatls usb 0
.			<<==== here
       29   file.001
       29   file.002
       29   file.003
       29   file.004
       29   file.005
       29   file.006
       29   file.007
       29   file.008
       29   file.009
       29   file.010
       29   file.011
       29   file.012
       29   file.013
       29   file.014
       29   file.015
       29   file.016
.			<<==== here
       29   file.017
       29   file.018
       29   file.019
...

Turn the progress output into a debug message.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
2010-07-24 20:53:50 +02:00
Wolfgang Denk
2aa98c6612 FAT32: fix broken root directory handling.
On FAT32, instead of fetching the cluster numbers from the FAT, the
code assumed (incorrectly) that the clusters for the root directory
were allocated contiguously. In the result, only the first cluster
could be accessed. At the typical cluster size of 8 sectors this
caused all accesses to files after the first 128 entries to fail -
"fatls" would terminate after 128 files (usually displaying a bogus
file name, occasionally even crashing the system), and "fatload"
would fail to find any files that were not in the first directory
cluster.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-07-24 20:53:50 +02:00
Wolfgang Denk
66c2d73cfc FAT32: fix support for superfloppy-format (PBR)
"Superfloppy" format (in U-Boot called PBR) did not work for FAT32 as
the file system type string is at a different location. Add support
for FAT32.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-07-24 20:53:43 +02:00
Wolfgang Denk
a17c548b53 usb_storage.c: initialize device type
The device type was left uninitialized which caused later tests
against DEV_TYPE_UNKNOWN to fail. In the result, "usb part" would
attempt to print information about non-existent devices like this:

	=> usb part
	print_part of 0

	Partition Map for USB device 0  --   Partition Type: DOS

	Partition     Start Sector     Num Sectors     Type
	    1                    0         2031616      f8

	print_part of 1
	## Unknown partition table

	print_part of 2
	## Unknown partition table

	print_part of 3
	## Unknown partition table

	print_part of 4
	## Unknown partition table
	=>

By initializing the type as DEV_TYPE_UNKNOWN we avoid all the
"Unknown partition table" messages.

[Note: the "print_part of ?" messages is left over debug code that
will be removed in another patch.]

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Remy Bohmer <linux@bohmer.net>
2010-07-24 20:45:39 +02:00
Wolfgang Denk
47e26b1bf9 cmd_usage(): simplify return code handling
Lots of code use this construct:

	cmd_usage(cmdtp);
	return 1;

Change cmd_usage() let it return 1 - then we can replace all these
ocurrances by

	return cmd_usage(cmdtp);

This fixes a few places with incorrect return code handling, too.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-07-24 20:43:57 +02:00
Wolfgang Denk
debb6299ac Merge branch 'master' of /home/wd/git/u-boot/custodians 2010-07-24 20:41:34 +02:00
Wolfgang Denk
4ae0c2dc99 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2010-07-24 20:41:28 +02:00
Wolfgang Denk
07c9cd8117 Merge branch 'master' of /home/wd/git/u-boot/custodians 2010-07-24 20:34:29 +02:00
Wolfgang Denk
9662317142 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2010-07-24 20:34:13 +02:00
Stefan Roese
1ffcb86ce0 ppc4xx: Enable "ecctest" command on t3corp
Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-23 09:55:18 +02:00
Stefan Roese
e372286025 ppc4xx: Enable "ecctest" command on katmai
Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-23 09:55:15 +02:00
Stefan Roese
be24ef6e8e ppc4xx: Add ECC status info to machine-check exception for IBM DDR2 core
Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-23 09:55:03 +02:00
Stefan Roese
58eb869ffc ppc4xx: Add "ecctest" command to test/simulate ECC errors
This patch adds the "ecctest" command to test and simulate ECC errors
(single bit and/or double bit) while running from SDRAM. Currently only
the IBM DDR2 controller is supported (405EX, 440SP(e), 460EX/GT).

This is done by copying and calling functions, modifying the SDRAM
controller operation mode, in internal SRAM/OCM.

For correctable ECC errors (single bit) only the status will be printed
since the DDR2 controller doesn't provide the faulting address:

=> ecctest 1000000 1
Using address 01000000 for 1 bit ECC error injection
ECC: Correctable error

Uncorrectable ECC errors (double bit) will also display the faulting
address:

=> ecctest 1000000 2
Using address 01000000 for 2 bit ECC error injection
ECC: Uncorrectable error at 0x0001000000

To enable this "ecctest" function you need to define CONFIG_CMD_ECCTEST
in the board config header.

Tested on katmai and t3corp.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-23 09:54:54 +02:00
Stefan Roese
b995d7cb2c ppc4xx: DDR/ECC: Use correct macros to clear error status
Use the correct macro instead of the hardcoded 0x4c to clear the ECC
status in the 440/460 DDR(2) error status register after ECC
initialization.

Also the non-440 parts (405EX(r) right now) and the IBM DDR PPC variants
(440GX) use a different registers to clear this error status. Use the
correct ones.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-23 09:54:28 +02:00
Stefan Roese
897d6abc50 ppc4xx: Only define DDR2 registers for the correct PowerPC variants
Make sure that some SDRAM/DDR2 registers are only defined for the PPC
variants really implementing those registers.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-23 09:54:22 +02:00
Stefan Roese
eab9800182 ppc4xx: Add CONFIG_DDR_RFDC_FIXED to allow board specific RFDC values
Using this define, a board can define an opimized RFDC value and use
the auto calibration code to "tune" the remaining DDR2 controller
calibration register.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-23 09:54:09 +02:00
Stefan Roese
5bf39a96c2 ppc4xx: T3CORP fixes and updates
This patch fixes some problems for the T3CORP board. Here the list
of the changes:

- Add 600-67 and 677 CPU frequency setting to chip_config
  command
- Define CONFIG_DDR_RFDC_FIXED on t3corp:
  While using the "normal" auto calibration code, sometimes values for
  RFDC were picked (>= T3) that resulted in a non-working U-Boot (hang
  upon relocation, while running from SDRAM). With this optimized RFDC
  value we can force this register and use the auto-calibration code to
  setup the remaining calibration registers.
- Increase sizes of FPGA chips selects
- EBC timing updated OEN=3 for 66 MHz EBC speed
- Change ext. IRQ2 setup to level-low active
- Enable CONFIG_SYS_CFI_FLASH_STATUS_POLL

By defining CONFIG_SYS_CFI_FLASH_STATUS_POLL, DQ7 is polled to detect the
chip busy status. This is now used instead of the data toggle method which
is used historically by default in the common CFI driver. With this change
a problem with not written data is solved on this board, where a 32 byte
block of data is still erased instead of filled with the correct content
after these commands:

=> erase 0xfc100000 +0x1000000

....................................................................
done
Erased 128 sectors
=> cp.b 0x100000 0xfc100000 0x1000000
Copy to Flash... done
=> cmp.b 0x100000 0xfc100000 0x1000000
byte at 0x00d0d6c0 (0x00) != byte at 0xfcd0d6c0 (0xff)
Total of 12637888 bytes were the same

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-23 09:53:48 +02:00
Rupjyoti Sarmah
17a6844497 ppc4xx/Canyonlands added USB board callbacks
Functions added to support board callbacks for USB init. This
isolates USB manipulations such that it is only touched if USB is
used by U-Boot.

Signed-off-by: Dave Mitchell <dmitchell@appliedmicro.com>
Signed-off-by: Rupjyoti Sarmah <rsarmah@appliedmicro.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-23 09:53:20 +02:00
Mike Frysinger
793b5726f7 i2c: soft_i2c: add simple GPIO implementation
Since the vast majority of GPIO I2C implementations behave the same way,
support the common GPIO framework with default settings.

This adds two new defines CONFIG_SOFT_I2C_GPIO_{SCL,SDA} so that boards
which want GPIO I2C support need only define these.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
2010-07-22 08:03:47 +02:00
Wolfgang Denk
8024ac7a61 Merge branch 'master' of /home/wd/git/u-boot/master/ 2010-07-21 22:23:26 +02:00
Kumar Gala
47ec10c597 powerpc/85xx: Rework P1022 SERDES is_serdes_configured support
Move serdes init until after we are in ram so we can keep track of a
global static protocal map for the particular serdes config we are in.
This makes is_serdes_configured() much simplier and not constantly
reading registers to determine if a given device is enabled based on the
protocol.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-21 00:40:20 -05:00
Kumar Gala
af0250652a powerpc/85xx: Rework MPC8536 SERDES is_serdes_configured support
Move serdes init until after we are in ram so we can keep track of a
global static protocal map for the particular serdes config we are in.
This makes is_serdes_configured() much simplier and not constantly
reading registers to determine if a given device is enabled based on the
protocol.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-21 00:40:16 -05:00
Kumar Gala
c26de2d8b1 powerpc/p3041: Add various p3041 related defines
There are various locations that we have chip specific info:

* Makefile for which ddr code to build
* Added p3041 to cpu_type_list and SVR list
* Added number of LAWs for p3041
* Set CONFIG_MAX_CPUS to 4 for p3041

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:41:19 -05:00
Kumar Gala
19dbcc96c0 powerpc/p5020: Add various p5020 related defines (and p5010)
There are various locations that we have chip specific info:

* Makefile for which ddr code to build
* Added p5020 & p5010 to cpu_type_list and SVR list
* Added number of LAWs for p5020
* Set CONFIG_MAX_CPUS to 2 for p5020

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:41:19 -05:00
Emil Medve
7eda1f8eed powerpc/mpc85xx: Report FMAN # to match user manual
The user manual refers to FMAN1 and FMAN2 not 0 and 1.

Signed-off-by: Emil Medve <Emilian.Medve@Freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:41:18 -05:00
Kumar Gala
85f8cda3c2 powerpc/p4080: Add setting of clock-frequency for clockgen node
On QorIQ CoreNet based devices we have a global clocking block.  We want
to keep track of SYSCLK frequency as it is what is used to derive all
other frequencies in the SoC

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:41:18 -05:00
Kumar Gala
1b942f7483 powerpc/85xx: Use fdt_node_offset_by_compat_reg for clock-frequency updates
Move to using fdt_node_offset_by_compat_reg to find the node offsets we
want to update instead of using aliases.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:40:06 -05:00
Kumar Gala
6525d51fa5 powerpc/85xx & 86xx: Rework ft_fsl_pci_setup to not require aliases
Previously we used an alias the pci node to determine which node to
fixup or delete.  Now we use the new fdt_node_offset_by_compat_reg to
find the node to update.

Additionally, we replace the code in each board with a single macro call
that makes assumes uniform naming and reduces duplication in this area.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:40:06 -05:00
Kumar Gala
75e73afd57 fdt: Add fdt_node_offset_by_compat_reg helper
Given a compatible string and physical address try and find a node that
matches.  This is useful when we want to find a specific device node to
update (for example if we have multiple PCI nodes we can use the
physical address to distinguish them when trying to update the device
tree).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
2010-07-20 04:40:06 -05:00
Kumar Gala
a0342c0804 fdt: Add fdt_translate_address to convert reg node to cpu phys addr
This code is extracted out of the Linux Kernel code from
arch/powerpc/kernel/prom_parse.c.

We maintain some of the same structure to support multiple bus types even
though we only have one in the current code.  In the future we might want
to translate across a PCI bus and thus it will be easier to add that
functionality back in.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Gerald Van Baren <vanbaren@cideas.com>
2010-07-20 04:40:00 -05:00
Kumar Gala
46f3e3851d powerpc/86xx: Rename PCI1/2 to PCIE1/2 on MPC8641HPCN & SBC8641
The MPC8641 boards actually only have PCIE not PCI.  Rename so we are
uniform with regards to names so we can replace this code with templated
code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:37:11 -05:00
Kumar Gala
dd2cda3dbd powerpc/86xx: Move PCI/PCIe address defines into common immap_86xx.h
Remove dupliacted setting of PCI/PCIe address and offsets in board
config.h.  Renamed CONFIG_SYS_PCI1/2_ADDR to CONFIG_SYS_PCI1/2ADDR on
MPC8641 boards since its really PCIE controllers and not PCI.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:37:11 -05:00
Kumar Gala
99d9c07edc powerpc/85xx: Move PCI/PCIe address defines into common immap_85xx.h
Remove dupliacted setting of PCI/PCIe address and offsets in board
config.h.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-20 04:37:11 -05:00
Wolfgang Denk
293e3938d0 Merge branch 'master' of git://git.denx.de/u-boot-video 2010-07-17 21:36:00 +02:00
Wolfgang Denk
1f82ff4777 Merge branch 'master' of git://git.denx.de/u-boot-video 2010-07-17 20:49:59 +02:00
Wolfgang Denk
0fe247b973 Drop support for GTH board
The board maintainer states:

    The GTH board is obsolete and has not been manufactured for
    several years.
    To my knowledge, no recent U-Boot build has been tested on that
    card.

So drop support for this board.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Thomas Lange <thomas@corelatus.se>
Acked-by: Thomas Lange<thomas@corelatus.se>
2010-07-17 20:47:08 +02:00
Anatolij Gustschin
7c050f818b video: cleanup comments in cfb_console.c and video_fb.h
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-07-17 00:05:14 +02:00
Wolfgang Denk
e9aecdec15 Merge branch 'master' of git://git.denx.de/u-boot-ti 2010-07-16 23:24:38 +02:00
Wolfgang Denk
b6c208ab1e Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx 2010-07-16 23:15:01 +02:00
Kumar Gala
9f43d7997e powerpc/85xx: Move p1022ds slot code into board file
The code to map SERDES configs to slot names is board specific and not
chip specific.  Thus it should live in board/freescale/p1022ds/ and not
in arch/powerpc/cpu/.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:10 -05:00
Kumar Gala
c7e1a43de6 ppc/85xx: Convert MPC8536DS to using board common ICS307 code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:10 -05:00
Kumar Gala
509c4c4ce2 ppc/85xx: Convert MPC8572DS to using board common ICS307 code
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:10 -05:00
Kumar Gala
79ee344802 powerpc/85xx: Add command to report errata workarounds
Add 'errata' command to report what errata we workaround.  Report
workaround for erratum SATA-A001 on P1022/P1013.

Also sorted the CONFIG_CMD_* list.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:10 -05:00
Timur Tabi
c59e1b4d07 powerpc: add support for the Freescale P1022DS reference board
Specifics:

1) 36-bit only
2) Booting from NOR flash only
3) Environment stored in NOR flash only
4) No SPI support
5) No DIU support

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:10 -05:00
Poonam Aggrwal
ddac6f08db 85xx/p1_p2_rdb: PCIe E1000 card support added.
Enables the Intel Pro/1000 PT Gb Ethernet PCI-E Network Adapter
configuration support for P1/P2 RDB.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:10 -05:00
Timur Tabi
752bc33530 fsl: add LAW target to fsl_pci_info structure
Add the LAW target (enum law_trgt_if) to the fsl_pci_info structure, so that
we can capture the LAW target for a given PCI or PCIE controller.  Also update
the SET_STD_PCI_INFO and SET_STD_PCIE_INFO macros to assign the
LAW_TRGT_IF_PCI[E]_x macro to the LAW target field of the structure.

This will allow future PCI[E] code to configure the LAW target automatically,
rather than requiring each board to it for each PCI controller separately.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:10 -05:00
Kumar Gala
ae3913922a powerpc/85xx: Add support for link stack & STAC on e5500
The e5500 has a link register stack and segment target address cache.
Its safe to enable these bits on older e500 cores as the bits are
implemented in the register.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:09 -05:00
Kumar Gala
2a3a96ca5e powerpc/85xx: Add recognition of e5500 core
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:09 -05:00
Becky Bruce
f2d9a5da29 powerpc 83xx/85xx: Merge lbc upmconfig code
Each platform had its own version of the upmconfig, despite the
init process being identical.  Now that we have a spot for common
lbc code, create a common upmconfig() there.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:09 -05:00
Becky Bruce
199e262eb3 mpc85xx: Add reginfo command
The new command dumps the TLBCAM, the LAWs, and the BR/OR regs.
Add CONFIG_CMD_REGINFO to the config for all MPC85xx parts.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:09 -05:00
Becky Bruce
11a3de4697 fsl_law.c: Add print_laws() for FSL_CORENET platforms.
Add printing of LAWBARH/LAWBARL for FSL_CORENET platforms.

Signed-off-by: Becky Bruce <Beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:09 -05:00
Becky Bruce
e71755f887 drivers/misc/fsl_law.c: Rearrange code to avoid duplication
The current code redefines functions based on FSL_CORENET_ vs not -
create macros/inlines instead that hide the differences.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:09 -05:00
Becky Bruce
70e02bca6b mpc85xx: Add print_tlbcam() function
This dumps out the contents of TLB1 on 85xx-based systems.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:09 -05:00
Becky Bruce
4e63df300f mpc85xx: tlb.c cleanups
Extract the operation to read a tlb into a function - we will need
this later to print out the tlbs, and there's no point in duplicating
the code.  Create a TSIZE_TO_BYTES macro to deal with the conversion
from the MAS field to an actual size instead of duplicating this in code.
There are a few misc other minor cleanups.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:09 -05:00
Becky Bruce
f51cdaf191 83xx/85xx/86xx: LBC register cleanup
Currently, 83xx, 86xx, and 85xx have a lot of duplicated code
dedicated to defining and manipulating the LBC registers.  Merge
this into a single spot.

To do this, we have to decide on a common name for the data structure
that holds the lbc registers - it will now be known as fsl_lbc_t, and we
adopt a common name for the immap layouts that include the lbc - this was
previously known as either im_lbc or lbus; use the former.

In addition, create accessors for the BR/OR regs that use in/out_be32
and use those instead of the mismash of access methods currently in play.

I have done a successful ppc build all and tested a board or two from
each processor family.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:09 -05:00
Becky Bruce
0914f48328 powerpc: Update configs to properly set FSL_ELBC
Some parts that have an Enhanced Local Bus Controller weren't
setting CONFIG_FSL_ELBC.  Fix this so we can use this define
properly going forward (currently it's only used if PHYS_64BIT is
set, which meant not all platforms needed to have it set correctly).

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:08 -05:00
Poonam Aggrwal
525f6c3add 85xx/p1_p2_rdb: enable hwconfig
Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:08 -05:00
Kumar Gala
ebf9d5261e Move ICS CLK chip frequency calculation code into a common board library
We have several boards that use the same ICS307 CLK chip to drive the
System clock and DDR clock.  Move the code into a common location so we
share it.

Convert the P2020DS board as the first to use the new common ICS307
code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Timur Tabi <timur@freescale.com>
2010-07-16 10:55:08 -05:00
Kumar Gala
b4a60e521c ppc/85xx: Add a structure defn for PIXIS registers
The various boards that have PIXIS FPGAs have slightly different
register definitions, however there is some common functionality (like
reset, ICS307 clk control, etc) that can be shared.

The struct definition exists for MPC8536DS, MPC8544DS, MPC8572DS,
MPC8610HPCD, and MPC8641HPCN boards.

Also fixed ngpixis to be __packed__ instead of aligned.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:08 -05:00
Kumar Gala
8f3a7fa4a2 powerpc/8xxx: Add is_core_disabled to remove disabled cores from dtb
If we explicitly disabled a core remove it from the dtb we pass on to
the kernel.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:08 -05:00
Kumar Gala
11beefa382 mpc8xxx: Remove cpu-handles for cpus we delete
We may have cpu-handles pointing to the cpu nodes we delete.  If so we
should delete the handles as well.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:08 -05:00
Kim Phillips
22f292c7b2 powerpc/8xxx: Add base support for the SEC4
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:07 -05:00
Kim Phillips
929a213830 powerpc/8xxx: Distinguish between incompatible SEC h/w types
CONFIG_SYS_FSL_SEC_COMPAT is set to 2 for the SEC 2.x and SEC 3.x.
Parts with newer SEC h/w versions will increment the number to
accomodate incompatible code changes.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:07 -05:00
Kim Phillips
5d0c3b57b2 fdt: move fsl specific code from common fdt area to mpc8xxx/fdt.c
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2010-07-16 10:55:07 -05:00
Wolfgang Denk
16909f34b7 Merge branch 'master' of git://git.denx.de/u-boot-pxa 2010-07-15 22:49:12 +02:00
Wolfgang Denk
93502a5e0a Merge branch 'master' of ../master 2010-07-15 22:48:46 +02:00
Steve Sakoman
27952014c4 ARMV7: Add basic gpmc initialization for OMAP4
This patch adds a gpmc_init function for OMAP4 and adds calls to
gpmc_init for existing OMAP4 boards: panda and sdp4430

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-07-15 16:19:16 -04:00
Ajay Kumar Gupta
900c0c6b0a musb: fix compilation warning
Fixes below compilation warning
omap3.c: In function 'musb_platform_init':
omap3.c:123: warning: implicit declaration of function
			'omap3_evm_need_extvbus'

Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Acked-by: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-07-15 16:11:01 -04:00
Prakash PM
37adbf9b12 da850 evm: Fix definition of 'pinmux' macro
Usage of parenthesis in pinmux macro definition changes the
definition of the macro and raises the precedence of '&'
operator inadvertently over '[]'.

Signed-off-by: Prakash PM <prakash.pm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-07-15 16:08:38 -04:00
Prakash PM
b9f34ce94f da830 evm: Fix checkpatch error on 'pinmux' macro
Existing code returns checkpatch error on pinmux macro definition for
not enclosing the definition in parenthesis. The error can be observed in
the patch generated from commit id bdc9c6c7f7.
So macro implementation is modified to fix the error.

Signed-off-by: Prakash PM <prakash.pm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-07-15 16:08:35 -04:00
Marek Vasut
bc3a4a53a7 PXA: ZipitZ2 support
This patch adds support for Aeronix Zipit Z2 handheld.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-07-14 23:27:49 +02:00
Marek Vasut
2e49984bd1 PXA: Toradex Colibri PXA270 support
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-07-14 23:27:48 +02:00
Marek Vasut
18a00dfd76 PXA: Voipac PXA270 Support
This patch adds support for the Voipac PXA270 board. The support includes:
- Ethernet
- USB
- MMC
- NOR Booting
- OneNAND Booting
- LCD
- HDD

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Acked-by: Scott Wood <scottwood@freescale.com>
2010-07-14 23:27:20 +02:00
Marek Vasut
546cd608dd PXA: Add support for LMS285GF05 into pxafb
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-07-14 23:25:22 +02:00
Marek Vasut
9b92cf045a Voipac PXA270 LCD Support
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-07-14 23:25:22 +02:00
Marek Vasut
5ab877b688 PXA: Add OneNAND booting support to start.S
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-07-14 22:41:39 +02:00
Marek Vasut
8c77f232f0 PXA: Add PWM2 and PWM3 regs to pxa-regs.h
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-07-14 22:41:39 +02:00
Marek Vasut
fea0ffe418 PXA: Add hardware init helper macros
This patch adds macros for the following purposes:
- GPIO configuration
- SDRAM configuration
- Wakeup
- Clock configuration
- Interrupt controller configuration
These macros are intended to replace numerous copies of the same code.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-07-14 22:41:39 +02:00
Marek Vasut
8c35d0c570 Enable PXAFB for PXA27X and PXA3XX 2010-07-14 22:41:39 +02:00
Wolfgang Denk
d6f324d03d Merge branch 'next' of git://git.denx.de/u-boot-nios 2010-07-14 22:07:41 +02:00
Wolfgang Denk
e1e3cf7c79 Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx 2010-07-14 22:05:31 +02:00
Wolfgang Denk
50298d37e6 Merge branch 'master' of git://git.denx.de/u-boot-net 2010-07-14 22:04:30 +02:00
Wolfgang Denk
cb8f031729 Merge branch 'master' of git://git.denx.de/u-boot-blackfin 2010-07-14 21:54:45 +02:00
Mike Frysinger
d013d1a2ec Blackfin: bf561-acvilon: drop unused env redund define
The SPI env code didn't support redundant environments until recently, but
this code was written before that.  Since it has never been tested (and
currently causes a build failure), simply punt it.  If the functionality
is actually desired, it can be re-added once it has been tested.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:52 -04:00
Mike Frysinger
8b33abde0a Blackfin: drop old u-boot.lds clean target
The u-boot.lds CPP unification missed the Blackfin-specific clean target.
It is no longer needed, so punt it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:52 -04:00
Michael Hennerich
37aac2d30c Blackfin: bf527-ad7160-eval: new board support
Support the new AD7160 eval board.

Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:52 -04:00
Mike Frysinger
8278b870fc Blackfin: enable IP defrag for ADI boards
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:52 -04:00
Mike Frysinger
94060a158f Blackfin: bfin_mac: remove space from name
Some commands (like 'mii') use this name to select devices, but they break
when those names contain spaces.  So drop the space from the Blackfin EMAC
driver.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:52 -04:00
Mike Frysinger
787e343b91 Blackfin: unify default I2C settings for ADI boards
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Heiko Schocher <hs@denx.de>
2010-07-13 17:50:52 -04:00
Mike Frysinger
bbf4fbb6cc Blackfin: bf561: use DMA for Core B L1 regions
The L1 regions of Core B are not directly accessible from Core A, so we
need to use DMA to get at them.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:52 -04:00
Mike Frysinger
b14fff8dce Blackfin: cm-bf548: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:52 -04:00
Mike Frysinger
22e6440586 Blackfin: bf527-ezkit: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:51 -04:00
Mike Frysinger
d1f49b4364 Blackfin: bf548-ezkit: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:51 -04:00
Mike Frysinger
032c44e0a5 Blackfin: bf518f-ezbrd: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:51 -04:00
Mike Frysinger
0c929426f8 Blackfin: bf518f-ezbrd: handle different PHYs dynamically
The original BF518F-EZBRD's have a Micrel KSZ8893 DSA on them, but newer
ones only have a National PHY (which lack a RX Error interrupt line).  So
in the board eth init code, dynamically detect what is hooked up to the MAC
and handle each accordingly.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:50 -04:00
Mike Frysinger
9280c3f106 Blackfin: bf533-stamp: scrub unused code
Much of the local bf533-stamp.h header is unused, and the few bits that
are are only needed in one file.  So move the few used bits out and punt
all the rest.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:50 -04:00
Mike Frysinger
7d44f5ec9e Blackfin: blackstamp: convert eth/flash swap logic to gpio framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:50 -04:00
Mike Frysinger
6cfcf5840b Blackfin: bf533-stamp: convert eth/flash swap logic to gpio framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:50 -04:00
Mike Frysinger
37a4b75d4c Blackfin: bfin_spi: support gpios as chip selects
Rather than only support the pins dedicated as chip selects, utilize the
gpio framework to support any gpio pin.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:50 -04:00
Mike Frysinger
f3732edf46 Blackfin: bfin_spi: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:50 -04:00
Mike Frysinger
a409fdd8fe Blackfin: serial: convert to portmux framework
Use the new portmux framework to handle the details when possible.
Unfortunately, we cannot yet use this in the standalone initialization
logic, so we need to keep around the old portmux writes for now.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:50 -04:00
Mike Frysinger
c5dc48295b Blackfin: pata_bfin: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:49 -04:00
Mike Frysinger
a87589fcf9 Blackfin: bfin_sdh: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-13 17:50:49 -04:00
Mike Frysinger
253f47f3a7 Blackfin: bfin_nand: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Scott Wood <scottwood@freescale.com>
2010-07-13 17:50:49 -04:00
Mike Frysinger
8339ad7373 Blackfin: bfin_mac: convert to portmux framework
Rather than bang MMRs directly, use the new portmux framework to handle
the details.  While we're doing this, let boards declare the exact list
of pins they need in case there is one or two they don't actually have
hooked up.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-13 17:50:40 -04:00
Albert Aribaud
ab9164d0de edminiv2: add ethernet support
Add edminiv2 board support for mv_egiga.
Add edminiv2 config to enable mv_egiga.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 23:40:31 -07:00
Albert Aribaud
d3c9ffd07d mvgbe: add support for orion5x GbE controller
Add definitions and initialization in orion5x for mvgbe.
Add orion5x in mvgbe SoC includes.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 23:40:31 -07:00
Albert Aribaud
d44265ad78 mvgbe: support SoCs other than kirkwood
Rename all references to kirkwood in mvgbe symbols
throughout the whole codebase.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 23:40:31 -07:00
Albert Aribaud
9b6bcdcb93 net: rename: kirkwood_egiga as mvgbe
Rename kirkwood_egiga.* to mvgbe.* and adjust makefile
and #include accordingly.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 23:40:30 -07:00
Albert Aribaud
c67e2ccd50 kirkwood_egiga: CONFIG_SKIP_LOCAL_MAC_RANDOMIZATION
This configuration option allows SoCs without random
generation capability to fill in local MACs with a  fixed
rather than random value

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 23:38:25 -07:00
Scott Wood
53504a2789 NAND: formatting cleanups from env.oob support
Change if (ok) {
	bunch of stuff
} else {
	error
}

to

if (error) {
	get out
}

proceed with bunch of stuff

Plus a few whitespace cleanups.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2010-07-12 18:17:40 -05:00
Ben Gardiner
c9f7351b5b NAND: environment offset in OOB (CONFIG_ENV_OFFSET_OOB)
This is a re-submission of the patch by Harald Welte
<laforge@openmoko.org> with minor modifications for rebase and changes
as suggested by Scott Wood <scottwood@freescale.com> [1] [2].

This patch enables the environment partition to have a run-time dynamic
location (offset) in the NAND flash.  The reason for this is simply that
all NAND flashes have factory-default bad blocks, and a fixed compile
time offset would mean that sometimes the environment partition would
live inside factory bad blocks. Since the number of factory default
blocks can be quite high (easily 1.3MBytes in current standard
components), it is not economic to keep that many spare blocks inside
the environment partition.

With this patch and CONFIG_ENV_OFFSET_OOB enabled, the location of the
environment partition is stored in the out-of-band (OOB) data of the
first block in flash. Since the first block is where most systems boot
from, the vendors guarantee that the first block is not a factory
default block.

This patch introduces the 'nand env.oob' command, which can be called
from the u-boot command line. 'nand env.oob get' reads the address of
the environment partition from the OOB data, 'nand env.oob set
{offset,partition-name}' allows the setting of the marker by specifying
a numeric offset or a partition name.

[1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/43916
[2] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/79195

Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Acked-by: Harald Welte <laforge@gnumonks.org>
2010-07-12 13:56:46 -05:00
Thomas Chou
a3c09f66b2 nios2: remove EP1C20, EP1S10, EP1S40 boards
The example configuration files of nios2-generic board can generated
binary to run on the EP1C20, EP1S10, and EP1S40 boards. So the three
boards can be removed.

With nios2-generic approach, the fpga parameter header file can
be generated from hardware designs using tools. Porting u-boot for
nios2 boards is simplified. Vendors can supply their fpga parameter
file or patches to add a new nios2-generic board instance. There is
no need to include other boards support for nios2 in the u-boot
mainline.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2010-07-12 11:40:12 -04:00
Thomas Chou
551265f0df nios2: add spi flash support to nios2-generic board
This patch enables the altera_spi and spi_flash drivers for the
nios2-generic board. It allows access to the EPCS/SPI flash on
the Altera EP1C20 board.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Tested-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2010-07-12 11:35:30 -04:00
Thomas Chou
ec3b498192 gpio_led: add gpio_request to __led_init
This patch adds the gpio usage request. The polarity is changed to
positive as suggested by Mike Frysinger.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2010-07-12 11:30:52 -04:00
Thomas Chou
6db6c18b50 nios2: add gpio_request
This will be used by nand_plat.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2010-07-12 11:30:51 -04:00
Thomas Chou
06c5d30dc3 nios2: add fdt support
This patch adds fdt support to boot linux, followed Michal's
work on microblaze.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2010-07-12 11:30:51 -04:00
Thomas Chou
cb2da50f0f nios2: use gc sections to reduce image size
Follow the discussion of Charles Manning and Mike Frysinger.
Using gc_sections helps reduce image size.

Configuring for nios2-generic board...
Before,
   text    data     bss     dec     hex filename
 123979    3724   22892  150595   24c43 /tmp/u-boot/u-boot
After,
   text    data     bss     dec     hex filename
 115983    3800   22732  142515   22cb3 /tmp/u-boot/u-boot

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Signed-off-by: Scott McNutt <smcnutt@psyent.com>
2010-07-12 11:30:51 -04:00
Eric Bénard
836cd45358 cpuat91: unbreak ethernet
* the following problems are met :
config was set to use the new driver as a default but
- RMII was not enabled for the new driver
- the new driver didn't compile with RMII enabled
- the new driver initialize a PHY at address O when the PHY of
this board is at 1 thus we get "AT91 EMAC RMII: No PHY present"

* to fix these problems, this patch :
- enable RMII for the new driver
- fix the wrong define used in the at91_emac.c
- allow the config file to set a default phy address (and use
0 as a default as in the actual at91_emac.c driver)

Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:14:29 -07:00
Eric Bénard
409943a989 at91_emac: Write MAC address automatically
tested on cpuat91.

Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:14:29 -07:00
Mike Frysinger
cafb14fecb AX88180: use standard I/O accessors
The current dm9000x driver accesses its memory mapped registers directly
instead of using the standard I/O accessors.  This can cause problems on
Blackfin systems as the accesses can get out of order.  So convert the
direct volatile dereferences to use the normal in/out macros.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Hoan Hoang <hnhoan@i-syst.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:14:29 -07:00
Hoan Hoang
14f637f8f7 AX88180: make OUTW handle 32bit/16bit defines too
The current OUTW function is always defined as a 16bit function, but this
doesn't work correctly when using the 32bit access mode.  So define it as
a 32bit function when in 32bit mode so things work correctly on Blackfin
32bit LE systems.

Signed-off-by: Hoan Hoang <hnhoan@i-syst.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:14:29 -07:00
Hoan Hoang
256670680b AX88180: add support for the Marvell 88E1118 phy
Some places in the current code equate the Marvell 88E1111 PHY as the family
when in reality it's a subpart of the Alaska family.  So once we generalize
that, add support for the 88E1118 PHY.

Signed-off-by: Hoan Hoang <hnhoan@i-syst.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:14:29 -07:00
Ben Warren
6bb4679017 Write MAC address automatically on MACB-based boards
Also, remove all calls to eth_init() in boards that use MACB

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:14:29 -07:00
Juergen Kilb
aa9fba5313 smc91xx_eeprom: Correct chip detection check.
The smc911x_detect function in /net/driver/net/smc911x.c
returns a 0 if everything was ok (a chip was found) and -1 else.
In the standalone example 'smc911x_eeprom' the return value
of smc911x_detect is interpreted in a different way
(0 for error, !0 as OK).
This leads to the error that the chip will not be detected.

Signed-off-by: Juergen Kilb <j.kilb@phytec.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>

Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:14:29 -07:00
Timur Tabi
daa2ce6292 tsec: fix the return value for tsec_eth_init()
The Ethernet initialization functions are supposed to return the number of
devices initialized, so fix tsec_eth_init() so that they returns the number of
TSECs initialized, instead of just zero.  This is safe because the return value
is currently ignored by all callers, but now they don't have to ignore it.

In general, if an function initializes only one device, then it should return
a negative number if there's an error.  If it initializes more than one device,
then it should never return a negative number.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:14:28 -07:00
Mike Frysinger
ec0d879f08 uli526x: drop newlines from device name
Device names should not contain non-printable characters like newlines.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:14:28 -07:00
Mike Frysinger
1384f3bb8a net: warn about spaces in device names
Some commands operate on eth device names (like 'mii'), but those cannot
be passed on the command line as one argument.  So detect devices like
these and warn about them so someone will fix it.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:14:28 -07:00
Mike Frysinger
f9abdfe0f2 AX88180: switch to common mii.h header
No compiled code change here, just drop the local PHY defines in favor of
the common standard ones.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:14:28 -07:00
Mike Frysinger
141ab7a52c AX88180: improve phy searching
Rather than hardcode specific phy addresses, search the possible phy
address space to find the first available phy.  Also respect the normal
CONFIG_PHY_ADDR option for board porters to pick a specific address.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:14:28 -07:00
Hoan Hoang
bb7336a414 AX88180: fix media typos
Signed-off-by: Hoan Hoang <hnhoan@i-syst.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:14:28 -07:00
Mike Frysinger
36de211060 AX88180: add missing init prototype
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:14:28 -07:00
Albert Aribaud
49fa6ed8c9 kirkwood_egiga: updates: fix DRAM mapping and typo
DRAM window mapping uses kirkwood-provided functions instead
of global gd as do other drivers--fix this.

Also, fix a typo in a comment

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:11:27 -07:00
Vipin KUMAR
5b1b1883ff SPEAr : Network driver support added
Designware network driver support added.
This is a Synopsys ethernet controller

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:08:05 -07:00
Albert Aribaud
c19a20d5bd kirkwood_egiga: bugfix: add DMA sequence points
Insert isb() sequence points to ensure DMA descriptors
are filled in and set up before actual DMA occurs.

Signed-off-by: Albert Aribaud <albert.aribaud@free.fr>
Acked-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:02:12 -07:00
Stefan Roese
ca08054e80 net: Add option to disable fiber on M88E1111 PHY for PPC4xx
By defining CONFIG_M88E1111_DISABLE_FIBER boards can configure the
M88E1111 PYH to disable fiber. This is needed for an upcoming PPC460GT
based board, which has fiber/copper auto-selection enabled by default.
This doesn't seem to work. So we disable fiber in the PHY register.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:02:11 -07:00
Mike Frysinger
67bee2fb64 net: dm9000x: re-add casts to I/O pointers to fix gcc warnings
The DM9000 in/out helper functions were casting the register address when
it was accessing things directly (pre commit a45dde2293).  But
when it was changed to using the in/out helpers, those casts were dropped
because those functions don't take pointers.  Even more recently, those
functions were then changed to use the read/write helpers, but the casts
were not re-added.  This is necessary because the read/write helpers do
take pointers.  Otherwise we get a lot of warnings like:
dm9000x.c: In function 'dm9000_inblk_8bit':
dm9000x.c:172: warning: passing argument 1 of 'readb'
	makes pointer from integer without a cast

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Thomas Weber <weber@corscience.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:02:11 -07:00
Heiko Schocher
26918b7994 tsec: add micrel ksz804 phy
Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
2010-07-12 00:02:11 -07:00
Heiko Schocher
4e43b2e861 83xx: add support for ve8313 board
This patch add support for the ve8313 board based on
Freescale MPC8313 CPU.

- serial console on UART 1
- 128 MB DDR RAM
- 32 MB NOR Flash
- 16 MB NAND Flash
- Ethernet MII Mode over on TSEC0
- micrel ksz804 phy
- Hardware WDT MAX824

changes since v1
- Environment size = sector size
- use red. environment
- add comments from Kim Phillips
  - add MAKEALL, MAINTAINERS entry
  - Codingstyle issues fixed
  - inserted original Copyrights
  - PCI subsys vendor ID changed from 0x1057 (Motorola)
    to 0x1957 (Freescale)

changes since v2
- add comments from Wolfgang Denk
  - fix Codingstyle and some comments
  - reworked WDT reset (just toggling the WD_TRIG pin)
  - Environment size now 16KiB
  - fixed RAMBOOT version
  - fixed CONFIG_SYS_LOAD_ADDR
  - renamed CONFIG_TSEC1_NAME to TSEC1

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-07-09 16:10:44 -05:00
Ilya Yanok
5fb17030d5 MPC8308RDB: minimal support for devboard from Freescale
This patch provides support for MPC8308RDB development board from
Freescale with a minimal set of features:
 Dual UART is supported
 NOR flash is supported
 Both TSEC Ethernet controllers are supported
 PCI Express initialization is supported

The following features are enabled in configuration but not fully tested:
 I2C (used to get the board revision)
 I2C-connected RTC
 VSC7385 switch

There is one (hopefully) minor issue: on soft reset the board sometimes
resets twice. I've not managed to find the fix for this problem yet.
As a workaround instruction cache can be disabled.

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-07-09 16:10:36 -05:00
Ilya Yanok
7c619ddcee mpc8308: support for Freescale MPC8308 cpu
This patch adds basic support for Freescale MPC8308 CPU. Serial ports,
NOR flash and integrated Ethernet controllers are supported.
PCI Express is also supported. eSDHC, NAND and USB may work but aren't
tested (using ULPI PHY requires additional patch).

Signed-off-by: Ilya Yanok <yanok@emcraft.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
2010-07-09 15:00:54 -05:00
Minkyu Kang
1a4106dd20 SAMSUNG: serial: remove compiler warnings
remove below warnings
serial_s5p.c: In function 'serial_getc_dev':
serial_s5p.c:136: warning: dereferencing type-punned pointer will break strict-aliasing rules
serial_s5p.c: In function 'serial_putc_dev':
serial_s5p.c:152: warning: dereferencing type-punned pointer will break strict-aliasing rules

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2010-07-09 13:28:55 +09:00
Mike Frysinger
67ceefa79b Blackfin: convert plat-nand code to GPIO framework
Use the new GPIO framework code in both the Blackfin arch and the
nand_plat driver to simplify things greatly.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-08 16:52:13 -05:00
Mike Frysinger
bc1a884686 mtd: nand_plat: add simple GPIO framework DEV_READY option
Make it easy to use GPIOs for the DEV_READY pin by using the common GPIO
framework.  Also make the NAND_PLAT_INIT() define optional.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
2010-07-08 16:52:12 -05:00
Florian Fainelli
1445f6ffd5 NAND: add Toshiba TC58NVG0 identifier
The Toshiba TC58NVG0* parts are 128Mbytes x 8 bits 3.3V parts with the 0xD1
identifier. Add these to the list of known devices IDs.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2010-07-08 16:49:50 -05:00
Florian Fainelli
3e9b349c7f NAND: show manufacturer and device ID for unknown chips
When the NAND part is not supported, it is useful to show the manufacturer
and device ID to help debugging and reporting.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2010-07-08 16:49:50 -05:00
Minkyu Kang
2271d3ddcc Merge branch 'master' of git://git.denx.de/u-boot 2010-07-06 17:29:44 +09:00
Nick Thompson
dce6538f5d Davinci: SPI: add the missing v2 patch changes
Two Indentation fixes.

Catch requests for full-duplex transfers when driver configured for
half-duplex operation only.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-07-05 20:00:40 -04:00
Steve Sakoman
89716964d9 mmc: add function prototype for mmc_set_dev in mmc.h
this eliminates compiler warnings when cmd_mmc.c is built with CONFIG_SYS_MMC_SET_DEV

the mmc_set_dev implementation in omap3_mmc.c is also tweaked to match
the new prototype in parameter naming and type

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-07-05 20:00:32 -04:00
Steve Sakoman
c57cca255c ARMV7: Add support for TI OMAP4 Panda
OMAP4 Panda is a reference board based on OMAP4430, an ARMV7 Cortex A9 CPU

This patch adds basic support for booting the board. It includes i2c and mmc
support. It assumes U-boot is loaded to SDRAM with the help of another small
bootloader (x-load) running from SRAM. U-boot currently relies on x-load for
clock, mux, and SDRAM initialization

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-07-05 20:00:22 -04:00
Steve Sakoman
3e76d62a66 ARMV7: Add support for TI OMAP4430 SDP
OMAP4430 SDP is a reference board based on OMAP4430, an ARMV7 Cortex A9 CPU

This patch adds basic support for booting the board. It includes i2c and mmc
support. It assumes U-boot is loaded to SDRAM with the help of another small
bootloader (x-load) running from SRAM. U-boot currently relies on x-load for
clock, mux, and SDRAM initialization

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-07-05 20:00:15 -04:00
Steve Sakoman
938717cee1 ARMV7: Restructure OMAP i2c driver to allow code sharing between OMAP3 and OMAP4
This patch modifies the omap24xx driver so that it will also work with OMAP4.

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-07-05 20:00:10 -04:00
Steve Sakoman
bec3dc7599 ARMV7: Restructure OMAP mmc driver to allow code sharing between OMAP3 and OMAP4
The architecture independent header is moved to drivers/mmc, and the architecture
dependent headers reside in asm/arch-omap3 and asm/arch-omap4

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-07-05 20:00:05 -04:00
Steve Sakoman
d34efc767d ARMV7: Add basic support for TI OMAP4
This patch adds minimum support for OMAP4. Code which can be shared
between OMAP3 and OMAP4 is placed in arch/arm/cpu/armv7/omap-common

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-07-05 20:00:00 -04:00
Steve Sakoman
f56348af5d ARM: Rename arch/arm/cpu/arm_cortexa8 to armv7
The purpose of this patch is to prepare for adding the OMAP4 architecture, which is Cortex A9

Cortex A8 and A9 both belong to the armv7 architecture, hence the name change.

The two architectures are similar enough that substantial code can be shared.

Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Steve Sakoman <steve@sakoman.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-07-05 19:59:55 -04:00
Steve Sakoman
8f22327a66 OMAP: mmc: add support for second and third mmc channels
This patch adds support for the second and third mmc channels on OMAP3
processors

Boards wishing to use this feature should define CONFIG_SYS_MMC_SET_DEV
in the board config

Tested on Overo

Signed-off-by: Steve Sakoman <steve@sakoman.com>
Tested-by: Philip Balister <philip@opensdr.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-07-05 19:59:49 -04:00
Mike Frysinger
570ba440ed Blackfin: convert gpio flash logic to common gpio layer
Use the common gpio layer rather than bang on MMRs directly.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-05 05:30:08 -04:00
Mike Frysinger
3f390e15a7 Blackfin: bf537-stamp: use common spi boot workaround code
The common gpio code provides a function for handling the spi boot
workaround logic, so switch over to that rather than bang on the
gpio MMRs directly.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-05 05:30:08 -04:00
Mike Frysinger
a84774f56a Blackfin: switch to common GPIO LED driver
Now that we have a unified gpio layer, the different status led
implementations can be switched to the common gpio led driver.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-05 05:30:07 -04:00
Mike Frysinger
ca86ba11da Blackfin: back out status_led.h stubs
When boards define CONFIG_BOARD_SPECIFIC_LED, the common led definitions
are OK for Blackfin boards.  So switch the few boards using these over to
the common code.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-05 05:30:07 -04:00
Mike Frysinger
c5530555f8 Blackfin: unify custom gpio commands
Now that we have a unified gpio layer, the misc partial gpio commands
can be unified and made complete (support all possible gpios).

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-05 05:30:07 -04:00
Mike Frysinger
4638b21f2e Blackfin: import gpio/portmux layer from Linux
The current pinmux handling has spread throughout Blackfin drivers and
board code and is getting hideous to maintain.  So import the gpio and
portmux layer from the Blackfin Linux code.  This should spur a serious
of cleanups across the Blackfin tree.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-05 05:30:07 -04:00
Hoan Hoang
5cbbabc2b7 Blackfin: ibf-dsp561: enable AX88180 net driver
Signed-off-by: Hoan Hoang <hnhoan@i-syst.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-05 04:18:18 -04:00
Mike Frysinger
ce53fc6601 Blackfin: set up simple NMI handlers for anomaly 05000219
Older on-chip Blackfin bootroms do not create a dummy NMI handler, so set
up one ourselves when anomaly 05000219 applies.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-05 04:18:18 -04:00
Mike Frysinger
53ea1505bb Blackfin: update anomaly lists to latest sheets
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-05 04:18:18 -04:00
Mike Frysinger
7393a09800 Blackfin: bf537-stamp: drop old spi_flash driver
The new common spi framework and spi flash subsystem provides all the same
functionality as the old Blackfin-specific driver, so punt the old one as
it has been sticking around long enough.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-05 04:18:18 -04:00
Mike Frysinger
b30453ace4 Blackfin: expand EVT1 usage documentation a bit more
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-05 04:18:18 -04:00
Mike Frysinger
a5384ae49a Blackfin: implement bootcount support
The default storage location for bootcount is EVT0.  This version uses
one 32bit value and combines the magic/count value in the upper/lower
16bits.  If there is demand for more, should be easy to do.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-05 04:18:18 -04:00
Mike Frysinger
66a4909a3d Blackfin: clean up trace buffer handling when crashing
Avoid banging on the trace MMRs when debugging is disabled, avoid calling
the funcs multiple times in a row, disable the trace buffer earlier in the
exception handler to avoid eating more user entries, and dump the buffer
before calling the kgdb hook.  This way we maximize useful debugging info
up front rather than needing external tools (like gdb/serial/etc...).

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-07-05 04:18:18 -04:00
Wolfgang Denk
54841ab50c Make sure that argv[] argument pointers are not modified.
The hush shell dynamically allocates (and re-allocates) memory for the
argument strings in the "char *argv[]" argument vector passed to
commands.  Any code that modifies these pointers will cause serious
corruption of the malloc data structures and crash U-Boot, so make
sure the compiler can check that no such modifications are being done
by changing the code into "char * const argv[]".

This modification is the result of debugging a strange crash caused
after adding a new command, which used the following argument
processing code which has been working perfectly fine in all Unix
systems since version 6 - but not so in U-Boot:

int main (int argc, char **argv)
{
	while (--argc > 0 && **++argv == '-') {
/* ====> */	while (*++*argv) {
			switch (**argv) {
			case 'd':
				debug++;
				break;
			...
			default:
				usage ();
			}
		}
	}
	...
}

The line marked "====>" will corrupt the malloc data structures and
usually cause U-Boot to crash when the next command gets executed by
the shell.  With the modification, the compiler will prevent this with
an
	error: increment of read-only location '*argv'

N.B.: The code above can be trivially rewritten like this:

	while (--argc > 0 && **++argv == '-') {
		char *arg = *argv;
		while (*++arg) {
			switch (*arg) {
			...

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-07-04 23:55:42 +02:00
Wolfgang Denk
b218ccb543 Redundant environment: move flag definitions to header file
Instead of defining the flags sevaral times in different source files
(which is error prone), move them to a central place in a header file.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-07-04 23:52:42 +02:00
Wolfgang Denk
d9c27253ce Make *printf() return "int" instead of "void"
Change the return type of the *printf() functions to the standard
"int"; no changes are needed but returning the already available
length count.

This will save a few additional strlen() calls later...

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-07-04 23:51:49 +02:00
Wolfgang Denk
c0c15379e2 exports.c: fix warning: 'dummy' defined but not used
Also get rid of the #ifdef's while doing this.

Suggested-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-07-04 23:50:55 +02:00
Wolfgang Denk
cd47a83b07 cmd_ide.c: fix unused variable warning for SC3 board
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-07-04 23:49:33 +02:00
Wolfgang Denk
0e70aaa485 shannon/INFERNO: fix special handling of environment configuration
Remove some INFERNO related #ifdef's from common environment code by
fixing the board configuration settings (add CONFIG_ENV_SECT_SIZE).

While we are at it, fix comment which incorrectly talks about 4 KB
environment size, while it's actually 0x4000 = 16 KiB.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Rolf Offermanns <rof@sysgo.de>
2010-07-04 23:48:55 +02:00
Wolfgang Denk
9add504f0d boards.cfg: fix ML2, am3517_evm and s5p_goni boards
Fix board directory name for ML2 board, and
add missing definitions for am3517_evm and s5p_goni boards.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-07-04 23:47:16 +02:00
Wolfgang Denk
291e9044d4 Merge branch 'master' of git://git.denx.de/u-boot-ppc4xx 2010-07-04 23:37:00 +02:00
Wolfgang Denk
f12d4cb48a Merge branch 'sf' of git://git.denx.de/u-boot-blackfin 2010-07-04 23:36:11 +02:00
Stefan Roese
273ed0370d ppc4xx: Add T3COPR board support (PPC460GT based)
This patch adds support for the T3CORP board, based on the
AppliedMicro (APM) PPC460GT.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-01 10:26:30 +02:00
Stefan Roese
4978e60584 ppc4xx: Cleanup Boot/FLASH TLB reassignment for PPC440/460
Background Info:
Some PPC440/460 boards have caches enabled in the Boot/FLASH TLB (via
init.S) to speed up the boot process. In relocate_code (start.S) the
cache inhibit attribute for this TLB is set to disable cache. This is
needed for the CFI FLASH driver.

This patch now cleans this code up:
- CONFIG_SYS_TLB_FOR_BOOT_FLASH is defined to 0 (default TLB) if not
  defined in the top of this file. This way, we can remove an ugly
  #ifdef in this code.
- Replace complex "#if defined(CONFIG_440EP) || defined(CONFIG_GR)..."
  statement with "#if defined(CONFIG_440)".
- Remove unnecessary cache invalidate calls resulting in faster bootup.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-01 10:26:25 +02:00
Stefan Roese
2909ac03f4 ppc4xx: Add DDR1/2 macros in ppc4xx-sdram.h for non-405EX as well
This patch adds some DDR(2) macros to all PPC4xx's equipped with
this IBM DDR1/2 controller.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-01 10:26:20 +02:00
Stefan Roese
e9c020df96 ppc4xx: DDR2: Complete RDSS configuration on non-SPD based boards
As described in item #10 of the SDRAM initialization (chapter 22.2.9
of the PPC460EX/EXr/GT users manual), RDSS may need to be adjusted. The
code for this is now factored out and executed for non-SPD based boards
as well.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-01 10:26:15 +02:00
Stefan Roese
066003b2c5 ppc4xx: Enable overwriting of default scan window for IBM DDR2 controller
This patch makes it possible to overwrite the default auto-calibration
scan window (SDRAM_WRDTR.[WDTR], SDRAM_CLKTR.[CKTR] values) with
board specific values. The parameters of the weak default function are
corrected as well. This way we don't need the casts any more.

This feature will be used by an upcoming PPC460GT board port.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-01 10:26:10 +02:00
Stefan Roese
db643773fc ppc4xx: Enable PCIe support without PCI support on PPC440/460
By not defining CONFIG_SYS_PCI_MASTER_INIT and CONFIG_SYS_PCI_TARGET_INIT,
PCI support (host and adapter) will not be enabled. But it's still
possible to use the U-Boot PCI infrastructure for the PCIe ports.

This configuration option is needed for a new 460GT board, which uses
PCIe but has PCI disabled.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-01 10:26:01 +02:00
Stefan Roese
fe7cca715c ppc4xx: Enable booting with Option E on 460EX/EXr/GT
This patch enables booting with option E on the PPC460EX/EXr/GT.
When booting with Option E, the PLL is in bypass, CPR0_PLLC[ENG]=0.
The Software Boot Configuration Procedure is needed to engage the
PLL and perform a chip reset.

Signed-off-by: Stefan Roese <sr@denx.de>
2010-07-01 10:25:56 +02:00
Mike Frysinger
b376bbb49f sf: move useful messages from debug to printf
At the moment, the default SPI flash subsystem is quite terse.  Errors and
successes both result in a generic message.  So move the useful errors and
useful successes to printf output by default.

While we're here, also convert the messages to use print_size().

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2010-06-30 23:47:08 -04:00
Thomas Chou
12c2e3bbbe spi_flash: support old STMicro parts with RES
Some old STMicro parts do not support JEDEC ID (0x9f). This patch
uses RES (0xab) to get Electronic ID and translates it to JEDEC ID.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-06-30 23:47:08 -04:00
Wolfgang Wegner
7319bcaf8b add redundant environment for env_sf.c
This patch adds redundant environment for environment in SPI flash.
I took env_flash.c as an example and slightly modified it. Apart
from adapting things to SF, I also slightly changed the decision
logic to use area 2 as a default in case the flags are wrong because
not having a default path worried me.

I did not add a section for CONFIG_ENV_IS_IN_SPI_FLASH in environment.h
because I did not understand if this is desired and/or needed.
So to use the feature, one has to set CONFIG_ENV_OFFSET_REDUND _and_
CONFIG_SYS_REDUNDAND_ENVIRONMENT.

I checked it by powering off my board several times during flash
erase or write, because I do not know if there are other stress
test scenarios.

Signed-off-by: Wolfgang Wegner <w.wegner@astro-kom.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-06-30 23:47:08 -04:00
Becky Bruce
a5496a180b drivers/usb/host/ohci-hcd: rename readl/writel to ohci_readl/ohci_writel
This avoids a build warning that you see if anyone in the
header chain has included io.h (which is coming shortly).  The previous
code redefined readl/writel; this patch renames it to be specific to
ohci.  The defines are also moved from ohci-hcd.c to ohci.h.

Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
2010-06-30 21:38:10 +02:00
Ajay Kumar Gupta
944a4894c0 musb: Program extvbus for OMAP3EVM Rev >= E
OMAP3EVM Rev >=E uses external Vbus supply so setting 'extvbus'
to '1' for OMAP3EVM Rev >=E runtime based on EVM revision.

CC: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
2010-06-30 21:37:37 +02:00
Ajay Kumar Gupta
b5abf644aa omap3evm: Add board revision function
Added function to differentiate between the OMAP3EVM revisions. The
chip-id of the ethernet PHY is being used for this purpose.

Rev A to D : 0x01150000
Rev >= E   : 0x92200000

CC: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com>
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Acked-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-06-30 21:37:37 +02:00
Ajay Kumar Gupta
9bb47abf0d musb: Add Phy programming for using external Vbus
MUSB PHY on OMAP3EVM Rev >= E uses external Vbus supply to support
500mA of power.We need to program MUSB PHY to use external Vbus
for this purpose.

Adding 'extvbus' member in musb_config structure which should be set
by all the boards where MUSB interface is using external Vbus supply.

Also added ULPI bus control register read/write abstraction for
Blackfin processor as it doesn't have ULPI registers.

CC: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
Acked-by: Mike Frysinger <vapier@gentoo.org>
2010-06-30 21:37:37 +02:00
Ajay Kumar Gupta
bbf4c01efc musb: Use name based initialization for musb_config
Changed musb_config initialization for omap3.c, davinci.c
and da8xx.c using name of structure fields. This would cause
the uninitialized field to be null by default and thus would
help in avoiding to init some flags required to be set only
for a few selected platforms.

CC: Remy Bohmer <linux@bohmer.net>
Signed-off-by: Ajay Kumar Gupta <ajay.gupta@ti.com>
2010-06-30 21:37:37 +02:00
Sergey Matyukevich
64203c7b0f USB OHCI support for at91sam9g45 SoC
Add USB OHCI support for at91sam9g45ekes/at91sam9m10g45ek boards.

Note that according to errata from Atmel, OHCI is not operational
on the first revision of at91sam9g45 chip. So this patch enables
OHCI support for later revisions.

Signed-off-by: Sergey Matyukevich <geomatsi@gmail.com>
2010-06-30 21:37:36 +02:00
Wolfgang Denk
39ddd10b04 Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master 2010-06-30 10:10:32 +02:00
Wolfgang Denk
55357b7846 Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master 2010-06-30 01:04:48 +02:00
Wolfgang Denk
0a9463e935 Merge branch 'master' into next 2010-06-30 01:02:11 +02:00
Wolfgang Denk
bde3892eda Merge branch 'master' of /home/wd/git/u-boot/work 2010-06-30 00:59:21 +02:00
Michael Weiss
955ea6fc27 powerpc/bootcount: Add bootcount support for MPC512x
This also uses the breadcrumb register as on MPC5200.

Signed-off-by: Michael Weiss <michael.weiss@ifm.com>
Signed-off-by: Detlev Zundel <dzu@denx.de>
2010-06-29 23:13:35 +02:00
Wolfgang Denk
a8e2b04417 Merge branch 'master' of /home/wd/git/u-boot/work 2010-06-29 23:03:47 +02:00
Stefano Babic
bd7b26f879 Tools: set multiple variable with fw_setenv utility
Add a sort of batch mode to fw_setenv, allowing to set
multiple variables in one shot, without updating the flash after
each set as now. It is added the possibility to pass
a config file with a list of pairs <variable, value> to be set,
separated by a TAB character.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-06-29 22:43:27 +02:00
Andreas Bießmann
3746a5e65c avr32: add unaligned.h
This patch fixes following error:

zlib.c:31:27: error: asm/unaligned.h: No such file or directory

Suggested-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Andreas Biemann <biessmann@corscience.de>
2010-06-29 22:37:23 +02:00
Andreas Bießmann
418cbb0abc avr32: fix linking of atstk100x and favr32 boards
When building some avr32 boards out of tree (e.g. O=..) the linker script could
not be found. This patch references the linker script in source tree.

Signed-off-by: Andreas Biemann <biessmann@corscience.de>
2010-06-29 22:37:11 +02:00
Andreas Bießmann
eb70d05d74 avr32: disable branch folding
Due to a hardware bug mentioned in latest AP7000 datasheet errata
(revision M from 09.09) branch folding is unreliable.
This patch disables CPUCR.FE bitfield as stated in datasheet.

Signed-off-by: Andreas Biemann <biessmann@corscience.de>
2010-06-29 22:34:11 +02:00
Reinhard Meyer
c99ea79078 Fix #if chain and added AVR32 case in cmd_bdinfo.c
AVR32 case was missing in cmd_bdinfo, resulting in compiler warning
(bd->bi_baudrate declared unsigned int at AVR32, but printf used %d)

At the same time slightly reordered #if #elif #endif to make ARM one
of the cases and not an extra case surrounding all others

Signed-off-by: Reinhard Meyer <info@emk-elektronik.de>
Tested-by: Andreas Biemann <biessmann@corscience.de>
2010-06-29 22:32:13 +02:00
Reinhard Meyer (-VC)
d04250cbe1 Fix (null) problem for AVR32 boards
Currently the U-Boot address ranges for AVR32 boards are
printed like this:
"U-Boot code: (null) -> 0001183c  data: 000188e8 -> 0004e9b0"
This patch fixes this to print:
"U-Boot code: 00000000 -> 0001183c  data: 000188f8 -> 0004e9c0"

Signed-off-by: Reinhard Meyer <info@emk-elektronik.de>
2010-06-29 22:30:57 +02:00
Peter Tyser
620bbba524 examples/standalone: Remove relocation compile flags for PowerPC
Previously, standalone applications were compiled with gcc flags that
produced relocatable executables on the PowerPC architecture (eg with
the -mrelocatable and -fPIC flags).  There's no reason for these
applications to be fully relocatable at this time since no relocation
fixups are performed on standalone applications.

Additionally, removing the gcc relocation flags results in the entry
point of applications residing at the base of the image.  When
a standalone application was relocatable, the entry point was generally
located at an offset into the image which was confusing and prone to
errors.

This change moves the entry point of PowerPC standalone applications
from 0x40004 (usually) to 0x40000.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-06-29 22:29:13 +02:00
Anton Vorontsov
3bf74a4183 hwconfig: Add some unit tests
I use this for testing, and I think this might be useful in the
future.

Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
2010-06-29 22:24:48 +02:00
Anton Vorontsov
81f8d3b021 hwconfig: Fix stop characters parsing for subkeys
For the following hwconfig string:

  key1:subkey1=value1,subkey2=value2;key2:value3

The subkey2 cannot be extracted correctly. The parsing code looks
for comma as a stopch, but there may be two kind of stop characters:
a comma and a semicolon.

Currently the code would return "value2;key2:value3", while just
"value2" is the correct answer.

This patch fixes the issue by making the code aware of multiple
stop characters.

For old U-Boots, the issue can be workarounded by placing a comma
before a semicolon, i.e.:

  hwconfig=key1:subkey1=value1,subkey2=value2,;key2:value3

Reported-by: York Sun <yorksun@freescale.com>
Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
2010-06-29 22:24:11 +02:00
Wolfgang Denk
e365c43d6a Merge branch 'next' of git://git.denx.de/u-boot-ti into next 2010-06-29 21:58:16 +02:00
Wolfgang Denk
178e26d752 image.h: remove bogus ';' after function declarations
ISO C does not allow extra ';' outside of a function

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-06-29 21:52:55 +02:00
Wolfgang Denk
8515f081e4 Merge branch 'master' of git://git.denx.de/u-boot-sh into next 2010-06-29 21:37:44 +02:00
Remy Bohmer
1f9d10f694 Fix console_buffer size conflict error.
The console_buffer size is declared in common/main.c as
   -- char console_buffer[CONFIG_SYS_CBSIZE + 1];
so this extern definition is wrong.

Signed-off-by: Remy Bohmer <linux@bohmer.net>
2010-06-29 21:12:43 +02:00
Poonam Aggrwal
75997dc54f 85xx/p1_p2_rdb: Added RevD board version support
- Also modified the code to use io accessors.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
2010-06-29 21:07:26 +02:00
Felix Radensky
90b5bf211b tsec: Fix eTSEC2 link problem on P2020RDB
On P2020RDB eTSEC2 is connected to Vitesse VSC8221 PHY via SGMII.
Current TBI PHY settings for SGMII mode cause link problems on
this platform, link never comes up.

Fix this by making TBI PHY settings configurable and add a working
configuration for P2020RDB.

Signed-off-by: Felix Radensky <felix@embedded-sol.com>
Acked-by: Andy Fleming <afleming@freescale.com>
2010-06-29 21:02:16 +02:00
Nobuhiro Iwamatsu
754613f740 sh: Add trigger_address_error and support cpu reset
This add support cpu reset by trigger_address_error function.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2010-06-28 11:58:34 +09:00
Nobuhiro Iwamatsu
9a1e3e9fe3 sh: Fix path of irqflags.h
This changes path of irqflags.h from linux/ to asm/.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2010-06-28 11:58:34 +09:00
Nobuhiro Iwamatsu
61973afc59 sh: Fix overflow problem in get_ticks
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2010-06-28 11:58:33 +09:00
Nobuhiro Iwamatsu
8d1f63554b sh: Fix build on the target
SH fails building on the target.
This supports this.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2010-06-28 11:58:33 +09:00
Wolfgang Denk
953b7e6291 Remove AmigaOneG3SE board
The AmigaOneG3SE board has been orphaned or a very long time, and
broken for more than 12 releases resp. more than 3 years.  As nobody
seems to be interested any more in this stuff we may as well ged rid
of it, especially as it clutters many areas of the code so it is a
continuous pain for all kinds of ongoing work.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-06-23 23:24:20 +02:00
Wolfgang Denk
ee80fa7b6e Get rid of bogus CONFIG_SYS_BUS_HZ and CONFIG_SYS_CONFIG_BUS_CLK definitions
CONFIG_SYS_BUS_HZ has not really been used anywhere except to be
redined as CONFIG_SYS_BUS_CLK; in addition, the mpc7448hpc2 had the
bogus CONFIG_SYS_CONFIG_BUS_CLK setting which duplicated the
funtionality.  Change all this to use CONFIG_SYS_BUS_CLK consistently.

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Frank Gottschling <fgottschling@eltec.de>
Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
Cc: Eran Man <eran@nbase.co.il>
Cc: Stefan Roese <sr@denx.de>
Cc: Nye Liu <nyet@zumanetworks.com>
Cc: Roy Zang <tie-fei.zang@freescale.com>
2010-06-23 23:24:11 +02:00
Wolfgang Denk
f35f3968c2 Merge branch 'master' into next 2010-06-23 21:17:29 +02:00
Wolfgang Denk
e5ed138a23 Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master 2010-06-23 20:55:27 +02:00
Wolfgang Denk
eb77c9bdea Merge branch 'master' of ssh://gemini/home/wd/git/u-boot/master 2010-06-23 00:40:03 +02:00
Vitaly Kuzmichev
1a27f7d9c2 ARM: Align stack to 8 bytes
The ARM ABI requires that the stack be aligned to 8 bytes as it is noted
in Procedure Call Standard for the ARM Architecture:
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042d/index.html

Unaligned SP also causes the problem with variable-length arrays
allocation when VLA address becomes less than stack pointer during
aligning of this address, so the next 'push' in the stack overwrites
first 4 bytes of VLA.

Signed-off-by: Vitaly Kuzmichev <vkuzmichev@mvista.com>
2010-06-22 21:41:06 +02:00
Nick Thompson
77436d6696 Davinci: SPI performance enhancements
The following restructuring and optimisations increase the SPI
read performance from 1.3MiB/s (on da850) to 2.87MiB/s (on da830):

Remove continual revaluation of driver state from the core of the
copy loop. State can not change during the copy loop, so it is
possible to move these evaluations to before the copy loop.

Cost is more code space as loop variants are required for each set
of possible configurations. The loops are simpler however, so the
extra is only 128bytes on da830 with CONFIG_SPI_HALF_DUPLEX
defined.

Unrolling the first copy loop iteration allows the TX buffer to be
pre-loaded reducing SPI clock starvation.

Unrolling the last copy loop iteration removes testing for the
final loop iteration every time round the loop.

Using the RX buffer empty flag as a transfer throttle allows the
assumption that it is always safe to write to the TX buffer, so
polling of TX buffer full flag can be removed.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-06-22 11:06:01 -04:00
Prakash PM
e6441c4f40 DaVinci: EMAC: Get EMAC_MDIO_PHY_NUM from config files
Currently EMAC_MDIO_PHY_NUM is defined as 1 in emac_defs.h.
Because of this, EMAC does not work on EVMs which do not have phy
connected at 1. Moving the macro to board config file makes this
configurable depending on where the phy is connected on the MDIO bus.

This patch fixes the board reset issue observed during network access
on DM365EVM. EMAC driver was assuming EMAC_MDIO_PHY_NUM as 1
but it is 0 on DM365EVM.

This patch is verified on da830/omap-l137, dm365 and dm644x evms.

Signed-off-by: Prakash PM <prakash.pm@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-06-22 10:24:43 -04:00
Wolfgang Denk
54e19a7ded Merge branch 'master' into next
Conflicts:
	Makefile

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-06-18 01:20:49 +02:00
Anatolij Gustschin
86caca1cd9 ppc4xx: icon: add support for SM502 chip
Adds initialization code for SM502 graphics controller
and NL6448BC20-21D LCD panel.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
2010-06-17 23:12:15 +02:00
Wolfgang Denk
ec6baf53f7 Merge branch 'next' of git://git.denx.de/u-boot-video into next 2010-06-17 22:53:03 +02:00
Wolfgang Denk
bc33f8c810 Merge branch 'next' of git://git.denx.de/u-boot-pxa into next 2010-06-17 22:39:03 +02:00
Minkyu Kang
25ae8aeb54 Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-06-15 13:27:03 +09:00
Anatolij Gustschin
f0a921518b video: sm501.c: add weak default functions
For boards using sm501/sm502 on PCI bus some driver
functions normaly defined in the board code are not
needed and empty. Provide weak default functions for
them and do not enforce board code to define empty
functions.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-06-14 12:29:34 +02:00
Anatolij Gustschin
e2bee9e3c0 video: sm501: add support for SM501 chips on PCI bus
Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-06-14 12:29:26 +02:00
Anatolij Gustschin
1054382007 video: cfb_console: add weak default video_set_lut()
Do not enforce drivers to provide empty video_set_lut()
if they do not implement indexed color (8 bpp) frame
buffer support. Add default function to the cfb_console
driver and remove empty video_set_lut() functions.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
2010-06-14 12:28:28 +02:00
Wolfgang Denk
a6862bc123 Makefile/mkconfig: read simple board configurations from boards.cfg
Instead of adding explicit build rules for each and every board to the
top level Makefile (which makes it grow and grow), we now provide a
simple default rule and extend the "mkconfig" script to read board
configurations from a plain text file (table), "boards.cfg".

For simple boards it is now sufficient to add a single line of text to
the "boards.cfg" file, no changes to the top level Makefile are needed
any more.

To make the table better readable, change the notation for unused
fields from "NULL" into "-".

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Mike Frysinger <vapier@gentoo.org>
2010-06-13 18:08:22 +02:00
Wolfgang Denk
8c994630b9 Makefile: simplify handling of common board configurations
Many boards don't need any special handling in the Makefile. Try and
provide as generic make rules for these as possible.  There are still
many areas where this does not work out really well, but the changes
show the direction we should take, and point out which boards or
architectures need further cleanup.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-06-13 18:08:20 +02:00
Wolfgang Denk
ed7a196cd5 Makefile: simplify handling of build target names
Instead of stripping the "_config" part from the make target names in
each call of the "mkconfig" script let this script strip the string.

This prepares the ground for forther simplification of the top level
Makefile.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2010-06-13 18:08:18 +02:00
Wolfgang Denk
0e42ada310 Fix printing of make targets, simplify Makefile
Make printing the "board names" more useful. So far, we would get
output like this;

$ ./MAKEALL P2020RDB P2020RDB_NAND P2020RDB_SDCARD P2020RDB_SPIFLASH
Configuring for P1_P2_RDB board...
   text    data     bss     dec     hex filename
 342612   32656  265212  640480   9c5e0 /work/wd/tmp-ppc/u-boot
Configuring for P1_P2_RDB board...
   text    data     bss     dec     hex filename
 343160   32704  265212  641076   9c834 /work/wd/tmp-ppc/u-boot
Configuring for P1_P2_RDB board...
   text    data     bss     dec     hex filename
 341908   32620  265212  639740   9c2fc /work/wd/tmp-ppc/u-boot
Configuring for P1_P2_RDB board...
   text    data     bss     dec     hex filename
 341908   32620  265212  639740   9c2fc /work/wd/tmp-ppc/u-boot

For all build targets the same board name would be printed, which
makes is often pretty difficult to find out which exact build target
caused problems. With this commit, the real make target name gets
printed instead, which is way more useful:

$ ./MAKEALL P2020RDB P2020RDB_NAND P2020RDB_SDCARD P2020RDB_SPIFLASH
Configuring for P2020RDB board...
   text    data     bss     dec     hex filename
 342612   32656  265212  640480   9c5e0 /work/wd/tmp-ppc/u-boot
Configuring for P2020RDB_NAND board...
   text    data     bss     dec     hex filename
 343160   32704  265212  641076   9c834 /work/wd/tmp-ppc/u-boot
Configuring for P2020RDB_SDCARD board...
   text    data     bss     dec     hex filename
 341908   32620  265212  639740   9c2fc /work/wd/tmp-ppc/u-boot
Configuring for P2020RDB_SPIFLASH board...
   text    data     bss     dec     hex filename
 341908   32620  265212  639740   9c2fc /work/wd/tmp-ppc/u-boot

Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
2010-06-13 18:07:25 +02:00
Marek Vasut
bb596e84eb PXA: Add missing MDREFR bits
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-06-13 13:39:11 +02:00
Marek Vasut
52dc45e5a3 PXA: Add UP2OCR register bit definitions
This register is used on PXA to control the USB Port2 operation (USB Port2 is
the host port).

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-06-13 13:39:11 +02:00
Marek Vasut
43c15d3dd5 PXA: PXAMMC: Add Monahans support
This patch enables PXAMCI support on PXA3xx CPUs. This patch only enables MMC1
though, MMC2 and PXA31x MMC3 will need further patch to be operational.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-06-13 13:39:11 +02:00
Marek Vasut
55429a0323 PXA: PXAMMC: Drop different delays for PXA27X
In case the delays were set to 10000, the MMC card on PXA27X boards (and PXA3xx
boards) didn't initialize on first try. Increasing the delays and leaving just
those for PXA25x and 26x (that is 200000) fixes this problem.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-06-13 13:39:11 +02:00
Minkyu Kang
a56915d7c6 SAMSUNG: goni: add the GPL licence
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Tom <Tom@bumblecow.com>
2010-06-09 09:01:52 +09:00
Minkyu Kang
72b81d399f s5pc1xx: Add support for Samsung Goni board
This patch adds support for the Samsung Goni board (S5PC110 SoC)

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2010-06-03 08:48:34 +09:00
Minkyu Kang
db3ff917e3 s5pc1xx: gpio: bug fix at gpio_set_pull function
When set to PULL_NONE, gpio_set_pull function is returned without write the register.
This patch fixed it.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-05-31 09:19:39 +09:00
Minkyu Kang
922d27b596 Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
	arch/arm/include/asm/mach-types.h

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-05-31 09:13:11 +09:00
Minkyu Kang
de200874fb Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-05-17 13:17:44 +09:00
Stefano Babic
0cf7d2440e Add SPI support to mx51evk board
The patch adds SPI devices to the mx51evk board.
The MC13892 chip (PMIC) is supported.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-05-10 11:21:55 -05:00
Stefano Babic
f5ce366e1f MX: Added definition file for MC13892
The MC13892 is a Power Controller used with processors
of the family MX.51. The file adds definitions to be used to setup
the internal registers via SPI.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-05-10 11:21:55 -05:00
Stefano Babic
f91777a319 SPI: added support for MX51 to mxc_spi
This patch add SPI support for the MX51 processor.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-05-10 11:21:54 -05:00
Stefano Babic
0f12ce637b MX31: Add support for PMIC to the QONG module
Add support for the PMIC (MC13783) controller
and enables charging of the RTC battery.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-05-10 11:21:54 -05:00
Stefano Babic
f9c7affa9b MX: RTC13783 uses general function to access PMIC
The RTC is part of the Freescale's PMIC controller.
Use general function to access to PMIC internal registers.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
2010-05-10 11:21:54 -05:00
Stefano Babic
3bff02dc83 MX: Added Freescale Power Management Driver
The patch add supports for the Freescale's Power
Management Controller (known as Atlas) used together with i.MX31/51
processors. It was tested with a MC13783 (MX31) and
MC13892 (MX51).

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-05-10 11:21:53 -05:00
Magnus Lilja
869e8ae032 i.MX31: Activate NAND support for i.MX31 Litekit board.
Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com>
2010-05-10 11:21:53 -05:00
Fabio Estevam
46cd572ddb MX51: Fix MX51 CPU detect message
Fix MX51 CPU detect message.

Original string was:
CPU:   Freescale i.MX51 family 3.0V at 800 MHz

which can be misinterpreted as  3.0 Volts instead of the silicon revision.

,change it to:
CPU:   Freescale i.MX51 family rev3.0 at 800 MHz

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2010-05-10 11:21:53 -05:00
Stefano Babic
85fda142fe MX51evk: Removed warnings
Changes reflect modifications in the fsl_esdhc driver
(the clk_enable field war removed in the configuration structure).

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-05-10 11:21:52 -05:00
Anatolij Gustschin
c89eaf3c11 tx25: fix crash while booting Linux
Currently booting Linux on TX25 board doesn't work
since there is no correct mach-id and boot parameters
setup for tx25 board. Fix it now.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: John Rigby <jcrigby@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
2010-05-10 11:21:52 -05:00
Minkyu Kang
9d62f20d08 Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
	arch/arm/include/asm/mach-types.h
	common/serial.c

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-05-10 15:20:50 +09:00
Tom
e0531f975c ARM Update mach-types
Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
And built with

repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
commit 257dab81413b31b8648becfe11586b3a41e5c29a

Signed-off-by: Tom <Tom@bumblecow.com>
2010-05-09 16:58:11 -05:00
Minkyu Kang
6596753387 Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-04-30 11:10:22 +09:00
Asen Dimov
28897f9072 pm9263 converted to at91 soc access
Signed-off-by: Asen Dimov <dimov@ronetix.at>
2010-04-28 21:00:12 -05:00
Asen Dimov
000b6dc6ed at91: define matrix registers bit fields
Signed-off-by: Asen Dimov <dimov@ronetix.at>
2010-04-28 18:31:19 -05:00
Minkyu Kang
c3900ef185 Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-04-28 18:56:39 +09:00
Stefano Babic
655ef25952 MX31: Removed erroneous board name from QONG
QONG is a module that can be installed on several boards,
not only on the QONG-EVB manufactured by Dave srl.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-04-24 12:58:01 -05:00
Stefano Babic
0bab9d666c MX31: Add UBI support to QONG module
The UBI/UBIFS support is added to the QONG module.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-04-24 12:58:01 -05:00
Stefano Babic
41985bb749 MX31: Support 128MB RAM on QONG module
The QONG module can be downsized and delivered
with 128MB instead of 256MB. The patch adds
run time support for the two different memory
configurations.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-04-24 12:58:01 -05:00
Stefano Babic
3f3c7d3d92 MX31: Add support for NAND to QONG board
The NAND device is connected to the FPGA of the QONG board
and not to the NFC controller. For this reason, the FPGA must
be set and initialized before accessing to the NAND itself.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-04-24 12:58:00 -05:00
Stefano Babic
89b4e39e1e MX31: add pin definitions for NAND controller
Add pin definitions ralted to the NAND controller to be used
to set up the pin multiplexer.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-04-24 12:58:00 -05:00
Stefano Babic
8336679031 MX31: add accessor function to get a gpio
The patch adds an accessor function to get the value of a gpio.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-04-24 12:58:00 -05:00
Stefano Babic
989359b318 mx51evk: correct list of possible BOOT_FROM values
Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-04-24 12:57:59 -05:00
Stefano Babic
6686f10dd5 mkimage: correct spelling error in imximage
Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-04-24 12:57:59 -05:00
John Rigby
0df5b4e38f MX25 print arm clock instead of mpllclk on boot
Replace call to imx_get_mpllclk with imx_get_armclk
to show frequency of ARM core instead of mpll internal
bus in print_cpuinfo.

Signed-off-by: John Rigby <jcrigby@gmail.com>
CC: Stefano Babic <sbabic@denx.de>
2010-04-24 12:57:59 -05:00
Minkyu Kang
6bb7c92cda Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-04-22 12:39:56 +09:00
Frans Meulenbroeks
339b5b4ae3 configs/openrd_base.h: reordered macros
moved CONFIG_CMD_FAT to filesystem section
swapped CONFIG_CMD_NAND and CONFIG_CMD_MII so they are alpha correct

Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
2010-04-21 07:24:51 -05:00
Frans Meulenbroeks
3301b9401c configs/sheevaplug: added a few additional commands
This patch includes a few additional commands in the sheevaplug
version of u-boot:
- support for LONGHELP so you can get help messages
- auto completion and command editing
- ubi and mii support
- ext2 filesystem (convenient if you have an ext2 from which you want to boot)
- jffs2 and ubifs filesystems (if you want to use these in NAND)

This also makes it more similar to openrd client.

Side effect of this patch is that the code now needs 3 sectors i.s.o. 2
so an existing env is overwritten

Signed-off-by: Frans Meulenbroeks <fransmeulenbroeks@gmail.com>
2010-04-21 07:24:51 -05:00
Siddarth Gore
36338b868f Marvell GuruPlug Board Support
GuruPlug Standard: 1 Gb Ethernet, 2 USB 2.0
GuruPlug Plus: 2 Gb Ethernet, 2 USB 2.0, 1 eSATA, 1 uSD slot

References:
http://www.globalscaletechnologies.com/t-guruplugdetails.aspx
http://plugcomputer.org

This patch is for GuruPlug Plus, but it supports Standard version
as well.

Signed-off-by: Siddarth Gore <gores@marvell.com>
2010-04-21 07:24:51 -05:00
Minkyu Kang
83653121d7 Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:
	cpu/arm1176/cpu.c
	cpu/arm1176/start.S
	cpu/arm_cortexa8/s5pc1xx/Makefile
	cpu/arm_cortexa8/s5pc1xx/clock.c
	drivers/serial/serial_s5p.c
	include/asm-arm/arch-s5pc1xx/clk.h
	include/asm-arm/arch-s5pc1xx/gpio.h
	include/asm-arm/arch-s5pc1xx/uart.h

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-04-19 10:26:18 +09:00
Stefano Babic
07739bcef5 Moved board specific values in config file
The lowlevel_init file contained some hard-coded values
to setup the RAM. These board related values are moved into
the board configuration file.

Signed-off-by: Stefano Babic <sbabic@denx.de>
2010-04-17 20:52:44 -05:00
Fabio Estevam
84a6e0d0f8 MX51EVK: Remove CPLD related code
There is no CPLD on MX51EVK board, so remove CPLD related function.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2010-04-17 20:52:43 -05:00
Heiko Schocher
e470955b64 arm, i.mx27: add support for magnesium board from projectiondesign
This patch adds support for the magnesium board from
projectiondesign. This board uses i.MX27 SoC and has
8MB NOR flash, 128MB NAND flash, FEC ethernet controller
integrated into i.MX27. As this port is based on
the imx27lite port, common config options are collected
in include/configs/imx27lite-common.h

Signed-off-by: Heiko Schocher <hs@denx.de>
2010-04-17 20:52:43 -05:00
Heiko Schocher
9f6f58209e arm, mx27: add support for SDHC1 pin init
Signed-off-by: Heiko Schocher <hs@denx.de>
2010-04-17 20:52:43 -05:00
Minkyu Kang
eff3b9a742 SAMSUNG: make s5p common gpio functions
Because of s5pc1xx gpio is same as s5p seires SoC,
move gpio functions to drvier/gpio/
and modify structure's name from s5pc1xx_ to s5p_.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-04-17 15:30:51 -05:00
Minkyu Kang
5aa02e4d6a SAMSUNG: serial: modify name from s5pc1xx to s5p
Because of other s5p series SoC will use these serial functions,
modify function's name and structure's name.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-04-17 15:18:57 -05:00
Asen Dimov
ed1a529ab5 pm9263: remove CONFIG_CMD_AUTOSCRIPT
Signed-off-by: Asen Dimov <dimov@ronetix.at>
2010-04-16 12:31:19 -05:00
Alexander Holler
364a1a57e2 at91: add defines for RTT and GPBR
Signed-off-by: Alexander Holler <holler@ahsoftware.de>
2010-04-16 12:31:19 -05:00
Asen Dimov
14f7f8be6b pm9261: remove CONFIG_CMD_AUTOSCRIPT
Signed-off-by: Asen Dimov <dimov@ronetix.at>
2010-04-16 12:31:18 -05:00
Asen Dimov
9428d2f83c pm9261 converted to at91 soc access
Signed-off-by: Asen Dimov <dimov@ronetix.at>
2010-04-16 12:31:18 -05:00
trix
534864eff6 ARM Update mach-types
Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
And built with

repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
commit 85b3cce880a19e78286570d5fd004cc3cac06f57

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2010-04-16 12:31:18 -05:00
Minkyu Kang
0f1f21a345 SAMSUNG: serial: modify name from s5pc1xx to s5p
Because of other s5p series SoC will use these serial functions,
modify function's name and structure's name.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-03-26 13:56:59 +09:00
Minkyu Kang
8677f127d6 SAMSUNG: make s5p common gpio functions
Because of s5pc1xx gpio is same as s5p seires SoC,
move gpio functions to drvier/gpio/
and modify structure's name from s5pc1xx_ to s5p_.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-03-26 13:56:52 +09:00
Minkyu Kang
45e565337a Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:

	cpu/arm920t/ep93xx/timer.c

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-03-23 19:09:13 +09:00
Minkyu Kang
995a4b1d83 Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:

	board/davinci/da830evm/da830evm.c
	board/edb93xx/sdram_cfg.c
	board/esd/otc570/otc570.c
	board/netstar/eeprom.c
	board/netstar/eeprom_start.S
	cpu/arm920t/ep93xx/timer.c
	include/configs/netstar.h
	include/configs/otc570.h

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-03-15 10:51:36 +09:00
Matthias Kaehlcke
44de3e8ff7 ep93xx timer: refactoring
ep93xx timer: Simplified the timer code by eliminating clk_to_systicks() and
performing (almost) all manipulation of the timer structure in read_timer()

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
2010-03-13 12:44:59 -06:00
Matthias Kaehlcke
5962bffcb5 ep93xx timer: Rename struct timer_reg pointers
ep93xx timer: Renamed pointers to struct timer_regs from name 'timer' to
'timer_regs' in order to avoid confusion with the global variable 'timer'

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
2010-03-13 12:44:59 -06:00
Matthias Kaehlcke
dea86bb9aa ep93xx timer: Fix resolution of get_ticks()
ep93xx timer: Make get_ticks() return a value in CONFIG_SYS_HZ resolution,
as announced by get_tbclk()

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
2010-03-13 12:44:59 -06:00
Matthias Kaehlcke
39ecbfcce0 ep93xx timer: Fix possible overflow in usecs_to_ticks()
ep93xx timer: Use 64-bit values in usecs_to_ticks() in order to avoid
overflows in intermediate values

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
2010-03-13 12:44:58 -06:00
Naveen Krishna CH
8d9ba7507f SAMSUNG: SMDKC100: Adds ethernet support.
Add setup for ethernet on SMDKC100, allowing kernel/ramdisk to be
loaded over tftp.

The preinit function will configure GPIO (GPK0CON) & SROMC to look
for environment in SROM Bank 3.

Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-03-13 08:11:17 -06:00
Naveen Krishna CH
a722ca7b9e S5PC100: Function to configure the SROMC registers.
Nand Flash, Ethernet, other features might need to configure the
SROMC registers accordingly.
The config_sromc() functions helps with this.

Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-03-13 08:11:17 -06:00
Naveen Krishna CH
fe93100a64 S5PC100: Memory SubSystem Header file, register description(SROMC).
Memory subsystem of S5PC100 handles SROM, SRAM, OneDRAM, OneNand,
NAND Flash, DDRs.
smc.h is a common place for the register description of Memory subsystem
of S5PC100.
Note: Only SROM related registers are descibed now.

Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-03-13 08:11:17 -06:00
Minkyu Kang
28937af232 s5pc1xx: update the README file
Because adds support the GPIO Interface, README file is updated.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-03-13 08:11:16 -06:00
Minkyu Kang
2c1ad699e5 s5pc1xx: support the GPIO interface
This patch adds support the GPIO interface

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-03-13 08:11:16 -06:00
Joonyoung Shim
803472beb7 s3c64xx: Add ifdef at the S3C64XX only codes
The s3c6400.h file is only for S3C64XX cpu and the pheripheral port
address(0x70000000 - 0x7fffffff) exists at only S3C64XX cpu, so they
should be included by only S3C64XX cpu.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-03-13 08:11:15 -06:00
Naveen Krishna CH
0468afff30 S5PC100: Moves the Macros to a common header file
The get_pll_clk(int) API returns the PLL frequency based on
the (int) argument which is defined locally in clock.c

Moving that #define to common header file (clk.h) would
be helpful when using the API from other files.

Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-03-13 08:11:15 -06:00
Minkyu Kang
6d5ef5335a MAINTAINERS: sort the list of ARM Maintainers by last name
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-03-11 10:45:10 -06:00
Vipin KUMAR
bdc6b47a1a SPEAr : Adding maintainer name for spear SoCs
Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
2010-03-11 10:45:00 -06:00
Naveen Krishna CH
a8d25fc26f SAMSUNG: SMDKC100: Adds ethernet support.
Add setup for ethernet on SMDKC100, allowing kernel/ramdisk to be
loaded over tftp.

The preinit function will configure GPIO (GPK0CON) & SROMC to look
for environment in SROM Bank 3.

Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-03-05 18:00:39 +09:00
Naveen Krishna CH
aac90e2311 S5PC100: Function to configure the SROMC registers.
Nand Flash, Ethernet, other features might need to configure the
SROMC registers accordingly.
The config_sromc() functions helps with this.

Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-03-05 18:00:35 +09:00
Naveen Krishna CH
04a3e2e8e5 S5PC100: Memory SubSystem Header file, register description(SROMC).
Memory subsystem of S5PC100 handles SROM, SRAM, OneDRAM, OneNand,
NAND Flash, DDRs.
smc.h is a common place for the register description of Memory subsystem
of S5PC100.
Note: Only SROM related registers are descibed now.

Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-03-05 18:00:31 +09:00
Minkyu Kang
95a3db1a0c Merge branch 'master' of git://git.denx.de/u-boot-samsung 2010-02-18 08:43:51 +09:00
Minkyu Kang
5a5aaad81e s5pc1xx: support the GPIO interface
This patch adds support the GPIO interface and update the README file.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-02-18 08:40:41 +09:00
Minkyu Kang
3806459949 s5pc1xx: update the README file
Because adds support the GPIO Interface, README file is updated.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-02-17 19:34:34 +09:00
Minkyu Kang
8f5407c90d s5pc1xx: support the GPIO interface
This patch adds support the GPIO interface

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-02-17 19:34:27 +09:00
Joonyoung Shim
3e5d177133 s3c64xx: Add ifdef at the S3C64XX only codes
The s3c6400.h file is only for S3C64XX cpu and the pheripheral port
address(0x70000000 - 0x7fffffff) exists at only S3C64XX cpu, so they
should be included by only S3C64XX cpu.

Signed-off-by: Joonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-02-09 17:50:48 +09:00
Naveen Krishna CH
2167f2715e S5PC100: Moves the Macros to a common header file
The get_pll_clk(int) API returns the PLL frequency based on
the (int) argument which is defined locally in clock.c

Moving that #define to common header file (clk.h) would
be helpful when using the API from other files.

Signed-off-by: Naveen Krishna Ch <ch.naveen@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-02-08 12:14:55 +09:00
Minkyu Kang
f687ebf82d Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-02-08 12:13:35 +09:00
Alessandro Rubini
fba8bfd7a8 edb93xx: enable the uart in devicecfg register
printf goes to uart1, but it will block forever waiting for
busy to go off unless the uart is enabled first.

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
2010-02-07 15:05:56 -06:00
Alessandro Rubini
ce262f9838 edb93xx: change calculation un early_udelay.h
Previous code compiled with gcc-4.2.2 makes a call to
__aeabi_uidiv to divide by 20. As a side effect it was
not inline any more, and so sdram_cfg used the stack
as well, but this is early code that has no stack yet.
The patch explicitly removes the division, so no stack is used.

The calculation of the counter calls a division by 20

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
2010-02-07 15:05:56 -06:00
Alessandro Rubini
bb9d864b95 EP93xx: fix syscon_regs definition
The structure was missing a reserved entry (not listed in the manual,
actually), so the last registers had a wrong offset. This prevented
all swlocked registers to be modified as swlock is last in the structure.

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
2010-02-07 15:05:56 -06:00
Minkyu Kang
bdaef38171 Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:

	cpu/arm_cortexa8/s5pc1xx/cache.c
	include/configs/spear6xx.h
	lib_ppc/reloc.S

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-02-06 17:20:09 +09:00
Matthias Kaehlcke
c20a3c0bac Add EP93xx ethernet driver
Added ethernet driver for EP93xx SoCs

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
2010-02-05 15:48:29 -06:00
Matthias Kaehlcke
a62921468d ARM: Add support for EP93xx SoCs
Add support for the Cirrus EP93xx platform

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
Acked-by: Tom <Tom.Rix@windriver.com>
2010-02-05 15:48:28 -06:00
Matthias Kaehlcke
8ed0f6108f Add support for EDB93xx boards
Added support for the following EDB93xx boards:

EDB9301
EDB9302
EDB9302A
EDB9307
EDB9307A
EDB93012
EDB9315
EDB9315A

Signed-off-by: Matthias Kaehlcke <matthias@kaehlcke.net>
2010-02-05 15:48:28 -06:00
Ladislav Michl
7f5a9c237e NetStar: Remove debug junk leaked into eeprom utility
This patch removes debug junk leaked into eeprom utility.

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-01-31 17:46:18 -06:00
Ladislav Michl
c2dccef33a NetStar: make crcit utility more readable
This patch makes the crcit utility more readable

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-01-31 17:46:18 -06:00
Ladislav Michl
d9657ac848 NetStar: Disable CONFIG_CMD_JFFS2
This patch removes "CONFIG_CMD_JFFS" from the board config

Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-01-31 17:46:18 -06:00
Tom Rix
274fafef68 OMAP3 Move declaration of gpmc_cfg.
Every omap3 board config file declared the global variable gpmc_cfg.
This changes moves the declaration to a better location in the
arch dependent header file cpu.h.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-01-31 17:46:17 -06:00
Scott Ellis
7dd866ae92 Overo GPMC registers
Use appropriate GPMC timings for the LAN9221 controller on the
Gumstix Overo expansion boards not the values in arch-omap3/mem.h
which are for a different ethernet controller.

Signed-off-by: Scott Ellis <scott@jumpnowtek.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-01-31 17:46:17 -06:00
Nick Thompson
e0f2318f85 da830evm: Use table driven pin mux configuration
Tidyup the pin muxer configuration using the Davinci table driven
pinmux configuration function and data tables.

Signed-off-by: Nick Thompson <nick.thompson@ge.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-01-31 17:46:17 -06:00
Sekhar Nori
d01b384f7c TI DaVinci: Driver for the davinci SPI controller
This adds a driver for the SPI controller found on davinci
based SoCs from Texas Instruments.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2010-01-31 17:46:17 -06:00
Daniel Gorsulowski
1be2890d8b at91: Add esd gmbh OTC570 board support
This patch adds support for esd gmbh OTC570 board.
The OTC570 is based on an Atmel AT91SAM9263 SoC.

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
2010-01-31 07:59:15 -06:00
Minkyu Kang
ed44387f40 Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-01-25 14:42:11 +09:00
Tom Rix
790af6ed08 Merge branch 'r-ml-master' into t-master 2010-01-23 07:22:23 -06:00
Minkyu Kang
2fba7a0877 Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-01-23 11:46:34 +09:00
Daniel Gorsulowski
69df282a78 at91: Enable slow master clock on meesc board
Normally the processor clock has a divisor of 2.
In some cases this this needs to be set to 4.
Check the user has set environment mdiv to 4 to change the divisor.

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
2010-01-21 17:20:10 -06:00
Vipin KUMAR
d41768df35 SPEAr : Support added for SPEAr320 board
SPEAr320 SoC support contains basic spear320 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver
- emi driver(cfi support)

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-21 13:35:18 -06:00
Vipin KUMAR
b7cea4935b SPEAr : Support added for SPEAr310 board
SPEAr310 SoC support contains basic spear310 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver
- emi driver(cfi support)

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-21 13:35:18 -06:00
Vipin KUMAR
bf6b359e98 SPEAr : emi controller initialization for CFI driver support
SPEAr310 and SPEAr320 SoCs contain an EMI controller to interface
Paraller NOR flashes. This patch adds the support for this IP

The standard CFI driver is used to interface with NOR flashes

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-21 13:35:18 -06:00
Vipin KUMAR
95da784196 SPEAr : Support added for SPEAr300 board
SPEAr300 SoC support contains basic spear300 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-21 13:35:17 -06:00
Vipin KUMAR
14a35a6fb2 SPEAr : Support for HW mac id read/write from i2c mem
This patch adds the  support to read and write mac id from i2c
memory.
For reading:
	if (env contains ethaddr)
		pick env ethaddr
	else
		pick ethaddr from i2c memory
For writing:
	chip_config ethaddr XX:XX:XX:XX:XX:XX writes the mac id
	in i2c memory

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-21 13:35:17 -06:00
Vipin KUMAR
f68d0678c8 SPEAr : Support added for SPEAr600 board
SPEAr600 SoC support contains basic spear600 support along with the
usage of following drivers
- serial driver(UART)
- i2c driver
- smi driver
- nand driver(FSMC)
- usbd driver

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-21 13:35:17 -06:00
Vipin KUMAR
2f11000558 SPEAr : usbd driver support for SPEAr SoCs
SPEAr SoCs contain a synopsys usb device controller.
USB Device IP can work in 2 modes
- DMA mode
- Slave mode

The driver adds support only for slave mode operation of usb
device IP. This driver is used along with standard USBTTY
driver to obtain a tty interface over USB on the host

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-21 13:35:17 -06:00
Vipin KUMAR
13229557c1 SPEAr : nand driver support for SPEAr SoCs
SPEAr SoCs contain an FSMC controller which can be used to interface
with a range of memories eg. NAND, SRAM, NOR.
Currently, this driver supports interfacing FSMC with NAND memories

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-21 13:35:16 -06:00
Vipin KUMAR
1ebdb24159 SPEAr : smi driver support for SPEAr SoCs
SPEAr SoCs contain a serial memory interface controller. This
controller is used to interface with spi based memories.
This patch adds the driver for this IP.

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-21 13:35:16 -06:00
Vipin KUMAR
7de14b2aa5 SPEAr : i2c driver support added for SPEAr SoCs
SPEAr SoCs contain a synopsys i2c controller.
This patch adds the driver for this IP.

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-21 13:35:16 -06:00
Vipin KUMAR
6c17839b36 SPEAr : Adding basic SPEAr architecture support.
SPEAr Architecture support added. It contains the support for
following SPEAr blocks
- Timer
- System controller
- Misc registers

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-21 13:35:16 -06:00
Vipin KUMAR
ac4540d7f5 SPEAr : Adding README.spear in doc
README.spear contains information about SPEAr architecture and
build options etc

Signed-off-by: Vipin <vipin.kumar@st.com>
2010-01-21 13:35:15 -06:00
Tom Rix
f7258ab197 ARM Update mach-types
Fetched from http://www.arm.linux.org.uk/developer/machines/download.php
And built with

repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm
commit 2045124ffd1a5e46d157349016a2c50f19c8c91d

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2010-01-21 10:47:16 -06:00
Prafulla Wadaskar
4524a601a0 Kirkwood: Makefile cleanup- fixed ordering (cosmetic change)
As per coding guidlines, it is good to maintain proper ordering
in the makefiles.
This was missed during initial coding, corrected here.

This was discovered during orion5x code review
Thanks to Albert Aribaud for this.

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-01-20 16:55:25 -06:00
Prafulla Wadaskar
77506cc997 Kirkwood: Upgated licencing for files imported from linux source to GPLv2 or later
These are few files directly imported from Linux kernel source.
Those are not modifyed at all ar per strategy.
These files contains source with GPLv2 only
whereas u-boot expects GPLv2 or latter

These files are updated for the same from prior permission from original writes

Acked-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2010-01-20 16:55:24 -06:00
Minkyu Kang
b097d552bc Merge branch 'master' of git://git.denx.de/u-boot-arm 2010-01-19 09:12:48 +09:00
Tom Rix
a7709d926d Merge branch 't-ml-master' into t-master 2010-01-18 08:08:32 -06:00
Minkyu Kang
e598dfc22c Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:

	cpu/arm_cortexa8/s5pc1xx/cache.c
	include/asm-arm/arch-s5pc1xx/sys_proto.h
	include/sja1000.h

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-01-15 22:41:58 +09:00
Minkyu Kang
1c2a8e359e s5pc1xx: update cache routines
Because of v7_flush_dcache_all is moved to omap3/cache.S
and s5pc110 needs cache routines, update s5pc1xx cache routines.

l2_cache_enable and l2_caceh_disable are moved from cache.c to cache.S
and invalidate_dcache is modified for SoC specific.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-01-14 11:48:56 -06:00
Seunghyeon Rhee
59a71a096a samsung: fix DMC1_MEM_CFG for s3c64xx
The MSB of DMC1_MEM_CFG can be set to '1' for separate CKE control
for S3C6400. In the configuration of SMDK6400, however, two 16-bit
mDDR (SAMSUNG K4X51163) chips are used in parallel to form 32-bit
memory bus and there is no need to control CKE for each chip
separately. AFAIK, CKE1 is not at all connected. Only CKE0 is
used. Futhermore, it should be '0' always for S3C6410. When tested
with a board which has a S3C6410 and the same memory configuration,
a side effect is observed that u-boot command "reset" doesn't work
leading to system hang. Leaving the bit clear is safe in most cases.

Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-01-14 11:48:56 -06:00
Minkyu Kang
e7ae13a57b s5pc1xx: update cache routines
Because of v7_flush_dcache_all is moved to omap3/cache.S
and s5pc110 needs cache routines, update s5pc1xx cache routines.

l2_cache_enable and l2_caceh_disable are moved from cache.c to cache.S
and invalidate_dcache is modified for SoC specific.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2010-01-13 13:19:04 +09:00
Seunghyeon Rhee
824df58fc0 samsung: fix DMC1_MEM_CFG for s3c64xx
The MSB of DMC1_MEM_CFG can be set to '1' for separate CKE control
for S3C6400. In the configuration of SMDK6400, however, two 16-bit
mDDR (SAMSUNG K4X51163) chips are used in parallel to form 32-bit
memory bus and there is no need to control CKE for each chip
separately. AFAIK, CKE1 is not at all connected. Only CKE0 is
used. Futhermore, it should be '0' always for S3C6410. When tested
with a board which has a S3C6410 and the same memory configuration,
a side effect is observed that u-boot command "reset" doesn't work
leading to system hang. Leaving the bit clear is safe in most cases.

Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-12-04 08:48:41 +09:00
kevin.morfitt@fearnside-systems.co.uk
33bf447477 Add a unified s3c24x0 header file
This patch adds a unified s3c24x0 cpu header file that selects the header
file for the specific s3c24x0 cpu from the SOC and CPU configs defined in
board config file. This removes the current chain of s3c24-type #ifdef's
from the s3c24x0 code.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-11-20 19:02:17 +09:00
Seunghyeon Rhee
1f8b919629 S3C6400/SMDK6400: fix stack_setup in start.S
Fix stack_setup to place the stack on the correct address in DRAM
accroding to U-Boot standard and remove conditional compilation by
CONFIG_MEMORY_UPPER_CODE macro that is not necessry. This macro
was introduced and used only by this board for some unclear reason.

The definition of this macro is also removed because it's not
referenced elsewhere.

Signed-off-by: Seunghyeon Rhee <seunghyeon@lpmtec.com>
Tested-by: Minkyu Kang <mk7.kang@samsung.com>
2009-11-13 17:49:26 +09:00
Minkyu Kang
78b06d63e2 s5pc1xx: serial: fix the error check logic
Because of Frame error, Parity error and Overrun error are occured only receive
operation, need to masking when error checking.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-11-13 15:41:29 +09:00
kevin.morfitt@fearnside-systems.co.uk
2888223720 Clean-up of s3c24x0 header files
Cleans up the s3c24x0 header files:

s4c24x0.h: removes the use of 'volatile' from the S3C24X0_REG8,
S3C24X0_REG16 and S3C24X0_REG32 register typedef's. Registers are always
accessed using the IO accessor functions which cast the register address
as 'volatile' anyway so it isn't required here.

s3c2400.h and s3c2410.h: insert a blank line between the static inline
functions

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
2009-11-10 11:12:14 +09:00
Minkyu Kang
b6d8992cbb Merge branch 'master' of git://git.denx.de/u-boot-arm 2009-11-10 08:44:30 +09:00
Minkyu Kang
f9000d975b s3c64xx: move s3c64xx header files to asm-arm/arch-s3c64xx
This patch moves the s3c64xx header files from include/
to include/asm-arm/arch-s3c64xx

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-11-06 17:20:14 +09:00
kevin.morfitt@fearnside-systems.co.uk
17ab301c93 Move s3c24x0 header files to asm-arm/arch-s3c24x0/
This patch moves the s3c24x0 header files from include/ to
include/asm-arm/arch-s3c24x0/.

checkpatch.pl showed 2 errors and 3 warnings. The 2 errors were both due
to a non-UTF8 character in David M?ller's name:

ERROR: Invalid UTF-8, patch and commit message should be encoded in UTF-8
#489: FILE: include/asm-arm/arch-s3c24x0/s3c2410.h:3:
+ * David M?ller ELSOFT AG Switzerland. d.mueller@elsoft.ch

As David's name correctly contains a non-UTF8 character I haven't fixed
these errors.

The 3 warnings were all because of the use of 'volatile' in s3c24x0.h:

WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt
#673: FILE: include/asm-arm/arch-s3c24x0/s3c24x0.h:35:
+typedef volatile u8	S3C24X0_REG8;
+typedef volatile u16	S3C24X0_REG16;
+typedef volatile u32	S3C24X0_REG32;

I'll fix these errors in another patch.

Tested by running MAKEALL for ARM8 targets and ensuring there were no new
errors or warnings.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-11-04 14:02:49 +09:00
Minkyu Kang
0bf7de8380 Merge branch 'master' of git://git.denx.de/u-boot-arm
Conflicts:

	board/eukrea/cpu9260/cpu9260.c
	drivers/serial/serial_s5pc1xx.c
	include/asm-arm/arch-s5pc1xx/clock.h
	include/asm-arm/arch-s5pc1xx/gpio.h
	include/asm-arm/arch-s5pc1xx/pwm.h
	include/asm-arm/arch-s5pc1xx/uart.h
	include/configs/cpu9260.h
	include/configs/cpuat91.h
	include/configs/davinci_dm355evm.h
	include/linux/mtd/samsung_onenand.h
2009-10-30 12:14:40 +09:00
Minkyu Kang
d43bc3d2d0 Merge branch 'master' of git://git.denx.de/u-boot-arm 2009-10-12 14:40:42 +09:00
kevin.morfitt@fearnside-systems.co.uk
bb3f0539fa Clean-up of s3c24x0 nand driver
This patch re-formats the arm920t s3c24x0 nand driver in preparation for changes
to add support for the Embest SBC2440-II Board.

The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports

It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
 - patches 1/4, 2/4 and 3/4 of this series

Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-10-12 12:19:41 +09:00
kevin.morfitt@fearnside-systems.co.uk
d46879d8b5 Clean-up of s3c24x0 drivers excluding nand driver
This patch re-formats the arm920t s3c24x0 driver files, excluding the nand
driver, in preparation for changes to add support for the Embest SBC2440-II Board.

The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
  non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports

It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patches 1/4 and 2/4 of this series

Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-10-12 12:19:39 +09:00
kevin.morfitt@fearnside-systems.co.uk
6cbfd59758 Clean-up of s3c24x0 header files
This patch re-formats the arm920t s3c24x0 header files in preparation for
changes to add support for the Embest SBC2440-II Board.

The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports

It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
- patch 1/4 of this series

Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-10-12 12:19:37 +09:00
kevin.morfitt@fearnside-systems.co.uk
4d68feb926 Clean-up of cpu_arm920t and cpu_arm920t_s3c24x0 code
This patch re-formats the code in cpu/arm920t and cpu/arm920t/23c24x0 in
preparation for changes to add support for the Embest SBC2440-II Board.

The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
  non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports

It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009

Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, ran MAKEALL for all ARM9 targets and no
new warnings or errors were found.

Signed-off-by: Kevin Morfitt <kevin.morfitt@fearnside-systems.co.uk>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-10-12 12:19:28 +09:00
kevin.morfitt@fearnside-systems.co.uk
bda33be61f CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards
This sets CONFIG_SYS_HZ to 1000 for all boards that use the s3c2400 and
s3c2410 cpu's which fixes various problems such as the timeouts in tftp being
too short.

Tested on an Embest SBC2440-II Board with local u-boot patches as I don't
have any s3c2400 or s3c2410 boards but need this patch applying before I can
submit patches for the SBC2440-II Board. Also, ran MAKEALL for all ARM9 targets
and no new warnings or errors were found.

It was originally submitted on 21/06/2009 but didn't get into the 2009.08
release, and Jean-Pierre made one comment on the original patch (see
http://lists.denx.de/pipermail/u-boot/2009-July/055470.html). I've made two
changes to the original patch:
- it's been re-based to the current release
- I've re-named get_timer_raw() to get_ticks() in response to Jean-Pierre's comment

This affects the sbc2410, smdk2400, smdk2410 and trab boards. I've copied it
directly to the maintainers of all except the sbc2410 which doesn't have an
entry in MAINTAINERS.

Signed-off-by: Kevin Morfitt <kmorfitt@aselaptop-1.localdomain>
Tested-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-10-09 14:33:50 +09:00
Minkyu Kang
c0a1dfdec2 s5pc1xx: add support SMDKC100 board
Adds new board SMDKC100 that uses s5pc100 SoC

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
2009-10-09 10:53:23 +09:00
Minkyu Kang
7074635021 s5pc1xx: support serial driver
This patch includes the serial driver for s5pc1xx.
s5pc1xx uart driver needs own register setting and clock configuration.
So, need to special driver.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2009-10-09 10:51:47 +09:00
Minkyu Kang
4125a8d52e s5pc1xx: support onenand driver
This patch includes the onenand driver for s5pc100

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
2009-10-09 10:50:40 +09:00
Minkyu Kang
c3f0a0ec9d s5pc1xx: support Samsung s5pc1xx SoC
This patch adds support for the Samsung s5pc100 and s5pc110
SoCs. The s5pc1xx SoC is an ARM Cortex A8 processor.

Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Signed-off-by: HeungJun, Kim <riverful.kim@samsung.com>
2009-10-09 09:31:50 +09:00
Tom Rix
617da90c1d Merge branch 't-next-marvell' into t-next-at91 2009-10-04 16:57:09 -05:00
Daniel Gorsulowski
25823ac4c4 at91: Update MEESC board support
This patch implements several updates:
-disable CONFIG_ENV_OVERWRITE
-add new hardware style variants and set the arch numbers appropriate
-pass the serial# and hardware revision to the kernel
-removed unused macros from include/configs/meesc.h
-fixed multiline comment style

Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
2009-10-04 14:56:13 -05:00
Simon Kagstrom
dca0d1ee73 arm: Correct build with CONFIG_SYS_HUSH_PARSER set
FLAG_PARSE_SEMICOLON is not defined without hush.h, so include that.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-10-04 12:25:03 -05:00
Olof Johansson
2f3b6ef2fe TI: OMAP3: Overo Tobi ethernet support
Add setup for ethernet on Tobi, allowing kernel/ramdisk to be loaded
over tftp.

This also refactors the smc911x driver to allow for detecting when the
chip is missing. I.e. the detect_chip() function is called earlier and
will abort gracefully when the Chip ID read returns all 1's.

Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
2009-10-04 10:51:32 -05:00
Olof Johansson
4eb3af0782 SMC911X: Add chip auto detection
Refactor the smc911x driver to allow for detecting when the chip is missing.
I.e. the detect_chip() function is called earlier and will abort gracefully
when the Chip ID read returns all 1's.

Signed-off-by: Olof Johansson <olof@lixom.net>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
Acked-by: Ben Warren <biggerbadderben@gmail.com>
2009-10-04 10:51:31 -05:00
Tom Rix
54737ba17a TI OMAP3 Use arm init sequence to initialize i2c
This changes fixes an early i2c error.

It appears that I2C is working because once a read or write
error is detected, the omap24xx_i2c driver calls i2c_init
inside its error handling check.

While it is ok to attempt error handling this way, the boards
must not depend on this side effect to initialize it's i2c.

Instead of explicitly calling i2c_init for every board, use
the generic arm initialization in lib_arm/board.c. By defining
the config variable CONFIG_HARD_I2C, the omap3 i2c initialization
is included in the init_sequence table.

Run tested on Beagle.
Compile tested on the omap3's

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
Acked-by: Dirk Behme <dirk.behme@googlemail.com>
2009-10-04 10:51:31 -05:00
Sandeep Paulraj
67c3d9fb36 TI: DaVinci DM365: Enabling network Support on DM365 EVM
This patch enables EMAC on the DM365 EVM.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-04 10:51:31 -05:00
Sandeep Paulraj
67682a3890 TI: DaVinci: GPIO header file and definitions
Some DaVinci SOC's use GPIOs to enable EMAC and DM9000.
This patch adds some definitions for GPIO registers and also adds
structures for GPIO.
A separate header file is being added so that in future we
can have a DaVinci GPIO driver similer to OMAP.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-04 10:51:31 -05:00
Sandeep Paulraj
6824fda182 TI: DaVinci DM646x: Update flag used to represent DM646x SOC's
In the DaVinci specific code, we use both CONFIG_SOC_DM646X and
CONFIG_SOC_DM646x to represent DM646x specific code.
This patch changes occurrences of CONFIG_SOC_DM646x to
CONFIG_SOC_DM646X. This is because for DM644x series of SOCs we use
the flag CONFIG_SOC_DM644X. We want some uniformity.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-04 10:51:31 -05:00
Olof Johansson
3d6436abc3 OMAP3: Clean up whitespace in mux configs
Switch from space-based indentation to tab-based in mux configs, as pointed
out by WD at:

http://lists.denx.de/pipermail/u-boot/2009-September/061241.html

Nothing but whitespace changes in this patch (diff -w gives no output).

Signed-off-by: Olof Johansson <olof@lixom.net>
2009-10-04 10:51:30 -05:00
Dirk Behme
b3ff5667c7 OMAP3 MMC: Fix warning dereferencing type-punned pointer
Fix warning
Dereferencing type-punned pointer will break strict-aliasing rules

Signed-off-by: Dirk Behme <dirk.behme@googlemail.com>
CC: Steve Sakoman <sakoman@gmail.com>
Acked-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-04 10:51:30 -05:00
Tom Rix
4d6c2dd7ed Merge branch 'arm/master' into arm/next
Conflicts:
	board/AtmarkTechno/suzaku/Makefile
	board/amcc/acadia/acadia.c
	board/amcc/katmai/katmai.c
	board/amcc/luan/luan.c
	board/amcc/ocotea/ocotea.c
	board/cm-bf537u/Makefile
	board/cray/L1/L1.c
	board/csb272/csb272.c
	board/csb472/csb472.c
	board/eric/eric.c
	board/eric/init.S
	board/eukrea/cpuat91/Makefile
	board/exbitgen/exbitgen.c
	board/exbitgen/init.S
	board/freescale/mpc8536ds/config.mk
	board/g2000/g2000.c
	board/jse/sdram.c
	board/mpl/mip405/mip405.c
	board/mpl/pip405/pip405.c
	board/netstal/hcu5/hcu5.c
	board/netstal/mcu25/mcu25.c
	board/sc3/sc3.c
	board/w7o/init.S
	board/w7o/w7o.c
	common/cmd_reginfo.c
	cpu/ppc4xx/40x_spd_sdram.c
	cpu/ppc4xx/44x_spd_ddr.c
	doc/README.sbc8548
	drivers/misc/fsl_law.c
	fs/ubifs/ubifs.c
	include/asm-ppc/immap_85xx.h

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-04 05:40:07 -05:00
Simon Kagstrom
300d113716 Support for the OpenRD base board
The implementation is borrowed from the sheevaplug board and the Marvell
1.1.4 code. Unsupported (or untested) is the SD card, PCIe and SATA.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-10-03 09:04:41 -05:00
Prafulla Wadaskar
2f8ccccf2b Kirkwood: mv88f6281gtw_ge: Add kwbimage build support
This patch adds kwbimage configuration file
(used by mkimage utility)
to support u-boot.kwb target on mv88f6281gtw_ge board.

To create Kirkwood boot image to be flashed on SPI Flash,
additional parameter u-boot.kwb need to be passed during make.

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-10-03 09:04:41 -05:00
Prafulla Wadaskar
0fe47c941d Kirkwood: rd6281a: Add kwbimage build support
This patch adds kwbimage configuration file
(used by mkimage utility)
to support u-boot.kwb target on rd6281a platform.

To create Kirkwood boot image to be flashed on NAND,
additional parameter u-boot.kwb need to be passed during make.

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-10-03 09:04:41 -05:00
Tom Rix
ef115a52b5 Add support for Eukrea CPU9260/CPU9G20 SBC
these boards are built around Atmel's AT91SAM9260/9G20 and have
up to 64MB of NOR flash, up to 128MB of SDRAM, up to 2GB of NAND
and include a 10/100 Ethernet PHY in RMII mode.

Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-03 09:04:41 -05:00
Tom Rix
6dceeaa679 Add support for Eukrea CPUAT91 SBC
CPUAT91 is built around Atmel's AT91RM9200 and has up to 16MB of NOR
flash, up to 128MB of SDRAM, and includes a Micrel KS8721 PHY in RMII
mode.

Signed-off-by: Eric Benard <eric@eukrea.com>
Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-10-03 09:04:41 -05:00
Wolfgang Denk
203e6fb2da mpc5121ads: fix breakage introduced when reordering elpida_mddrc_config[]
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:40 -05:00
Heiko Schocher
b393a8951c mucmc52, uc101: delete ata@3a00 node, if no CF card is detected
U-Boot can detect if an IDE device is present or not.
If not, and this new config option is activated, U-Boot
removes the ATA node from the DTS before booting Linux,
so the Linux IDE driver does not probe the device and
crash. This is needed for buggy hardware (uc101) where
no pull down resistor is connected to the signal IDE5V_DD7.

Signed-off-by: Heiko Schocher <hs@denx.de>
2009-10-03 09:04:40 -05:00
Heiko Schocher
9e3f6f359b mpc5200, mucmc52, uc101: config cleanup
- As these boards are similiar, collect common config options
  in manroland/common.h and manroland/mpc52xx-common.h
  for mpc5200 specific common options for this manufacturer.
- add OF support
- update default environment

Signed-off-by: Heiko Schocher <hs@denx.de>

Minor edit of commit message.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:40 -05:00
Wolfgang Denk
94731e41b6 Fix "ppc/85xx: Clean up use of LAWAR defines" breakage
Commit 002741ae86 modified include/asm-ppc/mmu.h such that the LAWAR_
defines were only enabled for the 83xx platform, but they are also
needed on MPC512x system. Enabling these for E300 systems seems thus
more appropriate.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:40 -05:00
Martha M Stan
c8ca0bc6a7 Add Elpida Memory Configuration to mpc5121ads Boards
Signed-off-by: Martha M Stan <mmarx@silicontkx.com>

Minor coding style cleanup.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:40 -05:00
Martha M Stan
5313e0959a mpc512x: Streamlined fixed_sdram() init sequence.
Signed-off-by: Martha M Stan <mmarx@silicontkx.com>

Minor cleanup:

Re-ordered default_mddrc_config[] to have matching indices.

This allows to use the same index "N" for source and target fields;
before, we had code like this

	out_be32(&im->mddrc.ddr_time_config2, mddrc_config[3]);

which always looked like a copy & paste error because 2 != 3.

Also, use NULL when meaning a null pointer.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:39 -05:00
Kumar Gala
4dea2bbc70 ppc/p4080: Determine various chip frequencies on CoreNet platforms
The means to determine the core, bus, and DDR frequencies are completely
new on CoreNet style platforms.  Additionally on p4080 we can have
different frequencies for FMAN and PME IP blocks.  We need to keep track
of the FMAN & PME frequencies since they are used for time stamping
capabilities inside each block.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:39 -05:00
Kumar Gala
7f0b16fba4 ppc/p4080: Handle timebase enabling and frequency reporting
On CoreNet style platforms the timebase frequency is the bus frequency
defined by 16 (on PQ3 it is divide by 8).  Also on the CoreNet platforms
the core not longer controls the enabling of the timebase.  We now need
to enable the boot core's timebase via CCSR register writes.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:39 -05:00
Kumar Gala
345fb36a2c ppc/p4080: Add various p4080 related defines (and p4040)
There are various locations that we have chip specific info:

* Makefile for which ddr code to build
* Added p4080 & p4040 to cpu_type_list and SVR list
* Added number of LAWs for p4080
* Set CONFIG_MAX_CPUS to 8 for p4080

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:39 -05:00
Kumar Gala
2154836f4d ppc/p4080: CoreNet platfrom style secondary core release
The CoreNet platform style of bringing secondary cores out of reset is
a bit different that the PQ3 style.  Mostly the registers that we use
to setup boot translation, enable time bases, and boot release the cores
have moved around.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:39 -05:00
Kumar Gala
17e4eeb650 ppc/p4080: CoreNet platfrom style CCSRBAR setting
On CoreNet based platforms the CCSRBAR address is split between an high &
low register and we no longer shift the address.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-10-03 09:04:39 -05:00
Kumar Gala
161df9705f ppc/p4080: Add support for CoreNet style platform LAWs
On CoreNet based platforms the LAW address is split between an high &
low register and we no longer shift the address.  Also, the target IDs
on CoreNet platforms have been completely re-assigned.

Additionally, added a new find_law() API to which LAW an address hits in.
This is need for the CoreNet style boot release code since it will need
to determine what the target ID should be set to for boot window
translation.

Finally, enamed LAWAR_EN to LAW_EN and moved to header so we can use
it elsewhere.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:38 -05:00
Kumar Gala
2064afed5f ppc/p4080: Add p4080 platform immap definitions
The p4080 SoC has a significant amount of commonality with the 85xx/PQ3
platform.  We reuse the 85xx immap and just add new definitions for
local access and global utils.  The global utils is now broken into
global utils, clocking and run control/power management.

The offsets from CCSR for a number of blocks have also changed.  We
introduce the CONFIG_FSL_CORENET define to distinquish the PQ3 style of
platform from the new p4080 platform.  We don't use QoirQ as there are
products (like p2020) that are PQ3 based platforms but have the QoirQ
name.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:38 -05:00
Kumar Gala
fd8dfa17e9 ppc/85xx: Fix enabling of L2 cache
We need to flash invalidate the locks in addition to the cache
before we enable.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:38 -05:00
Vivek Mahajan
b5190df365 85xx-fdt: Fixed l2-ctlr's compatible prop for QorIQ
The code assumed names where just numbers and always prefixed 'mpc'.
However newer QorIQ don't follow the mpc naming scheme.

Signed-off-by: Vivek Mahajan <vivek.mahajan@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:38 -05:00
Mingkai Hu
2db3602fad ppc/85xx: add cpu init config file for boot from NAND
When boot from NAND, the NAND flash must be connected to br/or0.
Also init RAM(L2 SRAM or DDR SDRAM) for load the second image to
it.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:38 -05:00
Mingkai Hu
27f4ddfbf3 immap_85xx: add porpllsr's plat ratio definition
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:37 -05:00
Mingkai Hu
98305c0764 ppc/85xx: add ld script file for boot from NAND
The first stage 4K image uses a seperate ld script file to
generate 4K image. This patch moves it to the cpu/mpc85xx/*
to make it avaliable for 85xx platform.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:37 -05:00
Peter Tyser
34781717c0 mpc8610hpcd: Use common 86xx fdt fixup code
Using the common 86xx fdt fixups removes some board-specific code and
should make the mpc8610hpcd easier to maintain in the long run.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:37 -05:00
Paul Gortmaker
7638da667e sbc85x0: tidy up Makefile to use new configuration script.
Commit 804d83a5 allows us to move all the configuration
variation tweaks out of the top level Makefile and down
into the boards config header.  This takes advantage of
that for the sbc8540/sbc8560 boards.

There were a couple of cheezy comments pointing at incorrect
files, or files that don't exist, so I've cleaned those up too.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:37 -05:00
Paul Gortmaker
510edfca28 sbc8548: allow enabling PCI via a make config option
Prior to this commit, to enable PCI, you had to go manually
edit the board config header, and if you had 33MHz PCI, you
had to manually change CONFIG_SYS_NS16550_CLK too, which was
not real user friendly,

This adds the typical PCI and clock speed make targets to the
toplevel Makefile in accordance with what is being done with
other boards (i.e. using the "-t" to mkconfig).

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:37 -05:00
Paul Gortmaker
589a100620 sbc8548: update PCI/PCI-e support code
The PCI/PCI-e support for the sbc8548 was based on an earlier
version of what the MPC8548CDS board was using, and in its
current state it won't even compile.  This re-syncs it to match
the latest codebase and makes use of the new shared PCI functions
to reduce board duplication.

It borrows from the MPC8568MDS, in that it pulls the PCI-e I/O
back to 0xe280_0000 (where PCI2 would be on MPC8548CDS), and
similarly it coalesces the PCI and PCI-e mem into one single TLB.

Both PCI-x and PCI-e have been tested with intel e1000 cards
under linux (with an accompanying dts change in place)

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:37 -05:00
Paul Gortmaker
3d97b5e78f fsl_pci: create a SET_STD_PCI_INFO() helper wrapper
Recycle the recently added PCI-e wrapper used to reduce board
duplication of code by creating a similar version for plain PCI.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:36 -05:00
Paul Gortmaker
02af821c11 sbc8548: correct local bus SDRAM size from 64M to 128M
The size of the LB SDRAM on this board is 128MB, spanning CS3
and CS4.  It was previously only being configured for 64MB on
CS3, since that was what the original codebase of the MPC8548CDS
had.  In addition to setting up BR4/OR4, this also adds the TLB
entry for the second half of the SDRAM.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:36 -05:00
Paul Gortmaker
89ff5dbc03 sbc8548: use I/O accessors
Sweep throught the board specific file and replace the various
register proddings with the equivalent I/O accessors.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:36 -05:00
Paul Gortmaker
8b23b608fd sbc8548: remove eTSEC3/4 voltage hack
With only eTSEC1 and 2 being brought out to RJ-45 connectors, we
aren't interested in the eTSEC3/4 voltage hack on this board

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:36 -05:00
Paul Gortmaker
124b0214a1 sbc8548: enable access to second bank of flash
The sbc8548 has a 64MB SODIMM flash module off of CS6 that
previously wasn't enumerated by u-boot.  There were already
BR6/OR6 settings for it [used by cpu_init_f()] but there
was no TLB entry and it wasn't in the list of flash banks
reported to u-boot.

The location of the 64MB flash is "pulled back" 8MB from
a 64MB boundary, in order to allow address space for the
8MB boot flash that is at the end of 32 bit address space.
This means creating two 4MB TLB entries for the 8MB chunk,
and then expanding the original boot flash entry to 64MB
in order to cover the 8MB boot flash and the remainder
(56MB) of the user flash.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:36 -05:00
Paul Gortmaker
9b5cee4344 sbc8548: cosmetic line re-wrap
Fix the extra long lines to be consistent with u-boot coding style.
No functional change here.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
2009-10-03 09:04:36 -05:00
Paul Gortmaker
686d635d45 sbc8548: get_clock_freq is not valid for this board
The get_clock_freq() comes from freescale/common/cadmus.c and is
only valid for the CDS based 85xx reference platforms.  It would
be nice if we could read the 33 vs. 66MHz status somehow, but in
the meantime, tie it to CONFIG_SYS_CLK_FREQ like all the other
non-CDS boards do.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:35 -05:00
Paul Gortmaker
afb75eb416 sbc8548: delete unused MPC8548CDS info carried over from port
There are a couple defines and PCI bridge quirks related to the PCI
backplane of the MPC8548CDS that have no meaning in the context of
the port to the sbc8548 board, so delete them.

Also, the form factor of the sbc8548 is a standalone board with a
single PCI-X and a single PCI-e slot.  That pretty much guarantees
that it will never be a PCI agent itself, so the host/agent and root
complex/end node distinctions have been removed.

Similarly, since there is no physical connector mapping to PCI2, so
all references of PCI2 in the board support files have been removed
as well.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:35 -05:00
Paul Gortmaker
e5e7819f9f sbc8548: enable use of PCI network cards
Create a board_eth_init to allow a place to hook in
the PCI ethernet init after all the eTSEC are up
and configured.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:35 -05:00
Poonam Aggrwal
bdc810a771 ppc/85xx: 32bit DDR changes for P1020/P1011
The P1020/P1011 SOCs support max 32bit DDR width as opposed to P2020/P2010
where max DDR data width supported is 64bit.

As a next step the DDR data width initialization would be made more dynamic
with more flexibility from the board perspective and user choice.
Going forward we would also remove the hardcodings for platforms with onboard
memories and try to use the FSL SPD code for DDR initialization.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:35 -05:00
Paul Gortmaker
36e71c0756 sbc8548: replace README with completely new document
The previous README.sbc8548 was pretty much content-free. Replace
it with something that actually gives the end user some relevant
hardware details, and also lists the u-boot configuration choices.

Also in the cosmetic department, fix the bogus line in the Makefile
that was carried over from the SBC8560 Makefile, and the typo in
the sbc8548.c copyright.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:35 -05:00
Kumar Gala
12a5c0c276 ppc/85xx: Clean up use of LAWAR defines
On 85xx platforms we shouldn't be using any LAWAR_* defines
but using the LAW_* ones provided by fsl-law.h.  Rename any such
uses and limit the LAWAR_ to the 83xx platform as the only user so
we will get compile errors in the future.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:34 -05:00
Kumar Gala
ed18c1913b ppc/85xx: Clean up mpc8572DS PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:34 -05:00
Kumar Gala
aaf38ec306 ppc/85xx: Clean up p2020ds PCI setup code
Use new fsl_pci_init_port() that reduces amount of duplicated code in the
board ports, use IO accessors and clean up printing of status info.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:34 -05:00
Kumar Gala
2350cdb50e ppc/85xx: Clean up p1_p2_rdb PCI setup
General code cleanup to use in/out IO accessors as well as making
the code that prints out info sane between board and generic fsl pci
code.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:34 -05:00
Kumar Gala
276e3f2094 ppc/85xx: Simplify the top makefile for P1_P2_RDB boards
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:34 -05:00
Kumar Gala
2ca16b3309 ppc/85xx: Simplify the top makefile for 36-bit config for P2020DS
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:34 -05:00
Kumar Gala
0a83c73c95 ppc/85xx: Simplify the top makefile for 36-bit config for MPC8572DS
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:33 -05:00
Mingkai Hu
886fadd88a ppc/85xx: simplify the top makefile for 36-bit config for mpc8536ds
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:33 -05:00
Kumar Gala
68f9c1e754 ppc/85xx: Fix LCRR_CLKDIV defines
For some reason the CLKDIV field varies between SoC in how it interprets
the bit values.

All 83xx and early (e500v1) PQ3 devices support:
 clk/2: CLKDIV = 2
 clk/4: CLKDIV = 4
 clk/8: CLKDIV = 8

Newer PQ3 (e500v2) and MPC86xx support:
 clk/4: CLKDIV = 2
 clk/8: CLKDIV = 4
 clk/16: CLKDIV = 8

Ensure that the MPC86xx and MPC85xx still get the same behavior and make
the defines reflect their logical view (not the value of the field).

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 09:04:33 -05:00
Peter Tyser
d4b5d60d2a MAKEALL: Use POSIX math
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 09:04:33 -05:00
Peter Tyser
e6fb20a939 MAKEALL: Add summary information
This change adds some basic summary information to the MAKEALL script.
The summary information includes how many boards were compiled, how many
boards had compile warnings or errors, and which specific boards had
compile warnings or errors.

This information is useful when doing compile testing to quickly
determine which boards are broken.

As a side benefit, no empty $BOARD.ERR files are generated by MAKEALL.
Previously, each board had a corresponding $BOARD.ERR file, even if the
board compiled cleanly.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 09:04:33 -05:00
Eric Millbrandt
bd4bca87f1 galaxy5200: enable version environment variable
Add version environment variable configuration to the galaxy5200
board header file.

Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>

Edited commit message.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:32 -05:00
Werner Pfister
152d99f004 digsy_mtc: Add TCR register value for RTC (DS1339)
Signed-off-by: Werner Pfister <werner.pfister@intercontrol.de>
Signed-off-by: Detlev Zundel <dzu@denx.de>
2009-10-03 09:04:32 -05:00
Werner Pfister
6b0b181afd rtc/ds1337.c: Allow to set TCR register
This is needed to correctly start the charging of an attached capacitor
or battery.

Signed-off-by: Werner Pfister <werner.pfister@intercontrol.de>
Signed-off-by: Detlev Zundel <dzu@denx.de>
2009-10-03 09:04:32 -05:00
Simon Kagstrom
3998c62df0 ubifs: Add support for looking up directory and relative symlinks
This patch adds support for resolving symlinks to directories as well as
relative symlinks. Symlinks are now always resolved during file lookup,
so the load stage no longer needs to special-case them.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:32 -05:00
Rupjyoti Sarmah
9efeadc06f ppc4xx: Fix PCIE PLL lock on 440SPe Yucca board
u-boot reports a PCIE PLL lock error at boot time on Yucca board, and
left PCIe nonfunctional. This is fixed by making u-boot function
ppc4xx_init_pcie() to wait 300 uS after negating reset before the
first check of the PLL lock.

Signed-off-by: Rupjyoti Sarmah <rsarmah@amcc.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:32 -05:00
Dirk Eibach
6d7e3229bb ppc4xx: Make DDR2 timing for intip more robust
DDR2 timing for intip was on the edge for some of the available chips
for this board. Now it is verfied to work with all of them.

Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:32 -05:00
Wolfgang Denk
7893d47194 board/linkstation/ide.c: Fix compile warning
Fix warning: ide.c:60: warning: dereferencing type-punned pointer will
break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Guennadi Liakhovetski <lg@denx.de>
2009-10-03 09:04:31 -05:00
Peter Tyser
81e60235bd ppc: Clean up calling of phy_reset() during init
Remove board-specific #ifdefs for calling phy_reset() during
initializtion

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 09:04:31 -05:00
Peter Tyser
b3ab9dfd49 ppc: Clean up calling of misc_init_r() during init
Remove board-specific #ifdefs for calling misc_init_r() during
initializtion

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Heiko Schocher <hs@denx.de>
2009-10-03 09:04:31 -05:00
Peter Tyser
61c83b7bd2 Remove deprecated 'autoscr' command/variables
The more standard 'source' command provides identical functionality to
the autoscr command.

Environment variable names/values on the MVBC_P, MVBML7, kmeter1,
mgcoge, and km8xx boards are updated to no longer refernce 'autoscr'.

The 'autoscript' and 'autoscript_uname' environment variables are
also removed.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
Acked-by: Heiko Schocher <hs@denx.de>
2009-10-03 09:04:31 -05:00
Paul Gibson
6098527186 mpc512x. Micron nand flash needs a reset before a read command is issued.
Micron nand flash needs a reset before a read command is issued.
The current mpc5121_nfc driver ignores the reset command.
2009-10-03 09:04:31 -05:00
Marcel Ziswiler
86f6fc330d FDT: remove obsolete OF_CPU and OF_SOC macros.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
Acked-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2009-10-03 09:04:30 -05:00
Sandeep Paulraj
dcefd82cbc TI: DaVinci DM365: Minor config cleanup
The DM365 config was using the 'CONFIG_CMD_SAVEENV' flag.
This is already included when we include the
config_cmd_default.h header file. So this flag is removed.
Also another flag to enable NAND functions was being
enabled incorrectly.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-10-03 09:04:30 -05:00
Sandeep Paulraj
745047f534 TI DaVinci DM365: Removing header file which does not exist
The DaVinci DM365 EVM board specific code was including a header file
which does not exist. So removing this header file.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-10-03 09:04:30 -05:00
Sandeep Paulraj
b741868f04 TI DaVinci: DM355: Config Cleanup and Update
This patch does the following
1) Enables the NAND driver which is now available.
2) Enables the 'CONFIG_MTD_DEVICE' as without this the
compilation will fail
3) We now have a safe place to store environment and defines
an offset where this can be stored. This offset value is such that it is after
the location where U-Boot is flashed using TI flash utilities.
4) Enables Bootdelay
5) Increases malloc() arena size. Manufacturers are coming out with
NAND with large blocks sizes of upto 1 MiB. It has been noticed that
as the block size of the NAND used is increased, if this particular
value is not increased, the NAND driver will output out of memory
errors.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-10-03 09:04:30 -05:00
Wolfgang Denk
d4a1561a84 board/flagadm/flash.c: fix compile warning
Fix warning: flash.c:531: warning: dereferencing type-punned pointer
will break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Kri Davsson <kd@flaga.is>
2009-10-03 09:04:30 -05:00
Simon Kagstrom
ef6061e49b Correct ffs/fls regression for PowerPC etc
Commits

  02f99901ed
  52d61227b6

introduced a regression where platform-specific ffs/fls implementations
were defined away. This patch corrects that by using PLATFORM_xxx
instead of the name itself.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:30 -05:00
Stefan Roese
012f51e7c1 ppc4xx: Consolidate get_OPB_freq()
All 4xx variants had their own, mostly identical get_OPB_freq()
function. Some variants even only had the OPB frequency calculated
in this routine and not supplied the sys_info.freqOPB variable
correctly (e.g. 405EZ). This resulted in incorrect OPB values passed
via the FDT to Linux.

This patch now removes all those copies and only uses one function
for all 4xx variants (except for IOP480 which doesn't have an OPB).

Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:29 -05:00
Stefan Roese
dc69d41571 ppc4xx: Enable commands for FDT enabled Linux booting on AMCC Acadia
Acadia still used the "old" arch/ppc bootm commands for booting
Linux images without FDT. This patch now enables these fdt-aware
boot commands for Acadia as well.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:29 -05:00
Stefan Roese
bda4dece03 ppc4xx: Fix 405EZ uart base baud calculation
With this fix, Linux correctly configures the baudrate when booting
with FDT passed from U-Boot to Linux.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:29 -05:00
Kumar Gala
f8d7b56e00 ppc/85xx: Disable all async interrupt sources when we boot
We should make sure to clear MSR[ME, CE, DE] when we boot an OS image
since we have changed the exception vectors and the OSes vectors might
not be setup we should avoid async interrupts at all costs.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:29 -05:00
Kumar Gala
002ebefddc ppc/85xx: Split out cpu_init_early into its own file for NAND_SPL
By pulling out cpu_init_early we can build just it and not all of
cpu_init for NAND_SPL.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:29 -05:00
Kumar Gala
168f7cfe56 ppc/85xx: Change cpu_init_early_f so we can use with NAND SPL
Use write_tlb and don't use memset so we can use the same code for
cpu_init_early_f between NAND SPL and not.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:28 -05:00
Mingkai Hu
a87426e6dc NAND boot: change NAND loader's relocate SP to CONFIG param
So that we can set the NAND loader's relocate stack pointer
to the value other than the relocate address + 0x10000.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:28 -05:00
Mingkai Hu
9f3243612c ppc/85xx: add boot from NAND/eSDHC/eSPI support
The MPC8536E is capable of booting form NAND/eSDHC/eSPI, this patch
implements these three bootup methods in a unified way - all of these
use the general cpu/mpc85xx/start.S, and load the main image to L2SRAM
which lets us use the SPD to initialize the SDRAM.

For all three bootup methods, the bootup process can be divided into two
stages: the first stage will initialize the corresponding controller,
configure the L2SRAM, then copy the second stage image to L2SRAM and
jump to it. The second stage image is just like the general U-Boot image
to configure all the hardware and boot up to U-Boot command line.

When boot from NAND, the eLBC controller will first load the first stage
image to internal 4K RAM buffer because it's also stored on the NAND
flash. The first stage image, also call 4K NAND loader, will initialize
the L2SRAM, load the second stage image to L2SRAM and jump to it. The 4K
NAND loader's code comes from the corresponding nand_spl directory, along
with the code twisted by CONFIG_NAND_SPL.

When boot from eSDHC/eSPI, there's no such a first stage image because
the CPU ROM code does the same work. It will initialize the L2SRAM
according to the config addr/word pairs on the fixed address and
initialize the eSDHC/eSPI controller, then load the second stage image
to L2SRAM and jump to it.

The macro CONFIG_SYS_RAMBOOT is used to control the code to produce the
second stage image for all different bootup methods. It's set in the
board config file when one of the bootup methods above is selected.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:28 -05:00
Kumar Gala
8d82308305 ppc/85xx: Move code around to prep for NAND_SPL
If we move some of the functions in tlb.c around we need less
ifdefs.  The first stage loader just needs invalidate_tlb and
init_tlbs.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:28 -05:00
Kumar Gala
b855dc47de ppc/85xx: Repack tlb_table to save space
We can pack the initial tlb_table in MAS register format and use
write_tlb to set things up.  This savings can be helpful for NAND
style first stage boot loaders.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:28 -05:00
Kumar Gala
ccea800346 ppc/85xx: Introduce low level write_tlb function
Factor out the code we use to actually write a tlb entry.

set_tlb is a logical view of the TLB while write_tlb is a low level
matching the MAS registers.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:28 -05:00
Roy Zang
0fb37e5733 ppc/85xx: Enable usb ehci support for p2020ds board
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:27 -05:00
Kumar Gala
6690dcc173 ppc/8xxx: Misc DDR related fixes
* Fix setting of ESDMODE (MR1) register - the bit shifting was wrong
* Fix the format string to match size in a debug print

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:27 -05:00
Scott Wood
f761439418 ppc/85xx: Remove some bogus code from external interrupt handler.
Skipping the interrupted instruction will accomplish nothing other
than turning a spurious interrupt into a crash.

External interrupts are not machine checks, so don't count them as such.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-10-03 09:04:27 -05:00
Scott Wood
eea886da9a ppc/85xx: Ensure that MAS8 is zero when writing TLB entries.
Its reset value is random, and we sometimes read uninitialized TLB
arrays.  Make sure that we don't retain MAS8 from reading such an entry
if the VF bit in MAS8 is set, attempts to use the mapping will trap.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-10-03 09:04:27 -05:00
Scott Wood
3477bda1f5 ppc/85xx: Don't enable interrupts before we're ready
We cannot handle any exceptions while running in AS1, as the exceptions
will transition back to AS0 without a valid mapping.

Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-10-03 09:04:27 -05:00
Marcel Ziswiler
fd5a6c07c9 mpc8260: remove Ethernet node fixup to use generic FDT code.
Remove Ethernet node fixup from mgcoge and muas3001 boards and modify its
configs for the common mpc8260 code to use generic Ethernet fixup.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
Tested-by: Heiko Schocher <hs@denx.de>
2009-10-03 09:04:26 -05:00
Mike Frysinger
c73fdc2f5d tools/netconsole: use ncb automatically if available
The standard netcat, while ubiquitous, doesn't handle broadcast udp packets
properly.  The local ncb util does however.  So if ncb can be located in
the standard locations, automatically use that instead.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:26 -05:00
Mike Frysinger
9914be9dee tools/netconsole: make a bit more robust
The netcat utility likes to exit when it receives an empty packet (as it
thinks this means EOF).  This can easily occur when working with command
line editing as this behavior will be triggered when using backspace.  Or
with tabs and command line completion.  So create two netcat processes -
one to only listen (and put it into a loop), and one to do the sending.
Once the user quits the transmitting netcat, the listening one will be
killed automatically.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:26 -05:00
Simon Kagstrom
85c735f9a5 arm: Define test_and_set_bit and test_and_clear bit for ARM
Needed for (e.g.) ubifs support to work.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-10-03 09:04:26 -05:00
Simon Kagstrom
c1d1bfa583 Define ffs/fls for all architectures
UBIFS requires fls(), which is not defined for arm (and some other
architectures) and this patch adds it. The implementation is taken from
Linux and is generic. ffs() is also defined for those that miss it.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-10-03 09:04:26 -05:00
Simon Kagstrom
f83ab09566 arm: Make arm bitops endianness-independent
Bring over the bitop implementations from the Linux
include/asm-generic/bitops/non-atomic.h to provide
endianness-independence.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-10-03 09:04:26 -05:00
Simon Kagstrom
ab32ffa1fd Move __set/clear_bit from ubifs.h to bitops.h
__set_bit and __clear_bit are defined in ubifs.h as well as in
asm/include/bitops.h for some architectures. This patch moves
the generic implementation to include/linux/bitops.h and uses
that unless it's defined by the architecture.

Signed-off-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2009-10-03 09:04:25 -05:00
Mike Frysinger
c0072e6cbe standalone: convert to kbuild style
Clean up the arch/cpu/board/config checks as well as redundant setting of
srec/bin variables by using the kbuild VAR-$(...) style.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:25 -05:00
Wolfgang Denk
3c0dbdbd22 mkconfig: split the board make target to multiple config targets
To simplify the top level makefile it useful to be able to parse
the top level makefile target to multiple individual target, then
put them to the config.h, leave the board config file to handle
the different targets.

Note that this method uses the '_'(underline) as the delimiter when
splits the board make target.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>

This also reverts commit 511c02f611.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:25 -05:00
Wolfgang Denk
9ef45c847a kwbimage.c: Fix compile warning when building on 64 bit systems (again)
Commit 51003b89 attempted to fix a build problem on 64 bit systems,
but just turned it into a build problem on 32 bit systems (silly me).

Now do the Right Thing (TM) and use a "%zu" printf format.

Also fix spelling error.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:25 -05:00
Wolfgang Denk
d181074a58 board/amcc/common/flash.c: Fix compile warning
Fix warning: ../common/flash.c:917: warning: dereferencing type-punned
pointer will break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:25 -05:00
Wolfgang Denk
5b92558aaa board/amcc/yucca/flash.c: Fix compile warning
Fix warning: flash.c:919: warning: dereferencing type-punned pointer
will break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:25 -05:00
Wolfgang Denk
281c798c5a board/amcc/taihu/flash.c: Fix compile warning
Fix warnings:
flash.c: In function 'write_word_1':
flash.c:696: warning: dereferencing type-punned pointer will break strict-aliasing rules
flash.c: In function 'write_word_2':
flash.c:1044: warning: dereferencing type-punned pointer will break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:24 -05:00
Wolfgang Denk
2dce9d63b3 board/etin/debris/phantom.c: Fix compile error
Fix build problem caused by commit e84aba13: "Replace BCD2BIN and
BIN2BCD macros with inline functions"

phantom.c:163: error: redefinition of 'bcd2bin'
/home/wd/git/u-boot/work/include/bcd.h:16: error: previous definition of 'bcd2bin' was here
phantom.c:168: error: redefinition of 'bin2bcd'
/home/wd/git/u-boot/work/include/bcd.h:21: error: previous definition of 'bin2bcd' was here

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Sangmoon Kim <dogoil@etinsys.com>
2009-10-03 09:04:24 -05:00
Wolfgang Denk
da456b2718 board/dave/common/flash.c: fix compile warning
Fix warning: ../common/flash.c:668: warning: dereferencing type-punned
pointer will break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Andrea Marson <andrea.marson@dave-tech.it>
2009-10-03 09:04:24 -05:00
Wolfgang Denk
aa8a3446a8 board/esd/cpci750/ide.c: fix compile warning
Fix warning: ide.c:54: warning: dereferencing type-punned pointer will
break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:24 -05:00
Wolfgang Denk
85d4bb0e99 board/esd/common/flash.c: Fix compile warning
Fix warning: ../common/flash.c:635: warning: dereferencing type-punned
pointer will break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Acked-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:24 -05:00
Wolfgang Denk
cfdd4a8918 sk98lin: fix compile warnings
Fix warnings:
skge.c: In function 'BoardInitMem':
skge.c:1389: warning: dereferencing type-punned pointer will break strict-aliasing rules
skge.c:1390: warning: dereferencing type-punned pointer will break strict-aliasing rules
skge.c:1391: warning: dereferencing type-punned pointer will break strict-aliasing rules
skgesirq.c: In function 'SkGePortCheckUpXmac':
skgesirq.c:1301: warning: dereferencing type-punned pointer will break strict-aliasing rules
skgesirq.c:1301: warning: dereferencing type-punned pointer will break strict-aliasing rules
skgesirq.c:1398: warning: dereferencing type-punned pointer will break strict-aliasing rules
skgesirq.c:1398: warning: dereferencing type-punned pointer will break strict-aliasing rules
skrlmt.c: In function 'SkRlmtInit':
skrlmt.c:661: warning: dereferencing type-punned pointer will break strict-aliasing rules
skxmac2.c: In function 'SkMacPromiscMode':
skxmac2.c:753: warning: dereferencing type-punned pointer will break strict-aliasing rules
skxmac2.c:753: warning: dereferencing type-punned pointer will break strict-aliasing rules
skxmac2.c: In function 'SkMacHashing':
skxmac2.c:803: warning: dereferencing type-punned pointer will break strict-aliasing rules
skxmac2.c:803: warning: dereferencing type-punned pointer will break strict-aliasing rules
skxmac2.c: In function 'SkMacFlushTxFifo':
skxmac2.c:1115: warning: dereferencing type-punned pointer will break strict-aliasing rules
skxmac2.c:1115: warning: dereferencing type-punned pointer will break strict-aliasing rules
skxmac2.c: In function 'SkMacFlushRxFifo':
skxmac2.c:1145: warning: dereferencing type-punned pointer will break strict-aliasing rules
skxmac2.c:1145: warning: dereferencing type-punned pointer will break strict-aliasing rules
skxmac2.c: In function 'SkXmInitPauseMd':
skxmac2.c:1987: warning: dereferencing type-punned pointer will break strict-aliasing rules
skxmac2.c:1987: warning: dereferencing type-punned pointer will break strict-aliasing rules
skxmac2.c: In function 'SkXmOverflowStatus':
skxmac2.c:4236: warning: dereferencing type-punned pointer will break strict-aliasing rules
skxmac2.c:4236: warning: dereferencing type-punned pointer will break strict-aliasing rules
skxmac2.c:4242: warning: dereferencing type-punned pointer will break strict-aliasing rules
skxmac2.c:4242: warning: dereferencing type-punned pointer will break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
2009-10-03 09:04:23 -05:00
Wolfgang Denk
3e7ec96948 drivers/net/natsemi.c: fix compile warning
Fix warning: natsemi.c:757: warning: dereferencing type-punned pointer
will break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
2009-10-03 09:04:23 -05:00
Michal Simek
9300ab62d9 net: emaclite: Cleanup license to be GPL compatible
Signed-off-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-10-03 09:04:23 -05:00
Michal Simek
7de7b4c6e6 microblaze: Enable hush parser
With Hush parser is possible to change command line in dtb

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-10-03 09:04:23 -05:00
Michal Simek
4f18060640 microblaze: Remove AtmarkTechno Suzaku board
Users should use microblaze-generic platform.
This platform is longer not supported.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-10-03 09:04:23 -05:00
Michal Simek
d60166d86c net: Remove old Xilinx Emac driver
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-10-03 09:04:22 -05:00
Michal Simek
6f7fdb5fe9 microblaze: Short size of global data and fix malloc size
If is full malloc area global, data are rewrite because
there was bad size of malloc area.

Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-10-03 09:04:22 -05:00
Michal Simek
870aeda849 microblaze: Add sbss, scommon and COMMON symbols for clearing
Signed-off-by: Michal Simek <monstr@monstr.eu>
2009-10-03 09:04:22 -05:00
Dirk Eibach
ecdd98799f ppc4xx: Rename compactcenter to intip
Signed-off-by: Dirk Eibach <eibach@gdsys.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:22 -05:00
Stefan Roese
297a65873d ppc4xx: Big cleanup of PPC4xx defines
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:

- Change lower case defines to upper case (plb4_acr -> PLB4_ACR)
- Change the defines to better match the names from the
  user's manuals (e.g. cprpllc -> CPR0_PLLC)
- Removal of some unused defines

Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.

Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:22 -05:00
Wolfgang Denk
e35c73d7e1 net/bootp.c: fix compile warning
Fix warning: bootp.c:695: warning: dereferencing type-punned pointer
will break strict-aliasing rules

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Ben Warren <biggerbadderben@gmail.com>
2009-10-03 09:04:21 -05:00
Wolfgang Denk
fd37a0d04e kwbimage.c: Fix compile warning when building on 64 bit systems
Fix this warning when building on 64 bit systems:
tools/kwbimage.c: In function 'kwbimage_checksum32':
tools/kwbimage.c:135: warning: format '%d' expects type 'int',
but argument 4 has type 'long unsigned int'

Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
2009-10-03 09:04:21 -05:00
Marcel Ziswiler
4743f02b8f muas3001: remove BRG clock node fixup to use common mpc8260 code.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
Acked-by: Heiko Schocher <hs@denx.de>
2009-10-03 09:04:21 -05:00
Marcel Ziswiler
1612266711 r7780mp: fix typo in Ethernet chip model number comment.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
2009-10-03 09:04:21 -05:00
Marcel Ziswiler
9833951ff7 ep8248: add support for device tree and secondary Ethernet interface.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@noser.com>
2009-10-03 09:04:21 -05:00
Prafulla Wadaskar
36e0eb63e3 mkimage: Add Kirkwood Boot Image support (kwbimage)
This patch adds support for "kwbimage" (Kirkwood Boot Image)
image types to the mkimage code.

For details refer to docs/README.kwbimage

This patch is tested with Sheevaplug board

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Ron Lee <ron@debian.org>

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-10-03 09:04:20 -05:00
Prafulla Wadaskar
7e4985ff51 Kirkwood: Sheevaplug: Add kwimage configuration file
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-10-03 09:04:20 -05:00
Prafulla Wadaskar
060c495f9b mkimage: Make table_entry code global
- make get_table_entry_id() global
- make get_table_entry_name() global
- move struct table_entry to image.h

Currently this code is used by image.c only.

This patch makes this API global so it can be used by other parts of
code, too.

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Ron Lee <ron.debian.org>

Edit comments and commit message.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:20 -05:00
Prafulla Wadaskar
6e86982925 mkimage: Make genimg_print_size() global
Currently it is used by image.c only, but the the function can be
used to support additional mkimage types like for example kwbimage,
so make this function globally visible.

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>

Edited commit message.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:20 -05:00
Prafulla Wadaskar
db588c7dcb mkimage: Include missing files in build dependency calculations
Include default_image.o and fit_image.o into the build dependency
calculations. This makes sure they get rebuilt if any of the headers
they include are modified

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Acked-by: Ron Lee <ron@debian.org>

Edited commit message.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:20 -05:00
Wolfgang Denk
c928d1dc89 tools/mkimage: fix compiler warnings, use "const"
This fixes some compiler warnings:
tools/default_image.c:141: warning: initialization from incompatible pointer type
tools/fit_image.c:202: warning: initialization from incompatible pointer type
and changes to code to use "const" attributes in a few places where
it's appropriate.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:20 -05:00
Prafulla Wadaskar
c7138920b8 tools: mkimage: split code into core, default and FIT image specific
This is a first step towards reorganizing the mkimage code to make it
easier to add support for additional images types. Current mkimage
code is specific to generating uImage and FIT image files, but the
same framework can be used to generate other image types like
Kirkwood boot images (kwbimage-TBD). For this, the mkimage code gets
reworked:

Here is the brief plan for the same:-
a) Split mkimage code into core and image specific support
b) Implement callback functions for image specific code
c) Move image type specific code to respective C files
       Currently there are two types of file generation/list
       supported (i.e uImage, FIT), the code is abstracted from
       mkimage.c/.h and put in default_image.c and fit_image.c;
       all code in these file is static except init function call
d) mkimage_register API is added to add new image type support
All above is addressed in this patch
e) Add kwbimage type support to this new framework (TBD)
This will be implemented in a following commit.

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Edit commit message, fix coding style and typos.
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:19 -05:00
Prafulla Wadaskar
02e78e7398 tools: mkimage: Fixed build warnings
uninitialized retval variable warning fixed
crc32 APIs moved to crc.h (newly added) and build warnings fixed

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:19 -05:00
Prafulla Wadaskar
34e0059234 tools: mkimage: Makefile sorted
The tools/Makefile is sorted for all entries,

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2009-10-03 09:04:19 -05:00
Prafulla Wadaskar
40864630b2 tools: mkimage : bugfix returns correct value for list command
List command always return "EXIT_SUCCESS" even in case of
failure by any means.

This patch return 0 if list command is sucessful,
returns negative value reported by check_header functions

Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:19 -05:00
Mingkai Hu
f587fed25c mkconfig: pass the board name to board config file
Then we can handle different config targets in the board file, which
simplifies the top level Makefile for boards that have multiple
config targets.

Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
2009-10-03 09:04:19 -05:00
Wolfgang Denk
8b142ab08b Remove "atmel_df_pow2" binary with "make clean"
Commit 65f6f07b added support for the atmel_df_pow2 standalone program
but missed to add a rule to remove it to the "clean" make target.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:19 -05:00
Stefan Roese
ed51257e2a ppc4xx: Fix compilation warning in 4xx miiphy.c
This patch fixes the following compilation warning:

miiphy.c: In function 'emac4xx_miiphy_read':
miiphy.c:353: warning: dereferencing type-punned pointer will break
strict-aliasing rules

Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:18 -05:00
Matthias Fuchs
9c721657ad ppc4xx: Add CONFIG_PCI_4xx_PTM_OVERWRITE to some esd 4xx boards
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:18 -05:00
Matthias Fuchs
247eeb98a8 ppc4xx: Allow overwriting pci target registers for all 4xx boards
This patch adds the CONFIG_PCI_4xx_PTM_OVERWRITE option and replaces
the ugly 'if defined(BOARD1) || ... || defined(BOARDn)' construct
in 4xx pci code.

When CONFIG_PCI_4xx_PTM_OVERWRITE is defined the default ptm register
setup can be overwritten through environment variables ptm1la, ptm1ms,
ptm2la and ptm2ms to do application specific pci target BAR configuration.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:18 -05:00
Matthias Fuchs
1fda4e9df1 ppc4xx: Fix PMC405DE support
This patch fixes PMC405DE support. Patch 85d6bf0b fixed out-of-tree
building for this board but the loadpci object did not get linked
after that.

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:18 -05:00
Detlev Zundel
6d0363b23a amcc-common.h: Use filenames from environment variables for update procedure.
Using a separate "u-boot" environment variable allows to easily
specify different filenames for the update procedure.  This is also in
line with many other board configurations defining an "update" script.

Signed-off-by: Detlev Zundel <dzu@denx.de>
Acked-by: Wolfgang Denk <wd@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2009-10-03 09:04:18 -05:00
Kumar Gala
bbff2d2861 ppc/85xx: Introduce RESET_VECTOR_ADDRESS to handle non-standard link address
Some board ports place TEXT_BASE at a location that would cause the
RESET_VECTOR_ADDRESS not to be at 0xfffffffc when we link.  By default
we assume RESET_VECTOR_ADDRESS will be 0xfffffffc if the board doesn't
explicitly set it.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Acked-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:17 -05:00
Kumar Gala
5079ae4a20 ppc/85xx: Clean up do_reset
There is no reason to do a run time check for e500 v1 based cores to
determine if we have the GUTs RSTCR facility.  Only the first generation
of PQ3 parts (MPC8540/41/55/60) do not have it.  So checking to see if
we are e500 v2 would miss future parts (like e500mc).

Just change this to be ifdef'd based on CONFIG_MPC85{40,41,55,60}.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:17 -05:00
Poonam Aggrwal
6946086859 ppc/85xx/86xx: Bug fix: call to puts in probecpu() moved to checkcpu().
While in probecpu() UART is still not initialized.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:17 -05:00
Poonam Aggrwal
ef4025cf61 ppc/85xx/86xx: Device tree fixup for number of cores
Fixing the number of cores in the device tree based on the actual number of
cores on the system.  With this same device tree image can be used for dual
core and single core members of otherwise exactly same SOC.

For example:
* P2020RDB and P2010RDB
* P1020RDB and P1011RDB
* MPC8641D and MPC8641

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:17 -05:00
Poonam Aggrwal
ea8be4a65b ppc/85xx,86xx: Handling Unknown SOC version
Incase the system is detected with Unknown SVR, let the system boot
with a default value and a proper message.

Now with dynamic detection of SOC properties from SVR, this is necessary
to prevent a crash.

Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:17 -05:00
Kumar Gala
865f24dc92 ppc/8xxx: Refactor code to determine if PCI is enabled & agent/host
Refactor the code into a simple bitmask lookup table that determines if
a given PCI controller is enabled and if its in host/root-complex or
agent/end-point mode.

Each processor in the PQ3/MPC86xx family specified different encodings
for the cfg_host_agt[] and cfg_IO_ports[] boot strapping signals.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:17 -05:00
Kumar Gala
8b8376e81c ppc/85xx: Cleanup makefile and related optional files
Cleaned up cpu/mpc85xx/Makefile to use CONFIG_* for those obvious cases
we have like PCI, CPM2, QE.  Also reworked it to use one line per file
for everything and sorted in alphabetical order.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:16 -05:00
Timur Tabi
16d4813717 fsl: add register read-back to set_law()
After programming a new LAW, we should read-back the LAWAR register so that
we sync the writes.  Otherwise, code that attempts to use the new LAW-mapped
memory might fail right away.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:16 -05:00
Kumar Gala
eb0a2cc9e3 ppc/85xx: Fix bug in setup_mp code
Its possible that we try and copy the boot page code out of flash into a
DDR location that doesn't have a TLB cover it.  For example, if we have
3G of DDR we typically only map the first 2G.  In the cases of 4G+ this
wasn't an issue since the reset page TLB mapping covered the last page
of memory which we wanted to copy to.

We now change the physical address of the reset page TLB to map to the
true physical location of the boot page code, copy and than set the
TLB back to its 1:1 mapping of the reset page.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:16 -05:00
Kumar Gala
176c84efc5 ppc/85xx: Add a simple function to search the TLB
Allow us to search the TLB array based on an address.  This is useful
if we want to change an entry but dont know where it happens to be
located.

For example, the boot page mapping we use on MP or the flash TLB that
we change the WIMGE settings for after we've relocated.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:16 -05:00
Kumar Gala
e568fd99ab 85xx: Add support for setting IVORs to fixed offset defaults
In future Book-E implementations IVORs will most likely go away and be
replaced with fixed offsets.  The IVPR will continue to exist to allow
for relocation of the interrupt vectors.

This code adds support to setup the IVORs as their fixed offset values
per the ISA 2.06 spec when we transition from u-boot to another OS
either via 'bootm' or a cpu release.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:16 -05:00
Dipen Dudhat
4507c0a0a0 ppc/85xx: Fix up eSDHC controller clock frequency in the device tree
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:15 -05:00
Kumar Gala
ed4b37e867 ppc/8xxx: Remove ddr_pd_cntl register since it doesn't exist
The ddr_pd_cntl isn't defined in any reference manual and thus we wil
remove especially since we set it to 0, which would most likely be its
POR value.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:15 -05:00
Kumar Gala
58157d7ad9 ppc/8xxx: relocate cpu pointer in global data
Now that we have a pointer to the cpu struct we need to relocate it once
we get into ram.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:15 -05:00
Anton Vorontsov
ae3565aac5 fsl: sys_eeprom: Fix 'may be used uninitialized' warning
The warning is bogus, so silence it by initializing the 'ret' variable.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:15 -05:00
Dipen Dudhat
20f02c3b76 ppc/85xx: Use CONFIG_FSL_ESDHC to enable sdhc clk
Enable eSDHC Clock based on generic CONFIG_FSL_ESDHC define instead of a
platform define.  This will enable all the 85xx platforms to use sdhc_clk
based on CONFIG_FSL_ESDHC.

Signed-off-by: Gao Guanhua <B22826@freescale.com>
Signed-off-by: Dipen Dudhat <dipen.dudhat@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:15 -05:00
Timur Tabi
14bdd93270 fsl_i2c: increase I2C timeout values and make them configurable
The value of I2C_TIMEOUT in fsl_i2c.c has several problems.  First, it is
defined as CONFIG_HZ/4, but it is used as a count of microseconds, so it makes
no sense to derive it from a clock rate.  Second, the current value (250) is
too low for some boards, so it needs to be increased.  Third, the timeout
necessary for multiple-master arbitration is larger than the timeout for basic
read/write operations, so we shouldn't have a single constant for both timeouts.
Finally, it would be nice if we could override these values on a per-board
basis.

Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Wolfgang Denk <wd@denx.de>
Tested-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 09:04:15 -05:00
Eric Millbrandt
9179dd3bf5 Reset i2c slave devices during init on mpc5xxx cpus
Reset any i2c devices that may have been interrupted during a system reset.
Normally this would be accomplished by clocking the line until SCL and SDA
are released and then sending a start condtiion (From an Atmel datasheet).
There is no direct access to the i2c pins so instead create start commands
through the i2c interface.  Send a start command then delay for the SDA Hold
time, repeat this by disabling/enabling the bus a total of 9 times.

Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
2009-10-03 09:04:14 -05:00
Wolfgang Denk
e99846c07a ARM: Update mach-types
Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:14 -05:00
Mike Frysinger
8eb7e28014 push LOAD_ADDR out to arch mk files
Rather than maintain/extend the current ifeq($(ARCH)) mess that exists in
the standalone Makefile, push the setting up of LOAD_ADDR out to the arch
config.mk (and rename to STANDALONE_LOAD_ADDR in the process).  This keeps
the common code clean and lets the arch do whatever crazy crap it wants in
its own area.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:14 -05:00
Giuseppe CONDORELLI
aa0c9e34d5 zlib: fix code when DEBUG is defined
Removed stdio.h inclusion and moved trace macros to use printf avoiding to
write debug informations to standard error.

Signed-off-by: Giuseppe Condorelli <giuseppe.condorelli@st.com>
2009-10-03 09:04:14 -05:00
Scott Wood
897e6d063d mxc_nand: Remove Freescale's "All Rights Reserved."
Signed-off-by: Scott Wood <scottwood@freescale.com>
2009-10-03 09:04:13 -05:00
Anton Vorontsov
13ba788a62 mpc83xx/serdes: License cleanup: remove "All Rights Reserved" notice
"All Rights Reserved" conflicts with the GPL.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2009-10-03 09:04:13 -05:00
Wolfgang Denk
4c5baa633e License cleanup: remove unintended "All Rights Reserved" notices.
Some files included my old standerd file header which had a "All
Rights Reserved" part. As this has never been my intention, I remove
these lines to make the files compatible with GPL v.2 and later.

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:13 -05:00
Wolfgang Denk
71b24e5612 cmd_mtdparts.c: fix compiler warning in debug code
Fix warning messages:
cmd_mtdparts.c:1429: warning: format '%08lx' expects type 'long
unsigned int', but argument 6 has type 'u32'
cmd_mtdparts.c:1429: warning: format '%08lx' expects type 'long
unsigned int', but argument 7 has type 'u32'

Signed-off-by: Wolfgang Denk <wd@denx.de>
2009-10-03 09:04:13 -05:00
Anton Vorontsov
88f9d60b62 Move uninitialized_var() macro from ubi_uboot.h to compiler.h
This is needed so that we could use this macro for non-UBI code.

Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
2009-10-03 09:04:12 -05:00
Kumar Gala
d42914fbb8 arm: Remove -fno-strict-aliasing
-fno-strict-aliasing is hidding warnings.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:12 -05:00
Kumar Gala
5ce1da9af3 ppc: Remove -fno-strict-aliasing
-fno-strict-aliasing is hidding warnings.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:12 -05:00
Eric Millbrandt
2f4713b919 galaxy5200: Add chip select region for an Epson S1D15313
Signed-off-by: Eric Millbrandt <emillbrandt@dekaresearch.com>
2009-10-03 09:04:12 -05:00
Kumar Gala
a91f02abf5 Add ability for arch code to make changes before we boot
Added a arch_preboot_os() function that cpu specific code can implement to
allow for various modifications to the state of the machine right before
we boot.  This can be useful to setup register state to a specific
configuration.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
2009-10-03 09:04:12 -05:00
Roy Zang
3fbde1876c Use different PBA value for E1000 PCI and PCIe cards
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
Acked-by: Andr Schwarz <andre.schwarz@matrix-vision.de>
2009-10-03 09:04:11 -05:00
Graeme Russ
06d0e8309e Add PCI support to eNET board
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-10-03 09:04:11 -05:00
Graeme Russ
bd9806d696 i386: Moved PCI from #ifdef to conditional compile for sc520 boards
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-10-03 09:04:11 -05:00
Graeme Russ
5aaeb2a3d4 i386: Replace [read, write]_mmcr_[byte, word, long] with memory mapped structure
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-10-03 09:04:11 -05:00
Graeme Russ
8866040f6d Misc sc520 cdp fixups
Now that the PCI, SATA et al compile problems have been resolved, the
cludge that was applied to avoid them can be removed

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-10-03 09:04:10 -05:00
Graeme Russ
7a17d13cbd Fixup sc520_spunk board
Primary intent is to resolve build errors for this board which has been
neglected for a very long time. I do not have one of these boards, so I
cannot test functionality

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-10-03 09:04:10 -05:00
Graeme Russ
3ae184dd48 Misc ds1722 fixups
This patch is based on a patch submitted by Jean-Christophe PLAGNIOL-VILLARD
on 18th May 2008 as part of a general i386 / sc520 fixup which was never
applied

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-10-03 09:04:10 -05:00
Graeme Russ
a0d9448aff Misc ti_pci1410a fixups
Removed do_pinit() - now declared in cmd_pcmcia.c

Added #define CONFIG_CMD_PCMCIA around pcmcia_off() in line with other
PCMCIA drivers

signed/unsigned type fixups

Added semi-colon after default: label as required by newer gcc

The only board that appears to use this driver is the sc520_spunk which
is very old and very likely very broken anyway. I do not have one to test
whether this patch breaks anything functionaly, I have can only check
that it compiles without warning or error

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-10-03 09:04:10 -05:00
Graeme Russ
70d841f55d Misc SATA fixups
Cast first parameter to sata_cpy()

In /drivers/block/ata_piix.h, ata_id_has_lba48(), ata_id_has_lba(),
ata_id_has_dma(), ata_id_u32(), ata_id_u64() are all defined in
include/libata.h which is included in ata.h which is included by all files
which include ata_piix.h (only ata_piix.c) so these definitions are
supurflous to (and conlict with) this in libata.h. Interestingly, my
compiler complains about ata_id_u64 already being defined, but not
ata_id_u32

ata_dump_id() is defined in include/libata.h and should not be static
(maybe should even use ata_dump_id() in libata.c

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-10-03 09:04:10 -05:00
Graeme Russ
ed3afafd48 i386: Misc PCI fixups
Change PCI_REGION_MEMORY to PCI_REGION_SYS_MEMORY (Originally done in
commit ff4e66e93c, regressed by commit 6d7f610b09)

Cast PCI_ROM_ADDRESS_MASK to u32

Wrap probe_pci_video() call inside #ifdef CONFIG_VIDEO

Change call to pci_find_class() to pci_find_devices(). This is based on a
patch submitted on 1st March 2007 (Patch that fixes the compilation errors
for sc520_cdp board) by mushtaq_k

This patch requires that PCI_VIDEO_VENDOR_ID and PCI_VIDEO_DEVICE_ID be
specified in the board config file.  Dummy values have been added for the
SC520 CDP board to enable compilation, but since I do not have one of these,
I do know what the values should be

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-10-03 09:04:09 -05:00
Graeme Russ
a219983dc1 Fix sc520 timer interrupt generation
The current implementation has the timer being started before the interrupt
handler is installed. It the interrupt occurs before the handler is
installed, the timer interrupt is never reset and the timer stops

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-10-03 09:04:09 -05:00
Graeme Russ
53c8b44a1f Fix environment configuration for eNET board
The current configuration of the Environment has the redundant copy of the
environment in the Boot Flash - This was never the intent. The Environment
should instead be in the first two sectors of the first Strata Flash

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-10-03 09:04:09 -05:00
Graeme Russ
c214eaf35c i386: Fix regression introduced by commit 8c63d47651
A local variable was deleted that should not have been

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-10-03 09:04:09 -05:00
Graeme Russ
ac28dcfe89 i386: Change inline asm global symbols to local
gcc 4.3.2 optimiser creates multiple copies of inline asm (who knows why)
Remove use of global names for labels to prevent 'symbol already defined'
errors

Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-10-03 09:04:09 -05:00
Graeme Russ
8b576fa2c4 i386: Add errno.h
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
2009-10-03 09:04:08 -05:00
Peter Tyser
bdb2802f4a Consolidate arch-specific mem_malloc_init() implementations
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 09:04:08 -05:00
Peter Tyser
832f4377d6 Standardize mem_malloc_init() implementation
This lays the groundwork to allow architectures to share a common
mem_malloc_init().

Note that the x86 implementation was not modified as it did not fit the
mold of all other architectures.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 09:04:08 -05:00
Peter Tyser
d870552ee4 Consolidate arch-specific sbrk() implementations
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2009-10-03 09:04:08 -05:00
Mike Frysinger
2c17527f50 atmel_df_pow2: standalone to convert dataflashes to pow2
Atmel DataFlashes by default operate with pages that are slightly bigger
than normal binary sizes (i.e. many are 1056 byte pages rather than 1024
bytes).  However, they also have a "power of 2" mode where the pages show
up with the normal binary size.  The latter mode is required in order to
boot with a Blackfin processor, so many people wish to convert their
DataFlashes on their development systems to this mode.  This standalone
application does just that.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:07 -05:00
Mike Frysinger
801f474159 Blackfin: cm-bf548: fix device->stdio_dev fallout
The recent 52cb4d4fb3 commit which renamed device to stdio_dev missed the
cm-bf548's video board.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:07 -05:00
Mike Frysinger
275d49da4a Blackfin: enable 64bit printf for nand
Since the NAND code now uses 64bit code, make sure we enable support for
ADI Blackfin boards in printf to avoid the warning:
nand_util.c:45:2: warning: #warning Please define CONFIG_SYS_64BIT_VSPRINTF for correct output!

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:07 -05:00
Mike Frysinger
6c507885c7 Blackfin: use scratch pad for exception stack
If the memory layout pushes the stack out of the default DCPLB coverage,
the exception handler may trigger a double fault by trying to push onto
the uncovered stack.  So handle the exception stack similar to the kernel
by using the top of the scratch pad SRAM.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:07 -05:00
Mike Frysinger
dfc703fac5 Blackfin: increase default console size
The default console size indirectly applies to length of env vars, so a
smaller length makes it hard to pass longer command lines to kernels.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:07 -05:00
Mike Frysinger
caa00e4516 Blackfin: fix debug printf modifiers
The display_global_data() function generated warnings with pretty much
every variable.

Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:06 -05:00
Harald Krapfenbauer
7637de37a4 Blackfin: cm-bf537u: new board port
The CM-BF537U is similar to the CM-BF537E module, but enough to need its
own board port.

Signed-off-by: Harald Krapfenbauer <Harald.Krapfenbauer@bluetechnix.at>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:06 -05:00
Robin Getz
ced6466ed5 Blackfin: change global data register from P5 to P3
Since the Blackfin ABI favors higher scratch registers by default, use the
last scratch register (P3) for global data rather than the first (P5).
This allows the compiler's register allocator to use higher number scratch
P registers, which in turn better matches the Blackfin instruction set,
which reduces the size of U-Boot by more than 1024 bytes...

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:06 -05:00
Robin Getz
f6e33d95df Blackfin: enable more network commands for ADI dev boards
Add dns and ntp to default networking commands, and ask for more dhcp
options to better configure the network environment.

Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:06 -05:00
Michael Hennerich
05d89091ca Blackfin: bf537-stamp: comment CF-Flash Card Support better
Signed-off-by: Michael Hennerich <michael.hennerich@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:05 -05:00
Robin Getz
8e5dc6f986 Blackfin: use +(filesize) to make sure we are only doing what is necessary
Signed-off-by: Robin Getz <robin.getz@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2009-10-03 09:04:05 -05:00
Sandeep Paulraj
e08dbb4f20 TI DaVinci: DM646x: Initial Support for DM646x SOC
DM646x is an SOC from TI which has both an ARM and a DSP.
There are multiple variants of the SOC mainly dealing with different
core speeds.
This patch adds the initial framework for the DM646x SOC.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-09-15 10:33:07 -05:00
Sandeep Paulraj
418e5f435c TI DaVinci: DM6446: Fix Compilation error in NAND mode
The Default mode that is built for the Davinci DVEVM happens
to be the NOR mode.
When we want to build for the NAND mode, we get a compilation
error. This is overcome by defining the CONFIG_MTD_DEVICE
flag in the NAND mode.
The image built for NAND mode was successfully tested on the
DaVinci DM6446 EVM.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
2009-09-15 10:33:07 -05:00
Tom Rix
7467599c89 OMAP3 Move cache routine to cache.S
v7_flush_dcache_all, because it depends on omap ROM code is not
generic.  Rename the function to 'invalidate_dcache' and move it
to the omap cpu directory.

Collect the other omap cache routines l2_cache_enable and
l2_cache_disable with invalide_dcache into cache.S.  This
means removing the old cache.c file that contained l2_cache_enable
and l2_cache_disable.

The conversion from cache.c to cache.S was done most through
disassembling the uboot binary.  The only significant change was
to change the comparision for the return of get_cpu_rev from

   cmp	r0, #0
   beq	earlier_than_label

Which was lost information to

   cmp	r0, #CPU_3XX_ES20
   blt	earlier_than_label

The paths through the enable routine were verified by
adding an infinite loop and seeing the hang.  Then
removing the infinite loop and seeing it continue.

The disable routine is similar enough that it was not
tested with this method.

Run tested by cold booting from nand on beagle and zoom1.
Compile tested on MAKEALL arm.

Signed-off-by: Tom Rix <Tom.Rix@windriver.com>
2009-09-15 10:33:07 -05:00
Sandeep Paulraj
5e4c9a10c5 TI DaVinci: Remove references to SZ_xx
This patch removes the asm/sizes.h header file from being
included in the DaVinci SOC configs.
References to SZ_xx have been replaced by appropriate
bit shifted values.

Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
Acked-by: Wolfgang Denk <wd@denx.de>
2009-09-15 10:33:07 -05:00
2821 changed files with 98679 additions and 193299 deletions

3
.gitignore vendored
View File

@@ -40,6 +40,9 @@
/errlog
/reloc_off
/include/generated/
/lib/asm-offsets.s
# stgit generated dirs
patches-*
.stgit-edit.txt

88970
CHANGELOG

File diff suppressed because it is too large Load Diff

File diff suppressed because it is too large Load Diff

View File

@@ -200,10 +200,6 @@ N: Andreas Heppel
E: aheppel@sysgo.de
D: CPU Support for MPC 75x; board support for Eltec BAB750 [obsolete!]
N: August Hoeraendl
E: august.hoerandl@gmx.at
D: Support for the logodl board (PXA2xx)
N: Josh Huber
E: huber@alum.wpi.edu
D: Port to the Galileo Evaluation Board, and the MPC74xx cpu series.
@@ -441,7 +437,7 @@ D: Support for Matrix Vision boards (MVBLM7/MVBC_P/MVSMR)
N: Robert Schwebel
E: r.schwebel@pengutronix.de
D: Support for csb226, logodl and innokom boards (PXA2xx)
D: Support for csb226 and innokom boards (PXA2xx)
N: Aaron Sells
E: sellsa@embeddedplanet.com

View File

@@ -102,7 +102,6 @@ Wolfgang Denk <wd@denx.de>
IVMS8_256 MPC860
LANTEC MPC850
LWMON MPC823
NC650 MPC852
R360MPI MPC823
RMU MPC850
RRvision MPC823
@@ -117,7 +116,6 @@ Wolfgang Denk <wd@denx.de>
c2mon MPC855
hermes MPC860
lwmon MPC823
pcu_e MPC855
CU824 MPC8240
Sandpoint8240 MPC8240
@@ -146,16 +144,14 @@ Dirk Eibach <eibach@gdsys.de>
dlvision PPC405EP
gdppc440etx PPC440EP/GR
intip PPC460EX
io PPC405EP
iocon PPC405EP
neo PPC405EP
Dave Ellis <DGE@sixnetio.com>
SXNI855T MPC8xx
Fred Fan <fanyefeng@gmail.com>
mx51evk i.MX51
Thomas Frieden <ThomasF@hyperion-entertainment.com>
AmigaOneG3SE MPC7xx
@@ -212,8 +208,6 @@ Wolfgang Grandegger <wg@denx.de>
ipek01 MPC5200
CCM MPC855
PN62 MPC8240
IPHASE4539 MPC8260
SCM MPC8260
@@ -262,10 +256,6 @@ Sangmoon Kim <dogoil@etinsys.com>
debris MPC8245
KVME080 MPC8245
Thomas Lange <thomas@corelatus.se>
GTH MPC860
Robert Lazarski <robertlazarski@gmail.com>
ATUM8548 MPC8548
@@ -316,6 +306,10 @@ Andrea "llandre" Marson <andrea.marson@dave-tech.it>
PPChameleonEVB PPC405EP
Tirumala Marri <tmarri@apm.com>
bluestone APM821XX
Reinhard Meyer <r.meyer@emk-elektronik.de>
TOP860 MPC860T
@@ -354,6 +348,10 @@ Daniel Poirot <dan.poirot@windriver.com>
sbc8240 MPC8240
sbc405 PPC405GP
Sergei Poselenov <sposelenov@emcraft.com>
a4m072 MPC5200
Sudhakar Rajashekhara <sudhakar.raj@ti.com>
da850evm ARM926EJS (DA850/OMAP-L138)
@@ -392,6 +390,7 @@ Stefan Roese <sr@denx.de>
rainier PPC440GRx
sequoia PPC440EPx
sycamore PPC405GPr
t3corp PPC460GT
taishan PPC440GX
walnut PPC405GP
yellowstone PPC440GR
@@ -427,6 +426,7 @@ Heiko Schocher <hs@denx.de>
sc3 PPC405GP
suen3 ARM926EJS (Kirkwood SoC)
uc101 MPC5200
ve8313 MPC8313
Peter De Schrijver <p2@mind.be>
@@ -446,6 +446,7 @@ Timur Tabi <timur@freescale.com>
MPC8349E-mITX MPC8349
MPC8349E-mITX-GP MPC8349
P1022DS P1022
Erik Theisen <etheisen@mindspring.com>
@@ -463,10 +464,11 @@ Rune Torgersen <runet@innovsys.com>
Peter Tyser <ptyser@xes-inc.com>
XPEDITE1000 PPC440GX
XPEDITE5170 MPC8640
XPEDITE5200 MPC8548
XPEDITE5370 MPC8572
xpedite1000 PPC440GX
xpedite5170 MPC8640
xpedite5200 MPC8548
xpedite5370 MPC8572
xpedite5500 P2020
David Updegraff <dave@cray.com>
@@ -489,6 +491,11 @@ Stephen Williams <steve@icarus.com>
JSE PPC405GPr
Ilya Yanok <yanok@emcraft.com>
mpc8308_p1m MPC8308
MPC8308RDB MPC8308
Roy Zang <tie-fei.zang@freescale.com>
mpc7448hpc2 MPC7448
@@ -546,10 +553,17 @@ Stefano Babic <sbabic@denx.de>
polaris xscale
trizepsiv xscale
mx51evk i.MX51
vision2 i.MX51
Enric Balletbo i Serra <eballetbo@iseebcn.com>
igep0020 ARM ARMV7 (OMAP3xx SoC)
igep0030 ARM ARMV7 (OMAP3xx SoC)
Dirk Behme <dirk.behme@gmail.com>
omap3_beagle ARM CORTEX-A8 (OMAP3530 SoC)
omap3_beagle ARM ARMV7 (OMAP3530 SoC)
Eric Benard <eric@eukrea.com>
@@ -561,6 +575,10 @@ Rishi Bhattacharya <rishi@ti.com>
omap5912osk ARM926EJS
Andreas Bießmann <andreas.devel@gmail.com>
at91rm9200ek at91rm9200
Cliff Brake <cliff.brake@gmail.com>
pxa255_idp xscale
@@ -586,6 +604,10 @@ Thomas Elste <info@elste.org>
modnet50 ARM720T (NET+50)
Kristoffer Ericson <kristoffer.ericson@gmail.com>
jornada SA1110
Fabio Estevam <Fabio.Estevam@freescale.com>
mx31pdk i.MX31
@@ -615,11 +637,11 @@ Kshitij Gupta <kshitij@ti.com>
Vaibhav Hiremath <hvaibhav@ti.com>
am3517_evm ARM CORTEX-A8 (AM35x SoC)
am3517_evm ARM ARMV7 (AM35x SoC)
Grazvydas Ignotas <notasas@gmail.com>
omap3_pandora ARM CORTEX-A8 (OMAP3xx SoC)
omap3_pandora ARM ARMV7 (OMAP3xx SoC)
Gary Jennejohn <garyj@denx.de>
@@ -649,12 +671,12 @@ Nishant Kamat <nskamat@ti.com>
Minkyu Kang <mk7.kang@samsung.com>
s5p_goni ARM CORTEX-A8 (S5PC110 SoC)
SMDKC100 ARM CORTEX-A8 (S5PC100 SoC)
s5p_goni ARM ARMV7 (S5PC110 SoC)
SMDKC100 ARM ARMV7 (S5PC100 SoC)
Frederik Kriewitz <frederik@kriewitz.eu>
devkit8000 ARM CORTEX-A8 (OMAP3530 SoC)
devkit8000 ARM ARMV7 (OMAP3530 SoC)
Sergey Kubushyn <ksi@koi8.net>
@@ -679,8 +701,8 @@ Sergey Lapin <slapin@ossfans.org>
Nishanth Menon <nm@ti.com>
omap3_sdp3430 ARM CORTEX-A8 (OMAP3xx SoC)
omap3_zoom1 ARM CORTEX-A8 (OMAP3xx SoC)
omap3_sdp3430 ARM ARMV7 (OMAP3xx SoC)
omap3_zoom1 ARM ARMV7 (OMAP3xx SoC)
David Müller <d.mueller@elsoft.ch>
@@ -718,7 +740,7 @@ Dave Peverley <dpeverley@mpc-data.co.uk>
Manikandan Pillai <mani.pillai@ti.com>
omap3_evm ARM CORTEX-A8 (OMAP3xx SoC)
omap3_evm ARM ARMV7 (OMAP3xx SoC)
Stelian Pop <stelian.pop@leadtechdesign.com>
@@ -730,7 +752,7 @@ Stelian Pop <stelian.pop@leadtechdesign.com>
Tom Rix <Tom.Rix@windriver.com>
omap3_zoom2 ARM CORTEX-A8 (OMAP3xx SoC)
omap3_zoom2 ARM ARMV7 (OMAP3xx SoC)
John Rigby <jcrigby@gmail.com>
@@ -749,7 +771,9 @@ Nomadik Linux Team <STN_WMM_nomadik_linux@list.st.com>
Steve Sakoman <sakoman@gmail.com>
omap3_overo ARM CORTEX-A8 (OMAP3xx SoC)
omap3_overo ARM ARMV7 (OMAP3xx SoC)
omap4_panda ARM ARMV7 (OMAP4xx SoC)
omap4_sdp4430 ARM ARMV7 (OMAP4xx SoC)
Jens Scharsig <esw@bus-elektronik.de>
@@ -791,16 +815,33 @@ Greg Ungerer <greg.ungerer@opengear.com>
cm4116 ks8695p
cm4148 ks8695p
Marek Vasut <marek.vasut@gmail.com>
balloon3 xscale
colibri_pxa270 xscale
palmld xscale
palmtc xscale
vpac270 xscale
zipitz2 xscale
Hugo Villeneuve <hugo.villeneuve@lyrtech.com>
SFFSDR ARM926EJS
Matt Waddel <matt.waddel@linaro.org>
ca9x4_ct_vxp ARM ARMV7 (Quad Core)
Prafulla Wadaskar <prafulla@marvell.com>
mv88f6281gtw_ge ARM926EJS (Kirkwood SoC)
rd6281a ARM926EJS (Kirkwood SoC)
sheevaplug ARM926EJS (Kirkwood SoC)
Matthias Weisser <weisserm@arcor.de>
jadecpu ARM926EJS (MB86R01 SoC)
Richard Woodruff <r-woodruff2@ti.com>
omap2420h4 ARM1136EJS
@@ -868,9 +909,6 @@ Scott McNutt <smcnutt@psyent.com>
PCI5441 Nios-II
PK1C20 Nios-II
EP1C20 Nios-II
EP1S10 Nios-II
EP1S40 Nios-II
nios2-generic Nios-II
#########################################################################
@@ -989,6 +1027,7 @@ Blackfin Team <u-boot-devel@blackfin.uclinux.org>
BF526-EZBRD BF526
BF527-EZKIT BF527
BF527-EZKIT-V2 BF527
BF527-SDP BF527
BF533-EZKIT BF533
BF533-STAMP BF533
BF537-PNAV BF537
@@ -997,6 +1036,8 @@ Blackfin Team <u-boot-devel@blackfin.uclinux.org>
BF548-EZKIT BF548
BF561-EZKIT BF561
BF527-AD7160-EVAL BF527
Bluetechnix Tinyboards <bluetechnix@blackfin.uclinux.org>
Blackfin Team <u-boot-devel@blackfin.uclinux.org>
@@ -1016,9 +1057,12 @@ Blackfin Team <u-boot-devel@blackfin.uclinux.org>
BF537-srv1 BF537
Wojtek Skulski <skulski@pas.rochester.edu>
Wojtek Skulski <info@skutek.com>
Blackfin Team <u-boot-devel@blackfin.uclinux.org>
Benjamin Matthews <mben12@gmail.com>
BLACKSTAMP BF532
BlackStamp BF533
BlackVME BF561
I-SYST Micromodule <support@i-syst.com>
Blackfin Team <u-boot-devel@blackfin.uclinux.org>
@@ -1034,6 +1078,10 @@ Brent Kandetzki <brentk@teleco.com>
IP04 BF532
Peter Meerwald <devel@bct-electronic.com>
bct-brettl2 BF536
#########################################################################
# End of MAINTAINERS list #
#########################################################################

744
MAKEALL
View File

@@ -1,5 +1,134 @@
#!/bin/bash
# Tool mainly for U-Boot Quality Assurance: build one or more board
# configurations with minimal verbosity, showing only warnings and
# errors.
#
# There are several ways to select which boards to build.
#
# Traditionally, architecture names (like "powerpc"), CPU family names
# (like "mpc83xx") or board names can be specified on the command
# line; without any arguments, MAKEALL defaults to building all Power
# Architecture systems (i. e. same as for "MAKEALL powerpc").
#
# With the iontroduction of the board.cfg file, it has become possible
# to provide additional selections. We use standard command line
# options for this:
#
# -a or --arch : Select architecture
# -c or --cpu : Select CPU family
# -s or --soc : Select SoC type
# -v or --vendor: Select board vendor
#
# Selections by these options are logically ANDed; if the same option
# is used repeatedly, such selections are ORed. So "-v FOO -v BAR"
# will select all configurations where the vendor is either FOO or
# BAR. Any additional arguments specified on the command line are
# always build additionally.
#
# Examples:
#
# - build all Power Architecture boards:
#
# MAKEALL -a powerpc
# or
# MAKEALL --arch powerpc
# or
# MAKEALL powerpc
#
# - build all PowerPC boards manufactured by vendor "esd":
#
# MAKEALL -a powerpc -v esd
#
# - build all PowerPC boards manufactured either by "keymile" or
# "siemens":
#
# MAKEALL -a powerpc -v keymile -v siemens
#
# - build all Freescale boards with MPC83xx CPUs, plus all 4xx boards:
#
# MAKEALL -c mpc83xx -v freescale 4xx
#
#########################################################################
SHORT_OPTS="a:c:v:s:"
LONG_OPTS="arch:,cpu:,vendor:,soc:"
# Option processing based on util-linux-2.13/getopt-parse.bash
# Note that we use `"$@"' to let each command-line parameter expand to a
# separate word. The quotes around `$@' are essential!
# We need TEMP as the `eval set --' would nuke the return value of
# getopt.
TEMP=`getopt -o ${SHORT_OPTS} --long ${LONG_OPTS} \
-n 'MAKEALL' -- "$@"`
if [ $? != 0 ] ; then echo "Terminating..." >&2 ; exit 1 ; fi
# Note the quotes around `$TEMP': they are essential!
eval set -- "$TEMP"
SELECTED=''
while true ; do
case "$1" in
-a|--arch)
# echo "Option ARCH: argument \`$2'"
if [ "$opt_a" ] ; then
opt_a="${opt_a%)} || \$2 == \"$2\")"
else
opt_a="(\$2 == \"$2\")"
fi
SELECTED='y'
shift 2 ;;
-c|--cpu)
# echo "Option CPU: argument \`$2'"
if [ "$opt_c" ] ; then
opt_c="${opt_c%)} || \$3 == \"$2\")"
else
opt_c="(\$3 == \"$2\")"
fi
SELECTED='y'
shift 2 ;;
-s|--soc)
# echo "Option SoC: argument \`$2'"
if [ "$opt_s" ] ; then
opt_s="${opt_s%)} || \$6 == \"$2\")"
else
opt_s="(\$6 == \"$2\")"
fi
SELECTED='y'
shift 2 ;;
-v|--vendor)
# echo "Option VENDOR: argument \`$2'"
if [ "$opt_v" ] ; then
opt_v="${opt_v%)} || \$5 == \"$2\")"
else
opt_v="(\$5 == \"$2\")"
fi
SELECTED='y'
shift 2 ;;
--)
shift ; break ;;
*)
echo "Internal error!" >&2 ; exit 1 ;;
esac
done
# echo "Remaining arguments:"
# for arg do echo '--> '"\`$arg'" ; done
FILTER="\$1 !~ /^#/"
[ "$opt_a" ] && FILTER="${FILTER} && $opt_a"
[ "$opt_c" ] && FILTER="${FILTER} && $opt_c"
[ "$opt_s" ] && FILTER="${FILTER} && $opt_s"
[ "$opt_v" ] && FILTER="${FILTER} && $opt_v"
if [ "$SELECTED" ] ; then
SELECTED=$(awk '('"$FILTER"') { print $1 }' boards.cfg)
fi
#########################################################################
# Print statistics when we exit
trap exit 1 2 3 15
trap print_stats 0
@@ -41,448 +170,89 @@ ERR_LIST=""
TOTAL_CNT=0
RC=0
# Helper funcs for parsing boards.cfg
boards_by_field()
{
awk \
-v field="$1" \
-v select="$2" \
'($1 !~ /^#/ && $field == select) { print $1 }' \
boards.cfg
}
boards_by_arch() { boards_by_field 2 "$@" ; }
boards_by_cpu() { boards_by_field 3 "$@" ; }
#########################################################################
## MPC5xx Systems
#########################################################################
LIST_5xx=" \
cmi_mpc5xx \
"
LIST_5xx="$(boards_by_cpu mpc5xx)"
#########################################################################
## MPC5xxx Systems
#########################################################################
LIST_5xxx=" \
BC3450 \
cm5200 \
cpci5200 \
digsy_mtc \
EVAL5200 \
fo300 \
galaxy5200 \
icecube_5200 \
inka4x0 \
ipek01 \
lite5200b \
mcc200 \
mecp5200 \
motionpro \
munices \
MVBC_P \
MVSMR \
o2dnt \
pcm030 \
pf5200 \
PM520 \
TB5200 \
Total5200 \
Total5200_Rev2 \
TQM5200 \
TQM5200_B \
TQM5200S \
v38b \
"
LIST_5xxx="$(boards_by_cpu mpc5xxx)"
#########################################################################
## MPC512x Systems
#########################################################################
LIST_512x=" \
aria \
mecp5123 \
mpc5121ads \
pdm360ng \
"
LIST_512x="$(boards_by_cpu mpc512x)"
#########################################################################
## MPC8xx Systems
#########################################################################
LIST_8xx=" \
Adder87x \
AdderII \
ADS860 \
AMX860 \
c2mon \
CCM \
cogent_mpc8xx \
ELPT860 \
EP88x \
ESTEEM192E \
ETX094 \
FADS823 \
FADS850SAR \
FADS860T \
FLAGADM \
FPS850L \
GEN860T \
GEN860T_SC \
GENIETV \
GTH \
hermes \
IAD210 \
ICU862_100MHz \
IP860 \
IVML24 \
IVML24_128 \
IVML24_256 \
IVMS8 \
IVMS8_128 \
IVMS8_256 \
KUP4K \
KUP4X \
LANTEC \
lwmon \
kmsupx4 \
MBX \
MBX860T \
mgsuvd \
MHPC \
MPC86xADS \
MPC885ADS \
NETPHONE \
NETTA \
NETTA2 \
NETTA_ISDN \
NETVIA \
NETVIA_V2 \
NX823 \
pcu_e \
QS823 \
QS850 \
QS860T \
quantum \
R360MPI \
RBC823 \
rmu \
RPXClassic \
RPXlite \
RPXlite_DW \
RRvision \
SM850 \
spc1920 \
SPD823TS \
svm_sc8xx \
SXNI855T \
TK885D \
TOP860 \
TQM823L \
TQM823L_LCD \
TQM850L \
TQM855L \
TQM860L \
TQM885D \
uc100 \
v37 \
"
LIST_8xx="$(boards_by_cpu mpc8xx)"
#########################################################################
## PPC4xx Systems
#########################################################################
LIST_4xx=" \
acadia \
acadia_nand \
ADCIOP \
alpr \
AP1000 \
APC405 \
AR405 \
arches \
ASH405 \
bamboo \
bamboo_nand \
bubinga \
CANBT \
canyonlands \
canyonlands_nand \
CMS700 \
CPCI2DP \
CPCI405 \
CPCI4052 \
CPCI405AB \
CPCI405DT \
CPCIISER4 \
CRAYL1 \
csb272 \
csb472 \
DASA_SIM \
devconcenter \
dlvision \
DP405 \
DU405 \
DU440 \
ebony \
ERIC \
fx12mm \
G2000 \
gdppc440etx \
glacier \
haleakala \
haleakala_nand \
hcu4 \
hcu5 \
HH405 \
HUB405 \
icon \
intip \
JSE \
KAREF \
katmai \
kilauea \
kilauea_nand \
korat \
luan \
lwmon5 \
makalu \
mcu25 \
METROBOX \
MIP405 \
MIP405T \
ML2 \
ml507 \
ml507_flash \
neo \
ocotea \
OCRTC \
ORSG \
p3p440 \
PCI405 \
pcs440ep \
PIP405 \
PLU405 \
PMC405 \
PMC405DE \
PMC440 \
PPChameleonEVB \
quad100hd \
rainier \
redwood \
sbc405 \
sc3 \
sequoia \
sequoia_nand \
taihu \
taishan \
v5fx30teval \
v5fx30teval_flash \
VOH405 \
VOM405 \
W7OLMC \
W7OLMG \
walnut \
WUH405 \
xilinx-ppc440-generic \
xilinx-ppc440-generic_flash \
XPEDITE1000 \
yellowstone \
yosemite \
yucca \
zeus \
"
LIST_4xx="$(boards_by_cpu ppc4xx)"
#########################################################################
## MPC8220 Systems
#########################################################################
LIST_8220=" \
Alaska8220 \
Yukon8220 \
"
LIST_8220="$(boards_by_cpu mpc8220)"
#########################################################################
## MPC824x Systems
#########################################################################
LIST_824x=" \
A3000 \
barco \
BMW \
CPC45 \
CU824 \
debris \
eXalion \
HIDDEN_DRAGON \
IDS8247 \
linkstation_HGLAN \
MOUSSE \
MUSENKI \
MVBLUE \
OXC \
PN62 \
Sandpoint8240 \
Sandpoint8245 \
sbc8240 \
utx8245 \
"
LIST_824x="$(boards_by_cpu mpc824x)"
#########################################################################
## MPC8260 Systems (includes 8250, 8255 etc.)
#########################################################################
LIST_8260=" \
atc \
cogent_mpc8260 \
CPU86 \
CPU87 \
ep8248 \
ep8260 \
ep82xxm \
gw8260 \
hymod \
IPHASE4539 \
ISPAN \
mgcoge \
MPC8260ADS \
MPC8266ADS \
MPC8272ADS \
PM826 \
PM828 \
ppmc8260 \
Rattler8248 \
RPXsuper \
rsdproto \
sacsng \
sbc8260 \
SCM \
TQM8260_AC \
TQM8260_AD \
TQM8260_AE \
TQM8272 \
ZPC1900 \
"
LIST_8260="$(boards_by_cpu mpc8260)"
#########################################################################
## MPC83xx Systems (includes 8349, etc.)
#########################################################################
LIST_83xx=" \
caddy2 \
kmeter1 \
MPC8313ERDB_33 \
MPC8313ERDB_NAND_66 \
MPC8315ERDB \
MPC8315ERDB_NAND \
MPC8323ERDB \
MPC832XEMDS \
MPC832XEMDS_ATM \
MPC8349EMDS \
MPC8349ITX \
MPC8349ITXGP \
MPC8360EMDS \
MPC8360EMDS_ATM \
MPC8360ERDK_33 \
MPC8360ERDK_66 \
MPC837XEMDS \
MPC837XERDB \
MVBLM7 \
sbc8349 \
SIMPC8313_LP \
TQM834x \
vme8349 \
"
LIST_83xx="$(boards_by_cpu mpc83xx)"
#########################################################################
## MPC85xx Systems (includes 8540, 8560 etc.)
#########################################################################
LIST_85xx=" \
ATUM8548 \
MPC8536DS \
MPC8536DS_NAND \
MPC8536DS_SDCARD \
MPC8536DS_SPIFLASH \
MPC8536DS_36BIT \
MPC8540ADS \
MPC8540EVAL \
MPC8541CDS \
MPC8544DS \
MPC8548CDS \
MPC8555CDS \
MPC8560ADS \
MPC8568MDS \
MPC8569MDS \
MPC8569MDS_ATM \
MPC8569MDS_NAND \
MPC8572DS \
MPC8572DS_36BIT \
P2020DS \
P2020DS_36BIT \
P1011RDB \
P1011RDB_NAND \
P1011RDB_SDCARD \
P1011RDB_SPIFLASH \
P1020RDB \
P1020RDB_NAND \
P1020RDB_SDCARD \
P1020RDB_SPIFLASH \
P2010RDB \
P2010RDB_NAND \
P2010RDB_SDCARD \
P2010RDB_SPIFLASH \
P2020RDB \
P2020RDB_NAND \
P2020RDB_SDCARD \
P2020RDB_SPIFLASH \
PM854 \
PM856 \
sbc8540 \
sbc8548 \
sbc8548_PCI_33 \
sbc8548_PCI_66 \
sbc8548_PCI_33_PCIE \
sbc8548_PCI_66_PCIE \
sbc8560 \
socrates \
stxgp3 \
stxssa \
TQM8540 \
TQM8541 \
TQM8548 \
TQM8548_AG \
TQM8548_BE \
TQM8555 \
TQM8560 \
XPEDITE5200 \
XPEDITE5370 \
"
LIST_85xx="$(boards_by_cpu mpc85xx)"
#########################################################################
## MPC86xx Systems
#########################################################################
LIST_86xx=" \
MPC8610HPCD \
MPC8641HPCN_36BIT \
MPC8641HPCN \
sbc8641d \
XPEDITE5170 \
"
LIST_86xx="$(boards_by_cpu mpc86xx)"
#########################################################################
## 74xx/7xx Systems
#########################################################################
LIST_74xx=" \
DB64360 \
DB64460 \
EVB64260 \
mpc7448hpc2 \
P3G4 \
p3m7448 \
PCIPPC2 \
PCIPPC6 \
ZUMA \
"
LIST_7xx=" \
BAB7xx \
CPCI750 \
ELPPC \
p3m750 \
ppmc7xx \
"
LIST_74xx_7xx="$(boards_by_cpu 74xx_7xx)"
#########################################################################
## PowerPC groups
@@ -506,8 +276,7 @@ LIST_powerpc=" \
${LIST_85xx} \
${LIST_86xx} \
${LIST_4xx} \
${LIST_74xx} \
${LIST_7xx} \
${LIST_74xx_7xx}\
"
# Alias "ppc" -> "powerpc" to not break compatibility with older scripts
@@ -520,13 +289,7 @@ LIST_ppc=" \
## StrongARM Systems
#########################################################################
LIST_SA=" \
assabet \
dnp1110 \
gcplus \
lart \
shannon \
"
LIST_SA="$(boards_by_cpu sa1100)"
#########################################################################
## ARM7 Systems
@@ -575,6 +338,7 @@ LIST_ARM9=" \
edminiv2 \
guruplug \
imx27lite \
jadecpu \
lpd7a400 \
magnesium \
mv88f6281gtw_ge \
@@ -643,11 +407,14 @@ LIST_ARM11=" \
"
#########################################################################
## ARM Cortex-A8 Systems
## ARMV7 Systems
#########################################################################
LIST_ARM_CORTEX_A8=" \
LIST_ARMV7=" \
am3517_evm \
ca9x4_ct_vxp \
devkit8000 \
igep0020 \
igep0030 \
mx51evk \
omap3_beagle \
omap3_overo \
@@ -656,6 +423,8 @@ LIST_ARM_CORTEX_A8=" \
omap3_sdp3430 \
omap3_zoom1 \
omap3_zoom2 \
omap4_panda \
omap4_sdp4430 \
s5p_goni \
smdkc100 \
"
@@ -699,31 +468,9 @@ LIST_at91=" \
## Xscale Systems
#########################################################################
LIST_pxa=" \
cerf250 \
cradle \
csb226 \
delta \
innokom \
lubbock \
pleb2 \
polaris \
pxa255_idp \
trizepsiv \
wepep250 \
xaeniax \
xm250 \
xsengine \
zylonite \
"
LIST_pxa="$(boards_by_cpu pxa)"
LIST_ixp=" \
actux1 \
actux2 \
actux3 \
actux4 \
ixdp425 \
ixdpg425 \
LIST_ixp="$(boards_by_cpu ixp)
pdnb3 \
scpu \
"
@@ -738,7 +485,7 @@ LIST_arm=" \
${LIST_ARM9} \
${LIST_ARM10} \
${LIST_ARM11} \
${LIST_ARM_CORTEX_A8} \
${LIST_ARMV7} \
${LIST_at91} \
${LIST_pxa} \
${LIST_ixp} \
@@ -807,27 +554,13 @@ LIST_mips_el=" \
## i386 Systems
#########################################################################
LIST_I486=" \
sc520_cdp \
sc520_eNET \
sc520_spunk \
sc520_spunk_rel \
"
LIST_x86=" \
${LIST_I486} \
"
LIST_x86="$(boards_by_arch i386)"
#########################################################################
## Nios-II Systems
#########################################################################
LIST_nios2=" \
EP1C20 \
EP1S10 \
EP1S40 \
PCI5441 \
PK1C20 \
LIST_nios2="$(boards_by_arch nios2)
nios2-generic \
"
@@ -835,127 +568,54 @@ LIST_nios2=" \
## MicroBlaze Systems
#########################################################################
LIST_microblaze=" \
microblaze-generic \
"
LIST_microblaze="$(boards_by_arch microblaze)"
#########################################################################
## ColdFire Systems
#########################################################################
LIST_coldfire=" \
LIST_coldfire="$(boards_by_arch m68k)
astro_mcf5373l \
cobra5272 \
EB+MCF-EV123 \
EB+MCF-EV123_internal \
idmr \
M5208EVBE \
M52277EVB \
M5235EVB \
M5249EVB \
M5253DEMO \
M5253EVBE \
M5271EVB \
M5272C3 \
M5275EVB \
M5282EVB \
M53017EVB \
M5329AFEE \
M5373EVB \
M54451EVB \
M54455EVB \
M5475AFE \
M5485AFE \
TASREG \
"
#########################################################################
## AVR32 Systems
#########################################################################
LIST_avr32=" \
atstk1002 \
atstk1003 \
atstk1004 \
atstk1006 \
atngw100 \
favr-32-ezkit \
hammerhead \
mimc200 \
"
LIST_avr32="$(boards_by_arch avr32)"
#########################################################################
## Blackfin Systems
#########################################################################
LIST_blackfin=" \
bf518f-ezbrd \
bf526-ezbrd \
bf527-ezkit \
bf527-ezkit-v2 \
bf533-ezkit \
bf533-stamp \
bf537-minotaur \
bf537-pnav \
bf537-srv1 \
bf537-stamp \
bf538f-ezkit \
bf548-ezkit \
bf561-acvilon \
bf561-ezkit \
blackstamp \
cm-bf527 \
cm-bf533 \
cm-bf537e \
cm-bf537u \
cm-bf548 \
cm-bf561 \
ibf-dsp561 \
ip04 \
tcm-bf518 \
tcm-bf537 \
"
LIST_blackfin="$(boards_by_arch blackfin)"
#########################################################################
## SH Systems
#########################################################################
LIST_sh2=" \
rsk7203 \
"
LIST_sh3=" \
mpr2 \
ms7720se \
"
LIST_sh2="$(boards_by_cpu sh2)"
LIST_sh3="$(boards_by_cpu sh3)"
LIST_sh4="$(boards_by_cpu sh4)"
LIST_sh4=" \
ms7750se \
ms7722se \
MigoR \
r7780mp \
r2dplus \
sh7763rdp \
sh7785lcr \
ap325rxa \
espt \
"
LIST_sh=" \
${LIST_sh2} \
${LIST_sh3} \
${LIST_sh4} \
"
LIST_sh="$(boards_by_arch sh)"
#########################################################################
## SPARC Systems
#########################################################################
LIST_sparc="gr_xc3s_1500 gr_cpci_ax2000 gr_ep2s60 grsim grsim_leon2"
#-----------------------------------------------------------------------
#----- for now, just run PowerPC by default -----
[ $# = 0 ] && set $LIST_powerpc
LIST_sparc="$(boards_by_arch sparc)"
#-----------------------------------------------------------------------
@@ -963,7 +623,7 @@ build_target() {
target=$1
${MAKE} distclean >/dev/null
${MAKE} ${target}_config
${MAKE} -s ${target}_config
${MAKE} ${JOBS} all 2>&1 >${LOG_DIR}/$target.MAKELOG \
| tee ${LOG_DIR}/$target.ERR
@@ -985,6 +645,22 @@ build_target() {
${CROSS_COMPILE}size ${BUILD_DIR}/u-boot \
| tee -a ${LOG_DIR}/$target.MAKELOG
}
build_targets() {
for t in "$@" ; do
# If a LIST_xxx var exists, use it. But avoid variable
# expansion in the eval when a board name contains certain
# characters that the shell interprets.
case ${t} in
*[-+=]*) list= ;;
*) list=$(eval echo '${LIST_'$t'}') ;;
esac
if [ -n "${list}" ] ; then
build_targets ${list}
else
build_target ${t}
fi
done
}
#-----------------------------------------------------------------------
@@ -1001,27 +677,9 @@ print_stats() {
}
#-----------------------------------------------------------------------
for arg in $@
do
case "$arg" in
arm|SA|ARM7|ARM9|ARM10|ARM11|ARM_CORTEX_A8|at91|ixp|pxa \
|avr32 \
|blackfin \
|coldfire \
|microblaze \
|mips|mips_el \
|nios2 \
|ppc|powerpc|5xx|5xxx|512x|8xx|8220|824x|8260|83xx|85xx|86xx|4xx|7xx|74xx|TSEC \
|sh|sh2|sh3|sh4 \
|sparc \
|x86|I486 \
)
for target in `eval echo '$LIST_'${arg}`
do
build_target ${target}
done
;;
*) build_target ${arg}
;;
esac
done
# Build target groups selected by options, plus any command line args
set -- ${SELECTED} "$@"
# run PowerPC by default
[ $# = 0 ] && set -- powerpc
build_targets "$@"

2809
Makefile

File diff suppressed because it is too large Load Diff

112
README
View File

@@ -126,13 +126,17 @@ the string "u_boot" or on "U_BOOT". Example:
Versioning:
===========
U-Boot uses a 3 level version number containing a version, a
sub-version, and a patchlevel: "U-Boot-2.34.5" means version "2",
sub-version "34", and patchlevel "4".
Starting with the release in October 2008, the names of the releases
were changed from numerical release numbers without deeper meaning
into a time stamp based numbering. Regular releases are identified by
names consisting of the calendar year and month of the release date.
Additional fields (if present) indicate release candidates or bug fix
releases in "stable" maintenance trees.
The patchlevel is used to indicate certain stages of development
between released versions, i. e. officially released versions of
U-Boot will always have a patchlevel of "0".
Examples:
U-Boot v2009.11 - Release November 2009
U-Boot v2009.11.1 - Release 1 in version November 2009 stable tree
U-Boot v2010.09-rc1 - Release candiate 1 for September 2010 release
Directory Hierarchy:
@@ -532,25 +536,6 @@ The following options need to be configured:
must be defined, to setup the maximum idle timeout for
the SMC.
- Interrupt driven serial port input:
CONFIG_SERIAL_SOFTWARE_FIFO
PPC405GP only.
Use an interrupt handler for receiving data on the
serial port. It also enables using hardware handshake
(RTS/CTS) and UART's built-in FIFO. Set the number of
bytes the interrupt driven input buffer should have.
Leave undefined to disable this feature, including
disable the buffer and hardware handshake.
- Console UART Number:
CONFIG_UART1_CONSOLE
AMCC PPC4xx only.
If defined internal UART1 (and not UART0) is used
as default U-Boot console.
- Boot Delay: CONFIG_BOOTDELAY - in seconds
Delay before automatically booting the default image;
set to -1 to disable autoboot.
@@ -1495,6 +1480,16 @@ The following options need to be configured:
#define I2C_DELAY udelay(2)
CONFIG_SOFT_I2C_GPIO_SCL / CONFIG_SOFT_I2C_GPIO_SDA
If your arch supports the generic GPIO framework (asm/gpio.h),
then you may alternatively define the two GPIOs that are to be
used as SCL / SDA. Any of the previous I2C_xxx macros will
have GPIO-based defaults assigned to them as appropriate.
You should define these to the GPIO value as given directly to
the generic GPIO functions.
CONFIG_SYS_I2C_INIT_BOARD
When a board is reset during an i2c bus transfer
@@ -1786,7 +1781,7 @@ The following options need to be configured:
ETX094, IVMS8, IVML24, SPD8xx, TQM8xxL,
HERMES, IP860, RPXlite, LWMON, LANTEC,
PCU_E, FLAGADM, TQM8260
FLAGADM, TQM8260
- Error Recovery:
CONFIG_PANIC_HANG
@@ -2253,7 +2248,7 @@ Configuration Settings:
- CONFIG_SYS_MONITOR_BASE:
Physical start address of boot monitor code (set by
make config files to be same as the text base address
(TEXT_BASE) used when linking) - same as
(CONFIG_SYS_TEXT_BASE) used when linking) - same as
CONFIG_SYS_FLASH_BASE when booting from flash.
- CONFIG_SYS_MONITOR_LEN:
@@ -2280,6 +2275,19 @@ Configuration Settings:
all data for the Linux kernel must be between "bootm_low"
and "bootm_low" + CONFIG_SYS_BOOTMAPSZ.
- CONFIG_SYS_BOOT_RAMDISK_HIGH:
Enable initrd_high functionality. If defined then the
initrd_high feature is enabled and the bootm ramdisk subcommand
is enabled.
- CONFIG_SYS_BOOT_GET_CMDLINE:
Enables allocating and saving kernel cmdline in space between
"bootm_low" and "bootm_low" + BOOTMAPSZ.
- CONFIG_SYS_BOOT_GET_KBD:
Enables allocating and saving a kernel copy of the bd_info in
space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
- CONFIG_SYS_MAX_FLASH_BANKS:
Max number of Flash memory banks
@@ -2354,6 +2362,14 @@ Configuration Settings:
on high Ethernet traffic.
Defaults to 4 if not defined.
- CONFIG_ENV_MAX_ENTRIES
Maximum number of entries in the hash table that is used
internally to store the environment settings. The default
setting is supposed to be generous and should work in most
cases. This setting can be used to tune behaviour; see
lib/hashtable.c for details.
The following definitions that deal with the placement and management
of environment data (variable area); in general, we support the
following configurations:
@@ -2531,18 +2547,32 @@ to save the current settings.
- CONFIG_ENV_SIZE:
These two #defines specify the offset and size of the environment
area within the first NAND device.
area within the first NAND device. CONFIG_ENV_OFFSET must be
aligned to an erase block boundary.
- CONFIG_ENV_OFFSET_REDUND
- CONFIG_ENV_OFFSET_REDUND (optional):
This setting describes a second storage area of CONFIG_ENV_SIZE
size used to hold a redundant copy of the environment data,
so that there is a valid backup copy in case there is a
power failure during a "saveenv" operation.
size used to hold a redundant copy of the environment data, so
that there is a valid backup copy in case there is a power failure
during a "saveenv" operation. CONFIG_ENV_OFFSET_RENDUND must be
aligned to an erase block boundary.
Note: CONFIG_ENV_OFFSET and CONFIG_ENV_OFFSET_REDUND must be aligned
to a block boundary, and CONFIG_ENV_SIZE must be a multiple of
the NAND devices block size.
- CONFIG_ENV_RANGE (optional):
Specifies the length of the region in which the environment
can be written. This should be a multiple of the NAND device's
block size. Specifying a range with more erase blocks than
are needed to hold CONFIG_ENV_SIZE allows bad blocks within
the range to be avoided.
- CONFIG_ENV_OFFSET_OOB (optional):
Enables support for dynamically retrieving the offset of the
environment from block zero's out-of-band data. The
"nand env.oob" command can be used to record this offset.
Currently, CONFIG_ENV_OFFSET_REDUND is not supported when
using CONFIG_ENV_OFFSET_OOB.
- CONFIG_NAND_ENV_DST
@@ -2562,7 +2592,7 @@ to save the current settings.
Please note that the environment is read-only until the monitor
has been relocated to RAM and a RAM copy of the environment has been
created; also, when using EEPROM you will have to use getenv_r()
created; also, when using EEPROM you will have to use getenv_f()
until then to read environment variables.
The environment is protected by a CRC32 checksum. Before the monitor
@@ -2656,7 +2686,7 @@ Low Level (hardware related) configuration options:
area defined by CONFIG_SYS_INIT_RAM_ADDR. Usually
CONFIG_SYS_GBL_DATA_OFFSET is chosen such that the initial
data is located at the end of the available space
(sometimes written as (CONFIG_SYS_INIT_RAM_END -
(sometimes written as (CONFIG_SYS_INIT_RAM_SIZE -
CONFIG_SYS_INIT_DATA_SIZE), and the initial stack is just
below that area (growing from (CONFIG_SYS_INIT_RAM_ADDR +
CONFIG_SYS_GBL_DATA_OFFSET) downward.
@@ -3148,10 +3178,10 @@ List of environment variables (most likely not complete):
interface is currently active. For example you
can do the following
=> setenv ethact FEC ETHERNET
=> ping 192.168.0.1 # traffic sent on FEC ETHERNET
=> setenv ethact SCC ETHERNET
=> ping 10.0.0.1 # traffic sent on SCC ETHERNET
=> setenv ethact FEC
=> ping 192.168.0.1 # traffic sent on FEC
=> setenv ethact SCC
=> ping 10.0.0.1 # traffic sent on SCC
ethrotate - When set to "no" U-Boot does not go through all
available network interfaces.

View File

@@ -37,7 +37,7 @@
#undef DEBUG
/* U-Boot routines needed */
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[]);
/*****************************************************************************
*

View File

@@ -33,6 +33,9 @@ STANDALONE_LOAD_ADDR = 0xc100000
endif
endif
ifdef CONFIG_SYS_ARM_WITHOUT_RELOC
PLATFORM_CPPFLAGS += -DCONFIG_SYS_ARM_WITHOUT_RELOC
endif
PLATFORM_CPPFLAGS += -DCONFIG_ARM -D__ARM__
# Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb:
@@ -64,3 +67,10 @@ PLATFORM_LIBS += $(OBJTREE)/arch/arm/lib/eabi_compat.o
endif
endif
LDSCRIPT := $(SRCTREE)/$(CPUDIR)/u-boot.lds
ifndef CONFIG_SYS_ARM_WITHOUT_RELOC
# needed for relocation
ifndef CONFIG_NAND_SPL
PLATFORM_LDFLAGS += -pie
endif
endif

View File

@@ -23,6 +23,7 @@
#include <common.h>
#include <asm/arch/mx31-regs.h>
#include <asm/io.h>
static u32 mx31_decode_pll(u32 reg, u32 infreq)
{
@@ -90,6 +91,21 @@ void mx31_gpio_mux(unsigned long mode)
__REG(reg) = tmp;
}
void mx31_set_pad(enum iomux_pins pin, u32 config)
{
u32 field, l, reg;
pin &= IOMUX_PADNUM_MASK;
reg = (IOMUXC_BASE + 0x154) + (pin + 2) / 3 * 4;
field = (pin + 2) % 3;
l = __REG(reg);
l &= ~(0x1ff << (field * 10));
l |= config << (field * 10);
__REG(reg) = l;
}
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo (void)
{

View File

@@ -28,6 +28,7 @@
* MA 02111-1307 USA
*/
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
.globl _start
@@ -85,23 +86,39 @@ _end_vect:
*************************************************************************
*/
.globl _TEXT_BASE
_TEXT_BASE:
.word TEXT_BASE
.globl _armboot_start
_armboot_start:
.word _start
.word CONFIG_SYS_TEXT_BASE
/*
* These are defined in the board-specific linker script.
* Subtracting _start from them lets the linker put their
* relative position in the executable instead of leaving
* them null.
*/
.globl _bss_start
_bss_start:
.word __bss_start
.globl _bss_start_ofs
_bss_start_ofs:
.word __bss_start - _start
.globl _bss_end
_bss_end:
.word _end
.globl _bss_end_ofs
_bss_end_ofs:
.word _end - _start
.globl _datarel_start_ofs
_datarel_start_ofs:
.word __datarel_start - _start
.globl _datarelrolocal_start_ofs
_datarelrolocal_start_ofs:
.word __datarelrolocal_start - _start
.globl _datarellocal_start_ofs
_datarellocal_start_ofs:
.word __datarellocal_start - _start
.globl _datarelro_start_ofs
_datarelro_start_ofs:
.word __datarelro_start - _start
#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
@@ -115,6 +132,193 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
#endif
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/*
* the actual reset code
*/
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
#ifdef CONFIG_OMAP2420H4
/* Copy vectors to mask ROM indirect addr */
adr r0, _start /* r0 <- current position of code */
add r0, r0, #4 /* skip reset vector */
mov r2, #64 /* r2 <- size to copy */
add r2, r0, r2 /* r2 <- source end address */
mov r1, #SRAM_OFFSET0 /* build vect addr */
mov r3, #SRAM_OFFSET1
add r1, r1, r3
mov r3, #SRAM_OFFSET2
add r1, r1, r3
next:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
bne next /* loop until equal */
bl cpy_clk_code /* put dpll adjust code behind vectors */
#endif
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
ldr r0,=0x00000000
#ifdef CONFIG_NAND_SPL
bl nand_boot
#else
#ifdef CONFIG_ONENAND_IPL
bl start_oneboot
#else
bl board_init_f
#endif /* CONFIG_ONENAND_IPL */
#endif /* CONFIG_NAND_SPL */
/*------------------------------------------------------------------------------*/
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
*/
.globl relocate_code
relocate_code:
mov r4, r0 /* save addr_sp */
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
mov r7, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
/*
* fix .rel.dyn relocations
*/
ldr r0, _TEXT_BASE /* r0 <- Text base */
sub r9, r7, r0 /* r9 <- relocation offset */
ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
add r10, r10, r0 /* r10 <- sym table in FLASH */
ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
fixloop:
ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
add r0, r0, r9 /* r0 <- location to fix up in RAM */
ldr r1, [r2, #4]
and r8, r1, #0xff
cmp r8, #23 /* relative fixup? */
beq fixrel
cmp r8, #2 /* absolute fixup? */
beq fixabs
/* ignore unknown type of fixup */
b fixnext
fixabs:
/* absolute fix: set location to (offset) symbol value */
mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
add r1, r10, r1 /* r1 <- address of symbol in table */
ldr r1, [r1, #4] /* r1 <- symbol value */
add r1, r9 /* r1 <- relocated sym addr */
b fixnext
fixrel:
/* relative fix: increase location by offset */
ldr r1, [r0]
add r1, r1, r9
fixnext:
str r1, [r0]
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
bne clbss_l
#endif /* #ifndef CONFIG_PRELOADER */
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
#ifdef CONFIG_NAND_SPL
ldr r0, _nand_boot_ofs
adr r1, _start
add pc, r0, r1
_nand_boot_ofs
: .word nand_boot - _start
#else
jump_2_ram:
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
add lr, lr, r9
#endif
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
/* jump to it ... */
mov pc, lr
_board_init_r_ofs:
.word board_init_r - _start
#endif
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
_rel_dyn_end_ofs:
.word __rel_dyn_end - _start
_dynsym_start_ofs:
.word __dynsym_start - _start
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
* the actual reset code
*/
@@ -168,8 +372,8 @@ relocate: /* relocate U-Boot to RAM */
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
/* Set up the stack */
@@ -179,7 +383,7 @@ stack_setup:
sub sp, r0, #128 /* leave 32 words for abort-stack */
#else
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
@@ -188,8 +392,11 @@ stack_setup:
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
ldr r1, _bss_end /* stop here */
adr r2, _start
ldr r0, _bss_start_ofs /* find start of bss segment */
add r0, r0, r2
ldr r1, _bss_end_ofs /* stop here */
add r1, r1, r2
mov r2, #0x00000000 /* clear */
#ifndef CONFIG_PRELOADER
@@ -199,18 +406,24 @@ clbss_l:str r2, [r0] /* clear loop... */
bne clbss_l
#endif
ldr pc, _start_armboot
ldr r0, _start_armboot_ofs
adr r1, _start
add r0, r0, r1
ldr pc, r0
_start_armboot_ofs:
#ifdef CONFIG_NAND_SPL
_start_armboot: .word nand_boot
.word nand_boot - _start
#else
#ifdef CONFIG_ONENAND_IPL
_start_armboot: .word start_oneboot
.word start_oneboot - _start
#else
_start_armboot: .word start_armboot
.word start_armboot - _start
#endif /* CONFIG_ONENAND_IPL */
#endif /* CONFIG_NAND_SPL */
#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
*************************************************************************
*
@@ -295,9 +508,13 @@ cpu_init_crit:
sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
ldr r2, _armboot_start
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort stack
#else
adr r2, _start
sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
#endif
ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
@@ -328,9 +545,13 @@ cpu_init_crit:
.endm
.macro get_bad_stack
ldr r13, _armboot_start @ setup our mode stack (enter in banked mode)
sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter in banked mode)
#else
adr r13, _start @ setup our mode stack (enter in banked mode)
sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ move to reserved a couple spots for abort stack
#endif
str lr, [r13] @ save caller lr in position 0 of saved stack
mrs lr, spsr @ get the spsr
@@ -346,9 +567,13 @@ cpu_init_crit:
.macro get_bad_stack_swi
sub r13, r13, #4 @ space on current stack for scratch reg.
str r0, [r13] @ save R0's value.
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r0, IRQ_STACK_START_IN @ get data regions start
#else
ldr r0, _armboot_start @ get data regions start
sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
sub r0, r0, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack
sub r0, r0, #(GENERATED_GBL_DATA_SIZE+8) @ move past gbl and a couple spots for abort stack
#endif
str lr, [r0] @ save caller lr in position 0 of saved stack
mrs r0, spsr @ get the spsr
str lr, [r0, #4] @ save spsr in position 1 of saved stack
@@ -439,6 +664,11 @@ fiq:
.align 5
.global arm1136_cache_flush
arm1136_cache_flush:
#if !defined(CONFIG_SYS_NO_ICACHE)
mcr p15, 0, r1, c7, c5, 0 @ invalidate I cache
#endif
#if !defined(CONFIG_SYS_NO_DCACHE)
mcr p15, 0, r1, c7, c14, 0 @ invalidate D cache
#endif
mov pc, lr @ back to caller
#endif /* CONFIG_PRELOADER */

View File

@@ -47,10 +47,25 @@ SECTIONS
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
.data : {
*(.data)
__datarel_start = .;
*(.data.rel)
__datarelrolocal_start = .;
*(.data.rel.ro.local)
__datarellocal_start = .;
*(.data.rel.local)
__datarelro_start = .;
*(.data.rel.ro)
}
. = ALIGN(4);
.got : { *(.got) }
__rel_dyn_start = .;
.rel.dyn : { *(.rel.dyn) }
__rel_dyn_end = .;
__dynsym_start = .;
.dynsym : { *(.dynsym) }
. = .;
__u_boot_cmd_start = .;
@@ -61,4 +76,10 @@ SECTIONS
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
/DISCARD/ : { *(.dynstr*) }
/DISCARD/ : { *(.dynamic*) }
/DISCARD/ : { *(.plt*) }
/DISCARD/ : { *(.interp*) }
/DISCARD/ : { *(.gnu*) }
}

View File

@@ -30,6 +30,7 @@
* Base codes by scsuh (sc.suh)
*/
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
#ifdef CONFIG_ENABLE_MMU
@@ -95,8 +96,9 @@ _end_vect:
*************************************************************************
*/
.globl _TEXT_BASE
_TEXT_BASE:
.word TEXT_BASE
.word CONFIG_SYS_TEXT_BASE
/*
* Below variable is very important because we use MMU in U-Boot.
@@ -106,20 +108,60 @@ _TEXT_BASE:
_TEXT_PHY_BASE:
.word CONFIG_SYS_PHY_UBOOT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
_armboot_start:
.word _start
#endif
/*
* These are defined in the board-specific linker script.
* Subtracting _start from them lets the linker put their
* relative position in the executable instead of leaving
* them null.
*/
.globl _bss_start
_bss_start:
.word __bss_start
.globl _bss_end
_bss_end:
.word _end
.globl _bss_start_ofs
_bss_start_ofs:
.word __bss_start - _start
.globl _bss_end_ofs
_bss_end_ofs:
.word _end - _start
.globl _datarel_start_ofs
_datarel_start_ofs:
.word __datarel_start - _start
.globl _datarelrolocal_start_ofs
_datarelrolocal_start_ofs:
.word __datarelrolocal_start - _start
.globl _datarellocal_start_ofs
_datarellocal_start_ofs:
.word __datarellocal_start - _start
.globl _datarelro_start_ofs
_datarelro_start_ofs:
.word __datarelro_start - _start
.globl _rel_dyn_start_ofs
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
.globl _rel_dyn_end_ofs
_rel_dyn_end_ofs:
.word __rel_dyn_end - _start
.globl _dynsym_start_ofs
_dynsym_start_ofs:
.word __dynsym_start - _start
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
/*
* the actual reset code
@@ -172,7 +214,265 @@ cpu_init_crit:
/* Prepare to disable the MMU */
adr r2, mmu_disable_phys
sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - TEXT_BASE)
sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
b mmu_disable
.align 5
/* Run in a single cache-line */
mmu_disable:
mcr p15, 0, r0, c1, c0, 0
nop
nop
mov pc, r2
mmu_disable_phys:
#ifdef CONFIG_DISABLE_TCM
/*
* Disable the TCMs
*/
mrc p15, 0, r0, c0, c0, 2 /* Return TCM details */
cmp r0, #0
beq skip_tcmdisable
mov r1, #0
mov r2, #1
tst r0, r2
mcrne p15, 0, r1, c9, c1, 1 /* Disable Instruction TCM if present*/
tst r0, r2, LSL #16
mcrne p15, 0, r1, c9, c1, 0 /* Disable Data TCM if present*/
skip_tcmdisable:
#endif
#endif
#ifdef CONFIG_PERIPORT_REMAP
/* Peri port setup */
ldr r0, =CONFIG_PERIPORT_BASE
orr r0, r0, #CONFIG_PERIPORT_SIZE
mcr p15,0,r0,c15,c2,4
#endif
/*
* Go setup Memory and board specific bits prior to relocation.
*/
bl lowlevel_init /* go setup pll,mux,memory */
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
ldr r0,=0x00000000
bl board_init_f
/*------------------------------------------------------------------------------*/
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
*/
.globl relocate_code
relocate_code:
mov r4, r0 /* save addr_sp */
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
mov r7, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
/*
* fix .rel.dyn relocations
*/
ldr r0, _TEXT_BASE /* r0 <- Text base */
sub r9, r7, r0 /* r9 <- relocation offset */
ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
add r10, r10, r0 /* r10 <- sym table in FLASH */
ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
fixloop:
ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
add r0, r0, r9 /* r0 <- location to fix up in RAM */
ldr r1, [r2, #4]
and r8, r1, #0xff
cmp r8, #23 /* relative fixup? */
beq fixrel
cmp r8, #2 /* absolute fixup? */
beq fixabs
/* ignore unknown type of fixup */
b fixnext
fixabs:
/* absolute fix: set location to (offset) symbol value */
mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
add r1, r10, r1 /* r1 <- address of symbol in table */
ldr r1, [r1, #4] /* r1 <- symbol value */
add r1, r1, r9 /* r1 <- relocated sym addr */
b fixnext
fixrel:
/* relative fix: increase location by offset */
ldr r1, [r0]
add r1, r1, r9
fixnext:
str r1, [r0]
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
#ifdef CONFIG_ENABLE_MMU
enable_mmu:
/* enable domain access */
ldr r5, =0x0000ffff
mcr p15, 0, r5, c3, c0, 0 /* load domain access register */
/* Set the TTB register */
ldr r0, _mmu_table_base
ldr r1, =CONFIG_SYS_PHY_UBOOT_BASE
ldr r2, =0xfff00000
bic r0, r0, r2
orr r1, r0, r1
mcr p15, 0, r1, c2, c0, 0
/* Enable the MMU */
mrc p15, 0, r0, c1, c0, 0
orr r0, r0, #1 /* Set CR_M to enable MMU */
/* Prepare to enable the MMU */
adr r1, skip_hw_init
and r1, r1, #0x3fc
ldr r2, _TEXT_BASE
ldr r3, =0xfff00000
and r2, r2, r3
orr r2, r2, r1
b mmu_enable
.align 5
/* Run in a single cache-line */
mmu_enable:
mcr p15, 0, r0, c1, c0, 0
nop
nop
mov pc, r2
skip_hw_init:
#endif
clear_bss:
#ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
bne clbss_l
bl coloured_LED_init
bl red_LED_on
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
#ifdef CONFIG_NAND_SPL
ldr pc, _nand_boot
_nand_boot: .word nand_boot
#else
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
add lr, lr, r9
#endif
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
/* jump to it ... */
mov pc, lr
_board_init_r_ofs:
.word board_init_r - _start
#endif
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
* the actual reset code
*/
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0, cpsr
bic r0, r0, #0x3f
orr r0, r0, #0xd3
msr cpsr, r0
/*
*************************************************************************
*
* CPU_init_critical registers
*
* setup important registers
* setup memory timing
*
*************************************************************************
*/
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
cpu_init_crit:
/*
* When booting from NAND - it has definitely been a reset, so, no need
* to flush caches and disable the MMU
*/
#ifndef CONFIG_NAND_SPL
/*
* flush v4 I/D caches
*/
mov r0, #0
mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
/*
* disable MMU stuff and caches
*/
mrc p15, 0, r0, c1, c0, 0
bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
orr r0, r0, #0x00000002 @ set bit 2 (A) Align
orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
/* Prepare to disable the MMU */
adr r2, mmu_disable_phys
sub r2, r2, #(CONFIG_SYS_PHY_UBOOT_BASE - CONFIG_SYS_TEXT_BASE)
b mmu_disable
.align 5
@@ -228,8 +528,8 @@ relocate: /* relocate U-Boot to RAM */
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
#ifdef CONFIG_ENABLE_MMU
@@ -274,7 +574,7 @@ skip_hw_init:
stack_setup:
ldr r0, =CONFIG_SYS_UBOOT_BASE /* base of copy in DRAM */
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
sub sp, r0, #12 /* leave 3 words for abort-stack */
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
@@ -287,7 +587,7 @@ clbss_l:
str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
ble clbss_l
blo clbss_l
#ifndef CONFIG_NAND_SPL
ldr pc, _start_armboot
@@ -299,6 +599,8 @@ _start_armboot:
/* .word nand_boot*/
#endif
#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
#ifdef CONFIG_ENABLE_MMU
_mmu_table_base:
.word mmu_table
@@ -385,10 +687,14 @@ phy_last_jump:
/* Save user registers (now in svc mode) r0-r12 */
stmia sp, {r0 - r12}
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r2, _armboot_start
sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
/* set base 2 words into abort stack */
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8)
sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8)
#else
ldr r2, IRQ_STACK_START_IN
#endif
/* get values for "aborted" pc and cpsr (into parm regs) */
ldmia r2, {r2 - r3}
/* grab pointer to old stack */
@@ -403,12 +709,16 @@ phy_last_jump:
.endm
.macro get_bad_stack
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* setup our mode stack (enter in banked mode) */
ldr r13, _armboot_start
/* move past malloc pool */
sub r13, r13, #(CONFIG_SYS_MALLOC_LEN)
/* move to reserved a couple spots for abort stack */
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE + 8)
sub r13, r13, #(GENERATED_GBL_DATA_SIZE + 8)
#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
#endif
/* save caller lr in position 0 of saved stack */
str lr, [r13]
@@ -433,12 +743,16 @@ phy_last_jump:
sub r13, r13, #4
/* save R0's value. */
str r0, [r13]
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* get data regions start */
ldr r0, _armboot_start
/* move past malloc pool */
sub r0, r0, #(CONFIG_SYS_MALLOC_LEN)
/* move past gbl and a couple spots for abort stack */
sub r0, r0, #(CONFIG_SYS_GBL_DATA_SIZE + 8)
sub r0, r0, #(GENERATED_GBL_DATA_SIZE + 8)
#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
#endif
/* save caller lr in position 0 of saved stack */
str lr, [r0]
/* get the spsr */

View File

@@ -39,10 +39,25 @@ SECTIONS
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
.data : {
*(.data)
__datarel_start = .;
*(.data.rel)
__datarelrolocal_start = .;
*(.data.rel.ro.local)
__datarellocal_start = .;
*(.data.rel.local)
__datarelro_start = .;
*(.data.rel.ro)
}
. = ALIGN(4);
.got : { *(.got) }
__rel_dyn_start = .;
.rel.dyn : { *(.rel.dyn) }
__rel_dyn_end = .;
__dynsym_start = .;
.dynsym : { *(.dynsym) }
. = .;
__u_boot_cmd_start = .;
@@ -53,4 +68,10 @@ SECTIONS
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
/DISCARD/ : { *(.dynstr*) }
/DISCARD/ : { *(.dynamic*) }
/DISCARD/ : { *(.plt*) }
/DISCARD/ : { *(.interp*) }
/DISCARD/ : { *(.gnu*) }
}

View File

@@ -23,7 +23,7 @@
* MA 02111-1307 USA
*/
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
#include <asm/hardware.h>
@@ -75,12 +75,15 @@ _fiq: .word fiq
*************************************************************************
*/
.globl _TEXT_BASE
_TEXT_BASE:
.word TEXT_BASE
.word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
_armboot_start:
.word _start
#endif
/*
* These are defined in the board-specific linker script.
@@ -105,6 +108,163 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
.globl _datarel_start
_datarel_start:
.word __datarel_start
.globl _datarelrolocal_start
_datarelrolocal_start:
.word __datarelrolocal_start
.globl _datarellocal_start
_datarellocal_start:
.word __datarellocal_start
.globl _datarelro_start
_datarelro_start:
.word __datarelro_start
.globl _got_start
_got_start:
.word __got_start
.globl _got_end
_got_end:
.word __got_end
/*
* the actual reset code
*/
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
#ifdef CONFIG_LPC2292
bl lowlevel_init
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
ldr r0,=0x00000000
bl board_init_f
/*------------------------------------------------------------------------------*/
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
*/
.globl relocate_code
relocate_code:
mov r4, r0 /* save addr_sp */
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
mov r7, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
ldr r2, _TEXT_BASE
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address */
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
/* fix got entries */
ldr r1, _TEXT_BASE /* Text base */
mov r0, r7 /* reloc addr */
ldr r2, _got_start /* addr in Flash */
ldr r3, _got_end /* addr in Flash */
sub r3, r3, r1
add r3, r3, r0
sub r2, r2, r1
add r2, r2, r0
fixloop:
ldr r4, [r2]
sub r4, r4, r1
add r4, r4, r0
str r4, [r2]
add r2, r2, #4
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
ldr r0, _bss_start
ldr r1, _bss_end
ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */
sub r0, r0, r3
add r0, r0, r4
sub r1, r1, r3
add r1, r1, r4
mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
bne clbss_l
bl coloured_LED_init
bl red_LED_on
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
ldr r0, _TEXT_BASE
ldr r2, _board_init_r
sub r2, r2, r0
add r2, r2, r7 /* position from board_init_r in RAM */
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
/* jump to it ... */
mov lr, r2
mov pc, lr
_board_init_r: .word board_init_r
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
* the actual reset code
@@ -138,11 +298,11 @@ relocate: /* relocate U-Boot to RAM */
cmp r0, r1 /* don't reloc during debug */
beq stack_setup
#if TEXT_BASE
#if CONFIG_SYS_TEXT_BASE
#ifndef CONFIG_LPC2292 /* already done in lowlevel_init */
ldr r2, =0x0 /* Relocate the exception vectors */
cmp r1, r2 /* and associated data to address */
ldmneia r0!, {r3-r10} /* 0x0. Do nothing if TEXT_BASE is */
ldmneia r0!, {r3-r10} /* 0x0. Do nothing if CONFIG_SYS_TEXT_BASE is */
stmneia r2!, {r3-r10} /* 0x0. Copy the first 15 words. */
ldmneia r0, {r3-r9}
stmneia r2, {r3-r9}
@@ -158,8 +318,8 @@ relocate: /* relocate U-Boot to RAM */
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
@@ -167,7 +327,7 @@ copy_loop:
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
@@ -182,12 +342,14 @@ clear_bss:
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
ble clbss_l
blo clbss_l
ldr pc, _start_armboot
_start_armboot: .word start_armboot
#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
*************************************************************************
*
@@ -444,9 +606,13 @@ lock_loop:
stmia sp, {r0 - r12} @ Calling r0-r12
add r8, sp, #S_PC
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r2, _armboot_start
sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
#else
ldr r2, IRQ_STACK_START_IN
#endif
ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
@@ -477,9 +643,13 @@ lock_loop:
.endm
.macro get_bad_stack
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r13, _armboot_start @ setup our mode stack
sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
#endif
str lr, [r13] @ save caller lr / spsr
mrs lr, spsr
@@ -585,7 +755,7 @@ reset_cpu:
ldr r0, [r1, #+NETARM_MEM_CS0_BASE_ADDR]
ldr r1, =0xFFFFF000
and r0, r1, r0
ldr r1, =(relocate-TEXT_BASE)
ldr r1, =(relocate-CONFIG_SYS_TEXT_BASE)
add r0, r1, r0
ldr r4, =NETARM_GEN_MODULE_BASE
ldr r1, =NETARM_GEN_SW_SVC_RESETA

View File

@@ -39,11 +39,23 @@ SECTIONS
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
.data : {
*(.data)
__datarel_start = .;
*(.data.rel)
__datarelrolocal_start = .;
*(.data.rel.ro.local)
__datarellocal_start = .;
*(.data.rel.local)
__datarelro_start = .;
*(.data.rel.ro)
}
__got_start = .;
. = ALIGN(4);
.got : { *(.got) }
__got_end = .;
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }

View File

@@ -39,9 +39,9 @@
_MTEXT_BASE:
#undef START_FROM_MEM
#ifdef START_FROM_MEM
.word TEXT_BASE-PHYS_FLASH_1
.word CONFIG_SYS_TEXT_BASE-PHYS_FLASH_1
#else
.word TEXT_BASE
.word CONFIG_SYS_TEXT_BASE
#endif
.globl lowlevel_init

View File

@@ -283,7 +283,7 @@ void eth_halt (void)
};
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
int at91rm9200_miiphy_read(char *devname, unsigned char addr,
int at91rm9200_miiphy_read(const char *devname, unsigned char addr,
unsigned char reg, unsigned short * value)
{
at91rm9200_EmacEnableMDIO (p_mac);
@@ -292,7 +292,7 @@ int at91rm9200_miiphy_read(char *devname, unsigned char addr,
return 0;
}
int at91rm9200_miiphy_write(char *devname, unsigned char addr,
int at91rm9200_miiphy_write(const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
at91rm9200_EmacEnableMDIO (p_mac);

View File

@@ -43,9 +43,9 @@
_MTEXT_BASE:
#undef START_FROM_MEM
#ifdef START_FROM_MEM
.word TEXT_BASE-PHYS_FLASH_1
.word CONFIG_SYS_TEXT_BASE-PHYS_FLASH_1
#else
.word TEXT_BASE
.word CONFIG_SYS_TEXT_BASE
#endif
.globl lowlevel_init

View File

@@ -24,6 +24,7 @@
* MA 02111-1307 USA
*/
#include <asm-offsets.h>
#include <common.h>
#include <config.h>
@@ -70,12 +71,15 @@ _fiq: .word fiq
*************************************************************************
*/
.globl _TEXT_BASE
_TEXT_BASE:
.word TEXT_BASE
.word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
_armboot_start:
.word _start
#endif
/*
* These are defined in the board-specific linker script.
@@ -100,7 +104,219 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
.globl _datarel_start
_datarel_start:
.word __datarel_start
.globl _datarelrolocal_start
_datarelrolocal_start:
.word __datarelrolocal_start
.globl _datarellocal_start
_datarellocal_start:
.word __datarellocal_start
.globl _datarelro_start
_datarelro_start:
.word __datarelro_start
.globl _got_start
_got_start:
.word __got_start
.globl _got_end
_got_end:
.word __got_end
/*
* the actual start code
*/
start_code:
/*
* set the cpu to SVC32 mode
*/
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0xd3
msr cpsr, r0
bl coloured_LED_init
bl red_LED_on
#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK)
/*
* relocate exception table
*/
ldr r0, =_start
ldr r1, =0x0
mov r2, #16
copyex:
subs r2, r2, #1
ldr r3, [r0], #4
str r3, [r1], #4
bne copyex
#endif
#ifdef CONFIG_S3C24X0
/* turn off the watchdog */
# if defined(CONFIG_S3C2400)
# define pWTCON 0x15300000
# define INTMSK 0x14400008 /* Interupt-Controller base addresses */
# define CLKDIVN 0x14800014 /* clock divisor register */
#else
# define pWTCON 0x53000000
# define INTMSK 0x4A000008 /* Interupt-Controller base addresses */
# define INTSUBMSK 0x4A00001C
# define CLKDIVN 0x4C000014 /* clock divisor register */
# endif
ldr r0, =pWTCON
mov r1, #0x0
str r1, [r0]
/*
* mask all IRQs by setting all bits in the INTMR - default
*/
mov r1, #0xffffffff
ldr r0, =INTMSK
str r1, [r0]
# if defined(CONFIG_S3C2410)
ldr r1, =0x3ff
ldr r0, =INTSUBMSK
str r1, [r0]
# endif
/* FCLK:HCLK:PCLK = 1:2:4 */
/* default FCLK is 120 MHz ! */
ldr r0, =CLKDIVN
mov r1, #3
str r1, [r0]
#endif /* CONFIG_S3C24X0 */
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
ldr r0,=0x00000000
bl board_init_f
/*------------------------------------------------------------------------------*/
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
*/
.globl relocate_code
relocate_code:
mov r4, r0 /* save addr_sp */
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
mov r7, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
ldr r2, _TEXT_BASE
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address */
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
/* fix got entries */
ldr r1, _TEXT_BASE /* Text base */
mov r0, r7 /* reloc addr */
ldr r2, _got_start /* addr in Flash */
ldr r3, _got_end /* addr in Flash */
sub r3, r3, r1
add r3, r3, r0
sub r2, r2, r1
add r2, r2, r0
fixloop:
ldr r4, [r2]
sub r4, r4, r1
add r4, r4, r0
str r4, [r2]
add r2, r2, #4
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
ldr r0, _bss_start
ldr r1, _bss_end
ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */
sub r0, r0, r3
add r0, r0, r4
sub r1, r1, r3
add r1, r1, r4
mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
bne clbss_l
bl coloured_LED_init
bl red_LED_on
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
#ifdef CONFIG_NAND_SPL
ldr pc, _nand_boot
_nand_boot: .word nand_boot
#else
ldr r0, _TEXT_BASE
ldr r2, _board_init_r
sub r2, r2, r0
add r2, r2, r7 /* position from board_init_r in RAM */
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
/* jump to it ... */
mov lr, r2
mov pc, lr
_board_init_r: .word board_init_r
#endif
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
* the actual start code
*/
@@ -191,15 +407,15 @@ relocate: /* relocate U-Boot to RAM */
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
/* Set up the stack */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
@@ -214,12 +430,12 @@ clear_bss:
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
ble clbss_l
blo clbss_l
ldr pc, _start_armboot
_start_armboot: .word start_armboot
#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
*************************************************************************
@@ -309,11 +525,15 @@ cpu_init_crit:
.macro bad_save_user_regs
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Calling r0-r12
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r2, _armboot_start
sub r2, r2, #(CONFIG_STACKSIZE)
sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
/* set base 2 words into abort stack */
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8)
sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8)
#else
ldr r2, IRQ_STACK_START_IN
#endif
ldmia r2, {r2 - r3} @ get pc, cpsr
add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
@@ -345,11 +565,15 @@ cpu_init_crit:
.endm
.macro get_bad_stack
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r13, _armboot_start @ setup our mode stack
sub r13, r13, #(CONFIG_STACKSIZE)
sub r13, r13, #(CONFIG_SYS_MALLOC_LEN)
/* reserve a couple spots in abort stack */
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8)
sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8)
#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
#endif
str lr, [r13] @ save caller lr / spsr
mrs lr, spsr

View File

@@ -47,11 +47,23 @@ SECTIONS
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
.data : {
*(.data)
__datarel_start = .;
*(.data.rel)
__datarelrolocal_start = .;
*(.data.rel.ro.local)
__datarellocal_start = .;
*(.data.rel.local)
__datarelro_start = .;
*(.data.rel.ro)
}
__got_start = .;
. = ALIGN(4);
.got : { *(.got) }
__got_end = .;
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }

View File

@@ -30,7 +30,7 @@
* MA 02111-1307 USA
*/
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
@@ -81,12 +81,15 @@ _fiq: .word fiq
*************************************************************************
*/
.globl _TEXT_BASE
_TEXT_BASE:
.word TEXT_BASE
.word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
_armboot_start:
.word _start
#endif
/*
* These are defined in the board-specific linker script.
@@ -111,7 +114,198 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
.globl _datarel_start
_datarel_start:
.word __datarel_start
.globl _datarelrolocal_start
_datarelrolocal_start:
.word __datarelrolocal_start
.globl _datarellocal_start
_datarellocal_start:
.word __datarellocal_start
.globl _datarelro_start
_datarelro_start:
.word __datarelro_start
.globl _got_start
_got_start:
.word __got_start
.globl _got_end
_got_end:
.word __got_end
/*
* the actual reset code
*/
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
/*
* Set up 925T mode
*/
mov r1, #0x81 /* Set ARM925T configuration. */
mcr p15, 0, r1, c15, c1, 0 /* Write ARM925T configuration register. */
/*
* turn off the watchdog, unlock/diable sequence
*/
mov r1, #0xF5
ldr r0, =WDTIM_MODE
strh r1, [r0]
mov r1, #0xA0
strh r1, [r0]
/*
* mask all IRQs by setting all bits in the INTMR - default
*/
mov r1, #0xffffffff
ldr r0, =REG_IHL1_MIR
str r1, [r0]
ldr r0, =REG_IHL2_MIR
str r1, [r0]
/*
* wait for dpll to lock
*/
ldr r0, =CK_DPLL1
mov r1, #0x10
strh r1, [r0]
poll1:
ldrh r1, [r0]
ands r1, r1, #0x01
beq poll1
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
ldr r0,=0x00000000
bl board_init_f
/*------------------------------------------------------------------------------*/
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
*/
.globl relocate_code
relocate_code:
mov r4, r0 /* save addr_sp */
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
mov r7, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
ldr r2, _TEXT_BASE
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address */
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
/* fix got entries */
ldr r1, _TEXT_BASE /* Text base */
mov r0, r7 /* reloc addr */
ldr r2, _got_start /* addr in Flash */
ldr r3, _got_end /* addr in Flash */
sub r3, r3, r1
add r3, r3, r0
sub r2, r2, r1
add r2, r2, r0
fixloop:
ldr r4, [r2]
sub r4, r4, r1
add r4, r4, r0
str r4, [r2]
add r2, r2, #4
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
ldr r0, _bss_start
ldr r1, _bss_end
ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */
sub r0, r0, r3
add r0, r0, r4
sub r1, r1, r3
add r1, r1, r4
mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
bne clbss_l
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
#ifdef CONFIG_NAND_SPL
ldr pc, _nand_boot
_nand_boot: .word nand_boot
#else
ldr r0, _TEXT_BASE
ldr r2, _board_init_r
sub r2, r2, r0
add r2, r2, r7 /* position from board_init_r in RAM */
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
/* jump to it ... */
mov lr, r2
mov pc, lr
_board_init_r: .word board_init_r
#endif
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
* the actual reset code
*/
@@ -183,15 +377,15 @@ relocate: /* relocate U-Boot to RAM */
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
/* Set up the stack */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
@@ -206,12 +400,12 @@ clear_bss:
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
ble clbss_l
blo clbss_l
ldr pc, _start_armboot
_start_armboot: .word start_armboot
#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
*************************************************************************
@@ -295,9 +489,13 @@ cpu_init_crit:
sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r2, _armboot_start
sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
#else
ldr r2, IRQ_STACK_START_IN
#endif
ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
@@ -328,9 +526,13 @@ cpu_init_crit:
.endm
.macro get_bad_stack
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r13, _armboot_start @ setup our mode stack
sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
#else
ldr r13, IRQ_STACK_START_IN
#endif
str lr, [r13] @ save caller lr in position 0 of saved stack
mrs lr, spsr @ get the spsr

View File

@@ -42,11 +42,23 @@ SECTIONS
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
.data : {
*(.data)
__datarel_start = .;
*(.data.rel)
__datarelrolocal_start = .;
*(.data.rel.ro.local)
__datarellocal_start = .;
*(.data.rel.local)
__datarelro_start = .;
*(.data.rel.ro)
}
__got_start = .;
. = ALIGN(4);
.got : { *(.got) }
__got_end = .;
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }

View File

@@ -34,6 +34,7 @@ COBJS-$(CONFIG_AT91SAM9263) += at91sam9263_devices.o
COBJS-$(CONFIG_AT91SAM9RL) += at91sam9rl_devices.o
COBJS-$(CONFIG_AT91SAM9M10G45) += at91sam9m10g45_devices.o
COBJS-$(CONFIG_AT91SAM9G45) += at91sam9m10g45_devices.o
COBJS-$(CONFIG_AT91_EFLASH) += eflash.o
COBJS-$(CONFIG_AT91_LED) += led.o
COBJS-y += clock.o
COBJS-y += cpu.o

View File

@@ -28,12 +28,27 @@
#include <asm/arch/gpio.h>
#include <asm/arch/io.h>
/*
* if CONFIG_AT91_GPIO_PULLUP ist set, keep pullups on on all
* peripheral pins. Good to have if hardware is soldered optionally
* or in case of SPI no slave is selected. Avoid lines to float
* needlessly. Use a short local PUP define.
*
* Due to errata "TXD floats when CTS is inactive" pullups are always
* on for TXD pins.
*/
#ifdef CONFIG_AT91_GPIO_PULLUP
# define PUP CONFIG_AT91_GPIO_PULLUP
#else
# define PUP 0
#endif
void at91_serial0_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_set_a_periph(AT91_PIO_PORTB, 4, 1); /* TXD0 */
at91_set_a_periph(AT91_PIO_PORTB, 5, 0); /* RXD0 */
at91_set_a_periph(AT91_PIO_PORTB, 5, PUP); /* RXD0 */
writel(1 << AT91SAM9260_ID_US0, &pmc->pcer);
}
@@ -42,7 +57,7 @@ void at91_serial1_hw_init(void)
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_set_a_periph(AT91_PIO_PORTB, 6, 1); /* TXD1 */
at91_set_a_periph(AT91_PIO_PORTB, 7, 0); /* RXD1 */
at91_set_a_periph(AT91_PIO_PORTB, 7, PUP); /* RXD1 */
writel(1 << AT91SAM9260_ID_US1, &pmc->pcer);
}
@@ -51,7 +66,7 @@ void at91_serial2_hw_init(void)
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_set_a_periph(AT91_PIO_PORTB, 8, 1); /* TXD2 */
at91_set_a_periph(AT91_PIO_PORTB, 9, 0); /* RXD2 */
at91_set_a_periph(AT91_PIO_PORTB, 9, PUP); /* RXD2 */
writel(1 << AT91SAM9260_ID_US2, &pmc->pcer);
}
@@ -59,7 +74,7 @@ void at91_serial3_hw_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_set_a_periph(AT91_PIO_PORTB, 14, 0); /* DRXD */
at91_set_a_periph(AT91_PIO_PORTB, 14, PUP); /* DRXD */
at91_set_a_periph(AT91_PIO_PORTB, 15, 1); /* DTXD */
writel(1 << AT91_ID_SYS, &pmc->pcer);
}
@@ -88,9 +103,9 @@ void at91_spi0_hw_init(unsigned long cs_mask)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_set_a_periph(AT91_PIO_PORTA, 0, 0); /* SPI0_MISO */
at91_set_a_periph(AT91_PIO_PORTA, 1, 0); /* SPI0_MOSI */
at91_set_a_periph(AT91_PIO_PORTA, 2, 0); /* SPI0_SPCK */
at91_set_a_periph(AT91_PIO_PORTA, 0, PUP); /* SPI0_MISO */
at91_set_a_periph(AT91_PIO_PORTA, 1, PUP); /* SPI0_MOSI */
at91_set_a_periph(AT91_PIO_PORTA, 2, PUP); /* SPI0_SPCK */
/* Enable clock */
writel(1 << AT91SAM9260_ID_SPI0, &pmc->pcer);
@@ -125,9 +140,9 @@ void at91_spi1_hw_init(unsigned long cs_mask)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_set_a_periph(AT91_PIO_PORTB, 0, 0); /* SPI1_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 1, 0); /* SPI1_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 2, 0); /* SPI1_SPCK */
at91_set_a_periph(AT91_PIO_PORTB, 0, PUP); /* SPI1_MISO */
at91_set_a_periph(AT91_PIO_PORTB, 1, PUP); /* SPI1_MOSI */
at91_set_a_periph(AT91_PIO_PORTB, 2, PUP); /* SPI1_SPCK */
/* Enable clock */
writel(1 << AT91SAM9260_ID_SPI1, &pmc->pcer);
@@ -194,3 +209,23 @@ void at91_macb_hw_init(void)
#endif
}
#endif
#if defined(CONFIG_ATMEL_MCI) || defined(CONFIG_GENERIC_ATMEL_MCI)
void at91_mci_hw_init(void)
{
at91_set_a_periph(AT91_PIO_PORTA, 8, 1); /* MCCK */
#if defined(CONFIG_ATMEL_MCI_PORTB)
at91_set_b_periph(AT91_PIO_PORTA, 1, 1); /* MCCDB */
at91_set_b_periph(AT91_PIO_PORTA, 0, 1); /* MCDB0 */
at91_set_b_periph(AT91_PIO_PORTA, 5, 1); /* MCDB1 */
at91_set_b_periph(AT91_PIO_PORTA, 4, 1); /* MCDB2 */
at91_set_b_periph(AT91_PIO_PORTA, 3, 1); /* MCDB3 */
#else
at91_set_a_periph(AT91_PIO_PORTA, 7, 1); /* MCCDA */
at91_set_a_periph(AT91_PIO_PORTA, 6, 1); /* MCDA0 */
at91_set_a_periph(AT91_PIO_PORTA, 9, 1); /* MCDA1 */
at91_set_a_periph(AT91_PIO_PORTA, 10, 1); /* MCDA2 */
at91_set_a_periph(AT91_PIO_PORTA, 11, 1); /* MCDA3 */
#endif
}
#endif

View File

@@ -11,47 +11,46 @@
* (at your option) any later version.
*/
#include <config.h>
#include <common.h>
#include <asm/arch/hardware.h>
#include <asm/arch/io.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/clk.h>
static unsigned long cpu_clk_rate_hz;
static unsigned long main_clk_rate_hz;
static unsigned long mck_rate_hz;
static unsigned long plla_rate_hz;
static unsigned long pllb_rate_hz;
static u32 at91_pllb_usb_init;
#if !defined(CONFIG_AT91FAMILY)
# error You need to define CONFIG_AT91FAMILY in your board config!
#endif
DECLARE_GLOBAL_DATA_PTR;
unsigned long get_cpu_clk_rate(void)
{
return cpu_clk_rate_hz;
return gd->cpu_clk_rate_hz;
}
unsigned long get_main_clk_rate(void)
{
return main_clk_rate_hz;
return gd->main_clk_rate_hz;
}
unsigned long get_mck_clk_rate(void)
{
return mck_rate_hz;
return gd->mck_rate_hz;
}
unsigned long get_plla_clk_rate(void)
{
return plla_rate_hz;
return gd->plla_rate_hz;
}
unsigned long get_pllb_clk_rate(void)
{
return pllb_rate_hz;
return gd->pllb_rate_hz;
}
u32 get_pllb_init(void)
{
return at91_pllb_usb_init;
return gd->at91_pllb_usb_init;
}
static unsigned long at91_css_to_rate(unsigned long css)
@@ -60,11 +59,11 @@ static unsigned long at91_css_to_rate(unsigned long css)
case AT91_PMC_MCKR_CSS_SLOW:
return AT91_SLOW_CLOCK;
case AT91_PMC_MCKR_CSS_MAIN:
return main_clk_rate_hz;
return gd->main_clk_rate_hz;
case AT91_PMC_MCKR_CSS_PLLA:
return plla_rate_hz;
return gd->plla_rate_hz;
case AT91_PMC_MCKR_CSS_PLLB:
return pllb_rate_hz;
return gd->pllb_rate_hz;
}
return 0;
@@ -163,10 +162,10 @@ int at91_clock_init(unsigned long main_clock)
main_clock = tmp * (AT91_SLOW_CLOCK / 16);
}
#endif
main_clk_rate_hz = main_clock;
gd->main_clk_rate_hz = main_clock;
/* report if PLLA is more than mildly overclocked */
plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar));
gd->plla_rate_hz = at91_pll_rate(main_clock, readl(&pmc->pllar));
#ifdef CONFIG_USB_ATMEL
/*
@@ -175,9 +174,9 @@ int at91_clock_init(unsigned long main_clock)
*
* REVISIT: assumes MCK doesn't derive from PLLB!
*/
at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) |
gd->at91_pllb_usb_init = at91_pll_calc(main_clock, 48000000 * 2) |
AT91_PMC_PLLBR_USBDIV_2;
pllb_rate_hz = at91_pll_rate(main_clock, at91_pllb_usb_init);
gd->pllb_rate_hz = at91_pll_rate(main_clock, gd->at91_pllb_usb_init);
#endif
/*
@@ -187,30 +186,30 @@ int at91_clock_init(unsigned long main_clock)
mckr = readl(&pmc->mckr);
#if defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
/* plla divisor by 2 */
plla_rate_hz /= (1 << ((mckr & 1 << 12) >> 12));
gd->plla_rate_hz /= (1 << ((mckr & 1 << 12) >> 12));
#endif
mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
freq = mck_rate_hz;
gd->mck_rate_hz = at91_css_to_rate(mckr & AT91_PMC_MCKR_CSS_MASK);
freq = gd->mck_rate_hz;
freq /= (1 << ((mckr & AT91_PMC_MCKR_PRES_MASK) >> 2)); /* prescale */
#if defined(CONFIG_AT91RM9200)
/* mdiv */
mck_rate_hz = freq / (1 + ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
gd->mck_rate_hz = freq / (1 + ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
#elif defined(CONFIG_AT91SAM9G20)
/* mdiv ; (x >> 7) = ((x >> 8) * 2) */
mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ?
gd->mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ?
freq / ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 7) : freq;
if (mckr & AT91_PMC_MCKR_MDIV_MASK)
freq /= 2; /* processor clock division */
#elif defined(CONFIG_AT91SAM9G45) || defined(CONFIG_AT91SAM9M10G45)
mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ==
gd->mck_rate_hz = (mckr & AT91_PMC_MCKR_MDIV_MASK) ==
(AT91_PMC_MCKR_MDIV_2 | AT91_PMC_MCKR_MDIV_4)
? freq / 3
: freq / (1 << ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
#else
mck_rate_hz = freq / (1 << ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
gd->mck_rate_hz = freq / (1 << ((mckr & AT91_PMC_MCKR_MDIV_MASK) >> 8));
#endif
cpu_clk_rate_hz = freq;
gd->cpu_clk_rate_hz = freq;
return 0;
}

View File

@@ -1,4 +1,6 @@
/*
* (C) Copyright 2010
* Reinhard Meyer, reinhard.meyer@emk-elektronik.de
* (C) Copyright 2009
* Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
*
@@ -22,12 +24,11 @@
*/
#include <common.h>
#ifdef CONFIG_AT91_LEGACY
#warning Your board is using legacy SoC access. Please update!
#endif
#include <asm/arch/hardware.h>
#include <asm/arch/at91_pmc.h>
#include <asm/arch/at91_pit.h>
#include <asm/arch/at91_gpbr.h>
#include <asm/arch/clk.h>
#include <asm/arch/io.h>
@@ -35,18 +36,26 @@
#define CONFIG_SYS_AT91_MAIN_CLOCK 0
#endif
/*
* The at91sam9260 has 4 GPBR (0-3), we'll use the last one, nr 3,
* to keep track of the bootcount.
*/
#define AT91_GPBR_BOOTCOUNT_REGISTER 3
#define AT91_BOOTCOUNT_ADDRESS (AT91_GPBR + 4*AT91_GPBR_BOOTCOUNT_REGISTER)
int arch_cpu_init(void)
{
return at91_clock_init(CONFIG_SYS_AT91_MAIN_CLOCK);
}
void arch_preboot_os(void)
{
ulong cpiv;
at91_pit_t *pit = (at91_pit_t *) AT91_PIT_BASE;
cpiv = AT91_PIT_MR_PIV_MASK(readl(&pit->piir));
/*
* Disable PITC
* Add 0x1000 to current counter to stop it faster
* without waiting for wrapping back to 0
*/
writel(cpiv + 0x1000, &pit->mr);
}
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
@@ -66,27 +75,26 @@ int print_cpuinfo(void)
#ifdef CONFIG_BOOTCOUNT_LIMIT
/*
* Just as the mpc5xxx, we combine the BOOTCOUNT_MAGIC and boocount
* in one 32-bit register. This is done, as the AT91SAM9260 only has
* 4 GPBR.
* We combine the BOOTCOUNT_MAGIC and bootcount in one 32-bit register.
* This is done so we need to use only one of the four GPBR registers.
*/
void bootcount_store (ulong a)
{
volatile ulong *save_addr =
(volatile ulong *)(AT91_BASE_SYS + AT91_BOOTCOUNT_ADDRESS);
at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
*save_addr = (BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff);
writel((BOOTCOUNT_MAGIC & 0xffff0000) | (a & 0x0000ffff),
&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
}
ulong bootcount_load (void)
{
volatile ulong *save_addr =
(volatile ulong *)(AT91_BASE_SYS + AT91_BOOTCOUNT_ADDRESS);
at91_gpbr_t *gpbr = (at91_gpbr_t *) AT91_GPR_BASE;
if ((*save_addr & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
ulong val = readl(&gpbr->reg[AT91_GPBR_INDEX_BOOTCOUNT]);
if ((val & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
return 0;
else
return (*save_addr & 0x0000ffff);
return val & 0x0000ffff;
}
#endif /* CONFIG_BOOTCOUNT_LIMIT */

View File

@@ -0,0 +1,270 @@
/*
* (C) Copyright 2010
* Reinhard Meyer, EMK Elektronik, reinhard.meyer@emk-elektronik.de
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/*
* this driver supports the enhanced embedded flash in the Atmel
* AT91SAM9XE devices with the following geometry:
*
* AT91SAM9XE128: 1 plane of 8 regions of 32 pages (total 256 pages)
* AT91SAM9XE256: 1 plane of 16 regions of 32 pages (total 512 pages)
* AT91SAM9XE512: 1 plane of 32 regions of 32 pages (total 1024 pages)
* (the exact geometry is read from the flash at runtime, so any
* future devices should already be covered)
*
* Regions can be write/erase protected.
* Whole (!) pages can be individually written with erase on the fly.
* Writing partial pages will corrupt the rest of the page.
*
* The flash is presented to u-boot with each region being a sector,
* having the following effects:
* Each sector can be hardware protected (protect on/off).
* Each page in a sector can be rewritten anytime.
* Since pages are erased when written, the "erase" does nothing.
* The first "CONFIG_EFLASH_PROTSECTORS" cannot be unprotected
* by u-Boot commands.
*
* Note: Redundant environment will not work in this flash since
* it does use partial page writes. Make sure the environent spans
* whole pages!
*/
/*
* optional TODOs (nice to have features):
*
* make the driver coexist with other NOR flash drivers
* (use an index into flash_info[], requires work
* in those other drivers, too)
* Make the erase command fill the sectors with 0xff
* (if the flashes grow larger in the future and
* someone puts a jffs2 into them)
* do a read-modify-write for partially programmed pages
*/
#include <common.h>
#include <asm/arch/hardware.h>
#include <asm/arch/io.h>
#include <asm/arch/at91_common.h>
#include <asm/arch/at91_eefc.h>
#include <asm/arch/at91_dbu.h>
/* checks to detect configuration errors */
#if CONFIG_SYS_MAX_FLASH_BANKS!=1
#error eflash: this driver can only handle 1 bank
#endif
/* global structure */
flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS];
static u32 pagesize;
unsigned long flash_init (void)
{
at91_eefc_t *eefc = (at91_eefc_t *) 0xfffffa00;
at91_dbu_t *dbu = (at91_dbu_t *) 0xfffff200;
u32 id, size, nplanes, planesize, nlocks;
u32 addr, i, tmp=0;
debug("eflash: init\n");
flash_info[0].flash_id = FLASH_UNKNOWN;
/* check if its an AT91ARM9XE SoC */
if ((readl(&dbu->cidr) & AT91_DBU_CID_ARCH_MASK) != AT91_DBU_CID_ARCH_9XExx) {
puts("eflash: not an AT91SAM9XE\n");
return 0;
}
/* now query the eflash for its structure */
writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_GETD, &eefc->fcr);
while ((readl(&eefc->fsr) & AT91_EEFC_FSR_FRDY) == 0)
;
id = readl(&eefc->frr); /* word 0 */
size = readl(&eefc->frr); /* word 1 */
pagesize = readl(&eefc->frr); /* word 2 */
nplanes = readl(&eefc->frr); /* word 3 */
planesize = readl(&eefc->frr); /* word 4 */
debug("id=%08x size=%u pagesize=%u planes=%u planesize=%u\n",
id, size, pagesize, nplanes, planesize);
for (i=1; i<nplanes; i++) {
tmp = readl(&eefc->frr); /* words 5..4+nplanes-1 */
};
nlocks = readl(&eefc->frr); /* word 4+nplanes */
debug("nlocks=%u\n", nlocks);
/* since we are going to use the lock regions as sectors, check count */
if (nlocks > CONFIG_SYS_MAX_FLASH_SECT) {
printf("eflash: number of lock regions(%u) "\
"> CONFIG_SYS_MAX_FLASH_SECT. reducing...\n",
nlocks);
nlocks = CONFIG_SYS_MAX_FLASH_SECT;
}
flash_info[0].size = size;
flash_info[0].sector_count = nlocks;
flash_info[0].flash_id = id;
addr = AT91SAM9XE_FLASH_BASE;
for (i=0; i<nlocks; i++) {
tmp = readl(&eefc->frr); /* words 4+nplanes+1.. */
flash_info[0].start[i] = addr;
flash_info[0].protect[i] = 0;
addr += tmp;
};
/* now read the protection information for all regions */
writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_GLB, &eefc->fcr);
while ((readl(&eefc->fsr) & AT91_EEFC_FSR_FRDY) == 0)
;
for (i=0; i<flash_info[0].sector_count; i++) {
if (i%32 == 0)
tmp = readl(&eefc->frr);
flash_info[0].protect[i] = (tmp >> (i%32)) & 1;
#if defined(CONFIG_EFLASH_PROTSECTORS)
if (i < CONFIG_EFLASH_PROTSECTORS)
flash_info[0].protect[i] = 1;
#endif
}
return size;
}
void flash_print_info (flash_info_t *info)
{
int i;
puts("AT91SAM9XE embedded flash\n Size: ");
print_size(info->size, " in ");
printf("%d Sectors\n", info->sector_count);
printf(" Sector Start Addresses:");
for (i=0; i<info->sector_count; ++i) {
if ((i % 5) == 0)
printf("\n ");
printf(" %08lX%s",
info->start[i],
info->protect[i] ? " (RO)" : " "
);
}
printf ("\n");
return;
}
int flash_real_protect (flash_info_t *info, long sector, int prot)
{
at91_eefc_t *eefc = (at91_eefc_t *) 0xfffffa00;
u32 pagenum = (info->start[sector]-AT91SAM9XE_FLASH_BASE)/pagesize;
u32 i, tmp=0;
debug("protect sector=%ld prot=%d\n", sector, prot);
#if defined(CONFIG_EFLASH_PROTSECTORS)
if (sector < CONFIG_EFLASH_PROTSECTORS) {
if (!prot) {
printf("eflash: sector %lu cannot be unprotected\n",
sector);
}
return 1; /* return anyway, caller does not care for result */
}
#endif
if (prot) {
writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_SLB |
(pagenum << AT91_EEFC_FCR_FARG_SHIFT), &eefc->fcr);
} else {
writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_CLB |
(pagenum << AT91_EEFC_FCR_FARG_SHIFT), &eefc->fcr);
}
while ((readl(&eefc->fsr) & AT91_EEFC_FSR_FRDY) == 0)
;
/* now re-read the protection information for all regions */
writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_GLB, &eefc->fcr);
while ((readl(&eefc->fsr) & AT91_EEFC_FSR_FRDY) == 0)
;
for (i=0; i<info->sector_count; i++) {
if (i%32 == 0)
tmp = readl(&eefc->frr);
info->protect[i] = (tmp >> (i%32)) & 1;
}
return 0;
}
static u32 erase_write_page (u32 pagenum)
{
at91_eefc_t *eefc = (at91_eefc_t *) 0xfffffa00;
debug("erase+write page=%u\n", pagenum);
/* give erase and write page command */
writel(AT91_EEFC_FCR_KEY | AT91_EEFC_FCR_FCMD_EWP |
(pagenum << AT91_EEFC_FCR_FARG_SHIFT), &eefc->fcr);
while ((readl(&eefc->fsr) & AT91_EEFC_FSR_FRDY) == 0)
;
/* return status */
return readl(&eefc->fsr)
& (AT91_EEFC_FSR_FCMDE | AT91_EEFC_FSR_FLOCKE);
}
int flash_erase (flash_info_t *info, int s_first, int s_last)
{
debug("erase first=%d last=%d\n", s_first, s_last);
puts("this flash does not need and support erasing!\n");
return 0;
}
/*
* Copy memory to flash, returns:
* 0 - OK
* 1 - write timeout
*/
int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
{
u32 pagenum;
u32 *src32, *dst32;
u32 i;
debug("write src=%08lx addr=%08lx cnt=%lx\n",
(ulong)src, addr, cnt);
/* REQUIRE addr to be on a page start, abort if not */
if (addr % pagesize) {
printf ("eflash: start %08lx is not on page start\n"\
" write aborted\n", addr);
return 1;
}
/* now start copying data */
pagenum = (addr-AT91SAM9XE_FLASH_BASE)/pagesize;
src32 = (u32 *) src;
dst32 = (u32 *) addr;
while (cnt > 0) {
i = pagesize / 4;
/* fill page buffer */
while (i--)
*dst32++ = *src32++;
/* write page */
if (erase_write_page(pagenum))
return 1;
pagenum++;
if (cnt > pagesize)
cnt -= pagesize;
else
cnt = 0;
}
return 0;
}

View File

@@ -43,7 +43,7 @@
#endif
_TEXT_BASE:
.word TEXT_BASE
.word CONFIG_SYS_TEXT_BASE
.globl lowlevel_init
.type lowlevel_init,function
@@ -54,7 +54,7 @@ POS1:
ldr r0, =POS1 /* r0 = POS1 compile */
ldr r2, _TEXT_BASE
sub r0, r0, r2 /* r0 = POS1-_TEXT_BASE (POS1 relative) */
sub r5, r5, r0 /* r0 = TEXT_BASE-1 */
sub r5, r5, r0 /* r0 = CONFIG_SYS_TEXT_BASE-1 */
sub r5, r5, #4 /* r1 = text base - current */
/* memory control configuration 1 */

View File

@@ -27,18 +27,19 @@
#include <asm/arch/at91_rstc.h>
#include <asm/arch/io.h>
/*
* Reset the cpu by setting up the watchdog timer and let him time out.
*/
/* Reset the cpu by telling the reset controller to do so */
void reset_cpu(ulong ignored)
{
at91_rstc_t *rstc = (at91_rstc_t *) AT91_RSTC_BASE;
/* this is the way Linux does it */
writel(AT91_RSTC_KEY | AT91_RSTC_CR_PROCRST | AT91_RSTC_CR_PERRST,
&rstc->cr);
while (1);
/* Never reached */
writel(AT91_RSTC_KEY
| AT91_RSTC_CR_PROCRST /* Processor Reset */
| AT91_RSTC_CR_PERRST /* Peripheral Reset */
#ifdef CONFIG_AT91RESET_EXTRST
| AT91_RSTC_CR_EXTRST /* External Reset (assert nRST pin) */
#endif
, &rstc->cr);
/* never reached */
while (1)
;
}

View File

@@ -30,55 +30,63 @@
#include <asm/arch/io.h>
#include <div64.h>
#if !defined(CONFIG_AT91FAMILY)
# error You need to define CONFIG_AT91FAMILY in your board config!
#endif
DECLARE_GLOBAL_DATA_PTR;
/*
* We're using the AT91CAP9/SAM9 PITC in 32 bit mode, by
* setting the 20 bit counter period to its maximum (0xfffff).
* (See the relevant data sheets to understand that this really works)
*
* We do also mimic the typical powerpc way of incrementing
* two 32 bit registers called tbl and tbu.
*
* Those registers increment at 1/16 the main clock rate.
*/
#define TIMER_LOAD_VAL 0xfffff
static ulong timestamp;
static ulong lastinc;
static ulong timer_freq;
#define TIMER_LOAD_VAL 0xfffff
static inline unsigned long long tick_to_time(unsigned long long tick)
{
tick *= CONFIG_SYS_HZ;
do_div(tick, timer_freq);
do_div(tick, gd->timer_rate_hz);
return tick;
}
static inline unsigned long long usec_to_tick(unsigned long long usec)
{
usec *= timer_freq;
usec *= gd->timer_rate_hz;
do_div(usec, 1000000);
return usec;
}
/* nothing really to do with interrupts, just starts up a counter. */
/*
* Use the PITC in full 32 bit incrementing mode
*/
int timer_init(void)
{
at91_pmc_t *pmc = (at91_pmc_t *) AT91_PMC_BASE;
at91_pit_t *pit = (at91_pit_t *) AT91_PIT_BASE;
/*
* Enable PITC Clock
* The clock is already enabled for system controller in boot
*/
/* Enable PITC Clock */
writel(1 << AT91_ID_SYS, &pmc->pcer);
/* Enable PITC */
writel(TIMER_LOAD_VAL | AT91_PIT_MR_EN , &pit->mr);
reset_timer_masked();
timer_freq = get_mck_clk_rate() >> 4;
gd->timer_rate_hz = gd->mck_rate_hz / 16;
gd->tbu = gd->tbl = 0;
return 0;
}
/*
* timer without interrupts
* Get the current 64 bit timer tick count
*/
unsigned long long get_ticks(void)
{
@@ -86,28 +94,11 @@ unsigned long long get_ticks(void)
ulong now = readl(&pit->piir);
if (now >= lastinc) /* normal mode (non roll) */
/* move stamp forward with absolut diff ticks */
timestamp += (now - lastinc);
else /* we have rollover of incrementer */
timestamp += (0xFFFFFFFF - lastinc) + now;
lastinc = now;
return timestamp;
}
void reset_timer_masked(void)
{
/* reset time */
at91_pit_t *pit = (at91_pit_t *) AT91_PIT_BASE;
/* capture current incrementer value time */
lastinc = readl(&pit->piir);
timestamp = 0; /* start "advancing" time stamp from 0 */
}
ulong get_timer_masked(void)
{
return tick_to_time(get_ticks());
/* increment tbu if tbl has rolled over */
if (now < gd->tbl)
gd->tbu++;
gd->tbl = now;
return (((unsigned long long)gd->tbu) << 32) | gd->tbl;
}
void __udelay(unsigned long usec)
@@ -119,27 +110,32 @@ void __udelay(unsigned long usec)
tmp = get_ticks() + tmo; /* get current timestamp */
while (get_ticks() < tmp) /* loop till event */
/*NOP*/;
;
}
/*
* reset_timer() and get_timer(base) are a pair of functions that are used by
* some timeout/sleep mechanisms in u-boot.
*
* reset_timer() marks the current time as epoch and
* get_timer(base) works relative to that epoch.
*
* The time is used in CONFIG_SYS_HZ units!
*/
void reset_timer(void)
{
reset_timer_masked();
gd->timer_reset_value = get_ticks();
}
ulong get_timer(ulong base)
{
return get_timer_masked () - base;
return tick_to_time(get_ticks() - gd->timer_reset_value) - base;
}
/*
* This function is derived from PowerPC code (timebase clock frequency).
* On ARM it returns the number of timer ticks per second.
* Return the number of timer ticks per second.
*/
ulong get_tbclk(void)
{
ulong tbclk;
tbclk = CONFIG_SYS_HZ;
return tbclk;
return gd->timer_rate_hz;
}

View File

@@ -54,10 +54,11 @@ unsigned char get_random_hex(void)
u8 outbuf[BUFLEN];
/*
* in case of 88F6281/88F6192 A0,
* in case of 88F6281/88F6282/88F6192 A0,
* Bit7 need to reset to generate random values in KW_REG_UNDOC_0x1470
* Soc reg offsets KW_REG_UNDOC_0x1470 and KW_REG_UNDOC_0x1478 are reserved regs and
* Does not have names at this moment (no errata available)
* Soc reg offsets KW_REG_UNDOC_0x1470 and KW_REG_UNDOC_0x1478 are
* reserved regs and does not have names at this moment
* (no errata available)
*/
writel(readl(KW_REG_UNDOC_0x1478) & ~(1 << 7), KW_REG_UNDOC_0x1478);
for (i = 0; i < BUFLEN; i++) {
@@ -81,7 +82,7 @@ unsigned int kw_winctrl_calcsize(unsigned int sizeval)
unsigned int j = 0;
u32 val = sizeval >> 1;
for (i = 0; val > 0x10000; i++) {
for (i = 0; val >= 0x10000; i++) {
j |= (1 << i);
val = val >> 1;
}
@@ -271,20 +272,31 @@ static void kw_sysrst_check(void)
#if defined(CONFIG_DISPLAY_CPUINFO)
int print_cpuinfo(void)
{
char *name = "Unknown";
char *rev;
u16 devid = (readl(KW_REG_PCIE_DEVID) >> 16) & 0xffff;
u8 revid = readl(KW_REG_PCIE_REVID) & 0xff;
switch (readl(KW_REG_DEVICE_ID) & 0x03) {
case 1:
name = "88F6192_A0";
break;
case 2:
name = "88F6281_A0";
break;
default:
printf("SoC: Unsupported Kirkwood\n");
if ((readl(KW_REG_DEVICE_ID) & 0x03) > 2) {
printf("Error.. %s:Unsupported Kirkwood SoC 88F%04x\n", __FUNCTION__, devid);
return -1;
}
printf("SoC: Kirkwood %s\n", name);
switch (revid) {
case 0:
rev = "Z0";
break;
case 2:
rev = "A0";
break;
case 3:
rev = "A1";
break;
default:
rev = "??";
break;
}
printf("SoC: Kirkwood 88F%04x_%s\n", devid, rev);
return 0;
}
#endif /* CONFIG_DISPLAY_CPUINFO */
@@ -378,10 +390,10 @@ int arch_misc_init(void)
}
#endif /* CONFIG_ARCH_MISC_INIT */
#ifdef CONFIG_KIRKWOOD_EGIGA
#ifdef CONFIG_MVGBE
int cpu_eth_init(bd_t *bis)
{
kirkwood_egiga_initialize(bis);
mvgbe_initialize(bis);
return 0;
}
#endif

View File

@@ -23,8 +23,11 @@
*/
#include <config.h>
#include <common.h>
#include <asm/arch/kirkwood.h>
DECLARE_GLOBAL_DATA_PTR;
#define KW_REG_CPUCS_WIN_BAR(x) (KW_REGISTER(0x1500) + (x * 0x08))
#define KW_REG_CPUCS_WIN_SZ(x) (KW_REGISTER(0x1504) + (x * 0x08))
/*
@@ -56,3 +59,37 @@ u32 kw_sdram_bs(enum memory_bank bank)
result += 0x01000000;
return result;
}
#ifndef CONFIG_SYS_BOARD_DRAM_INIT
int dram_init(void)
{
int i;
gd->ram_size = 0;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
gd->bd->bi_dram[i].start = kw_sdram_bar(i);
gd->bd->bi_dram[i].size = kw_sdram_bs(i);
/*
* It is assumed that all memory banks are consecutive
* and without gaps.
* If the gap is found, ram_size will be reported for
* consecutive memory only
*/
if (gd->bd->bi_dram[i].start != gd->ram_size)
break;
gd->ram_size += gd->bd->bi_dram[i].size;
}
return 0;
}
/*
* If this function is not defined here,
* board.c alters dram bank zero configuration defined above.
*/
void dram_init_banksize(void)
{
dram_init();
}
#endif /* CONFIG_SYS_BOARD_DRAM_INIT */

View File

@@ -0,0 +1,47 @@
#
# (C) Copyright 2000-2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
COBJS = clock.o reset.o timer.o
SOBJS =
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
START := $(addprefix $(obj),$(START))
all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -0,0 +1,43 @@
/*
* (C) Copyright 2010
* Matthias Weisser <weisserm@arcor.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
/*
* Get the peripheral bus frequency depending on pll pin settings
*/
ulong get_bus_freq(ulong dummy)
{
struct mb86r0x_crg * crg = (struct mb86r0x_crg *)
MB86R0x_CRG_BASE;
uint32_t pllmode;
pllmode = readl(&crg->crpr) & MB86R0x_CRG_CRPR_PLLMODE;
if (pllmode == MB86R0x_CRG_CRPR_PLLMODE_X20)
return 40000000;
return 41164767;
}

View File

@@ -0,0 +1,40 @@
/*
* (C) Copyright 2010
* Matthias Weisser <weisserm@arcor.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
/*
* Reset the cpu by setting software reset request bit
*/
void reset_cpu(ulong ignored)
{
struct mb86r0x_crg * crg = (struct mb86r0x_crg *)
MB86R0x_CRG_BASE;
writel(MB86R0x_CRSR_SWRSTREQ, &crg->crsr);
while (1)
/* NOP */;
/* Never reached */
}

View File

@@ -0,0 +1,142 @@
/*
* (C) Copyright 2007-2008
* Stelian Pop <stelian.pop@leadtechdesign.com>
* Lead Tech Design <www.leadtechdesign.com>
*
* (C) Copyright 2010
* Matthias Weisser, Graf-Syteco <weisserm@arcor.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <div64.h>
#include <common.h>
#include <asm/io.h>
#include <asm/arch/hardware.h>
#define TIMER_LOAD_VAL 0xffffffff
#define TIMER_FREQ (CONFIG_MB86R0x_IOCLK / 256)
static unsigned long long timestamp;
static ulong lastdec;
static inline unsigned long long tick_to_time(unsigned long long tick)
{
tick *= CONFIG_SYS_HZ;
do_div(tick, TIMER_FREQ);
return tick;
}
static inline unsigned long long usec_to_tick(unsigned long long usec)
{
usec *= TIMER_FREQ;
do_div(usec, 1000000);
return usec;
}
/* nothing really to do with interrupts, just starts up a counter. */
int timer_init(void)
{
struct mb86r0x_timer * timer = (struct mb86r0x_timer *)
MB86R0x_TIMER_BASE;
ulong ctrl = readl(&timer->control);
writel(TIMER_LOAD_VAL, &timer->load);
ctrl |= MB86R0x_TIMER_ENABLE | MB86R0x_TIMER_PRS_8S |
MB86R0x_TIMER_SIZE_32;
writel(ctrl, &timer->control);
reset_timer_masked();
return 0;
}
/*
* timer without interrupts
*/
unsigned long long get_ticks(void)
{
struct mb86r0x_timer * timer = (struct mb86r0x_timer *)
MB86R0x_TIMER_BASE;
ulong now = readl(&timer->value);
if (now <= lastdec) {
/* normal mode (non roll) */
/* move stamp forward with absolut diff ticks */
timestamp += lastdec - now;
} else {
/* we have rollover of incrementer */
timestamp += lastdec + TIMER_LOAD_VAL - now;
}
lastdec = now;
return timestamp;
}
void reset_timer_masked(void)
{
struct mb86r0x_timer * timer = (struct mb86r0x_timer *)
MB86R0x_TIMER_BASE;
/* capture current value time */
lastdec = readl(&timer->value);
timestamp = 0; /* start "advancing" time stamp from 0 */
}
ulong get_timer_masked(void)
{
return tick_to_time(get_ticks());
}
void __udelay(unsigned long usec)
{
unsigned long long tmp;
ulong tmo;
tmo = usec_to_tick(usec);
tmp = get_ticks(); /* get current timestamp */
while ((get_ticks() - tmp) < tmo) /* loop till event */
/*NOP*/;
}
void reset_timer(void)
{
reset_timer_masked();
}
ulong get_timer(ulong base)
{
return get_timer_masked() - base;
}
/*
* This function is derived from PowerPC code (timebase clock frequency).
* On ARM it returns the number of timer ticks per second.
*/
ulong get_tbclk(void)
{
ulong tbclk;
tbclk = TIMER_FREQ;
return tbclk;
}

View File

@@ -48,24 +48,34 @@ void reset_cpu(unsigned long ignored)
}
/*
* Window Size
* Compute Window Size field value from size expressed in bytes
* Used with the Base register to set the address window size and location.
* Must be programmed from LSB to MSB as sequence of ones followed by
* sequence of zeros. The number of ones specifies the size of the window in
* 64 KByte granularity (e.g., a value of 0x00FF specifies 256 = 16 MByte).
* NOTE: A value of 0x0 specifies 64-KByte size.
* 64 KiB granularity (e.g., a value of 0x00FF specifies 256 = 16 MiB).
* NOTES:
* 1) A sizeval equal to 0x0 specifies 4 GiB.
* 2) A return value of 0x0 specifies 64 KiB.
*/
unsigned int orion5x_winctrl_calcsize(unsigned int sizeval)
{
int i;
unsigned int j = 0;
u32 val = sizeval >> 1;
/*
* Calculate the number of 64 KiB blocks needed minus one (rounding up).
* For sizeval > 0 this is equivalent to:
* sizeval = (u32) ceil((double) sizeval / 65536.0) - 1
*/
sizeval = (sizeval - 1) >> 16;
for (i = 0; val > 0x10000; i++) {
j |= (1 << i);
val = val >> 1;
}
return 0x0000ffff & j;
/*
* Propagate 'one' bits to the right by 'oring' them.
* We need only treat bits 15-0.
*/
sizeval |= sizeval >> 1; /* 'Or' bit 15 onto bit 14 */
sizeval |= sizeval >> 2; /* 'Or' bits 15-14 onto bits 13-12 */
sizeval |= sizeval >> 4; /* 'Or' bits 15-12 onto bits 11-8 */
sizeval |= sizeval >> 8; /* 'Or' bits 15-8 onto bits 7-0*/
return sizeval;
}
/*
@@ -77,6 +87,17 @@ unsigned int orion5x_winctrl_calcsize(unsigned int sizeval)
*
* If remap function not used, remap_lo must be set as base
*
* NOTES:
*
* 1) in order to avoid windows with inconsistent control and base values
* (which could prevent access to BOOTCS and hence execution from FLASH)
* always disable window before writing the base value then reenable it
* by writing the control value.
*
* 2) in order to avoid losing access to BOOTCS when disabling window 7,
* first configure window 6 for BOOTCS, then configure window 7 for BOOTCS,
* then configure windows 6 for its own target.
*
* Reference Documentation:
* Mbus-L to Mbus Bridge Registers Configuration.
* (Sec 25.1 and 25.3 of Datasheet)
@@ -86,57 +107,64 @@ int orion5x_config_adr_windows(void)
struct orion5x_win_registers *winregs =
(struct orion5x_win_registers *)ORION5X_CPU_WIN_BASE;
/* Window 0: PCIE MEM address space */
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_PCIE_MEM,
/* Disable window 0, configure it for its intended target, enable it. */
writel(0, &winregs[0].ctrl);
writel(ORION5X_ADR_PCIE_MEM, &winregs[0].base);
writel(ORION5X_ADR_PCIE_MEM_REMAP_LO, &winregs[0].remap_lo);
writel(ORION5X_ADR_PCIE_MEM_REMAP_HI, &winregs[0].remap_hi);
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCIE_MEM,
ORION5X_TARGET_PCIE, ORION5X_ATTR_PCIE_MEM,
ORION5X_WIN_ENABLE), &winregs[0].ctrl);
writel(ORION5X_DEFADR_PCIE_MEM, &winregs[0].base);
writel(ORION5X_DEFADR_PCIE_MEM_REMAP_LO, &winregs[0].remap_lo);
writel(ORION5X_DEFADR_PCIE_MEM_REMAP_HI, &winregs[0].remap_hi);
/* Window 1: PCIE IO address space */
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_PCIE_IO,
/* Disable window 1, configure it for its intended target, enable it. */
writel(0, &winregs[1].ctrl);
writel(ORION5X_ADR_PCIE_IO, &winregs[1].base);
writel(ORION5X_ADR_PCIE_IO_REMAP_LO, &winregs[1].remap_lo);
writel(ORION5X_ADR_PCIE_IO_REMAP_HI, &winregs[1].remap_hi);
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCIE_IO,
ORION5X_TARGET_PCIE, ORION5X_ATTR_PCIE_IO,
ORION5X_WIN_ENABLE), &winregs[1].ctrl);
writel(ORION5X_DEFADR_PCIE_IO, &winregs[1].base);
writel(ORION5X_DEFADR_PCIE_IO_REMAP_LO, &winregs[1].remap_lo);
writel(ORION5X_DEFADR_PCIE_IO_REMAP_HI, &winregs[1].remap_hi);
/* Window 2: PCI MEM address space */
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_PCI_MEM,
/* Disable window 2, configure it for its intended target, enable it. */
writel(0, &winregs[2].ctrl);
writel(ORION5X_ADR_PCI_MEM, &winregs[2].base);
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCI_MEM,
ORION5X_TARGET_PCI, ORION5X_ATTR_PCI_MEM,
ORION5X_WIN_ENABLE), &winregs[2].ctrl);
writel(ORION5X_DEFADR_PCI_MEM, &winregs[2].base);
/* Window 3: PCI IO address space */
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_PCI_IO,
/* Disable window 3, configure it for its intended target, enable it. */
writel(0, &winregs[3].ctrl);
writel(ORION5X_ADR_PCI_IO, &winregs[3].base);
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_PCI_IO,
ORION5X_TARGET_PCI, ORION5X_ATTR_PCI_IO,
ORION5X_WIN_ENABLE), &winregs[3].ctrl);
writel(ORION5X_DEFADR_PCI_IO, &winregs[3].base);
/* Window 4: DEV_CS0 address space */
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_DEV_CS0,
/* Disable window 4, configure it for its intended target, enable it. */
writel(0, &winregs[4].ctrl);
writel(ORION5X_ADR_DEV_CS0, &winregs[4].base);
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_DEV_CS0,
ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS0,
ORION5X_WIN_ENABLE), &winregs[4].ctrl);
writel(ORION5X_DEFADR_DEV_CS0, &winregs[4].base);
/* Window 5: DEV_CS1 address space */
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_DEV_CS1,
/* Disable window 5, configure it for its intended target, enable it. */
writel(0, &winregs[5].ctrl);
writel(ORION5X_ADR_DEV_CS1, &winregs[5].base);
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_DEV_CS1,
ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS1,
ORION5X_WIN_ENABLE), &winregs[5].ctrl);
writel(ORION5X_DEFADR_DEV_CS1, &winregs[5].base);
/* Window 6: DEV_CS2 address space */
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_DEV_CS2,
ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS2,
/* Disable window 6, configure it for FLASH, enable it. */
writel(0, &winregs[6].ctrl);
writel(ORION5X_ADR_BOOTROM, &winregs[6].base);
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_BOOTROM,
ORION5X_TARGET_DEVICE, ORION5X_ATTR_BOOTROM,
ORION5X_WIN_ENABLE), &winregs[6].ctrl);
writel(ORION5X_DEFADR_DEV_CS2, &winregs[6].base);
/* Window 7: BOOT Memory address space */
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_DEFSZ_BOOTROM,
/* Disable window 7, configure it for FLASH, enable it. */
writel(0, &winregs[7].ctrl);
writel(ORION5X_ADR_BOOTROM, &winregs[7].base);
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_BOOTROM,
ORION5X_TARGET_DEVICE, ORION5X_ATTR_BOOTROM,
ORION5X_WIN_ENABLE), &winregs[7].ctrl);
writel(ORION5X_DEFADR_BOOTROM, &winregs[7].base);
/* Disable window 6, configure it for its intended target, enable it. */
writel(0, &winregs[6].ctrl);
writel(ORION5X_ADR_DEV_CS2, &winregs[6].base);
writel(ORION5X_CPU_WIN_CTRL_DATA(ORION5X_SZ_DEV_CS2,
ORION5X_TARGET_DEVICE, ORION5X_ATTR_DEV_CS2,
ORION5X_WIN_ENABLE), &winregs[6].ctrl);
return 0;
}
@@ -265,6 +293,16 @@ int arch_misc_init(void)
writel(ORION5X_MPP16_23, ORION5X_MPP_BASE+0x50);
writel(ORION5X_GPIO_OUT_ENABLE, ORION5X_GPIO_BASE+0x04);
/* initialize timer */
timer_init_r();
return 0;
}
#endif /* CONFIG_ARCH_MISC_INIT */
#ifdef CONFIG_MVGBE
int cpu_eth_init(bd_t *bis)
{
mvgbe_initialize(bis);
return 0;
}
#endif

View File

@@ -49,7 +49,7 @@ u32 orion5x_sdram_bar(enum memory_bank bank)
result = winregs[bank].base;
return result;
}
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
int dram_init(void)
{
int i;
@@ -62,3 +62,25 @@ int dram_init(void)
}
return 0;
}
#else
int dram_init (void)
{
/* dram_init must store complete ramsize in gd->ram_size */
gd->ram_size = get_ram_size(
(volatile long *) orion5x_sdram_bar(0),
CONFIG_MAX_RAM_BANK_SIZE);
return 0;
}
void dram_init_banksize (void)
{
int i;
for (i = 0; i < CONFIG_NR_DRAM_BANKS; i++) {
gd->bd->bi_dram[i].start = orion5x_sdram_bar(i);
gd->bd->bi_dram[i].size = get_ram_size(
(volatile long *) (gd->bd->bi_dram[i].start),
CONFIG_MAX_RAM_BANK_SIZE);
}
}
#endif

View File

@@ -173,9 +173,11 @@ int timer_init(void)
cntmrctrl |= CTCR_ARM_TIMER_EN(UBOOT_CNTR);
cntmrctrl |= CTCR_ARM_TIMER_AUTO_EN(UBOOT_CNTR);
writel(cntmrctrl, CNTMR_CTRL_REG);
/* init the timestamp and lastdec value */
reset_timer_masked();
return 0;
}
void timer_init_r(void)
{
/* init the timestamp and lastdec value */
reset_timer_masked();
}

View File

@@ -10,6 +10,7 @@
* Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
* Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
* Copyright (c) 2003 Kshitij <kshitij@ti.com>
* Copyright (c) 2010 Albert Aribaud <albert.aribaud@free.fr>
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -30,7 +31,7 @@
* MA 02111-1307 USA
*/
#include <asm-offsets.h>
#include <config.h>
#include <common.h>
#include <version.h>
@@ -114,23 +115,23 @@ _fiq:
*************************************************************************
*/
.globl _TEXT_BASE
_TEXT_BASE:
.word TEXT_BASE
.globl _armboot_start
_armboot_start:
.word _start
.word CONFIG_SYS_TEXT_BASE
/*
* These are defined in the board-specific linker script.
* Subtracting _start from them lets the linker put their
* relative position in the executable instead of leaving
* them null.
*/
.globl _bss_start
_bss_start:
.word __bss_start
.globl _bss_start_ofs
_bss_start_ofs:
.word __bss_start - _start
.globl _bss_end
_bss_end:
.word _end
.globl _bss_end_ofs
_bss_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
@@ -144,6 +145,11 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
/*
* the actual reset code
@@ -166,22 +172,177 @@ reset:
bl cpu_init_crit
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
ldr r0,=0x00000000
bl board_init_f
/*------------------------------------------------------------------------------*/
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
*/
.globl relocate_code
relocate_code:
mov r4, r0 /* save addr_sp */
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
mov r7, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
/*
* fix .rel.dyn relocations
*/
ldr r0, _TEXT_BASE /* r0 <- Text base */
sub r9, r7, r0 /* r9 <- relocation offset */
ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
add r10, r10, r0 /* r10 <- sym table in FLASH */
ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
fixloop:
ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
add r0, r0, r9 /* r0 <- location to fix up in RAM */
ldr r1, [r2, #4]
and r8, r1, #0xff
cmp r8, #23 /* relative fixup? */
beq fixrel
cmp r8, #2 /* absolute fixup? */
beq fixabs
/* ignore unknown type of fixup */
b fixnext
fixabs:
/* absolute fix: set location to (offset) symbol value */
mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
add r1, r10, r1 /* r1 <- address of symbol in table */
ldr r1, [r1, #4] /* r1 <- symbol value */
add r1, r9 /* r1 <- relocated sym addr */
b fixnext
fixrel:
/* relative fix: increase location by offset */
ldr r1, [r0]
add r1, r1, r9
fixnext:
str r1, [r0]
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
bne clbss_l
bl coloured_LED_init
bl red_LED_on
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
#ifdef CONFIG_NAND_SPL
ldr r0, _nand_boot_ofs
mov pc, r0
_nand_boot_ofs:
.word nand_boot
#else
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
add lr, lr, r9
#endif
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
/* jump to it ... */
mov pc, lr
_board_init_r_ofs:
.word board_init_r - _start
#endif
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
_rel_dyn_end_ofs:
.word __rel_dyn_end - _start
_dynsym_start_ofs:
.word __dynsym_start - _start
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
* the actual reset code
*/
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
cmp r0, r1 /* don't reloc during debug */
beq stack_setup
ldr r2, _armboot_start
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address */
ldr r3, _bss_start_ofs /* r3 <- _bss_start - _start */
add r2, r0, r3 /* r2 <- source end address */
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
/* Set up the stack */
@@ -190,7 +351,7 @@ stack_setup:
sub sp, r0, #128 /* leave 32 words for abort-stack */
#ifndef CONFIG_PRELOADER
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
@@ -199,29 +360,35 @@ stack_setup:
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
ldr r1, _bss_end /* stop here */
adr r2, _start
ldr r0, _bss_start_ofs /* find start of bss segment */
add r0, r0, r2
ldr r1, _bss_end_ofs /* stop here */
add r1, r1, r2
mov r2, #0x00000000 /* clear */
#ifndef CONFIG_PRELOADER
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
ble clbss_l
blo clbss_l
bl coloured_LED_init
bl red_LED_on
#endif /* CONFIG_PRELOADER */
ldr pc, _start_armboot
ldr r0, _start_armboot_ofs
adr r1, _start
add r0, r0, r1
ldr pc, r0
_start_armboot:
_start_armboot_ofs:
#ifdef CONFIG_NAND_SPL
.word nand_boot
.word nand_boot - _start
#else
.word start_armboot
.word start_armboot - _start
#endif /* CONFIG_NAND_SPL */
#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
*************************************************************************
@@ -307,10 +474,13 @@ cpu_init_crit:
@ carve out a frame on current user stack
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
ldr r2, _armboot_start
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
adr r2, _start
sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
#else
ldr r2, IRQ_STACK_START_IN
#endif
@ get values for "aborted" pc and cpsr (into parm regs)
ldmia r2, {r2 - r3}
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
@@ -342,9 +512,13 @@ cpu_init_crit:
.endm
.macro get_bad_stack
ldr r13, _armboot_start @ setup our mode stack
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
adr r13, _start @ setup our mode stack
sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
#endif
str lr, [r13] @ save caller lr in position 0 of saved stack
mrs lr, spsr @ get the spsr

View File

@@ -39,10 +39,20 @@ SECTIONS
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
.data : {
*(.data)
}
. = ALIGN(4);
__rel_dyn_start = .;
.rel.dyn : { *(.rel.dyn) }
__rel_dyn_end = .;
__dynsym_start = .;
.dynsym : { *(.dynsym) }
. = ALIGN(4);
.got : { *(.got) }
. = .;
__u_boot_cmd_start = .;
@@ -53,4 +63,10 @@ SECTIONS
__bss_start = .;
.bss (NOLOAD) : { *(.bss) . = ALIGN(4); }
_end = .;
/DISCARD/ : { *(.dynstr*) }
/DISCARD/ : { *(.dynamic*) }
/DISCARD/ : { *(.plt*) }
/DISCARD/ : { *(.interp*) }
/DISCARD/ : { *(.gnu*) }
}

View File

@@ -30,7 +30,7 @@
* MA 02111-1307 USA
*/
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
@@ -85,12 +85,15 @@ _fiq:
*************************************************************************
*/
.globl _TEXT_BASE
_TEXT_BASE:
.word TEXT_BASE
.word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
_armboot_start:
.word _start
#endif
/*
* These are defined in the board-specific linker script.
@@ -115,7 +118,162 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
.globl _datarel_start
_datarel_start:
.word __datarel_start
.globl _datarelrolocal_start
_datarelrolocal_start:
.word __datarelrolocal_start
.globl _datarellocal_start
_datarellocal_start:
.word __datarellocal_start
.globl _datarelro_start
_datarelro_start:
.word __datarelro_start
.globl _got_start
_got_start:
.word __got_start
.globl _got_end
_got_end:
.word __got_end
/*
* the actual reset code
*/
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
ldr r0,=0x00000000
bl board_init_f
/*------------------------------------------------------------------------------*/
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
*/
.globl relocate_code
relocate_code:
mov r4, r0 /* save addr_sp */
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
mov r7, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
ldr r2, _TEXT_BASE
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address */
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
/* fix got entries */
ldr r1, _TEXT_BASE /* Text base */
mov r0, r7 /* reloc addr */
ldr r2, _got_start /* addr in Flash */
ldr r3, _got_end /* addr in Flash */
sub r3, r3, r1
add r3, r3, r0
sub r2, r2, r1
add r2, r2, r0
fixloop:
ldr r4, [r2]
sub r4, r4, r1
add r4, r4, r0
str r4, [r2]
add r2, r2, #4
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
ldr r0, _bss_start
ldr r1, _bss_end
ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */
sub r0, r0, r3
add r0, r0, r4
sub r1, r1, r3
add r1, r1, r4
mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
bne clbss_l
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
#ifdef CONFIG_NAND_SPL
ldr pc, _nand_boot
_nand_boot: .word nand_boot
#else
ldr r0, _TEXT_BASE
ldr r2, _board_init_r
sub r2, r2, r0
add r2, r2, r7 /* position from board_init_r in RAM */
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
/* jump to it ... */
mov lr, r2
mov pc, lr
_board_init_r: .word board_init_r
#endif
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
* the actual reset code
*/
@@ -151,14 +309,14 @@ relocate: /* relocate U-Boot to RAM */
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
/* Set up the stack */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
@@ -179,7 +337,7 @@ clbss_l:str r2, [r0] /* clear loop... */
_start_armboot:
.word start_armboot
#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
*************************************************************************
@@ -266,9 +424,13 @@ cpu_init_crit:
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r2, _armboot_start
sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
#else
ldr r2, IRQ_STACK_START_IN
#endif
@ get values for "aborted" pc and cpsr (into parm regs)
ldmia r2, {r2 - r3}
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
@@ -300,9 +462,13 @@ cpu_init_crit:
.endm
.macro get_bad_stack
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r13, _armboot_start @ setup our mode stack
sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
#endif
str lr, [r13] @ save caller lr in position 0 of saved stack
mrs lr, spsr @ get the spsr

View File

@@ -39,11 +39,23 @@ SECTIONS
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
.data : {
*(.data)
__datarel_start = .;
*(.data.rel)
__datarelrolocal_start = .;
*(.data.rel.ro.local)
__datarellocal_start = .;
*(.data.rel.local)
__datarelro_start = .;
*(.data.rel.ro)
}
__got_start = .;
. = ALIGN(4);
.got : { *(.got) }
__got_end = .;
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }

View File

@@ -1,416 +0,0 @@
/*
* (C) Copyright 2008
* Texas Instruments, <www.ti.com>
*
* Author :
* Manikandan Pillai <mani.pillai@ti.com>
*
* Derived from Beagle Board and OMAP3 SDP code by
* Richard Woodruff <r-woodruff2@ti.com>
* Syed Mohammed Khasim <khasim@ti.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clocks.h>
#include <asm/arch/clocks_omap3.h>
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
#include <environment.h>
#include <command.h>
/******************************************************************************
* get_sys_clk_speed() - determine reference oscillator speed
* based on known 32kHz clock and gptimer.
*****************************************************************************/
u32 get_osc_clk_speed(void)
{
u32 start, cstart, cend, cdiff, cdiv, val;
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
struct prm *prm_base = (struct prm *)PRM_BASE;
struct gptimer *gpt1_base = (struct gptimer *)OMAP34XX_GPT1;
struct s32ktimer *s32k_base = (struct s32ktimer *)SYNC_32KTIMER_BASE;
val = readl(&prm_base->clksrc_ctrl);
if (val & SYSCLKDIV_2)
cdiv = 2;
else if (val & SYSCLKDIV_1)
cdiv = 1;
else
/*
* Should never reach here! (Assume divider as 1)
*/
cdiv = 1;
/* enable timer2 */
val = readl(&prcm_base->clksel_wkup) | CLKSEL_GPT1;
/* select sys_clk for GPT1 */
writel(val, &prcm_base->clksel_wkup);
/* Enable I and F Clocks for GPT1 */
val = readl(&prcm_base->iclken_wkup) | EN_GPT1 | EN_32KSYNC;
writel(val, &prcm_base->iclken_wkup);
val = readl(&prcm_base->fclken_wkup) | EN_GPT1;
writel(val, &prcm_base->fclken_wkup);
writel(0, &gpt1_base->tldr); /* start counting at 0 */
writel(GPT_EN, &gpt1_base->tclr); /* enable clock */
/* enable 32kHz source, determine sys_clk via gauging */
/* start time in 20 cycles */
start = 20 + readl(&s32k_base->s32k_cr);
/* dead loop till start time */
while (readl(&s32k_base->s32k_cr) < start);
/* get start sys_clk count */
cstart = readl(&gpt1_base->tcrr);
/* wait for 40 cycles */
while (readl(&s32k_base->s32k_cr) < (start + 20)) ;
cend = readl(&gpt1_base->tcrr); /* get end sys_clk count */
cdiff = cend - cstart; /* get elapsed ticks */
if (cdiv == 2)
{
cdiff *= 2;
}
/* based on number of ticks assign speed */
if (cdiff > 19000)
return S38_4M;
else if (cdiff > 15200)
return S26M;
else if (cdiff > 13000)
return S24M;
else if (cdiff > 9000)
return S19_2M;
else if (cdiff > 7600)
return S13M;
else
return S12M;
}
/******************************************************************************
* get_sys_clkin_sel() - returns the sys_clkin_sel field value based on
* input oscillator clock frequency.
*****************************************************************************/
void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel)
{
switch(osc_clk) {
case S38_4M:
*sys_clkin_sel = 4;
break;
case S26M:
*sys_clkin_sel = 3;
break;
case S19_2M:
*sys_clkin_sel = 2;
break;
case S13M:
*sys_clkin_sel = 1;
break;
case S12M:
default:
*sys_clkin_sel = 0;
}
}
/******************************************************************************
* prcm_init() - inits clocks for PRCM as defined in clocks.h
* called from SRAM, or Flash (using temp SRAM stack).
*****************************************************************************/
void prcm_init(void)
{
void (*f_lock_pll) (u32, u32, u32, u32);
int xip_safe, p0, p1, p2, p3;
u32 osc_clk = 0, sys_clkin_sel;
u32 clk_index, sil_index = 0;
struct prm *prm_base = (struct prm *)PRM_BASE;
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
dpll_param *dpll_param_p;
f_lock_pll = (void *) ((u32) &_end_vect - (u32) &_start +
SRAM_VECT_CODE);
xip_safe = is_running_in_sram();
/*
* Gauge the input clock speed and find out the sys_clkin_sel
* value corresponding to the input clock.
*/
osc_clk = get_osc_clk_speed();
get_sys_clkin_sel(osc_clk, &sys_clkin_sel);
/* set input crystal speed */
sr32(&prm_base->clksel, 0, 3, sys_clkin_sel);
/* If the input clock is greater than 19.2M always divide/2 */
if (sys_clkin_sel > 2) {
/* input clock divider */
sr32(&prm_base->clksrc_ctrl, 6, 2, 2);
clk_index = sys_clkin_sel / 2;
} else {
/* input clock divider */
sr32(&prm_base->clksrc_ctrl, 6, 2, 1);
clk_index = sys_clkin_sel;
}
/*
* The DPLL tables are defined according to sysclk value and
* silicon revision. The clk_index value will be used to get
* the values for that input sysclk from the DPLL param table
* and sil_index will get the values for that SysClk for the
* appropriate silicon rev.
*/
if (get_cpu_rev())
sil_index = 1;
/* Unlock MPU DPLL (slows things down, and needed later) */
sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOW_POWER_BYPASS);
wait_on_value(ST_MPU_CLK, 0, &prcm_base->idlest_pll_mpu, LDELAY);
/* Getting the base address of Core DPLL param table */
dpll_param_p = (dpll_param *) get_core_dpll_param();
/* Moving it to the right sysclk and ES rev base */
dpll_param_p = dpll_param_p + 3 * clk_index + sil_index;
if (xip_safe) {
/*
* CORE DPLL
* sr32(CM_CLKSEL2_EMU) set override to work when asleep
*/
sr32(&prcm_base->clken_pll, 0, 3, PLL_FAST_RELOCK_BYPASS);
wait_on_value(ST_CORE_CLK, 0, &prcm_base->idlest_ckgen,
LDELAY);
/*
* For OMAP3 ES1.0 Errata 1.50, default value directly doesn't
* work. write another value and then default value.
*/
/* m3x2 */
sr32(&prcm_base->clksel1_emu, 16, 5, CORE_M3X2 + 1);
/* m3x2 */
sr32(&prcm_base->clksel1_emu, 16, 5, CORE_M3X2);
/* Set M2 */
sr32(&prcm_base->clksel1_pll, 27, 2, dpll_param_p->m2);
/* Set M */
sr32(&prcm_base->clksel1_pll, 16, 11, dpll_param_p->m);
/* Set N */
sr32(&prcm_base->clksel1_pll, 8, 7, dpll_param_p->n);
/* 96M Src */
sr32(&prcm_base->clksel1_pll, 6, 1, 0);
/* ssi */
sr32(&prcm_base->clksel_core, 8, 4, CORE_SSI_DIV);
/* fsusb */
sr32(&prcm_base->clksel_core, 4, 2, CORE_FUSB_DIV);
/* l4 */
sr32(&prcm_base->clksel_core, 2, 2, CORE_L4_DIV);
/* l3 */
sr32(&prcm_base->clksel_core, 0, 2, CORE_L3_DIV);
/* gfx */
sr32(&prcm_base->clksel_gfx, 0, 3, GFX_DIV);
/* reset mgr */
sr32(&prcm_base->clksel_wkup, 1, 2, WKUP_RSM);
/* FREQSEL */
sr32(&prcm_base->clken_pll, 4, 4, dpll_param_p->fsel);
/* lock mode */
sr32(&prcm_base->clken_pll, 0, 3, PLL_LOCK);
wait_on_value(ST_CORE_CLK, 1, &prcm_base->idlest_ckgen,
LDELAY);
} else if (is_running_in_flash()) {
/*
* if running from flash, jump to small relocated code
* area in SRAM.
*/
p0 = readl(&prcm_base->clken_pll);
sr32(&p0, 0, 3, PLL_FAST_RELOCK_BYPASS);
sr32(&p0, 4, 4, dpll_param_p->fsel); /* FREQSEL */
p1 = readl(&prcm_base->clksel1_pll);
sr32(&p1, 27, 2, dpll_param_p->m2); /* Set M2 */
sr32(&p1, 16, 11, dpll_param_p->m); /* Set M */
sr32(&p1, 8, 7, dpll_param_p->n); /* Set N */
sr32(&p1, 6, 1, 0); /* set source for 96M */
p2 = readl(&prcm_base->clksel_core);
sr32(&p2, 8, 4, CORE_SSI_DIV); /* ssi */
sr32(&p2, 4, 2, CORE_FUSB_DIV); /* fsusb */
sr32(&p2, 2, 2, CORE_L4_DIV); /* l4 */
sr32(&p2, 0, 2, CORE_L3_DIV); /* l3 */
p3 = (u32)&prcm_base->idlest_ckgen;
(*f_lock_pll) (p0, p1, p2, p3);
}
/* PER DPLL */
sr32(&prcm_base->clken_pll, 16, 3, PLL_STOP);
wait_on_value(ST_PERIPH_CLK, 0, &prcm_base->idlest_ckgen, LDELAY);
/* Getting the base address to PER DPLL param table */
/* Set N */
dpll_param_p = (dpll_param *) get_per_dpll_param();
/* Moving it to the right sysclk base */
dpll_param_p = dpll_param_p + clk_index;
/*
* Errata 1.50 Workaround for OMAP3 ES1.0 only
* If using default divisors, write default divisor + 1
* and then the actual divisor value
*/
sr32(&prcm_base->clksel1_emu, 24, 5, PER_M6X2 + 1); /* set M6 */
sr32(&prcm_base->clksel1_emu, 24, 5, PER_M6X2); /* set M6 */
sr32(&prcm_base->clksel_cam, 0, 5, PER_M5X2 + 1); /* set M5 */
sr32(&prcm_base->clksel_cam, 0, 5, PER_M5X2); /* set M5 */
sr32(&prcm_base->clksel_dss, 0, 5, PER_M4X2 + 1); /* set M4 */
sr32(&prcm_base->clksel_dss, 0, 5, PER_M4X2); /* set M4 */
sr32(&prcm_base->clksel_dss, 8, 5, PER_M3X2 + 1); /* set M3 */
sr32(&prcm_base->clksel_dss, 8, 5, PER_M3X2); /* set M3 */
sr32(&prcm_base->clksel3_pll, 0, 5, dpll_param_p->m2 + 1); /* set M2 */
sr32(&prcm_base->clksel3_pll, 0, 5, dpll_param_p->m2); /* set M2 */
/* Workaround end */
sr32(&prcm_base->clksel2_pll, 8, 11, dpll_param_p->m); /* set m */
sr32(&prcm_base->clksel2_pll, 0, 7, dpll_param_p->n); /* set n */
sr32(&prcm_base->clken_pll, 20, 4, dpll_param_p->fsel); /* FREQSEL */
sr32(&prcm_base->clken_pll, 16, 3, PLL_LOCK); /* lock mode */
wait_on_value(ST_PERIPH_CLK, 2, &prcm_base->idlest_ckgen, LDELAY);
/* Getting the base address to MPU DPLL param table */
dpll_param_p = (dpll_param *) get_mpu_dpll_param();
/* Moving it to the right sysclk and ES rev base */
dpll_param_p = dpll_param_p + 3 * clk_index + sil_index;
/* MPU DPLL (unlocked already) */
/* Set M2 */
sr32(&prcm_base->clksel2_pll_mpu, 0, 5, dpll_param_p->m2);
/* Set M */
sr32(&prcm_base->clksel1_pll_mpu, 8, 11, dpll_param_p->m);
/* Set N */
sr32(&prcm_base->clksel1_pll_mpu, 0, 7, dpll_param_p->n);
/* FREQSEL */
sr32(&prcm_base->clken_pll_mpu, 4, 4, dpll_param_p->fsel);
/* lock mode */
sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOCK);
wait_on_value(ST_MPU_CLK, 1, &prcm_base->idlest_pll_mpu, LDELAY);
/* Getting the base address to IVA DPLL param table */
dpll_param_p = (dpll_param *) get_iva_dpll_param();
/* Moving it to the right sysclk and ES rev base */
dpll_param_p = dpll_param_p + 3 * clk_index + sil_index;
/* IVA DPLL (set to 12*20=240MHz) */
sr32(&prcm_base->clken_pll_iva2, 0, 3, PLL_STOP);
wait_on_value(ST_IVA2_CLK, 0, &prcm_base->idlest_pll_iva2, LDELAY);
/* set M2 */
sr32(&prcm_base->clksel2_pll_iva2, 0, 5, dpll_param_p->m2);
/* set M */
sr32(&prcm_base->clksel1_pll_iva2, 8, 11, dpll_param_p->m);
/* set N */
sr32(&prcm_base->clksel1_pll_iva2, 0, 7, dpll_param_p->n);
/* FREQSEL */
sr32(&prcm_base->clken_pll_iva2, 4, 4, dpll_param_p->fsel);
/* lock mode */
sr32(&prcm_base->clken_pll_iva2, 0, 3, PLL_LOCK);
wait_on_value(ST_IVA2_CLK, 1, &prcm_base->idlest_pll_iva2, LDELAY);
/* Set up GPTimers to sys_clk source only */
sr32(&prcm_base->clksel_per, 0, 8, 0xff);
sr32(&prcm_base->clksel_wkup, 0, 1, 1);
sdelay(5000);
}
/******************************************************************************
* peripheral_enable() - Enable the clks & power for perifs (GPT2, UART1,...)
*****************************************************************************/
void per_clocks_enable(void)
{
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
/* Enable GP2 timer. */
sr32(&prcm_base->clksel_per, 0, 1, 0x1); /* GPT2 = sys clk */
sr32(&prcm_base->iclken_per, 3, 1, 0x1); /* ICKen GPT2 */
sr32(&prcm_base->fclken_per, 3, 1, 0x1); /* FCKen GPT2 */
#ifdef CONFIG_SYS_NS16550
/* Enable UART1 clocks */
sr32(&prcm_base->fclken1_core, 13, 1, 0x1);
sr32(&prcm_base->iclken1_core, 13, 1, 0x1);
/* UART 3 Clocks */
sr32(&prcm_base->fclken_per, 11, 1, 0x1);
sr32(&prcm_base->iclken_per, 11, 1, 0x1);
#endif
#ifdef CONFIG_OMAP3_GPIO_2
sr32(&prcm_base->fclken_per, 13, 1, 1);
sr32(&prcm_base->iclken_per, 13, 1, 1);
#endif
#ifdef CONFIG_OMAP3_GPIO_3
sr32(&prcm_base->fclken_per, 14, 1, 1);
sr32(&prcm_base->iclken_per, 14, 1, 1);
#endif
#ifdef CONFIG_OMAP3_GPIO_4
sr32(&prcm_base->fclken_per, 15, 1, 1);
sr32(&prcm_base->iclken_per, 15, 1, 1);
#endif
#ifdef CONFIG_OMAP3_GPIO_5
sr32(&prcm_base->fclken_per, 16, 1, 1);
sr32(&prcm_base->iclken_per, 16, 1, 1);
#endif
#ifdef CONFIG_OMAP3_GPIO_6
sr32(&prcm_base->fclken_per, 17, 1, 1);
sr32(&prcm_base->iclken_per, 17, 1, 1);
#endif
#ifdef CONFIG_DRIVER_OMAP34XX_I2C
/* Turn on all 3 I2C clocks */
sr32(&prcm_base->fclken1_core, 15, 3, 0x7);
sr32(&prcm_base->iclken1_core, 15, 3, 0x7); /* I2C1,2,3 = on */
#endif
/* Enable the ICLK for 32K Sync Timer as its used in udelay */
sr32(&prcm_base->iclken_wkup, 2, 1, 0x1);
sr32(&prcm_base->fclken_iva2, 0, 32, FCK_IVA2_ON);
sr32(&prcm_base->fclken1_core, 0, 32, FCK_CORE1_ON);
sr32(&prcm_base->iclken1_core, 0, 32, ICK_CORE1_ON);
sr32(&prcm_base->iclken2_core, 0, 32, ICK_CORE2_ON);
sr32(&prcm_base->fclken_wkup, 0, 32, FCK_WKUP_ON);
sr32(&prcm_base->iclken_wkup, 0, 32, ICK_WKUP_ON);
sr32(&prcm_base->fclken_dss, 0, 32, FCK_DSS_ON);
sr32(&prcm_base->iclken_dss, 0, 32, ICK_DSS_ON);
sr32(&prcm_base->fclken_cam, 0, 32, FCK_CAM_ON);
sr32(&prcm_base->iclken_cam, 0, 32, ICK_CAM_ON);
sr32(&prcm_base->fclken_per, 0, 32, FCK_PER_ON);
sr32(&prcm_base->iclken_per, 0, 32, ICK_PER_ON);
sdelay(1000);
}

View File

@@ -30,7 +30,7 @@
* MA 02111-1307 USA
*/
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
@@ -83,12 +83,15 @@ _fiq:
*************************************************************************
*/
.globl _TEXT_BASE
_TEXT_BASE:
.word TEXT_BASE /* address of _start in the linked image */
.word CONFIG_SYS_TEXT_BASE /* address of _start in the linked image */
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
_armboot_start:
.word _start
#endif
/*
* These are defined in the board-specific linker script.
@@ -113,6 +116,159 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
.globl _datarel_start
_datarel_start:
.word __datarel_start
.globl _datarelrolocal_start
_datarelrolocal_start:
.word __datarelrolocal_start
.globl _datarellocal_start
_datarellocal_start:
.word __datarellocal_start
.globl _datarelro_start
_datarelro_start:
.word __datarelro_start
.globl _got_start
_got_start:
.word __got_start
.globl _got_end
_got_end:
.word __got_end
/*
* the actual reset code
*/
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
ldr r0,=0x00000000
bl board_init_f
/*------------------------------------------------------------------------------*/
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
*/
.globl relocate_code
relocate_code:
mov r4, r0 /* save addr_sp */
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
mov r7, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
ldr r2, _TEXT_BASE
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address */
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
/* fix got entries */
ldr r1, _TEXT_BASE /* Text base */
mov r0, r7 /* reloc addr */
ldr r2, _got_start /* addr in Flash */
ldr r3, _got_end /* addr in Flash */
sub r3, r3, r1
add r3, r3, r0
sub r2, r2, r1
add r2, r2, r0
fixloop:
ldr r4, [r2]
sub r4, r4, r1
add r4, r4, r0
str r4, [r2]
add r2, r2, #4
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
ldr r0, _bss_start
ldr r1, _bss_end
ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */
sub r0, r0, r3
add r0, r0, r4
sub r1, r1, r3
add r1, r1, r4
mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
bne clbss_l
bl coloured_LED_init
bl red_LED_on
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
ldr r0, _TEXT_BASE
ldr r2, _board_init_r
sub r2, r2, r0
add r2, r2, r7 /* position from board_init_r in RAM */
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
/* jump to it ... */
mov lr, r2
mov pc, lr
_board_init_r: .word board_init_r
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
* the actual reset code
@@ -149,14 +305,14 @@ relocate: /* relocate U-Boot to RAM */
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
/* Set up the stack */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
@@ -171,13 +327,15 @@ clear_bss:
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
ble clbss_l
blo clbss_l
ldr pc, _start_armboot
_start_armboot:
.word start_armboot
#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
*************************************************************************
*
@@ -242,9 +400,13 @@ cpu_init_crit:
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r2, _armboot_start
sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
#else
ldr r2, IRQ_STACK_START_IN
#endif
@ get values for "aborted" pc and cpsr (into parm regs)
ldmia r2, {r2 - r3}
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
@@ -276,9 +438,13 @@ cpu_init_crit:
.endm
.macro get_bad_stack
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r13, _armboot_start @ setup our mode stack
sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
#endif
str lr, [r13] @ save caller lr in position 0 of saved stack
mrs lr, spsr @ get the spsr

View File

@@ -39,11 +39,23 @@ SECTIONS
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
.data : {
*(.data)
__datarel_start = .;
*(.data.rel)
__datarelrolocal_start = .;
*(.data.rel.ro.local)
__datarellocal_start = .;
*(.data.rel.local)
__datarelro_start = .;
*(.data.rel.ro)
}
__got_start = .;
. = ALIGN(4);
.got : { *(.got) }
__got_end = .;
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }

View File

@@ -27,6 +27,7 @@ LIB = $(obj)lib$(CPU).a
START := start.o
COBJS := cpu.o
COBJS += syslib.o
SRCS := $(START:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
@@ -44,4 +45,4 @@ include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################
#########################################################################

View File

@@ -71,7 +71,7 @@ u32 get_mcu_main_clk(void)
reg = (__raw_readl(&mxc_ccm->cacrr) & MXC_CCM_CACRR_ARM_PODF_MASK) >>
MXC_CCM_CACRR_ARM_PODF_OFFSET;
freq = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_MX51_HCLK_FREQ);
freq = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_SYS_MX5_HCLK);
return freq / (reg + 1);
}
@@ -84,14 +84,14 @@ static u32 get_periph_clk(void)
reg = __raw_readl(&mxc_ccm->cbcdr);
if (!(reg & MXC_CCM_CBCDR_PERIPH_CLK_SEL))
return decode_pll(mxc_plls[PLL2_CLOCK], CONFIG_MX51_HCLK_FREQ);
return decode_pll(mxc_plls[PLL2_CLOCK], CONFIG_SYS_MX5_HCLK);
reg = __raw_readl(&mxc_ccm->cbcmr);
switch ((reg & MXC_CCM_CBCMR_PERIPH_CLK_SEL_MASK) >>
MXC_CCM_CBCMR_PERIPH_CLK_SEL_OFFSET) {
case 0:
return decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_MX51_HCLK_FREQ);
return decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_SYS_MX5_HCLK);
case 1:
return decode_pll(mxc_plls[PLL3_CLOCK], CONFIG_MX51_HCLK_FREQ);
return decode_pll(mxc_plls[PLL3_CLOCK], CONFIG_SYS_MX5_HCLK);
default:
return 0;
}
@@ -146,15 +146,15 @@ static u32 get_uart_clk(void)
MXC_CCM_CSCMR1_UART_CLK_SEL_OFFSET) {
case 0x0:
freq = decode_pll(mxc_plls[PLL1_CLOCK],
CONFIG_MX51_HCLK_FREQ);
CONFIG_SYS_MX5_HCLK);
break;
case 0x1:
freq = decode_pll(mxc_plls[PLL2_CLOCK],
CONFIG_MX51_HCLK_FREQ);
CONFIG_SYS_MX5_HCLK);
break;
case 0x2:
freq = decode_pll(mxc_plls[PLL3_CLOCK],
CONFIG_MX51_HCLK_FREQ);
CONFIG_SYS_MX5_HCLK);
break;
default:
return 66500000;
@@ -181,7 +181,7 @@ u32 get_lp_apm(void)
u32 ccsr = __raw_readl(&mxc_ccm->ccsr);
if (((ccsr >> 9) & 1) == 0)
ret_val = CONFIG_MX51_HCLK_FREQ;
ret_val = CONFIG_SYS_MX5_HCLK;
else
ret_val = ((32768 * 1024));
@@ -207,17 +207,17 @@ u32 imx_get_cspiclk(void)
switch (clk_sel) {
case 0:
ret_val = decode_pll(mxc_plls[PLL1_CLOCK],
CONFIG_MX51_HCLK_FREQ) /
CONFIG_SYS_MX5_HCLK) /
((pre_pdf + 1) * (pdf + 1));
break;
case 1:
ret_val = decode_pll(mxc_plls[PLL2_CLOCK],
CONFIG_MX51_HCLK_FREQ) /
CONFIG_SYS_MX5_HCLK) /
((pre_pdf + 1) * (pdf + 1));
break;
case 2:
ret_val = decode_pll(mxc_plls[PLL3_CLOCK],
CONFIG_MX51_HCLK_FREQ) /
CONFIG_SYS_MX5_HCLK) /
((pre_pdf + 1) * (pdf + 1));
break;
default:
@@ -248,7 +248,7 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
return imx_get_cspiclk();
case MXC_FEC_CLK:
return decode_pll(mxc_plls[PLL1_CLOCK],
CONFIG_MX51_HCLK_FREQ);
CONFIG_SYS_MX5_HCLK);
default:
break;
}
@@ -269,16 +269,16 @@ u32 imx_get_fecclk(void)
/*
* Dump some core clockes.
*/
int do_mx51_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
int do_mx5_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
u32 freq;
freq = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_MX51_HCLK_FREQ);
printf("mx51 pll1: %dMHz\n", freq / 1000000);
freq = decode_pll(mxc_plls[PLL2_CLOCK], CONFIG_MX51_HCLK_FREQ);
printf("mx51 pll2: %dMHz\n", freq / 1000000);
freq = decode_pll(mxc_plls[PLL3_CLOCK], CONFIG_MX51_HCLK_FREQ);
printf("mx51 pll3: %dMHz\n", freq / 1000000);
freq = decode_pll(mxc_plls[PLL1_CLOCK], CONFIG_SYS_MX5_HCLK);
printf("pll1: %dMHz\n", freq / 1000000);
freq = decode_pll(mxc_plls[PLL2_CLOCK], CONFIG_SYS_MX5_HCLK);
printf("pll2: %dMHz\n", freq / 1000000);
freq = decode_pll(mxc_plls[PLL3_CLOCK], CONFIG_SYS_MX5_HCLK);
printf("pll3: %dMHz\n", freq / 1000000);
printf("ipg clock : %dHz\n", mxc_get_clock(MXC_IPG_CLK));
printf("ipg per clock : %dHz\n", mxc_get_clock(MXC_IPG_PERCLK));
@@ -288,7 +288,7 @@ int do_mx51_showclocks(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
/***************************************************/
U_BOOT_CMD(
clockinfo, CONFIG_SYS_MAXARGS, 1, do_mx51_showclocks,
"display mx51 clocks\n",
clockinfo, CONFIG_SYS_MAXARGS, 1, do_mx5_showclocks,
"display clocks\n",
""
);

View File

@@ -23,7 +23,7 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/imx-regs.h>
#include <asm/arch/mx51_pins.h>
#include <asm/arch/mx5x_pins.h>
#include <asm/arch/iomux.h>
#include <asm/arch/sys_proto.h>

View File

@@ -257,20 +257,6 @@ lowlevel_init:
orr r1, r1, #(1 << 23)
str r1, [r0, #0x4]
#ifdef ENABLE_IMPRECISE_ABORT
mrs r1, spsr /* save old spsr */
mrs r0, cpsr /* read out the cpsr */
bic r0, r0, #0x100 /* clear the A bit */
msr spsr, r0 /* update spsr */
add lr, pc, #0x8 /* update lr */
movs pc, lr /* update cpsr */
nop
nop
nop
nop
msr spsr, r1 /* restore old spsr */
#endif
init_l2cc
init_aips

View File

@@ -33,28 +33,33 @@
#include <fsl_esdhc.h>
#endif
#if defined(CONFIG_MX51)
#define CPU_TYPE 0x51000
#else
#error "CPU_TYPE not defined"
#endif
u32 get_cpu_rev(void)
{
int reg;
int system_rev;
int system_rev = CPU_TYPE;
int reg = __raw_readl(ROM_SI_REV);
reg = __raw_readl(ROM_SI_REV);
switch (reg) {
case 0x02:
system_rev = 0x51000 | CHIP_REV_1_1;
system_rev |= CHIP_REV_1_1;
break;
case 0x10:
if ((__raw_readl(GPIO1_BASE_ADDR + 0x0) & (0x1 << 22)) == 0)
system_rev = 0x51000 | CHIP_REV_2_5;
system_rev |= CHIP_REV_2_5;
else
system_rev = 0x51000 | CHIP_REV_2_0;
system_rev |= CHIP_REV_2_0;
break;
case 0x20:
system_rev = 0x51000 | CHIP_REV_3_0;
system_rev |= CHIP_REV_3_0;
break;
return system_rev;
default:
system_rev = 0x51000 | CHIP_REV_1_0;
system_rev |= CHIP_REV_1_0;
break;
}
return system_rev;
@@ -67,9 +72,10 @@ int print_cpuinfo(void)
u32 cpurev;
cpurev = get_cpu_rev();
printf("CPU: Freescale i.MX51 family rev%d.%d at %d MHz\n",
(cpurev & 0xF0) >> 4,
(cpurev & 0x0F) >> 4,
printf("CPU: Freescale i.MX%x family rev%d.%d at %d MHz\n",
(cpurev & 0xFF000) >> 12,
(cpurev & 0x000F0) >> 4,
(cpurev & 0x0000F) >> 0,
mxc_get_clock(MXC_ARM_CLK) / 1000000);
return 0;
}

View File

@@ -75,21 +75,21 @@ void reset_timer(void)
void reset_timer_masked(void)
{
ulong val = __raw_readl(&cur_gpt->counter);
lastinc = val / (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ);
lastinc = val / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ);
timestamp = 0;
}
ulong get_timer_masked(void)
{
ulong val = __raw_readl(&cur_gpt->counter);
val /= (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ);
val /= (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ);
if (val >= lastinc)
timestamp += (val - lastinc);
else
timestamp += ((0xFFFFFFFF / (CONFIG_MX51_CLK32 / CONFIG_SYS_HZ))
timestamp += ((0xFFFFFFFF / (CONFIG_SYS_MX5_CLK32 / CONFIG_SYS_HZ))
- lastinc) + val;
lastinc = val;
return val;
return timestamp;
}
ulong get_timer(ulong base)
@@ -106,7 +106,7 @@ void set_timer(ulong t)
void __udelay(unsigned long usec)
{
unsigned long now, start, tmo;
tmo = usec * (CONFIG_MX51_CLK32 / 1000) / 1000;
tmo = usec * (CONFIG_SYS_MX5_CLK32 / 1000) / 1000;
if (!tmo)
tmo = 1;

View File

@@ -36,7 +36,7 @@ SECTIONS
. = ALIGN(4);
.text :
{
arch/arm/cpu/arm_cortexa8/start.o
arch/arm/cpu/armv7/start.o
*(.text)
}
@@ -44,10 +44,22 @@ SECTIONS
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
.data : {
*(.data)
__datarel_start = .;
*(.data.rel)
__datarelrolocal_start = .;
*(.data.rel.ro.local)
__datarellocal_start = .;
*(.data.rel.local)
__datarelro_start = .;
*(.data.rel.ro)
}
__got_start = .;
. = ALIGN(4);
.got : { *(.got) }
__got_end = .;
. = .;
__u_boot_cmd_start = .;

View File

@@ -0,0 +1,47 @@
#
# (C) Copyright 2000-2003
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)libomap-common.a
SOBJS := reset.o
COBJS := timer.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -1,6 +1,6 @@
#
# (C) Copyright 2002
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
#
# See file CREDITS for list of people who contributed to this
# project.
@@ -20,11 +20,14 @@
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float
# Make ARMv5 to allow more compilers to work, even though its v7a.
PLATFORM_CPPFLAGS += -march=armv5
# =========================================================================
#
# PCIPPC-2 boards
# Supply options according to compiler version
#
TEXT_BASE = 0xfff00000
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
# =========================================================================
PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,\
$(call cc-option,-malignment-traps,))

View File

@@ -27,10 +27,12 @@
reset_cpu:
ldr r1, rstctl @ get addr for global reset
@ reg
mov r3, #0x2 @ full reset pll + mpu
ldr r3, rstbit @ sw reset bit
str r3, [r1] @ force reset
mov r0, r0
_loop_forever:
b _loop_forever
rstctl:
.word PRM_RSTCTRL
rstbit:
.word PRM_RSTCTRL_RESET

View File

@@ -41,12 +41,8 @@ static struct gptimer *timer_base = (struct gptimer *)CONFIG_SYS_TIMERBASE;
/*
* Nothing really to do with interrupts, just starts up a counter.
* We run the counter with 13MHz, divided by 8, resulting in timer
* frequency of 1.625MHz. With 32bit counter register, counter
* overflows in ~44min
*/
/* 13MHz / 8 = 1.625MHz */
#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV))
#define TIMER_LOAD_VAL 0xffffffff

View File

@@ -27,15 +27,12 @@ LIB = $(obj)lib$(SOC).a
SOBJS := lowlevel_init.o
SOBJS += cache.o
SOBJS += reset.o
COBJS += board.o
COBJS += clock.o
COBJS += gpio.o
COBJS += mem.o
COBJS += syslib.o
COBJS += sys_info.o
COBJS += timer.o
COBJS-$(CONFIG_EMIF4) += emif4.o
COBJS-$(CONFIG_SDRC) += sdrc.o

View File

@@ -119,41 +119,6 @@ void secureworld_exit()
__asm__ __volatile__("mcr p15, 0, %0, c1, c1, 0":"=r"(i));
}
/******************************************************************************
* Routine: setup_auxcr()
* Description: Write to AuxCR desired value using SMI.
* general use.
*****************************************************************************/
void setup_auxcr()
{
unsigned long i;
volatile unsigned int j;
/* Save r0, r12 and restore them after usage */
__asm__ __volatile__("mov %0, r12":"=r"(j));
__asm__ __volatile__("mov %0, r0":"=r"(i));
/*
* GP Device ROM code API usage here
* r12 = AUXCR Write function and r0 value
*/
__asm__ __volatile__("mov r12, #0x3");
__asm__ __volatile__("mrc p15, 0, r0, c1, c0, 1");
/* Enabling ASA */
__asm__ __volatile__("orr r0, r0, #0x10");
/* Enable L1NEON */
__asm__ __volatile__("orr r0, r0, #1 << 5");
/* SMI instruction to call ROM Code API */
__asm__ __volatile__(".word 0xE1600070");
/* Set PLD_FWD bit in L2AUXCR (Cortex-A8 erratum 725233 workaround) */
__asm__ __volatile__("mov r12, #0x2");
__asm__ __volatile__("mrc p15, 1, r0, c9, c0, 2");
__asm__ __volatile__("orr r0, r0, #1 << 27");
/* SMI instruction to call ROM Code API */
__asm__ __volatile__(".word 0xE1600070");
__asm__ __volatile__("mov r0, %0":"=r"(i));
__asm__ __volatile__("mov r12, %0":"=r"(j));
}
/******************************************************************************
* Routine: try_unlock_sram()
* Description: If chip is GP/EMU(special) type, unlock the SRAM for
@@ -282,7 +247,7 @@ void abort(void)
/******************************************************************************
* OMAP3 specific command to switch between NAND HW and SW ecc
*****************************************************************************/
static int do_switch_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
static int do_switch_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
{
if (argc != 2)
goto usage;

View File

@@ -43,6 +43,7 @@
.global invalidate_dcache
.global l2_cache_enable
.global l2_cache_disable
.global setup_auxcr
/*
* invalidate_dcache()
@@ -128,64 +129,135 @@ finished_inval:
ldmfd r13!, {r0 - r5, r7, r9 - r12, pc}
l2_cache_enable:
stmfd r13!, {r0, r1, r2, lr}
@ ES2 onwards we can disable/enable L2 ourselves
l2_cache_set:
stmfd r13!, {r4 - r6, lr}
mov r5, r0
bl get_cpu_rev
cmp r0, #CPU_3XX_ES20
blt l2_cache_disable_EARLIER_THAN_ES2
mrc 15, 0, r3, cr1, cr0, 1
orr r3, r3, #2
mcr 15, 0, r3, cr1, cr0, 1
b l2_cache_enable_END
l2_cache_enable_EARLIER_THAN_ES2:
@ Save r0, r12 and restore them after usage
mov r3, ip
str r3, [sp, #4]
mov r3, r0
@
@ GP Device ROM code API usage here
@ r12 = AUXCR Write function and r0 value
@
mov ip, #3
mrc 15, 0, r0, cr1, cr0, 1
orr r0, r0, #2
@ SMI instruction to call ROM Code API
.word 0xe1600070
mov r0, r3
mov ip, r3
str r3, [sp, #4]
l2_cache_enable_END:
ldmfd r13!, {r1, r2, r3, pc}
l2_cache_disable:
stmfd r13!, {r0, r1, r2, lr}
mov r4, r0
bl get_cpu_family
@ ES2 onwards we can disable/enable L2 ourselves
bl get_cpu_rev
cmp r0, #CPU_3XX_ES20
blt l2_cache_disable_EARLIER_THAN_ES2
mrc 15, 0, r3, cr1, cr0, 1
bic r3, r3, #2
mcr 15, 0, r3, cr1, cr0, 1
b l2_cache_disable_END
l2_cache_disable_EARLIER_THAN_ES2:
@ Save r0, r12 and restore them after usage
mov r3, ip
str r3, [sp, #4]
mov r3, r0
@
@ GP Device ROM code API usage here
@ r12 = AUXCR Write function and r0 value
@
mov ip, #3
cmp r0, #CPU_OMAP34XX
cmpeq r4, #CPU_3XX_ES10
mrc 15, 0, r0, cr1, cr0, 1
bic r0, r0, #2
@ SMI instruction to call ROM Code API
.word 0xe1600070
mov r0, r3
mov ip, r3
str r3, [sp, #4]
l2_cache_disable_END:
ldmfd r13!, {r1, r2, r3, pc}
orr r0, r0, r5, lsl #1
mcreq 15, 0, r0, cr1, cr0, 1
@ GP Device ROM code API usage here
@ r12 = AUXCR Write function and r0 value
mov ip, #3
@ SMCNE instruction to call ROM Code API
.word 0x11600070
ldmfd r13!, {r4 - r6, pc}
l2_cache_enable:
mov r0, #1
b l2_cache_set
l2_cache_disable:
mov r0, #0
b l2_cache_set
/******************************************************************************
* Routine: setup_auxcr()
* Description: Write to AuxCR desired value using SMI.
* general use.
*****************************************************************************/
setup_auxcr:
mrc p15, 0, r0, c0, c0, 0 @ read main ID register
and r2, r0, #0x00f00000 @ variant
and r3, r0, #0x0000000f @ revision
orr r1, r3, r2, lsr #20-4 @ combine variant and revision
mov r12, #0x3
mrc p15, 0, r0, c1, c0, 1
orr r0, r0, #0x10 @ Enable ASA
@ Enable L1NEON on pre-r2p1 (erratum 621766 workaround)
cmp r1, #0x21
orrlt r0, r0, #1 << 5
.word 0xE1600070 @ SMC
mov r12, #0x2
mrc p15, 1, r0, c9, c0, 2
@ Set PLD_FWD bit in L2AUXCR on pre-r2p1 (erratum 725233 workaround)
cmp r1, #0x21
orrlt r0, r0, #1 << 27
.word 0xE1600070 @ SMC
bx lr
.align 5
.global v7_flush_dcache_all
.global v7_flush_cache_all
/*
* v7_flush_dcache_all()
*
* Flush the whole D-cache.
*
* Corrupted registers: r0-r7, r9-r11 (r6 only in Thumb mode)
*
* - mm - mm_struct describing address space
*/
v7_flush_dcache_all:
# dmb @ ensure ordering with previous memory accesses
mrc p15, 1, r0, c0, c0, 1 @ read clidr
ands r3, r0, #0x7000000 @ extract loc from clidr
mov r3, r3, lsr #23 @ left align loc bit field
beq finished @ if loc is 0, then no need to clean
mov r10, #0 @ start clean at cache level 0
loop1:
add r2, r10, r10, lsr #1 @ work out 3x current cache level
mov r1, r0, lsr r2 @ extract cache type bits from clidr
and r1, r1, #7 @ mask of the bits for current cache only
cmp r1, #2 @ see what cache we have at this level
blt skip @ skip if no cache, or just i-cache
mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
mcr p15, 0, r10, c7, c5, 4 @ flush prefetch buffer,
@ with armv7 this is 'isb',
@ but we compile with armv5
mrc p15, 1, r1, c0, c0, 0 @ read the new csidr
and r2, r1, #7 @ extract the length of the cache lines
add r2, r2, #4 @ add 4 (line length offset)
ldr r4, =0x3ff
ands r4, r4, r1, lsr #3 @ find maximum number on the way size
clz r5, r4 @ find bit position of way size increment
ldr r7, =0x7fff
ands r7, r7, r1, lsr #13 @ extract max number of the index size
loop2:
mov r9, r4 @ create working copy of max way size
loop3:
orr r11, r10, r9, lsl r5 @ factor way and cache number into r11
orr r11, r11, r7, lsl r2 @ factor index number into r11
mcr p15, 0, r11, c7, c14, 2 @ clean & invalidate by set/way
subs r9, r9, #1 @ decrement the way
bge loop3
subs r7, r7, #1 @ decrement the index
bge loop2
skip:
add r10, r10, #2 @ increment cache number
cmp r3, r10
bgt loop1
finished:
mov r10, #0 @ swith back to cache level 0
mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr
# dsb
mcr p15, 0, r10, c7, c5, 4 @ flush prefetch buffer,
@ with armv7 this is 'isb',
@ but we compile with armv5
mov pc, lr
/*
* v7_flush_cache_all()
*
* Flush the entire cache system.
* The data cache flush is now achieved using atomic clean / invalidates
* working outwards from L1 cache. This is done using Set/Way based cache
* maintainance instructions.
* The instruction cache can still be invalidated back to the point of
* unification in a single instruction.
*
*/
v7_flush_cache_all:
stmfd sp!, {r0-r7, r9-r11, lr}
bl v7_flush_dcache_all
mov r0, #0
mcr p15, 0, r0, c7, c5, 0 @ I+BTB cache invalidate
ldmfd sp!, {r0-r7, r9-r11, lr}
mov pc, lr

View File

@@ -0,0 +1,671 @@
/*
* (C) Copyright 2008
* Texas Instruments, <www.ti.com>
*
* Author :
* Manikandan Pillai <mani.pillai@ti.com>
*
* Derived from Beagle Board and OMAP3 SDP code by
* Richard Woodruff <r-woodruff2@ti.com>
* Syed Mohammed Khasim <khasim@ti.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/clocks.h>
#include <asm/arch/clocks_omap3.h>
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
#include <environment.h>
#include <command.h>
/******************************************************************************
* get_sys_clk_speed() - determine reference oscillator speed
* based on known 32kHz clock and gptimer.
*****************************************************************************/
u32 get_osc_clk_speed(void)
{
u32 start, cstart, cend, cdiff, cdiv, val;
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
struct prm *prm_base = (struct prm *)PRM_BASE;
struct gptimer *gpt1_base = (struct gptimer *)OMAP34XX_GPT1;
struct s32ktimer *s32k_base = (struct s32ktimer *)SYNC_32KTIMER_BASE;
val = readl(&prm_base->clksrc_ctrl);
if (val & SYSCLKDIV_2)
cdiv = 2;
else
cdiv = 1;
/* enable timer2 */
val = readl(&prcm_base->clksel_wkup) | CLKSEL_GPT1;
/* select sys_clk for GPT1 */
writel(val, &prcm_base->clksel_wkup);
/* Enable I and F Clocks for GPT1 */
val = readl(&prcm_base->iclken_wkup) | EN_GPT1 | EN_32KSYNC;
writel(val, &prcm_base->iclken_wkup);
val = readl(&prcm_base->fclken_wkup) | EN_GPT1;
writel(val, &prcm_base->fclken_wkup);
writel(0, &gpt1_base->tldr); /* start counting at 0 */
writel(GPT_EN, &gpt1_base->tclr); /* enable clock */
/* enable 32kHz source, determine sys_clk via gauging */
/* start time in 20 cycles */
start = 20 + readl(&s32k_base->s32k_cr);
/* dead loop till start time */
while (readl(&s32k_base->s32k_cr) < start);
/* get start sys_clk count */
cstart = readl(&gpt1_base->tcrr);
/* wait for 40 cycles */
while (readl(&s32k_base->s32k_cr) < (start + 20)) ;
cend = readl(&gpt1_base->tcrr); /* get end sys_clk count */
cdiff = cend - cstart; /* get elapsed ticks */
cdiff *= cdiv;
/* based on number of ticks assign speed */
if (cdiff > 19000)
return S38_4M;
else if (cdiff > 15200)
return S26M;
else if (cdiff > 13000)
return S24M;
else if (cdiff > 9000)
return S19_2M;
else if (cdiff > 7600)
return S13M;
else
return S12M;
}
/******************************************************************************
* get_sys_clkin_sel() - returns the sys_clkin_sel field value based on
* input oscillator clock frequency.
*****************************************************************************/
void get_sys_clkin_sel(u32 osc_clk, u32 *sys_clkin_sel)
{
switch(osc_clk) {
case S38_4M:
*sys_clkin_sel = 4;
break;
case S26M:
*sys_clkin_sel = 3;
break;
case S19_2M:
*sys_clkin_sel = 2;
break;
case S13M:
*sys_clkin_sel = 1;
break;
case S12M:
default:
*sys_clkin_sel = 0;
}
}
/*
* OMAP34XX/35XX specific functions
*/
static void dpll3_init_34xx(u32 sil_index, u32 clk_index)
{
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
dpll_param *ptr = (dpll_param *) get_core_dpll_param();
void (*f_lock_pll) (u32, u32, u32, u32);
int xip_safe, p0, p1, p2, p3;
xip_safe = is_running_in_sram();
/* Moving to the right sysclk and ES rev base */
ptr = ptr + (3 * clk_index) + sil_index;
if (xip_safe) {
/*
* CORE DPLL
* sr32(CM_CLKSEL2_EMU) set override to work when asleep
*/
sr32(&prcm_base->clken_pll, 0, 3, PLL_FAST_RELOCK_BYPASS);
wait_on_value(ST_CORE_CLK, 0, &prcm_base->idlest_ckgen,
LDELAY);
/*
* For OMAP3 ES1.0 Errata 1.50, default value directly doesn't
* work. write another value and then default value.
*/
/* CM_CLKSEL1_EMU[DIV_DPLL3] */
sr32(&prcm_base->clksel1_emu, 16, 5, (CORE_M3X2 + 1)) ;
sr32(&prcm_base->clksel1_emu, 16, 5, CORE_M3X2);
/* M2 (CORE_DPLL_CLKOUT_DIV): CM_CLKSEL1_PLL[27:31] */
sr32(&prcm_base->clksel1_pll, 27, 5, ptr->m2);
/* M (CORE_DPLL_MULT): CM_CLKSEL1_PLL[16:26] */
sr32(&prcm_base->clksel1_pll, 16, 11, ptr->m);
/* N (CORE_DPLL_DIV): CM_CLKSEL1_PLL[8:14] */
sr32(&prcm_base->clksel1_pll, 8, 7, ptr->n);
/* Source is the CM_96M_FCLK: CM_CLKSEL1_PLL[6] */
sr32(&prcm_base->clksel1_pll, 6, 1, 0);
/* SSI */
sr32(&prcm_base->clksel_core, 8, 4, CORE_SSI_DIV);
/* FSUSB */
sr32(&prcm_base->clksel_core, 4, 2, CORE_FUSB_DIV);
/* L4 */
sr32(&prcm_base->clksel_core, 2, 2, CORE_L4_DIV);
/* L3 */
sr32(&prcm_base->clksel_core, 0, 2, CORE_L3_DIV);
/* GFX */
sr32(&prcm_base->clksel_gfx, 0, 3, GFX_DIV);
/* RESET MGR */
sr32(&prcm_base->clksel_wkup, 1, 2, WKUP_RSM);
/* FREQSEL (CORE_DPLL_FREQSEL): CM_CLKEN_PLL[4:7] */
sr32(&prcm_base->clken_pll, 4, 4, ptr->fsel);
/* LOCK MODE */
sr32(&prcm_base->clken_pll, 0, 3, PLL_LOCK);
wait_on_value(ST_CORE_CLK, 1, &prcm_base->idlest_ckgen,
LDELAY);
} else if (is_running_in_flash()) {
/*
* if running from flash, jump to small relocated code
* area in SRAM.
*/
f_lock_pll = (void *) ((u32) &_end_vect - (u32) &_start +
SRAM_VECT_CODE);
p0 = readl(&prcm_base->clken_pll);
sr32(&p0, 0, 3, PLL_FAST_RELOCK_BYPASS);
/* FREQSEL (CORE_DPLL_FREQSEL): CM_CLKEN_PLL[4:7] */
sr32(&p0, 4, 4, ptr->fsel);
p1 = readl(&prcm_base->clksel1_pll);
/* M2 (CORE_DPLL_CLKOUT_DIV): CM_CLKSEL1_PLL[27:31] */
sr32(&p1, 27, 5, ptr->m2);
/* M (CORE_DPLL_MULT): CM_CLKSEL1_PLL[16:26] */
sr32(&p1, 16, 11, ptr->m);
/* N (CORE_DPLL_DIV): CM_CLKSEL1_PLL[8:14] */
sr32(&p1, 8, 7, ptr->n);
/* Source is the CM_96M_FCLK: CM_CLKSEL1_PLL[6] */
sr32(&p1, 6, 1, 0);
p2 = readl(&prcm_base->clksel_core);
/* SSI */
sr32(&p2, 8, 4, CORE_SSI_DIV);
/* FSUSB */
sr32(&p2, 4, 2, CORE_FUSB_DIV);
/* L4 */
sr32(&p2, 2, 2, CORE_L4_DIV);
/* L3 */
sr32(&p2, 0, 2, CORE_L3_DIV);
p3 = (u32)&prcm_base->idlest_ckgen;
(*f_lock_pll) (p0, p1, p2, p3);
}
}
static void dpll4_init_34xx(u32 sil_index, u32 clk_index)
{
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
dpll_param *ptr = (dpll_param *) get_per_dpll_param();
/* Moving it to the right sysclk base */
ptr = ptr + clk_index;
/* EN_PERIPH_DPLL: CM_CLKEN_PLL[16:18] */
sr32(&prcm_base->clken_pll, 16, 3, PLL_STOP);
wait_on_value(ST_PERIPH_CLK, 0, &prcm_base->idlest_ckgen, LDELAY);
/*
* Errata 1.50 Workaround for OMAP3 ES1.0 only
* If using default divisors, write default divisor + 1
* and then the actual divisor value
*/
/* M6 */
sr32(&prcm_base->clksel1_emu, 24, 5, (PER_M6X2 + 1));
sr32(&prcm_base->clksel1_emu, 24, 5, PER_M6X2);
/* M5 */
sr32(&prcm_base->clksel_cam, 0, 5, (PER_M5X2 + 1));
sr32(&prcm_base->clksel_cam, 0, 5, PER_M5X2);
/* M4 */
sr32(&prcm_base->clksel_dss, 0, 5, (PER_M4X2 + 1));
sr32(&prcm_base->clksel_dss, 0, 5, PER_M4X2);
/* M3 */
sr32(&prcm_base->clksel_dss, 8, 5, (PER_M3X2 + 1));
sr32(&prcm_base->clksel_dss, 8, 5, PER_M3X2);
/* M2 (DIV_96M): CM_CLKSEL3_PLL[0:4] */
sr32(&prcm_base->clksel3_pll, 0, 5, (ptr->m2 + 1));
sr32(&prcm_base->clksel3_pll, 0, 5, ptr->m2);
/* Workaround end */
/* M (PERIPH_DPLL_MULT): CM_CLKSEL2_PLL[8:18] */
sr32(&prcm_base->clksel2_pll, 8, 11, ptr->m);
/* N (PERIPH_DPLL_DIV): CM_CLKSEL2_PLL[0:6] */
sr32(&prcm_base->clksel2_pll, 0, 7, ptr->n);
/* FREQSEL (PERIPH_DPLL_FREQSEL): CM_CLKEN_PLL[20:23] */
sr32(&prcm_base->clken_pll, 20, 4, ptr->fsel);
/* LOCK MODE (EN_PERIPH_DPLL): CM_CLKEN_PLL[16:18] */
sr32(&prcm_base->clken_pll, 16, 3, PLL_LOCK);
wait_on_value(ST_PERIPH_CLK, 2, &prcm_base->idlest_ckgen, LDELAY);
}
static void mpu_init_34xx(u32 sil_index, u32 clk_index)
{
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
dpll_param *ptr = (dpll_param *) get_mpu_dpll_param();
/* Moving to the right sysclk and ES rev base */
ptr = ptr + (3 * clk_index) + sil_index;
/* MPU DPLL (unlocked already) */
/* M2 (MPU_DPLL_CLKOUT_DIV) : CM_CLKSEL2_PLL_MPU[0:4] */
sr32(&prcm_base->clksel2_pll_mpu, 0, 5, ptr->m2);
/* M (MPU_DPLL_MULT) : CM_CLKSEL2_PLL_MPU[8:18] */
sr32(&prcm_base->clksel1_pll_mpu, 8, 11, ptr->m);
/* N (MPU_DPLL_DIV) : CM_CLKSEL2_PLL_MPU[0:6] */
sr32(&prcm_base->clksel1_pll_mpu, 0, 7, ptr->n);
/* FREQSEL (MPU_DPLL_FREQSEL) : CM_CLKEN_PLL_MPU[4:7] */
sr32(&prcm_base->clken_pll_mpu, 4, 4, ptr->fsel);
}
static void iva_init_34xx(u32 sil_index, u32 clk_index)
{
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
dpll_param *ptr = (dpll_param *) get_iva_dpll_param();
/* Moving to the right sysclk and ES rev base */
ptr = ptr + (3 * clk_index) + sil_index;
/* IVA DPLL */
/* EN_IVA2_DPLL : CM_CLKEN_PLL_IVA2[0:2] */
sr32(&prcm_base->clken_pll_iva2, 0, 3, PLL_STOP);
wait_on_value(ST_IVA2_CLK, 0, &prcm_base->idlest_pll_iva2, LDELAY);
/* M2 (IVA2_DPLL_CLKOUT_DIV) : CM_CLKSEL2_PLL_IVA2[0:4] */
sr32(&prcm_base->clksel2_pll_iva2, 0, 5, ptr->m2);
/* M (IVA2_DPLL_MULT) : CM_CLKSEL1_PLL_IVA2[8:18] */
sr32(&prcm_base->clksel1_pll_iva2, 8, 11, ptr->m);
/* N (IVA2_DPLL_DIV) : CM_CLKSEL1_PLL_IVA2[0:6] */
sr32(&prcm_base->clksel1_pll_iva2, 0, 7, ptr->n);
/* FREQSEL (IVA2_DPLL_FREQSEL) : CM_CLKEN_PLL_IVA2[4:7] */
sr32(&prcm_base->clken_pll_iva2, 4, 4, ptr->fsel);
/* LOCK MODE (EN_IVA2_DPLL) : CM_CLKEN_PLL_IVA2[0:2] */
sr32(&prcm_base->clken_pll_iva2, 0, 3, PLL_LOCK);
wait_on_value(ST_IVA2_CLK, 1, &prcm_base->idlest_pll_iva2, LDELAY);
}
/*
* OMAP3630 specific functions
*/
static void dpll3_init_36xx(u32 sil_index, u32 clk_index)
{
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
dpll_param *ptr = (dpll_param *) get_36x_core_dpll_param();
void (*f_lock_pll) (u32, u32, u32, u32);
int xip_safe, p0, p1, p2, p3;
xip_safe = is_running_in_sram();
/* Moving it to the right sysclk base */
ptr += clk_index;
if (xip_safe) {
/* CORE DPLL */
/* Select relock bypass: CM_CLKEN_PLL[0:2] */
sr32(&prcm_base->clken_pll, 0, 3, PLL_FAST_RELOCK_BYPASS);
wait_on_value(ST_CORE_CLK, 0, &prcm_base->idlest_ckgen,
LDELAY);
/* CM_CLKSEL1_EMU[DIV_DPLL3] */
sr32(&prcm_base->clksel1_emu, 16, 5, CORE_M3X2);
/* M2 (CORE_DPLL_CLKOUT_DIV): CM_CLKSEL1_PLL[27:31] */
sr32(&prcm_base->clksel1_pll, 27, 5, ptr->m2);
/* M (CORE_DPLL_MULT): CM_CLKSEL1_PLL[16:26] */
sr32(&prcm_base->clksel1_pll, 16, 11, ptr->m);
/* N (CORE_DPLL_DIV): CM_CLKSEL1_PLL[8:14] */
sr32(&prcm_base->clksel1_pll, 8, 7, ptr->n);
/* Source is the CM_96M_FCLK: CM_CLKSEL1_PLL[6] */
sr32(&prcm_base->clksel1_pll, 6, 1, 0);
/* SSI */
sr32(&prcm_base->clksel_core, 8, 4, CORE_SSI_DIV);
/* FSUSB */
sr32(&prcm_base->clksel_core, 4, 2, CORE_FUSB_DIV);
/* L4 */
sr32(&prcm_base->clksel_core, 2, 2, CORE_L4_DIV);
/* L3 */
sr32(&prcm_base->clksel_core, 0, 2, CORE_L3_DIV);
/* GFX */
sr32(&prcm_base->clksel_gfx, 0, 3, GFX_DIV);
/* RESET MGR */
sr32(&prcm_base->clksel_wkup, 1, 2, WKUP_RSM);
/* FREQSEL (CORE_DPLL_FREQSEL): CM_CLKEN_PLL[4:7] */
sr32(&prcm_base->clken_pll, 4, 4, ptr->fsel);
/* LOCK MODE */
sr32(&prcm_base->clken_pll, 0, 3, PLL_LOCK);
wait_on_value(ST_CORE_CLK, 1, &prcm_base->idlest_ckgen,
LDELAY);
} else if (is_running_in_flash()) {
/*
* if running from flash, jump to small relocated code
* area in SRAM.
*/
f_lock_pll = (void *) ((u32) &_end_vect - (u32) &_start +
SRAM_VECT_CODE);
p0 = readl(&prcm_base->clken_pll);
sr32(&p0, 0, 3, PLL_FAST_RELOCK_BYPASS);
/* FREQSEL (CORE_DPLL_FREQSEL): CM_CLKEN_PLL[4:7] */
sr32(&p0, 4, 4, ptr->fsel);
p1 = readl(&prcm_base->clksel1_pll);
/* M2 (CORE_DPLL_CLKOUT_DIV): CM_CLKSEL1_PLL[27:31] */
sr32(&p1, 27, 5, ptr->m2);
/* M (CORE_DPLL_MULT): CM_CLKSEL1_PLL[16:26] */
sr32(&p1, 16, 11, ptr->m);
/* N (CORE_DPLL_DIV): CM_CLKSEL1_PLL[8:14] */
sr32(&p1, 8, 7, ptr->n);
/* Source is the CM_96M_FCLK: CM_CLKSEL1_PLL[6] */
sr32(&p1, 6, 1, 0);
p2 = readl(&prcm_base->clksel_core);
/* SSI */
sr32(&p2, 8, 4, CORE_SSI_DIV);
/* FSUSB */
sr32(&p2, 4, 2, CORE_FUSB_DIV);
/* L4 */
sr32(&p2, 2, 2, CORE_L4_DIV);
/* L3 */
sr32(&p2, 0, 2, CORE_L3_DIV);
p3 = (u32)&prcm_base->idlest_ckgen;
(*f_lock_pll) (p0, p1, p2, p3);
}
}
static void dpll4_init_36xx(u32 sil_index, u32 clk_index)
{
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
struct dpll_per_36x_param *ptr;
ptr = (struct dpll_per_36x_param *)get_36x_per_dpll_param();
/* Moving it to the right sysclk base */
ptr += clk_index;
/* EN_PERIPH_DPLL: CM_CLKEN_PLL[16:18] */
sr32(&prcm_base->clken_pll, 16, 3, PLL_STOP);
wait_on_value(ST_PERIPH_CLK, 0, &prcm_base->idlest_ckgen, LDELAY);
/* M6 (DIV_DPLL4): CM_CLKSEL1_EMU[24:29] */
sr32(&prcm_base->clksel1_emu, 24, 6, ptr->m6);
/* M5 (CLKSEL_CAM): CM_CLKSEL1_EMU[0:5] */
sr32(&prcm_base->clksel_cam, 0, 6, ptr->m5);
/* M4 (CLKSEL_DSS1): CM_CLKSEL_DSS[0:5] */
sr32(&prcm_base->clksel_dss, 0, 6, ptr->m4);
/* M3 (CLKSEL_DSS1): CM_CLKSEL_DSS[8:13] */
sr32(&prcm_base->clksel_dss, 8, 6, ptr->m3);
/* M2 (DIV_96M): CM_CLKSEL3_PLL[0:4] */
sr32(&prcm_base->clksel3_pll, 0, 5, ptr->m2);
/* M (PERIPH_DPLL_MULT): CM_CLKSEL2_PLL[8:19] */
sr32(&prcm_base->clksel2_pll, 8, 12, ptr->m);
/* N (PERIPH_DPLL_DIV): CM_CLKSEL2_PLL[0:6] */
sr32(&prcm_base->clksel2_pll, 0, 7, ptr->n);
/* M2DIV (CLKSEL_96M): CM_CLKSEL_CORE[12:13] */
sr32(&prcm_base->clksel_core, 12, 2, ptr->m2div);
/* LOCK MODE (EN_PERIPH_DPLL): CM_CLKEN_PLL[16:18] */
sr32(&prcm_base->clken_pll, 16, 3, PLL_LOCK);
wait_on_value(ST_PERIPH_CLK, 2, &prcm_base->idlest_ckgen, LDELAY);
}
static void mpu_init_36xx(u32 sil_index, u32 clk_index)
{
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
dpll_param *ptr = (dpll_param *) get_36x_mpu_dpll_param();
/* Moving to the right sysclk */
ptr += clk_index;
/* MPU DPLL (unlocked already */
/* M2 (MPU_DPLL_CLKOUT_DIV) : CM_CLKSEL2_PLL_MPU[0:4] */
sr32(&prcm_base->clksel2_pll_mpu, 0, 5, ptr->m2);
/* M (MPU_DPLL_MULT) : CM_CLKSEL2_PLL_MPU[8:18] */
sr32(&prcm_base->clksel1_pll_mpu, 8, 11, ptr->m);
/* N (MPU_DPLL_DIV) : CM_CLKSEL2_PLL_MPU[0:6] */
sr32(&prcm_base->clksel1_pll_mpu, 0, 7, ptr->n);
}
static void iva_init_36xx(u32 sil_index, u32 clk_index)
{
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
dpll_param *ptr = (dpll_param *)get_36x_iva_dpll_param();
/* Moving to the right sysclk */
ptr += clk_index;
/* IVA DPLL */
/* EN_IVA2_DPLL : CM_CLKEN_PLL_IVA2[0:2] */
sr32(&prcm_base->clken_pll_iva2, 0, 3, PLL_STOP);
wait_on_value(ST_IVA2_CLK, 0, &prcm_base->idlest_pll_iva2, LDELAY);
/* M2 (IVA2_DPLL_CLKOUT_DIV) : CM_CLKSEL2_PLL_IVA2[0:4] */
sr32(&prcm_base->clksel2_pll_iva2, 0, 5, ptr->m2);
/* M (IVA2_DPLL_MULT) : CM_CLKSEL1_PLL_IVA2[8:18] */
sr32(&prcm_base->clksel1_pll_iva2, 8, 11, ptr->m);
/* N (IVA2_DPLL_DIV) : CM_CLKSEL1_PLL_IVA2[0:6] */
sr32(&prcm_base->clksel1_pll_iva2, 0, 7, ptr->n);
/* LOCK (MODE (EN_IVA2_DPLL) : CM_CLKEN_PLL_IVA2[0:2] */
sr32(&prcm_base->clken_pll_iva2, 0, 3, PLL_LOCK);
wait_on_value(ST_IVA2_CLK, 1, &prcm_base->idlest_pll_iva2, LDELAY);
}
/******************************************************************************
* prcm_init() - inits clocks for PRCM as defined in clocks.h
* called from SRAM, or Flash (using temp SRAM stack).
*****************************************************************************/
void prcm_init(void)
{
u32 osc_clk = 0, sys_clkin_sel;
u32 clk_index, sil_index = 0;
struct prm *prm_base = (struct prm *)PRM_BASE;
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
/*
* Gauge the input clock speed and find out the sys_clkin_sel
* value corresponding to the input clock.
*/
osc_clk = get_osc_clk_speed();
get_sys_clkin_sel(osc_clk, &sys_clkin_sel);
/* set input crystal speed */
sr32(&prm_base->clksel, 0, 3, sys_clkin_sel);
/* If the input clock is greater than 19.2M always divide/2 */
if (sys_clkin_sel > 2) {
/* input clock divider */
sr32(&prm_base->clksrc_ctrl, 6, 2, 2);
clk_index = sys_clkin_sel / 2;
} else {
/* input clock divider */
sr32(&prm_base->clksrc_ctrl, 6, 2, 1);
clk_index = sys_clkin_sel;
}
if (get_cpu_family() == CPU_OMAP36XX) {
/* Unlock MPU DPLL (slows things down, and needed later) */
sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOW_POWER_BYPASS);
wait_on_value(ST_MPU_CLK, 0, &prcm_base->idlest_pll_mpu,
LDELAY);
dpll3_init_36xx(0, clk_index);
dpll4_init_36xx(0, clk_index);
iva_init_36xx(0, clk_index);
mpu_init_36xx(0, clk_index);
/* Lock MPU DPLL to set frequency */
sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOCK);
wait_on_value(ST_MPU_CLK, 1, &prcm_base->idlest_pll_mpu,
LDELAY);
} else {
/*
* The DPLL tables are defined according to sysclk value and
* silicon revision. The clk_index value will be used to get
* the values for that input sysclk from the DPLL param table
* and sil_index will get the values for that SysClk for the
* appropriate silicon rev.
*/
if (((get_cpu_family() == CPU_OMAP34XX)
&& (get_cpu_rev() >= CPU_3XX_ES20)) ||
(get_cpu_family() == CPU_AM35XX))
sil_index = 1;
/* Unlock MPU DPLL (slows things down, and needed later) */
sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOW_POWER_BYPASS);
wait_on_value(ST_MPU_CLK, 0, &prcm_base->idlest_pll_mpu,
LDELAY);
dpll3_init_34xx(sil_index, clk_index);
dpll4_init_34xx(sil_index, clk_index);
iva_init_34xx(sil_index, clk_index);
mpu_init_34xx(sil_index, clk_index);
/* Lock MPU DPLL to set frequency */
sr32(&prcm_base->clken_pll_mpu, 0, 3, PLL_LOCK);
wait_on_value(ST_MPU_CLK, 1, &prcm_base->idlest_pll_mpu,
LDELAY);
}
/* Set up GPTimers to sys_clk source only */
sr32(&prcm_base->clksel_per, 0, 8, 0xff);
sr32(&prcm_base->clksel_wkup, 0, 1, 1);
sdelay(5000);
}
/******************************************************************************
* peripheral_enable() - Enable the clks & power for perifs (GPT2, UART1,...)
*****************************************************************************/
void per_clocks_enable(void)
{
struct prcm *prcm_base = (struct prcm *)PRCM_BASE;
/* Enable GP2 timer. */
sr32(&prcm_base->clksel_per, 0, 1, 0x1); /* GPT2 = sys clk */
sr32(&prcm_base->iclken_per, 3, 1, 0x1); /* ICKen GPT2 */
sr32(&prcm_base->fclken_per, 3, 1, 0x1); /* FCKen GPT2 */
#ifdef CONFIG_SYS_NS16550
/* Enable UART1 clocks */
sr32(&prcm_base->fclken1_core, 13, 1, 0x1);
sr32(&prcm_base->iclken1_core, 13, 1, 0x1);
/* UART 3 Clocks */
sr32(&prcm_base->fclken_per, 11, 1, 0x1);
sr32(&prcm_base->iclken_per, 11, 1, 0x1);
#endif
#ifdef CONFIG_OMAP3_GPIO_2
sr32(&prcm_base->fclken_per, 13, 1, 1);
sr32(&prcm_base->iclken_per, 13, 1, 1);
#endif
#ifdef CONFIG_OMAP3_GPIO_3
sr32(&prcm_base->fclken_per, 14, 1, 1);
sr32(&prcm_base->iclken_per, 14, 1, 1);
#endif
#ifdef CONFIG_OMAP3_GPIO_4
sr32(&prcm_base->fclken_per, 15, 1, 1);
sr32(&prcm_base->iclken_per, 15, 1, 1);
#endif
#ifdef CONFIG_OMAP3_GPIO_5
sr32(&prcm_base->fclken_per, 16, 1, 1);
sr32(&prcm_base->iclken_per, 16, 1, 1);
#endif
#ifdef CONFIG_OMAP3_GPIO_6
sr32(&prcm_base->fclken_per, 17, 1, 1);
sr32(&prcm_base->iclken_per, 17, 1, 1);
#endif
#ifdef CONFIG_DRIVER_OMAP34XX_I2C
/* Turn on all 3 I2C clocks */
sr32(&prcm_base->fclken1_core, 15, 3, 0x7);
sr32(&prcm_base->iclken1_core, 15, 3, 0x7); /* I2C1,2,3 = on */
#endif
/* Enable the ICLK for 32K Sync Timer as its used in udelay */
sr32(&prcm_base->iclken_wkup, 2, 1, 0x1);
sr32(&prcm_base->fclken_iva2, 0, 32, FCK_IVA2_ON);
sr32(&prcm_base->fclken1_core, 0, 32, FCK_CORE1_ON);
sr32(&prcm_base->iclken1_core, 0, 32, ICK_CORE1_ON);
sr32(&prcm_base->iclken2_core, 0, 32, ICK_CORE2_ON);
sr32(&prcm_base->fclken_wkup, 0, 32, FCK_WKUP_ON);
sr32(&prcm_base->iclken_wkup, 0, 32, ICK_WKUP_ON);
sr32(&prcm_base->fclken_dss, 0, 32, FCK_DSS_ON);
sr32(&prcm_base->iclken_dss, 0, 32, ICK_DSS_ON);
sr32(&prcm_base->fclken_cam, 0, 32, FCK_CAM_ON);
sr32(&prcm_base->iclken_cam, 0, 32, ICK_CAM_ON);
sr32(&prcm_base->fclken_per, 0, 32, FCK_PER_ON);
sr32(&prcm_base->iclken_per, 0, 32, ICK_PER_ON);
sdelay(1000);
}

View File

@@ -136,6 +136,7 @@ void do_emif4_init(void)
* dram_init -
* - Sets uboots idea of sdram size
*/
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
@@ -157,6 +158,39 @@ int dram_init(void)
return 0;
}
#else
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int size0 = 0, size1 = 0;
size0 = get_sdr_cs_size(CS0);
/*
* If a second bank of DDR is attached to CS1 this is
* where it can be started. Early init code will init
* memory on CS0.
*/
if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED))
size1 = get_sdr_cs_size(CS1);
gd->ram_size = size0 + size1;
return 0;
}
void dram_init_banksize (void)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int size0 = 0, size1 = 0;
size0 = get_sdr_cs_size(CS0);
size1 = get_sdr_cs_size(CS1);
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = size0;
gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1);
gd->bd->bi_dram[1].size = size1;
}
#endif
/*
* mem_init() -

View File

@@ -33,7 +33,7 @@
#include <asm/arch/clocks_omap3.h>
_TEXT_BASE:
.word TEXT_BASE /* sdram load addr from config.mk */
.word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
#if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_NAND_BOOT)
/**************************************************************************
@@ -359,3 +359,71 @@ per_dpll_param:
get_per_dpll_param:
adr r0, per_dpll_param
mov pc, lr
/*
* Tables for 36XX/37XX devices
*
*/
mpu_36x_dpll_param:
/* 12MHz */
.word 50, 0, 0, 1
/* 13MHz */
.word 600, 12, 0, 1
/* 19.2MHz */
.word 125, 3, 0, 1
/* 26MHz */
.word 300, 12, 0, 1
/* 38.4MHz */
.word 125, 7, 0, 1
iva_36x_dpll_param:
/* 12MHz */
.word 130, 2, 0, 1
/* 13MHz */
.word 20, 0, 0, 1
/* 19.2MHz */
.word 325, 11, 0, 1
/* 26MHz */
.word 10, 0, 0, 1
/* 38.4MHz */
.word 325, 23, 0, 1
core_36x_dpll_param:
/* 12MHz */
.word 100, 2, 0, 1
/* 13MHz */
.word 400, 12, 0, 1
/* 19.2MHz */
.word 375, 17, 0, 1
/* 26MHz */
.word 200, 12, 0, 1
/* 38.4MHz */
.word 375, 35, 0, 1
per_36x_dpll_param:
/* SYSCLK M N M2 M3 M4 M5 M6 m2DIV */
.word 12000, 360, 4, 9, 16, 5, 4, 3, 1
.word 13000, 864, 12, 9, 16, 9, 4, 3, 1
.word 19200, 360, 7, 9, 16, 5, 4, 3, 1
.word 26000, 432, 12, 9, 16, 9, 4, 3, 1
.word 38400, 360, 15, 9, 16, 5, 4, 3, 1
.globl get_36x_mpu_dpll_param
get_36x_mpu_dpll_param:
adr r0, mpu_36x_dpll_param
mov pc, lr
.globl get_36x_iva_dpll_param
get_36x_iva_dpll_param:
adr r0, iva_36x_dpll_param
mov pc, lr
.globl get_36x_core_dpll_param
get_36x_core_dpll_param:
adr r0, core_36x_dpll_param
mov pc, lr
.globl get_36x_per_dpll_param
get_36x_per_dpll_param:
adr r0, per_36x_dpll_param
mov pc, lr

View File

@@ -99,7 +99,7 @@ u32 get_sdr_cs_offset(u32 cs)
return 0;
offset = readl(&sdrc_base->cs_cfg);
offset = (offset & 15) << 27 | (offset & 0x30) >> 17;
offset = (offset & 15) << 27 | (offset & 0x30) << 17;
return offset;
}
@@ -107,18 +107,12 @@ u32 get_sdr_cs_offset(u32 cs)
/*
* do_sdrc_init -
* - Initialize the SDRAM for use.
* - Sets up SDRC timings for CS0
* - code called once in C-Stack only context for CS0 and a possible 2nd
* time depending on memory configuration from stack+global context
*/
void do_sdrc_init(u32 cs, u32 early)
{
struct sdrc_actim *sdrc_actim_base;
if (cs)
sdrc_actim_base = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
else
sdrc_actim_base = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
struct sdrc_actim *sdrc_actim_base0, *sdrc_actim_base1;
if (early) {
/* reset sdrc controller */
@@ -138,24 +132,29 @@ void do_sdrc_init(u32 cs, u32 early)
sdelay(0x20000);
}
writel(RASWIDTH_13BITS | CASWIDTH_10BITS | ADDRMUXLEGACY |
RAMSIZE_128 | BANKALLOCATION | B32NOT16 | B32NOT16 |
DEEPPD | DDR_SDRAM, &sdrc_base->cs[cs].mcfg);
writel(ARCV | ARE_ARCV_1, &sdrc_base->cs[cs].rfr_ctrl);
writel(V_ACTIMA_165, &sdrc_actim_base->ctrla);
writel(V_ACTIMB_165, &sdrc_actim_base->ctrlb);
writel(CMD_NOP, &sdrc_base->cs[cs].manual);
writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
/*
* SDRC timings are set up by x-load or config header
* We don't need to redo them here.
* Older x-loads configure only CS0
* configure CS1 to handle this ommission
*/
if (cs) {
sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
writel(readl(&sdrc_base->cs[CS0].mcfg),
&sdrc_base->cs[CS1].mcfg);
writel(readl(&sdrc_base->cs[CS0].rfr_ctrl),
&sdrc_base->cs[CS1].rfr_ctrl);
writel(readl(&sdrc_actim_base0->ctrla),
&sdrc_actim_base1->ctrla);
writel(readl(&sdrc_actim_base0->ctrlb),
&sdrc_actim_base1->ctrlb);
}
/*
* CAS latency 3, Write Burst = Read Burst, Serial Mode,
* Burst length = 4
* Test ram in this bank
* Disable if bad or not present
*/
writel(CASL3 | BURSTLENGTH4, &sdrc_base->cs[cs].mr);
if (!mem_ok(cs))
writel(0, &sdrc_base->cs[cs].mcfg);
}
@@ -164,6 +163,7 @@ void do_sdrc_init(u32 cs, u32 early)
* dram_init -
* - Sets uboots idea of sdram size
*/
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
@@ -189,6 +189,43 @@ int dram_init(void)
return 0;
}
#else
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int size0 = 0, size1 = 0;
size0 = get_sdr_cs_size(CS0);
/*
* If a second bank of DDR is attached to CS1 this is
* where it can be started. Early init code will init
* memory on CS0.
*/
if ((sysinfo.mtype == DDR_COMBO) || (sysinfo.mtype == DDR_STACKED)) {
do_sdrc_init(CS1, NOT_EARLY);
make_cs1_contiguous();
size1 = get_sdr_cs_size(CS1);
}
gd->ram_size = size0 + size1;
return 0;
}
void dram_init_banksize (void)
{
DECLARE_GLOBAL_DATA_PTR;
unsigned int size0 = 0, size1 = 0;
size0 = get_sdr_cs_size(CS0);
size1 = get_sdr_cs_size(CS1);
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = size0;
gd->bd->bi_dram[1].start = PHYS_SDRAM_1 + get_sdr_cs_offset(CS1);
gd->bd->bi_dram[1].size = size1;
}
#endif
/*
* mem_init -

View File

@@ -38,7 +38,10 @@ static char *rev_s[CPU_3XX_MAX_REV] = {
"2.0",
"2.1",
"3.0",
"3.1"};
"3.1",
"UNKNOWN",
"UNKNOWN",
"3.1.2"};
/*****************************************************************
* dieid_num_r(void) - read and set die ID
@@ -75,32 +78,81 @@ u32 get_cpu_type(void)
}
/******************************************
* get_cpu_rev(void) - extract version info
* get_cpu_id(void) - extract cpu id
* returns 0 for ES1.0, cpuid otherwise
******************************************/
u32 get_cpu_rev(void)
u32 get_cpu_id(void)
{
u32 cpuid = 0;
struct ctrl_id *id_base;
u32 cpuid = 0;
/*
* On ES1.0 the IDCODE register is not exposed on L4
* so using CPU ID to differentiate between ES1.0 and > ES1.0.
*/
__asm__ __volatile__("mrc p15, 0, %0, c0, c0, 0":"=r"(cpuid));
if ((cpuid & 0xf) == 0x0)
return CPU_3XX_ES10;
else {
if ((cpuid & 0xf) == 0x0) {
return 0;
} else {
/* Decode the IDs on > ES1.0 */
id_base = (struct ctrl_id *) OMAP34XX_ID_L4_IO_BASE;
cpuid = (readl(&id_base->idcode) >> CPU_3XX_ID_SHIFT) & 0xf;
/* Some early ES2.0 seem to report ID 0, fix this */
if(cpuid == 0)
cpuid = CPU_3XX_ES20;
return cpuid;
cpuid = readl(&id_base->idcode);
}
return cpuid;
}
/******************************************
* get_cpu_family(void) - extract cpu info
******************************************/
u32 get_cpu_family(void)
{
u16 hawkeye;
u32 cpu_family;
u32 cpuid = get_cpu_id();
if (cpuid == 0)
return CPU_OMAP34XX;
hawkeye = (cpuid >> HAWKEYE_SHIFT) & 0xffff;
switch (hawkeye) {
case HAWKEYE_OMAP34XX:
cpu_family = CPU_OMAP34XX;
break;
case HAWKEYE_AM35XX:
cpu_family = CPU_AM35XX;
break;
case HAWKEYE_OMAP36XX:
cpu_family = CPU_OMAP36XX;
break;
default:
cpu_family = CPU_OMAP34XX;
}
return cpu_family;
}
/******************************************
* get_cpu_rev(void) - extract version info
******************************************/
u32 get_cpu_rev(void)
{
u32 cpuid = get_cpu_id();
if (cpuid == 0)
return CPU_3XX_ES10;
else
return (cpuid >> CPU_3XX_ID_SHIFT) & 0xf;
}
/*****************************************************************
* get_sku_id(void) - read sku_id to get info on max clock rate
*****************************************************************/
u32 get_sku_id(void)
{
struct ctrl_id *id_base = (struct ctrl_id *)OMAP34XX_ID_L4_IO_BASE;
return readl(&id_base->sku_id) & SKUID_CLK_MASK;
}
/***************************************************************************
@@ -213,24 +265,66 @@ u32 get_device_type(void)
*/
int print_cpuinfo (void)
{
char *cpu_s, *sec_s;
char *cpu_family_s, *cpu_s, *sec_s, *max_clk;
switch (get_cpu_family()) {
case CPU_OMAP34XX:
cpu_family_s = "OMAP";
switch (get_cpu_type()) {
case OMAP3503:
cpu_s = "3503";
break;
case OMAP3515:
cpu_s = "3515";
break;
case OMAP3525:
cpu_s = "3525";
break;
case OMAP3530:
cpu_s = "3530";
break;
default:
cpu_s = "35XX";
break;
}
if ((get_cpu_rev() >= CPU_3XX_ES31) &&
(get_sku_id() == SKUID_CLK_720MHZ))
max_clk = "720 mHz";
else
max_clk = "600 mHz";
switch (get_cpu_type()) {
case OMAP3503:
cpu_s = "3503";
break;
case OMAP3515:
cpu_s = "3515";
case CPU_AM35XX:
cpu_family_s = "AM";
switch (get_cpu_type()) {
case AM3505:
cpu_s = "3505";
break;
case AM3517:
cpu_s = "3517";
break;
default:
cpu_s = "35XX";
break;
}
max_clk = "600 Mhz";
break;
case OMAP3525:
cpu_s = "3525";
break;
case OMAP3530:
cpu_s = "3530";
case CPU_OMAP36XX:
cpu_family_s = "OMAP";
switch (get_cpu_type()) {
case OMAP3730:
cpu_s = "3630/3730";
break;
default:
cpu_s = "36XX/37XX";
break;
}
max_clk = "1 Ghz";
break;
default:
cpu_family_s = "OMAP";
cpu_s = "35XX";
break;
max_clk = "600 Mhz";
}
switch (get_device_type()) {
@@ -250,8 +344,9 @@ int print_cpuinfo (void)
sec_s = "?";
}
printf("OMAP%s-%s ES%s, CPU-OPP2 L3-165MHz\n",
cpu_s, sec_s, rev_s[get_cpu_rev()]);
printf("%s%s-%s ES%s, CPU-OPP2, L3-165MHz, Max CPU Clock %s\n",
cpu_family_s, cpu_s, sec_s,
rev_s[get_cpu_rev()], max_clk);
return 0;
}

View File

@@ -0,0 +1,49 @@
#
# (C) Copyright 2000-2010
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(SOC).a
SOBJS += lowlevel_init.o
COBJS += board.o
COBJS += mem.o
COBJS += sys_info.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -0,0 +1,133 @@
/*
*
* Common functions for OMAP4 based boards
*
* (C) Copyright 2010
* Texas Instruments, <www.ti.com>
*
* Author :
* Aneesh V <aneesh@ti.com>
* Steve Sakoman <steve@sakoman.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/arch/cpu.h>
#include <asm/arch/sys_proto.h>
#include <asm/sizes.h>
/*
* Routine: s_init
* Description: Does early system init of muxing and clocks.
* - Called path is with SRAM stack.
*/
void s_init(void)
{
watchdog_init();
}
/*
* Routine: wait_for_command_complete
* Description: Wait for posting to finish on watchdog
*/
void wait_for_command_complete(struct watchdog *wd_base)
{
int pending = 1;
do {
pending = readl(&wd_base->wwps);
} while (pending);
}
/*
* Routine: watchdog_init
* Description: Shut down watch dogs
*/
void watchdog_init(void)
{
struct watchdog *wd2_base = (struct watchdog *)WDT2_BASE;
writel(WD_UNLOCK1, &wd2_base->wspr);
wait_for_command_complete(wd2_base);
writel(WD_UNLOCK2, &wd2_base->wspr);
}
/*
* This function finds the SDRAM size available in the system
* based on DMM section configurations
* This is needed because the size of memory installed may be
* different on different versions of the board
*/
u32 sdram_size(void)
{
u32 section, i, total_size = 0, size, addr;
for (i = 0; i < 4; i++) {
section = __raw_readl(DMM_LISA_MAP_BASE + i*4);
addr = section & DMM_LISA_MAP_SYS_ADDR_MASK;
/* See if the address is valid */
if ((addr >= OMAP44XX_DRAM_ADDR_SPACE_START) &&
(addr < OMAP44XX_DRAM_ADDR_SPACE_END)) {
size = ((section & DMM_LISA_MAP_SYS_SIZE_MASK) >>
DMM_LISA_MAP_SYS_SIZE_SHIFT);
size = 1 << size;
size *= SZ_16M;
total_size += size;
}
}
return total_size;
}
/*
* Routine: dram_init
* Description: sets uboots idea of sdram size
*/
int dram_init(void)
{
DECLARE_GLOBAL_DATA_PTR;
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
gd->bd->bi_dram[0].start = 0x80000000;
gd->bd->bi_dram[0].size = sdram_size();
#else
gd->ram_size = sdram_size();
#endif
return 0;
}
/*
* Print board information
*/
int checkboard(void)
{
puts(sysinfo.board_string);
return 0;
}
/*
* This function is called by start_armboot. You can reliably use static
* data. Any boot-time function that require static data should be
* called from here
*/
int arch_cpu_init(void)
{
set_muxconf_regs();
return 0;
}

View File

@@ -1,8 +1,11 @@
/*
* short type names
* Board specific setup info
*
* (C) Copyright 2002
* Hyperion Entertainment, ThomasF@hyperion-entertainment.com
* (C) Copyright 2010
* Texas Instruments, <www.ti.com>
*
* Author :
* Aneesh V <aneesh@ti.com>
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -14,7 +17,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
@@ -23,14 +26,22 @@
* MA 02111-1307 USA
*/
#ifndef _SHORT_TYPES_H
#define _SHORT_TYPES_H
#include <asm/arch/omap4.h>
typedef unsigned long uint32;
typedef long int32;
typedef unsigned short uint16;
typedef short int16;
typedef unsigned char uint8;
typedef signed char int8;
.globl lowlevel_init
lowlevel_init:
/*
* Setup a temporary stack
*/
ldr sp, =LOW_LEVEL_SRAM_STACK
#endif
/*
* Save the old lr(passed in ip) and the current lr to stack
*/
push {ip, lr}
/*
* go setup pll, mux, memory
*/
bl s_init
pop {ip, pc}

View File

@@ -0,0 +1,45 @@
/*
* (C) Copyright 2010
* Texas Instruments, <www.ti.com>
*
* Steve Sakoman <steve@sakoman.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <asm/arch/cpu.h>
#include <asm/arch/sys_proto.h>
struct gpmc *gpmc_cfg;
/*****************************************************
* gpmc_init(): init gpmc bus
* This code can only be executed from SRAM or SDRAM.
*****************************************************/
void gpmc_init(void)
{
gpmc_cfg = (struct gpmc *)GPMC_BASE;
/* global settings */
writel(0, &gpmc_cfg->irqenable); /* isr's sources masked */
writel(0, &gpmc_cfg->timeout_control);/* timeout disable */
/*
* Disable the GPMC0 config set by ROM code
* It conflicts with our MPDB (both at 0x08000000)
*/
writel(0, &gpmc_cfg->cs[0].config7);
}

View File

@@ -0,0 +1,53 @@
/*
* (C) Copyright 2010
* Texas Instruments, <www.ti.com>
*
* Author :
* Aneesh V <aneesh@ti.com>
* Steve Sakoman <steve@sakoman.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <asm/arch/sys_proto.h>
/*
* get_device_type(): tell if GP/HS/EMU/TST
*/
u32 get_device_type(void)
{
return 0;
}
/*
* get_board_rev() - get board revision
*/
u32 get_board_rev(void)
{
return 0x20;
}
/*
* Print CPU information
*/
int print_cpuinfo(void)
{
puts("CPU : OMAP4430\n");
return 0;
}

View File

@@ -0,0 +1,46 @@
#
# Copyright (C) 2009 Samsung Electronics
# Minkyu Kang <mk7.kang@samsung.com>
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)libs5p-common.a
COBJS-y += cpu_info.o
COBJS-y += timer.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y) $(SOBJS))
all: $(obj).depend $(LIB)
$(LIB): $(OBJS)
$(AR) $(ARFLAGS) $@ $(OBJS)
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

View File

@@ -25,15 +25,14 @@
#include <asm/arch/clk.h>
/* Default is s5pc100 */
unsigned int s5pc1xx_cpu_id = 0xC100;
unsigned int s5p_cpu_id = 0xC100;
#ifdef CONFIG_ARCH_CPU_INIT
int arch_cpu_init(void)
{
s5pc1xx_cpu_id = readl(S5PC1XX_PRO_ID);
s5pc1xx_cpu_id = 0xC000 | ((s5pc1xx_cpu_id & 0x00FFF000) >> 12);
s5p_set_cpu_id();
s5pc1xx_clock_init();
s5p_clock_init();
return 0;
}
@@ -41,7 +40,7 @@ int arch_cpu_init(void)
u32 get_device_type(void)
{
return s5pc1xx_cpu_id;
return s5p_cpu_id;
}
#ifdef CONFIG_DISPLAY_CPUINFO
@@ -50,7 +49,7 @@ int print_cpuinfo(void)
char buf[32];
printf("CPU:\tS5P%X@%sMHz\n",
s5pc1xx_cpu_id, strmhz(buf, get_arm_clk()));
s5p_cpu_id, strmhz(buf, get_arm_clk()));
return 0;
}

View File

@@ -44,23 +44,20 @@ static unsigned long long timestamp; /* Monotonic incrementing timer */
static unsigned long lastdec; /* Last decremneter snapshot */
/* macro to read the 16 bit timer */
static inline struct s5pc1xx_timer *s5pc1xx_get_base_timer(void)
static inline struct s5p_timer *s5p_get_base_timer(void)
{
if (cpu_is_s5pc110())
return (struct s5pc1xx_timer *)S5PC110_TIMER_BASE;
else
return (struct s5pc1xx_timer *)S5PC100_TIMER_BASE;
return (struct s5p_timer *)samsung_get_base_timer();
}
int timer_init(void)
{
struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer();
struct s5p_timer *const timer = s5p_get_base_timer();
u32 val;
/*
* @ PWM Timer 4
* Timer Freq(HZ) =
* PCLK / { (prescaler_value + 1) * (divider_value) }
* PWM_CLK / { (prescaler_value + 1) * (divider_value) }
*/
/* set prescaler : 16 */
@@ -71,7 +68,7 @@ int timer_init(void)
if (count_value == 0) {
/* reset initial value */
/* count_value = 2085937.5(HZ) (per 1 sec)*/
count_value = get_pclk() / ((PRESCALER_1 + 1) *
count_value = get_pwm_clk() / ((PRESCALER_1 + 1) *
(MUX_DIV_2 + 1));
/* count_value / 100 = 20859.375(HZ) (per 10 msec) */
@@ -83,13 +80,13 @@ int timer_init(void)
lastdec = count_value;
val = (readl(&timer->tcon) & ~(0x07 << TCON_TIMER4_SHIFT)) |
S5PC1XX_TCON4_AUTO_RELOAD;
TCON4_AUTO_RELOAD;
/* auto reload & manual update */
writel(val | S5PC1XX_TCON4_UPDATE, &timer->tcon);
writel(val | TCON4_UPDATE, &timer->tcon);
/* start PWM timer 4 */
writel(val | S5PC1XX_TCON4_START, &timer->tcon);
writel(val | TCON4_START, &timer->tcon);
timestamp = 0;
@@ -154,7 +151,7 @@ void __udelay(unsigned long usec)
void reset_timer_masked(void)
{
struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer();
struct s5p_timer *const timer = s5p_get_base_timer();
/* reset time */
lastdec = readl(&timer->tcnto4);
@@ -163,7 +160,7 @@ void reset_timer_masked(void)
unsigned long get_timer_masked(void)
{
struct s5pc1xx_timer *const timer = s5pc1xx_get_base_timer();
struct s5p_timer *const timer = s5p_get_base_timer();
unsigned long now = readl(&timer->tcnto4);
if (lastdec >= now)

View File

@@ -32,9 +32,7 @@ SOBJS = cache.o
SOBJS += reset.o
COBJS += clock.o
COBJS += cpu_info.o
COBJS += sromc.o
COBJS += timer.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))

View File

@@ -2,7 +2,7 @@
* Copyright (C) 2009 Samsung Electronics
* Minkyu Kang <mk7.kang@samsung.com>
*
* based on arch/arm/cpu/arm_cortexa8/omap3/cache.S
* based on arch/arm/cpu/armv7/omap3/cache.S
*
* See file CREDITS for list of people who contributed to this
* project.

View File

@@ -38,14 +38,16 @@
#define CONFIG_SYS_CLK_FREQ_C110 24000000
#endif
unsigned long (*get_pclk)(void);
unsigned long (*get_uart_clk)(int dev_index);
unsigned long (*get_pwm_clk)(void);
unsigned long (*get_arm_clk)(void);
unsigned long (*get_pll_clk)(int);
/* s5pc110: return pll clock frequency */
static unsigned long s5pc100_get_pll_clk(int pllreg)
{
struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc100_clock *clk =
(struct s5pc100_clock *)samsung_get_base_clock();
unsigned long r, m, p, s, mask, fout;
unsigned int freq;
@@ -95,7 +97,8 @@ static unsigned long s5pc100_get_pll_clk(int pllreg)
/* s5pc100: return pll clock frequency */
static unsigned long s5pc110_get_pll_clk(int pllreg)
{
struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc110_clock *clk =
(struct s5pc110_clock *)samsung_get_base_clock();
unsigned long r, m, p, s, mask, fout;
unsigned int freq;
@@ -151,7 +154,8 @@ static unsigned long s5pc110_get_pll_clk(int pllreg)
/* s5pc110: return ARM clock frequency */
static unsigned long s5pc110_get_arm_clk(void)
{
struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc110_clock *clk =
(struct s5pc110_clock *)samsung_get_base_clock();
unsigned long div;
unsigned long dout_apll, armclk;
unsigned int apll_ratio;
@@ -170,7 +174,8 @@ static unsigned long s5pc110_get_arm_clk(void)
/* s5pc100: return ARM clock frequency */
static unsigned long s5pc100_get_arm_clk(void)
{
struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc100_clock *clk =
(struct s5pc100_clock *)samsung_get_base_clock();
unsigned long div;
unsigned long dout_apll, armclk;
unsigned int apll_ratio, arm_ratio;
@@ -191,7 +196,8 @@ static unsigned long s5pc100_get_arm_clk(void)
/* s5pc100: return HCLKD0 frequency */
static unsigned long get_hclk(void)
{
struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc100_clock *clk =
(struct s5pc100_clock *)samsung_get_base_clock();
unsigned long hclkd0;
uint div, d0_bus_ratio;
@@ -207,7 +213,8 @@ static unsigned long get_hclk(void)
/* s5pc100: return PCLKD1 frequency */
static unsigned long get_pclkd1(void)
{
struct s5pc100_clock *clk = (struct s5pc100_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc100_clock *clk =
(struct s5pc100_clock *)samsung_get_base_clock();
unsigned long d1_bus, pclkd1;
uint div, d1_bus_ratio, pclkd1_ratio;
@@ -227,7 +234,8 @@ static unsigned long get_pclkd1(void)
/* s5pc110: return HCLKs frequency */
static unsigned long get_hclk_sys(int dom)
{
struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc110_clock *clk =
(struct s5pc110_clock *)samsung_get_base_clock();
unsigned long hclk;
unsigned int div;
unsigned int offset;
@@ -255,7 +263,8 @@ static unsigned long get_hclk_sys(int dom)
/* s5pc110: return PCLKs frequency */
static unsigned long get_pclk_sys(int dom)
{
struct s5pc110_clock *clk = (struct s5pc110_clock *)S5PC1XX_CLOCK_BASE;
struct s5pc110_clock *clk =
(struct s5pc110_clock *)samsung_get_base_clock();
unsigned long pclk;
unsigned int div;
unsigned int offset;
@@ -289,15 +298,33 @@ static unsigned long s5pc100_get_pclk(void)
return get_pclkd1();
}
void s5pc1xx_clock_init(void)
/* s5pc1xx: return uart clock frequency */
static unsigned long s5pc1xx_get_uart_clk(int dev_index)
{
if (cpu_is_s5pc110())
return s5pc110_get_pclk();
else
return s5pc100_get_pclk();
}
/* s5pc1xx: return pwm clock frequency */
static unsigned long s5pc1xx_get_pwm_clk(void)
{
if (cpu_is_s5pc110())
return s5pc110_get_pclk();
else
return s5pc100_get_pclk();
}
void s5p_clock_init(void)
{
if (cpu_is_s5pc110()) {
get_pll_clk = s5pc110_get_pll_clk;
get_arm_clk = s5pc110_get_arm_clk;
get_pclk = s5pc110_get_pclk;
} else {
get_pll_clk = s5pc100_get_pll_clk;
get_arm_clk = s5pc100_get_arm_clk;
get_pclk = s5pc100_get_pclk;
}
get_uart_clk = s5pc1xx_get_uart_clk;
get_pwm_clk = s5pc1xx_get_pwm_clk;
}

View File

@@ -28,7 +28,7 @@
.globl reset_cpu
reset_cpu:
ldr r1, =S5PC1XX_PRO_ID
ldr r1, =S5PC100_PRO_ID
ldr r2, [r1]
ldr r4, =0x00010000
and r4, r2, r4

View File

@@ -35,12 +35,8 @@
void s5pc1xx_config_sromc(u32 srom_bank, u32 smc_bw_conf, u32 smc_bc_conf)
{
u32 tmp;
struct s5pc1xx_smc *srom;
if (cpu_is_s5pc100())
srom = (struct s5pc1xx_smc *)S5PC100_SROMC_BASE;
else
srom = (struct s5pc1xx_smc *)S5PC110_SROMC_BASE;
struct s5pc1xx_smc *srom =
(struct s5pc1xx_smc *)samsung_get_base_sromc();
/* Configure SMC_BW register to handle proper SROMC bank */
tmp = srom->bw;

View File

@@ -29,6 +29,7 @@
* MA 02111-1307 USA
*/
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
@@ -65,23 +66,26 @@ _end_vect:
*
*************************************************************************/
.globl _TEXT_BASE
_TEXT_BASE:
.word TEXT_BASE
.word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
_armboot_start:
.word _start
#endif
/*
* These are defined in the board-specific linker script.
*/
.globl _bss_start
_bss_start:
.word __bss_start
.globl _bss_start_ofs
_bss_start_ofs:
.word __bss_start - _start
.globl _bss_end
_bss_end:
.word _end
.globl _bss_end_ofs
_bss_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
@@ -95,6 +99,203 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
.globl _datarel_start_ofs
_datarel_start_ofs:
.word __datarel_start - _start
.globl _datarelrolocal_start_ofs
_datarelrolocal_start_ofs:
.word __datarelrolocal_start - _start
.globl _datarellocal_start_ofs
_datarellocal_start_ofs:
.word __datarellocal_start - _start
.globl _datarelro_start_ofs
_datarelro_start_ofs:
.word __datarelro_start - _start
.globl _got_start_ofs
_got_start_ofs:
.word __got_start - _start
.globl _got_end_Ofs
_got_end_ofs:
.word __got_end - _start
/*
* the actual reset code
*/
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0, cpsr
bic r0, r0, #0x1f
orr r0, r0, #0xd3
msr cpsr,r0
#if (CONFIG_OMAP34XX)
/* Copy vectors to mask ROM indirect addr */
adr r0, _start @ r0 <- current position of code
add r0, r0, #4 @ skip reset vector
mov r2, #64 @ r2 <- size to copy
add r2, r0, r2 @ r2 <- source end address
mov r1, #SRAM_OFFSET0 @ build vect addr
mov r3, #SRAM_OFFSET1
add r1, r1, r3
mov r3, #SRAM_OFFSET2
add r1, r1, r3
next:
ldmia r0!, {r3 - r10} @ copy from source address [r0]
stmia r1!, {r3 - r10} @ copy to target address [r1]
cmp r0, r2 @ until source end address [r2]
bne next @ loop until equal */
#if !defined(CONFIG_SYS_NAND_BOOT) && !defined(CONFIG_SYS_ONENAND_BOOT)
/* No need to copy/exec the clock code - DPLL adjust already done
* in NAND/oneNAND Boot.
*/
bl cpy_clk_code @ put dpll adjust code behind vectors
#endif /* NAND Boot */
#endif
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
ldr r0,=0x00000000
bl board_init_f
/*------------------------------------------------------------------------------*/
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
*/
.globl relocate_code
relocate_code:
mov r4, r0 /* save addr_sp */
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
mov r7, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
adr r0, _start
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
cmp r0, r6
#ifndef CONFIG_PRELOADER
beq jump_2_ram
#endif
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
/*
* fix .rel.dyn relocations
*/
ldr r0, _TEXT_BASE /* r0 <- Text base */
sub r9, r7, r0 /* r9 <- relocation offset */
ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
add r10, r10, r0 /* r10 <- sym table in FLASH */
ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
fixloop:
ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
add r0, r0, r9 /* r0 <- location to fix up in RAM */
ldr r1, [r2, #4]
and r8, r1, #0xff
cmp r8, #23 /* relative fixup? */
beq fixrel
cmp r8, #2 /* absolute fixup? */
beq fixabs
/* ignore unknown type of fixup */
b fixnext
fixabs:
/* absolute fix: set location to (offset) symbol value */
mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
add r1, r10, r1 /* r1 <- address of symbol in table */
ldr r1, [r1, #4] /* r1 <- symbol value */
add r1, r9 /* r1 <- relocated sym addr */
b fixnext
fixrel:
/* relative fix: increase location by offset */
ldr r1, [r0]
add r1, r1, r9
fixnext:
str r1, [r0]
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
cmp r2, r3
blo fixloop
clear_bss:
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
bne clbss_l
#endif /* #ifndef CONFIG_PRELOADER */
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
jump_2_ram:
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
add lr, lr, r9
#endif
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
/* jump to it ... */
mov pc, lr
_board_init_r_ofs:
.word board_init_r - _start
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
_rel_dyn_end_ofs:
.word __rel_dyn_end - _start
_dynsym_start_ofs:
.word __dynsym_start - _start
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
* the actual reset code
*/
@@ -151,15 +352,15 @@ relocate: @ relocate U-Boot to RAM
copy_loop: @ copy 32 bytes at a time
ldmia r0!, {r3 - r10} @ copy from source address [r0]
stmia r1!, {r3 - r10} @ copy to target address [r1]
cmp r0, r2 @ until source end addreee [r2]
ble copy_loop
cmp r0, r2 @ until source end address [r2]
blo copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
/* Set up the stack */
stack_setup:
ldr r0, _TEXT_BASE @ upper 128 KiB: relocated uboot
sub r0, r0, #CONFIG_SYS_MALLOC_LEN @ malloc area
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE @ bdinfo
sub r0, r0, #GENERATED_GBL_DATA_SIZE @ bdinfo
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ + CONFIG_STACKSIZE_FIQ)
#endif
@@ -180,7 +381,7 @@ clbss_l:
ldr pc, _start_armboot @ jump to C code
_start_armboot: .word start_armboot
#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*************************************************************************
*
@@ -263,11 +464,14 @@ cpu_init_crit:
@ user stack
stmia sp, {r0 - r12} @ Save user registers (now in
@ svc mode) r0-r12
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r2, _armboot_start
sub r2, r2, #(CONFIG_SYS_MALLOC_LEN)
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE + 8) @ set base 2 words into abort
sub r2, r2, #(GENERATED_GBL_DATA_SIZE + 8) @ set base 2 words into abort
#else
ldr r2, IRQ_STACK_START_IN @ set base 2 words into abort
@ stack
#endif
ldmia r2, {r2 - r3} @ get values for "aborted" pc
@ and cpsr (into parm regs)
add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
@@ -303,11 +507,14 @@ cpu_init_crit:
.endm
.macro get_bad_stack
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r13, _armboot_start @ setup our mode stack (enter
@ in banked mode)
sub r13, r13, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE + 8) @ move to reserved a couple
@ spots for abort stack
sub r13, r13, #(GENERATED_GBL_DATA_SIZE + 8) @ move to reserved a couple
#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack (enter
@ in banked mode)
#endif
str lr, [r13] @ save caller lr in position 0
@ of saved stack
@@ -328,10 +535,14 @@ cpu_init_crit:
sub r13, r13, #4 @ space on current stack for
@ scratch reg.
str r0, [r13] @ save R0's value.
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r0, _armboot_start @ get data regions start
sub r0, r0, #(CONFIG_SYS_MALLOC_LEN) @ move past malloc pool
sub r0, r0, #(CONFIG_SYS_GBL_DATA_SIZE + 8) @ move past gbl and a couple
sub r0, r0, #(GENERATED_GBL_DATA_SIZE + 8) @ move past gbl and a couple
#else
ldr r0, IRQ_STACK_START_IN @ get data regions start
@ spots for abort stack
#endif
str lr, [r0] @ save caller lr in position 0
@ of saved stack
mrs r0, spsr @ get the spsr

View File

@@ -23,8 +23,6 @@
#include <common.h>
#include <asm/io.h>
#include <asm/arch/mem.h>
#include <asm/arch/clocks.h>
#include <asm/arch/sys_proto.h>
/************************************************************

View File

@@ -0,0 +1,77 @@
/*
* January 2004 - Changed to support H4 device
* Copyright (c) 2004-2008 Texas Instruments
*
* (C) Copyright 2002
* Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
arch/arm/cpu/armv7/start.o (.text)
*(.text)
}
. = ALIGN(4);
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : {
*(.data)
__datarel_start = .;
*(.data.rel)
__datarelrolocal_start = .;
*(.data.rel.ro.local)
__datarellocal_start = .;
*(.data.rel.local)
__datarelro_start = .;
*(.data.rel.ro)
}
. = ALIGN(4);
__rel_dyn_start = .;
.rel.dyn : { *(.rel.dyn) }
__rel_dyn_end = .;
__dynsym_start = .;
.dynsym : { *(.dynsym) }
__got_start = .;
. = ALIGN(4);
.got : { *(.got) }
__got_end = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
. = ALIGN(4);
__bss_start = .;
.bss : { *(.bss) }
_end = .;
}

View File

@@ -48,11 +48,6 @@
*/
/*
* Put the user defined include files required.
*/
/*
* Put the user defined include files required.
*/

View File

@@ -82,9 +82,9 @@ struct npe {
/*
* prototypes...
*/
extern int npe_miiphy_read (char *devname, unsigned char addr,
extern int npe_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
extern int npe_miiphy_write (char *devname, unsigned char addr,
extern int npe_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value);
#endif /* ifndef NPE_H */

View File

@@ -100,7 +100,7 @@ int phy_setup_aneg (char *devname, unsigned char addr)
}
int npe_miiphy_read (char *devname, unsigned char addr,
int npe_miiphy_read (const char *devname, unsigned char addr,
unsigned char reg, unsigned short *value)
{
u16 val;
@@ -112,7 +112,7 @@ int npe_miiphy_read (char *devname, unsigned char addr,
} /* phy_read */
int npe_miiphy_write (char *devname, unsigned char addr,
int npe_miiphy_write (const char *devname, unsigned char addr,
unsigned char reg, unsigned short value)
{
ixEthAccMiiWriteRtn(addr, reg, value);

View File

@@ -27,6 +27,7 @@
* MA 02111-1307 USA
*/
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
#include <asm/arch/ixp425.h>
@@ -93,12 +94,15 @@ _fiq: .word fiq
* - jump to second stage
*/
.globl _TEXT_BASE
_TEXT_BASE:
.word TEXT_BASE
.word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
_armboot_start:
.word _start
#endif
/*
* These are defined in the board-specific linker script.
@@ -123,6 +127,274 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
.globl _datarel_start
_datarel_start:
.word __datarel_start
.globl _datarelrolocal_start
_datarelrolocal_start:
.word __datarelrolocal_start
.globl _datarellocal_start
_datarellocal_start:
.word __datarellocal_start
.globl _datarelro_start
_datarelro_start:
.word __datarelro_start
.globl _got_start
_got_start:
.word __got_start
.globl _got_end
_got_end:
.word __got_end
/*
* the actual reset code
*/
reset:
/* disable mmu, set big-endian */
mov r0, #0xf8
mcr p15, 0, r0, c1, c0, 0
CPWAIT r0
/* invalidate I & D caches & BTB */
mcr p15, 0, r0, c7, c7, 0
CPWAIT r0
/* invalidate I & Data TLB */
mcr p15, 0, r0, c8, c7, 0
CPWAIT r0
/* drain write and fill buffers */
mcr p15, 0, r0, c7, c10, 4
CPWAIT r0
/* disable write buffer coalescing */
mrc p15, 0, r0, c1, c0, 1
orr r0, r0, #1
mcr p15, 0, r0, c1, c0, 1
CPWAIT r0
/* set EXP CS0 to the optimum timing */
ldr r1, =CONFIG_SYS_EXP_CS0
ldr r2, =IXP425_EXP_CS0
str r1, [r2]
/* make sure flash is visible at 0 */
#if 0
ldr r2, =IXP425_EXP_CFG0
ldr r1, [r2]
orr r1, r1, #0x80000000
str r1, [r2]
#endif
mov r1, #CONFIG_SYS_SDR_CONFIG
ldr r2, =IXP425_SDR_CONFIG
str r1, [r2]
/* disable refresh cycles */
mov r1, #0
ldr r3, =IXP425_SDR_REFRESH
str r1, [r3]
/* send nop command */
mov r1, #3
ldr r4, =IXP425_SDR_IR
str r1, [r4]
DELAY_FOR 0x4000, r0
/* set SDRAM internal refresh val */
ldr r1, =CONFIG_SYS_SDRAM_REFRESH_CNT
str r1, [r3]
DELAY_FOR 0x4000, r0
/* send precharge-all command to close all open banks */
mov r1, #2
str r1, [r4]
DELAY_FOR 0x4000, r0
/* provide 8 auto-refresh cycles */
mov r1, #4
mov r5, #8
111: str r1, [r4]
DELAY_FOR 0x100, r0
subs r5, r5, #1
bne 111b
/* set mode register in sdram */
mov r1, #CONFIG_SYS_SDR_MODE_CONFIG
str r1, [r4]
DELAY_FOR 0x4000, r0
/* send normal operation command */
mov r1, #6
str r1, [r4]
DELAY_FOR 0x4000, r0
/* copy */
mov r0, #0
mov r4, r0
add r2, r0, #CONFIG_SYS_MONITOR_LEN
mov r1, #0x10000000
mov r5, r1
30:
ldr r3, [r0], #4
str r3, [r1], #4
cmp r0, r2
bne 30b
/* invalidate I & D caches & BTB */
mcr p15, 0, r0, c7, c7, 0
CPWAIT r0
/* invalidate I & Data TLB */
mcr p15, 0, r0, c8, c7, 0
CPWAIT r0
/* drain write and fill buffers */
mcr p15, 0, r0, c7, c10, 4
CPWAIT r0
/* move flash to 0x50000000 */
ldr r2, =IXP425_EXP_CFG0
ldr r1, [r2]
bic r1, r1, #0x80000000
str r1, [r2]
nop
nop
nop
nop
nop
nop
/* invalidate I & Data TLB */
mcr p15, 0, r0, c8, c7, 0
CPWAIT r0
/* enable I cache */
mrc p15, 0, r0, c1, c0, 0
orr r0, r0, #MMU_Control_I
mcr p15, 0, r0, c1, c0, 0
CPWAIT r0
mrs r0,cpsr /* set the cpu to SVC32 mode */
bic r0,r0,#0x1f /* (superviser mode, M=10011) */
orr r0,r0,#0x13
msr cpsr,r0
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
ldr r0,=0x00000000
bl board_init_f
/*------------------------------------------------------------------------------*/
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
*/
.globl relocate_code
relocate_code:
mov r4, r0 /* save addr_sp */
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
mov r7, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
ldr r2, _TEXT_BASE
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address */
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
/* fix got entries */
ldr r1, _TEXT_BASE /* Text base */
mov r0, r7 /* reloc addr */
ldr r2, _got_start /* addr in Flash */
ldr r3, _got_end /* addr in Flash */
sub r3, r3, r1
add r3, r3, r0
sub r2, r2, r1
add r2, r2, r0
fixloop:
ldr r4, [r2]
sub r4, r4, r1
add r4, r4, r0
str r4, [r2]
add r2, r2, #4
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
ldr r0, _bss_start
ldr r1, _bss_end
ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */
sub r0, r0, r3
add r0, r0, r4
sub r1, r1, r3
add r1, r1, r4
mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
bne clbss_l
bl coloured_LED_init
bl red_LED_on
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
ldr r0, _TEXT_BASE
ldr r2, _board_init_r
sub r2, r2, r0
add r2, r2, r7 /* position from board_init_r in RAM */
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
/* jump to it ... */
mov lr, r2
mov pc, lr
_board_init_r: .word board_init_r
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/****************************************************************************/
/* */
/* the actual reset code */
@@ -276,15 +548,15 @@ relocate: /* relocate U-Boot to RAM */
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
/* Set up the stack */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
@@ -299,11 +571,12 @@ clear_bss:
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
ble clbss_l
blo clbss_l
ldr pc, _start_armboot
_start_armboot: .word start_armboot
#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/****************************************************************************/
@@ -345,9 +618,13 @@ _start_armboot: .word start_armboot
stmia sp, {r0 - r12} /* Calling r0-r12 */
add r8, sp, #S_PC
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r2, _armboot_start
sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
#else
ldr r2, IRQ_STACK_START_IN
#endif
ldmia r2, {r2 - r4} /* get pc, cpsr, old_r0 */
add r0, sp, #S_FRAME_SIZE /* restore sp_SVC */
@@ -382,9 +659,13 @@ _start_armboot: .word start_armboot
.endm
.macro get_bad_stack
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r13, _armboot_start @ setup our mode stack
sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
#endif
str lr, [r13] @ save caller lr / spsr
mrs lr, spsr

View File

@@ -39,11 +39,23 @@ SECTIONS
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
.data : {
*(.data)
__datarel_start = .;
*(.data.rel)
__datarelrolocal_start = .;
*(.data.rel.ro.local)
__datarellocal_start = .;
*(.data.rel.local)
__datarelro_start = .;
*(.data.rel.ro)
}
__got_start = .;
. = ALIGN(4);
.got : { *(.got) }
__got_end = .;
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }

View File

@@ -24,11 +24,10 @@
* MA 02111-1307 USA
*/
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
/*
*************************************************************************
*
@@ -72,12 +71,15 @@ _fiq: .word fiq
*************************************************************************
*/
.globl _TEXT_BASE
_TEXT_BASE:
.word TEXT_BASE
.word CONFIG_SYS_TEXT_BASE
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
.globl _armboot_start
_armboot_start:
.word _start
#endif
/*
* These are defined in the board-specific linker script.
@@ -102,7 +104,181 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif
#if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
.globl _datarel_start
_datarel_start:
.word __datarel_start
.globl _datarelrolocal_start
_datarelrolocal_start:
.word __datarelrolocal_start
.globl _datarellocal_start
_datarellocal_start:
.word __datarellocal_start
.globl _datarelro_start
_datarelro_start:
.word __datarelro_start
.globl _got_start
_got_start:
.word __got_start
.globl _got_end
_got_end:
.word __got_end
/*
* the actual reset code
*/
reset:
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
#define pWDTCTL 0x80001400 /* Watchdog Timer control register */
#define pINTENC 0x8000050C /* Interupt-Controller enable clear register */
#define pCLKSET 0x80000420 /* clock divisor register */
/* disable watchdog, set watchdog control register to
* all zeros (default reset)
*/
ldr r0, =pWDTCTL
mov r1, #0x0
str r1, [r0]
/*
* mask all IRQs by setting all bits in the INTENC register (default)
*/
mov r1, #0xffffffff
ldr r0, =pINTENC
str r1, [r0]
/* FCLK:HCLK:PCLK = 1:2:2 */
/* default FCLK is 200 MHz, using 14.7456 MHz fin */
ldr r0, =pCLKSET
ldr r1, =0x0004ee39
@ ldr r1, =0x0005ee39 @ 1: 2: 4
str r1, [r0]
/*
* we do sys-critical inits only at reboot,
* not when booting from ram!
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
#endif
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
ldr r0,=0x00000000
bl board_init_f
/*------------------------------------------------------------------------------*/
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
*/
.globl relocate_code
relocate_code:
mov r4, r0 /* save addr_sp */
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
mov r7, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
mov sp, r4
adr r0, _start
ldr r2, _TEXT_BASE
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address */
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
copy_loop:
ldmia r0!, {r9-r10} /* copy from source address [r0] */
stmia r6!, {r9-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#ifndef CONFIG_PRELOADER
/* fix got entries */
ldr r1, _TEXT_BASE /* Text base */
mov r0, r7 /* reloc addr */
ldr r2, _got_start /* addr in Flash */
ldr r3, _got_end /* addr in Flash */
sub r3, r3, r1
add r3, r3, r0
sub r2, r2, r1
add r2, r2, r0
fixloop:
ldr r4, [r2]
sub r4, r4, r1
add r4, r4, r0
str r4, [r2]
add r2, r2, #4
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
#ifndef CONFIG_PRELOADER
ldr r0, _bss_start
ldr r1, _bss_end
ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */
sub r0, r0, r3
add r0, r0, r4
sub r1, r1, r3
add r1, r1, r4
mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
bne clbss_l
#endif
/*
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
ldr r0, _TEXT_BASE
ldr r2, _board_init_r
sub r2, r2, r0
add r2, r2, r7 /* position from board_init_r in RAM */
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
/* jump to it ... */
mov lr, r2
mov pc, lr
_board_init_r: .word board_init_r
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
* the actual reset code
*/
@@ -164,16 +340,15 @@ relocate: /* relocate U-Boot to RAM */
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end addreee [r2] */
blt copy_loop /* a 'ble' here actually copies */
/* four bytes of bss */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
/* Set up the stack */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
sub r0, r0, #GENERATED_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif
@@ -190,12 +365,12 @@ clear_bss:
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
ble clbss_l
blo clbss_l
ldr pc, _start_armboot
_start_armboot: .word start_armboot
#endif /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/*
*************************************************************************
@@ -285,9 +460,13 @@ cpu_init_crit:
.macro bad_save_user_regs
sub sp, sp, #S_FRAME_SIZE
stmia sp, {r0 - r12} @ Calling r0-r12
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r2, _armboot_start
sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
#else
ldr r2, IRQ_STACK_START_IN
#endif
ldmia r2, {r2 - r3} @ get pc, cpsr
add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
@@ -318,9 +497,13 @@ cpu_init_crit:
.endm
.macro get_bad_stack
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r13, _armboot_start @ setup our mode stack
sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
#endif
str lr, [r13] @ save caller lr / spsr
mrs lr, spsr

View File

@@ -39,11 +39,23 @@ SECTIONS
.rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) }
. = ALIGN(4);
.data : { *(.data) }
.data : {
*(.data)
__datarel_start = .;
*(.data.rel)
__datarelrolocal_start = .;
*(.data.rel.ro.local)
__datarellocal_start = .;
*(.data.rel.local)
__datarelro_start = .;
*(.data.rel.ro)
}
__got_start = .;
. = ALIGN(4);
.got : { *(.got) }
__got_end = .;
. = .;
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }

View File

@@ -30,10 +30,11 @@
* CPU specific code
*/
#include <common.h>
#include <command.h>
#include <asm/arch/pxa-regs.h>
#include <asm/io.h>
#include <asm/system.h>
#include <command.h>
#include <common.h>
#include <asm/arch/pxa-regs.h>
static void cache_flush(void);
@@ -71,17 +72,249 @@ void set_GPIO_mode(int gpio_mode)
{
int gpio = gpio_mode & GPIO_MD_MASK_NR;
int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
int gafr;
int val;
/* This below changes direction setting of GPIO "gpio" */
val = readl(GPDR(gpio));
if (gpio_mode & GPIO_MD_MASK_DIR)
{
GPDR(gpio) |= GPIO_bit(gpio);
}
val |= GPIO_bit(gpio);
else
{
GPDR(gpio) &= ~GPIO_bit(gpio);
}
gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
val &= ~GPIO_bit(gpio);
writel(val, GPDR(gpio));
/* This below updates only AF of GPIO "gpio" */
val = readl(GAFR(gpio));
val &= ~(0x3 << (((gpio) & 0xf) * 2));
val |= fn << (((gpio) & 0xf) * 2);
writel(val, GAFR(gpio));
}
#endif /* CONFIG_CPU_MONAHANS */
void pxa_wait_ticks(int ticks)
{
writel(0, OSCR);
while (readl(OSCR) < ticks)
asm volatile("":::"memory");
}
inline void writelrb(uint32_t val, uint32_t addr)
{
writel(val, addr);
asm volatile("":::"memory");
readl(addr);
asm volatile("":::"memory");
}
void pxa_dram_init(void)
{
uint32_t tmp;
int i;
/*
* 1) Initialize Asynchronous static memory controller
*/
writelrb(CONFIG_SYS_MSC0_VAL, MSC0);
writelrb(CONFIG_SYS_MSC1_VAL, MSC1);
writelrb(CONFIG_SYS_MSC2_VAL, MSC2);
/*
* 2) Initialize Card Interface
*/
/* MECR: Memory Expansion Card Register */
writelrb(CONFIG_SYS_MECR_VAL, MECR);
/* MCMEM0: Card Interface slot 0 timing */
writelrb(CONFIG_SYS_MCMEM0_VAL, MCMEM0);
/* MCMEM1: Card Interface slot 1 timing */
writelrb(CONFIG_SYS_MCMEM1_VAL, MCMEM1);
/* MCATT0: Card Interface Attribute Space Timing, slot 0 */
writelrb(CONFIG_SYS_MCATT0_VAL, MCATT0);
/* MCATT1: Card Interface Attribute Space Timing, slot 1 */
writelrb(CONFIG_SYS_MCATT1_VAL, MCATT1);
/* MCIO0: Card Interface I/O Space Timing, slot 0 */
writelrb(CONFIG_SYS_MCIO0_VAL, MCIO0);
/* MCIO1: Card Interface I/O Space Timing, slot 1 */
writelrb(CONFIG_SYS_MCIO1_VAL, MCIO1);
/*
* 3) Configure Fly-By DMA register
*/
writelrb(CONFIG_SYS_FLYCNFG_VAL, FLYCNFG);
/*
* 4) Initialize Timing for Sync Memory (SDCLK0)
*/
/*
* Before accessing MDREFR we need a valid DRI field, so we set
* this to power on defaults + DRI field.
*/
/* Read current MDREFR config and zero out DRI */
tmp = readl(MDREFR) & ~0xfff;
/* Add user-specified DRI */
tmp |= CONFIG_SYS_MDREFR_VAL & 0xfff;
/* Configure important bits */
tmp |= MDREFR_K0RUN | MDREFR_SLFRSH;
tmp &= ~(MDREFR_APD | MDREFR_E1PIN);
/* Write MDREFR back */
writelrb(tmp, MDREFR);
/*
* 5) Initialize Synchronous Static Memory (Flash/Peripherals)
*/
/* Initialize SXCNFG register. Assert the enable bits.
*
* Write SXMRS to cause an MRS command to all enabled banks of
* synchronous static memory. Note that SXLCR need not be written
* at this time.
*/
writelrb(CONFIG_SYS_SXCNFG_VAL, SXCNFG);
/*
* 6) Initialize SDRAM
*/
writelrb(CONFIG_SYS_MDREFR_VAL & ~MDREFR_SLFRSH, MDREFR);
writelrb(CONFIG_SYS_MDREFR_VAL | MDREFR_E1PIN, MDREFR);
/*
* 7) Write MDCNFG with MDCNFG:DEx deasserted (set to 0), to configure
* but not enable each SDRAM partition pair.
*/
writelrb(CONFIG_SYS_MDCNFG_VAL &
~(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3), MDCNFG);
/* Wait for the clock to the SDRAMs to stabilize, 100..200 usec. */
pxa_wait_ticks(0x300);
/*
* 8) Trigger a number (usually 8) refresh cycles by attempting
* non-burst read or write accesses to disabled SDRAM, as commonly
* specified in the power up sequence documented in SDRAM data
* sheets. The address(es) used for this purpose must not be
* cacheable.
*/
for (i = 9; i >= 0; i--) {
writel(i, 0xa0000000);
asm volatile("":::"memory");
}
/*
* 9) Write MDCNFG with enable bits asserted (MDCNFG:DEx set to 1).
*/
tmp = CONFIG_SYS_MDCNFG_VAL &
(MDCNFG_DE0 | MDCNFG_DE1 | MDCNFG_DE2 | MDCNFG_DE3);
tmp |= readl(MDCNFG);
writelrb(tmp, MDCNFG);
/*
* 10) Write MDMRS.
*/
writelrb(CONFIG_SYS_MDMRS_VAL, MDMRS);
/*
* 11) Enable APD
*/
if (CONFIG_SYS_MDREFR_VAL & MDREFR_APD) {
tmp = readl(MDREFR);
tmp |= MDREFR_APD;
writelrb(tmp, MDREFR);
}
}
void pxa_gpio_setup(void)
{
writel(CONFIG_SYS_GPSR0_VAL, GPSR0);
writel(CONFIG_SYS_GPSR1_VAL, GPSR1);
writel(CONFIG_SYS_GPSR2_VAL, GPSR2);
#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
writel(CONFIG_SYS_GPSR3_VAL, GPSR3);
#endif
writel(CONFIG_SYS_GPCR0_VAL, GPCR0);
writel(CONFIG_SYS_GPCR1_VAL, GPCR1);
writel(CONFIG_SYS_GPCR2_VAL, GPCR2);
#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
writel(CONFIG_SYS_GPCR3_VAL, GPCR3);
#endif
writel(CONFIG_SYS_GPDR0_VAL, GPDR0);
writel(CONFIG_SYS_GPDR1_VAL, GPDR1);
writel(CONFIG_SYS_GPDR2_VAL, GPDR2);
#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
writel(CONFIG_SYS_GPDR3_VAL, GPDR3);
#endif
writel(CONFIG_SYS_GAFR0_L_VAL, GAFR0_L);
writel(CONFIG_SYS_GAFR0_U_VAL, GAFR0_U);
writel(CONFIG_SYS_GAFR1_L_VAL, GAFR1_L);
writel(CONFIG_SYS_GAFR1_U_VAL, GAFR1_U);
writel(CONFIG_SYS_GAFR2_L_VAL, GAFR2_L);
writel(CONFIG_SYS_GAFR2_U_VAL, GAFR2_U);
#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
writel(CONFIG_SYS_GAFR3_L_VAL, GAFR3_L);
writel(CONFIG_SYS_GAFR3_U_VAL, GAFR3_U);
#endif
writel(CONFIG_SYS_PSSR_VAL, PSSR);
}
void pxa_interrupt_setup(void)
{
writel(0, ICLR);
writel(0, ICMR);
#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
writel(0, ICLR2);
writel(0, ICMR2);
#endif
}
void pxa_clock_setup(void)
{
#ifndef CONFIG_CPU_MONAHANS
writel(CONFIG_SYS_CKEN, CKEN);
writel(CONFIG_SYS_CCCR, CCCR);
asm volatile("mcr p14, 0, %0, c6, c0, 0"::"r"(2));
#else
/* Set CKENA/CKENB/ACCR for MH */
#endif
/* enable the 32Khz oscillator for RTC and PowerManager */
writel(OSCC_OON, OSCC);
while(!(readl(OSCC) & OSCC_OOK))
asm volatile("":::"memory");
}
void pxa_wakeup(void)
{
uint32_t rcsr;
rcsr = readl(RCSR);
writel(rcsr & (RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR), RCSR);
/* Wakeup */
if (rcsr & RCSR_SMR) {
writel(PSSR_PH, PSSR);
pxa_dram_init();
icache_disable();
dcache_disable();
asm volatile("mov pc, %0"::"r"(readl(PSSR)));
}
}
int arch_cpu_init(void)
{
pxa_gpio_setup();
/* pxa_wait_ticks(0x8000); */
pxa_wakeup();
pxa_interrupt_setup();
pxa_clock_setup();
return 0;
}

View File

@@ -33,6 +33,7 @@
/* FIXME: this file is PXA255 specific! What about other XScales? */
#include <common.h>
#include <asm/io.h>
#ifdef CONFIG_HARD_I2C
@@ -93,19 +94,21 @@ struct i2c_msg {
static void i2c_reset( void )
{
ICR &= ~ICR_IUE; /* disable unit */
ICR |= ICR_UR; /* reset the unit */
writel(readl(ICR) & ~ICR_IUE, ICR); /* disable unit */
writel(readl(ICR) | ICR_UR, ICR); /* reset the unit */
udelay(100);
ICR &= ~ICR_IUE; /* disable unit */
writel(readl(ICR) & ~ICR_IUE, ICR); /* disable unit */
#ifdef CONFIG_CPU_MONAHANS
CKENB |= (CKENB_4_I2C); /* | CKENB_1_PWM1 | CKENB_0_PWM0); */
/* | CKENB_1_PWM1 | CKENB_0_PWM0); */
writel(readl(CKENB) | (CKENB_4_I2C), CKENB);
#else /* CONFIG_CPU_MONAHANS */
CKEN |= CKEN14_I2C; /* set the global I2C clock on */
/* set the global I2C clock on */
writel(readl(CKEN) | CKEN14_I2C, CKEN);
#endif
ISAR = I2C_PXA_SLAVE_ADDR; /* set our slave address */
ICR = I2C_ICR_INIT; /* set control register values */
ISR = I2C_ISR_INIT; /* set clear interrupt bits */
ICR |= ICR_IUE; /* enable unit */
writel(I2C_PXA_SLAVE_ADDR, ISAR); /* set our slave address */
writel(I2C_ICR_INIT, ICR); /* set control reg values */
writel(I2C_ISR_INIT, ISR); /* set clear interrupt bits */
writel(readl(ICR) | ICR_IUE, ICR); /* enable unit */
udelay(100);
}
@@ -159,22 +162,26 @@ int i2c_transfer(struct i2c_msg *msg)
goto transfer_error_bus_busy;
/* start transmission */
ICR &= ~ICR_START;
ICR &= ~ICR_STOP;
IDBR = msg->data;
if (msg->condition == I2C_COND_START) ICR |= ICR_START;
if (msg->condition == I2C_COND_STOP) ICR |= ICR_STOP;
if (msg->acknack == I2C_ACKNAK_SENDNAK) ICR |= ICR_ACKNAK;
if (msg->acknack == I2C_ACKNAK_SENDACK) ICR &= ~ICR_ACKNAK;
ICR &= ~ICR_ALDIE;
ICR |= ICR_TB;
writel(readl(ICR) & ~ICR_START, ICR);
writel(readl(ICR) & ~ICR_STOP, ICR);
writel(msg->data, IDBR);
if (msg->condition == I2C_COND_START)
writel(readl(ICR) | ICR_START, ICR);
if (msg->condition == I2C_COND_STOP)
writel(readl(ICR) | ICR_STOP, ICR);
if (msg->acknack == I2C_ACKNAK_SENDNAK)
writel(readl(ICR) | ICR_ACKNAK, ICR);
if (msg->acknack == I2C_ACKNAK_SENDACK)
writel(readl(ICR) & ~ICR_ACKNAK, ICR);
writel(readl(ICR) & ~ICR_ALDIE, ICR);
writel(readl(ICR) | ICR_TB, ICR);
/* transmit register empty? */
if (!i2c_isr_set_cleared(ISR_ITE,0))
goto transfer_error_transmit_timeout;
/* clear 'transmit empty' state */
ISR |= ISR_ITE;
writel(readl(ISR) | ISR_ITE, ISR);
/* wait for ACK from slave */
if (msg->acknack == I2C_ACKNAK_WAITACK)
@@ -189,23 +196,27 @@ int i2c_transfer(struct i2c_msg *msg)
goto transfer_error_bus_busy;
/* start receive */
ICR &= ~ICR_START;
ICR &= ~ICR_STOP;
if (msg->condition == I2C_COND_START) ICR |= ICR_START;
if (msg->condition == I2C_COND_STOP) ICR |= ICR_STOP;
if (msg->acknack == I2C_ACKNAK_SENDNAK) ICR |= ICR_ACKNAK;
if (msg->acknack == I2C_ACKNAK_SENDACK) ICR &= ~ICR_ACKNAK;
ICR &= ~ICR_ALDIE;
ICR |= ICR_TB;
writel(readl(ICR) & ~ICR_START, ICR);
writel(readl(ICR) & ~ICR_STOP, ICR);
if (msg->condition == I2C_COND_START)
writel(readl(ICR) | ICR_START, ICR);
if (msg->condition == I2C_COND_STOP)
writel(readl(ICR) | ICR_STOP, ICR);
if (msg->acknack == I2C_ACKNAK_SENDNAK)
writel(readl(ICR) | ICR_ACKNAK, ICR);
if (msg->acknack == I2C_ACKNAK_SENDACK)
writel(readl(ICR) & ~ICR_ACKNAK, ICR);
writel(readl(ICR) & ~ICR_ALDIE, ICR);
writel(readl(ICR) | ICR_TB, ICR);
/* receive register full? */
if (!i2c_isr_set_cleared(ISR_IRF,0))
goto transfer_error_receive_timeout;
msg->data = IDBR;
msg->data = readl(IDBR);
/* clear 'receive empty' state */
ISR |= ISR_IRF;
writel(readl(ISR) | ISR_IRF, ISR);
break;

View File

@@ -35,6 +35,7 @@
#include <stdio_dev.h>
#include <lcd.h>
#include <asm/arch/pxa-regs.h>
#include <asm/io.h>
/* #define DEBUG */
@@ -56,26 +57,26 @@
/* 640x480x16 @ 61 Hz */
vidinfo_t panel_info = {
vl_col: 640,
vl_row: 480,
vl_width: 640,
vl_height: 480,
vl_clkp: CONFIG_SYS_HIGH,
vl_oep: CONFIG_SYS_HIGH,
vl_hsp: CONFIG_SYS_HIGH,
vl_vsp: CONFIG_SYS_HIGH,
vl_dp: CONFIG_SYS_HIGH,
vl_bpix: LCD_BPP,
vl_lbw: 0,
vl_splt: 0,
vl_clor: 0,
vl_tft: 1,
vl_hpw: 40,
vl_blw: 56,
vl_elw: 56,
vl_vpw: 20,
vl_bfw: 8,
vl_efw: 8,
.vl_col = 640,
.vl_row = 480,
.vl_width = 640,
.vl_height = 480,
.vl_clkp = CONFIG_SYS_HIGH,
.vl_oep = CONFIG_SYS_HIGH,
.vl_hsp = CONFIG_SYS_HIGH,
.vl_vsp = CONFIG_SYS_HIGH,
.vl_dp = CONFIG_SYS_HIGH,
.vl_bpix = LCD_BPP,
.vl_lbw = 0,
.vl_splt = 0,
.vl_clor = 0,
.vl_tft = 1,
.vl_hpw = 40,
.vl_blw = 56,
.vl_elw = 56,
.vl_vpw = 20,
.vl_bfw = 8,
.vl_efw = 8,
};
#endif /* CONFIG_PXA_VIDEO */
@@ -90,28 +91,61 @@ vidinfo_t panel_info = {
# define REG_LCCR3 0x0340FF08
vidinfo_t panel_info = {
vl_col: 640,
vl_row: 480,
vl_width: 157,
vl_height: 118,
vl_clkp: CONFIG_SYS_HIGH,
vl_oep: CONFIG_SYS_HIGH,
vl_hsp: CONFIG_SYS_HIGH,
vl_vsp: CONFIG_SYS_HIGH,
vl_dp: CONFIG_SYS_HIGH,
vl_bpix: LCD_BPP,
vl_lbw: 0,
vl_splt: 1,
vl_clor: 1,
vl_tft: 0,
vl_hpw: 1,
vl_blw: 3,
vl_elw: 3,
vl_vpw: 1,
vl_bfw: 0,
vl_efw: 0,
.vl_col = 640,
.vl_row = 480,
.vl_width = 157,
.vl_height = 118,
.vl_clkp = CONFIG_SYS_HIGH,
.vl_oep = CONFIG_SYS_HIGH,
.vl_hsp = CONFIG_SYS_HIGH,
.vl_vsp = CONFIG_SYS_HIGH,
.vl_dp = CONFIG_SYS_HIGH,
.vl_bpix = LCD_BPP,
.vl_lbw = 0,
.vl_splt = 1,
.vl_clor = 1,
.vl_tft = 0,
.vl_hpw = 1,
.vl_blw = 3,
.vl_elw = 3,
.vl_vpw = 1,
.vl_bfw = 0,
.vl_efw = 0,
};
#endif /* CONFIG_SHARP_LM8V31 */
/*----------------------------------------------------------------------*/
#ifdef CONFIG_VOIPAC_LCD
# define LCD_BPP LCD_COLOR8
# define LCD_INVERT_COLORS
/* you have to set lccr0 and lccr3 (including pcd) */
# define REG_LCCR0 0x043008f8
# define REG_LCCR3 0x0340FF08
vidinfo_t panel_info = {
.vl_col = 640,
.vl_row = 480,
.vl_width = 157,
.vl_height = 118,
.vl_clkp = CONFIG_SYS_HIGH,
.vl_oep = CONFIG_SYS_HIGH,
.vl_hsp = CONFIG_SYS_HIGH,
.vl_vsp = CONFIG_SYS_HIGH,
.vl_dp = CONFIG_SYS_HIGH,
.vl_bpix = LCD_BPP,
.vl_lbw = 0,
.vl_splt = 1,
.vl_clor = 1,
.vl_tft = 1,
.vl_hpw = 32,
.vl_blw = 144,
.vl_elw = 32,
.vl_vpw = 2,
.vl_bfw = 13,
.vl_efw = 30,
};
#endif /* CONFIG_VOIPAC_LCD */
/*----------------------------------------------------------------------*/
#ifdef CONFIG_HITACHI_SX14
@@ -123,29 +157,164 @@ vidinfo_t panel_info = {
#define REG_LCCR3 0x0340FF20
vidinfo_t panel_info = {
vl_col: 320,
vl_row: 240,
vl_width: 167,
vl_height: 109,
vl_clkp: CONFIG_SYS_HIGH,
vl_oep: CONFIG_SYS_HIGH,
vl_hsp: CONFIG_SYS_HIGH,
vl_vsp: CONFIG_SYS_HIGH,
vl_dp: CONFIG_SYS_HIGH,
vl_bpix: LCD_BPP,
vl_lbw: 1,
vl_splt: 0,
vl_clor: 1,
vl_tft: 0,
vl_hpw: 1,
vl_blw: 1,
vl_elw: 1,
vl_vpw: 7,
vl_bfw: 0,
vl_efw: 0,
.vl_col = 320,
.vl_row = 240,
.vl_width = 167,
.vl_height = 109,
.vl_clkp = CONFIG_SYS_HIGH,
.vl_oep = CONFIG_SYS_HIGH,
.vl_hsp = CONFIG_SYS_HIGH,
.vl_vsp = CONFIG_SYS_HIGH,
.vl_dp = CONFIG_SYS_HIGH,
.vl_bpix = LCD_BPP,
.vl_lbw = 1,
.vl_splt = 0,
.vl_clor = 1,
.vl_tft = 0,
.vl_hpw = 1,
.vl_blw = 1,
.vl_elw = 1,
.vl_vpw = 7,
.vl_bfw = 0,
.vl_efw = 0,
};
#endif /* CONFIG_HITACHI_SX14 */
/*----------------------------------------------------------------------*/
#ifdef CONFIG_LMS283GF05
# define LCD_BPP LCD_COLOR8
/*# define LCD_INVERT_COLORS*/
/* you have to set lccr0 and lccr3 (including pcd) */
# define REG_LCCR0 0x043008f8
# define REG_LCCR3 0x03b00009
vidinfo_t panel_info = {
.vl_col = 240,
.vl_row = 320,
.vl_width = 240,
.vl_height = 320,
.vl_clkp = CONFIG_SYS_HIGH,
.vl_oep = CONFIG_SYS_LOW,
.vl_hsp = CONFIG_SYS_LOW,
.vl_vsp = CONFIG_SYS_LOW,
.vl_dp = CONFIG_SYS_HIGH,
.vl_bpix = LCD_BPP,
.vl_lbw = 0,
.vl_splt = 1,
.vl_clor = 1,
.vl_tft = 1,
.vl_hpw = 4,
.vl_blw = 4,
.vl_elw = 8,
.vl_vpw = 4,
.vl_bfw = 4,
.vl_efw = 8,
};
#endif /* CONFIG_LMS283GF05 */
/*----------------------------------------------------------------------*/
#ifdef CONFIG_ACX517AKN
# define LCD_BPP LCD_COLOR8
/* you have to set lccr0 and lccr3 (including pcd) */
# define REG_LCCR0 0x003008f9
# define REG_LCCR3 0x03700006
vidinfo_t panel_info = {
.vl_col = 320,
.vl_row = 320,
.vl_width = 320,
.vl_height = 320,
.vl_clkp = CONFIG_SYS_HIGH,
.vl_oep = CONFIG_SYS_LOW,
.vl_hsp = CONFIG_SYS_LOW,
.vl_vsp = CONFIG_SYS_LOW,
.vl_dp = CONFIG_SYS_HIGH,
.vl_bpix = LCD_BPP,
.vl_lbw = 0,
.vl_splt = 1,
.vl_clor = 1,
.vl_tft = 1,
.vl_hpw = 0x04,
.vl_blw = 0x1c,
.vl_elw = 0x08,
.vl_vpw = 0x01,
.vl_bfw = 0x07,
.vl_efw = 0x08,
};
#endif /* CONFIG_ACX517AKN */
/*----------------------------------------------------------------------*/
#ifdef CONFIG_LQ038J7DH53
# define LCD_BPP LCD_COLOR8
/* you have to set lccr0 and lccr3 (including pcd) */
# define REG_LCCR0 0x003008f9
# define REG_LCCR3 0x03700004
vidinfo_t panel_info = {
.vl_col = 320,
.vl_row = 480,
.vl_width = 320,
.vl_height = 480,
.vl_clkp = CONFIG_SYS_HIGH,
.vl_oep = CONFIG_SYS_LOW,
.vl_hsp = CONFIG_SYS_LOW,
.vl_vsp = CONFIG_SYS_LOW,
.vl_dp = CONFIG_SYS_HIGH,
.vl_bpix = LCD_BPP,
.vl_lbw = 0,
.vl_splt = 1,
.vl_clor = 1,
.vl_tft = 1,
.vl_hpw = 0x04,
.vl_blw = 0x20,
.vl_elw = 0x01,
.vl_vpw = 0x01,
.vl_bfw = 0x04,
.vl_efw = 0x01,
};
#endif /* CONFIG_ACX517AKN */
/*----------------------------------------------------------------------*/
#ifdef CONFIG_LITTLETON_LCD
# define LCD_BPP LCD_COLOR8
/* you have to set lccr0 and lccr3 (including pcd) */
# define REG_LCCR0 0x003008f8
# define REG_LCCR3 0x0300FF04
vidinfo_t panel_info = {
.vl_col = 480,
.vl_row = 640,
.vl_width = 480,
.vl_height = 640,
.vl_clkp = CONFIG_SYS_HIGH,
.vl_oep = CONFIG_SYS_HIGH,
.vl_hsp = CONFIG_SYS_HIGH,
.vl_vsp = CONFIG_SYS_HIGH,
.vl_dp = CONFIG_SYS_HIGH,
.vl_bpix = LCD_BPP,
.vl_lbw = 0,
.vl_splt = 0,
.vl_clor = 0,
.vl_tft = 1,
.vl_hpw = 9,
.vl_blw = 8,
.vl_elw = 24,
.vl_vpw = 2,
.vl_bfw = 2,
.vl_efw = 4,
};
#endif /* CONFIG_LITTLETON_LCD */
/*----------------------------------------------------------------------*/
#if LCD_BPP == LCD_COLOR8
@@ -292,7 +461,9 @@ static int pxafb_init_mem (void *lcdbase, vidinfo_t *vid)
return 0;
}
#ifdef CONFIG_CPU_MONAHANS
static inline void pxafb_setup_gpio (vidinfo_t *vid) {}
#else
static void pxafb_setup_gpio (vidinfo_t *vid)
{
u_long lccr0;
@@ -308,12 +479,14 @@ static void pxafb_setup_gpio (vidinfo_t *vid)
{
debug("Setting GPIO for 4 bit data\n");
/* bits 58-61 */
GPDR1 |= (0xf << 26);
GAFR1_U = (GAFR1_U & ~(0xff << 20)) | (0xaa << 20);
writel(readl(GPDR1) | (0xf << 26), GPDR1);
writel((readl(GAFR1_U) & ~(0xff << 20)) | (0xaa << 20),
GAFR1_U);
/* bits 74-77 */
GPDR2 |= (0xf << 10);
GAFR2_L = (GAFR2_L & ~(0xff << 20)) | (0xaa << 20);
writel(readl(GPDR2) | (0xf << 10), GPDR2);
writel((readl(GAFR2_L) & ~(0xff << 20)) | (0xaa << 20),
GAFR2_L);
}
/* 8 bit interface */
@@ -322,15 +495,17 @@ static void pxafb_setup_gpio (vidinfo_t *vid)
{
debug("Setting GPIO for 8 bit data\n");
/* bits 58-65 */
GPDR1 |= (0x3f << 26);
GPDR2 |= (0x3);
writel(readl(GPDR1) | (0x3f << 26), GPDR1);
writel(readl(GPDR2) | (0x3), GPDR2);
GAFR1_U = (GAFR1_U & ~(0xfff << 20)) | (0xaaa << 20);
GAFR2_L = (GAFR2_L & ~0xf) | (0xa);
writel((readl(GAFR1_U) & ~(0xfff << 20)) | (0xaaa << 20),
GAFR1_U);
writel((readl(GAFR2_L) & ~0xf) | (0xa), GAFR2_L);
/* bits 74-77 */
GPDR2 |= (0xf << 10);
GAFR2_L = (GAFR2_L & ~(0xff << 20)) | (0xaa << 20);
writel(readl(GPDR2) | (0xf << 10), GPDR2);
writel((readl(GAFR2_L) & ~(0xff << 20)) | (0xaa << 20),
GAFR2_L);
}
/* 16 bit interface */
@@ -338,39 +513,45 @@ static void pxafb_setup_gpio (vidinfo_t *vid)
{
debug("Setting GPIO for 16 bit data\n");
/* bits 58-77 */
GPDR1 |= (0x3f << 26);
GPDR2 |= 0x00003fff;
writel(readl(GPDR1) | (0x3f << 26), GPDR1);
writel(readl(GPDR2) | 0x00003fff, GPDR2);
GAFR1_U = (GAFR1_U & ~(0xfff << 20)) | (0xaaa << 20);
GAFR2_L = (GAFR2_L & 0xf0000000) | 0x0aaaaaaa;
writel((readl(GAFR1_U) & ~(0xfff << 20)) | (0xaaa << 20),
GAFR1_U);
writel((readl(GAFR2_L) & 0xf0000000) | 0x0aaaaaaa, GAFR2_L);
}
else
{
printf("pxafb_setup_gpio: unable to determine bits per pixel\n");
}
}
#endif
static void pxafb_enable_controller (vidinfo_t *vid)
{
debug("Enabling LCD controller\n");
/* Sequence from 11.7.10 */
LCCR3 = vid->pxa.reg_lccr3;
LCCR2 = vid->pxa.reg_lccr2;
LCCR1 = vid->pxa.reg_lccr1;
LCCR0 = vid->pxa.reg_lccr0 & ~LCCR0_ENB;
FDADR0 = vid->pxa.fdadr0;
FDADR1 = vid->pxa.fdadr1;
LCCR0 |= LCCR0_ENB;
writel(vid->pxa.reg_lccr3, LCCR3);
writel(vid->pxa.reg_lccr2, LCCR2);
writel(vid->pxa.reg_lccr1, LCCR1);
writel(vid->pxa.reg_lccr0 & ~LCCR0_ENB, LCCR0);
writel(vid->pxa.fdadr0, FDADR0);
writel(vid->pxa.fdadr1, FDADR1);
writel(readl(LCCR0) | LCCR0_ENB, LCCR0);
CKEN |= CKEN16_LCD;
#ifdef CONFIG_CPU_MONAHANS
writel(readl(CKENA) | CKENA_1_LCD, CKENA);
#else
writel(readl(CKEN) | CKEN16_LCD, CKEN);
#endif
debug("FDADR0 = 0x%08x\n", (unsigned int)FDADR0);
debug("FDADR1 = 0x%08x\n", (unsigned int)FDADR1);
debug("LCCR0 = 0x%08x\n", (unsigned int)LCCR0);
debug("LCCR1 = 0x%08x\n", (unsigned int)LCCR1);
debug("LCCR2 = 0x%08x\n", (unsigned int)LCCR2);
debug("LCCR3 = 0x%08x\n", (unsigned int)LCCR3);
debug("FDADR0 = 0x%08x\n", readl(FDADR0));
debug("FDADR1 = 0x%08x\n", readl(FDADR1));
debug("LCCR0 = 0x%08x\n", readl(LCCR0));
debug("LCCR1 = 0x%08x\n", readl(LCCR1));
debug("LCCR2 = 0x%08x\n", readl(LCCR2));
debug("LCCR3 = 0x%08x\n", readl(LCCR3));
}
static int pxafb_init (vidinfo_t *vid)

View File

@@ -8,6 +8,7 @@
* Copyright (C) 2002 Kyle Harris <kharris@nexus-tech.net>
* Copyright (C) 2003 Robert Schwebel <r.schwebel@pengutronix.de>
* Copyright (C) 2003 Kai-Uwe Bloem <kai-uwe.bloem@auerswald.de>
* Copyright (c) 2010 Marek Vasut <marek.vasut@gmail.com>
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -28,12 +29,40 @@
* MA 02111-1307 USA
*/
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
#include <asm/arch/pxa-regs.h>
#include <asm/arch/macro.h>
/* takes care the CP15 update has taken place */
.macro CPWAIT reg
mrc p15,0,\reg,c2,c0,0
mov \reg,\reg
sub pc,pc,#4
.endm
.globl _start
_start: b reset
#ifdef CONFIG_PRELOADER
ldr pc, _hang
ldr pc, _hang
ldr pc, _hang
ldr pc, _hang
ldr pc, _hang
ldr pc, _hang
ldr pc, _hang
_hang:
.word do_hang
.word 0x12345678
.word 0x12345678
.word 0x12345678
.word 0x12345678
.word 0x12345678
.word 0x12345678
.word 0x12345678 /* now 16*4=64 */
#else
ldr pc, _undefined_instruction
ldr pc, _software_interrupt
ldr pc, _prefetch_abort
@@ -49,6 +78,7 @@ _data_abort: .word data_abort
_not_used: .word not_used
_irq: .word irq
_fiq: .word fiq
#endif /* CONFIG_PRELOADER */
.balignl 16,0xdeadbeef
@@ -62,23 +92,20 @@ _fiq: .word fiq
* - jump to second stage
*/
.globl _TEXT_BASE
_TEXT_BASE:
.word TEXT_BASE
.globl _armboot_start
_armboot_start:
.word _start
.word CONFIG_SYS_TEXT_BASE
/*
* These are defined in the board-specific linker script.
*/
.globl _bss_start
_bss_start:
.word __bss_start
.globl _bss_start_ofs
_bss_start_ofs:
.word __bss_start - _start
.globl _bss_end
_bss_end:
.word _end
.globl _bss_end_ofs
_bss_end_ofs:
.word _end - _start
#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
@@ -92,211 +119,267 @@ FIQ_STACK_START:
.word 0x0badc0de
#endif /* CONFIG_USE_IRQ */
#ifndef CONFIG_PRELOADER
/* IRQ stack memory (calculated at run-time) + 8 bytes */
.globl IRQ_STACK_START_IN
IRQ_STACK_START_IN:
.word 0x0badc0de
/****************************************************************************/
/* */
/* the actual reset code */
/* */
/****************************************************************************/
/*
* the actual reset code
*/
reset:
mrs r0,cpsr /* set the CPU to SVC32 mode */
bic r0,r0,#0x1f /* (superviser mode, M=10011) */
orr r0,r0,#0x13
/*
* set the cpu to SVC32 mode
*/
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0xd3
msr cpsr,r0
/*
* we do sys-critical inits only at reboot,
* not when booting from RAM!
* Enable MMU to use DCache as DRAM
*/
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit /* we do sys-critical inits */
#endif /* !CONFIG_SKIP_LOWLEVEL_INIT */
/* Domain access -- enable for all CPs */
ldr r0, =0x0000ffff
mcr p15, 0, r0, c3, c0, 0
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */
ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
cmp r0, r1 /* don't reloc during debug */
beq stack_setup
/* Point TTBR to MMU table */
ldr r0, =mmu_table
adr r2, _start
orr r0, r2
mcr p15, 0, r0, c2, c0, 0
ldr r2, _armboot_start
ldr r3, _bss_start
sub r2, r3, r2 /* r2 <- size of armboot */
add r2, r0, r2 /* r2 <- source end address */
/* !!! Hereby, check if the code is running from SRAM !!! */
/* If the code is running from SRAM, alias SRAM to 0x0 to simulate NOR. The code
* is linked to 0x0 too, so this makes things easier. */
cmp r2, #0x5c000000
copy_loop:
ldmia r0!, {r3-r10} /* copy from source address [r0] */
stmia r1!, {r3-r10} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
ble copy_loop
#endif /* !CONFIG_SKIP_RELOCATE_UBOOT */
ldreq r1, [r0]
orreq r1, r2
streq r1, [r0]
/* Kick in MMU, ICache, DCache, BTB */
mrc p15, 0, r0, c1, c0, 0
bic r0, #0x1b00
bic r0, #0x0087
orr r0, #0x1800
orr r0, #0x0005
mcr p15, 0, r0, c1, c0, 0
CPWAIT r0
/* Unlock Icache, Dcache */
mcr p15, 0, r0, c9, c1, 1
mcr p15, 0, r0, c9, c2, 1
/* Flush Icache, Dcache, BTB */
mcr p15, 0, r0, c7, c7, 0
/* Unlock I-TLB, D-TLB */
mcr p15, 0, r0, c10, c4, 1
mcr p15, 0, r0, c10, c8, 1
/* Flush TLB */
mcr p15, 0, r0, c8, c7, 0
/* Allocate 4096 bytes of Dcache as RAM */
/* Drain pending loads and stores */
mcr p15, 0, r0, c7, c10, 4
mov r4, #0x00
mov r5, #0x00
mov r2, #0x01
mcr p15, 0, r0, c9, c2, 0
CPWAIT r0
/* 128 lines reserved (128 x 32bytes = 4096 bytes total) */
mov r0, #128
mov r1, #0xa0000000
alloc:
mcr p15, 0, r1, c7, c2, 5
/* Drain pending loads and stores */
mcr p15, 0, r0, c7, c10, 4
strd r4, [r1], #8
strd r4, [r1], #8
strd r4, [r1], #8
strd r4, [r1], #8
subs r0, #0x01
bne alloc
/* Drain pending loads and stores */
mcr p15, 0, r0, c7, c10, 4
mov r2, #0x00
mcr p15, 0, r2, c9, c2, 0
CPWAIT r0
/* Jump to 0x0 ( + offset) if running from SRAM */
adr r0, zerojmp
bic r0, #0x5c000000
mov pc, r0
zerojmp:
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
ldr r0,=0x00000000
bl board_init_f
/*------------------------------------------------------------------------------*/
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
*/
.globl relocate_code
relocate_code:
mov r4, r0 /* save addr_sp */
mov r5, r1 /* save addr of gd */
mov r6, r2 /* save addr of destination */
mov r7, r2 /* save addr of destination */
/* Set up the stack */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
sub r0, r0, #CONFIG_SYS_MALLOC_LEN /* malloc area */
sub r0, r0, #CONFIG_SYS_GBL_DATA_SIZE /* bdinfo */
#ifdef CONFIG_USE_IRQ
sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
#endif /* CONFIG_USE_IRQ */
sub sp, r0, #12 /* leave 3 words for abort-stack */
bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
mov sp, r4
adr r0, _start
ldr r2, _TEXT_BASE
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
cmp r0, r6
beq clear_bss
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
stmfd sp!, {r0-r12}
copy_loop:
ldmia r0!, {r3-r5, r7-r11} /* copy from source address [r0] */
stmia r6!, {r3-r5, r7-r11} /* copy to target address [r1] */
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
ldmfd sp!, {r0-r12}
#ifndef CONFIG_PRELOADER
/*
* fix .rel.dyn relocations
*/
ldr r0, _TEXT_BASE /* r0 <- Text base */
sub r9, r7, r0 /* r9 <- relocation offset */
ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
add r10, r10, r0 /* r10 <- sym table in FLASH */
ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
fixloop:
ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
add r0, r9 /* r0 <- location to fix up in RAM */
ldr r1, [r2, #4]
and r8, r1, #0xff
cmp r8, #23 /* relative fixup? */
beq fixrel
cmp r8, #2 /* absolute fixup? */
beq fixabs
/* ignore unknown type of fixup */
b fixnext
fixabs:
/* absolute fix: set location to (offset) symbol value */
mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
add r1, r10, r1 /* r1 <- address of symbol in table */
ldr r1, [r1, #4] /* r1 <- symbol value */
add r1, r9 /* r1 <- relocated sym addr */
b fixnext
fixrel:
/* relative fix: increase location by offset */
ldr r1, [r0]
add r1, r1, r9
fixnext:
str r1, [r0]
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
cmp r2, r3
blo fixloop
#endif
#endif /* #ifndef CONFIG_SKIP_RELOCATE_UBOOT */
clear_bss:
ldr r0, _bss_start /* find start of bss segment */
ldr r1, _bss_end /* stop here */
#ifndef CONFIG_PRELOADER
ldr r0, _bss_start_ofs
ldr r1, _bss_end_ofs
ldr r3, _TEXT_BASE /* Text base */
mov r4, r7 /* reloc addr */
add r0, r0, r4
add r1, r1, r4
mov r2, #0x00000000 /* clear */
clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
ble clbss_l
bne clbss_l
#endif
ldr pc, _start_armboot
_start_armboot: .word start_armboot
/****************************************************************************/
/* */
/* CPU_init_critical registers */
/* */
/* - setup important registers */
/* - setup memory timing */
/* */
/****************************************************************************/
/* mk@tbd: Fix this! */
#undef RCSR
#undef ICMR
#undef OSMR3
#undef OSCR
#undef OWER
#undef OIER
#undef CCCR
/* Interrupt-Controller base address */
IC_BASE: .word 0x40d00000
#define ICMR 0x04
/* Reset-Controller */
RST_BASE: .word 0x40f00030
#define RCSR 0x00
/* Operating System Timer */
OSTIMER_BASE: .word 0x40a00000
#define OSMR3 0x0C
#define OSCR 0x10
#define OWER 0x18
#define OIER 0x1C
/* Clock Manager Registers */
#ifdef CONFIG_CPU_MONAHANS
# ifndef CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO
# error "You have to define CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO!!"
# endif /* !CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO */
# ifndef CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO
# define CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO 0x1
# endif /* !CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO */
#else /* !CONFIG_CPU_MONAHANS */
#ifdef CONFIG_SYS_CPUSPEED
CC_BASE: .word 0x41300000
#define CCCR 0x00
cpuspeed: .word CONFIG_SYS_CPUSPEED
#else /* !CONFIG_SYS_CPUSPEED */
#error "You have to define CONFIG_SYS_CPUSPEED!!"
#endif /* CONFIG_SYS_CPUSPEED */
#endif /* CONFIG_CPU_MONAHANS */
/* takes care the CP15 update has taken place */
.macro CPWAIT reg
mrc p15,0,\reg,c2,c0,0
mov \reg,\reg
sub pc,pc,#4
.endm
cpu_init_crit:
/* mask all IRQs */
#ifndef CONFIG_CPU_MONAHANS
ldr r0, IC_BASE
mov r1, #0x00
str r1, [r0, #ICMR]
#else /* CONFIG_CPU_MONAHANS */
/* Step 1 - Enable CP6 permission */
mrc p15, 0, r1, c15, c1, 0 @ read CPAR
orr r1, r1, #0x40
mcr p15, 0, r1, c15, c1, 0
CPWAIT r1
/* Step 2 - Mask ICMR & ICMR2 */
mov r1, #0
mcr p6, 0, r1, c1, c0, 0 @ ICMR
mcr p6, 0, r1, c7, c0, 0 @ ICMR2
/* turn off all clocks but the ones we will definitly require */
ldr r1, =CKENA
ldr r2, =(CKENA_22_FFUART | CKENA_10_SRAM | CKENA_9_SMC | CKENA_8_DMC)
str r2, [r1]
ldr r1, =CKENB
ldr r2, =(CKENB_6_IRQ)
str r2, [r1]
#endif /* !CONFIG_CPU_MONAHANS */
/* set clock speed */
#ifdef CONFIG_CPU_MONAHANS
ldr r0, =ACCR
ldr r1, =(((CONFIG_SYS_MONAHANS_TURBO_RUN_MODE_RATIO<<8) & ACCR_XN_MASK) | (CONFIG_SYS_MONAHANS_RUN_MODE_OSC_RATIO & ACCR_XL_MASK))
str r1, [r0]
#else /* !CONFIG_CPU_MONAHANS */
#ifdef CONFIG_SYS_CPUSPEED
ldr r0, CC_BASE
ldr r1, cpuspeed
str r1, [r0, #CCCR]
mov r0, #2
mcr p14, 0, r0, c6, c0, 0
setspeed_done:
#endif /* CONFIG_SYS_CPUSPEED */
#endif /* CONFIG_CPU_MONAHANS */
/*
* before relocating, we have to setup RAM timing
* because memory timing is board-dependend, you will
* find a lowlevel_init.S in your board directory.
*/
mov ip, lr
bl lowlevel_init
mov lr, ip
/* Memory interfaces are working. Disable MMU and enable I-cache. */
/* mk: hmm, this is not in the monahans docs, leave it now but
* check here if it doesn't work :-) */
ldr r0, =0x2001 /* enable access to all coproc. */
mcr p15, 0, r0, c15, c1, 0
CPWAIT r0
mcr p15, 0, r0, c7, c10, 4 /* drain the write & fill buffers */
CPWAIT r0
mcr p15, 0, r0, c7, c7, 0 /* flush Icache, Dcache and BTB */
CPWAIT r0
mcr p15, 0, r0, c8, c7, 0 /* flush instuction and data TLBs */
CPWAIT r0
/* Enable the Icache */
/*
mrc p15, 0, r0, c1, c0, 0
orr r0, r0, #0x1800
mcr p15, 0, r0, c1, c0, 0
CPWAIT
*/
* We are done. Do not return, instead branch to second part of board
* initialization, now running from RAM.
*/
#ifdef CONFIG_ONENAND_IPL
ldr r0, _start_oneboot_ofs
mov pc, r0
_start_oneboot_ofs
: .word start_oneboot
#else
ldr r0, _board_init_r_ofs
adr r1, _start
add lr, r0, r1
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
add lr, lr, r9
#endif
/* setup parameters for board_init_r */
mov r0, r5 /* gd_t */
mov r1, r7 /* dest_addr */
/* jump to it ... */
mov pc, lr
_board_init_r_ofs:
.word board_init_r - _start
#endif
_rel_dyn_start_ofs:
.word __rel_dyn_start - _start
_rel_dyn_end_ofs:
.word __rel_dyn_end - _start
_dynsym_start_ofs:
.word __dynsym_start - _start
#else /* #if !defined(CONFIG_SYS_ARM_WITHOUT_RELOC) */
/****************************************************************************/
/* */
/* the actual reset code for OneNAND IPL */
/* */
/****************************************************************************/
#ifndef CONFIG_PXA27X
#error OneNAND IPL is not supported on PXA25x and 26x due to lack of SRAM
#endif
reset:
/* Set CPU to SVC32 mode */
mrs r0,cpsr
bic r0,r0,#0x1f
orr r0,r0,#0x13
msr cpsr,r0
/* Point stack at the end of SRAM and leave 32 words for abort-stack */
ldr sp, =0x5c03ff80
/* Start OneNAND IPL */
ldr pc, =start_oneboot
#endif /* #if !defined(CONFIG_ONENAND_IPL) */
#ifndef CONFIG_PRELOADER
/****************************************************************************/
/* */
/* Interrupt handling */
@@ -336,9 +419,13 @@ setspeed_done:
stmia sp, {r0 - r12} /* Calling r0-r12 */
add r8, sp, #S_PC
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r2, _armboot_start
sub r2, r2, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r2, r2, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
sub r2, r2, #(GENERATED_GBL_DATA_SIZE+8) @ set base 2 words into abort stack
#else
ldr r2, IRQ_STACK_START_IN
#endif
ldmia r2, {r2 - r4} /* get pc, cpsr, old_r0 */
add r0, sp, #S_FRAME_SIZE /* restore sp_SVC */
@@ -373,9 +460,13 @@ setspeed_done:
.endm
.macro get_bad_stack
#if defined(CONFIG_SYS_ARM_WITHOUT_RELOC)
ldr r13, _armboot_start @ setup our mode stack
sub r13, r13, #(CONFIG_STACKSIZE+CONFIG_SYS_MALLOC_LEN)
sub r13, r13, #(CONFIG_SYS_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
sub r13, r13, #(GENERATED_GBL_DATA_SIZE+8) @ reserved a couple spots in abort stack
#else
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
#endif
str lr, [r13] @ save caller lr / spsr
mrs lr, spsr
@@ -394,6 +485,7 @@ setspeed_done:
.macro get_fiq_stack @ setup FIQ stack
ldr sp, FIQ_STACK_START
.endm
#endif /* CONFIG_PRELOADER */
/****************************************************************************/
@@ -402,6 +494,12 @@ setspeed_done:
/* */
/****************************************************************************/
#ifdef CONFIG_PRELOADER
.align 5
do_hang:
ldr sp, _TEXT_BASE /* use 32 words abort stack */
bl hang /* hang and never return */
#else /* !CONFIG_PRELOADER */
.align 5
undefined_instruction:
get_bad_stack
@@ -461,7 +559,7 @@ fiq:
get_bad_stack
bad_save_user_regs
bl do_fiq
#endif /* CONFIG_PRELOADER */
#endif /* CONFIG_USE_IRQ */
/****************************************************************************/
@@ -470,8 +568,8 @@ fiq:
/* perform a watchdog timeout for a soft reset. */
/* */
/****************************************************************************/
.align 5
/* Operating System Timer */
.align 5
.globl reset_cpu
/* FIXME: this code is PXA250 specific. How is this handled on */
@@ -481,19 +579,43 @@ reset_cpu:
/* We set OWE:WME (watchdog enable) and wait until timeout happens */
ldr r0, OSTIMER_BASE
ldr r1, [r0, #OWER]
ldr r0, =OWER
ldr r1, [r0]
orr r1, r1, #0x0001 /* bit0: WME */
str r1, [r0, #OWER]
str r1, [r0]
/* OS timer does only wrap every 1165 seconds, so we have to set */
/* the match register as well. */
ldr r1, [r0, #OSCR] /* read OS timer */
ldr r0, =OSCR
ldr r1, [r0] /* read OS timer */
add r1, r1, #0x800 /* let OSMR3 match after */
add r1, r1, #0x800 /* 4096*(1/3.6864MHz)=1ms */
str r1, [r0, #OSMR3]
ldr r0, =OSMR3
str r1, [r0]
reset_endless:
b reset_endless
#ifndef CONFIG_PRELOADER
.section .mmudata, "a"
.align 14
.globl mmu_table
mmu_table:
/* 0x00000000 - 0xa0000000 : 1:1, uncached mapping */
.set __base, 0
.rept 0xa00
.word (__base << 20) | 0xc12
.set __base, __base + 1
.endr
/* 0xa0000000 - 0xa0100000 : 1:1, cached mapping */
.word (0xa00 << 20) | 0x1c1e
.set __base, 0xa01
.rept 0x1000 - 0xa01
.word (__base << 20) | 0xc12
.set __base, __base + 1
.endr
#endif

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