Commit fea25720 renamed arch/i386 to arch/x86.
But it missed to modify examples/standalone/Makefile.
Since then, examples/standalone/82559_eeprom has
never compiled and nobody has noticed that.
After some discussion on ML, we agreed to delete this example.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Convert like follows:
CPU mpc83xx -> CONFIG_MPC83xx
CPU mpc85xx -> CONFIG_MPC85xx
CPU mpc86xx -> CONFIG_MPC86xx
CPU mpc5xxx -> CONFIG_MPC5xxx
CPU mpc8xx -> CONFIG_8xx
CPU mpc8260 -> CONFIG_8260
CPU ppc4xx -> CONFIG_4xx
CPU x86 -> CONFIG_X86
ARCH x86 -> CONFIG_X86
ARCH powerpc -> CONFIG_PPC
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
fdt_fixup_memory_banks() will add and update /memory node in
device tree blob. In the case that /memory node doesn't exist,
after adding a new one, this function returns error.
The correct behavior should be continuing to update its properties.
Signed-off-by: Miao Yan <miao.yan@windriver.com>
The next version VxWorks adopts device tree (for PowerPC and ARM) as its hardware
description mechanism. For PowerPC, the boot interface conforms to
the ePAPR standard, which is:
void (*kernel_entry)(ulong fdt_addr,
ulong r4 /* 0 */,
ulong r5 /* 0 */,
ulong r6 /* EPAPR_MAGIC */, ulong r7 /* IMA size */,
ulong r8 /* 0 */, ulong r9 /* 0 */)
For ARM, the boot interface is:
void (*kernel_entry)(void *fdt_addr)
Signed-off-by: Miao Yan <miao.yan@windriver.com>
[trini: Fix build error when !CONFIG_OF_FDT is set, typo on PowerPC,
missing extern ft_fixup_num_cores]
Signed-off-by: Tom Rini <trini@ti.com>
do_bootm_vxworks now is available under the configuration option
CONFIG_BOOTM_VXWORKS, thus aligned with other operating systems
that supported by bootm command. The bootvx command still depneds
on CONFIG_CMD_ELF.
Signed-off-by: Miao Yan <miao.yan@windriver.com>
We have some scripts imported from Linux Kernel:
setlocalversion, checkstack.pl, checkpatch.pl, cleanpatch
They are located under tools/ directory in U-Boot now.
But they were originally located under scripts/ directory
in Linux Kernel.
This commit moves them to the original location.
It is true that binutils-version.sh and dtc-version.sh
do not originate in Linux Kernel, but they should
be moved by analogy to gcc-version.sh.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Before switching to the real Kbuild, drivers/usb/gadget/Makefile
must be fixed.
If none of CONFIG_USB_GADGET, CONFIG_USB_ETHER, CONFIG_USB_DEVICE
is defined, both obj- and obj-y get empty.
We need non-empty obj- or obj-y on each Makefile
to generate built-in.o on the real Kbuild.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
All objects under post/ directory are enabled by CONFIG_HAS_POST.
(post/tests.o is enabled by CONFIG_POST_STD_LIST.
But CONFIG_POST_STD_LIST depends on CONFIG_HAS_POST.)
We can move CONFIG_HAS_POST switch to the top Makefile.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
$(LDSCRIPT) is a source file, not a generated file.
We do not need a make rule of $(LDSCRIPT).
And one more trivial fix:
$(obj)/u-boot should not dierectly depend on $(LDSCRIPTS).
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
If U-Boot build with DEBUG enabled/defined the first call of "debug"
function (that dumps data to any available console) will happen before
zeroing of initial "gd" in init call "zero_global_data" in
"init_sequence_f".
And if stack was not filled with zeros chances are high that
"gd->have_console" won't be 0. In its turn it will cause attempt to
output things to non-initialized yet serial console.
So for safety and predictability we set "gd->have_console = 0".
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
argv[0] contains bootvx (command name) not the load address, if called with
argv < 2 use load_addr, else use address argument given to the command.
Signed-off-by: Stany MARCEL <smarcel@novasys-ingenierie.com>
Before this commit, output files under tpl/ directry
were not ignored.
This commit fixes this problem.
And we have only one source file under spl/ directory:
spl/Makefile
So, we can describe .gitignore more simply.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
PLATFORM_RELFLAGS += -meabi
PLATFORM_CPPFLAGS += -ffixed-r2
were defined in all arch/powerpc/${CPU}/config.mk.
This commit moves them to arch/powerpc/config.mk.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
The documentation suggested the arguments where passed over r3-r6
while the code below simply does that over r0-r3.
Cc: Kumar Gala <galak@kernel.crashing.org>
Commit 8dfafdde88 ("Introduce common timer functions") created a
common definition of usec_to_tick() which had a couple problems:
static unsigned long long usec_to_tick(unsigned long usec)
{
uint64_t tick = usec * get_tbclk();
That likely overflows.
usec *= get_tbclk();
That was an attempt to fix it by performing the multiply after the
promotion of usec to 64-bit, but was applied to the wrong variable,
which was never used.
This patch fixes these issues. A user-visible symptom of the problem was
the e.g. "dhcp zImage" using an ASIX USB Ethernet dongle would print:
Waiting for Ethernet connection... unable to connect.
... with no delay before "unable to connect". There are likely other
symptoms.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Some editors such as Emacs can highlight source files.
But their parser algorithm is not perfect.
If you use one double-quotation alone, some editor cannot
handle it nicely and mark source lines as a string by mistake.
It is preferable to use two double-quotations as a pair.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
The build rules of
- include/autoconf.mk.dep
- include/autoconf.mk
- include/spl-autoconf.mk
- include/tpl-autoconf.mk
were not nice.
They created empty files (which are never updated)
if an error occurs during preprocessing.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Given a multi-file image created through the mkimage's -d option:
$ mkimage -A x86 -O linux -T multi -n x86 -d vmlinuz:initrd.img:System.map \
multi.img
Image Name: x86
Created: Thu Jul 25 10:29:13 2013
Image Type: Intel x86 Linux Multi-File Image (gzip compressed)
Data Size: 13722956 Bytes = 13401.32 kB = 13.09 MB
Load Address: 00000000
Entry Point: 00000000
Contents:
Image 0: 4040128 Bytes = 3945.44 kB = 3.85 MB
Image 1: 7991719 Bytes = 7804.41 kB = 7.62 MB
Image 2: 1691092 Bytes = 1651.46 kB = 1.61 MB
It is possible to perform the innverse operation -- extracting any file from
the image -- by using the dumpimage's -i option:
$ dumpimage -i multi.img -p 2 System.map
Although it's feasible to retrieve "data files" from image through scripting,
the requirement to embed tools such 'dd', 'awk' and 'sed' for this sole purpose
is cumbersome and unreliable -- once you must keep track of file sizes inside
the image. Furthermore, extracting data files using "dumpimage" tool is faster
than through scripting.
Signed-off-by: Guilherme Maciel Ferreira <guilherme.maciel.ferreira@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
In order to avoid duplicating code and keep only one point of modification,
the functions, structs and defines useful for "dumpimage" were moved from
"mkimage" to a common module called "imagetool".
This modification also weakens the coupling between image types (FIT, IMX, MXS,
and so on) and image tools (mkimage and dumpimage). Any tool may initialize the
"imagetool" through register_image_tool() function, while the image types
register themselves within an image tool using the register_image_type()
function:
+---------------+
+------| fit_image |
+--------------+ +-----------+ | +---------------+
| mkimage |--------> | | <-----+
+--------------+ | | +---------------+
| imagetool | <------------| imximage |
+--------------+ | | +---------------+
| dumpimage |--------> | | <-----+
+--------------+ +-----------+ | +---------------+
+------| default_image |
+---------------+
register_image_tool() register_image_type()
Also, the struct "mkimage_params" was renamed to "image_tool_params" to make
clear its general purpose.
Signed-off-by: Guilherme Maciel Ferreira <guilherme.maciel.ferreira@gmail.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
The last users of CONFIG_KGDB_SER_INDEX were removed more than 3 years
ago in commits 550650ddd0 and bf16500f79, either kgdb subsystem should
care about this parameter or it should be gone completely.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
For LPC32XX high-speed UART it is required to send a carriage return
symbol along with line feed. The problem was introduced in e503f90a
commit.
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Cc: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
The default value of CONFIG_SYS_FSL_TBCLK_DIV is 16.
So, update its value as default.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Add the __iomem address space marker for the tsec pointers
to struct tsec_mii_mng memory mapped register regions.
This solves the sparse warnings for mixig normal pointers with
__iomem pointers for tsec.
p1_p2_rdb_pc.c:373:24: warning: incorrect type in assignment (different
address spaces)
p1_p2_rdb_pc.c:373:24: expected struct tsec_mii_mng [noderef]
<asn:2>*regs
p1_p2_rdb_pc.c:373:24: got struct tsec_mii_mng *<noident>
Use TSEC_GET_MDIO_REGS_BASE() for the remaining mdio 'regs'
initializations to remove the __iomem warnings and for consistency.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
As mEMAC1 and mEMAC2 are dual-role MACs, which are used as 1G or 10G MAC.
So we update dynamically 'cell-index' to '2' and '3' for 10GEC3 and 10GEC4.
Also change 'fsl,fman-port-1g-rx' to 'fsl,fman-port-10g-rx', ditto for Tx.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
We want to test SPI flash code in the sandbox, so enable the new drivers and
the 'sf test' command.
This command is used to validate the sandbox SPI / SPI flash implementation,
so enable it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
This adds a SPI flash driver which simulates SPI flash clients.
Currently supports the bare min that U-Boot requires: you can
probe, read, erase, and write. Should be easy to extend to make
it behave more exactly like a real SPI flash, but this is good
enough to merge now.
sjg@chromium.org added a README and tidied up code a little.
Added a required map_sysmem() for sandbox.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
This adds a SPI framework for people to hook up simulated SPI clients.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
This allows us to put the SPI flash chip inside the SPI interface node,
with U-Boot finding the correct bus and chip select automatically.
Signed-off-by: Simon Glass <sjg@chromium.org>
The new name is longer but more clearly related to sandbox.
This is in a separate patch within the same series since some comments on the
SPI series rely on it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Hung-ying Tyan <tyanh@chromium.org>
In order to get the very same value for legacy pin definitions and new gpio
definitions set the legacy PIN_BASE to 0.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
This patch define new names for GPIO pins on at91 devices. Follow up patches
will convert the whole infrastructure to use these new definitions.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Tested-by: Bo Shen <voice.shen@atmel.com>
Faraday FTSDC021 is a controller which is compliant with
SDHCI v3.0, SDIO v2.0 and MMC v4.3.
However this driver is only verified with SD memory cards.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
CC: Andy Fleming <afleming@gmail.com>
Existing eSDHC SPL framework assumes booting from sd-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.
So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Current LDS files /DISCARD/ a lot of sections when linking ELF
files, causing diagnostic tools such as readelf or objdump to
produce partial output. Keep all section at link stage, filter
only at objcopy time so that .bin remains minimal.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
The lower 5 bit of MVBAR is UNK/SBZP.
So, Monitor Vector Base Address must be 32-byte aligned.
On the other hand, the secure monitor handler does not need
32-byte alignment.
This commit moves ".algin 5" directive to the correct place.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Andre Przywara <andre.przywara@linaro.org>
Acked-by: Andre Przywara <andre.przywara@linaro.org>
Fixes this error message when USB is started.
"ULPI: ulpi_reset: failed writing reset bit"
It is pointless to manually reset the ULPI as the USB Host
Reset and PHY RESET line should take care of that.
Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Roger Quadros <rogerq@ti.com>
Fixes this error message when USB is started.
"ULPI: ulpi_reset: failed writing reset bit"
It is pointless to manually reset the ULPI as the USB Host
Reset and PHY RESET line should take care of that.
Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Roger Quadros <rogerq@ti.com>
In commit bb1f327 we removed the UHH reset to fix NFS root (over usb
ethernet) problems with Beagleboard (3530 ES1.0). However, this
seems to cause USB detection problems for Pandaboard, about (3/8).
On further investigation, it seems that doing the UHH reset is not
the cause of the original Beagleboard problem, but in the way the reset
was done.
This patch adds proper UHH RESET mechanism for OMAP3 and OMAP4/5 based
on the UHH_REVISION register. This should fix the Beagleboard NFS
problem as well as the Pandaboard USB detection problem.
Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
CC: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Roger Quadros <rogerq@ti.com>
This patch change the per_clocks_enable() function used in OMAP3
code to enable peripherals clocks. Only required clock should be
activated. So if the board use the uart(x) as a console we need
to activate it. The Board's config should include define to enable
every subsystem that the board use. For a complete list
of affected peripherals, registers CM_FCLKEN_PER and CM_ICLKEN_PER
should be checked.
Right now the bootloader can enable and disable clocks for:
uart(x) using CONFIG_SYS_NS16550
gpio bank (x) using CONFIG_OMAP3_GPIO_X with X = { 2, 3, 4, 5, 6 }
i2c bus using CONFIG_DRIVER_OMAP34XX_I2C.
Not required gptimer(x) and mcbsp(x) for booting are disabled by default and
are not supported by any define.
Their activation need to included in the per_clocks_enable if the
peripheral is included. Not booting board should enable the peripheral
clock connected to their driver
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Tom Rini <trini@ti.com>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
This patch fix following errors and warnings
spl_boot.c: In function 'exynos_spi_copy':
spl_boot.c:111:49: error: 'CONFIG_ENV_SPI_BASE' undeclared (first use in this function)
spl_boot.c:111:49: note: each undeclared identifier is reported only once for each function it appears in
spl_boot.c:142:2: error: 'SPI_FLASH_UBOOT_POS' undeclared (first use in this function)
spl_boot.c: In function 'copy_uboot_to_ram':
spl_boot.c:189:28: warning: unused variable 'param' [-Wunused-variable]
spl_boot.c: At top level:
spl_boot.c:107:13: warning: 'exynos_spi_copy' defined but not used [-Wunused-function]
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
For invalid bus number, current code returns NULL in the default case of
switch-case statements. In additional, pins[bus] is always not NULL because
it is the address of specific row of the two-dimensional array.
Thus this patch removes these unnecessary test.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
For invalid bus number, current code returns NULL in the default case of
switch-case statements. In additional, pins[bus] is always not NULL because
it is the address of specific row of the two-dimensional array.
Thus this patch removes these unnecessary test.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Scott Jiang <scott.jiang.linux@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
This patch adds the U_BOOT_I2C_ADAP_COMPLETE defines for channels
on Exynos5420 and Exynos5250 and also adds support for init function
for hsi2c channels
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Writing zero into I2Ci.I2C_CNT register causes random I2C failures in OMAP3
based devices. This seems to be related to the following advisory which
apears in multiple erratas for OMAP3 SoCs (OMAP35xx, DM37xx), as well as
OMAP4430 TRM:
Advisory:
I2C Module Does Not Allow 0-Byte Data Requests
Details:
When configured as the master, the I2C module does not allow 0-byte data
transfers. Note: Programming I2Ci.I2C_CNT[15:0]: DCOUNT = 0 will cause
undefined behavior.
Workaround(s):
No workaround. Do not use 0-byte data requests.
The writes in question are unnecessary from a functional point of view.
Most of them are done after I/O has finished, and the only one that preceds
I/O (in i2c_probe()) is also unnecessary because a stop bit is sent before
actual data transmission takes place.
Therefore, remove all writes that zero the cnt register.
Cc: Heiko Schocher <hs@denx.de>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Tom Rini <trini@ti.com>
Cc: Lubomir Popov <lpopov@mm-sol.com>
Cc: Enric Balletbo Serra <eballetbo@gmail.com>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Lubomir Popov <lpopov@mm-sol.com>
The local pointer of address (i.e., addr) only gets
referenced under SPI mode, and it won't be appropriate
to pass only 1-byte addr[1] to i2c_read/i2c_write while
CONFIG_SYS_I2C_EEPROM_ADDR_LEN > 1.
1. In U-boot's I2C model, the address would be re-assembled
to a byte string in MSB order inside I2C controller drivers.
2. The 'CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW' option which could
be found at soft_i2c.c is always turned on in cmd_eeprom.c,
the addr[0] always contains the device address with overflowed
MSB address bits.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Mischa Jonker <mjonker@synopsys.com>
For a eeprom with a 2-bytes address (e.g., Ateml AT24C1024B),
the r/w address should be serial out in MSB order.
Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com>
Cc: Heiko Schocher <hs@denx.de>
MPC8349 has been using mpc85xx DDR driver through a symbolic link to
mpc85xx_ddr_gen2.c. After consolidating the drivers to a single set
under driver/ddr/fsl/, the link is replaced by referring driver
directly. We now can simply enable the macro and use the driver.
Other mpc83xx SoCs still use their own driver.
Signed-off-by: York Sun <yorksun@freescale.com>
Usually CONFIG_FSL_DDR_INTERACTIVE feature is used for debug.
we would not enable this by default to save the limited space of u-boot.
This avoid following compiling error:
section .bootpg loaded at [00000000effff000,00000000effff577] overlap ssection
.data loaded at [00000000efff31b8,00000000f00010c7]
u-boot: section .bootpg lma 0xeffff000 adjusted to 0xf00010c8
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Existing eSPI SPL framework assumes booting from spi-image
with boot_format header which contains final u-boot Image
offset and size. No such header is present in case of
corenet devices like T1040 as corenet deivces use PBI-RCW
based intialization.
So, for corenet deives, SPL bootloader use values provided
at compilation time. These values can be defined in board
specific config file.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
Currently, there is only one EEPROM on c29xpcie board which is AT24C1024.
We program the SPD data at beginning of the AT24C1024.But the AT24C1024
has a 16-bit sub-address mode. This patch is tomake it work when getting
SPD in a 16-bit sub-address EEPROM.
Signed-off-by: Po Liu <Po.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
In new board P1010RDB-PB, the interrupt vector table is at
the start of memory. So if the start_address needs to be set
a proper value.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
In PBL RAMBOOT(SPI/SD/NAND boot) mode, CPC1 used as SRAM, should disable
CPC1 speculation and keep it till relocation. Otherwise, speculation
transactions will go to DDR controller, it will cause problem.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
In 48ec5291, only TX path was optimized; this does the same also for RX
path. This results in huge increase of TFTP throughput on custom am3352
board (from 312KiB/s to 1.8MiB/s) and eliminates occasional transfer
timeouts.
Signed-off-by: Vladimir Koutny <vladimir.koutny@streamunlimited.com>
Cc: Mugunthan V N <mugunthanvnm@ti.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Cc: Tom Rini <trini@ti.com>
Certain EFUSE settings were recommended for the first
four lots of OMAP5 ES1.0 silicon. These are not applicable
for OMAP5 ES2.0 and DRA7 silicon. So removing these EFUSE settings.
Reported-by: Griffis, Brad <bgriffis@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Align the ATA ID buffer to the cache-line boundary. This gets rid
of the below error mesages on ARM v7 platforms.
scanning bus for devices...
ERROR: v7_dcache_inval_range - start address is not aligned - 0xfee48618
ERROR: v7_dcache_inval_range - stop address is not aligned - 0xfee48818
CC: Aneesh V <aneesh@ti.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
If malloc() fails, we don't want to continue in ahci_init() and
ahci_init_one(). Also print a more informative error message on
malloc() failures.
CC: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Roger Quadros <rogerq@ti.com>
When core power domain hits oswr, then DDR3 memories does not come back
while resuming. This is because when EMIF registers are lost, then the
controller takes care of copying the values from the shadow registers.
If the shadow registers are not updated with the right values, then this
results in incorrect settings while resuming. So updating the shadow registers
with the corresponding status registers here during the boot.
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Currently the DDR3 memory on DRA7 ES1.0 evm board is enabled using
software leveling. This was done since hardware leveling was not
working. Now that the right sequence to do hw leveling is identified,
use it. This is required for EMIF clockdomain to idle and come back
during lowpower usecases.
Signed-off-by: Sricharan R <r.sricharan@ti.com>
A generic is_dra7xx cpu check is useful for grouping
all the revisions under that. This is used in the
subsequent patches.
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Added chip type detection and twl6032
support in the battery control
and charge functions.
Based on Balaji T K <balajitk@ti.com> patches for TI u-boot.
Signed-off-by: Oleg Kosheliev <oleg.kosheliev@ti.com>
The data struct is used to support different
PMIC chip types. It contains the chip type and
the data (e.g. registers addresses, adc multiplier)
which is different for twl6030 and twl6032.
Replaced some hardcoded values with the
structure vars.
Based on Balaji T K <balajitk@ti.com> patches for TI u-boot.
Signed-off-by: Oleg Kosheliev <oleg.kosheliev@ti.com>
The struct incorrectly referenced SMPS1 for all three power
domains. Fixed this by using SMPS2 and SMPS5 as appropriate.
Add some comments and choose voltage values that correspond
to voltage selection codes.
Signed-off-by: Lubomir Popov <l-popov@ti.com>
Phytec sells revision or version 3 of pcm051. It is labeled 1358.3 on
the board. The difference for u-boot is that is has other DDR3 RAM on it:
1 x MT41K256M16HA125E instead of 2 x MT41J256M8HX15E on revisions 1 and
2. Both configurations are 512 MiB.
Configure your u-boot build with pcm051_rev3 for the new RAM and
pcm051_rev1 for the old RAM configuration. Board revision 2 has to use
pcm051_rev1 also.
Signed-off-by: Lars Poeschel <poeschel@lemonage.de>
Add support for the 16 bits pca9555 i2c to gpio extender featured
by the SB-T335 baseboard.
Signed-off-by: Ilya Ledvich <ilya@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Add support for status LED. Use the STATUS_LED APIs for indicating a
boot progress.
Signed-off-by: Ilya Ledvich <ilya@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Adding Freeze Controller driver. All HPS IOs need to be
in freeze state during pin mux or IO buffer configuration.
It is to avoid any glitch which might happen
during the configuration from propagating to external devices.
Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Wolfgang Denk <wd@denx.de>
CC: Pavel Machek <pavel@denx.de>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Tom Rini <trini@ti.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
This patch implements a custom spi_copy funtion to copy u-boot from SF
to RAM. This is faster then iROM spi_copy funtion as this runs spi at
50Mhz and also in WORD mode of operation.
Changed a printf in pinmux.c to debug just to avoid the compilation
error in SPL.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Tom Wai-Hong Tam <waihong@chromium.org>
Signed-off-by: Rajeshwari S Shinde <rajeshwari.s@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Renesas ARM SoCs (R-Mobile, R-Car) are armv7 only.
This drops armv5 supprt from PLATFORM_CPPFLAGS and remove config.mk of
rmobile.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
The kzm9g board fails in building with -march=armv7-a.
This fixs this problem by converting to do_div().
-----
USE_PRIVATE_LIBGCC=yes ./MAKEALL kzm9g
...
arch/arm/cpu/armv7/rmobile/librmobile.o: In function `get_time_us':
arch/arm/cpu/armv7/rmobile/timer.c:41: undefined reference to `__aeabi_uldivmod'
arch/arm/cpu/armv7/rmobile/librmobile.o: In function `get_time_ms':
arch/arm/cpu/armv7/rmobile/timer.c:47: undefined reference to `__aeabi_uldivmod'
-----
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Tetsuyuki Kobayashi <koba@kmckk.co.jp>
Fix the set_mmc_clk() for exnos4x12.
If board is exynos4x12, mmc clock should be set to wrong value.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
In config_cmd_default.h, it will use CONFIG_SYS_NO_FLASH to decide
whether include CONFIG_CMD_FLASH and CONFIG_CMD_IMLS. So, if the
CONFIG_SYS_NO_FLASH defined later than include/config_cmd_default.h,
These two commands will be included always.
So move CONFIG_SYS_NO_FLASH definition to proper position.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Enable Atmel sama5d3xek boart spl boot support, which can load u-boot
from SD card with FAT file system.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
The MPDDRC supports different type of SDRAM
This patch add ddr2 initialization function
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
The offset of MULA field in PLLA register in sama5d3 is 18,
and the length only 7 bits.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
As the DBGU and PIT has its own ID on sama5d3 SoC, while not share
with SYS ID. So, correct them.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
The SPI section is already defined in this file (lines 268-288) so we can
remove the duplicate definitions. While at it, also fix one tiny whitespace
typo.
Signed-off-by: Luka Perkov <luka@openwrt.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Whilst U-boot does not require this itself, Linux currently relies upon
it having been muxed and enabled by the bootloader. Thus in order to
preserve compatibility with current kernels before a fix is merged in
Linux we will enable the SERIRQ interrupt and mux it to its pin.
Without doing this current kernels will never receive serial port
interrupts and the end result is typically that userland appears to
hang.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
CONFIG_SYS_NS16550_CLK specifies the rate of the clock 16x the baud
rate. The SMSC FDC37M81x datasheet states that a divider of 1 results in
a UART at 115200 baud, thus the x16 clock rate is 115200 * 16.
Previously the divider was left at 0 which led to a rate of 38400 baud
regardless of CONFIG_BAUDRATE or the baudrate environment variable.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
The baudrate passed to Linux in the environment was hardcoded at 38400.
Instead pass the correct baudrate from global data, allowing Linux to
correctly inherit the baudrate used by U-boot when console setup is not
explicitly specified.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Add the default RCW(SerDes 0x66_0x16) and PBI configure file for
T2080QDS board, so we can use PBL tool to generate the ramboot
image to support boot from NAND/SPI/SD.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
The T2080QDS is a high-performance computing evaluation, development and
test platform supporting the T2080 QorIQ Power Architecture processor.
T2080QDS feature overview
Processor:
- T2080 SoC integrating four 64-bit dual-threads e6500 cores up to 1.8GHz
Memory:
- Single memory controller capable of supporting DDR3 and DDR3-LV devices
- Two DDR3 DIMMs up to 4GB, Dual rank @ 2133MT/s and ECC support
Ethernet interfaces:
- Two 1Gbps RGMII on-board ports
- Four 10Gbps XFI on-board cages
- 1Gbps/2.5Gbps SGMII Riser card
- 10Gbps XAUI Riser card
Accelerator:
- DPAA components consist of FMan, BMan, QMan, PME, DCE and SEC
SerDes:
- 16 lanes up to 10.3125GHz
- Supports Aurora debug, PEX, SATA, SGMII, sRIO, HiGig, XFI and XAUI
IFC:
- 128MB NOR Flash, 512MB NAND Flash, PromJet debug port and FPGA
eSPI:
- Three SPI flash (16MB N25Q128A + 16MB EN25S64 + 512KB SST25WF040)
USB:
- Two USB2.0 ports with internal PHY (one Type-A + one micro Type-AB)
PCIE:
- Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV)
SATA:
- Two SATA 2.0 ports on-board
SRIO:
- Two Serial RapidIO 2.0 ports up to 5 GHz
eSDHC:
- Supports SD/SDHC/SDXC/eMMC Card
I2C:
- Four I2C controllers.
UART:
- Dual 4-pins UART serial ports
System Logic:
- QIXIS-II FPGA system controll
Debug Features:
- Support Legacy, COP/JTAG, Aurora, Event and EVT
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
[York Sun: removed Makefile blank line at EOF,
fix conflicts with moving DDR driver]
Acked-by: York Sun <yorksun@freescale.com>
Add support for Freescale T2080/T2081 SoC.
T2080 includes the following functions and features:
- Four dual-threads 64-bit Power architecture e6500 cores, up to 1.8GHz
- 2MB L2 cache and 512KB CoreNet platform cache (CPC)
- Hierarchical interconnect fabric
- One 32-/64-bit DDR3/3L SDRAM memory controllers with ECC and interleaving
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
- 16 SerDes lanes up to 10.3125 GHz
- 8 mEMACs for network interfaces (four 1Gbps MACs and four 10Gbps/1Gbps MACs)
- High-speed peripheral interfaces
- Four PCI Express controllers (two PCIe 2.0 and two PCIe 3.0 with SR-IOV)
- Two Serial RapidIO 2.0 controllers/ports running at up to 5 GHz
- Additional peripheral interfaces
- Two serial ATA (SATA 2.0) controllers
- Two high-speed USB 2.0 controllers with integrated PHY
- Enhanced secure digital host controller (SD/SDHC/SDXC/eMMC)
- Enhanced serial peripheral interface (eSPI)
- Four I2C controllers
- Four 2-pin UARTs or two 4-pin UARTs
- Integrated Flash Controller supporting NAND and NOR flash
- Three eight-channel DMA engines
- Support for hardware virtualization and partitioning enforcement
- QorIQ Platform's Trust Architecture 2.0
Differences between T2080 and T2081:
Feature T2080 T2081
1G Ethernet numbers: 8 6
10G Ethernet numbers: 4 2
SerDes lanes: 16 8
Serial RapidIO,RMan: 2 no
SATA Controller: 2 no
Aurora: yes no
SoC Package: 896-pins 780-pins
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
There are more than two 10GEC in single FMAN in some SoCs(e.g. T2080).
This patch adds support for 10GEC3 and 10GEC4.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Freescale IFC controller has been used for mpc8xxx. It will be used
for ARM-based SoC as well. This patch moves the driver to driver/misc
and fix the header file includes.
Signed-off-by: York Sun <yorksun@freescale.com>
The DRAM base has been zero for Power SoCs. It could be non-zero
for ARM SoCs. Use a macro instead of hard-coding to zero.
Signed-off-by: York Sun <yorksun@freescale.com>
Some DDR registers' fields have expanded to accommodate larger values.
These changes are backward compatible. Some fields are removed for newer
DDR controllers. Writing to those fields are safely ignored.
TIMING_CFG_2 register is fixed. Additive latency is added to RD_TO_PRE
automatically. It was a misunderstanding in commit c360ceac.
Signed-off-by: York Sun <yorksun@freescale.com>
Fix ccsr_ddr structure to avoid using typedef. Combine DDR2 and DDR3
structure for 83xx, 85xx and 86xx.
Signed-off-by: York Sun <yorksun@freescale.com>
Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs.
The similar DDR controllers will be used for ARM-based SoCs.
Signed-off-by: York Sun <yorksun@freescale.com>
The default partition table matches the .dts files for these boards in
Linux. This allows these partitions to be used by name with U-Boot's
"nand" command.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
The offset of register address within GPIO module is just
CONFIG_SYS_MPC85xx_GPIO_ADDR. So, fix it. The following platforms
are confirmed: MPC8572, P1023, P1020, P1022, P2020, P4080,
P5020, P5040, T4240, B4860.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
The use of 'bool' data types in globally used header files cases build
errors like this:
In file included from arch/blackfin/include/asm/blackfin.h:13:0,
from include/common.h:92,
from cmd_test.c:17:
arch/blackfin/include/asm/blackfin_local.h:54:1: error: unknown type name 'bool'
Use plain 'int' instead to avoid such kind of trouble.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Some board have multiple configurations.
For example, the board "m54455evb" has many configurations:
M54455EVB, M54455EVB_a66, M54455EVB_i66, M54455EVB_intel, ...
When we modify board-related files, we need to test
all configurations based on such a board.
In such a case, the new option -b is useful.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
All objects under api/ and examples/api/ directories are selected
by CONFIG_API.
So we can move CONFIG_API switch to the top Makefile.
In order to use CONFIG_API, the definition of SUBDIR_EXAMPLES-y
must be moved after "sinlude $(obj)include/autoconf.mk".
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
The directory tools/ is always built before common/.
So when envcrc tool is necessary in common/Makefile,
it already exists.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
All objects under api/ and examples/api/ directories are selected
by CONFIG_API.
So we can move CONFIG_API switch to the top Makefile.
In order to use CONFIG_API, the definition of SUBDIR_EXAMPLES-y
must be moved after "sinlude $(obj)include/autoconf.mk".
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Commit 69434e4c deleted spieval board support
but it missed to clean up include/configs/spieval.h file.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
tools/updater needs board/MAI/AmigaOneG3SE board
for compiling.
But AmigaOneG3SE board was already deleted
by Commit 953b7e6.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Some GPIO connected LEDs have inverted polarity.
Introduce new config option: CONFIG_GPIO_LED_INVERTED_TABLE for the
specifying the inverted GPIO LEDs list and add support for this in the
gpio_led driver.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Ilya Ledvich <ilya@compulab.co.il>
Add a check for the gpio_request() function return value and do not try
to configure the GPIO if the gpio_request() call fails.
Also, print an error message indicating the gpio_request() has failed.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Ilya Ledvich <ilya@compulab.co.il>
The CONFIG_GPIO_LED symbol does not have any documentation in the README
file. Document the CONFIG_GPIO_LED symbol.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
In the case of not having CONFIG_CMD_HASH but having CONFIG_CMD_CRC32
enabled (and not CONFIG_CRC32_VERIFY), we end up in this part of the
code path on hash_command(). However, we will only have exactly 3 args
here, and 3 > 3 is false, and we will not try and store the hash at the
address given as arg #3. The next problem however is that we've been
moving argv around so the third value is now in argv[0] not argv[3].
Confirmed on AM335x Beaglebone White.
Signed-off-by: Tom Rini <trini@ti.com>
This chip is compatible with the existing driver, except that it uses
BAR2 instead of BAR1 for the I/O memory region. Using this patch I can
use the PCIe ethernet interface on the CompuLab Trimslice to boot from
the network.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Patch: 276477
Instead of directly calling the low-level invalidate_dcache_range() and
flush_cache() functions, provide thin wrappers that take into account
alignment requirements.
While at it, fix a case where the cache was flushed but should have been
invalidated, two cases where the buffer data was flushed instead of the
descriptor and a missing cache invalidation before reading the packet
data that the NIC just wrote to memory.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Patch: 276474
Added d-cache support for zynq_gem.c,
Observed a difference of +0.8 MiB/s when downloading
a file of size of 3007944Bytes.
With d-cache OFF:
----------------
Filename 'uImage'.
Load address: 0x800
Loading: #################################################################
#################################################################
#################################################################
##########
1.3 MiB/s
done
Bytes transferred = 3007944 (2de5c8 hex)
With d-cache ON:
---------------
Filename 'uImage'.
Load address: 0x800
Loading: #################################################################
#################################################################
#################################################################
##########
2.1 MiB/s
done
Bytes transferred = 3007944 (2de5c8 hex)
Changes on zynq_gem for d-cache support:
- Tx and Rx buffers are cache-aligned
- Updated logic for invalidating Rx buffers and flushing Tx buffers.
- Tx and Rx BD's are allocated from non-cacheable region.
(When BDs are cached, we don't see a consistent link)
- Use TX BD status intead of txsr status checks.
Signed-off-by: Srikanth Thokala <sthokal@xilinx.com>
Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
When an unprogrammed EEPROM is attached to a dm9000, the dm9000 will
come up with a invalid MAC address of ff:ff:ff:ff:ff:ff. Add code that
gets enabled if CONFIG_RANDOM_MACADDR is enabled that generates a random
(and valid) locally administered MAC address that allows the system to
network boot until a real MAC address can be configured.
Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
The e1000 driver expects to always have some kind of non-volatile memory
attached directly to the ethernet controller chip. This means that I would
have to add an additional separate flash chip to my custom board just to
store essentially the MAC address. Since I don't want to do that, this patch
introduces a new config option CONFIG_E1000_NO_NVM. If defined it disables
all accesses to the NVM. I have tested the patch with a 82574 controller.
Signed-off-by: Rojhalat Ibrahim <imr@rtschenk.de>
NetServerEther was not being cleared in the tftp server code, so the
destination MAC address would be whatever the last destination MAC
address was.
Scenario:
U-Boot:
dhcp
tftpsrv
Host:
Send device WRQ
Device:
Responds with ACK to dhcp server mac address with
host ip address
By clearing NetServerEther, we force a lookup of the host MAC address
to go with the associated host IP.
Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
The masks were ignoring the last 4 bits which didn't allow detection differences
between the ar8031 and ar8035.
Signed-off-by: Jon Nettleton <jon.nettleton@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Patch: 288018
The both AR8031 and AR8035 belong to Atheros 803x serial PHY.
So the phy id mask of AR8031 is the same to the phy id mask
of AR8035. The right mask value is 0x4fffff.
This patch has been tested on the P1010 and P1023.
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Patch: 287748
Fix the 32-bit memory access that is not "endianess safe",
i.e. not giving the desired byte layout for LE cpus:
tempval = *((uint *) (tmpbuf + 4)), where 'char tmpbuf[]'.
Free the stack from rendundant local vars:
tmpbuf[] and i.
Use a portable type (u32) for the 32bit tsec register value
holder: tempval.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Use cross arch portable u32 instead of uint for the
tsec registers. Remove the typedefs for the register
struct definitions in the process. Fix long lines.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Currently, the buffer descriptor (BD) fields cannot be
correctly accessed by a little endian processor. This
patch fixes the issue by making the access of BDs to be
portable among different cpu architectures.
Use portable data types for the Rx/Tx buffer descriptor
fields. Use portable I/O accessors to insure that the
big endian BDs are correctly accessed by little endian
cpus too, and to insure proper sync with the H/W.
Removed the redundant RTXBD "volatile" type, as proper
synchronization around BD data accesses is provided by
the I/O accessors now.
The "sparse" tool was also used to verify the correctness
of these changes.
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Fix bufPtr and the rxIdx/ txIdx occurrences to
solve the related checkpatch warnings for the
coming patches.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Remove tsec_t typedef. Define macros as getters of
tsec and mdio register memory regions, for consistent
initialization of various 'regs' fields and also to
manage overly long initialization lines.
Use the __iomem address space marker to address sparse
warnings in tsec.c where IO accessors are used, like:
tsec.c:394:19: warning: incorrect type in argument 1 (different
address spaces)
tsec.c:394:19: expected unsigned int volatile [noderef]
<asn:2>*addr
tsec.c:394:19: got unsigned int *<noident>
[...]
Add the __iomem address space marker for the tsec pointers
to struct tsec_mii_mng memory mapped register regions.
This solves the sparse warnings for mixig normal pointers
with __iomem pointers for tsec.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Access to privlist[1] (hardcoded referece to the 2nd tsec's
priv area) is neither correct nor does it make sense in the
current context. Each tsec dev has access to its own priv
instance only, and hence to its own set of group address
registers (GADDR) to filter multicast addresses.
This fix leads to removal of the unused (faulty) privlist[]
and related global static vars. Note that mcast() can be
called only after eth_device allocation and init, and hence
after priv area allocation, so dev->priv is correctly
initialized upon mcast() call.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Patch: 278990
There are several implementation issues for tsec_mcast_addr()
addressed by this patch:
* unmanaged, not portable r/w access to registers; fixed with
setbits_be32()/ clrbits_be32()
* use of volatile pointers
* unnecessary forced cast to u8 for the ether_crc() result
* removed redundant parens
* corrected some comment slips
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Patch: 279000
This fixes the following compiler warnings when activating
CONFIG_MCAST_TFTP:
tsec.c: In function 'tsec_mcast_addr':
tsec.c:130:2: warning: passing argument 2 of 'ether_crc' makes pointer
from integer without a cast [enabled by default]
In file included from /work/u-boot-net/include/common.h:874:0,
from tsec.c:15:
/work/u-boot-net/include/net.h:189:5: note: expected 'const unsigned
char *' but argument is of type 'u8'
tsec.c: In function 'tsec_initialize':
tsec.c:646:13: warning: assignment from incompatible pointer type
[enabled by default]
eth.c: In function 'eth_mcast_join':
eth.c:358:2: warning: passing argument 2 of 'eth_current->mcast' makes
integer from pointer without a cast [enabled by default]
eth.c:358:2: note: expected 'u32' but argument is of type 'u8 *'
In the eth_mcast_join() implementation, eth_current->mcast()
takes a u8 pointer to the multicast mac address and not a ip
address value as implied by its prototype.
Fix parameter type mismatch for tsec_macst_addr() (tsec.c):
ether_crc() takes a u8 pointer not a u8 value.
mcast() is given a u8 pointer to the multicats mac address.
Update parameter type for the rest of mcast() instances.
Signed-off-by: Claudiu Manoil <claudiu.manoil@freescale.com>
Patch: 278989
It's important that buffer descriptors are aligned in accordance to GMAC
data bus width (32/64/128-bit). It's safe to align to 128-bit (16-bytes)
for every bus width type.
If buffer descriptor is improperly aligned GMAC discards lower bits of
provided address and as a result reads from improper location that
doesn't match expected fields.
Commit ef76025a99 "net: Multiple
updates/enhancements to designware.c" introduced another structure
member "link_printed" right before buffer descriptors while "padding"
member was left untouched. This together with alignment of structure
itself to 16-byte boundary forces buffer descriptoprs always to be
4-byte aligned that causes driver complete disfunction if GMAC bus width
is 64 or 128-bit.
Proposed change makes sure all buffer descriptors are 16-byte (128-bit)
aligned.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Patch: 277902
"bus mode" register contains lots of fields and some of them don't
expect to be written with 0 (zero). So since we're only interested in
resetting MAC (which is done with setting the least significant bit of
this register with "0") I believe it's better to modify only 1 bit of
the register.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Acked-by: Vipin Kumar <vipin.kumar@st.com>
Patch: 277864
This chip is compatible with other RTL8168 chips and can be found on the
NVIDIA Cardhu and Beaver boards.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Patch: 276475
currticks() is defined as get_timer(0), which returns an unsigned long,
so use %lu instead of %d to print the result.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Patch: 276473
Some phys (Micrel) have additional registers that can
be accessed using a special sequence. This patch allows
to use standard "mdio" command to accesss these registers.
Signed-off-by: Stefano Babic <sbabic@denx.de>
Some phys (Micrel) has extended registers that must be
accessed in a special way. Add pointers to the phy driver
structure to allow to use these functions with mdio command.
Signed-off-by: Stefano Babic <sbabic@denx.de>
The 'get_phy_driver' code in 'drivers/net/phy/phy.c' uses the following
method to determine which driver is to be loaded for a particular PHY
module:
list_for_each(entry, &phy_drivers) {
drv = list_entry(entry, struct phy_driver, list);
if ((drv->uid & drv->mask) == (phy_id & drv->mask))
return drv;
}
This means that a drv->mask of 0xfffff0 will return incorrect phy driver
for the logic above, even if the drv->uid is anything other than
something ending with a 0x0.
For e.g. if the RTL8211E drv->uid is 0x1cc915 and drv->mask is 0xffffff
and the RTL8211B drv->uid is 0x1cc910 and drv->mask is 0xffffff0, then
the phy driver selected will always be RTL8211B even though the
underlying phy connected on the board is a 8211E module.
This patch fixes this issue.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
This patch adds support for VSC8514 PHY module which can be
found on Freescale's T1040RDB boards.
Signed-off-by: Arpit Goel <B44344@freescale.com>
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
The sh-eth of rmobile needs to use invalidate_cache* function.
This patch adds invalidate_cache* function.
Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Patch: 268948
The cache API of SH was changed from dcache_wback_range to flush_dcache_range.
sh-eth uses dcache_wback_range. This patch changes to flush_dcache_range.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Avoid a recently introduced unused variable warning for boards that
use mvgbe but not phylib.
Signed-off-by: Sascha Silbe <t-uboot@infra-silbe.de>
Patch: 266334
fixed-link is used in kernel for PHY-less MAC, so introduce this
structure that U-boot can use it to fixup dtb dynamically.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
As AR8031 and AR8033 have same PHY ID 0x4dd074, they use the
common driver. Currently AR8031_driver didn't work for AR8033,
hence updated it to have it work on AR8031/AR8033.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
When the block 0 store to the memory of client and timeout at this
moment. Because of no ACK packet, the server will send block 0 again,
if this client reconnect to the server at this time,
TftpBlockWrapOffset will become larger than it should be.
Signed-off-by: Rockly <rocklygnome@gmail.com>
Patch: 264417
Very often a constant pointer is passed to this function, so we should
declare this, since map_to_sysmem() does not change the pointer.
Signed-off-by: Simon Glass <sjg@chromium.org>
There are a few wwrnings in this file when building for sandbox. Addresses
coming from the device tree need to be treated as ulong as elsewhere in
U-Boot and we must use map_sysmem() to convert to a pointer when needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Hung-ying Tyan <tyanh@chromium.org>
Sandbox uses an emulated memory map which is quite small. We don't need the
CONFIG_PHYS_64BIT option since we can address memory with a 32-bit offset
into our ram_buf.
Adjust the phys_addr_t and phys_size_t types accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Hung-ying Tyan <tyanh@chromium.org>
This file must be compiled with system headers, even if U-Boot has headers
of the same name. The existing solution for this is good enough for libfdt,
but fails when we have headers like stdint.h in U-Boot.
Use -idirafter instead of -I, and remove the -nostdinc and other things
that we don't want for this file. The best way to do this is to keep a
copy of the original flags, rather than trying to filter them later.
Signed-off-by: Simon Glass <sjg@chromium.org>
The uint64_t type is defined in linux/types.h, so is safer than u64, which
is not actually a Linux type.
Change-Id: Ifc9a369e6543250c49117b8d3cb3a676eee43e04
Signed-off-by: Simon Glass <sjg@chromium.org>
A common use-case is to build all boards for a particular SoC. This can
be achieved by:
./tools/buildman/buildman -b mainline_dev tegra20
However, when the SoC is a member of a family of SoCs, and each SoC has
a different name, it would be even more useful to build all boards for
every SoC in that family. This currently isn't possible since buildman's
board selection command-line arguments are compared to board definitions
using pure string equality.
To enable this, compare using a regex match instead. This matches
MAKEALL's handling of command-line arguments. This enables:
(all Tegra)
./tools/buildman/buildman -b mainline_dev tegra
(all Tegra)
./tools/buildman/buildman -b mainline_dev '^tegra.*$'
(all Tegra20, Tegra30 boards, but not Tegra114)
./tools/buildman/buildman -b mainline_dev 'tegra[23]'
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Sometimes a commit should have notes enclosed with it rather
than withing the cover letter -- possibly even because there
is no cover letter. Add a 'Commit-notes' tag, similar to the
'Series-notes' one; lines between this tag and the next END
line are inserted in the patch right after the '---' commit
delimiter.
Change-Id: I01e99ae125607dc6dec08f3be8a5a0b37f0a483d
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Simon Glass <sjg@chromium.org>
(Updated README)
GPMC controller is common IP to interface with both NAND and NOR flash devices.
Also, it supports max 8 chip-selects, which can be independently connected to
any of the devices.
But ROM code expects the boot-device to be connected to only chip-select[0].
Thus to resolve conflict between NOR and NAND boot. This patch:
- combines NOR and NAND configs spread in board files to common gpmc_init()
- configures GPMC based on boot-mode selected for SPL boot.
Signed-off-by: Pekon Gupta <pekon@ti.com>
This patch adds new CONFIG_NAND_OMAP_ECCSCHEME, replacing other distributed
CONFIG_xx used for selecting NAND ecc-schemes.
This patch aims at solving following issues.
1) Currently ecc-scheme is tied to SoC platform, which prevents user to select
other ecc-schemes also supported in hardware. like;
- most of OMAP3 SoC platforms use only 1-bit Hamming ecc-scheme, inspite
the fact that they can use higher ecc-schemes like 8-bit ecc-schemes with
software based error detection (OMAP_ECC_BCH4_CODE_HW_DETECTION_SW).
- most of AM33xx SoC plaforms use 8-bit BCH ecc-scheme for now, but hardware
supports BCH16 ecc-scheme also.
2) Different platforms use different CONFIG_xx to select ecc-schemes, which
adds confusion for user while migrating platforms.
- *CONFIG_NAND_OMAP_ELM* which enables ELM hardware engine, selects only
8-bit BCH ecc-scheme with h/w based error-correction (OMAP_ECC_BCH8_CODE_HW)
whereas ELM hardware engine supports other ecc-schemes also like; BCH4,
and BCH16 (in future).
- *CONFIG_NAND_OMAP_BCH8* selects 8-bit BCH ecc-scheme with s/w based error
correction (OMAP_ECC_BCH8_CODE_HW_DETECTION_SW).
- *CONFIG_SPL_NAND_SOFTECC* selects 1-bit Hamming ecc-scheme using s/w library
Thus adding new *CONFIG_NAND_OMAP_ECCSCHEME* de-couples ecc-scheme dependency
on SoC platform and NAND driver. And user can select ecc-scheme independently
foreach board.
However, selection some hardware based ecc-schemes (OMAP_ECC_BCHx_CODE_HW) still
depends on presence of ELM hardware engine on SoC. (Refer doc/README.nand)
Signed-off-by: Pekon Gupta <pekon@ti.com>
BCH8_ECC scheme implemented in omap_gpmc.c driver has following favours
+-----------------------------------+-----------------+-----------------+
|ECC Scheme | ECC Calculation | Error Detection |
+-----------------------------------+-----------------+-----------------+
|OMAP_ECC_BCH8_CODE_HW |GPMC |ELM H/W engine |
|OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |GPMC |S/W BCH library |
+-----------------------------------+-----------------+-----------------+
Current implementation limits the BCH8_CODE_HW only for AM33xx device family.
(using CONFIG_AM33XX). However, other SoC families (like TI81xx) also have
ELM hardware module, and can support ECC error detection using ELM.
This patch
- removes CONFIG_AM33xx
Thus this driver can be reused by all devices having ELM h/w engine.
- adds omap_select_ecc_scheme()
A common function to handle ecc-scheme related configurations. This
can be used both during device-probe and via user-space u-boot commads
to change ecc-scheme. During device probe ecc-scheme is selected based
on CONFIG_NAND_OMAP_ELM or CONFIG_NAND_OMAP_BCH8
- enables CONFIG_BCH
S/W library (lib/bch.c) required by OMAP_ECC_BCHx_CODE_HW_DETECTION_SW
is enabled by CONFIG_BCH.
- enables CONFIG_SYS_NAND_ONFI_DETECTION
for auto-detection of ONFI compliant NAND devices
- updates following README doc
doc/README.nand
board/ti/am335x/README
doc/README.omap3
Signed-off-by: Pekon Gupta <pekon@ti.com>
[scottwood@freescale.com: fixed unused variable warning]
Signed-off-by: Scott Wood <scottwood@freescale.com>
ELM hardware engine which is used for ECC error detection, is present on all
latest OMAP SoC (like OMAP4xxx, OMAP5xxx, DRA7xxx, AM33xx, AM43xx). Thus ELM
driver should be moved to common drivers/mtd/nand/ folder so that all SoC
having on-chip ELM hardware engine can re-use it.
This patch has following changes:
- mv arch/arm/include/asm/arch-am33xx/elm.h arch/arm/include/asm/omap_elm.h
- mv arch/arm/cpu/armv7/am33xx/elm.c drivers/mtd/nand/omap_elm.c
- update Makefiles
- update #include <asm/elm.h>
- add CONFIG_NAND_OMAP_ELM to compile driver/mtd/nand/omap_elm.c
and include in all board configs using AM33xx SoC platform.
Signed-off-by: Pekon Gupta <pekon@ti.com>
Current IFC driver supports till 4K page size NAND flash.
Add support of 8K NAND flash
- Program Spare region size in csor_ext
- Add nand_ecclayout for 4 bit & 8 bit ecc
- Defines constants
- Add support of 8K NAND boot.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
CC: Liu Po <po.liu@freescale.com>
nand_ecclayout is present in mtd.h at Linux.
Move this structure to mtd.h to comply with Linux.
Also, increase the ecc placement locations to 640 to suport device having
writesize/oobsize of 8KB/640B. This means that the maximum oobsize has gone
up to 640 bytes and consequently the maximum ecc placement locations have
also gone up to 640.
Changes from Prabhabkar's version (squashed into one patch to preserve
bisectability):
- Added _LARGE to MTD_MAX_*_ENTRIES
This makes the names match current Linux source, and resolves
a conflict between
http://patchwork.ozlabs.org/patch/280488/
and
http://patchwork.ozlabs.org/patch/284513/
The former was posted first and is closer to matching Linux, but
unlike Linux it does not add _LARGE to the names. The second adds
_LARGE to one of the names, and depends on it in a subsequent patch
(http://patchwork.ozlabs.org/patch/284512/).
- Made max oobfree/eccpos configurable, and used this on tricorder,
alpr, ASH405, T4160QDS, and T4240QDS (these boards failed to build
for me without doing so, due to a size increase).
On tricorder SPL, this saves 2576 bytes (and makes the SPL build
again) versus the new default of 640 eccpos and 32 oobfree, and
saves 336 bytes versus the old default of 128 eccpos and 8 oobfree.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
CC: Vipin Kumar <vipin.kumar@st.com>
[scottwood@freescale.com: changes as described above]
Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Thomas Weber <weber@corscience.de>
Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Cc: Stefan Roese <sr@denx.de>
Cc: York Sun <yorksun@freescale.com>
Cc: Tom Rini <trini@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
- Descend into drivers/fpga/ only when CONFIG_FPGA=y
- Descend into drivers/bios_emulator only when CONFIG_BIOSEMU=y
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
The support for COBJS, COBJS-y, SOBJS, SOBJS-y, GLCOBJS, GLSOBJS
from scripts/Makefile.build.
Going forward we need to use Kbuild style consistently.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Board config.mk do not need to add -DCONFIG_SYS_TEXT_BASE
to CPPFLAGS because the top level config.mk does instead.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Commit 309a292e deleted OXC board, but
missed to remove the standalone example specific to OXC board.
eepro100_eeprom.c has been an orphan file for a long term.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Since commit c2dd0d455 and 45bf05854 introduced
the new cache maintainance framework to ARM,
CONFIG_L2_OFF has not been used at all.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
In 6789e84 we update u-boot-spl.lds for OMAP to ensure we include
adapter information, as we use i2c during SPL. However, the regex used
also means we included commands that may have been built. On omap5_uevm
this leads to a failure as we include the command from the do_tca642x
command, and fail to link. The fix is to restrict our regex to only the
i2c list parts.
Signed-off-by: Tom Rini <trini@ti.com>
The physical base address of the NOR flash is 0x1e000000
on the Malta boards. The hardware also maps the first 4MiB
of the flash into the 0x1fc00000-0x1fffffff range.
Currently, U-Boot uses the mapped address to access the
flash, which does not work in recent qemu versions.
Since commit a427338b222b43197c2776cbc996936df0302f51
(mips_malta: correct reading MIPS revision at 0x1fc00010)
writing to the mapped address space causes a CPU exception.
Due to the exception, U-Boot hangs during boot when it tries
to detect the CFI flash chip.
Use the correct physical address for the MALTA_FLASH_BASE
constant to fix the problem. In order to avoid relocation
problems, also update the CONFIG_SYS_{TEXT,MONITOR}_BASE
constants.
The change makes it possible to start U-Boot on a Malta
board emulated with Qemu 1.6.1 and 1.7.0-rc0. It also
works on older versions (tested with 1.1.1, 1.2.2, 1.4.2,
1.5.3).
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
as per controller description,
"While programming a NAND flash, status read should never skipped.
Because it may happen that a new command is issued to the NAND Flash,
even when the device has not yet finished processing the previous request.
This may result in unpredictable behaviour."
IFC controller never polls for R/B signal after command send. It just return
control to software. This behaviour may not occur with NAND flash access.
because new commands are sent after polling R/B signal. But it may happen
in scenario where GPCM-ASIC and NAND flash device are working simultaneously.
Update the controller driver to take care of this requirement
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Since the required API is gpio which is enclosed with CONFIG_ATMEL_LEGACY use
that switch here.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Acked-by: Heiko Schocher <hs@denx.de>
When indexing freqProcessor[] we use the first
value in the cpu's "reg" property, which on
new e6500 cores IDs the threads.
But freqProcessor[] should be indexed with a
core index so, when fixing "the clock-frequency"
cpu node property, access the freqProcessor[]
with the core index derived from the "reg' property.
If we don't do this, last half of the "cpu" nodes
will have broken "clock-frequency" values.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Cc: York Sun <yorksun@freescale.com>
Update the code that builds the pci endpoint liodn
offset list so that it doesn't overlap with other
liodns and doesn't generate negative offsets like:
fsl,liodn-offset-list = <0 0xffffffcd 0xffffffcf
0xffffffd1 0xffffffd3
0xffffffd5 0xffffffd7
0xffffffd9 0xffffffdb>;
The update consists in adding a parameter to the
function that builds the list to specify the base
liodn.
On PCI v2.4 use the old base = 256 and, on PCI 3.0
where some of the PCIE liodns are larger than 256,
use a base = 1024. The version check is based on
the PCI controller's version register.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: York Sun <yorksun@freescale.com>
The liodn for the T4240's PCIE controller is no longer set
through a register in the guts register block but with one
in the PCIE register block itself.
Use the already existing SET_PCI_LIODN_BASE macro that puts
the liodn in the correct register.
Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: York Sun <yorksun@freescale.com>
T1042RDB_PI is Freescale Reference Design Board supporting the T1042
QorIQ Power Architecture™ processor. T1042 is a reduced personality
of T1040 SoC without Integrated 8-port Gigabit. The board is designed
with low power features targeted for Printing Image Market.
T1042RDB_PI is similar to T1040RDB board with few differences like
it has video interface, supports T1042 personality
T1042RDB_PI board Overview
-----------------------
- Four e5500 cores, each with a private 256 KB L2 cache
- 256 KB shared L3 CoreNet platform cache (CPC)
- Interconnect CoreNet platform
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
for the following functions:
- Packet parsing, classification, and distribution
- Queue management for scheduling, packet sequencing, and congestion
management
- Cryptography Acceleration
- RegEx Pattern Matching Acceleration
- IEEE Std 1588 support
- Hardware buffer management for buffer allocation and deallocation
- Ethernet interfaces
- Two on-board RGMII 10/100/1G ethernet ports.
- SERDES Connections, 8 lanes supporting:
— PCI
— SATA 2.0
- DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
Interleaving
-IFC/Local Bus
- NAND flash: 1GB 8-bit NAND flash
- NOR: 128MB 16-bit NOR Flash
- Ethernet
- Two on-board RGMII 10/100/1G ethernet ports.
- PHY #0 remains powered up during deep-sleep
- CPLD
- Clocks
- System and DDR clock (SYSCLK, “DDRCLK”)
- SERDES clocks
- Video
- DIU supports video at up to 1280x1024x32bpp
- HDMI connector
- Power Supplies
- USB
- Supports two USB 2.0 ports with integrated PHYs
- Two type A ports with 5V@1.5A per port.
- SDHC
- SDHC/SDXC connector
- SPI
- On-board 64MB SPI flash
- I2C
- Device connected: EEPROM, thermal monitor, VID controller, RTC
- Other IO
- Two Serial ports
- ProfiBus port
- Four I2C ports
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
T1040 Soc has four personalities:
-T1040 (4 cores with L2 switch)
-T1042:Reduced personality of T1040 without L2 switch
-T1020:Reduced personality of T1040 with less cores(2 cores)
-T1022:Reduced personality of T1040 with 2 cores and without L2 switch
Update defines in arch/powerpc header files, Makefiles and in
driver/net/fm/Makefile to support all T1040 personalities
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
[York Sun: fixed Makefiles]
Acked-by: York Sun <yorksun@freescale.com>
- Remove duplicate doc/README.p1010rdb
- Rename README to README.P1010RDB-PA
- Add new README.P1010RDB-PB
P1010RDB-PB is a variation of previous P1010RDB-PA board.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Use a default RCW of protocol 0x66.
A PBI configure file which uses CPC as 256KB SRAM. It can be used by
PBL tool on T1040 to build a pbl boot image.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
This delay applies to any data transfer on I2C bus.
For example 1kB data read with per-byte access (which happens if
environment is stored in I2C EEPROM) takes more than 10 seconds.
Moreover data bus driver has to care about bus state and data transfer,
but not about internal states of attached devices.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Tom Rini <trini@ti.com>
cc: Armando Visconti <armando.visconti@st.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Vipin KUMAR <vipin.kumar@st.com>
Cc: Tom Rix <Tom.Rix@windriver.com>
Cc: Mischa Jonker <mjonker@synopsys.com>
Data "offset" is not used directly in case of I2C EEPROM. Istead it is
split into "block number" and "offset within mentioned block". Which are
"addr[0]" and "addr[1]" respectively.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
cc: Peter Tyser <ptyser@xes-inc.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Mischa Jonker <mjonker@synopsys.com>
remove omap1510 i2c driver, as there is no board which uses it
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Cc: Jian Zhang <jzhang@ti.com>
- add zync i2c driver to new multibus/multiadpater support
- adapted all config files, which uses this driver
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Michal Simek <michal.simek@xilinx.com>
The endless waiting for a bit to be set can cause a hang, add a timeout
so we prevent such situation. A testcase for such a hang is below. The
testcase assumes a device to be present at address 0x50 and a device to
NOT be present at address 0x42 . Also note that the "sleep 1" induced
delays are imperative for this bug to manifest .
i2c read 0x42 0x0.2 0x10 0x42000000 ; sleep 1 ; \
i2c read 0x50 0x0.2 0x10 0x42000000 ; sleep 1 ; \
i2c read 0x42 0x0.2 0x10 0x42000000
The expected result of the above command is:
Error reading the chip.
Error reading the chip.
While without this patch, we observe a hang in the last read from 0x42
precisely when waiting for this bit to be set.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
This updates to new I2C framwwork on sh_i2c.
And this also updates boards(kzm9g and ecovec) that using sh_i2c.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- dxr2: define unused pins as input
- do not enable RTC32K OSC on dxr2 board
- update default environment
- add splashpos=m,m to default environment, so splash screen is always
centered.
- adapt environment for bootcount feature
- add altbootcmd to default environment
- rut: SPL add early reset pulse for eth-phy, maXTouch and display
- rut: display timing aenderungen
- siemens boards: adapt for background color = white
- add boutcount feature for the siemens boards
store the bootcount in the environment, as we have no softreset
save registers on this hardware. Use therefore the CONFIG_BOOTCOUNT_ENV
bootcount driver.
- change spi mode from 3 to 0 for the lcd init
- add gpio pin for lcd reset with state 0 and add mdelay
- siemens boards: use own USB id's
- add dfu serial and device number for siemens boards
Add for the siemens boards the possibility to define in dfu mode,
the iSerialNumber and the bcdDevice fields in the USB Device
descriptor.
- fix upgrade mechanism based on bootcount
Correct location of saveenv and remove not active variable.
Add CONFIG_BOOT_RETRY_TIME and CONFIG_RESET_TO_RETRY to
reboot board in case of empty kernel partition. Without
these defines an empty kernel partition leads to an
abort of boot process and one remains in u-boot prompt.
- general cleanup of dxr2, pxm2 and rut boards
all:
* Remove net boot from bootcmd
Ping can cause a crash on boards without ethernet phy.
net_nfs command is used only for development
* Add reset at the end of bootcmd
In order to have an immediate reset of the boot when bootcmd
fails, add reset at the end of bootcmd.
rut:
* add nand_img_size
dxr2:
* update nand_img_size
* ddr3 timings updated with iocontrol property that can be
modified via eeprom. New default parameters from software
leveling with draco ES2.
Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Pascal Bach <pascal.bach@siemens.com>
Signed-off-by: Roger Meier <r.meier@siemens.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Matthias Michel <matthias.michel@siemens.com>
Cc: Tom Rini <trini@ti.com>
add the possibility to set the bcdDevice number board specific.
Therefore the weak function g_dnl_get_board_bcd_device_number()
is introduced. Used on the siemens boards.
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Use scf0403 driver to add scf0403x LCD support for cm-t35 and cm-t3730
boards.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
The flag combination "SPI_XFER_BEGIN | SPI_XFER_END" is a common use
case of spi_xfer, and it can easily cause an already long line (spi_xfer
takes 5 parameters) to go over the 80 character limit.
define SPI_XFER_ONCE to be a shorter version of the above flag combination.
Cc: Tom Rini <trini@ti.com>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Current implementation only supports 8 bit word lengths, even though
omap3 can handle anything between 4 and 32.
Update the spi interface to support changing the SPI word length,
and implement it in omap3_spi driver to support the full range of
possible word lengths.
This implementation is backwards compatible by defaulting to the old
behavior of 8 bit word lengths.
Also, it required a change to the omap3_spi non static I/O functions,
but since they are not used anywhere else, no collateral changes are required.
Cc: Tom Rini <trini@ti.com>
Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Depending on the firmware's video options [1] the active SDTV or
HDTV mode can yield a framebuffer with noncontiguous horizontal lines,
giving a messed up display, for both, u-boot and the loaded kernel.
Fix this by setting lcd_line_length to the pitch value of the configured
framebuffer.
[1] http://elinux.org/RPiconfig#Video_mode_options
Signed-off-by: Andre Heider <a.heider@gmail.com>
Cc: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Remove the redundant lcd_line_length initialisation which
sneaked in when an earlier version of the patch of commit
6d330719 has been rebased.
Some lcd drivers need to setup lcd_line_length not from the
panel_info parameters but by different means. Make the
lcd_get_size() weak to allow setting lcd_line_length in
a driver specific way.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stephen Warren <swarren@wwwdotorg.org>
The MPC824x processors have long reached EOL, and the PN62 board has
not seen any board-specific updates for more than a decade. It is now
causing build issues. Instead of wasting time on things nobody is
interested in any more, we rather drop this board.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Wolfgang Grandegger <wg@grandegger.com>
cc: Tom Rini <trini@ti.com>
Some am33xx boards may not use the RTC block for bootcount (as it may
not be wired up for the board) and use some other facility. So add
another symbol for the bootcount driver for the IP block.
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Tom Rini <trini@ti.com>
Switch to using the generic gpio_led driver instead of the private to
cm_t35 board led implementation.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
Commit f6d1f6e4a5 broke selection of UARTs
other than UART0 for am335x_evm configurations by setting CONS_INDEX to
1 for all configurations. Revert the CONS_INDEX changes.
Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
Update my email address as ti814x_evm maintainer to save
people some frustrating bounces and non-response.
Signed-off-by: Matt Porter <matt.porter@linaro.org>
As
http://www.denx.de/wiki/view/U-Boot/DesignPrinciples#2_Keep_it_Fast
states:
"Initialize devices only when they are needed within U-Boot"
enable the RTC32K OSC only, if CONFIG_SPL_AM33XX_ENABLE_RTC32K_OSC is
enabled. Enable this in ti_am335x_common.h, so all boards in mainline
should work as before.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
If no softreset save registers are found on the hardware
"bootcount" is stored in the environment. To prevent a
saveenv on all reboots, the environment variable
"upgrade_available" is introduced. If "upgrade_available" is
0, "bootcount" is always 0 therefore no need to save the
environment on u-boot boot, if "upgrade_available" is 1 "bootcount"
is incremented in the environment and environment gets written
on u-boot start.
So the Userspace Applikation must set the "upgrade_available"
and "bootcount" variable to 0 (for example with fw_setenv),
if a boot was successfully.
Signed-off-by: Heiko Schocher <hs@denx.de>
Commit 8dfafdde88 introduced
new gcc warnings on MIPS64:
time.c: In function 'tick_to_time':
time.c:59:2: warning: comparison of distinct pointer types lacks a cast [enabled by default]
time.c:59:2: warning: passing argument 1 of '__div64_32' from incompatible pointer type [enabled by default]
In file included from time.c:10:0:
./u-boot-mips/include/div64.h:22:17: note: expected 'uint64_t *' but argument is of type 'long long unsigned int *'
time.c: In function 'usec_to_tick':
time.c:76:2: warning: comparison of distinct pointer types lacks a cast [enabled by default]
time.c:76:2: warning: passing argument 1 of '__div64_32' from incompatible pointer type [enabled by default]
In file included from time.c:10:0:
./u-boot-mips/include/div64.h:22:17: note: expected 'uint64_t *' but argument is of type 'long long unsigned int *'
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch replaces the GPL-2.0 text with a GPL-2.0
SPDX-License-Identifier tag, and adds Imagination Technologies copyright
following my recent changes.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Conflicts:
arch/arm/cpu/arm926ejs/mxs/Makefile
board/compulab/cm_t35/Makefile
board/corscience/tricorder/Makefile
board/ppcag/bg0900/Makefile
drivers/bootcount/Makefile
include/configs/omap4_common.h
include/configs/pdnb3.h
Makefile conflicts are due to additions/removals of
object files on the ARM branch vs KBuild introduction
on the main branch. Resolution consists in adjusting
the list of object files in the main branch version.
This also applies to two files which are not listed
as conflicting but had to be modified:
board/compulab/common/Makefile
board/udoo/Makefile
include/configs/omap4_common.h conflicts are due to
the OMAP4 conversion to ti_armv7_common.h on the ARM
side, and CONFIG_SYS_HZ removal on the main side.
Resolution is to convert as this icludes removal of
CONFIG_SYS_HZ.
include/configs/pdnb3.h is due to a removal on ARM side.
Trivial resolution is to remove the file.
Note: 'git show' will also list two files just because
they are new:
include/configs/am335x_igep0033.h
include/configs/omap3_igep00x0.h
The memsize environment variable must contain the
memory size in bytes on the Malta board. Otherwise
Linux will use wrong memory size which causes a kernel
panic.
Define CONFIG_MEMSIZE_IN_BYTES in malta.h to avoid
that.
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
Cc: Paul Burton <paul.burton@imgtec.com>
This patch adds me as a maintainer of the malta(el) board(s). I have
access to physical Malta boards and the desire for U-boot to run well on
them.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
This patch adds a script which may be used with MIPS Navigator Console
and a MIPS Nagivator Probe in order to flash U-boot to a MIPS Malta
development board.
Please see the newly added doc/README.malta for usage instructions.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will
be left disabled. Linux does not set up this routing but relies upon it
having been set up by the bootloader, reading back the IRQ lines which
the PIRQ[A:D] signals have been routed to.
This patch routes PIRQA & PIRQB to IRQ 10, and PIRQC & PIRQD to IRQ 11.
This matches the setup used by YAMON.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Allow the environment to be stored in the monitor flash of a Malta
board. The environment is stored in the final 128KB of the flash, which
both leaves the majority of the flash available for U-boot code and also
matches the location which YAMON uses.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
This is actually required in order for a Linux kernel to boot
successfully on a physical Malta board. Without enabling the RTC, a
Malta Linux kernel will get stuck in its estimate_frequencies function
on boot.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Malta boards may be used with cores which support L2 caches, however
U-boot does not yet support L2 cache for MIPS. Thus for the moment we'll
disable L2 caches by setting the L2B bit in Config2. This is specific to
MTI/Imagination MIPS cores which is why this is done for the Malta board
rather than generically.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
These will now be detected at runtime, allowing a single U-boot
configuration to function correctly with different bitstreams. Without
this you may need to re-configure, re-build and re-flash U-boot to your
Malta if you flash a new bitstream with a different cache configuration
to your old bitstream.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
This model of the pcnet is used in current Malta boards, at least in the
Malta-R rev 3. Enable support for it.
The Malta also has the ethernet controller PROM containing its MAC
address, so enable support for that in order to read that MAC address.
DHCP is a very useful feature to have available for many networks,
enable support for it also.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Displaying a message on the LCD screen is a simple yet effective way to
show the user that the board has booted successfully.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
This patch adds support for running on Malta boards using coreFPGA6
core cards, including support for the msc01 system controller used
with them. The system controller is detected at runtime allowing one
U-boot binary to run on a Malta with either.
Due to the PCI I/O base differing between Maltas using gt64120 & msc01
system controllers, the UART setup is modified slightly. A second UART
is added so that there is one pointing at the correct address for each
system controller. The Malta board then defines its own
default_serial_console function to select the correct one at runtime.
The incorrect UART will simply not function.
Tested on:
- A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both
with and without an L2 cache.
- QEMU.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
On a real Malta the Super I/O needs to be configured before we are able
to access the UARTs. This patch performs that configuration, setting up
the UARTs in the same way that YAMON would.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
This is in preparation for adapting this board to function correctly on
a physical MIPS Malta board. The board is moved into an "imgtec" vendor
directory at the same time in order to ready us for any other boards
supported by Imagination in the future.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
This patch simply #ifdef's out the C-specific parts of pci.h when it is
included by an assembly file. This will allow the macros it contains to
be used from assembly source as will be done in a followup commit adding
support for more modern MIPS Malta boards.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
On relatively slow boards (such as the MIPS Malta with an FPGA core
card) it can be extremely common for transmits to underflow - to the
point where it appears they simply do not work at all. Setting the
NOUFLO bit causes the ethernet controller to not begin transmission on
the wire until a transmit start point is reached. Setting that transmit
start point to the full packet will cause the controller to only
transmit the packet once it has buffered it entirely thus preventing any
transmit underflows from occuring and allowing the controller to
function on slower boards.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Ensure that the view of memory from the CPU & the ethernet controller is
coherent at the various points where they exchange data. This prevents
stale data from being transmitted or received, and prevents the driver
from getting stuck waiting for the ethernet controller to update
descriptors when in reality it has but the old values are being read
from cache.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fix up the code to match Documentation/CodingStyle. This is mostly
removing extraneous spaces.
No functional change is intended.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
For boards such as the MIPS Malta with an FPGA core card it is desirable
to be able to detect the L1 cache sizes at runtime, since they are not
dependant upon the board but on the FPGA bitstream in use. This patch
performs that detection when the CONFIG_SYS_[DI]CACHE_SIZE macros are
not defined by the board configuration. In cases where the sizes are
detected this patch also removes the restriction that the I-cache &
D-cache line sizes must be the same, as this is not necessarily true.
If the cache sizes are defined by a configuration then they will be
hardcoded as before, so this patch will not add overhead to such
boards.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
A weak annotation is needed in order to prevent link errors when
get_ticks is overridden. This fixes sandbox build.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Netconsole loses the second character when used as input by
either setenv stdin nc or setenv stdin serial,nc if using CONSOLE_CONSOLE_MUX
Before a nc_send_packet() to echo the input, a check is done to see if
nc_ether is valid. If its not, it waits for an arp request and then sends
the packet (which contains the first character of line to be displayed as
output). As part of reaping the arp request, the second character is consumed.
We protect this by making the call to NetLoop(NETCONS) between
input_recursion.
Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The env export command doesn't export the first variable of the list
since commit 5a31ea04c9
"env grep" - reimplement command using hexport_r()
Signed-off-by: Pierre Aubert <p.aubert@staubli.com>
As originally implemented, setting the AUTOBOOT_KEYED config option will
prevent users from breaking into the autoboot script with ctrl-c. Restore
that option with a new config symbol.
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Curently memcpy copies string without null terminating char because
function strlen returns only number of characters excluding
null terminating character. Replace memcpy with strcpy.
Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
CC: Tom Rini <trini@ti.com>
Linux Kernel abolished include/linux/config.h long time ago.
(around version v2.6.18..v2.6.19)
We don't need to provide Linux copatibility any more.
This commit deletes include/linux/config.h
and fixes source files not to include this.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
The gpt command was only implemented for mmc devices. There is no reason
why this command should not be generalized and be applied all other
storage device classes.
This change both simplifies the implementation and eliminates a
build failure for systems that don't support mmcs.
Signed-off-by: Egbert Eich <eich@suse.com>
Tested-by: Piotr Wilczek <p.wilczek@samsung.com>
[trini: Change coding style slightly]
Signed-off-by: Tom Rini <trini@ti.com>
This commit omits non-existing drivers/net/netarm_eth.c from the list.
This driver is deleted by commit b411eb30f.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
The following serial drivers do not exist any more.
- ns9750_serial.c: deleted by commit 4cfc611b4
- s3c4510b_uart.c: deleted by commit afad40299
- serial_clps7111.c: deleted by commit f2e080156
- serial_netarm.c: deleted by commit b411eb30f
This commit cleans up UDM-serial.txt.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Everytime a dead driver is removed from the list,
we must re-number. This is a painful task.
Try
git show e53232250 -- doc/driver-model/UDM-serial.txt
git show 6f62f4207 -- doc/driver-model/UDM-serial.txt
git show b9f4bc34a -- doc/driver-model/UDM-serial.txt
to see what I mean.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Nowhere pass a value to len, which always 0, make no transfer which
cause uploading failed.
This patch make nand upload working. However it needs enough malloc
buffer to store read data, that means the buffer at least equal to
the upload partition size, or else it doesn't work.
Signed-off-by: Bo Shen <voice.shen@atmel.com>
add the possibility to set the iSerialNumber board specific.
Default value for iSerialNumber is 0x0. This value can
changed board specific through the new function
g_dnl_set_serialnumber() which must be called from the
board specific function g_dnl_bind_fixup().
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
After dfu buffer is initialized, the buffer should be all available,
while not 0. Initialize its value to min(dfu_buf_size, dfu->r_left).
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Tested-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
submit_common_msg should report amount of data passed from/to device.
Instead, it always returned size requested by Host.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
This patch allows exiting from UMS mode to u-boot prompt
by detaching usb cable or by pressing ctrl+c.
Add new config: CONFIG_USB_CABLE_CHECK. If defined then board
file should provide function: usb_cable_connected() (include/usb.h)
that return 1 if cable is connected and 0 otherwise.
Changes v2:
- add a note to the README
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Marek Vasut <marex@denx.de>
UMS init was implemented in trats board file but mostly it comprises
common code. Due to that it has been moved to common/ums.c to avoid
code duplication in the future.
Changes:
- move ums initialization code from trats to common/ums.c
- remove unused CONFIG_USB_GADGET_MASS_STORAGE from trats.h
Changes v2:
- move this patch at the top of code cleanups patches
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Minkyu Kang <mk7.kang@samsung.com>
This patch prevents:
- ums disk capacity miscalculation because of integer overflow
Changes v2:
- Prevents passing zero size disk capacity to ums gadget driver
- Change function ums_get_capacity() to ums_disk_init() and do ums disk
initialization before gadget init
- Remove unnecessary code from mass storage driver
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Before this change ums command only allowed use of mmc 0.
Now this argument can be set.
Changes:
- remove mmc device number checking because it is always positive number
- remove printing "no such device" - it is done by find_mmc_device()
Change-Id: I767e45151ad515c7bef19e6c13087374f5e23c11
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Marek Vasut <marex@denx.de>
This patch introduces some cleanups to ums code. Changes:
ums common:
- introduce UMS_START_SECTOR and UMS_NUM_SECTORS as defined in
usb_mass_storage.h both default values as 0 if board config
doesn't define them
common cleanup changes:
- change name of struct "ums_board_info" to "ums"
- "ums_device" fields are moved to struct ums and "dev_num" is removed
- change function name: board_ums_init to ums_init
- remove "extern" prefixes from usb_mass_storage.h
cmd_usb_mass_storage:
- change error() to printf() if need to print info message
- change return values to command_ret_t type at ums command code
- add command usage string
Changes v2:
ums common:
- always returns number of read/write sectors
- coding style clean-up
ums gadget:
- calculate amount of read/write from device returned value.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
There is no CONFIG_PCA953X_INFO symbol.
U-Boot uses CONFIG_CMD_PCA953X_INFO instead, which is described in
"Monitor Functions" section and thus no need to be repeated in the
"GPIO Support" section.
Remove the whole line.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
In commit "5c427e4: use BOOTM_STATE_OS_CMDLINE flag for plain bootm"
and "3d187b3: Only pass BOOTM_STATE_OS_CMDLINE on PowerPC/MIPS",
BOOTM_STATE_OS_CMDLINE was added to do_bootm for PowerPC and MIPS. This
breaks other OSes (vxworks, netbsd, plan9,...) that don't support
subcommand processing, e.g. they all contain the following code in their
do_bootm_xxx():
if (flag & BOOTM_STATE_OS_PREP)
return 0;
if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
return 1;
which will result a "subcommand not supported" error.
This patch changes the above logic to:
/* if not go command, pretend everything to be OK */
if (flag != BOOTM_STATE_OS_GO)
return 0;
Signed-off-by: Miao Yan <miao.yan@windriver.com>
In-tree build:
- Do not create a symbolic link
from include/asm to arch/${ARCH}/include/asm
- Add ${SRCTREE}/arch/arm/include into the header search path
Out-of-tree build:
- Do not create a directory ${OBJTREE}/include2
- Do not create a symbolic link
from ${OBJTREE}/include2/asm to ${SRCTREE}/arch/${ARCH}/include/asm
- Add ${SRCTREE}/arch/arm/include into the header search path
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Remove 'HEAD' line which is most likely left there while rebasing. It was
introduced in commit 877bfe37dc.
Signed-off-by: Luka Perkov <luka@openwrt.org>
Commit 93e14596 "Coding Style cleanup: replace leading SPACEs by TABs"
added trailing whitespace to a single line of boards.cfg. I presume this
was unintentional, and it causes the file to change after running it
through the reformat.py script. Remove the offending character.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
env exists is a way to test (in hush) if an environment variable
exists. A workaround existed using printenv but this new command
doesn't require all the stdout/stderr redirection to prevent
printing information to the screen.
Example:
$ set testexists 1
$ env exists testexists && echo "yes"
yes
$ env exists testexists || echo "no"
$ set testexists
$ env exists testexists && echo "yes"
$ env exists testexists || echo "no"
no
$
Signed-off-by: Andrew Ruder <andrew.ruder@elecsyscorp.com>
We expect boards_by_* function to return the 7th filed, 'Target',
not the 6th field, 'Board name'.
So the function names, boards_by_* are a little misleading,
and should be renamed to targets_by_*.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Commit 27af930e changed the boards.cfg format
and it changed boards_by_field() function incorrectly.
For tegra cpus it returned Board Name field,
not Target field.
This commit restores the behavior prior to 27af930e in the right way.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Commit 27af930e changed the boards.cfg format but
missed to change get_target_arch() fuction.
This commit adjusts it for CROSS_COMPILE_<ARCH>
to work correctly.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
If you do `./MAKEALL -M ` or `./MAKEALL -m`
GNU awk would display warnings like follows:
awk: warning: escape sequence `\ ' treated as plain ` '
In the first place, we do not explicitly set the field separator.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
arch/sparc/cpu/leon3/start.S requires CONFIG_SYS_SPARC_NWINDOES
to be defined:
#ifndef CONFIG_SYS_SPARC_NWINDOWS
#error Must define number of SPARC register windows, default is 8
#endif
But it missed to include <config.h>, which always ended up in compile error.
This commit fixes this problem.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Daniel Hellstrom <daniel@gaisler.com>
Commit 1b0757e deleted the EP88x entry from boards.cfg file.
But it missed to remove include/configs/EP88x.h and board/ep88x/.
This commit removes them and adds EP88x to README.scrapyard.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Some tabs have been replaced with spaces
because doc/README.scrapyard is consistently using spaces.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
The malloc space is to small to boot, the current uboot 2013.10-rcX,
This will fix the startup problems by increasing the mallog space to 4MiB.
Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
TZ_DDR_RAM on reset is in secure mode.
Since uboot and linux runs in full
TZ privilege secure mode, no need
to set DDR trustzone to non-secure.
Signed-off-by: Radhey Shyam Pandey <radheys@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
In case where ps-ddr is not used, do not remap
OCM to high address and keep it from 0x0.
Linux SMP requires to have memory at 0x0.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Here is the set of command which has been performed
to proof this feature.
gzip < fpga.bin > fpga.bin.gz
mkimage -A arm -O u-boot -T firmware -C gzip \
-a 20000000 -n "zc702_fpga_bin" -d fpga.bin.gz fpga.bin.gz.ub
tftp 100000 fpga.bin.gz.ub
fpga loadmk 0 100000
This flow should speedup loading bitstream data
from external memory and save image footprint in non volatile
memory.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
DMA doesn't work when src is placed below 1MB limit.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Since more functions are enabled, the eb_cpux9k2_ram target does not boot.
This patch changed the TEXT_BASE, that the code fits between TEXT_BASE and ram end.
Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Get rid of too many ifdeffery in usb ohci driver
Add following two configuration for USB clock selecting
- CONFIG_USB_ATMEL_CLK_SEL_PLLB: using PLLB as usb ohci input clock
- CONFIG_USB_ATMEL_CLK_SEL_UPLL: using UPLL as usb ohci input clock
Signed-off-by: Bo Shen <voice.shen@atmel.com>
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
pxelinux and syslinux differ in their handling of absolute paths in menu
files. A pxelinux path is aways prepended with the bootfile path while
syslinux allows for absolute paths. u-boot was always treating a leading
/ as an absolute path breaking some pxelinux setups. Fix this by adding
a flag to distinguish pxelinux vs. syslinux behavior.
Reported-by: Ian Campbell <Ian.Campbell@citrix.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Convert sh to use the commmon timer code. Remove reset_timer and
set_timer as they are unused on sh.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Many platforms duplicate pretty much the same timer code yet they all have
a 32-bit freerunning counter register. Create a common implementation that
minimally requires 2 or 3 defines to add timer support:
CONFIG_SYS_TIMER_RATE - Clock rate of the timer counter
CONFIG_SYS_TIMER_COUNTER - Address of 32-bit counter
CONFIG_SYS_TIMER_COUNTS_DOWN - Define if counter counts down
All functions are weak or ifdef'ed so they can still be overriden by any
platform.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
The definitions for CONFIG_SYS_PROMPT are varied with little reason other
than to display the board name. Over half the definitions are "==> ", so
make this the default. The rest of the boards remain unchanged to avoid
breaking any external scripts expecting a certain prompt.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com>
Wandboard quad was not ported into U-boot at the time of writing the README.
Add it to the list of Wandboard variants.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
This reverts commit 178b8e15ad.
Patch was merged too fast, without checking that another patch
is fixing the reported issue globally - reverted.
Signed-off--by: Stefano Babic <sbabic@denx.de>
The gpio register mappings are different among blackfin processors.
Signed-off-by: Steven Miao <realmz6@gmail.com>
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
rdaddr was missing which is a common location for loading ramdisks to.
loadaddr was higher than it needs to be, so use the same value other TI
platforms use.
Signed-off-by: Tom Rini <trini@ti.com>
The change from 0x64656465 to 0x64646464 is to remove the weak pull
enabled on DQS, nDQS lines. This pulls the differential signals in the
same direction which is not intended. So disabling the weak pulls improves
signal integrity.
On the uEVM there are 4 DDR3 devices. The VREF for 2 of the devices is powered by
the OMAP's VREF_CA_OUT pins. The VREF on the other 2 devices is powered by the OMAP's
VREF_DQ_OUT pins. So the net effect here is that only half of the DDR3 devices were being
supplied a VREF! This was clearly a mistake. The second change improves the robustness of
the interface and was specifically seen to cure corruption observed at high temperatures
on some boards.
With the above two changes better memory stability was observed with extended
temperature ranges around 100C.
Signed-off-by: Sricharan R <r.sricharan@ti.com>
Current predefines do not fit cm-t3730 very well (some of them produce
artifacts in the image).
Update LCD predefines to accommodate both cm-t35 and cm-t3730 modules.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Current default bootdelay of 10 seconds is too long.
Reduce default bootdelay to 3 seconds.
Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il>
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
UART booting is supported on this SoC, but via UART3 rather than UART1.
Because of this we must change the board to use UART3 for all console
access (only one UART is exposed on this board and a slight HW mod is
required to switch UARTs).
Signed-off-by: Minal Shah <minal.shah@ti.com>
[trini: Make apply to mainline, reword commit]
Signed-off-by: Tom Rini <trini@ti.com>
With changes to increase the size of the device tree (required to move
more data out of the kernel and into DT), loading the args at the old
address leads to us overwriting things later on. To correct this, load
the args file to where we load the device tree anyhow. This is also
safe for non-DT booting as in either case we use r2 to pass in the
location of things.
Signed-off-by: Tom Rini <trini@ti.com>
Compulab OMAP3 boards use the same display initialization code.
Move the display initialization code to live under board/compulab/common
directory.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
Compulab boards use the same eeprom code, so move the eeprom related
code to live under board/compulab/common directory.
Also make several adjustments to eeprom functions namespace, so it will
be generic for compulab boards.
Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
Tested-by: Nikita Kiryanov <nikita@compulab.co.il>
Increase the tested memory region for mtest and define
CONFIG_SYS_MEMTEST_SCRATCH for CONFIG_SYS_ALT_MEMTEST
Signed-off-by: Thomas Weber <thomas.weber@corscience.de>
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
The new tricordereeprom command can read and write the eeprom for hardware
detection on tricorder devices.
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
Before we always ran 'mtdparts default' which also set the mtdparts and mtdids
environment. But if we changed that values by intention we will overwrite
them with our default values. This is obviously bad!
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
The 'flashcard' u-boot configuration has a readonly environment and boots a
bare kernel/initrd to program the device from an clean environment.
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
The new flash layout respects posible bad blocks in sectors reserved for e.g.
SPL, u-boot, kernel, env a.s.o.
Additionally this patch prepares for U-Boot Falcon mode for boot time saving.
Signed-off-by: Andreas Bießmann <andreas.biessmann@corscience.de>
- switch to correct ecc layout used by the RBL
enable CONFIG_NAND_6BYTES_OOB_FREE_10BYTES_ECC
- update default environment
- change A2CR to correct value for UART boot mode
- adapt cs3cfg timings for nand
- change LED bootmode signalization
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
There seems to be a naming convention for the configuration
files for boards using the same SoC family. This makes
easier to do changes that affect different boards based
on the same SoC.
Since the IGEPv2 board and the IGEP COM Module use a TI
OMAP35xx/DM37xx processor, is better to rename its board
config to use this naming scheme.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
There seems to be a naming convention for the configuration
files for boards using the same SoC family. This makes
easier to do changes that affect different boards based
on the same SoC.
Since the IGEP COM AQUILA use a TI AM335x processor is better
to rename its board config to use this naming scheme.
Signed-off-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Acked-by: Enric Balletbo i Serra <eballetbo@iseebcn.com>
Enable the bootcount driver for am335x in general. We leave adding a
bootlimit and altbootcmd to the environment to the board ports.
Signed-off-by: Tom Rini <trini@ti.com>
The RTC IP block here provides 3 scratch registers. Currently when
using DeepSleep on am335x the scratch0/1 registers are used so moving
ourself to scratch2 makes cooperation easier.
Signed-off-by: Tom Rini <trini@ti.com>
We have converted all makefiles needed to build $(LIBS).
Until this commit we used to grep switch so that U-Boot style
and Kbuild style makefiles coexist.
But we do not need any more.
Goint forward, use always Kbuild style Makefile when adding
a new Makefile
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Before this commit, arch/sparc/lib/Makefile used
both COBJS and COBJS-y.
And it missed to add COBJS-y into OBJS.
This means bootm.o was never compiled even if
CONFIG_CMD_BOOTM=y
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Daniel Hellstrom <daniel@gaisler.com>
This patch moves S5PC, EXYNOS specific directory entries
from the toplevel Makefile to arch/arm/cpu/armv7/Makefile
using Kbuild descending feature.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
This patch moves OMAP specific directory entries
from the toplevel Makefile and spl/Makefile
to arch/arm/cpu/armv7/Makefile using Kbuild descending feature.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Rini <trini@ti.com>
This patch moves Tegra specific directory entries
from the toplevel Makefile and spl/Makefile
to arch/arm/cpu/*/Makefile using Kbuild descending feature.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Tom Warren <TWarren@nvidia.com>
This commit moves some subdirectories of fs
from the toplevel Makefile to fs/Makefile
using Kbuild descending feature.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit moves some drivers subdirectory entry
from the toplevel Makefile to drivers/Makefile
using Kbuild descending feature.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
This patch tweaks scripts/Makefile.build to allow
the build system to descend into subdirectories like Kbuild.
To use this feature, use "obj-y += foo/" syntax.
Example:
obj-$(CONFIG_FOO) += foo/
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Note:
arch/powerpc/cpu/mpc8260/Makefile is originally like follows:
---<snip>---
START = start.o kgdb.o
COBJS = traps.o serial_smc.o serial_scc.o cpu.o cpu_init.o speed.o \
---<snip>---
COBJS-$(CONFIG_ETHER_ON_SCC) = ether_scc.o
---<snip>---
$(LIB): $(OBJS)
$(call cmd_link_o_target, $(OBJS) $(obj)kgdb.o)
The link rule `$(call cmd_link_o_target, $(OBJS) $(obj)kgdb.o)'
is weird.
kbdg.o is not included in $(OBJS) but linked into $(LIB)
and $(LIB) is not dependent on kgdb.o.
(Broken dependency tracking)
So,
START = start.o kgdb.o
shoud have been
START = start.o
SOBJS = kgdb.o
That is why this commit adds kgdb.o to obj-y, not to extra-y.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Stefan Roese <sr@denx.de>
Multiple targets are included in arch/arm/imx-common/Makefile
In order to refactor it,
we need to tweak Makefile and spl/Makefile.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
There is no real benefit in adding the board name into U-boot's prompt.
Use the simple "=> " prompt across FSL boards.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
The 6x_upgrade script is used to upgrade U-Boot in SPI-NOR
on Nitrogen6x/SABRE Lite boards using U-Boot's 'sf' command.
U-Boot is placed at offset 0x400 in flash, and the script
currently only erases 0x50000 bytes. Since the current
head is 319k, any additional features enabled in the
configuration will exceed the space erased and cause errors
re-programming the device.
This patch increases the erase size to the full size of
the region allocated for the U-Boot binary.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
The BG0900 module has 2Gbit DRAM module on it, adjust the DataBahn
DRAM controller registers so the DRAM module will be correctly
recognised.
Signed-off-by: Christoph G. Baumann <c.baumann@ppc-ag.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
In case the board detected sufficient voltage for battery boot,
make sure the DCDC converter is ON and the board is not running
only from linregs, otherwise an instability will be observed.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
This removes the PAD_CTL_DSE_120ohm as done for i.MX6Q's IPU1_DI0_PIN4
pin definition and makes it aligned with 3.0.35-4.1.0 and 3.12
mainline kernel.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Currently the driver clears WCR_SRS bit when enabling
the watchdog and this causes a software reset. Do not
clear WCR_SRS.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Note1:
In arch/arm/cpu/arm926ejs/spear/Makefile
START := start.o
was changed
extra-$(CONFIG_SPL_BUILD) := start.o
because spear/start.o is only used for SPL.
Note2:
START := start.o
was missing from arch/arm/cpu/arm926ejs/mxs/Makefile.
This commit simply adds
extra-$(CONFIG_SPL_BUILD) := start.o
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Every makefile in sub directories has common lines
at the top and the bottom.
This commit pushes the common parts into script/Makefile.build.
Going forward sub-makefiles only need to describe this part:
COBJS := ...
COBJS += ...
SOBJS := ...
But using obj-y is preferable to prepare for switching to Kbuild.
The conventional (non-Kbuild) Makefile style is still supported.
This is achieved by greping the Makefile before entering into it.
U-Boot conventional sub makefiles always include some other makefiles.
So the build system searches a line beginning with "include" keyword
in the makefile in order to distinguish which style it is.
If the Makefile include a "include" line, we assume it is a conventional
U-Boot style. Otherwise, it is treated as a Kbuild-style makefile.
With this tweak, we can switch sub-makefiles
from U-Boot style to Kbuild style little by little.
obj-y := foo/
syntax (descending into the sub directory) is not supportd yet.
It will be implemented in the upcomming commit.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@ti.com>
Prior to SPDX licensing this file was GPL-2.0 with Freescale granting
rights for "or later" for their contributed code. We incorrectly moved
this file to GPL-2.0+, so correct it to GPL-2.0. In addition we cannot
easily denote in the file where or what code is "or later", so just set
that aside for now and the file as a whole is GPL-2.0 regardless.
Cc: Scott Wood <scottwood@freescale.com>
Signed-off-by: Tom Rini <trini@ti.com>
struct mmc should be clear to all '0' after malloc to avoid
unexpect variable value.
Like mmc->has_init = xxx.
In this case mmcinfo will believe the card had been initialized before
and skip the initialization.
Test on P5040 and T4240,
Error Log:
=> mmcinfo
Device: FSL_SDHC
Manufacturer ID: 0
OEM: 0
Name: Tran Speed: 0
Rd Block Len: 0
MMC version 0.0
High Capacity: No
Capacity: 0 Bytes
Bus Width: 0-bit
=>
Signed-off-by: Haijun Zhang <Haijun.Zhang@freescale.com>
Signed-off-by: Xie Shaohui-B21989 <B21989@freescale.com>
Tested-by: Ryan Barnett <rjbarnet@rockwellcollins.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
eSDHC host controller has new register to support SD Spec 3.0.
And the according host controller version was Freescale eSDHC
Version 3.0.
Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
Old command timeout value was too small and it caused I/O errors which
led to uncompleted read/write/erase operations and filesystem errors.
Timeout adaptation fixes this issue.
Changes in sdhci_send_command() function:
- change timeout variable to static
- increase default command timeout to 100 ms
- add definition of max command timeout value,
which can be redefined in each board config file
- wait for card ready state for max defined time
if it doesn't exceed defined maximum or return COMM_ERR
Once successfully increased timeout value will be used in next function
call. This fix was tested on Goni, Trats, Trats2 boards by testing UMS
on MMC storage.
Changes v2:
- move global variable cmd_timeout into function sdhci_send_command()
- change condition "==" to ">=" when comparing time with timeout
- print information about timeout increasing and card busy timeout
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
To prevent the confusion, use the get_mmc_clk() instead of mmc_clk().
get_mmc_clk() is more exactly name.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
EXT_CSD_ERASE_GROUP_DEF is lost every time after a reset or
power off. Set it if device has enhanced partitions.
Signed-off-by: Oliver Metz <oliver@freetz.org>
Acked-by: Pantelis Antoniou <panto@antoniou-consulting.com>
write first the "tag" 8 bit value and then the "val" 8-bit
to the display.
Tested on the rut board.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
make CONSOLE_BG_COL/CONSOLE_FG_COL configurable through board config file.
Clear video screen in video_init().
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Currently the HDMI splash screen image quality on mx6solo does not show a
very stable image.
By comparing the IPU driver from U-boot with the one from FSL 4.1.0 BSP,
we can see that there is an inverted logic for setting the DI_GEN_POL_CLK bit.
>From FSL BSP [1] we have:
if (!sig.clk_pol)
di_gen |= DI_GEN_POLARITY_DISP_CLK;
Applying the same logic into U-boot fixes the HDMI image stability.
[1] git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/drivers/mxc/ipu3/ipu_disp.c?h=imx_3.0.35_4.1.0
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
This patch introduces the support for Keymile's kmp204x reference
design. This design is based on Freescale's P2040/P2041 SoC.
The peripherals used by this design are:
- DDR3 RAM with SPD support
- SPI NOR Flash as boot medium
- NAND Flash
- 2 PCIe busses (hosts 1 and 3)
- 3 FMAN Ethernet devices (FMAN1 DTSEC1/2/5)
- 3 Local Bus windows, with one dedicated to the QRIO reset/power mgmt
FPGA
- 2 HW I2C busses
- last but not least, the mandatory serial port
The board/keymile/kmp204x code is mostly based on Freescale's P2041rdb
support and was changed according to our design (that means essentially
removing what is not present on the designs and a few adaptations).
There is currently only one prototype board that is based on this design
and this patch also introduces it. The board is called kmlion1.
Signed-off-by: Stefan Bigler <stefan.bigler@keymile.com>
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
kmp204x: update the ENV #define
The comments had to be refined as well as the total size
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
[York Sun: fix ddr.c]
Acked-by: York Sun <yorksun@freescale.com>
This allows to share some common code for the boards that use a corenet
base SoC.
Two different versions of the function are available in
fsl_corenet_serdes.c and fsl_corenet2_serdes.c files.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
[York Sun: fix t1040qds.c]
Acked-by: York Sun <yorksun@freescale.com>
This can be useful if one wants to disable an interface in u-boot
because u-boot should not manage it but then later reenable it for FDT
fixing or if the kernel uses this interface.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
[York Sun: fix conflict in fm_eth.h]
Acked-by: York Sun <yorksun@freescale.com>
If the DDR3 module supports industrial temperature range and requires
the x2 refresh rate for that temp range, the refresh period must be
3.9us instead of 7.8 us.
This was successfuly tested on kmp204x board with some MT41K128M16 DDR3
RAM chips (no module used, chips directly soldered on board with an SPD
EEPROM).
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
[York Sun: fix minor conflicts in fsl_ddr_dimm_params.h,
lc_common_dimm_params.c, common_timing_params.h]
Acked-by: York Sun <yorksun@freescale.com>
This must be defined by a board support file that want to use the
keymile common.c board_eth_init function that requires ethernet_present
to be defined.
Currently all the km architectures use it but the kmp204x architecture
later supported in this series does use another board_eth_init function
and thus does not define it.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
This must be defined for all the keymile boards that use the common
i2c_abort function that is used to "reset" the I2C bus. These are
currently km82xx and km_arm boards.
The km83xx boards use other functions and thus do not need this.
This patch removes the CONFIG_SYS_I2C_INIT_BOARD from keymile-common.h
and defines it for km_arm.h and km82xx.h.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
The ip kernel parameter had a typo in it (we've been lucky that it has
worked until now).
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
It must be set to a different value for the later add kmp204x
architecture, because we are restricted to 1MB SRAM.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
When exporting the new memsize without reserved PRAM area, the -Wformat
option produces a warning since %ld is used for snprintf and bi_memsize
is phys_size_t.
This patch removes this warning for all PRAM PowerPC boards.
Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Introduce different macros for storing addresses of multiple
USB controllers. This is required for successful initialization
and usage of multiple USB controllers inside u-boot
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
CONFIG_USB_MAX_CONTROLLER_COUNT macro recently defined for
initializing all USB controllers on a given platform. This
macro is defined for all 85xx socs
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
c29xpcie REV_A board DDR ECC chip has bad impedance in hardware,
force that kind of board to be DDR ECC off when booting.
Other version board config ECC on/off by hwconfig=fsl_ddr:ecc=on
in uboot enviroment.
Signed-off-by: Po Liu <Po.Liu@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>
commit bba679144d
"usb: rename board_usb_init_type to usb_init_type" missed xhci-omap.c
So, fix that patch here, and fix a checkpatch warning.
WARNING: Avoid unnecessary line continuations
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
This changes clock definition of SCIF from CONFIG_SYS_CLK_FREQ to
CONFIG_SH_SCIF_CLK_FREQ, and clock definition of TMU from CONFIG_SYS_CLK_FREQ to
CONFIG_SH_TMU_CLK_FREQ,
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
Move defines only needed by mv_udc.c to a file
in the same directory.
This allows usbtty to compile for mv_udc,
but it still doesn't link.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Only perform one copy, either in the bounce
routine for IN transfers, or the debounce
rtn for OUT transfer.
On out transfers, only copy the number
of bytes received from the bounce buffer
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Previously, only host1 was supported using an index of 0.
Now, otg has index 0, host1 is 1, host2 is 2, host3 is 3.
Since OTG requires usbmode to be set after reset, I added
CONFIG_EHCI_HCD_INIT_AFTER_RESET to nitrogen6x.h and
mx6qsabreauto.h.
I also added a weak function board_ehci_power to handle
turning power on/off for otg.
Type is type of device connected (USB stick vs Host.)
Init is type of device desired.
Only power up port if type == init == USB_INIT_HOST.
Only return error if type != init.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
i.mx6 has 1 otg controller, and 3 host ports. So,
CONFIG_USB_MAX_CONTROLLER_COUNT can be greater than 1
even though only 1 device mode controller is supported.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
This will be used by usb_lowlevel_init so it will
no longer be used by only board specific functions.
Move definition of enum usb_init_type higher in file
so that it will be available for usb_low_level_init.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Move the MAC creation from the USB init to an function
that is called on every boot. This will then populate the
usbethaddr mac that kernel driver can pick up from the
device tree blob.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Add the support for the am437x xhci usb host.
The xHCI host on AM437 is connected to a usb2 phy so need to
add support to enable those clocks.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Add the support for the dra7xx xhci usb host.
dra7xx does not contain an EHCI controller so the headers
can be removed from the board file.
The xHCI host on dra7xx is connected to a usb2 phy so need to
add support to enable those clocks.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Moving the usb/phy code from xhci-omap to the usb/phy directory
and moving the associated phy code over to the new file.
Newer TI processors adding xHCI support will have different PHY configurations
so therefore abstracting this code away will prevent messing around with the
xhci-omap file itself.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Recent patches declares board_usb_init function prototype for a new
usb architecture.
Turning on the OMAP_XHCI defines cause a redefinition compiler failure.
So update the board_usb_init to the latest prototype.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
A set of environment variables needs to be updated to provide support for
TIZEN download command (tizendown).
Since DFU is used as a flashing backend, it is also necessary to extent
malloc pool size for DFU buffer allocation.
Moreover, for compatibility reasons (Win vs. Lin) new USB idProduct number
for download gadget had to be added.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Special, common to Samsung, function for altering usb descriptor's
idVendor and idProduct has been added.
For compatibility reasons (Win vs Linux) the THOR idProduct must be
different than the one for DFU/UMS.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
New command - thordown - has been added to support downloading data
via lthor TIZEN program.
It is similar to dfu command syntax and reuses its code for flashing data.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Implementation of USB download function which supports THOR protocol.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
New parameter, namely *name has been added to g_dnl_bind_fixup().
It is necessary (for compatibility reasons) to assign new USB idProduct
and idVendor for different usb functions.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
When the usb_configuration structure is declared as static, it is very
hard to assure, that relevant fields (as e.g. config->interfaces[]) are
cleared out before new call to g_dnl related functions.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Define the dfu_get_buf() and dfu_free_buf() as global functions.
They are necessary for zero copy buffer management, when DFU backend is
used for storing data.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
New function - dfu_get_alt() - has been added to dfu core. If present, it
returns alt setting's number corresponding to passed name.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
The s3c udc driver sends data in a max packet size. Therefore the dcache
invalidate range shall be equal to max packet, not the entire
DMA_BUFFER_SIZE.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
This commit unifies board-specific USB initialization implementations
under one symbol (usb_board_init), declaration of which is available in
usb.h.
New API allows selective initialization of USB controllers whenever needed.
Signed-off-by: Mateusz Zalega <m.zalega@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Make sure the transfer descriptor is flushed
before the queue is updated so that the controller
will not see old information.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
This prevents a crash if tftpboot is given a bad filename.
rx_req will be released by eth_reset_config
which is called by eth_disconnect,
which is called using the .disconnect member of usb_gadget_driver by mv_pullup in mv_udc
which is called using the .pullup member of usb_gadget_ops by usb_gadget_disconnect
which is called by usb_eth_halt
which is called using the .halt member of eth_device by eth_halt
which is called by TftpHandler when TFTP_ERR_FILE_NOT_FOUND or TFTP_ERR_ACCESS_DENIED occurs
I trigger this with the following commands
setenv ipaddr 10.0.0.2 && setenv netmask 255.255.255.0 && setenv serverip 10.0.0.1
setenv usbnet_devaddr 00:11:22:33:44:55 && setenv usbnet_hostaddr 00:aa:bb:cc:dd:ee
setenv ethprime usb_ether && setenv ethact usb_ether && setenv ncip 10.0.0.1
tftpboot 10800000 10.0.0.1:missing_file
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
set wMaxPacketSize for full speed descriptors
fs_source_desc, fs_sink_desc to 64.
Full-speed bulk endpoint can have a maximum packet size of
8, 16, 32, or 64 bytes, so choice 64.
The hs_source_desc, hs_sink_desc, already have their wMaxPacketSize
set to 512. That is the only legal value for high speed bulk endpoints.
Strictly speaking, this patch is not needed because
usb_ep_autoconfig will call ep_matches which will
override wMaxPacketSize for BULK endpoints only with
the size associated with the endpoint setup by the udc driver.
But if you want to rely on this, you may as well combine the
full speed descriptor with the high speed descriptor to
minimize confusion.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Add the OMAP file for the xHCI Host controller
This code will initilialize the proper components within the
OMAP5 to enable the xHCI host controller.
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Add new functionality to turn on SMPS10 regulator.
This supplies the VBUS to devices connected to the
USB host ports
Signed-off-by: Dan Murphy <dmurphy@ti.com>
This patch adds a new samsung,vbus-gpio parameter to the device tree, in
preparation of replacing the currently hardcoded VBUS GPIO mechanism in
exynos5-dt.c with a device tree controlled solution, just as it already
exists in the Linux kernel.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Some Exynos boards, such as the SMDK5250, control USB port power through
a GPIO pin. For now this had been hardcoded in the exynos5-dt board
file, but not all boards use the same pin, requiring local changes to
support different boards.
This patch moves the GPIO initialization into the USB host controller
drivers which they belong to, and uses the samsung,vbus-gpio parameter
in the device tree to configure it.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Marek Vasut <marex@denx.de>
This enables support for xHCI host controller on Exynos5
and further disables EHCI support, to make sure only one
host controller is enabled at a time, since right now
using two controllers at a time is not possible with
current usb core infrastructure.
Anyone who wants to enable EHCI support again needs to
enable CONFIG_USB_EHCI, CONFIG_USB_EHCI_EXYNOS once again
in exynos5-dt config.
Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dan Murphy <dmurphy@ti.com>
Cc: Marek Vasut <marex@denx.de>
This adds stack layer for eXtensible Host Controller Interface
which facilitates use of USB 3.0 in host mode.
Adapting xHCI host controller driver in linux-kernel
by Sarah Sharp to needs in u-boot.
Initial porting from Linux kernel version 3.4, with following
top commit history of drivers/usb/host/xhci* :
cf84055 xHCI: Cleanup isoc transfer ring when TD length mismatch found
This adds the basic xHCI host controller driver with bare minimum
features:
- Control/Bulk transfer support has been added with required
infrastructure for necessary xHC data structures.
- Stream protocol hasn't been supported yet.
- No support for quirky devices has been added.
Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: Julius Werner <jwerner@chromium.org>
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dan Murphy <dmurphy@ti.com>
Cc: Marek Vasut <marex@denx.de>
Macros defining bmRequestType field of USB device request,
given in table 9.2 USB 2.0 spec, are rather generic macros
which can be further used by other Host controller stacks.
So moving them to usb_defs header.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Cc: Julius Werner <jwerner@chromium.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Dan Murphy <dmurphy@ti.com>
Cc: Marek Vasut <marex@denx.de>
In case the MX23/MX28 is switched into JTAG mode via the BootMode select
switches, the BootROM bypasses the CPU core registers initialization.
This in turn means that the Stack Pointer (SP) register is not set as
it is in every other mode of operation, but instead is only zeroed out.
To prevent U-Boot SPL from crashing in this obscure JTAG mode, configure
the SP to point at the CONFIG_SYS_INIT_SP_ADDR if the SP is zeroed out.
Note that in case the SP is already configured, we must preserve that exact
SP value and must not modify it. This is important since in every other mode
but the JTAG mode, the SPL returns into the BootROM and BootROM in turn loads
U-Boot itself. If the SP were to be corrupted, the BootROM won't be able to
continue it's operation after returned from SPL and the system would crash.
Finally, add the JTAG mode switch identifier, so it's not recognised as
Unknown mode.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Add basic support for mx6q udoo board.
For further information about Udoo board:
http://www.udoo.org/
Tested booting a mainline device tree kernel and a Yocto rootfs from mmc.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Now that mkimage can generate an BootStream for i.MX23 and i.MX28,
use the mkimage as a default tool to generate the BootStreams instead
of the elftosb tool. This cuts out another obscure dependency.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Cc: Stefano Babic <sbabic@denx.de>
Remove Prodrive pdnb3 board (including the scpu variant) support
from mainline. As its unmaintained and not needed any more for
quite some time.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Martijn de Gouw <martijn.de.gouw@prodrive.nl>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Zynq lowlevel_init() was implemented in C but stack
pointer is setup after function call in _main().
Move architecture setup to arch_cpu_init() which is call
as the first function in board_init_f() which
already have correct stack pointer.
Reported-by: Sven Schwermer <sven.schwermer@tuhh.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The prototype of handlers had changed.
This commit uses cast with (void *) rather than
the handler-specific prototype.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Add support for hsi2c controller available on exynos5420.
Note: driver currently supports only fast speed mode 100kbps
Change-Id: I02555b1dc8f4ac21c50aa5158179768563c92f43
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Signed-off-by: R. Chandrasekar <rc.sekar@samsung.com>
At present the i2c ports are enumerated in a strange way - the
fdtdec_find_aliases_for_id() function is used, but then the ID returned
is ignored and the ports are renumbered. The effect is the same provided
that the device tree has the ports in the same order, or uses aliases,
and has no gaps, but it is not correct.
Adjust the code to use the function as intended. This will allows device
tree aliases to change the device order if required.
As a result, the i2c_busses variable is dropped. We can't be sure that
there are no 'holes' in the list of buses, so must check the whole
array.
Note: it seems that non-FDT operation is now broken in this drive and
will need to be reinstated for upstream.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/59369
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
The Exynos5 i2c driver does not handle NACKs properly. This change:
- fixes the NACK processing problem (do not continue transaction if
address cycle was NACKed)
- eliminates a fair amount of duplicate code
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-by: Simon Glass <sjg@google.com>
Signed-off-by: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
NoMMU systems have a access violation problem with i2c_reloc_fixup.
Blame for it is a double relocation of the adapter itself. The
i2c_adap_p is already relocated, if i2c_reloc_fixup is called.
This patch removes the relocation of i2c_adap_p from i2c_reloc_fixup
to fix this.
Signed-off-by: Jens Scharsig (BuS Elektronik) <esw@bus-elektronik.de>
If user uses the I2C in before the relocation, board of sh and rmobile
will not start. This will solve this problem.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
check first, if we are on the bus, we want to enable. If so,
return immediately, do not calc max adapter number, nor check
other things.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
On generic board, the i2c init initialize only
one bus. But the new i2c subsystem allow to
manage severals i2c bus. So in the case, instead
of initializing a bus, we just set the current
i2c bus. The initialization will be done in
the i2c command.
Signed-off-by: Philippe Reynes <tremyfr@yahoo.fr>
This changes clock definition of SCIF from CONFIG_SYS_CLK_FREQ to
CONFIG_SH_SCIF_CLK_FREQ, and clock definition of TMU from CONFIG_SYS_CLK_FREQ to
CONFIG_SH_TMU_CLK_FREQ for boards.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
The former SH/SCIF driver had calculated baudrate based on CONFIG_SYS_CLK_FREQ.
The newest SH/SCIF needs calculation of the clock for SCIF.
This patch defines clock CONFIG_SH_SCIF_CLK_FREQ for SCIF and changes it to
CONFIG_SH_SCIF_CLK_FREQ from CONFIG_SYS_CLK_FREQ.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
CC: Albert Aribaud <albert.u.boot@aribaud.net>
The former SH/TMU driver had calculated timer based on CONFIG_SYS_CLK_FREQ.
The newest SH/TMU newly needs calculation of the clock for TMU.
This patch defines clock CONFIG_SH_TMU_CLK_FREQ for TMU and changes it to
CONFIG_SH_TMU_CLK_FREQ from CONFIG_SYS_CLK_FREQ.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
A chache API of SH is developped by reference in linux kernel.
And API was the same as the linux kernel.
This patch change cache API to defines as U-Boot.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
"static u16 bit" is not necessary to use this as static global variable.
This patch fixes this.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
timer_init function sets timer prescaler bit.
The previous code so did not mask this bit, this function was to overwrite
the bit. This will fix this problem.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Previously, the address of a requested capability is define like that
"#define PCI_DCR 0x78"
But, the addresses of capabilities is different with regard to PCIe revs.
So this method is not flexible.
Now a function to get the address of a requested capability is added and used.
It can get the address dynamically by capability ID.
The step of this function:
1. Read Status register in PCIe configuration space to confirm that
Capabilities List is valid.
2. Find the address of Capabilities Pointer Register.
3. Find the address of requested capability from the first capability.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
Erratum A006379 says CPCHDBCR0 bit field [10:14] has incorrect default
value after POR. The workaround is to set this field before enabling
CPC to 0x1e.
Erratum A006379 applies to
T4240 rev 1.0
B4860 rev 1.0, 2.0
Signed-off-by: York Sun <yorksun@freescale.com>
- Rename old P1010RDB board as P1010RDB-PA.
- Add support for new P1010RDB-PB board.
- Some optimization.
For more details, see board/freescale/p1010rdb/README.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
[York Sun: fix conflicts in boards.cfg]
Acked-by: York Sun <yorksun@freescale.com>
Since pins multiplexing, SDHC shares signals with IFC, with this patch:
To enable SDHC in case of NOR/NAND/SPI boot
a) For temporary use case in runtime without reboot system
run 'mux sdhc' in u-boot to validate SDHC with invalidating IFC.
b) For long-term use case
set 'esdhc' in hwconfig and save it.
To enable IFC in case of SD boot
a) For temporary use case in runtime without reboot system
run 'mux ifc' in u-boot to validate IFC with invalidating SDHC.
b) For long-term use case
set 'ifc' in hwconfig and save it.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Some boards use System EEPROM with 128-bytes instead of 256-bytes.
Since we regard 256-bytes EEPROM as standard EEPROM with default
value for MAX_NUM_PORTS. For those non-256-bytes EEPROM, we can
redefine MAX_NUM_PORTS in board-specific file to override the
default MAX_NUM_PORTS.
This patch doesn't impact on previous existing boards.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
T1040QDS is a high-performance computing evaluation, development and
test platform supporting the T1040 QorIQ Power Architecture™ processor.
T1040QDS board Overview
-----------------------
- Four e5500 cores, each with a private 256 KB L2 cache
- 256 KB shared L3 CoreNet platform cache (CPC)
- Interconnect CoreNet platform
- 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and interleaving
support
- Data Path Acceleration Architecture (DPAA) incorporating acceleration
for the following functions:
- Packet parsing, classification, and distribution
- Queue management for scheduling, packet sequencing, and congestion
management
- Cryptography Acceleration
- RegEx Pattern Matching Acceleration
- IEEE Std 1588 support
- Hardware buffer management for buffer allocation and deallocation
- Ethernet interfaces
- Integrated 8-port Gigabit Ethernet switch
- Four 1 Gbps Ethernet controllers
- SERDES Connections, 8 lanes supporting:
— PCI Express: supporting Gen 1 and Gen 2;
— SGMII
— QSGMII
— SATA 2.0
— Aurora debug with dedicated connectors
- DDR Controller 32-/64-bit DDR3L/DDR4 SDRAM memory controller with ECC and
Interleaving
-IFC/Local Bus
- NAND flash: 8-bit, async, up to 2GB.
- NOR: 8-bit or 16-bit, non-multiplexed, up to 512MB
- GASIC: Simple (minimal) target within Qixis FPGA
- PromJET rapid memory download support
- Ethernet
- Two on-board RGMII 10/100/1G ethernet ports.
- PHY #0 remains powered up during deep-sleep
- QIXIS System Logic FPGA
- Clocks
- System and DDR clock (SYSCLK, “DDRCLK”)
- SERDES clocks
- Power Supplies
- Video
- DIU supports video at up to 1280x1024x32bpp
- USB
- Supports two USB 2.0 ports with integrated PHYs
— Two type A ports with 5V@1.5A per port.
— Second port can be converted to OTG mini-AB
- SDHC
- SDHC port connects directly to an adapter card slot, featuring:
- Supporting SD slots for: SD, SDHC (1x, 4x, 8x) and/or MMC
— Supporting eMMC memory devices
- SPI
- On-board support of 3 different devices and sizes
- Other IO
- Two Serial ports
- ProfiBus port
- Four I2C ports
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
[York Sun: fix conflict in boards.cfg]
Acked-by-by: York Sun <yorksun@freescale.com>
Some DDR related structures present in fsl_ddr_dimm_params.h, fsl_ddr_sdram.h, ddr_spd.h
has various parameters with embedded acronyms capitalized that trigger the CamelCase
warning in checkpatch.pl
Convert those variable names to smallcase naming convention and modify all files
which are using these structures with modified structures.
Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
Previous process of compiling a PBL boot image is:
1: make <board_name_config>
2: make u-boot.pbl
for example:
make T4240QDS_SDCARD_config
make u-boot.pbl
Now the process is:
1: make <board_name>
for example:
make T4240QDS_SDCARD
Also, updated README.pblimage.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Use a default RCW of protocol 0x2A_0x98, and a PBI configure file which
uses CPC1 as 512KB SRAM, then PBL tool can be used on B4860 to build a
pbl boot image.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Default configuration has been changed, the most important one is DDR
ref_clock which is changed from 66.67MHz to 133.33MHz. so the ratio need to
change from 24x to 12x to keep the DDR frequency. There are also some
other optimise to align with default configuration.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
For USB device-tree fix-up to work properly, its necessary to
mention USB1 options before that of USB2 inside default hwconfig
string
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Current IFC timings for NAND flash are not able to support existing
K9F1G08U0B and new K9F1G08U0D flash.
so Update the timings to support both.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Fix PHY addresses for QSGMII Riser Card working in
SGMII mode on board P3041/P5020/P4080/P5040/B4860.
QSGMII Riser Card can work in SGMII mode, but
having the different PHY addresses.
So the following steps should be done:
1. Confirm whether QSGMII Riser Card is used.
2. If yes, set the proper PHY address.
Generally, the function is_qsgmii_riser_card() is
for step 1, and set_sgmii_phy() for step 2.
However, there are still some special situations,
take P5040 and B4860 as examples, the PHY addresses
need to be changed when serdes protocol is changed,
so it is necessary to confirm the protocol before
setting PHY addresses.
Signed-off-by: Zhao Qiang <B45475@freescale.com>
SGMII5/6 and SGMII7/8 are not on the same slot on P5040
according to the serdes protocol.
So it is not proper to organize SGMII5/6 and SGMII7/8
on one bus and SGMII5/6 can't work.
So a new bus SUPER_HYDRA_FM3_SGMII_MDIO is added for
SGMII5/6
Signed-off-by: Zhao Qiang <B45475@freescale.com>
CHASSIS2 architecture never fix clock groups for Cluster and hardware
accelerator like PME, FMA. These are SoC defined. SoC defines :-
- NUM of PLLs present in the system
- Clusters and their Clock group
- hardware accelerator and their clock group
if no clock group, then platform clock divider for FMAN, PME
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
T1040 SoC has
- DDR controller ver 5.0
- 2 PLLs
- 8 IFC Chip select
- FMAN Muram 192K
- No Srio
- Sec controller ver 5.0
- Max CPU update for its personalities
So, update the defines accordingly.
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
CHASSIS2 architecture never defines type of L2 cache present in SoC.
it is dependent upon the core present in the SoC.
for example,
- e6500 core has L2 cluster (Kibo)
- e5500 core has Backside L2 Cache
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
DDR parameters clk_adjust were changed. This can make the DDR
run more stable. The new value were gotten by the DDR testing
tool.
Signed-off-by: Po Liu <Po.Liu@freescale.com>
This patch re-config the NOR flash timing parameters which could make
the ifc timing more flexible for NOR flash.
The new parameters could fix the problem of hanging at "Flash:"
occasionally when booting the board.
Signed-off-by: Po Liu <Po.Liu@freescale.com>
This patch is for board config file not to add CONFIG_SECURE_BOOT
condition for include the asm/fsl_secure_boot.h.
Signed-off-by: Po Liu <Po.Liu@freescale.com>
2013-10-16 16:13:10 -07:00
2271 changed files with 44666 additions and 37313 deletions
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