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256 Commits

Author SHA1 Message Date
Tom Rini
f33cdaa4c3 Prepare v2015.04
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-04-13 10:53:03 -04:00
Pavel Machek
a6a4c542d3 break build if it would produce broken binary
Add an error in known-bad case so that we don't produce broken and
hard to debug binaries.

Signed-off-by: Pavel Machek <pavel@denx.de>
2015-04-13 10:52:51 -04:00
Tom Rini
1d2f74690c Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2015-04-13 10:52:46 -04:00
Stephen Warren
787affb41b ARM: rpi: add a couple more revision IDs
According to Gordon Henderson's WiringPi library, there are some more
Pi revision IDs out there. Add support for them.

http://git.drogon.net/?p=wiringPi;a=blob_plain;f=wiringPi/wiringPi.c;hb=5edd177112c99416f68ba3e8c6c4db6ed942e796

At least ID 0x13 is out in the wild:

Reported-by: Chee-Yang Chau <cychau@gmail.com>
Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-04-13 08:48:36 -04:00
Masahiro Yamada
bf71a29c8e ARM: fix arch/arm/Makefile for Tegra
Since commit 79d75d7527 (ARM: move -march=* and -mtune= options to
arch/arm/Makefile), all the Tegra boards are broken because the SPL
is built for ARMv7.

Insert Tegra-specific code to arch/arm/Makefile to set compiler
flags for an earlier ARM architecture.

Note:
The v1 patch for commit 79d75d7527 *was* correct when it was
submitted.  Notice it was originally written for multi .config
configuration where Kconfig set CONFIG_CPU_V7/CONFIG_CPU_ARM720T for
Tegra U-Boot Main/SPL, respectively.  But, until it was merged into
the mainline, commit e02ee2548a (kconfig: switch to single .config
configuration) had been already applied there.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Stephen Warren <swarren@nvidia.com>
Reported-by: Jan Kiszka <jan.kiszka@siemens.com>
Tested-by: Jan Kiszka <jan.kiszka@siemens.com>
2015-04-11 12:04:30 -04:00
Stefan Roese
4adb46a314 arm: armada-xp: Fix SPL for AXP by using save_boot_params_ret
Patch e11c6c27 (arm: Allow lr to be saved by board code) introduced
a different method to return from save_boot_params(). The SPL support
for AXP has been pulled and changing to this new method is now
required for SPL to work correctly.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2015-04-11 11:49:00 +02:00
Tom Rini
c175f306b3 Merge git://git.denx.de/u-boot-arc 2015-04-10 12:39:13 -04:00
Alexey Brodkin
a811492e4f arc: fix separate compilation of start.o
While testing "arc: make sure _start is in the beginning of .text
section" I haven't done proper clean-up of built binaries and so missed
another tiny bit that lead to the following error:
 --->8---
    LD      u-boot
 arc-linux-ld.bfd: cannot find arch/arc/lib/start.o
 Makefile:1107: recipe for target 'u-boot' failed
 make: *** [u-boot] Error 1
 --->8---

Fix is trivial: put "start.o" in "extra-y".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-04-10 19:22:40 +03:00
Linus Walleij
a7b00a7bf6 integrator: consolidate flash info
This consolidates the flash settings for the Integrator
and activates the new ARM flash image support for them
so images can be loaded by name from flash.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-04-10 11:54:08 -04:00
Linus Walleij
10d1491b3d vexpress64: juno: add default NOR flash boot
This modifies the vexpress64 Juno configuration so that
it will by default load and boot a kernel and a device tree
from the images stored in the NOR flash. When we are
at it, also define the proper command line for the Juno and
indicate that the USB stick (/dev/sda1) is the default
root file system.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-04-10 11:54:08 -04:00
Linus Walleij
4bb6650632 common/armflash: Support for ARM flash images
The ARM reference designs all use a special flash image format
that stores a footer (two versions exist) at the end of the last
erase block of the image in flash memory.

Version one of the footer is indicated by the magic number
0xA0FFFF9F at 12 bytes before the end of the flash block and
version two is indicated by the magic number 0x464F4F54 0x464C5348
(ASCII for "FLSHFOOT") in the very last 8 bytes of the erase block.

This command driver implements support for both versions of the
AFS images (the name comes from the Linux driver in drivers/mtd/afs.c)
and makes it possible to list images and load an image by name into
the memory with these commands:

afs - lists flash contents
afs load <image> - loads image to address indicated in the image
afs load <image> <addres> - loads image to a specified address

This image scheme is used on the ARM Integrator family, ARM
Versatile family, ARM RealView family (not yet supported in U-Boot)
and ARM Versatile Express family up to and including the new
Juno board for 64 bit development.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-04-10 11:54:08 -04:00
Tom Rini
ffb96d55d1 Merge branch 'master' of git://git.denx.de/u-boot-fdt 2015-04-10 11:54:07 -04:00
Tom Rini
59064346dd Merge branch 'master' of git://git.denx.de/u-boot-arm 2015-04-10 11:54:07 -04:00
Stefan Agner
6d0f452608 common, ubi: use positive return values for ubi check
The ubi check command is expected to not fail and just check whether
a volume exist or not. Currently, when a volume does not exist, the
command fails which leads to an error:
"exit not allowed from main input shell."

Use 1 to indicate that a volume does not exist. This allows to use
ubi check in an if statement, e.g.
if ubi check rootfs; then; echo "exists"; else; echo "not there"; fi
2015-04-10 11:54:06 -04:00
Alexey Brodkin
89576072cb arc: make sure _start is in the beginning of .text section
This is important to have entry point in the beginning of .text section
because it allows simple loading and execution of U-Boot.

For example pre-bootloader loads U-Boot in memory starting from offset
0x81000000 and then just jumps to the same address.

Otherwise pre-bootloader would need to find-out where entry-point is. In
its turn if it deals with binary image of U-Boot there's no way for
pre-bootloader to get required value.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-04-10 18:45:34 +03:00
Simon Glass
4bde2e9d60 fdt: nios: Fix warning in ft_cpu_setup()
This function should not return a value.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Thomas Chou <thomas@wytron.com.tw>
2015-04-10 08:15:24 -06:00
Albert ARIBAUD \(3ADEV\)
412ae53aad lpc32xx: add support for board work_92105
Work_92105 from Work Microwave is an LPC3250-
based board with the following features:
- 64MB or 128MB SDR DRAM
- 1 GB SLC NAND, managed through MLC controller.
- Ethernet
- Ethernet + PHY SMSC8710
- I2C:
  - EEPROM (24M01-compatible)
  - RTC (DS1374-compatible)
  - Temperature sensor (DS620)
  - DACs (2 x MAX518)
- SPI (through SSP interface)
  - Port expander MAX6957
- LCD display (HD44780-compatible), controlled
  through the port expander and DACs

This board has SPL support, and uses the LPC32XX boot
image format.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-04-10 14:23:39 +02:00
Albert ARIBAUD \(3ADEV\)
8c80eb3b53 Introduce CONFIG_SPL_PANIC_ON_RAW_IMAGE
introduce CONFIG_SPL_PANIC_ON_RAW_IMAGE.
An SPL which define this will panic() if the
image it has loaded does not have a mkimage
signature.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-04-10 14:23:37 +02:00
Albert ARIBAUD \(3ADEV\)
39f520bb62 lpc32xx: add lpc32xx-spl.bin boot image target
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-04-10 14:23:26 +02:00
Albert ARIBAUD \(3ADEV\)
24d528e3fa dtt: add ds620 support
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-04-10 14:23:23 +02:00
Albert ARIBAUD \(3ADEV\)
981219eebe lpc32xx: add LPC32xx SSP support (SPI mode)
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-04-10 14:23:20 +02:00
Albert ARIBAUD \(3ADEV\)
606f704760 lpc32xx: add GPIO support
This driver only supports Driver Model, not legacy model.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-04-10 14:23:09 +02:00
Albert ARIBAUD \(3ADEV\)
5e862b9539 lpc32xx: i2c: add LPC32xx I2C interface support
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-04-10 14:23:07 +02:00
Albert ARIBAUD \(3ADEV\)
c8381bf435 lpc32xx: mtd: nand: add MLC NAND controller
The controller's Reed-Solomon ECC hardware is
used except of course for raw reads and writes.
It covers in- and out-of-band data together.

The SPL framework is supported.

Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-04-10 14:22:56 +02:00
Albert ARIBAUD \(3ADEV\)
ac2916a224 lpc32xx: add Ethernet support
Signed-off-by: Albert ARIBAUD (3ADEV) <albert.aribaud@3adev.fr>
2015-04-10 14:22:48 +02:00
Albert ARIBAUD
b491d9757d Merge branch 'u-boot/master' 2015-04-10 14:22:23 +02:00
Grazvydas Ignotas
763754549f omap3: pandora: use common configuration
This allows to clean up the config a good deal and also converts
pandora to Generic Board.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
2015-04-09 16:49:37 -04:00
Przemyslaw Marczak
18094e322b odroid-XU3: update board maintainer
At present Hyungwon can't take care of this board in U-Boot,
so I will keep it working.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Hyungwon Hwang <human.hwang@samsung.com>
2015-04-09 16:48:41 -04:00
Anatolij Gustschin
eb5e129a0a mcx: update maintainer and convert to generic board
Remove obsolete email address from MAINTAINERS.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
2015-04-09 16:48:03 -04:00
Masahiro Yamada
26f7c111fb MAINTAINERS: fix TI DaVinci directory path and add KeyStone
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-04-09 16:47:57 -04:00
Alexey Brodkin
0241c3131d board: axs10x - support v3 mother-board
There're 2 versions of motherboards that could be used in ARC SDP.
The only important difference for U-Boot is different NAND IC in use:
 [1] v2 board (we used to support up until now) sports MT29F4G08ABADAWP
while
 [2] v3 board sports MT29F4G16ABADAWP

They are almost the same except data bus width 8-bit in [1] and 16-bit
in [2]. And for proper support of 16-bit data bus we have to pass
NAND_BUSWIDTH_16 option to NAND driver core - which we do now knowing
board type we're running on.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-04-09 20:00:46 +03:00
Andrej Rosano
3bf801a217 ARM: mx5: add support for USB armory board
Add support for Inverse Path USB armory board, an open source
flash-drive sized computer based on Freescale i.MX53 SoC.

http://inversepath.com/usbarmory

Signed-off-by: Andrej Rosano <andrej@inversepath.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Chris Kuethe <chris.kuethe@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Vagrant Cascadian <vagrant@debian.org>
Tested-By: Vagrant Cascadian <vagrant@debian.org>
Tested-by: Chris Kuethe <chris.kuethe@gmail.com>
2015-04-09 09:14:12 +02:00
Andrej Rosano
424ee3d157 ARM: mx5: move to a standard arch/board approach
Move the MX5 based boards to arch/arm/cpu/armv7/mx5, following the
commit: 89ebc82137

Signed-off-by: Andrej Rosano <andrej@inversepath.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Vagrant Cascadian <vagrant@debian.org>
Tested-by: Chris Kuethe <chris.kuethe@gmail.com>
2015-04-09 09:13:54 +02:00
Michal Simek
385a08a60f ARM: zynq: Remove Jagan from list of maintainers
Email address is not longer valid that's why remove it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2015-04-08 18:43:51 -04:00
Masahiro Yamada
321f86e18d ARM: zynq: disable CONFIG_SYS_MALLOC_F to fix MMC boot
Since commit 326a682358 (malloc_f: enable SYS_MALLOC_F by default
if DM is on), Zynq MMC boot hangs up after printing the following:

    U-Boot SPL 2015.04-rc5-00053-gadcc570 (Apr 08 2015 - 12:59:11)
    mmc boot
    reading system.dtb

Prior to commit 326a682358, Zynq boards enabled CONFIG_DM, but
not CONFIG_SYS_MALLOC_F.  That commit forcibly turned on
CONFIG_SYS_MALLOC_F.  I have not figured out the root cause, but
anyway it looks like CONFIG_SYS_MALLOC_F gave a bad impact on the
Zynq MMC boot.

We are planning to have the v2015.04 release in a few days.
I know this is a defensive fixup, but what I can do now is to add
   # CONFIG_SYS_MALLOC_F is not set
to every Zynq defconfig file to get back the original behavior.

Tested on:
  - Zedboard
  - ZC706 board

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Cc: Simon Glass <sjg@chromium.org>
2015-04-08 18:41:38 -04:00
Ulises Cardenas
f97d112eb6 Fix mxc_hab documenation for DEK blob generation
Include/fsl_sec.h defines sec_in and sec_out, according to the
platform's endianess. Therefore, CONFIG_SYS_FSL_LE needs to be
declared in the configuration file of the target, in order to use
enable the DEK blob generation command. This requirement is not
explicit in the README.mxc_hab.

Signed-off-by: Ulises Cardenas <Ulises.Cardenas@freescale.com>
2015-04-08 10:54:10 +02:00
Fabio Estevam
a80a65e997 mx53loco: Disable printing cpuinfo
Since commit 32df39c741 ("mx5: fix get_reset_cause") we have the following
boot messages on a mx53qsb:

U-Boot 2015.04-rc5-00029-gd68df02 (Apr 06 2015 - 11:15:39)

CPU:   Freescale i.MX53 rev2.1 at 800 MHz
Reset cause: POR
Board: MX53 LOCO
I2C:   ready
DRAM:  1 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
In:    serial
Out:   serial
Err:   serial
CPU:   Freescale i.MX53 rev2.1 at 1000 MHz
Reset cause: unknown reset
Net:   FEC [PRIME]

The CPU and Reset cause lines appear twice.

Initially mx53 boots at 800MHz, then at a later point the PMIC is configured via
I2C to raise the CPU voltage so that it can run at 1GHz.

To avoid such misleading double printings, disable printing cpu info for now.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
2015-04-08 10:45:50 +02:00
Tom Rini
adcc570599 cmd_mem.c: Update 'iteration_limit' to unsigned long
With e37f1eb we now use strict_strtoul() in do_mem_mtest() and this
gives us a warning:
../include/vsprintf.h:38:5: note: expected 'long unsigned int *' but
argument is of type 'int *'

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-04-07 09:38:54 -04:00
Pavel Machek
c4aaf2e0a6 fix makefiles to respect DTC setting
Top-level Makefile has option to select dtc binary, but it is ignored
due to bug in Makefile.lib. Fix it.

Signed-off-by: Pavel Machek <pavel@denx.de>
2015-04-07 08:41:10 -04:00
Masahiro Yamada
bf678dfd42 MAKEALL: fix get_target_arch() to adjust to '-' in Status field
Since the Kconfig conversion, boards.cfg scanned by MAKEALL is
generated by tools/genboardscfg.py.  Every board is supposed to have
its own MAINTAINERS that contains maintainer and status information,
but, in fact, MAINTAINERS is missing from some boards.

For such boards, the first field, Status, is filled with '-'.
It causes a problem for "set" command, which ignores '-' in its
arguments.  Consequently, get_target_arch() returns a wrong field
and MAKEALL fails to get a correct toolchain.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-04-07 08:41:10 -04:00
Masahiro Yamada
cffcd28613 kbuild: include config.mk when auto.conf is not older than .config
Since the Kconfig conversion, config.mk has been included only when
include/config/auto.conf is newer than the .config file.

It causes build error if both files have the same time-stamps.
It is actually possible because EXT* file systems have a 1s time-stamp
resolution.

The config.mk should be included when include/config/auto.conf is
*not older* than the .config file.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Tom Rini <trini@konsulko.com>
Reported-by: York Sun <yorksun@freescale.com>
Reported-by: Stephen Warren <swarren@nvidia.com>
Reported-by: Matthew Gerlach <mgerlach@opensource.altera.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2015-04-07 08:41:10 -04:00
Tom Rini
e049b772ae am33xx/ddr.c: Fix regression on DDR2 platforms
Back in fc46bae a "clean up" was introduced that intended to reconcile
some of the AM335x codepaths based on how AM43xx operates.
Unfortunately this introduced a regression on the DDR2 platforms.  This
was un-noticed on DDR3 (everything except for Beaglebone White) as we
had already populated sdram_config correctly in sequence.  This change
brings us back to the older behavior and is fine on all platforms.

Tested on Beaglebone White, Beaglebone Black and AM335x GP EVM

Reported-by: Matt Ranostay <mranostay@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-04-07 08:41:10 -04:00
Pavel Machek
e37f1eb45c cmd_mem: cleanups, catch bad usage
Currently, memtest will silently accept bad data. Perform error
checking on user intput.

Signed-off-by: Pavel Machek <pavel@denx.de>
2015-04-07 08:41:10 -04:00
Tang Yuantian
8f6e18385a ahci: Fix a wrong parameter pass
In stead of user_buffer_size, transfer_size should be used to pass to
ahci_device_data_io(). transfer_size is the length that we want the
low level function to transfer each time.
If we use user_buffer_size which is the totally data length as parameter,
low level function will actually create many SGs to transfer as many data
as possible each time. That will produce many redundant data transfer.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-04-07 08:41:10 -04:00
Mario Schuknecht
5e8397dd94 env_sf: Fix recovery default
The u-boot environment is redundantly stored in a NOR flash on our boards.
Redundant means that there are two places to store the environment. But only
one of the two is active. I discovered that on one board the u-boot (env_sf)
uses the environment from the second place and the Kernel (fw_printenv) uses
the environment from the first place.
To decide which is the active environment there is a byte inside the
environment. 1 means active and 0 means obsolete. But on that board both
environments had have a 1. This can happen if a power loss or reset occurs
during writing the environment. In this situation the u-boot (env_sf)
implementation uses the second environment as default. But the Kernel
(fw_printenv) implementation uses the first environment as default.

This commit corrects the default in the u-boot env_sf implementation when a
problem was detected. Now the recovery default is the same like in all other
environment implementations. E.g. fw_printenv and env_flash. This ensures that
u-boot and Kernel use the same environment.

Signed-off-by: Mario Schuknecht <mario.schuknecht@dresearch-fe.de>
2015-04-07 08:41:10 -04:00
Tom Rini
3419af770d Merge branch 'master' of git://git.denx.de/u-boot-samsung 2015-04-06 06:57:15 -04:00
Łukasz Majewski
1018b0a56a config: exynos: trats2: Enable support for Image.itb at trats2 device
After this change it is possible to boot trats2 device with Image.itb,
which facilitates automated testing, since only one file is necessary.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-04-06 15:23:59 +09:00
Łukasz Majewski
0a1387bf1b config: exynos: trats: Enable support for Image.itb at trats device
After this change it is possible to boot trats device with Image.itb,
which facilitates automated testing, since only one file is necessary.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-04-06 15:23:59 +09:00
Łukasz Majewski
f26cc7d4ed config: exynos: common: Provide env variables to support Image.itb
This change allows using Image.itb image format with Exynos4 devices
(especially trats and trats2).
Such change facilitates automated testing since only one binary needs
to be prepared.

Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-04-06 15:23:59 +09:00
Ajay Kumar
0f00c38f01 smdk5420: Remove GPIO enums
Remove GPIOs from smdk5420 board file and because the same
is already specified via DT.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-04-06 14:34:41 +09:00
Ajay Kumar
607eff62ce dts: peach_pi: Add DT properties needed for display
Add backlight enable GPIO, and delay needed for panel powerup
via FIMD DT node.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-04-06 14:34:41 +09:00
Ajay Kumar
b798177736 dts: peach_pit: Add SLP and RST GPIO properties in parade DT node
Now that parade driver supports reading SLP and RST GPIO
from DT, specify the same in parade DT node.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-04-06 14:34:41 +09:00
Ajay Kumar
e549234d69 dts: exynos54xx: Add samsung, pwm-out-gpio property to FIMD node
Now that the exynos_fb driver supports handling backlight GPIO
via DT, specify pwm output property via FIMD DT node.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-04-06 14:34:40 +09:00
Ajay Kumar
55e70929b8 video: parade: configure SLP and RST GPIOs if specified in DT
Add support to configure EDP_RST GPIO and EDP_SLP GPIO,
if provided in parade DT node.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-04-06 14:34:40 +09:00
Ajay Kumar
9018efa7e2 video: exynos_fb: configure backlight GPIOs if specified in DT
Add support to configure PWM_OUT(PWM output) GPIO and
BL_EN(backlight enable) GPIO, if provided in FIMD DT node.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-04-06 14:34:40 +09:00
Ajay Kumar
6102560891 Exynos5: Fix rpll_sdiv to support both peach-pit and peach-pi panels
The existing setting for rpll_sdiv generates 70.5Mhz RPLL
video clock to drive 1366x768 panel on peach_pit.

This clock rate is not sufficient to drive 1920x1080 panel on peach-pi.
So, we adjust rpll_sdiv to 3 so that it generates 141Mhz pixel clock
which can drive peach-pi LCD.

This change doesn't break peach-pit LCD since 141/2=70.5Mhz, i.e FIMD
divider at IP level will get set to 1(the required divider setting
will be calculated and set by exynos_fimd_set_clock()) and hence
peach-pit LCD still works fine.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-04-06 14:34:40 +09:00
Ajay Kumar
70b4fb660d arm: exynos: add display clocks for Exynos5800
Add get_lcd_clk and set_lcd_clk callbacks for Exynos5800 needed by
exynos video driver.

Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-04-06 14:34:40 +09:00
Sjoerd Simons
d7e1f02efc config: peach: Correct memory layout environment settings
The peach boards have their SDRAM start address at 0x20000000 instead of
0x40000000 which seems common for all other exynos5 based boards. This
means the layout set in exynos5-common.h causes the kernel be loaded
more then 128MB (at 0x42000000) away from memory start which breaks
booting kernels with CONFIG_AUTO_ZRELADDR

Define a custom MEM_LAYOUT_ENV_SETTINGS for both peach boards which uses
the same offsets from start of memory as the common exynos5 settings.

This fixes booting via bootz and PXE

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-04-06 14:21:29 +09:00
Inha Song
f44ef7d60c exynos5: add trace feature #ifdef in exynos5-common.h
We can enable / disable trace feature from the FTRACE config options.
To enable, compile U-Boot with FTRACE=1.

This patch add #ifdef FTRACE in exynos5-common.h for enable/disable
to use FTRACE configs instead of having to change board config files.

Signed-off-by: Inha Song <ideal.song@samsung.com>
Acked-by: Simon Glass <sjg@chroimum.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-04-06 14:19:36 +09:00
Guillaume GARDET
0467faf555 Exynos: Clock: Fix exynos5_get_periph_rate for I2C.
Commit 2e82e92526 'Exynos: Clock: Cleanup
soc_get_periph_rate' introduced a bug in I2C config. This patch makes cros_ec
keyboard working again on Samsung Chromebook (snow).

Changes in V2: reorder lines as requested by Joonyoung Shim.

Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Joonyoung Shim <jy0922.shim@samsung.com>
Reviewed-by: Simon Glass <sjg@chroimum.org>
Tested-by: Simon Glass <sjg@chroimum.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2015-04-06 14:05:45 +09:00
Hans de Goede
47bdb9f892 sunxi: Fix Orangepi_mini dtb filename
The Orangepi_mini is different enough from the regular Orangepi that it needs
its own dtb, but when it got added a copy and paste error was made and it
got the same dtb filename, fix this.

While at it also add a short description of both Orangepi boards to the
defconfig files for them.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-04-04 15:37:22 +02:00
Tom Rini
d68df02809 Merge git://git.denx.de/u-boot-arc 2015-04-03 09:14:44 -04:00
Tom Rini
692e5c4e7e Merge branch 'master' of git://git.denx.de/u-boot-tegra
Conflicts:
	board/armltd/vexpress64/vexpress64.c

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-04-03 09:14:38 -04:00
Alexey Brodkin
d5717e8944 board: AXS10x - update SDIO clock value
With the most recent board firmware correct SDIO clock is 50MHz as
opposed to 25 MHz before.

Also set max frequency of MMC data exchange equal to SDIO clock -
because there's no way to transfer data faster than interface clock.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-04-03 09:47:50 +03:00
Alexey Brodkin
6eb15e50f4 arc: add support for SLC (System Level Cache, AKA L2-cache)
ARCv2 cores may have built-in SLC (System Level Cache, AKA L2-cache).
This change adds functions required for controlling SLC:
 * slc_enable/disable
 * slc_flush/invalidate

For now we just disable SLC to escape DMA coherency issues until either:
 * SLC flush/invalidate is supported in DMA APIin U-Boot
 * hardware DMA coherency is implemented (that might be board specific
   so probably we'll need to have a separate Kconfig option for
   controlling SLC explicitly)

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-04-03 09:47:50 +03:00
Alexey Brodkin
09424d1119 board: Switch Abilis TB-100 board to Driver Model for serial port
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
2015-04-03 09:47:49 +03:00
Alexey Brodkin
01496c4fac serial-arc: switch to DM
Now when all infrastructure in ARC is ready for it let's switch ARC UART
to driver model.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Simon Glass <sjg@chromium.org>
2015-04-03 09:47:49 +03:00
Alexey Brodkin
b903792e44 arc: minor fixes in Kconfig
[1] Fix misspeling in ARC_CACHE_LINE_SHIFT dependency, now cache-line
lenth selection is correctly enabled if either I$ or D$ are enabled.

 [2] Add dummy entry to target list to make sure target type is always
mentioned in defconfig. Otherwise defconfig for the first target in the
list will not have target name and later on with addition of the new
target on top of the list in Kconfig will lead to corrupted
configuration expanded from defconfig.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-04-03 09:47:49 +03:00
Alexey Brodkin
f56d625ee0 arc: get rid of CONFIG_SYS_GENERIC_GLOBAL_DATA
As discussed on mailing list we're drifting away from
CONFIG_SYS_GENERIC_GLOBAL_DATA in favour to use of board_init_f_mem()
for global data.

So do this for ARC architecture.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-04-03 09:47:49 +03:00
Alexey Brodkin
97ee47bdab arc: re-generate defconfigs
Before that moment our defconfigs were manually modified with addition
of new options. That means once anybody wants to add another option and
re-genarate defconfig with "make defconfig" there will be lots of
differences. So to make future modifications more clean we'll do bulk
re-generation right away.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-04-03 09:47:49 +03:00
Alexey Brodkin
3fb8016360 arc: clean-up init procedure
Intention behind this work was elimination of as much assembly-written
code as it is possible.

In case of ARC we already have relocation fix-up implemented in C so why
don't we use C for U-Boot copying, .bss zeroing etc.

It turned out x86 uses pretty similar approach so we re-used parts of
code in "board_f.c" initially implemented for x86.

Now assembly usage during init is limited to stack- and frame-pointer
setup before and after relocation.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
2015-04-03 09:47:49 +03:00
Alexey Brodkin
8ee28251d9 arc: move low-level interrupt and exception handlers in a separate file
This separation makes maintenance of code easier because those low-level
interrupt- or exception handling routines are pretty static and usually
require not much care while start-up code is a subject of modifications
and enhancements.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-04-03 09:47:49 +03:00
Alexey Brodkin
4d93617d87 arc: merge common start-up code between ARC and ARCv2
Even though ARCompact and ARCv2 are not binary compatible most of
assembly instructions are used in both. With this change we'll get rid
of duplicate code.

Still IVTs are implemented differently so we're keeping them in separate
files.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-04-03 09:47:49 +03:00
Alexey Brodkin
ae4a351ad9 arc: cache - build invalidate_icache_all() and invalidate_dcache_all()
always

Make both invalidate_icache_all() and invalidate_dcache_all() available
even if U-Boot is configured with CONFIG_SYS_DCACHE_OFF and/or
CONFIG_SYS_ICACHE_OFF.

This is useful because configuration of U-Boot may not match actual
hardware features. Real board may have cache(s) but for some reason we
may want to run U-Boot with cache(s) disabled (for example if some
peripherals work improperly with existing drivers if data cache is
enabled). So board may start with cache(s) enabled (that's the case for
ARC cores with built-in caches) but early in U-Boot we disable cache(s)
and make sure all contents of data cache gets flushed in RAM.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-04-03 09:47:49 +03:00
Alexey Brodkin
36d68668e3 serial/serial_arc: set registers address during compilation
Being global variable with 0 value it falls into .bss area which we may
only use after relocation to RAM. And right afetr relocation we zero
.bss - effectively cleaing register address set for early console.

Now with pre-set value "regs" variable is no longer in .bss and this way
safely survives relocation.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-04-03 09:47:49 +03:00
Tom Rini
8a5c9ca4d0 Prepare v2015.04-rc5
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-03-31 20:53:59 -04:00
Tom Rini
10697704ca Merge branch 'master' of git://git.denx.de/u-boot-atmel 2015-03-31 19:15:59 -04:00
Wu, Josh
b2d387bceb ARM: at91: sama5: move the common part of configurations to at91-sama5_common.h
Create a new configuration file: at91-sama5_common.h. Which includes the
configurations that reused by all SAMA5 chips.

at91-sama5_common.h includes:
- hw macros (clock, text_base and etc.)
- default commands.
- BOOTARGS
- U-Boot common configs.
NOTE: NOR flash definition should be put before including the common header.

For sama5d3-xplained:
- add CMD_SETEXPR

For sama5d3xek:
- add CMD_SETEXPR
- change CONFIG_SYS_MALLOC_LEN to (4*1024*1024)

Signed-off-by: Josh Wu <josh.wu@atmel.com>
2015-04-01 01:04:32 +02:00
Bo Shen
ff255e836a ARM: atmel: at91sam9n12ek: enable spl support
Enable SPL support for at91sam9n12ek boards, now it supports
boot up from NAND flash, serial flash.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-04-01 01:04:31 +02:00
Bo Shen
d85e8914b3 ARM: atmel: at91sam9x5ek: enable spl support
Enable SPL support for at91sam9x5ek board. Now, it supports
boot up from NAND flash and SPI flash.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-04-01 01:04:31 +02:00
Bo Shen
41d41a93fb ARM: atmel: at91sam9m10g45ek: enable spl support
Supports boot up from NAND flash with software ECC eanbled.
And supports boot up from SD/MMC card with FAT file system.

As the boot from SD/MMC card with FAT file system, the BSS
segment is too big to fit into SRAM, so, use the lds to put
it into SDRAM.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-04-01 01:04:30 +02:00
Bo Shen
72cb3b6b54 ARM: atmel: arm926ejs: fix clock configuration
Config MCKR according to the datasheet sequence, or else it
will cause the MCKR configuration failed.

Remove timeout checking for clock configuration, if configure
the clock failed, let the system hang while not run in wrong
clock configuration.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
Tested-by: Heiko Schocher <hs@denx.de>
2015-04-01 01:04:29 +02:00
Wu, Josh
23ac62d4c7 ARM: at91: at91sam9n12ek: save the environment to a fat file in MMC card
Insteading in mmc's raw sectors, this patch will save the environment
in a fat file (uboot.env) in mmc card's first FAT patition by default.

If you want to save in mmc's raw sectors, you only need to define
CONFIG_ENV_IS_IN_MMC.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
2015-04-01 01:04:29 +02:00
David Dueck
da78fb5414 ARM: at91: atmel_nand: Support flash based BBT
Add support for on-flash bad block table. This makes U-Boot handle an existing
BBT correctly.

Signed-off-by: David Dueck <davidcdueck@googlemail.com>
Reviewed-by: Boris BREZILLON <boris.brezillon@free-electrons.com>
CC: Boris BREZILLON <boris.brezillon@free-electrons.com>
CC: Josh Wu <josh.wu@atmel.com>
CC: Andreas Bießmann <andreas.devel@googlemail.com>
CC: Scott Wood <scottwood@freescale.com>
Acked-by: Josh Wu <josh.wu@atmel.com>
2015-04-01 01:04:28 +02:00
Heiko Schocher
55ebd0c1ca arm, at91: corvus: move MACH_TYPE to defconfig
move MACH_TYPE into defconfig

Signed-off-by: Heiko Schocher <hs@denx.de>
2015-04-01 01:04:28 +02:00
Tom Rini
e755d54392 spl_atmel.c: Switch s_init to board_init_f
To facilitate changing lowlevel_init to become s_init, move the current
contents of s_init into board_init_f and add the rest of what
board_init_f does here.
In order to compile clean without CONFIG_SKIP_LOWLEVEL_INIT set, leave an
empty stub of s_init(). It can be removed when lowlevel_init becomes s_init.

Cc: Bo Shen <voice.shen@atmel.com>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Tested-by: Matt Porter <mporter@konsulko.com> on sama5d3_xplained
Signed-off-by: Tom Rini <trini@ti.com>
[rebased on current master, leave s_init() as empty stub]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-04-01 01:04:27 +02:00
Bo Shen
a2df3a37d7 ARM: atmel: armv7: switch to use common timer functions
The commit 8dfafdd (Introduce common timer functions), add common
timer functions, we can use them directly.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
[rebase on current master]
Sigend-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-04-01 01:04:27 +02:00
Bo Shen
a02c8a31bd ARM: atmel: arm9: switch to use common timer functions
Signed-off-by: Bo Shen <voice.shen@atmel.com>
[rebase on current master]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-04-01 01:04:26 +02:00
Wu, Josh
02fc64d1d9 ARM: at91: sama5d4: display the U-Boot version on LCD
This patch will display the U-Boot version on LCD.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
2015-04-01 01:04:26 +02:00
Tom Rini
482cbd553d Merge git://git.denx.de/u-boot-nand-flash 2015-03-31 17:17:06 -04:00
Tom Rini
9da7e3daf3 Merge branch 'master' of git://git.denx.de/u-boot-imx 2015-03-31 11:45:36 -04:00
Stefan Agner
55765b1842 mtd: vf610_nfc: specify transfer size before each transfer
Testing showed, that commands like STATUS made the buffer dirty
when executed with NFC_SECSZ set to the page size. It looks
like the controller transfers bogus data when this register
is configured. When setting it to 0, the buffer does not get
altered while the status command still seems to work flawless.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2015-03-30 23:35:27 -05:00
Stefan Agner
7653fc288a mtd: vf610_nfc: mark page as dirty on block erase
The driver tries to re-use the page buffer by storing the page
number of the current page in the buffer. The page is only read
if the requested page number is not currently in the buffer. When
a block is erased, the page number is marked as invalid if the
erased page equals the one currently in the cache. However, since
a erase block consists of multiple pages, also other page numbers
could be affected.

The commands to reproduce this issue (on a written page):
> nand dump 0x800
> nand erase 0x0 0x20000
> nand dump 0x800

The second nand dump command returns the data from the buffer,
while in fact the page is erased (0xff).

Avoid the hassle to calculate whether the page is affected or not,
but set the page buffer unconditionally to invalid instead.

Signed-off-by: Stefan Agner <stefan@agner.ch>
2015-03-30 23:33:42 -05:00
Peter Tyser
004a1fdb45 nand: yaffs: Remove the "nand write.yaffs" command
This command is only enabled by one board, complicates the NAND code,
and doesn't appear to have been functioning properly for several
years.  If there are no bad blocks in the NAND region being written
nand_write_skip_bad() will take the shortcut of calling nand_write()
which bypasses the special yaffs handling.  This causes invalid YAFFS
data to be written. See
http://lists.denx.de/pipermail/u-boot/2011-September/102830.html for
an example and a potential workaround.

U-Boot still retains the ability to mount and access YAFFS partitions
via CONFIG_YAFFS2.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2015-03-30 23:24:39 -05:00
Peter Tyser
073adf987e nand: Remove CONFIG_MTD_NAND_VERIFY_WRITE
The CONFIG_MTD_NAND_VERIFY_WRITE has been removed from Linux for some
time and a more generic method of NAND verification now exists in U-Boot.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2015-03-30 23:24:39 -05:00
Peter Tyser
9ac71f112e dfu: nand: Verify writes
Previously NAND writes were not verified and could fail silently.  Add
a verification step after all writes to NAND.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2015-03-30 23:24:38 -05:00
Peter Tyser
6b94f118a2 cmd_nand: Verify writes to NAND
Previously NAND writes were only verified when CONFIG_MTD_NAND_VERIFY_WRITE
was defined.  On boards without this define writes could fail silently.
Boards with CONFIG_MTD_NAND_VERIFY_WRITE could prematurely report
failures which ECC could correct.

Add a verification step after all "nand write[.x]" commands to ensure the
writes were successful.  The verification uses ECC for for "normal"
writes, but does not for raw and yaffs writes.  Some test cases which
inject fake bad bits on a 2K page flash are below.

Test cases with CONFIG_MTD_NAND_VERIFY_WRITE defined:
  Example of an ECC write which previously failed when
  CONFIG_MTD_NAND_VERIFY_WRITE was defined, but now succeeds because ECC
  is used during verification:
      nand erase 0 0x10000
      dhcp /somefile
      mw.b 0x10000 0xff 0x2000
      mw.b 0x10020 0xfe 1
      nand write.raw 0x10000 0x800 1
      mw.b 0x1000020 0x01 1
      nand write 0x1000000 0x800 0x1800

Test cases without CONFIG_MTD_NAND_VERIFY_WRITE defined:
  Example of an ECC write which previously silently failed:
      nand erase 0 0x10000
      dhcp /somefile
      mw.b 0x10000 0xff 0x2000
      mw.b 0x10020 0x00 1
      nand write.raw 0x10000 0x800 1
      mw.b 0x1000020 0xff 1
      nand write 0x1000000 0x800 0x1800

  Example of a raw write which previously failed silently due to stuck
  data bit, but now errors out:
      nand erase 0 0x10000
      dhcp /somefile
      mw.b 0x10000 0xff 0x2000
      mw.b 0x10020 0xfe 1
      nand write.raw 0x10000 0x800 1
      mw.b 0x1000020 0x01 1
      nand write.raw 0x1000000 0x800 3

  Example of a raw write which previously failed silently due to stuck OOB
  bit, but now errors out:
      nand erase 0 0x10000
      dhcp /somefile
      mw.b 0x10000 0xff 0x2000
      mw.b 0x10810 0xfe 1
      nand write.raw 0x10000 0x800 1
      mw.b 0x1000810 0x01 1
      nand write.raw 0x1000000 0x800 3

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2015-03-30 23:24:38 -05:00
Peter Tyser
59b5a2ad83 nand: Add verification functions
Add nand_verify() and nand_verify_page_oob().  nand_verify() verifies
NAND contents against an arbitrarily sized buffer using ECC while
nand_verify_page_oob() verifies a NAND page's contents and OOB.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2015-03-30 23:24:38 -05:00
Peter Tyser
800772a1a6 nand: Remove unused read/write structures
The use of the nand_write_options and nand_read_options structures were
removed in commit dfbf617ff0.  Remove the
now-unused structures too.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2015-03-30 23:17:16 -05:00
Peter Tyser
aff092ed13 nand: Remove unused CONFIG_MTD_NAND_ECC_JFFS2 option
This option was removed along with legacy NAND support in
be33b046b5.  Clean up some remnants.

Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
2015-03-30 23:16:54 -05:00
Luca Ellero
88a2cbb2ae mtd: nand: mxs: fix PIO_WORDs in mxs_nand_write_buf()
There is only one pio_word in this DMA transaction so data field must be 1.

Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com>
2015-03-30 22:25:54 -05:00
Luca Ellero
5263a02e8b mtd: nand: mxs: fix PIO_WORDs in mxs_nand_read_buf()
There is only one pio_word in this DMA transaction so data field must be 1.

Signed-off-by: Luca Ellero <luca.ellero@brickedbrain.com>
2015-03-30 22:25:47 -05:00
Marcel Ziswiler
76a30fedd4 ARM: tegra: colibri_t20: fix nand pinmux
Pingroup ATC seems to come out of reset with config set to NAND, so we
need to explicitly configure some other function to this group in order
to avoid clashing settings.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 10:04:44 -07:00
Lucas Stach
9b219d4dfb tegra: pinmux: fix FUNCMUX_NDFLASH_KBC_8_BIT
Even the 8-bit case needs KBCB configured, as pin D7 is located in this
pingroup.

Please note that pingroup ATC seems to come out of reset with its
config set to NAND so one needs to explicitly configure some other
function to this group in order to avoid clashing settings which is
outside the scope of this patch.

Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Tested-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 10:04:44 -07:00
Marcel Ziswiler
e979a80861 ARM: tegra: update colibri_t20 configuration
Bring the Colibri T20 configuration in-line with Apalis/Colibri T30.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 10:04:44 -07:00
Marcel Ziswiler
00a5270bd8 ARM: tegra: fix colibri_t20 asix reset
Fix ASIX USB to Ethernet chip reset.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 10:04:43 -07:00
Marcel Ziswiler
1ed056e84d ARM: tegra: fix colibri_t20 machine type
A while ago I got Russell to change the machine type of our Colibri T20
from COLIBRI_TEGRA2 to COLIBRI_T20 which at least in parts is also
reflected in his machine registry:

http://www.arm.linux.org.uk/developer/machines/list.php?id=3323

For us it is really very beneficial to actually still be able to boot
downstream L4T kernel with its working hardware accelerated
graphics/multimedia stack albeit it being proprietary/closed-source.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 10:04:43 -07:00
Marcel Ziswiler
e57c6e5b50 ARM: tegra: rename colibri_t20 board/configuration/device-tree
In accordance with our other modules supported by U-Boot and as agreed
upon for Apalis/Colibri T30 get rid of the carrier board in the board/
configuration/device-tree naming.

While at it also bring the prompt more in line with our other products.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 10:04:43 -07:00
Marcel Ziswiler
d1db97aaa4 ARM: tegra: get rid of colibri_t20-common
As a preparatory step to renaming the board folder as well first get
rid of the colibri_t20-common after having integrated it into
colibri_t20_iris for now.

While at it also migrate to using NVIDIA's common.mk magic.

Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 10:04:43 -07:00
Simon Glass
37220efab8 tegra: seaboard: Correct the gpio_request() call
Requesting a GPIO without a name is not supposed anymore. This causes the
request to fail. Add a name so that the serial console works on seaboard.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 09:59:58 -07:00
Simon Glass
a101638ece tegra: seaboard: Remove unused CONFIG_UART_DISABLE_GPIO
This CONFIG is not used, so drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 09:59:58 -07:00
Stephen Warren
89d9437356 ARM: tegra: enable MIPI PAD CTRL support for Tegra124
This allows selection between CSI and DSI_B on the MIPI pads.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 09:54:06 -07:00
Stephen Warren
5ee7ec7baf ARM: tegra: pinctrl: add support for MIPI PAD control groups
Some pinmux controls are in a different register set. Add support for
manipulating those in a similar way to existing pins/groups.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 09:54:06 -07:00
Stephen Warren
c21478bc6e ARM: tegra: pinctrl: minor cleanup
Move struct pmux_pingrp_desc type and tegra_soc_pingroups variable
declaration together with other pin/mux level definitions. Now the whole
file is grouped/ordered pin/mux-related then drvgrp-related definitions.

Fix typo in ifdef comment.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 09:54:06 -07:00
Stephen Warren
0edb3a8ec9 ARM: tegra: pinctrl: move Tegra210 code to the correct dir
Patches that added the Tegra210 pinctrl driver and renamed directories
arch/arm/cpu/tegra{$soc}-common -> arch/arm/mach-tegra/tegra-${soc}
crossed. Move the Tegra210 pinctrl driver to the correct location. This
wasn't detected since Tegra210 support is in the process of being added,
and isn't buildable yet.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2015-03-30 09:54:06 -07:00
Axel Lin
52091ad146 spi: designware_spi: revisit FIFO size detection again
By specification the FIFO size would be in a range 2-256 bytes. From TX Level
prospective it means we can set threshold in the range 0-(FIFO size - 1) bytes.
Hence there are currently two issues:
  a) FIFO size 2 bytes is actually skipped since TX Level is 1 bit and could be
     either 0 or 1 byte;
  b) FIFO size is incorrectly decreased by 1 which already done by meaning of
     TX Level register.

Fixes: 501943696e (spi: designware_spi: Fix detecting FIFO depth)
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2015-03-30 01:42:49 +05:30
Axel Lin
1478aeb32d spi: cf_spi: Staticize local functions
Make local functions static and remove unneeded forward declarations.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2015-03-30 01:42:49 +05:30
Axel Lin
bb1662760e spi: cf_spi: Use to_cf_spi_slave to resolve cfslave from slave
Don't assume slave is always the first member of struct cf_spi_slave.
Use container_of instead of casting first structure member.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2015-03-30 01:42:49 +05:30
Ravi Babu
46122960f0 qspi: dra7x: enable quad mode read for ti-qspi driver
This patch enables QUAD read mode for qspi to improve the
read performace while loading the binaries from qspi.

Signed-off-by: Ravi Babu <ravibabu@ti.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2015-03-30 01:39:20 +05:30
Axel Lin
81a66446c3 spi: ftssp010_spi: Use to_ftssp010_spi() to ensure free correct address
Don't assume slave is always the first member of struct ftssp010_spi.
Use to_ftssp010_spi() to ensure free correct address in spi_free_slave().

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2015-03-30 01:39:20 +05:30
Axel Lin
aa8306a90e spi: davinci: Remove duplicate code to set bus and cs for slave
It's done in spi_alloc_slave().

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2015-03-30 01:39:20 +05:30
Axel Lin
a46988f11f spi: cf_qspi: Fixup to_cf_qspi_slave macro
The third parameter of container_of is the name of the member within the struct.
Current code only works if the parameter passed to to_cf_qspi_slave named slave.
Fix it.

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
2015-03-30 01:39:20 +05:30
Hans de Goede
662e2acb46 sunxi: UTOO_P66: Add missing MAINTAINERS entry
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-29 14:56:48 +02:00
Iain Paton
961e77712b sunxi: a10-LIME set the cpu clock at boot to 912MHz
following kernel patches to reduce the cpu clock to 912MHz due to
reported instability at 1008MHz, select 912MHz as the boot speed
for the a10-lime

Signed-off-by: Iain Paton <ipaton0@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-29 13:37:39 +02:00
Iain Paton
e71b422bd7 sunxi: use CONFIG_SYS_CLK_FREQ to set cpu clock
make the CPU clock selectable via Kconfig

this removes the sunxi specific CONFIG_CLK_FULL_SPEED defined in each
soc header and replaces it's use in board/sunxi/board.c with
CONFIG_SYS_CLK_FREQ from Kconfig which allows us to configure board
specific frequency on boot

Signed-off-by: Iain Paton <ipaton0@gmail.com>
[hdegoede@redhat.com s/CONFIG_SYS_CLK_FREQ/CONFIG_TIMER_CLK_FREQ/ for the
 arch-timer clk speed on sun7i to fix mis-compile on sun7i]
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-29 13:36:03 +02:00
Iain Paton
7a140117ef sunxi: sun4i: improve cpu clock selection method
clock_set_pll1 would pick the next highest available cpu clock speed if
a value not in the pre defined table was selected. this potentially
results in overclocking the soc.

reverse the selection method so that we select the next lowest speed
and add the missing 912Mhz setting that's requested by sun7i which also
uses the sun4i clock code.

Signed-off-by: Iain Paton <ipaton0@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-29 13:08:39 +02:00
Hans de Goede
246e3b8787 sunxi: musb: Fix some lo speed devices not working with musb host
The usb0 / otg phy on sunxi boards has a bug where it wrongly detects a
high speed squelch on usb reset deassert when a lo speed device is plugged in.

The android kernel has a work around for this in the form of temporary
disabling the phy's squelch detection on reset deassert, this commit adds
the same workaround to the u-boot sunxi musb code, thereby fixing various usb
lo speed devices not working.

Tested with a (before non working) usb keyboard and a usb 2.4 GHz wireless
keyboard/mouse combo receiver.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
2015-03-29 12:58:59 +02:00
Anatolij Gustschin
5db752353b powerpc: ppc4xx: convert AMCC boards to generic board
Add CONFIG_SYS_GENERIC_BOARD to amcc-common.h and CONFIG_DISPLAY_BOARDINFO
to Kconfig files. canyonlands.h includes amcc-common.h, so remove
CONFIG_SYS_GENERIC_BOARD definition there.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Feng Kan <fkan@amcc.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
2015-03-28 12:09:46 -04:00
Brian McFarland
80ee0196a6 Patch to mkenvimage to handle text files with length that exceed env size
The current head revision of mkenvimage
(e72be8947e) will prevent you from creating
an env image from a text file that is larger than the env length specified
by the '-s' option.  That doesn't make sense given that the tool now allows
comments and blank lines.  This patch removes that limitation and allows
longer text files to be used.

I don't have time / desire at the moment to figure out "patman" and could
really care less if this is adopted up stream.  Just figured I would share
in case anybody else finds it useful enough to take time to do a proper
patch.

>From 39ff30190c2bf687861f4b4b33230f1944fb64f9 Mon Sep 17 00:00:00 2001
From: Brian McFarland <bmcfarland@rldrake.com>
Date: Thu, 12 Mar 2015 11:37:19 -0400
Subject: [PATCH] In mkenvimage, removed the check that prevented using a
 source text file larger than the output environment image.  Instead, the main
 parsing loop checks to see if the environment buffer is full, and quits if it
 is.  After the main parse loop, a second loop swallows comments and
 whitespace until either the EOF is reached or more env vars are found, in
 which case an error will be thrown.
2015-03-28 12:07:47 -04:00
angelo@sysam.it
944ab340b6 m68k: fix 3 broken boards
Fix eb_cpu5282 and eb_cpu5282_internal unresolved external error.
These boards have video but don't need any ppc related
video_setmem().

Fix M53017EVB moving away embedded env to a different offset,
as in M52277EVB.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
2015-03-28 12:07:46 -04:00
Alexey Brodkin
5bcd19aa29 common/board_f: move board_init_f_mem() from #else CONFIG_X86
Purpose of this change is to make it possible to re-use code currently
used on X86 solely for other architectures. For example:
 * init_sequence_f_r
 * board_init_f_r

Even though board_init_f_mem() has nothing to do with any particular
architecture it won't work (at least in current implementation) for X86.

This is because on X86 "gd" is an alias to function get_fs_gd_ptr(),
thus we cannot assign anything to it.

So this change separates selection of board_init_f_mem() from X86 while
keeping it disabled for X86 still.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2015-03-28 12:07:46 -04:00
Linus Walleij
03314f0e24 vexpress64: cut config and defaults for unclear variant
This variant that is neither FVP / Base Model or Juno Versatile
Express 64bit is confusing. Get rid of it unless someone can
point out what machine that really is. Seems to be an evolutional
artifact in the config base.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-28 12:07:46 -04:00
Linus Walleij
d5f3d17ca6 armv8: semihosting: delete external interface
Now that loading files using semihosting can be done using
a command in standard scripts, and we have rewritten the boardfile
and added it to the Vexpress64, let's delete the external
interface to the semihosting file retrieveal and rely solely
on these commands, and staticize them inside that file so the
whole business is self-contained.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-28 12:07:46 -04:00
Linus Walleij
49995ffe81 vexpress64: remove board late init, use smhload
This removes the kludgy late board init from the FVP simulator
version of Versatile Express 64bit (ARMv8), and replace it with
a default boot command using the new smhload command to load
the files using semihosting. Tested on the Foundation Model.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-28 12:07:45 -04:00
Linus Walleij
202a674bb8 armv8: semihosting: add a command to load semihosted images
Instead of sprinkling custom code and calls over the Vexpress64
boardfile, create a command that loads images using semihosting
just like we would load from flash memory of over the network,
using a special command:

    smhload <image> <address>

This will make it possible to remove some custom calls and
code and make the boot easier.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-28 12:07:45 -04:00
Linus Walleij
e769f68613 armv8: semihosting: do not inline trap call
The semihosting trap call does not like being inlined, probably
because that will mean register reordering screwing up the return
value in r0, so tag this function "noinline".

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2015-03-28 12:07:45 -04:00
Karsten Merker
8c24929019 Document config_distro_bootcmd environment variables for interactive booting.
config_distro_bootcmd.h defines a common boot environment for multiple
platforms, including several environment variables that are intended for
interactive use by an end-user.  Document which variables are considered
public interfaces that must remain compatible in future u-boot versions.

Signed-off-by: Karsten Merker <merker@debian.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
2015-03-28 12:07:45 -04:00
Thierry Reding
1344bd7ebe config: Define BOOTP client architecture and VCI for ARMv8
Reuse the 32-bit ARM client architecture and identify ARMv8 specifically
by setting the BOOTP VCI string.

Cc: Dennis Gilmore <dennis@ausil.us>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-03-28 12:07:45 -04:00
Thierry Reding
e2a5d55642 config: Use booti instead of bootz on 64-bit ARM
The bootz command doesn't work with Linux kernel images on 64-bit ARM.
The replacement command with the same interface and functionality is
booti.

Cc: Dennis Gilmore <dennis@ausil.us>
Cc: Tom Rini <trini@konsulko.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-03-28 12:07:44 -04:00
Hannes Petermaier
750461887e board/BuR/common: remove unused function 'blink'
since we have possibility to write out on lcd whats going on, we don't need
the gpio blink functionality anymore.

Signed-off-by: Hannes Petermaier <hannes.petermaier@br-automation.com>

Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2015-03-28 12:07:44 -04:00
Hannes Petermaier
2b5b2be5e9 board/BuR/common: move I2C initialization from common part to board-specific
At this time I2C and responsible pin-mux is setup during PMIC initialziation
within common.c, this is possible because today PMIC is always connected on
I2C0.

In Future this will be changed, PMIC isn't anymore connected to bus0 in call
cases.

So we do following:
- rename enable_i2c_pin_mux0 to enable_i2c_pin_mux to be generic for enabling
  pin-mux on different or more busses.
- move the call to i2c_pin_mux and i2c_init from common.c to the specific
  board.c

Signed-off-by: Hannes Petermaier <hannes.petermaier@br-automation.com>
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
2015-03-28 12:07:44 -04:00
maxin.john@enea.com
3b6e484122 ARM: omap4_panda: enable saveenv command
Enable saveenv command and the configs to store environment
persistently in the SD card.

Tested on OMAP4 Panda (OMAP4460 ES1.1)

Signed-off-by: Maxin B. John <maxin.john@enea.com>
Acked-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-03-28 12:07:44 -04:00
Masahiro Yamada
aa63387a39 m68k: merge per-CPU config.mk into arch/m68k/Makefile
Collect CPU specific flags into the single place.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Angelo Dureghello <angelo@sysam.it>
2015-03-28 09:03:09 -04:00
Masahiro Yamada
4cbd29284d m68k: mcf547x_8x: move CPU type to Kconfig and refactor config.mk
Move the CPU type config options from include/configs/*.h
to arch/m68k/Kconfig and refactor the CPU flags select in
arch/m68k/cpu/mcf547x_8x/config.mk.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Angelo Dureghello <angelo@sysam.it>
2015-03-28 09:03:09 -04:00
Masahiro Yamada
f47fb6b4a0 m68k: mcf523x: move CPU type to Kconfig and refactor config.mk
Move the CPU type config options from include/configs/M5235EVB.h
to arch/m68k/Kconfig and refactor the CPU flags select in
arch/m68k/cpu/mcf523x/config.mk.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Angelo Dureghello <angelo@sysam.it>
2015-03-28 09:03:09 -04:00
Masahiro Yamada
2bb1cd53e9 m68k: mcf5227x: move CPU type to Kconfig and refactor config.mk
Move the CPU type config options from include/configs/M52277EVB.h
to arch/m68k/Kconfig and refactor the CPU flags select in
arch/m68k/cpu/mcf5227x/config.mk.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Angelo Dureghello <angelo@sysam.it>
2015-03-28 09:03:09 -04:00
Masahiro Yamada
7f8ebbf095 m68k: mcf5445x: move CPU type to Kconfig and refactor config.mk
This commit intends to stop grepping CPU type in
arch/m68k/cpu/mcf5445x/config.mk.

Move the CPU type config options from include/configs/*.h
to arch/m68k/Kconfig and refactor the CPU flags select in
arch/m68k/cpu/mcf5445x/config.mk.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Angelo Dureghello <angelo@sysam.it>
2015-03-28 09:03:09 -04:00
Masahiro Yamada
c155ab74f7 m68k: mcf532x: move CPU type to Kconfig and refactor config.mk
This commit intends to stop grepping CPU type in
arch/m68k/cpu/mcf532x/config.mk.

Move the CPU type config options from include/configs/*.h
to arch/m68k/Kconfig and refactor the CPU flags select in
arch/m68k/cpu/mcf532x/config.mk.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Angelo Dureghello <angelo@sysam.it>
2015-03-28 09:03:09 -04:00
Masahiro Yamada
bdde659516 m68k: mcf530x: move CPU type to Kconfig and refactor config.mk
This commit intends to stop grepping CPU type in
arch/m68k/cpu/mcf530x/config.mk.

Move the CPU type config options from include/configs/amcore.h
to arch/m68k/Kconfig and refactor the CPU flags select in
arch/m68k/cpu/mcf530x/config.mk.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Angelo Dureghello <angelo@sysam.it>
2015-03-28 09:03:09 -04:00
Masahiro Yamada
d4a9b17df5 m68k: mcf52x2: move CPU type to Kconfig and refactor config.mk
This commit intends to stop grepping CPU type in
arch/m68k/cpu/mcf52x2/config.mk.

Move the CPU type config options from include/configs/*.h
to arch/m68k/Kconfig and refactor the CPU flags select in
arch/m68k/cpu/mcf52x2/config.mk.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Alison Wang <alison.wang@freescale.com>
Cc: Angelo Dureghello <angelo@sysam.it>
2015-03-28 09:03:09 -04:00
Michal Marek
3a4f6b60db kbuild: Don't reset timestamps in include/generated if not needed
Use filechk to generate asm-offsets.h and generic-asm-offsets.h.
Based on a patch by Valdis Kletnieks.

Reported-by: Valdis Kletnieks <Valdis.Kletnieks@vt.edu>
Acked-by: Valdis Kletnieks <Valdis.Kletnieks@vt.edu>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Marek <mmarek@suse.cz>
[ imported from Linux Kernel, commit 70a4fd6c56d0,
  with adjustment for U-Boot ]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-28 09:03:09 -04:00
Masahiro Yamada
d99cd32f05 kbuild: remove redundant line from (generic-)asm-offsets.h
This line produces an extra comment line for generic-asm-offsets.h
and asm-offsets.h.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Signed-off-by: Michal Marek <mmarek@suse.cz>
[ imported from Linux Kernel, commit 343d3e6cc861,
  with modification of commit description ]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-28 09:03:09 -04:00
Masahiro Yamada
490cf5f0c9 kbuild: merge generic-asm-offsets.h and asm-offsets.h rules
The rules "cmd_generic-offsets" and "cmd_offsets" are almost the
same. (The difference is only the include guards.)
They can be merged.

This commit is mostly inspired by the following commit of Linux.

    commit 39664e2f3cdef98f42437e903159a6044a1d99d6
    Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
    Date:   Mon Jan 5 15:57:15 2015 +0900

        kbuild: merge bounds.h and asm-offsets.h rules

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-28 09:03:09 -04:00
Masahiro Yamada
d6c418e4b8 ARM: bcm283x: move SoC headers to mach-bcm283x/include/mach
Move arch/arm/include/asm/arch-bcm283x/*
  -> arch/arm/mach-bcm283x/include/mach/*

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2015-03-28 09:03:09 -04:00
Masahiro Yamada
ddf6bd4876 ARM: bcm283x: merge BCM2835/BCM2836 directories into mach-bcm283x
BCM2835 (used on Raspberry Pi) and BCM2836 (used on Raspberry Pi 2)
are similar enough.  One of the biggest differences is the ARM
processor.  It is reasonable to collect the source files into a
single place, arch/arm/mach-bcm283x/.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
2015-03-28 09:03:09 -04:00
Masahiro Yamada
326a682358 malloc_f: enable SYS_MALLOC_F by default if DM is on
This option has a bool type, not hex.
Fix it and enable it if CONFIG_DM is on because Driver Model always
requires malloc memory.  Devices are scanned twice, before/after
relocation.  CONFIG_SYS_MALLOC_F should be enabled to use malloc
memory before relocation.  As it is board-independent, handle it
globally.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Robert Baldyga <r.baldyga@samsung.com>
2015-03-28 09:03:09 -04:00
Masahiro Yamada
91405b7fa9 malloc_f: remove redundant defalut values of CONFIG_SYS_MALLOC_F_LEN
The default value of CONFIG_SYS_MALLOC_F_LEN is defined by ./Kconfig
as 0x400.  Each defconfig or Kconfig need not repeat the same value.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Robert Baldyga <r.baldyga@samsung.com>
2015-03-28 09:03:08 -04:00
Masahiro Yamada
6eb6f132e6 m68k: remove arch/m68k/lib/board.c
All the M68000 boards have switched to Generic Board.
This file is no longer necessary.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Huan Wang <alison.wang@freescale.com>
Cc: Angelo Dureghello <angelo@sysam.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-03-28 09:03:08 -04:00
Masahiro Yamada
0a9e7ee5bd generic-board: select SYS_GENERIC_BOARD for some architectures
We have done with the generic board conversion for all the boards
of ARC, Blackfin, M68000, MicroBlaze, MIPS, NIOS2, Sandbox, X86.

Let's select SYS_GENERIC_BOARD for those architectures, so we can
tell which architecture has finished the conversion at a glance.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-03-28 09:03:08 -04:00
Masahiro Yamada
0a12e6872e generic-board: move __HAVE_ARCH_GENERIC_BOARD to Kconfig
Move the option to Kconfig renaming it to CONFIG_HAVE_GENERIC_BOARD.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Alexey Brodkin <abrodkin@synopsys.com>
2015-03-28 09:03:08 -04:00
Masahiro Yamada
5f9eb22075 kbuild: remove scripts/multiconfig.sh
We have switched to the single .config configuration system,
the same one as used in Linux Kernel.

The necessary glue code is small enough now, so move it to the
top-level Makefile and scripts/kconfig/Makefile, and then delete
scripts/multiconfig.sh.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-03-28 09:03:08 -04:00
Masahiro Yamada
97ec89e501 kbuild: remove "*_felconfig" target
This target was added by commit cbdd9a9737 (sunxi: kconfig: Add
%_felconfig rule to enable FEL build of sunxi platforms.).

At that time, U-Boot used separate .config files for U-Boot proper
and SPL.  I understood the pain to modify both .config and
spl/.config.

Now, we have switched to single .config configuration.
It seems acceptable to run "make menuconfig" or friends to enable
CONFIG_SPL_FEL, as we do for other CONFIGs.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-03-28 09:03:08 -04:00
Masahiro Yamada
79d75d7527 ARM: move -march=* and -mtune= options to arch/arm/Makefile
My main motivations for this commit are:

[1] Follow the arch/arm/Makefile style of Linux Kernel

[2] Maintain compiler options systematically
  Currently, we give -march=* and -mtune=* options inconsistently:
  Only some of the CPUs pass -march=* and -mtune=* options.
  By collecting such options into the single place arch/arm/Makefile
  we can tell which options are missing at a glance.

[3] Prepare for deprecating arch/*/cpu/*/config.mk

Note:
  This commit just moves the compiler options so as not to change
  the behavior at all.  It does not care about the correctness of
  the given options.  Fox example, "-march=armv5te" might be better
  than "-march=armv4" for ARM946EJS, but it is beyond the scope this
  commit.  Also, filling the missing -march=* and -tune=* is left
  to follow-up patches.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefan Roese <sr@denx.de>
2015-03-27 16:55:22 +01:00
David Feng
d8bafe1310 ARMv8: enable DM in vexpress64 board
Signed-off-by: David Feng <fenghua@phytium.com.cn>
2015-03-27 16:33:51 +01:00
David Feng
b263302aa5 ARMv8: enable pre-allocation malloc
Allocate memory space for pre-allocation malloc and zero global data.
This code is partly from crt0.S.

Signed-off-by: David Feng <fenghua@phytium.com.cn>
2015-03-27 16:28:58 +01:00
Tom Rini
3f54dc48c0 Merge branch 'master' of git://git.denx.de/u-boot-sunxi 2015-03-26 22:13:52 -04:00
Tom Rini
f2137c2a7f Merge branch 'master' of git://git.denx.de/u-boot-dm 2015-03-26 22:13:32 -04:00
Tom Rini
10af87817a Merge branch 'master' of git://git.denx.de/u-boot-x86 2015-03-26 22:13:11 -04:00
Iain Paton
99deda1dff sunxi: axp209: fix incorrect limits on ldo3
board/sunxi/board.c tries to set ldo3 to 2.8v however drivers/power/axp209.c
contains an incorrect limit on ldo3 of 2.275v

The origin of the incorrect limit seems likely due to some inconsistencies
in the axp209 datasheet. ldo3 is described with different limits in
different sections. register 0x29 uses 7 bits for voltage configuration
while the 2.275v limit would apply if only 6 bits were used.
Probably this is a cut&paste error from register 0x23

The linux kernel driver has the correct limit and operation up to the 2.8v
required by my board has been physically verified with a multimeter.

Signed-off-by: Iain Paton <ipaton0@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-26 13:17:46 +01:00
Ian Campbell
a923abc2d3 sunxi: set GMAC TX delay = 0x1 on Cubietruck.
Of 4 boards in our automated test system 2 do not have reliable
networking with the default TX delay of 0x0. Increasing to 0x1 seems
to make things reliable on all 4 boards.

Some previous ad-hpoc tests with tx delay set to 0, 1, 2 and 3 on one
of the problematic boards showed:

0: mw.l 0x1c20164 0x006 1     -- t/o in 4/5 tftp runs
1: mw.l 0x1c20164 0x406 1     -- t/o in 1/5 tftp runs
2: mw.l 0x1c20164 0x806 1     -- t/o in 1/5 tftp runs
3: mw.l 0x1c20164 0xc06 1     -- t/o many times in first tftp run

For 0, 1 and 2 "t/o" means one or two "T" glitches in the download,
but it did complete. For 3 those were basically continuous and it
couldn't complete.

tftp was of a 16M initrd.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-26 13:17:37 +01:00
Masahiro Yamada
891ee87e2b dm: serial: remove bogus include <ns16550.h>
Serial-uclass should be generically implemented without depending
a particular hardware.  Fortunately, nothing in include/ns16550.h is
referenced from drivers/serial/serial-uclass.c, so remove this bogus
include.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-03-25 16:33:27 -06:00
Sjoerd Simons
f643d9294f config_distro_bootcmd.h: Prefer booting from bootable paritions
List bootable partitions and only scan those for bootable files, falling
back to partition 1 if there are no bootable partitions

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2015-03-25 12:15:18 -04:00
Sjoerd Simons
293eac363d config_cmd_default.h: Add 'env exists' command
env exists allows scripts to query whether an environment variable
exists. Enable by default as it adds only a trivial amount of code and
can be useful in scripts.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2015-03-25 12:15:18 -04:00
Sjoerd Simons
0798d6fd41 part: Add support for list filtering on bootable partitions
Add an optional -bootable parameter to the part list commands to only
put the list of bootable partitions in the environment variable

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
2015-03-25 12:15:15 -04:00
Sebastian Siewior
5cab874052 watchdog/imx_watchdog: do not set WCR_WDW
with WCR_WDW set, the watchdog won't trigger if we bootet linux and idle
around while the watchdog is not triggered. It seems the timer makes
progress very slowly if at all. I managed to remain 20minutes alive
while the timeout was set to 60secs. It reboots within 60secs if I start
a busyloop in userland (something like "while (1) { }").

While I don't see a reason why the WDT should not be running while the
CPU is in idle, I'm dropping this bit.

Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Acked-by: Stefano Babic <sbabic@denx.de>
2015-03-25 16:52:16 +01:00
Bin Meng
6f1eba49a5 x86: Add ramboot and nfsboot commands in x86-common.h
It is very common in the debug stage to test U-Boot loading a linux
kernel. The commands to boot linux kernel with ramdisk and nfs as the
root are common to all x86 targets, so it makes sense to add them as
the U-Boot default environment in x86-common.h.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chroimum.org>
2015-03-24 21:22:38 -06:00
Bin Meng
bea59393c8 x86: galileo: Enable saving environment in SPI flash
Saving U-Boot's environment in SPI flash on Intel Galileo board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sg@chromium.org>
2015-03-24 21:22:38 -06:00
Bin Meng
fba02d69c6 x86: crownbay: Enable saving environment in SPI flash
Saving U-Boot's environment in SPI flash on Intel CrownBay board.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sg@chromium.org>
2015-03-24 21:22:38 -06:00
Bin Meng
a84134f721 x86: crownbay: Enable Intel Topcliff GMAC support
Intel Crown Bay board has one ethernet port connected from Intel
Topcliff PCH. Enable it in the board configuration.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2015-03-24 21:22:38 -06:00
Bin Meng
8ee443b8eb net: Add Intel Topcliff GMAC driver
Add a new driver for the Gigabit Ethernet MAC found on Intel Topcliff
Platform Controller Hub. Tested under 10/100 half/full duplex and 1000
full duplex modes using ping and tftpboot commands.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-03-24 21:22:37 -06:00
Bin Meng
c58ea6cb8c net: Update README.drivers.eth to mention latest APIs
README.drivers.eth still refers to the deprecated miiphy_register().
Update the doc to mention new APIs mdio_alloc() and mdio_register().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-03-24 21:22:37 -06:00
Bin Meng
a7c3d5e2a9 net: Add ethernet FCS length macro in net.h
Some ethernet drivers use their own version of ethernet FCS length
macro which is really common. We define ETH_FCS_LEN in net.h and
replace those custom versions in various places.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2015-03-24 21:22:37 -06:00
Bin Meng
e4ad6031a7 x86: quark: Enable on-chip ethernet controllers
Intel Quark SoC integrates two 10/100 ethernet controllers which can
be connected to an external RMII PHY. The MAC IP is from Designware.
Enable this support with the existing U-Boot Designware MAC driver
so that the ethernet port on Intel Galileo board can be used.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-03-24 21:22:37 -06:00
Bin Meng
83d9712e70 x86: Add queensbay fsp patch information in README.x86
The FSP release version 001 for Intel Queensbay has a bug which
could cause random endless loop during the FspInit call. This bug
was published by Intel although Intel did not describe any details.
Describe this information in the x86 doc so that U-Boot Queensbay
support is invulnerable.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-03-24 21:22:37 -06:00
Bin Meng
0eb9dc76e2 fdtdec: Improve fdtdec_get_pci_bdf() documentation
Add the description that how the compatible property is involved in
the fdtdec_get_pci_bdf() documentation.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-03-24 21:22:37 -06:00
Tom Rini
1c854dc5d4 arch/x86/cpu/quark/mrc.c: Switch to U_BOOT_DATE / U_BOOT_TIME
Using __DATE__ and __TIME__ results in an error due to -Werror=date-time
with gcc-4.9 (__DATE__ / __TIME__ might prevent reproducible builds) so
switch these over to U_BOOT_DATE / U_BOOT_TIME

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-03-24 21:22:37 -06:00
Bin Meng
312cc39e27 x86: quark: MRC codes clean up
This patch cleans up the quark MRC codes coding style by:
- Remove BIT0/1../31 defines from mrc_util.h
- Create names for the documented BITs and use them
- For undocumented single BITs, use (1 << n) directly
- For undocumented ORed BITs, use the hex number directly
- Remove redundancy parenthesis all over the codes
- Replace to use lower case hex numbers

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2015-03-24 21:22:37 -06:00
Gilles Gameiro
b81bdf62e0 bav335x: Update defconfigs and fix typo in EEPROM config format
After v2015.01 we need to have DM enabled in order to use UART.  Also
fix a typo in the EEPROM config format.

Signed-off-by: Gilles Gameiro <gilles@gigadevices.com>
[trini: Reword commit message, re-save defconfigs with 'savedefconfig']
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-03-24 10:56:35 -04:00
Stephen Warren
95b4f112f5 ARM: rpi: fix RPi1 board rev detection for warranty bit
Apparently the firmware's board rev response includes both the board
revision and some other data even on the RPi1. In particular, the
"warranty bit" is bit 24. We need to mask that out when looking up the
board ID.

Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
2015-03-24 10:52:18 -04:00
Rob Herring
7682a99826 remove unnecessary version.h includes
Various files are needlessly rebuilt every time due to the version and
build time changing. As version.h is not actually needed, remove the
include.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Michal Simek <monstr@monstr.eu>
Cc: Macpaul Lin <macpaul@andestech.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: York Sun <yorksun@freescale.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Simon Glass <sjg@chromium.org>
Cc: Philippe Reynes <tremyfr@yahoo.fr>
Cc: Eric Jarrige <eric.jarrige@armadeus.org>
Cc: "David Müller" <d.mueller@elsoft.ch>
Cc: Phil Edworthy <phil.edworthy@renesas.com>
Cc: Robert Baldyga <r.baldyga@samsung.com>
Cc: Torsten Koschorrek <koschorrek@synertronixx.de>
Cc: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Łukasz Majewski <l.majewski@samsung.com>
2015-03-24 10:50:50 -04:00
Tom Rini
3c0c1f02d5 Merge branch 'master' of git://git.denx.de/u-boot-uniphier 2015-03-24 10:50:16 -04:00
Masahiro Yamada
90e357efed ARM: UniPhier: remove unnecessary ifdef conditional
The callee (arch/arm/lib/cache-cp15.c) has a #ifdef
CONFIG_SYS_DCACHE_OFF conditional.  The same conditional in the
caller (arch/arm/mach-uniphier/cache_uniphier.c) is redundant.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:16:02 +09:00
Masahiro Yamada
a509161a21 ARM: UniPhier: disable L2 cache by lowlevel_init of U-Boot proper
The L2 cache is used as a temporary SRAM on SPL.
Now the secondary CPUs store the necessary code for jumping to
Linux on their L1 I-caches.  So, the L2 cache can be disabled
much earlier, at the very entry of U-Boot proper (lowlevel_init).
This makes the boot sequence clearer.
Also, as the L1 cache has been disabled by the start.S,
enable_caches() does not need to do it again.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:58 +09:00
Masahiro Yamada
62118b7b01 ARM: UniPhier: optimize kicking secondary CPUs code
Currently, the secondary CPU(s) are kicked three times:
Boot ROM ---(kick)--> SPL ---(kick)--> U-boot ---(kick)--> Linux.
It makes the boot sequence very complicated.

This commit merges the first and the second kicks, so the secondary
CPU(s) can directly jump from SPL to Linux.
arch/arm/mach-uniphier/smp.S is no longer necessary.

Linux boot test passed.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:55 +09:00
Masahiro Yamada
4d13b1b708 ARM: UniPhier: fix typos in comments
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:52 +09:00
Masahiro Yamada
def3feb8cb ARM: UniPhier: add empty lowlevel_init to U-boot proper
To remove the ifdef conditional of CONFIG_SKIP_LOWLEVEL_INIT,
add late_lowlevel_init.S to U-Boot proper.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:48 +09:00
Masahiro Yamada
8cddc27965 ARM: UniPhier: move init stack area just below TEXT_BASE
There is no good reason to have the 0x1000 gap between
CONFIG_SYS_INIT_SP_ADDR and CONFIG_SYS_TEXT_BASE.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:44 +09:00
Masahiro Yamada
6a3cffe8e1 ARM: UniPhier: add CONFIG_SPL_MAX_FOOTPRINT
The Boot ROM of UniPhier platform only loads 64KB image.  We should
always make sure that SPL memory footprint is less than that.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:40 +09:00
Masahiro Yamada
ce3a63905b ARM: UniPhier: use CONFIG_SPL_STACK to define SPL stack pointer
Ifdef conditionals for CONFIG options are not Kconfig-friendly.
Instead, define CONFIG_SPL_STACK to prepare for Kconfig moves.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:38 +09:00
Masahiro Yamada
499785b970 ARM: UniPhier: enable Driver Model and UART on SPL
Enable CONFIG_SPL_DM and CONFIG_SPL_SERIAL_SUPPORT, which provide
Driver Model UART support on SPL.

CONFIG_SYS_SPL_MALLOC_{START,SIZE} should be dropped because simple
malloc is preferred on SPL.  Dlmalloc requires some static variables
on .data section that is not available yet for NOR boot mode etc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:35 +09:00
Masahiro Yamada
a286039b13 ARM: UniPhier: enable CONFIG_PANIC_HANG
Do not reset board on panic, which allows us to not link reset_cpu()
into SPL.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:32 +09:00
Masahiro Yamada
7d1a3a67bc ARM: UniPhier: move UART pin settings to SPL
The UniPhier platform is going to enable Driver Model and UART
support on SPL.  Move UART pin settings to early_pin_init(),
which is called from SPL.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:28 +09:00
Masahiro Yamada
94ab98bb1c ARM: UniPhier: move platform devices to SPL
Since we do not have OF_CONTROL support for SPL, platform devices
are necessary to enable Driver Model on SPL.

To prepare for that, move platdevice.o to SPL and enable it by
CONFIG_SPL_DM.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:24 +09:00
Masahiro Yamada
d5e7305013 ARM: UniPhier: include PH1-LD4 Makefile from PH1-sLD8
The two Makefiles arch/arm/mach-uniphier/{ph1-ld4,ph1-sld8}/Makefile
are completely the same.  We can improve the maintainability by
having one to include the other.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:21 +09:00
Masahiro Yamada
4ab994b16a ARM: UniPhier: remove unnecessary CONFIG_SYS_SOC
Since commit a86ac9540e (ARM: UniPhier: include <mach/*.h> instead
of <asm/arch/*.h>), UniPhier platform does not need the symbolic
link arch/arm/include/asm.  This option is not necessary either.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2015-03-24 00:15:10 +09:00
Peng Fan
27d3608076 imx:mx6slevk support reading temperature
This patch is to support reading temperature for mx6slevk board.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-03-23 13:19:18 +01:00
Peng Fan
b02d9acb3c imx:mx6dlsabresd fix error detecting thermal
Before add CONFIG_SYS_MALLOC_F and CONFIG_SYS_MALLOC_F_LEN,
uboot will complains "CPU:   Temperature: Can't find sensor device".
This is because DM and DM_THERMAL are enabled, but SYS_MALLOC_F
is not configured.

After applying this patch, uboot can correctly detect the temperature.
"
U-Boot 2015.04-rc2-00146-g48b6e30-dirty (Mar 09 2015 - 13:04:36)

CPU:   Freescale i.MX6DL rev1.1 at 792 MHz
CPU:   Temperature 44 C
"

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-03-23 13:19:18 +01:00
Boris BREZILLON
058d231687 board/seco: Add mx6q-uq7 basic board support
Add basic SECO MX6Q/uQ7 board support (Ethernet, UART, SD are supported).
It also adds a Kconfig skeleton to later add more SECO board (supporting
SoC and board variants).

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-03-23 13:19:18 +01:00
Boris BREZILLON
a05a6045d5 ARM: iMX: define an IMX_CONFIG Kconfig option
IMX_CONFIG is currently passed via the SYS_EXTRA_OPTIONS which is marked
as deprecated.

Add a new Kconfig file under arch/arm/imx-common and define the
IMX_CONFIG Kconfig in there.

Each board is supposed to provide a default value pointing to the
appropriate imximage.cfg file.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-03-23 13:19:17 +01:00
Boris BREZILLON
89ebc82137 ARM: mx6: move to a standard arch/board approach
Freescale boards are currently all defined in arch/arm/Kconfig, which
makes them hard to detect.
Moreover the MX6 SoC variant (Q, D, DL, S, SL) selection is currently
done via the SYS_EXTRA_OPTIONS option which marked as deprecated.

Move to a more standard way to select sub-architecture and board by
creating a Kconfig under arch/arm/cpu/armv7/mx6 and a new ARCH_MX6
option.

Existing MX6 board definitions should be moved in this new Kconfig in
choice menu, and new boards should be directly declared in this menu.

Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-03-23 13:18:01 +01:00
Paul Kocialkowski
8a440b09f2 sunxi: musb: Return early on VBUS GPIO error instead of on a positive value
This allows printing the error message when VBUS is detected, as it would with
AXP VBUS detect.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2015-03-21 13:51:27 +01:00
Tom Rini
21866c34a1 at91sam9rlek_mmc_defconfig: Add CONFIG_ARCH_AT91=y
This flag was missing and thus the board was totally being configured
wrong.

Signed-off-by: Tom Rini <trini@konsulko.com>
2015-03-20 10:47:38 -04:00
Tom Rini
e6f4042a04 Merge branch 'master' of git://git.denx.de/u-boot-atmel 2015-03-20 07:01:00 -04:00
Bo Shen
8e7a96364b ARM: atmel: sama5d4: set non-secured for peripherals
When access the programmable secure peripherals address space,
it needs set them to non-secured.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-03-18 23:36:10 +01:00
Bo Shen
c83cb5f665 Net: macb: reset GBE bit when fallback checking
If the GBE bit is set, when do next time autonegotiation,
if the result is not 1000Mbps, it will fallback to 100Mbps
checking. So, we need to clear the GBE bit.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-03-18 23:36:09 +01:00
Bo Shen
993ea97e76 ARM: atmel: armv7: move spl lds to armv7 directory
As the u-boot-spl.lds is used only for armv7 SoCs (includes
sama5d3 and sama5d4), so move it to armv7 directory.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-03-18 23:36:07 +01:00
Bo Shen
06dfbc0e50 ARM: atmel: sama5d4 boards: fix spl lds location
As the u-boot-spl.lds is moved to <arch/arm/mach-at91> directory.
So, correct the path for sama5d4 related boards.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-03-18 23:36:05 +01:00
Bo Shen
66bfce55f1 ARM: atmel: sama5d4 xplained: enable mmc power
Enable the power for MMC/SD port.

Signed-off-by: Bo Shen <voice.shen@atmel.com>
2015-03-18 23:36:04 +01:00
Wu, Josh
6eb7e136a3 ARM: at91: at91sam9rlek: add hush parser to defconfig
HUSH parser will handle the variable easier. That will be helpful for
write a complicated U-Boot commands or varaibles.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
2015-03-18 23:36:03 +01:00
Wu, Josh
0b12843493 ARM: at91: at91sam9rlek: add mmc environment configuration
Add a mmc default config, which will save the environment in a FAT file
(uboot.env) of MMC.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
2015-03-18 23:36:02 +01:00
Wu, Josh
111ec4c652 ARM: at91: at91sam9rlek: add mci support
This patch enable the MCI support for at91sam9rlek board.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
[rebase on ToT]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
2015-03-18 23:36:01 +01:00
Wu, Josh
65b553b71c ARM: at91: at91sam9rlek: update the default nand flash configs
Update the nand flash offset mapping, default nand bootcmand and
bootargs to align with linux4sam.org.

Signed-off-by: Josh Wu <josh.wu@atmel.com>
Acked-by: Bo Shen <voice.shen@atmel.com>
2015-03-18 23:35:57 +01:00
Tom Rini
a538ae997a Merge branch 'master' of git://www.denx.de/git/u-boot-imx 2015-03-18 07:07:43 -04:00
Tom Rini
8c8dc4c615 Merge branch 'master' of git://git.denx.de/u-boot-i2c 2015-03-18 07:07:36 -04:00
Tom Rini
d283a5709d Merge branch 'master' of git://git.denx.de/u-boot-mmc 2015-03-18 07:07:20 -04:00
Stefan Roese
f582a1583b i2c: mvtwsi: Fix problem with baud rate calculation
The current implementation for baudrate calculation is incorrect.
This part from the formula:

"2 ^ (n + 1)" is not equivalent to (1 << n) but to (2 << n)!

This patch fixes this and moves this calculation to a function instead of using a macro.
This new function is taken from the Linux kernel.

This was detected and tested on the Marvell Armada A38x DB-88F6820-GP eval board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: Hans de Goede <hdegoede@redhat.com>
2015-03-18 09:48:42 +01:00
Rob Herring
e6fbc3e4f1 mv_i2c: fix warnings on 64-bit builds
Change addresses to unsigned long to be compatible with 64-bit builds.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Heiko Schocher <hs@denx.de>
2015-03-18 09:13:17 +01:00
Rob Herring
3a48944bc9 mv_sdhci: fix warnings on 64-bit builds
Change addresses to unsigned long to be compatible with 64-bit builds.
Regardless of fixing warnings, the device is still only 32-bit capable.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
2015-03-18 09:56:17 +02:00
Rob Herring
3c1fcb770b sdhci: fix warnings on 64-bit builds
Change addresses to unsigned long to be compatible with 64-bit builds.
Regardless of fixing warnings, the device is still only 32-bit capable.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
2015-03-18 09:55:59 +02:00
Matt Reimer
e113fe3c06 mmc: sdhci: don't clobber adjacent registers
SDHCI_HOST_CONTROL is a byte-sized register, so don't write to it
as if it were a long, as that would result in clobbering the three
registers following.

Signed-off-by: Matt Reimer <mreimer@sdgsystems.com>
2015-03-18 09:53:01 +02:00
Matt Reimer
8ebde4f0b3 mmc: s5p: properly mask SELBASECLK
Properly mask SELBASECLK by using an actual mask rather than the
number of bits to shift in order to create the mask.

Signed-off-by: Matt Reimer <mreimer@sdgsystems.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
2015-03-18 09:51:56 +02:00
Fabio Estevam
d5eb6dcf44 mx6sabre: Do not enable UMS with SPL
Since commit ad8aae82b2 ("mx6sabre: Enable User Mass Storage") SPL target
does not boot anymore due to the increased spl image size.

Only enable USB Mass Storage for the non-SPL target.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2015-03-13 13:46:51 +01:00
Fabio Estevam
ed914302c7 warp: Select CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
Warp has a DDR eMMC, so enable CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE for better
performance:

reading zImage
5790288 bytes read in 117 ms (47.2 MiB/s)

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2015-03-13 13:35:35 +01:00
Fabio Estevam
06ca28eb36 mx6_common: Do not select esdhc DDR mode for all boards
CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE should be selected only by boards that really
have a DDR-capable eMMC, so remove this option from common code to avoid
regressions.

Reported-by: Stefan Roese <sr@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Volodymyr Riazantsev <volodymyr.riazantsev@globallogic.com>
Tested-by: Stefan Roese <sr@denx.de>
2015-03-13 13:35:12 +01:00
Fabio Estevam
fa481a8318 mx53ard: Use the standard U-boot prompt
By not defining CONFIG_SYS_PROMPT, the standard "=>" prompt is used, so remove
its definition.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-03-13 13:33:57 +01:00
Stefan Roese
14a380a8f3 common/board_f.c: Enable IMX watchdog in init_func_watchdog_init()
Without this patch, the IMX watchdog will not be initialized. And therefor
not active. This patch fixes this by calling hw_watchdog_init() also when
CONFIG_IMX_WATCHDOG is defined.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
2015-03-13 13:31:56 +01:00
Dirk Behme
9d16c52f62 mx6: soc: Switch to cold reset
Disable the warm reset and enable the cold reset for a more reliable
restart ('reset'). This is taken from the Linux kernel, see imx_src_init()
in arch/arm/mach-imx/src.c.

Signed-off-by: Dirk Behme <dirk.behme@de.bosch.com>
2015-03-13 13:29:42 +01:00
Peng Fan
0c1842a01f imx:mx6 remove duplicated includes
There is no need to include asm/bootm.h twice, so remove one.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-03-13 13:28:04 +01:00
maxin.john@enea.com
4bf83961b8 mx6sabre_common.h: remove deprecated mmc open/close
Replace "mmc open/close" with "mmc dev" in mx6sabre_common.h as those commands
were removed with this commit: 614b2bf1c9

    cmd_mmc.c: Drop open/close mmc sub-commands

Signed-off-by: Maxin B. John <maxin.john@enea.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2015-03-13 13:25:20 +01:00
Fabio Estevam
1f9d1cf6b2 warp: Add a README file
Provide instructions on how to upgrade U-boot in the eMMC.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2015-03-13 13:23:23 +01:00
Fabio Estevam
97ee459033 warp: Add Device Firmware Upgrade support
Device Firmware Upgrade (DFU) is a very convenient mechanism to upgrade U-boot
on the eMMC.

Add support for it.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2015-03-13 13:21:35 +01:00
Fabio Estevam
1f62482eed novena: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".

Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2015-03-13 13:13:49 +01:00
Fabio Estevam
0e26afe5ce warp: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".

Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.

Cc: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
2015-03-13 13:13:49 +01:00
Fabio Estevam
f30f50987a nitrogen6x: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".

Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.

Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-03-13 13:13:49 +01:00
Fabio Estevam
161c655919 hummingboard: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".

Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-03-13 13:13:48 +01:00
Fabio Estevam
f90f480ed2 wandboard: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".

Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-03-13 13:13:48 +01:00
Fabio Estevam
e7a2e7d07e mxs: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".

Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
2015-03-13 13:13:48 +01:00
Fabio Estevam
31188d873e mx25pdk: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".

Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-03-13 13:13:48 +01:00
Fabio Estevam
ba1a107963 mx31pdk: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".

Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.

Cc: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Magnus Lilja <lilja.magnus@gmail.com>
2015-03-13 13:13:47 +01:00
Fabio Estevam
9cf38bf71d mx35pdk: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".

Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2015-03-13 13:13:47 +01:00
Fabio Estevam
8afe832abd mx51evk: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".

Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Stefano Babic <sbabic@denx.de>
2015-03-13 13:13:47 +01:00
Fabio Estevam
bc37d52afe mx53loco: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".

Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.

Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
2015-03-13 13:13:46 +01:00
Fabio Estevam
ad97075620 mx6qarm2: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".

Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.

Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
2015-03-13 13:13:45 +01:00
Fabio Estevam
9b686f3029 mx6slevk: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".

Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.

Cc: Jason Liu <r64343@freescale.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Jason Liu <r64343@freescale.com>
2015-03-13 13:13:45 +01:00
Fabio Estevam
e93a693d49 mx6sxsabresd: Use the default CONFIG_SYS_PBSIZE
Entering the maximum number of characters defined by CONFIG_SYS_CBSIZE into
the console and hitting enter afterwards, causes a hang in the system because
CONFIG_SYS_PBSIZE is not capable of storing the extra characters of the error
message:
"Unknown command '' - try 'help'".

Use the default CONFIG_SYS_PBSIZE definition from config_fallbacks.h to solve
this problem.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2015-03-13 13:13:45 +01:00
Stefano Babic
9b5b60a05c Merge branch 'master' of git://git.denx.de/u-boot 2015-03-05 16:05:10 +01:00
603 changed files with 10451 additions and 4925 deletions

79
Kbuild
View File

@@ -4,6 +4,32 @@
# 1) Generate generic-asm-offsets.h
# 2) Generate asm-offsets.h
# Default sed regexp - multiline due to syntax constraints
define sed-y
"s:[[:space:]]*\.ascii[[:space:]]*\"\(.*\)\":\1:; \
/^->/{s:->#\(.*\):/* \1 */:; \
s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \
s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \
s:->::; p;}"
endef
# Use filechk to avoid rebuilds when a header changes, but the resulting file
# does not
define filechk_offsets
(set -e; \
echo "#ifndef $2"; \
echo "#define $2"; \
echo "/*"; \
echo " * DO NOT MODIFY."; \
echo " *"; \
echo " * This file was generated by Kbuild"; \
echo " */"; \
echo ""; \
sed -ne $(sed-y); \
echo ""; \
echo "#endif" )
endef
#####
# 1) Generate generic-asm-offsets.h
@@ -12,31 +38,13 @@ generic-offsets-file := include/generated/generic-asm-offsets.h
always := $(generic-offsets-file)
targets := $(generic-offsets-file) lib/asm-offsets.s
quiet_cmd_generic-offsets = GEN $@
define cmd_generic-offsets
(set -e; \
echo "#ifndef __GENERIC_ASM_OFFSETS_H__"; \
echo "#define __GENERIC_ASM_OFFSETS_H__"; \
echo "/*"; \
echo " * DO NOT MODIFY."; \
echo " *"; \
echo " * This file was generated by Kbuild"; \
echo " *"; \
echo " */"; \
echo ""; \
sed -ne $(sed-y) $<; \
echo ""; \
echo "#endif" ) > $@
endef
# We use internal kbuild rules to avoid the "is up to date" message from make
lib/asm-offsets.s: lib/asm-offsets.c FORCE
$(Q)mkdir -p $(dir $@)
$(call if_changed_dep,cc_s_c)
$(obj)/$(generic-offsets-file): lib/asm-offsets.s Kbuild
$(Q)mkdir -p $(dir $@)
$(call cmd,generic-offsets)
$(obj)/$(generic-offsets-file): lib/asm-offsets.s FORCE
$(call filechk,offsets,__GENERIC_ASM_OFFSETS_H__)
#####
# 2) Generate asm-offsets.h
@@ -50,39 +58,12 @@ always += $(offsets-file)
targets += $(offsets-file)
targets += arch/$(ARCH)/lib/asm-offsets.s
# Default sed regexp - multiline due to syntax constraints
define sed-y
"s:[[:space:]]*\.ascii[[:space:]]*\"\(.*\)\":\1:; \
/^->/{s:->#\(.*\):/* \1 */:; \
s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \
s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \
s:->::; p;}"
endef
CFLAGS_asm-offsets.o := -DDO_DEPS_ONLY
quiet_cmd_offsets = GEN $@
define cmd_offsets
(set -e; \
echo "#ifndef __ASM_OFFSETS_H__"; \
echo "#define __ASM_OFFSETS_H__"; \
echo "/*"; \
echo " * DO NOT MODIFY."; \
echo " *"; \
echo " * This file was generated by Kbuild"; \
echo " *"; \
echo " */"; \
echo ""; \
sed -ne $(sed-y) $<; \
echo ""; \
echo "#endif" ) > $@
endef
# We use internal kbuild rules to avoid the "is up to date" message from make
arch/$(ARCH)/lib/asm-offsets.s: arch/$(ARCH)/lib/asm-offsets.c FORCE
$(Q)mkdir -p $(dir $@)
$(call if_changed_dep,cc_s_c)
$(obj)/$(offsets-file): arch/$(ARCH)/lib/asm-offsets.s Kbuild
$(call cmd,offsets)
$(obj)/$(offsets-file): arch/$(ARCH)/lib/asm-offsets.s FORCE
$(call filechk,offsets,__ASM_OFFSETS_H__)

View File

@@ -54,7 +54,7 @@ config CC_OPTIMIZE_FOR_SIZE
config SYS_MALLOC_F
bool "Enable malloc() pool before relocation"
default 0x400
default y if DM
help
Before relocation memory is very limited on many platforms. Still,
we can provide a small malloc() pool if needed. Driver model in
@@ -184,7 +184,7 @@ config SYS_TEXT_BASE
TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
config SYS_CLK_FREQ
depends on ARC
depends on ARC || ARCH_SUNXI
int "CPU clock frequency"
help
TODO: Move CONFIG_SYS_CLK_FREQ for all the architecture

View File

@@ -151,10 +151,10 @@ ARM TI
M: Tom Rini <trini@konsulko.com>
S: Maintained
T: git git://git.denx.de/u-boot-ti.git
F: arch/arm/cpu/arm926ejs/davinci/
F: arch/arm/mach-davinci/
F: arch/arm/mach-keystone/
F: arch/arm/cpu/arm926ejs/omap/
F: arch/arm/cpu/armv7/omap*/
F: arch/arm/include/asm/arch-davinci/
F: arch/arm/include/asm/arch-omap*/
F: arch/arm/include/asm/ti-common/

View File

@@ -551,13 +551,7 @@ get_target_maintainers() {
get_target_arch() {
local target=$1
# Automatic mode
local line=`awk '\$7 == "'"$target"'" { print \$0 }' boards.cfg`
if [ -z "${line}" ] ; then echo "" ; return ; fi
set ${line}
echo "$2"
awk '$7 == "'$target'" { print $2 }' boards.cfg
}
list_target() {

View File

@@ -1,7 +1,7 @@
VERSION = 2015
PATCHLEVEL = 04
SUBLEVEL =
EXTRAVERSION = -rc4
EXTRAVERSION =
NAME =
# *DOCUMENTATION*
@@ -469,10 +469,10 @@ KBUILD_DEFCONFIG := sandbox_defconfig
export KBUILD_DEFCONFIG KBUILD_KCONFIG
config: scripts_basic outputmakefile FORCE
+$(Q)$(CONFIG_SHELL) $(srctree)/scripts/multiconfig.sh $@
$(Q)$(MAKE) $(build)=scripts/kconfig $@
%config: scripts_basic outputmakefile FORCE
+$(Q)$(CONFIG_SHELL) $(srctree)/scripts/multiconfig.sh $@
$(Q)$(MAKE) $(build)=scripts/kconfig $@
else
# ===========================================================================
@@ -496,6 +496,15 @@ $(KCONFIG_CONFIG) include/config/auto.conf.cmd: ;
# we execute the config step to be sure to catch updated Kconfig files
include/config/%.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd
$(Q)$(MAKE) -f $(srctree)/Makefile silentoldconfig
@# If the following part fails, include/config/auto.conf should be
@# deleted so "make silentoldconfig" will be re-run on the next build.
$(Q)$(MAKE) -f $(srctree)/scripts/Makefile.autoconf || \
{ rm -f include/config/auto.conf; false; }
@# include/config.h has been updated after "make silentoldconfig".
@# We need to touch include/config/auto.conf so it gets newer
@# than include/config.h.
@# Otherwise, 'make silentoldconfig' would be invoked twice.
$(Q)touch include/config/auto.conf
-include include/autoconf.mk
-include include/autoconf.mk.dep
@@ -504,12 +513,16 @@ include/config/%.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd
# is up-to-date. When we switch to a different board configuration, old CONFIG
# macros are still remaining in include/config/auto.conf. Without the following
# gimmick, wrong config.mk would be included leading nasty warnings/errors.
autoconf_is_current := $(if $(wildcard $(KCONFIG_CONFIG)),$(shell find . \
-path ./include/config/auto.conf -newer $(KCONFIG_CONFIG)))
ifneq ($(autoconf_is_current),)
ifneq ($(wildcard $(KCONFIG_CONFIG)),)
ifneq ($(wildcard include/config/auto.conf),)
autoconf_is_old := $(shell find . -path ./$(KCONFIG_CONFIG) -newer \
include/config/auto.conf)
ifeq ($(autoconf_is_old),)
include $(srctree)/config.mk
include $(srctree)/arch/$(ARCH)/Makefile
endif
endif
endif
# If board code explicitly specified LDSCRIPT or CONFIG_SYS_LDSCRIPT, use
# that (or fail if absent). Otherwise, search for a linker script in a
@@ -896,6 +909,26 @@ OBJCOPYFLAGS_u-boot-with-spl.bin = -I binary -O binary \
u-boot-with-spl.bin: spl/u-boot-spl.bin $(SPL_PAYLOAD) FORCE
$(call if_changed,pad_cat)
MKIMAGEFLAGS_lpc32xx-spl.img = -T lpc32xximage -a $(CONFIG_SPL_TEXT_BASE)
lpc32xx-spl.img: spl/u-boot-spl.bin FORCE
$(call if_changed,mkimage)
OBJCOPYFLAGS_lpc32xx-boot-0.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO)
lpc32xx-boot-0.bin: lpc32xx-spl.img
$(call if_changed,objcopy)
OBJCOPYFLAGS_lpc32xx-boot-1.bin = -I binary -O binary --pad-to=$(CONFIG_SPL_PAD_TO)
lpc32xx-boot-1.bin: lpc32xx-spl.img
$(call if_changed,objcopy)
lpc32xx-full.bin: lpc32xx-boot-0.bin lpc32xx-boot-1.bin u-boot.img
$(call if_changed,cat)
CLEAN_FILES += lpc32xx-*
OBJCOPYFLAGS_u-boot-with-tpl.bin = -I binary -O binary \
--pad-to=$(CONFIG_TPL_PAD_TO)
tpl/u-boot-with-tpl.bin: tpl/u-boot-tpl.bin u-boot.bin FORCE
@@ -1154,7 +1187,7 @@ prepare2: prepare3 outputmakefile
prepare1: prepare2 $(version_h) $(timestamp_h) \
include/config/auto.conf
ifeq ($(__HAVE_ARCH_GENERIC_BOARD),)
ifeq ($(CONFIG_HAVE_GENERIC_BOARD),)
ifeq ($(CONFIG_SYS_GENERIC_BOARD),y)
@echo >&2 " Your architecture does not support generic board."
@echo >&2 " Please undefine CONFIG_SYS_GENERIC_BOARD in your board config file."

19
README
View File

@@ -3483,9 +3483,6 @@ FIT uImage format:
Adds the MTD partitioning infrastructure from the Linux
kernel. Needed for UBI support.
CONFIG_MTD_NAND_VERIFY_WRITE
verify if the written data is correct reread.
- UBI support
CONFIG_CMD_UBI
@@ -3610,6 +3607,16 @@ FIT uImage format:
CONFIG_SPL_STACK
Adress of the start of the stack SPL will use
CONFIG_SPL_PANIC_ON_RAW_IMAGE
When defined, SPL will panic() if the image it has
loaded does not have a signature.
Defining this is useful when code which loads images
in SPL cannot guarantee that absolutely all read errors
will be caught.
An example is the LPC32XX MLC NAND driver, which will
consider that a completely unreadable NAND block is bad,
and thus should be skipped silently.
CONFIG_SPL_RELOC_STACK
Adress of the start of the stack SPL will use after
relocation. If unspecified, this is equal to
@@ -4190,9 +4197,9 @@ Configuration Settings:
to this new framework over time. Defining this will disable the
arch/foo/lib/board.c file and use common/board_f.c and
common/board_r.c instead. To use this option your architecture
must support it (i.e. must define __HAVE_ARCH_GENERIC_BOARD in
its config.mk file). If you find problems enabling this option on
your board please report the problem and send patches!
must support it (i.e. must select HAVE_GENERIC_BOARD in arch/Kconfig).
If you find problems enabling this option on your board please report
the problem and send patches!
- CONFIG_OMAP_PLATFORM_RESET_TIME_MAX_USEC (OMAP only)
This is set by OMAP boards for the max time that reset should

View File

@@ -1,3 +1,10 @@
config HAVE_GENERIC_BOARD
bool
config SYS_GENERIC_BOARD
bool
depends on HAVE_GENERIC_BOARD
choice
prompt "Architecture select"
default SANDBOX
@@ -5,34 +12,49 @@ choice
config ARC
bool "ARC architecture"
select HAVE_PRIVATE_LIBGCC
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
select SUPPORT_OF_CONTROL
config ARM
bool "ARM architecture"
select HAVE_PRIVATE_LIBGCC
select HAVE_GENERIC_BOARD
select SUPPORT_OF_CONTROL
config AVR32
bool "AVR32 architecture"
select HAVE_GENERIC_BOARD
config BLACKFIN
bool "Blackfin architecture"
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
config M68K
bool "M68000 architecture"
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
config MICROBLAZE
bool "MicroBlaze architecture"
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
select SUPPORT_OF_CONTROL
config MIPS
bool "MIPS architecture"
select HAVE_PRIVATE_LIBGCC
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
config NDS32
bool "NDS32 architecture"
config NIOS2
bool "Nios II architecture"
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
config OPENRISC
bool "OpenRISC architecture"
@@ -40,10 +62,13 @@ config OPENRISC
config PPC
bool "PowerPC architecture"
select HAVE_PRIVATE_LIBGCC
select HAVE_GENERIC_BOARD
select SUPPORT_OF_CONTROL
config SANDBOX
bool "Sandbox"
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
select SUPPORT_OF_CONTROL
config SH
@@ -56,6 +81,8 @@ config SPARC
config X86
bool "x86 architecture"
select HAVE_PRIVATE_LIBGCC
select HAVE_GENERIC_BOARD
select SYS_GENERIC_BOARD
select SUPPORT_OF_CONTROL
endchoice

View File

@@ -123,7 +123,7 @@ config ARC_CACHE_LINE_SHIFT
int "Cache Line Length (as power of 2)"
range 5 7
default "6"
depends on !SYS_DCACHE_OFF || !SYS_DCACHE_OFF
depends on !SYS_DCACHE_OFF || !SYS_ICACHE_OFF
help
Starting with ARC700 4.9, Cache line length is configurable,
This option specifies "N", with Line-len = 2 power N
@@ -133,6 +133,14 @@ config ARC_CACHE_LINE_SHIFT
choice
prompt "Target select"
config TARGET_DUMMY
bool "Dummy target"
help
Please select one of real target boards below!
This target is only meant to force "makedefconfig" to put
TARGET_xxx in defconfig even this is the first target from the list
below.
config TARGET_TB100
bool "Support tb100"

View File

@@ -57,6 +57,3 @@ LDFLAGS_FINAL += -pie
# Load address for standalone apps
CONFIG_STANDALONE_LOAD_ADDR ?= 0x82000000
# Support generic board on ARC
__HAVE_ARCH_GENERIC_BOARD := y

View File

@@ -4,4 +4,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += start.o
obj-y += ivt.o

27
arch/arc/cpu/arcv1/ivt.S Normal file
View File

@@ -0,0 +1,27 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
.section .ivt, "ax",@progbits
.align 4
_ivt:
/* Critical system events */
j _start /* 0 - 0x000 */
j memory_error /* 1 - 0x008 */
j instruction_error /* 2 - 0x010 */
/* Device interrupts */
.rept 29
j interrupt_handler /* 3:31 - 0x018:0xF8 */
.endr
/* Exceptions */
j EV_MachineCheck /* 0x100, Fatal Machine check (0x20) */
j EV_TLBMissI /* 0x108, Intruction TLB miss (0x21) */
j EV_TLBMissD /* 0x110, Data TLB miss (0x22) */
j EV_TLBProtV /* 0x118, Protection Violation (0x23)
or Misaligned Access */
j EV_PrivilegeV /* 0x120, Privilege Violation (0x24) */
j EV_Trap /* 0x128, Trap exception (0x25) */
j EV_Extension /* 0x130, Extn Intruction Excp (0x26) */

View File

@@ -1,254 +0,0 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm-offsets.h>
#include <config.h>
#include <asm/arcregs.h>
/*
* Note on the LD/ST addressing modes with address register write-back
*
* LD.a same as LD.aw
*
* LD.a reg1, [reg2, x] => Pre Incr
* Eff Addr for load = [reg2 + x]
*
* LD.ab reg1, [reg2, x] => Post Incr
* Eff Addr for load = [reg2]
*/
.macro PUSH reg
st.a \reg, [%sp, -4]
.endm
.macro PUSHAX aux
lr %r9, [\aux]
PUSH %r9
.endm
.macro SAVE_R1_TO_R24
PUSH %r1
PUSH %r2
PUSH %r3
PUSH %r4
PUSH %r5
PUSH %r6
PUSH %r7
PUSH %r8
PUSH %r9
PUSH %r10
PUSH %r11
PUSH %r12
PUSH %r13
PUSH %r14
PUSH %r15
PUSH %r16
PUSH %r17
PUSH %r18
PUSH %r19
PUSH %r20
PUSH %r21
PUSH %r22
PUSH %r23
PUSH %r24
.endm
.macro SAVE_ALL_SYS
/* saving %r0 to reg->r0 in advance since we read %ecr into it */
st %r0, [%sp, -8]
lr %r0, [%ecr] /* all stack addressing is manual so far */
st %r0, [%sp]
st %sp, [%sp, -4]
/* now move %sp to reg->r0 position so we can do "push" automatically */
sub %sp, %sp, 8
SAVE_R1_TO_R24
PUSH %r25
PUSH %gp
PUSH %fp
PUSH %blink
PUSHAX %eret
PUSHAX %erstatus
PUSH %lp_count
PUSHAX %lp_end
PUSHAX %lp_start
PUSHAX %erbta
.endm
.macro SAVE_EXCEPTION_SOURCE
#ifdef CONFIG_MMU
/* If MMU exists exception faulting address is loaded in EFA reg */
lr %r0, [%efa]
#else
/* Otherwise in ERET (exception return) reg */
lr %r0, [%eret]
#endif
.endm
.section .ivt, "ax",@progbits
.align 4
_ivt:
/* Critical system events */
j _start /* 0 - 0x000 */
j memory_error /* 1 - 0x008 */
j instruction_error /* 2 - 0x010 */
/* Device interrupts */
.rept 29
j interrupt_handler /* 3:31 - 0x018:0xF8 */
.endr
/* Exceptions */
j EV_MachineCheck /* 0x100, Fatal Machine check (0x20) */
j EV_TLBMissI /* 0x108, Intruction TLB miss (0x21) */
j EV_TLBMissD /* 0x110, Data TLB miss (0x22) */
j EV_TLBProtV /* 0x118, Protection Violation (0x23)
or Misaligned Access */
j EV_PrivilegeV /* 0x120, Privilege Violation (0x24) */
j EV_Trap /* 0x128, Trap exception (0x25) */
j EV_Extension /* 0x130, Extn Intruction Excp (0x26) */
.text
.globl _start
_start:
/* Setup interrupt vector base that matches "__text_start" */
sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
/* Setup stack pointer */
mov %sp, CONFIG_SYS_INIT_SP_ADDR
mov %fp, %sp
/* Clear bss */
mov %r0, __bss_start
mov %r1, __bss_end
clear_bss:
st.ab 0, [%r0, 4]
brlt %r0, %r1, clear_bss
/* Zero the one and only argument of "board_init_f" */
mov_s %r0, 0
j board_init_f
memory_error:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_memory_error
instruction_error:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_instruction_error
interrupt_handler:
/* Todo - save and restore CPU context when interrupts will be in use */
bl do_interrupt_handler
rtie
EV_MachineCheck:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_machine_check_fault
EV_TLBMissI:
SAVE_ALL_SYS
mov %r0, %sp
j do_itlb_miss
EV_TLBMissD:
SAVE_ALL_SYS
mov %r0, %sp
j do_dtlb_miss
EV_TLBProtV:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_tlb_prot_violation
EV_PrivilegeV:
SAVE_ALL_SYS
mov %r0, %sp
j do_privilege_violation
EV_Trap:
SAVE_ALL_SYS
mov %r0, %sp
j do_trap
EV_Extension:
SAVE_ALL_SYS
mov %r0, %sp
j do_extension
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
* r0 = start_addr_sp
* r1 = new__gd
* r2 = relocaddr
*/
.align 4
.globl relocate_code
relocate_code:
/*
* r0-r12 might be clobbered by C functions
* so we use r13-r16 for storage here
*/
mov %r13, %r0 /* save addr_sp */
mov %r14, %r1 /* save addr of gd */
mov %r15, %r2 /* save addr of destination */
mov %r16, %r2 /* %r9 - relocation offset */
sub %r16, %r16, __image_copy_start
/* Set up the stack */
stack_setup:
mov %sp, %r13
mov %fp, %sp
/* Check if monitor is loaded right in place for relocation */
mov %r0, __image_copy_start
cmp %r0, %r15 /* skip relocation if code loaded */
bz do_board_init_r /* in target location already */
/* Copy data (__image_copy_start - __image_copy_end) to new location */
mov %r1, %r15
mov %r2, __image_copy_end
sub %r2, %r2, %r0 /* r3 <- amount of bytes to copy */
asr %r2, %r2, 2 /* r3 <- amount of words to copy */
mov %lp_count, %r2
lp copy_end
ld.ab %r2,[%r0,4]
st.ab %r2,[%r1,4]
copy_end:
/* Fix relocations related issues */
bl do_elf_reloc_fixups
#ifndef CONFIG_SYS_ICACHE_OFF
bl invalidate_icache_all
#endif
#ifndef CONFIG_SYS_DCACHE_OFF
bl flush_dcache_all
#endif
/* Update position of intterupt vector table */
lr %r0, [ARC_AUX_INTR_VEC_BASE] /* Read current position */
add %r0, %r0, %r16 /* Update address */
sr %r0, [ARC_AUX_INTR_VEC_BASE] /* Write new position */
do_board_init_r:
/* Prepare for exection of "board_init_r" in relocated monitor */
mov %r2, board_init_r /* old address of "board_init_r()" */
add %r2, %r2, %r16 /* new address of "board_init_r()" */
mov %r0, %r14 /* 1-st parameter: gd_t */
mov %r1, %r15 /* 2-nd parameter: dest_addr */
j [%r2]

View File

@@ -4,4 +4,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += start.o
obj-y += ivt.o

27
arch/arc/cpu/arcv2/ivt.S Normal file
View File

@@ -0,0 +1,27 @@
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
.section .ivt, "a",@progbits
.align 4
/* Critical system events */
.word _start /* 0 - 0x000 */
.word memory_error /* 1 - 0x008 */
.word instruction_error /* 2 - 0x010 */
/* Exceptions */
.word EV_MachineCheck /* 0x100, Fatal Machine check (0x20) */
.word EV_TLBMissI /* 0x108, Intruction TLB miss (0x21) */
.word EV_TLBMissD /* 0x110, Data TLB miss (0x22) */
.word EV_TLBProtV /* 0x118, Protection Violation (0x23)
or Misaligned Access */
.word EV_PrivilegeV /* 0x120, Privilege Violation (0x24) */
.word EV_Trap /* 0x128, Trap exception (0x25) */
.word EV_Extension /* 0x130, Extn Intruction Excp (0x26) */
/* Device interrupts */
.rept 29
j interrupt_handler /* 3:31 - 0x018:0xF8 */
.endr

View File

@@ -1,254 +0,0 @@
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm-offsets.h>
#include <config.h>
#include <asm/arcregs.h>
/*
* Note on the LD/ST addressing modes with address register write-back
*
* LD.a same as LD.aw
*
* LD.a reg1, [reg2, x] => Pre Incr
* Eff Addr for load = [reg2 + x]
*
* LD.ab reg1, [reg2, x] => Post Incr
* Eff Addr for load = [reg2]
*/
.macro PUSH reg
st.a \reg, [%sp, -4]
.endm
.macro PUSHAX aux
lr %r9, [\aux]
PUSH %r9
.endm
.macro SAVE_R1_TO_R24
PUSH %r1
PUSH %r2
PUSH %r3
PUSH %r4
PUSH %r5
PUSH %r6
PUSH %r7
PUSH %r8
PUSH %r9
PUSH %r10
PUSH %r11
PUSH %r12
PUSH %r13
PUSH %r14
PUSH %r15
PUSH %r16
PUSH %r17
PUSH %r18
PUSH %r19
PUSH %r20
PUSH %r21
PUSH %r22
PUSH %r23
PUSH %r24
.endm
.macro SAVE_ALL_SYS
/* saving %r0 to reg->r0 in advance since weread %ecr into it */
st %r0, [%sp, -8]
lr %r0, [%ecr] /* all stack addressing is manual so far */
st %r0, [%sp]
st %sp, [%sp, -4]
/* now move %sp to reg->r0 position so we can do "push" automatically */
sub %sp, %sp, 8
SAVE_R1_TO_R24
PUSH %r25
PUSH %gp
PUSH %fp
PUSH %blink
PUSHAX %eret
PUSHAX %erstatus
PUSH %lp_count
PUSHAX %lp_end
PUSHAX %lp_start
PUSHAX %erbta
.endm
.macro SAVE_EXCEPTION_SOURCE
#ifdef CONFIG_MMU
/* If MMU exists exception faulting address is loaded in EFA reg */
lr %r0, [%efa]
#else
/* Otherwise in ERET (exception return) reg */
lr %r0, [%eret]
#endif
.endm
.section .ivt, "a",@progbits
.align 4
/* Critical system events */
.word _start /* 0 - 0x000 */
.word memory_error /* 1 - 0x008 */
.word instruction_error /* 2 - 0x010 */
/* Exceptions */
.word EV_MachineCheck /* 0x100, Fatal Machine check (0x20) */
.word EV_TLBMissI /* 0x108, Intruction TLB miss (0x21) */
.word EV_TLBMissD /* 0x110, Data TLB miss (0x22) */
.word EV_TLBProtV /* 0x118, Protection Violation (0x23)
or Misaligned Access */
.word EV_PrivilegeV /* 0x120, Privilege Violation (0x24) */
.word EV_Trap /* 0x128, Trap exception (0x25) */
.word EV_Extension /* 0x130, Extn Intruction Excp (0x26) */
/* Device interrupts */
.rept 29
j interrupt_handler /* 3:31 - 0x018:0xF8 */
.endr
.text
.globl _start
_start:
/* Setup interrupt vector base that matches "__text_start" */
sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
/* Setup stack pointer */
mov %sp, CONFIG_SYS_INIT_SP_ADDR
mov %fp, %sp
/* Clear bss */
mov %r0, __bss_start
mov %r1, __bss_end
clear_bss:
st.ab 0, [%r0, 4]
brlt %r0, %r1, clear_bss
/* Zero the one and only argument of "board_init_f" */
mov_s %r0, 0
j board_init_f
memory_error:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_memory_error
instruction_error:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_instruction_error
interrupt_handler:
/* Todo - save and restore CPU context when interrupts will be in use */
bl do_interrupt_handler
rtie
EV_MachineCheck:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_machine_check_fault
EV_TLBMissI:
SAVE_ALL_SYS
mov %r0, %sp
j do_itlb_miss
EV_TLBMissD:
SAVE_ALL_SYS
mov %r0, %sp
j do_dtlb_miss
EV_TLBProtV:
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_tlb_prot_violation
EV_PrivilegeV:
SAVE_ALL_SYS
mov %r0, %sp
j do_privilege_violation
EV_Trap:
SAVE_ALL_SYS
mov %r0, %sp
j do_trap
EV_Extension:
SAVE_ALL_SYS
mov %r0, %sp
j do_extension
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
* r0 = start_addr_sp
* r1 = new__gd
* r2 = relocaddr
*/
.align 4
.globl relocate_code
relocate_code:
/*
* r0-r12 might be clobbered by C functions
* so we use r13-r16 for storage here
*/
mov %r13, %r0 /* save addr_sp */
mov %r14, %r1 /* save addr of gd */
mov %r15, %r2 /* save addr of destination */
mov %r16, %r2 /* %r9 - relocation offset */
sub %r16, %r16, __image_copy_start
/* Set up the stack */
stack_setup:
mov %sp, %r13
mov %fp, %sp
/* Check if monitor is loaded right in place for relocation */
mov %r0, __image_copy_start
cmp %r0, %r15 /* skip relocation if code loaded */
bz do_board_init_r /* in target location already */
/* Copy data (__image_copy_start - __image_copy_end) to new location */
mov %r1, %r15
mov %r2, __image_copy_end
sub %r2, %r2, %r0 /* r3 <- amount of bytes to copy */
asr %r2, %r2, 2 /* r3 <- amount of words to copy */
mov %lp_count, %r2
lp copy_end
ld.ab %r2,[%r0,4]
st.ab %r2,[%r1,4]
copy_end:
/* Fix relocations related issues */
bl do_elf_reloc_fixups
#ifndef CONFIG_SYS_ICACHE_OFF
bl invalidate_icache_all
#endif
#ifndef CONFIG_SYS_DCACHE_OFF
bl flush_dcache_all
#endif
/* Update position of intterupt vector table */
lr %r0, [ARC_AUX_INTR_VEC_BASE] /* Read current position */
add %r0, %r0, %r16 /* Update address */
sr %r0, [ARC_AUX_INTR_VEC_BASE] /* Write new position */
do_board_init_r:
/* Prepare for exection of "board_init_r" in relocated monitor */
mov %r2, board_init_r /* old address of "board_init_r()" */
add %r2, %r2, %r16 /* new address of "board_init_r()" */
mov %r0, %r14 /* 1-st parameter: gd_t */
mov %r1, %r15 /* 2-nd parameter: dest_addr */
j [%r2]

View File

@@ -13,6 +13,7 @@ SECTIONS
.text : {
*(.__text_start)
*(.__image_copy_start)
arch/arc/lib/start.o (.text*)
*(.text*)
}

12
arch/arc/dts/Makefile Normal file
View File

@@ -0,0 +1,12 @@
dtb-$(CONFIG_TARGET_ARCANGEL4) += arcangel4.dtb
dtb-$(CONFIG_TARGET_TB100) += abilis_tb100.dtb
targets += $(dtb-y)
DTC_FLAGS += -R 4 -p 0x1000
PHONY += dtbs
dtbs: $(addprefix $(obj)/, $(dtb-y))
@:
clean-files := *.dtb

View File

@@ -0,0 +1,24 @@
/*
* Copyright (C) 2015 Synopsys, Inc. (www.synopsys.com)
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
};
uart0: serial@ff100000 {
compatible = "snps,dw-apb-uart";
reg = <0xff100000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
};

View File

@@ -0,0 +1,24 @@
/*
* Copyright (C) 2015 Synopsys, Inc. (www.synopsys.com)
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "skeleton.dtsi"
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &arcuart0;
};
arcuart0: serial@0xc0fc1000 {
compatible = "snps,arc-uart";
reg = <0xc0fc1000 0x100>;
clock-frequency = <80000000>;
};
};

View File

@@ -0,0 +1,13 @@
/*
* Skeleton device tree; the bare minimum needed to boot; just include and
* add a compatible value. The bootloader will typically populate the memory
* node.
*/
/ {
#address-cells = <1>;
#size-cells = <1>;
chosen { };
aliases { };
memory { device_type = "memory"; reg = <0 0>; };
};

View File

@@ -46,6 +46,10 @@
#define ARC_AUX_DC_PTAG 0x5C
#endif
#define ARC_BCR_DC_BUILD 0x72
#define ARC_BCR_SLC 0xce
#define ARC_AUX_SLC_CONTROL 0x903
#define ARC_AUX_SLC_FLUSH 0x904
#define ARC_AUX_SLC_INVALIDATE 0x905
#ifndef __ASSEMBLY__
/* Accessors for auxiliary registers */

View File

@@ -27,4 +27,15 @@
#define CONFIG_ARC_MMU_VER 4
#endif
#ifndef __ASSEMBLY__
#ifdef CONFIG_ISA_ARCV2
void slc_enable(void);
void slc_disable(void);
void slc_flush(void);
void slc_invalidate(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __ASM_ARC_CACHE_H */

View File

@@ -7,8 +7,6 @@
#ifndef __ASM_ARC_CONFIG_H_
#define __ASM_ARC_CONFIG_H_
#define CONFIG_SYS_GENERIC_BOARD
#define CONFIG_SYS_GENERIC_GLOBAL_DATA
#define CONFIG_SYS_BOOT_RAMDISK_HIGH
#define CONFIG_ARCH_EARLY_INIT_R

View File

@@ -0,0 +1,12 @@
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _ASM_ARC_INIT_HELPERS_H
#define _ASM_ARC_INIT_HELPERS_H
int init_cache_f_r(void);
#endif /* _ASM_ARC_INIT_HELPERS_H */

View File

@@ -0,0 +1,16 @@
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#ifndef _ASM_ARC_RELOCATE_H
#define _ASM_ARC_RELOCATE_H
#include <common.h>
int copy_uboot_to_ram(void);
int clear_bss(void);
int do_elf_reloc_fixups(void);
#endif /* _ASM_ARC_RELOCATE_H */

View File

@@ -9,4 +9,7 @@
int arch_early_init_r(void);
void board_init_f_r_trampoline(ulong) __attribute__ ((noreturn));
void board_init_f_r(void) __attribute__ ((noreturn));
#endif /* __ASM_ARC_U_BOOT_ARC_H__ */

View File

@@ -4,6 +4,8 @@
# SPDX-License-Identifier: GPL-2.0+
#
extra-y = start.o
head-y := start.o
obj-y += cache.o
obj-y += cpu.o
obj-y += interrupts.o
@@ -18,6 +20,8 @@ obj-y += memcpy-700.o
obj-y += memset.o
obj-y += reset.o
obj-y += timer.o
obj-y += ints_low.o
obj-y += init_helpers.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o

View File

@@ -16,6 +16,7 @@
#define DC_CTRL_INV_MODE_FLUSH (1 << 6)
#define DC_CTRL_FLUSH_STATUS (1 << 8)
#define CACHE_VER_NUM_MASK 0xF
#define SLC_CTRL_SB (1 << 2)
int icache_status(void)
{
@@ -49,10 +50,12 @@ void icache_disable(void)
void invalidate_icache_all(void)
{
#ifndef CONFIG_SYS_ICACHE_OFF
/* If no cache in CPU exit immediately */
if (!(read_aux_reg(ARC_BCR_IC_BUILD) & CACHE_VER_NUM_MASK))
return;
/* Any write to IC_IVIC register triggers invalidation of entire I$ */
write_aux_reg(ARC_AUX_IC_IVIC, 1);
#endif /* CONFIG_SYS_ICACHE_OFF */
}
int dcache_status(void)
@@ -156,13 +159,60 @@ void invalidate_dcache_range(unsigned long start, unsigned long end)
void invalidate_dcache_all(void)
{
#ifndef CONFIG_SYS_DCACHE_OFF
/* If no cache in CPU exit immediately */
if (!(read_aux_reg(ARC_BCR_DC_BUILD) & CACHE_VER_NUM_MASK))
return;
/* Write 1 to DC_IVDC register triggers invalidation of entire D$ */
write_aux_reg(ARC_AUX_DC_IVDC, 1);
#endif /* CONFIG_SYS_DCACHE_OFF */
}
void flush_cache(unsigned long start, unsigned long size)
{
flush_dcache_range(start, start + size);
}
#ifdef CONFIG_ISA_ARCV2
void slc_enable(void)
{
/* If SLC ver = 0, no SLC present in CPU */
if (!(read_aux_reg(ARC_BCR_SLC) & 0xff))
return;
write_aux_reg(ARC_AUX_SLC_CONTROL,
read_aux_reg(ARC_AUX_SLC_CONTROL) & ~1);
}
void slc_disable(void)
{
/* If SLC ver = 0, no SLC present in CPU */
if (!(read_aux_reg(ARC_BCR_SLC) & 0xff))
return;
write_aux_reg(ARC_AUX_SLC_CONTROL,
read_aux_reg(ARC_AUX_SLC_CONTROL) | 1);
}
void slc_flush(void)
{
/* If SLC ver = 0, no SLC present in CPU */
if (!(read_aux_reg(ARC_BCR_SLC) & 0xff))
return;
write_aux_reg(ARC_AUX_SLC_FLUSH, 1);
/* Wait flush end */
while (read_aux_reg(ARC_AUX_SLC_CONTROL) & SLC_CTRL_SB)
;
}
void slc_invalidate(void)
{
/* If SLC ver = 0, no SLC present in CPU */
if (!(read_aux_reg(ARC_BCR_SLC) & 0xff))
return;
write_aux_reg(ARC_AUX_SLC_INVALIDATE, 1);
}
#endif /* CONFIG_ISA_ARCV2 */

View File

@@ -12,19 +12,6 @@ DECLARE_GLOBAL_DATA_PTR;
int arch_cpu_init(void)
{
#ifdef CONFIG_SYS_ICACHE_OFF
icache_disable();
#else
icache_enable();
invalidate_icache_all();
#endif
flush_dcache_all();
#ifdef CONFIG_SYS_DCACHE_OFF
dcache_disable();
#else
dcache_enable();
#endif
timer_init();
/* In simulation (ISS) "CHIPID" and "ARCNUM" are all "ff" */

View File

@@ -0,0 +1,25 @@
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
DECLARE_GLOBAL_DATA_PTR;
int init_cache_f_r(void)
{
#ifndef CONFIG_SYS_ICACHE_OFF
icache_enable();
/* Make sure no stale entries persist from before we disabled cache */
invalidate_icache_all();
#endif
#ifndef CONFIG_SYS_DCACHE_OFF
dcache_enable();
/* Make sure no stale entries persist from before we disabled cache */
invalidate_dcache_all();
#endif
return 0;
}

151
arch/arc/lib/ints_low.S Normal file
View File

@@ -0,0 +1,151 @@
/*
* Copyright (C) 2013-2015 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <linux/linkage.h>
/*
* Note on the LD/ST addressing modes with address register write-back
*
* LD.a same as LD.aw
*
* LD.a reg1, [reg2, x] => Pre Incr
* Eff Addr for load = [reg2 + x]
*
* LD.ab reg1, [reg2, x] => Post Incr
* Eff Addr for load = [reg2]
*/
.macro PUSH reg
st.a \reg, [%sp, -4]
.endm
.macro PUSHAX aux
lr %r9, [\aux]
PUSH %r9
.endm
.macro SAVE_R1_TO_R24
PUSH %r1
PUSH %r2
PUSH %r3
PUSH %r4
PUSH %r5
PUSH %r6
PUSH %r7
PUSH %r8
PUSH %r9
PUSH %r10
PUSH %r11
PUSH %r12
PUSH %r13
PUSH %r14
PUSH %r15
PUSH %r16
PUSH %r17
PUSH %r18
PUSH %r19
PUSH %r20
PUSH %r21
PUSH %r22
PUSH %r23
PUSH %r24
.endm
.macro SAVE_ALL_SYS
/* saving %r0 to reg->r0 in advance since we read %ecr into it */
st %r0, [%sp, -8]
lr %r0, [%ecr] /* all stack addressing is manual so far */
st %r0, [%sp]
st %sp, [%sp, -4]
/* now move %sp to reg->r0 position so we can do "push" automatically */
sub %sp, %sp, 8
SAVE_R1_TO_R24
PUSH %r25
PUSH %gp
PUSH %fp
PUSH %blink
PUSHAX %eret
PUSHAX %erstatus
PUSH %lp_count
PUSHAX %lp_end
PUSHAX %lp_start
PUSHAX %erbta
.endm
.macro SAVE_EXCEPTION_SOURCE
#ifdef CONFIG_MMU
/* If MMU exists exception faulting address is loaded in EFA reg */
lr %r0, [%efa]
#else
/* Otherwise in ERET (exception return) reg */
lr %r0, [%eret]
#endif
.endm
ENTRY(memory_error)
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_memory_error
ENDPROC(memory_error)
ENTRY(instruction_error)
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_instruction_error
ENDPROC(instruction_error)
ENTRY(interrupt_handler)
/* Todo - save and restore CPU context when interrupts will be in use */
bl do_interrupt_handler
rtie
ENDPROC(interrupt_handler)
ENTRY(EV_MachineCheck)
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_machine_check_fault
ENDPROC(EV_MachineCheck)
ENTRY(EV_TLBMissI)
SAVE_ALL_SYS
mov %r0, %sp
j do_itlb_miss
ENDPROC(EV_TLBMissI)
ENTRY(EV_TLBMissD)
SAVE_ALL_SYS
mov %r0, %sp
j do_dtlb_miss
ENDPROC(EV_TLBMissD)
ENTRY(EV_TLBProtV)
SAVE_ALL_SYS
SAVE_EXCEPTION_SOURCE
mov %r1, %sp
j do_tlb_prot_violation
ENDPROC(EV_TLBProtV)
ENTRY(EV_PrivilegeV)
SAVE_ALL_SYS
mov %r0, %sp
j do_privilege_violation
ENDPROC(EV_PrivilegeV)
ENTRY(EV_Trap)
SAVE_ALL_SYS
mov %r0, %sp
j do_trap
ENDPROC(EV_Trap)
ENTRY(EV_Extension)
SAVE_ALL_SYS
mov %r0, %sp
j do_extension
ENDPROC(EV_Extension)

View File

@@ -10,6 +10,25 @@
DECLARE_GLOBAL_DATA_PTR;
int copy_uboot_to_ram(void)
{
size_t len = (size_t)&__image_copy_end - (size_t)&__image_copy_start;
memcpy((void *)gd->relocaddr, (void *)&__image_copy_start, len);
return 0;
}
int clear_bss(void)
{
ulong dst_addr = (ulong)&__bss_start + gd->reloc_off;
size_t len = (size_t)&__bss_end - (size_t)&__bss_start;
memset((void *)dst_addr, 0x00, len);
return 0;
}
/*
* Base functionality is taken from x86 version with added ARC-specifics
*/

63
arch/arc/lib/start.S Normal file
View File

@@ -0,0 +1,63 @@
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <asm-offsets.h>
#include <config.h>
#include <linux/linkage.h>
#include <asm/arcregs.h>
ENTRY(_start)
/* Setup interrupt vector base that matches "__text_start" */
sr __ivt_start, [ARC_AUX_INTR_VEC_BASE]
/* Setup stack- and frame-pointers */
mov %sp, CONFIG_SYS_INIT_SP_ADDR
mov %fp, %sp
/* Unconditionally disable caches */
#ifdef CONFIG_ISA_ARCV2
bl slc_flush
bl slc_disable
#endif
bl flush_dcache_all
bl dcache_disable
bl icache_disable
/* Allocate and zero GD, update SP */
mov %r0, %sp
bl board_init_f_mem
/* Update stack- and frame-pointers */
mov %sp, %r0
mov %fp, %sp
/* Zero the one and only argument of "board_init_f" */
mov_s %r0, 0
j board_init_f
ENDPROC(_start)
/*
* void board_init_f_r_trampoline(stack-pointer address)
*
* This "function" does not return, instead it continues in RAM
* after relocating the monitor code.
*
* r0 = new stack-pointer
*/
ENTRY(board_init_f_r_trampoline)
/* Set up the stack- and frame-pointers */
mov %sp, %r0
mov %fp, %sp
/* Update position of intterupt vector table */
lr %r0, [ARC_AUX_INTR_VEC_BASE]
ld %r1, [%r25, GD_RELOC_OFF]
add %r0, %r0, %r1
sr %r0, [ARC_AUX_INTR_VEC_BASE]
/* Re-enter U-Boot by calling board_init_f_r */
j board_init_f_r
ENDPROC(board_init_f_r_trampoline)

View File

@@ -132,6 +132,11 @@ config TARGET_DEVKIT3250
bool "Support devkit3250"
select CPU_ARM926EJS
config TARGET_WORK_92105
bool "Support work_92105"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_MX25PDK
bool "Support mx25pdk"
select CPU_ARM926EJS
@@ -286,13 +291,8 @@ config TARGET_MX35PDK
bool "Support mx35pdk"
select CPU_ARM1136
config TARGET_RPI
bool "Support rpi"
select CPU_ARM1176
config TARGET_RPI_2
bool "Support rpi_2"
select CPU_V7
config ARCH_BCM283X
bool "Broadcom BCM283X family"
config TARGET_INTEGRATORAP_CM946ES
bool "Support integratorap_cm946es"
@@ -433,6 +433,14 @@ config ARCH_KEYSTONE
select CPU_V7
select SUPPORT_SPL
config ARCH_MX6
bool "Freescale MX6"
select CPU_V7
config ARCH_MX5
bool "Freescale MX5"
select CPU_V7
config TARGET_M53EVK
bool "Support m53evk"
select CPU_V7
@@ -723,9 +731,9 @@ endchoice
source "arch/arm/mach-at91/Kconfig"
source "arch/arm/mach-davinci/Kconfig"
source "arch/arm/mach-bcm283x/Kconfig"
source "arch/arm/cpu/arm1176/bcm2835/Kconfig"
source "arch/arm/mach-davinci/Kconfig"
source "arch/arm/cpu/armv7/exynos/Kconfig"
@@ -735,6 +743,10 @@ source "arch/arm/mach-keystone/Kconfig"
source "arch/arm/mach-kirkwood/Kconfig"
source "arch/arm/cpu/armv7/mx6/Kconfig"
source "arch/arm/cpu/armv7/mx5/Kconfig"
source "arch/arm/mach-nomadik/Kconfig"
source "arch/arm/cpu/armv7/omap3/Kconfig"
@@ -761,6 +773,8 @@ source "arch/arm/cpu/armv7/Kconfig"
source "arch/arm/cpu/armv8/Kconfig"
source "arch/arm/imx-common/Kconfig"
source "board/aristainetos/Kconfig"
source "board/BuR/kwb/Kconfig"
source "board/BuR/tseries/Kconfig"
@@ -834,8 +848,6 @@ source "board/palmtreo680/Kconfig"
source "board/phytec/pcm051/Kconfig"
source "board/ppcag/bg0900/Kconfig"
source "board/pxa255_idp/Kconfig"
source "board/raspberrypi/rpi/Kconfig"
source "board/raspberrypi/rpi_2/Kconfig"
source "board/samsung/smdk2410/Kconfig"
source "board/sandisk/sansa_fuze_plus/Kconfig"
source "board/scb9328/Kconfig"
@@ -871,6 +883,7 @@ source "board/vpac270/Kconfig"
source "board/wandboard/Kconfig"
source "board/warp/Kconfig"
source "board/woodburn/Kconfig"
source "board/work-microwave/work_92105/Kconfig"
source "board/xaeniax/Kconfig"
source "board/xilinx/zynqmp/Kconfig"
source "board/zipitz2/Kconfig"

View File

@@ -2,9 +2,47 @@
# SPDX-License-Identifier: GPL-2.0+
#
ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TEGRA),yy)
CONFIG_CPU_V7=
CONFIG_CPU_ARM720T=y
endif
# This selects which instruction set is used.
arch-$(CONFIG_CPU_ARM720T) =-march=armv4
arch-$(CONFIG_CPU_ARM920T) =-march=armv4
arch-$(CONFIG_CPU_ARM926EJS) =-march=armv5te
arch-$(CONFIG_CPU_ARM946ES) =-march=armv4
arch-$(CONFIG_CPU_SA1100) =-march=armv4
arch-$(CONFIG_CPU_PXA) =
arch-$(CONFIG_CPU_ARM1136) =-march=armv5
arch-$(CONFIG_CPU_ARM1176) =-march=armv5t
arch-$(CONFIG_CPU_V7) =$(call cc-option, -march=armv7-a, -march=armv5)
arch-$(CONFIG_ARM64) =-march=armv8-a
# Evaluate arch cc-option calls now
arch-y := $(arch-y)
# This selects how we optimise for the processor.
tune-$(CONFIG_CPU_ARM720T) =-mtune=arm7tdmi
tune-$(CONFIG_CPU_ARM920T) =
tune-$(CONFIG_CPU_ARM926EJS) =
tune-$(CONFIG_CPU_ARM946ES) =
tune-$(CONFIG_CPU_SA1100) =-mtune=strongarm1100
tune-$(CONFIG_CPU_PXA) =-mcpu=xscale
tune-$(CONFIG_CPU_ARM1136) =
tune-$(CONFIG_CPU_ARM1176) =
tune-$(CONFIG_CPU_V7) =
tune-$(CONFIG_ARM64) =
# Evaluate tune cc-option calls now
tune-y := $(tune-y)
PLATFORM_CPPFLAGS += $(arch-y) $(tune-y)
# Machine directory name. This list is sorted alphanumerically
# by CONFIG_* macro name.
machine-$(CONFIG_ARCH_AT91) += at91
machine-$(CONFIG_ARCH_BCM283X) += bcm283x
machine-$(CONFIG_ARCH_DAVINCI) += davinci
machine-$(CONFIG_ARCH_HIGHBANK) += highbank
machine-$(CONFIG_ARCH_KEYSTONE) += keystone

View File

@@ -19,9 +19,6 @@ PLATFORM_RELFLAGS += -ffunction-sections -fdata-sections \
PLATFORM_RELFLAGS += $(call cc-option, -msoft-float) \
$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
# Support generic board on ARM
__HAVE_ARCH_GENERIC_BOARD := y
PLATFORM_CPPFLAGS += -D__ARM__
# Choose between ARM/Thumb instruction sets

View File

@@ -1,9 +0,0 @@
#
# (C) Copyright 2002
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
#
# SPDX-License-Identifier: GPL-2.0+
#
# Make ARMv5 to allow more compilers to work, even though its v6.
PLATFORM_CPPFLAGS += -march=armv5

View File

@@ -14,7 +14,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
/*
*************************************************************************

View File

@@ -10,5 +10,3 @@
extra-y = start.o
obj-y = cpu.o
obj-$(CONFIG_BCM2835) += bcm2835/

View File

@@ -1,12 +0,0 @@
if TARGET_RPI || TARGET_RPI_2
config DM
default y
config DM_SERIAL
default y
config DM_GPIO
default y
endif

View File

@@ -1,9 +0,0 @@
#
# (C) Copyright 2002
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
#
# SPDX-License-Identifier: GPL-2.0+
#
# Make ARMv5 to allow more compilers to work, even though its v6.
PLATFORM_CPPFLAGS += -march=armv5t

View File

@@ -16,7 +16,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
#ifndef CONFIG_SYS_PHY_UBOOT_BASE
#define CONFIG_SYS_PHY_UBOOT_BASE CONFIG_SYS_UBOOT_BASE

View File

@@ -1,9 +0,0 @@
#
# (C) Copyright 2002
# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
# Marius Groeger <mgroeger@sysgo.de>
#
# SPDX-License-Identifier: GPL-2.0+
#
PLATFORM_CPPFLAGS += -march=armv4 -mtune=arm7tdmi

View File

@@ -9,7 +9,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
#include <asm/hardware.h>
/*

View File

@@ -1,8 +0,0 @@
#
# (C) Copyright 2002
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
#
# SPDX-License-Identifier: GPL-2.0+
#
PLATFORM_CPPFLAGS += -march=armv4

View File

@@ -1,8 +0,0 @@
#
# (C) Copyright 2002
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
#
# SPDX-License-Identifier: GPL-2.0+
#
PLATFORM_CPPFLAGS += -march=armv5te

View File

@@ -6,3 +6,5 @@
#
obj-y = cpu.o clk.o devices.o timer.o
obj-$(CONFIG_SPL_BUILD) += dram.o lowlevel_init.o

View File

@@ -98,6 +98,40 @@ unsigned int get_periph_clk_rate(void)
return get_hclk_pll_rate() / get_periph_clk_div();
}
unsigned int get_sdram_clk_rate(void)
{
unsigned int src_clk;
if (!(readl(&clk->pwr_ctrl) & CLK_PWR_NORMAL_RUN))
return get_sys_clk_rate();
src_clk = get_hclk_pll_rate();
if (readl(&clk->sdramclk_ctrl) & CLK_SDRAM_DDR_SEL) {
/* using DDR */
switch (readl(&clk->hclkdiv_ctrl) & CLK_HCLK_DDRAM_MASK) {
case CLK_HCLK_DDRAM_HALF:
return src_clk/2;
case CLK_HCLK_DDRAM_NOMINAL:
return src_clk;
default:
return 0;
}
} else {
/* using SDR */
switch (readl(&clk->hclkdiv_ctrl) & CLK_HCLK_ARM_PLL_DIV_MASK) {
case CLK_HCLK_ARM_PLL_DIV_4:
return src_clk/4;
case CLK_HCLK_ARM_PLL_DIV_2:
return src_clk/2;
case CLK_HCLK_ARM_PLL_DIV_1:
return src_clk;
default:
return 0;
}
}
}
int get_serial_clock(void)
{
return get_periph_clk_rate();

View File

@@ -5,9 +5,11 @@
*/
#include <common.h>
#include <netdev.h>
#include <asm/arch/cpu.h>
#include <asm/arch/clk.h>
#include <asm/arch/wdt.h>
#include <asm/arch/sys_proto.h>
#include <asm/io.h>
static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
@@ -55,3 +57,11 @@ int print_cpuinfo(void)
return 0;
}
#endif
#ifdef CONFIG_LPC32XX_ETH
int cpu_eth_init(bd_t *bis)
{
lpc32xx_eth_initialize(bis);
return 0;
}
#endif

View File

@@ -8,10 +8,13 @@
#include <asm/arch/cpu.h>
#include <asm/arch/clk.h>
#include <asm/arch/uart.h>
#include <asm/arch/mux.h>
#include <asm/io.h>
#include <dm.h>
static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
static struct uart_ctrl_regs *ctrl = (struct uart_ctrl_regs *)UART_CTRL_BASE;
static struct mux_regs *mux = (struct mux_regs *)MUX_BASE;
void lpc32xx_uart_init(unsigned int uart_id)
{
@@ -37,3 +40,43 @@ void lpc32xx_uart_init(unsigned int uart_id)
writel(CLK_UART_X_DIV(1) | CLK_UART_Y_DIV(1),
&clk->u3clk + (uart_id - 3));
}
void lpc32xx_mac_init(void)
{
/* Enable MAC interface */
writel(CLK_MAC_REG | CLK_MAC_SLAVE | CLK_MAC_MASTER
| CLK_MAC_MII, &clk->macclk_ctrl);
}
void lpc32xx_mlc_nand_init(void)
{
/* Enable NAND interface */
writel(CLK_NAND_MLC | CLK_NAND_MLC_INT, &clk->flashclk_ctrl);
}
void lpc32xx_i2c_init(unsigned int devnum)
{
/* Enable I2C interface */
uint32_t ctrl = readl(&clk->i2cclk_ctrl);
if (devnum == 1)
ctrl |= CLK_I2C1_ENABLE;
if (devnum == 2)
ctrl |= CLK_I2C2_ENABLE;
writel(ctrl, &clk->i2cclk_ctrl);
}
U_BOOT_DEVICE(lpc32xx_gpios) = {
.name = "gpio_lpc32xx"
};
/* Mux for SCK0, MISO0, MOSI0. We do not use SSEL0. */
#define P_MUX_SET_SSP0 0x1600
void lpc32xx_ssp_init(void)
{
/* Enable SSP0 interface */
writel(CLK_SSP0_ENABLE_CLOCK, &clk->ssp_ctrl);
/* Mux SSP0 pins */
writel(P_MUX_SET_SSP0, &mux->p_mux_set);
}

View File

@@ -0,0 +1,77 @@
/*
* LPC32xx dram init
*
* (C) Copyright 2014 DENX Software Engineering GmbH
* Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
*
* This is called by SPL to gain access to the SDR DRAM.
*
* This code runs from SRAM.
*
* Actual CONFIG_LPC32XX_SDRAM_* parameters must be provided
* by the board configuration file.
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <netdev.h>
#include <asm/arch/cpu.h>
#include <asm/arch/clk.h>
#include <asm/arch/wdt.h>
#include <asm/arch/emc.h>
#include <asm/io.h>
static struct clk_pm_regs *clk = (struct clk_pm_regs *)CLK_PM_BASE;
static struct emc_regs *emc = (struct emc_regs *)EMC_BASE;
void ddr_init(struct emc_dram_settings *dram)
{
uint32_t ck;
/* Enable EMC interface and choose little endian mode */
writel(1, &emc->ctrl);
writel(0, &emc->config);
/* Select maximum EMC Dynamic Memory Refresh Time */
writel(0x7FF, &emc->refresh);
/* Determine CLK */
ck = get_sdram_clk_rate();
/* Configure SDRAM */
writel(dram->cmddelay, &clk->sdramclk_ctrl);
writel(dram->config0, &emc->config0);
writel(dram->rascas0, &emc->rascas0);
writel(dram->rdconfig, &emc->read_config);
/* Set timings */
writel((ck / dram->trp) & 0x0000000F, &emc->t_rp);
writel((ck / dram->tras) & 0x0000000F, &emc->t_ras);
writel((ck / dram->tsrex) & 0x0000007F, &emc->t_srex);
writel((ck / dram->twr) & 0x0000000F, &emc->t_wr);
writel((ck / dram->trc) & 0x0000001F, &emc->t_rc);
writel((ck / dram->trfc) & 0x0000001F, &emc->t_rfc);
writel((ck / dram->txsr) & 0x000000FF, &emc->t_xsr);
writel(dram->trrd, &emc->t_rrd);
writel(dram->tmrd, &emc->t_mrd);
writel(dram->tcdlr, &emc->t_cdlr);
/* Dynamic refresh */
writel((((ck / dram->refresh) >> 4) & 0x7FF), &emc->refresh);
udelay(10);
/* Force all clocks, enable inverted ck, issue NOP command */
writel(0x00000193, &emc->control);
udelay(100);
/* Keep all clocks enabled, issue a PRECHARGE ALL command */
writel(0x00000113, &emc->control);
/* Fast dynamic refresh for at least a few SDRAM ck cycles */
writel((((128) >> 4) & 0x7FF), &emc->refresh);
udelay(10);
/* set correct dynamic refresh timing */
writel((((ck / dram->refresh) >> 4) & 0x7FF), &emc->refresh);
udelay(10);
/* set normal mode to CAS=3 */
writel(0x00000093, &emc->control);
readl(EMC_DYCS0_BASE | dram->mode);
/* set extended mode to all zeroes */
writel(0x00000093, &emc->control);
readl(EMC_DYCS0_BASE | dram->emode);
/* stop forcing clocks, keep inverted clock, issue normal mode */
writel(0x00000010, &emc->control);
}

View File

@@ -0,0 +1,45 @@
/*
* WORK Microwave work_92105 board low level init
*
* (C) Copyright 2014 DENX Software Engineering GmbH
* Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
*
* Low level init is called from SPL to set up the clocks.
* On entry, the LPC3250 is in Direct Run mode with all clocks
* running at 13 MHz; on exit, ARM clock is 208 MHz, HCLK is
* 104 MHz and PCLK is 13 MHz.
*
* This code must run from SRAM so that the clock changes do
* not prevent it from executing.
*
* SPDX-License-Identifier: GPL-2.0+
*/
.globl lowlevel_init
lowlevel_init:
/* Set ARM, HCLK, PCLK dividers for normal mode */
ldr r0, =0x0000003D
ldr r1, =0x40004040
str r0, [r1]
/* Start HCLK PLL for 208 MHz */
ldr r0, =0x0001401E
ldr r1, =0x40004058
str r0, [r1]
/* wait for HCLK PLL to lock */
1:
ldr r0, [r1]
ands r0, r0, #1
beq 1b
/* switch to normal mode */
ldr r1, =0x40004044
ldr r0, [r1]
orr r0, #0x00000004
str r0, [r1]
/* Return to U-boot via saved link register */
mov pc, lr

View File

@@ -22,7 +22,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <common.h>
#include <version.h>
/*
*************************************************************************

View File

@@ -18,7 +18,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <common.h>
#include <version.h>
/*
*************************************************************************

View File

@@ -1,8 +0,0 @@
#
# (C) Copyright 2002
# Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
#
# SPDX-License-Identifier: GPL-2.0+
#
PLATFORM_CPPFLAGS += -march=armv4

View File

@@ -17,7 +17,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
/*
*************************************************************************

View File

@@ -39,7 +39,6 @@ endif
obj-$(if $(filter am33xx,$(SOC)),y) += am33xx/
obj-$(if $(filter armada-xp,$(SOC)),y) += armada-xp/
obj-$(CONFIG_BCM2835) += bcm2835/
obj-$(if $(filter bcm281xx,$(SOC)),y) += bcm281xx/
obj-$(if $(filter bcmcygnus,$(SOC)),y) += bcmcygnus/
obj-$(if $(filter bcmnsp,$(SOC)),y) += bcmnsp/

View File

@@ -164,9 +164,9 @@ void config_sdram(const struct emif_regs *regs, int nr)
writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw);
}
writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config);
writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl);
writel(regs->ref_ctrl, &emif_reg[nr]->emif_sdram_ref_ctrl_shdw);
writel(regs->sdram_config, &emif_reg[nr]->emif_sdram_config);
}
/**

View File

@@ -3,11 +3,10 @@
*/
#include <config.h>
#include <version.h>
#include <linux/linkage.h>
ENTRY(save_boot_params)
bx lr
b save_boot_params_ret
ENDPROC(save_boot_params)
/*

View File

@@ -1,13 +0,0 @@
#
# (C) Copyright 2012 Stephen Warren
#
# SPDX-License-Identifier: GPL-2.0+
#
src_dir := ../../arm1176/bcm2835/
obj-y :=
obj-y += $(src_dir)/init.o
obj-y += $(src_dir)/reset.o
obj-y += $(src_dir)/timer.o
obj-y += $(src_dir)/mbox.o

View File

@@ -5,11 +5,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
# If armv7-a is not supported by GCC fall-back to armv5, which is
# supported by more tool-chains
PF_CPPFLAGS_ARMV7 := $(call cc-option, -march=armv7-a, -march=armv5)
PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARMV7)
# On supported platforms we set the bit which causes us to trap on unaligned
# memory access. This is the opposite of what the compiler expects to be
# the default so we must pass in -mno-unaligned-access so that it is aware

View File

@@ -80,12 +80,6 @@ config DM_SPI_FLASH
config DM_GPIO
default y
config SYS_MALLOC_F
default y
config SYS_MALLOC_F_LEN
default 0x400
source "board/samsung/smdkv310/Kconfig"
source "board/samsung/trats/Kconfig"
source "board/samsung/universal_c210/Kconfig"

View File

@@ -14,7 +14,6 @@
#define PLL_DIV_1024 1024
#define PLL_DIV_65535 65535
#define PLL_DIV_65536 65536
/* *
* This structure is to store the src bit, div bit and prediv bit
* positions of the peripheral clocks of the src and div registers
@@ -423,8 +422,8 @@ static unsigned long exynos5_get_periph_rate(int peripheral)
case PERIPH_ID_I2C6:
case PERIPH_ID_I2C7:
src = EXYNOS_SRC_MPLL;
div = readl(&clk->div_top0);
sub_div = readl(&clk->div_top1);
div = readl(&clk->div_top1);
sub_div = readl(&clk->div_top0);
break;
default:
debug("%s: invalid peripheral %d", __func__, peripheral);
@@ -1028,6 +1027,40 @@ static unsigned long exynos5420_get_lcd_clk(void)
return pclk;
}
static unsigned long exynos5800_get_lcd_clk(void)
{
struct exynos5420_clock *clk =
(struct exynos5420_clock *)samsung_get_base_clock();
unsigned long sclk;
unsigned int sel;
unsigned int ratio;
/*
* CLK_SRC_DISP10
* CLKMUX_FIMD1 [6:4]
*/
sel = (readl(&clk->src_disp10) >> 4) & 0x7;
if (sel) {
/*
* Mapping of CLK_SRC_DISP10 CLKMUX_FIMD1 [6:4] values into
* PLLs. The first element is a placeholder to bypass the
* default settig.
*/
const int reg_map[] = {0, CPLL, DPLL, MPLL, SPLL, IPLL, EPLL,
RPLL};
sclk = get_pll_clk(reg_map[sel]);
} else
sclk = CONFIG_SYS_CLK_FREQ;
/*
* CLK_DIV_DISP10
* FIMD1_RATIO [3:0]
*/
ratio = readl(&clk->div_disp10) & 0xf;
return sclk / (ratio + 1);
}
void exynos4_set_lcd_clk(void)
{
struct exynos4_clock *clk =
@@ -1159,6 +1192,28 @@ void exynos5420_set_lcd_clk(void)
writel(cfg, &clk->div_disp10);
}
void exynos5800_set_lcd_clk(void)
{
struct exynos5420_clock *clk =
(struct exynos5420_clock *)samsung_get_base_clock();
unsigned int cfg;
/*
* Use RPLL for pixel clock
* CLK_SRC_DISP10 CLKMUX_FIMD1 [6:4]
* ==================
* 111: SCLK_RPLL
*/
cfg = readl(&clk->src_disp10) | (0x7 << 4);
writel(cfg, &clk->src_disp10);
/*
* CLK_DIV_DISP10
* FIMD1_RATIO [3:0]
*/
clrsetbits_le32(&clk->div_disp10, 0xf << 0, 0x0 << 0);
}
void exynos4_set_mipi_clk(void)
{
struct exynos4_clock *clk =
@@ -1646,8 +1701,10 @@ unsigned long get_lcd_clk(void)
if (cpu_is_exynos4())
return exynos4_get_lcd_clk();
else {
if (proid_is_exynos5420() || proid_is_exynos5800())
if (proid_is_exynos5420())
return exynos5420_get_lcd_clk();
else if (proid_is_exynos5800())
return exynos5800_get_lcd_clk();
else
return exynos5_get_lcd_clk();
}
@@ -1660,8 +1717,10 @@ void set_lcd_clk(void)
else {
if (proid_is_exynos5250())
exynos5_set_lcd_clk();
else if (proid_is_exynos5420() || proid_is_exynos5800())
else if (proid_is_exynos5420())
exynos5420_set_lcd_clk();
else
exynos5800_set_lcd_clk();
}
}

View File

@@ -25,7 +25,6 @@
#include <common.h>
#include <config.h>
#include <version.h>
#include <asm/io.h>
#include <asm/arch/cpu.h>
#include <asm/arch/clk.h>

View File

@@ -179,10 +179,10 @@ struct mem_timings mem_timings[] = {
.spll_mdiv = 0xc8,
.spll_pdiv = 0x3,
.spll_sdiv = 0x2,
/* RPLL @70.5Mhz */
/* RPLL @141Mhz */
.rpll_mdiv = 0x5E,
.rpll_pdiv = 0x2,
.rpll_sdiv = 0x4,
.rpll_sdiv = 0x3,
.direct_cmd_msr = {
0x00020018, 0x00030000, 0x00010046, 0x00000d70,

View File

@@ -10,7 +10,6 @@
#define _ORIGEN_SETUP_H
#include <config.h>
#include <version.h>
#include <asm/arch/cpu.h>
#ifdef CONFIG_CLK_800_330_165

View File

@@ -0,0 +1,27 @@
if ARCH_MX5
config MX5
bool
default y
config MX51
bool
config MX53
bool
choice
prompt "MX5 board select"
config TARGET_USBARMORY
bool "Support USB armory"
select CPU_V7
endchoice
config SYS_SOC
default "mx5"
source "board/inversepath/usbarmory/Kconfig"
endif

View File

@@ -0,0 +1,42 @@
if ARCH_MX6
config MX6
bool
default y
config MX6D
bool
config MX6DL
bool
config MX6Q
bool
config MX6QDL
bool
config MX6S
bool
config MX6SL
bool
config MX6SX
bool
choice
prompt "MX6 board select"
config TARGET_SECOMX6
bool "Support secomx6 boards"
select CPU_V7
endchoice
config SYS_SOC
default "mx6"
source "board/seco/Kconfig"
endif

View File

@@ -21,7 +21,6 @@
#include <stdbool.h>
#include <asm/arch/mxc_hdmi.h>
#include <asm/arch/crm_regs.h>
#include <asm/bootm.h>
#include <dm.h>
#include <imx_thermal.h>
@@ -289,6 +288,22 @@ static void set_preclk_from_osc(void)
}
#endif
#define SRC_SCR_WARM_RESET_ENABLE 0
static void init_src(void)
{
struct src *src_regs = (struct src *)SRC_BASE_ADDR;
u32 val;
/*
* force warm reset sources to generate cold reset
* for a more reliable restart
*/
val = readl(&src_regs->scr);
val &= ~(1 << SRC_SCR_WARM_RESET_ENABLE);
writel(val, &src_regs->scr);
}
int arch_cpu_init(void)
{
init_aips();
@@ -323,6 +338,8 @@ int arch_cpu_init(void)
mxs_dma_init();
#endif
init_src();
return 0;
}

View File

@@ -106,12 +106,6 @@ config DM_GPIO
config DM_SERIAL
default y if DM
config SYS_MALLOC_F
default y if DM
config SYS_MALLOC_F_LEN
default 0x400 if DM
config SYS_SOC
default "omap3"

View File

@@ -12,7 +12,6 @@
*/
#include <config.h>
#include <version.h>
#include <asm/arch/mem.h>
#include <asm/arch/clocks_omap3.h>
#include <linux/linkage.h>

View File

@@ -5,7 +5,6 @@
*/
#include <config.h>
#include <version.h>
/* Set up the platform, once the cpu has been initialized */
.globl lowlevel_init

View File

@@ -8,7 +8,6 @@
#include <asm/io.h>
#include <asm/u-boot.h>
#include <asm/utils.h>
#include <version.h>
#include <image.h>
#include <asm/arch/reset_manager.h>
#include <spl.h>

View File

@@ -15,7 +15,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
#include <asm/system.h>
#include <linux/linkage.h>

View File

@@ -100,22 +100,23 @@ static struct {
unsigned int freq;
} pll1_para[] = {
/* This array must be ordered by frequency. */
{ PLL1_CFG(16, 0, 0, 0), 384000000 },
{ PLL1_CFG(16, 1, 0, 0), 768000000 },
{ PLL1_CFG(20, 1, 0, 0), 960000000 },
{ PLL1_CFG(21, 1, 0, 0), 1008000000},
{ PLL1_CFG(22, 1, 0, 0), 1056000000},
{ PLL1_CFG(23, 1, 0, 0), 1104000000},
{ PLL1_CFG(24, 1, 0, 0), 1152000000},
{ PLL1_CFG(25, 1, 0, 0), 1200000000},
{ PLL1_CFG(26, 1, 0, 0), 1248000000},
{ PLL1_CFG(27, 1, 0, 0), 1296000000},
{ PLL1_CFG(28, 1, 0, 0), 1344000000},
{ PLL1_CFG(29, 1, 0, 0), 1392000000},
{ PLL1_CFG(30, 1, 0, 0), 1440000000},
{ PLL1_CFG(31, 1, 0, 0), 1488000000},
/* Final catchall entry */
{ PLL1_CFG(31, 1, 0, 0), ~0},
{ PLL1_CFG(30, 1, 0, 0), 1440000000},
{ PLL1_CFG(29, 1, 0, 0), 1392000000},
{ PLL1_CFG(28, 1, 0, 0), 1344000000},
{ PLL1_CFG(27, 1, 0, 0), 1296000000},
{ PLL1_CFG(26, 1, 0, 0), 1248000000},
{ PLL1_CFG(25, 1, 0, 0), 1200000000},
{ PLL1_CFG(24, 1, 0, 0), 1152000000},
{ PLL1_CFG(23, 1, 0, 0), 1104000000},
{ PLL1_CFG(22, 1, 0, 0), 1056000000},
{ PLL1_CFG(21, 1, 0, 0), 1008000000},
{ PLL1_CFG(20, 1, 0, 0), 960000000 },
{ PLL1_CFG(19, 1, 0, 0), 912000000 },
{ PLL1_CFG(16, 1, 0, 0), 768000000 },
/* Final catchall entry 384MHz*/
{ PLL1_CFG(16, 0, 0, 0), 0 },
};
void clock_set_pll1(unsigned int hz)
@@ -126,10 +127,12 @@ void clock_set_pll1(unsigned int hz)
(struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
/* Find target frequency */
while (pll1_para[i].freq < hz)
while (pll1_para[i].freq > hz)
i++;
hz = pll1_para[i].freq;
if (! hz)
hz = 384000000;
/* Calculate system clock divisors */
axi = DIV_ROUND_UP(hz, 432000000); /* Max 450MHz */

View File

@@ -37,7 +37,7 @@
.arch_extension sec
#define ONE_MS (CONFIG_SYS_CLK_FREQ / 1000)
#define ONE_MS (CONFIG_TIMER_CLK_FREQ / 1000)
#define TEN_MS (10 * ONE_MS)
#define GICD_BASE 0x1c81000
#define GICC_BASE 0x1c82000

View File

@@ -182,6 +182,13 @@ static void sunxi_usb_passby(struct sunxi_usbc_hcd *sunxi_usbc, int enable)
return;
}
void sunxi_usbc_enable_squelch_detect(int index, int enable)
{
struct sunxi_usbc_hcd *sunxi_usbc = &sunxi_usbc_hcd[index];
usb_phy_write(sunxi_usbc, 0x3c, enable ? 0 : 2, 2);
}
int sunxi_usbc_request_resources(int index)
{
struct sunxi_usbc_hcd *sunxi_usbc = &sunxi_usbc_hcd[index];

View File

@@ -9,7 +9,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
#include <asm/macro.h>
#include <linux/linkage.h>

View File

@@ -6,7 +6,5 @@
#
PLATFORM_RELFLAGS += -fno-common -ffixed-x18
PF_CPPFLAGS_ARMV8 := $(call cc-option, -march=armv8-a)
PF_NO_UNALIGNED := $(call cc-option, -mstrict-align)
PLATFORM_CPPFLAGS += $(PF_CPPFLAGS_ARMV8)
PLATFORM_CPPFLAGS += $(PF_NO_UNALIGNED)

View File

@@ -7,7 +7,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
#include <asm/ptrace.h>
#include <asm/macro.h>
#include <linux/linkage.h>

View File

@@ -7,7 +7,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
#include <linux/linkage.h>
#include <asm/macro.h>
#include <asm/armv8/mmu.h>

View File

@@ -7,7 +7,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
#include <linux/linkage.h>
#include <asm/macro.h>

View File

@@ -7,7 +7,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
#include <linux/linkage.h>
#include <asm/macro.h>

View File

@@ -6,8 +6,6 @@
# SPDX-License-Identifier: GPL-2.0+
#
PLATFORM_CPPFLAGS += -mcpu=xscale
#
# !WARNING!
# The PXA's OneNAND SPL uses .text.0 and .text.1 segments to allow booting from

View File

@@ -21,7 +21,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
/*
*************************************************************************

View File

@@ -1,9 +0,0 @@
#
# (C) Copyright 2002
# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
# Marius Groeger <mgroeger@sysgo.de>
#
# SPDX-License-Identifier: GPL-2.0+
#
PLATFORM_CPPFLAGS += -march=armv4 -mtune=strongarm1100

View File

@@ -11,7 +11,6 @@
#include <asm-offsets.h>
#include <config.h>
#include <version.h>
/*
*************************************************************************

View File

@@ -24,7 +24,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \
tegra20-trimslice.dtb \
tegra20-ventana.dtb \
tegra20-whistler.dtb \
tegra20-colibri_t20_iris.dtb \
tegra20-colibri.dtb \
tegra30-apalis.dtb \
tegra30-beaver.dtb \
tegra30-cardhu.dtb \

View File

@@ -67,6 +67,8 @@
edp-lvds-bridge@48 {
compatible = "parade,ps8625";
reg = <0x48>;
sleep-gpio = <&gpx3 5 GPIO_ACTIVE_HIGH>;
reset-gpio = <&gpy7 7 GPIO_ACTIVE_HIGH>;
};
};

View File

@@ -168,6 +168,7 @@
fimd@14400000 {
/* sysmmu is not used in U-Boot */
samsung,disable-sysmmu;
samsung,pwm-out-gpio = <&gpb2 0 GPIO_ACTIVE_HIGH>;
};
dp@145b0000 {

View File

@@ -144,10 +144,13 @@
samsung,vl-vfpd = <10>;
samsung,vl-cmd-allow-len = <0xf>;
samsung,power-on-delay = <30000>;
samsung,winid = <3>;
samsung,interface-mode = <1>;
samsung,dp-enabled = <1>;
samsung,dual-lcd-enabled = <0>;
samsung,bl-en-gpio = <&gpx2 2 GPIO_ACTIVE_HIGH>;
};
};

View File

@@ -0,0 +1,2 @@
config IMX_CONFIG
string

View File

@@ -16,6 +16,9 @@
#define BPLL 5
#define RPLL 6
#define SPLL 7
#define CPLL 8
#define DPLL 9
#define IPLL 10
#define MASK_PRE_RATIO(x) (0xff << ((x << 4) + 8))
#define MASK_RATIO(x) (0xf << (x << 4))

View File

@@ -71,6 +71,7 @@ struct clk_pm_regs {
};
/* HCLK Divider Control Register bits */
#define CLK_HCLK_DDRAM_MASK (0x3 << 7)
#define CLK_HCLK_DDRAM_HALF (0x2 << 7)
#define CLK_HCLK_DDRAM_NOMINAL (0x1 << 7)
#define CLK_HCLK_DDRAM_STOPPED (0x0 << 7)
@@ -123,6 +124,10 @@ struct clk_pm_regs {
#define CLK_MAC_SLAVE (1 << 1)
#define CLK_MAC_REG (1 << 0)
/* I2C Clock Control Register bits */
#define CLK_I2C2_ENABLE (1 << 1)
#define CLK_I2C1_ENABLE (1 << 0)
/* Timer Clock Control1 Register bits */
#define CLK_TIMCLK_MOTOR (1 << 6)
#define CLK_TIMCLK_TIMER3 (1 << 5)
@@ -147,11 +152,22 @@ struct clk_pm_regs {
/* DMA Clock Control Register bits */
#define CLK_DMA_ENABLE (1 << 0)
/* NAND Clock Control Register bits */
#define CLK_NAND_MLC (1 << 1)
#define CLK_NAND_MLC_INT (1 << 5)
/* SSP Clock Control Register bits */
#define CLK_SSP0_ENABLE_CLOCK (1 << 0)
/* SDRAMCLK register bits */
#define CLK_SDRAM_DDR_SEL (1 << 1)
unsigned int get_sys_clk_rate(void);
unsigned int get_hclk_pll_rate(void);
unsigned int get_hclk_clk_div(void);
unsigned int get_hclk_clk_rate(void);
unsigned int get_periph_clk_div(void);
unsigned int get_periph_clk_rate(void);
unsigned int get_sdram_clk_rate(void);
#endif /* _LPC32XX_CLK_H */

View File

@@ -52,6 +52,9 @@
#define CONFIG_SYS_BAUDRATE_TABLE \
{ 9600, 19200, 38400, 57600, 115200, 230400, 460800 }
/* Ethernet */
#define LPC32XX_ETH_BASE ETHERNET_BASE
/* NOR Flash */
#if defined(CONFIG_SYS_FLASH_CFI)
#define CONFIG_FLASH_CFI_DRIVER

View File

@@ -27,6 +27,7 @@
#define HS_UART7_BASE 0x4001C000 /* High speed UART 7 registers base */
#define RTC_BASE 0x40024000 /* RTC registers base */
#define GPIO_BASE 0x40028000 /* GPIO registers base */
#define MUX_BASE 0x40028100 /* MUX registers base */
#define WDT_BASE 0x4003C000 /* Watchdog timer registers base */
#define TIMER0_BASE 0x40044000 /* Timer0 registers base */
#define TIMER1_BASE 0x4004C000 /* Timer1 registers base */
@@ -37,6 +38,8 @@
#define UART4_BASE 0x40088000 /* UART 4 registers base */
#define UART5_BASE 0x40090000 /* UART 5 registers base */
#define UART6_BASE 0x40098000 /* UART 6 registers base */
#define I2C1_BASE 0x400A0000 /* I2C 1 registers base */
#define I2C2_BASE 0x400A8000 /* I2C 2 registers base */
/* External SDRAM Memory Bank base addresses */
#define EMC_DYCS0_BASE 0x80000000 /* SDRAM DYCS0 base address */

View File

@@ -76,4 +76,25 @@ struct emc_regs {
#define EMC_STAT_WAITWR(n) (((n) - 2) & 0x1F)
#define EMC_STAT_WAITTURN(n) (((n) - 1) & 0x0F)
/* EMC settings for DRAM */
struct emc_dram_settings {
u32 cmddelay;
u32 config0;
u32 rascas0;
u32 rdconfig;
u32 trp;
u32 tras;
u32 tsrex;
u32 twr;
u32 trc;
u32 trfc;
u32 txsr;
u32 trrd;
u32 tmrd;
u32 tcdlr;
u32 refresh;
u32 mode;
u32 emode;
};
#endif /* _LPC32XX_EMC_H */

View File

@@ -0,0 +1,43 @@
/*
* LPC32xx GPIO interface
*
* (C) Copyright 2014 DENX Software Engineering GmbH
* Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/**
* GPIO Register map for LPC32xx
*/
struct gpio_regs {
u32 p3_inp_state;
u32 p3_outp_set;
u32 p3_outp_clr;
u32 p3_outp_state;
/* Watch out! the following are shared between p2 and p3 */
u32 p2_p3_dir_set;
u32 p2_p3_dir_clr;
u32 p2_p3_dir_state;
/* Now back to 'one register for one port' */
u32 p2_inp_state;
u32 p2_outp_set;
u32 p2_outp_clr;
u32 reserved1[6];
u32 p0_inp_state;
u32 p0_outp_set;
u32 p0_outp_clr;
u32 p0_outp_state;
u32 p0_dir_set;
u32 p0_dir_clr;
u32 p0_dir_state;
u32 reserved2;
u32 p1_inp_state;
u32 p1_outp_set;
u32 p1_outp_clr;
u32 p1_outp_state;
u32 p1_dir_set;
u32 p1_dir_clr;
u32 p1_dir_state;
};

View File

@@ -0,0 +1,18 @@
/*
* LPC32xx MUX interface
*
* (C) Copyright 2015 DENX Software Engineering GmbH
* Written-by: Albert ARIBAUD <albert.aribaud@3adev.fr>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/**
* MUX register map for LPC32xx
*/
struct mux_regs {
u32 p_mux_set;
u32 p_mux_clr;
u32 p_mux_state;
};

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