Most users of CONFIG_I2C_EEPROM were migrated to defconfig a while ago,
but sandbox was skipped. Leave it off for sandbox_spl where it does not
build, but does not need to be either.
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
ARM64 is correctly select'ed in arch/arm/Kconfig, so this line in
the defconfig is unneeded.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This code does not match the fdt version in fdt.py. When dtoc is unable to
use the Python libfdt library, it uses the fallback version, which does not
widen arrays correctly.
Fix this to avoid a warning 'excess elements in array initialize' in
dt-platdata.c which happens on some platforms.
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Tom Rini <trini@konsulko.com>
This fixes a mismatch between the %zu format and the type used on sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This fixes a mismatch between the %zu format and the type used on sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
With sandbox on 32-bit the size_t type can be a little inconsistent. Use
the same type as the caller expects to avoid a compiler warning.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Sandbox is built with 64-bit ints by default. This doesn't work properly on
32-bit machines.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
[NOTE: I took v1 of these patches in, and then v2 came out, this commit
is squashing the minor deltas from v1 -> v2 of updates to c236ebd and
2b9ec76 into this commit - trini]
- Added an additional NULL check, as suggested by Simon Glass to
fit_image_process_sig
- Re-formatted the comment blocks
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
[For merging the chnages from v2 back onto v1]
Signed-off-by: Tom Rini <trini@konsulko.com>
A couple of commits have modified the am33xx/am437x ddr2/ddr3
initialization path to fix certain issues, but have had the side effect
of causing L3 noc errors during initialization. The two commits are:
69b918 "am33xx,ddr3: fix ddr3 sdram configuration"
fc46ba "arm: am437x: Enable hardware leveling for EMIF"
The EMIF_REG_INITREF_DIS_MASK bit still needs to be set for all
platforms. This delays initialization and refresh until a later stage.
The 500us timer can be programmed for platforms that require it
and for platforms that don't require it. It is currently hardcoded
for 400MHz systems. For systems with a higher memory frequency
this needs to be a larger value, and for systems with a lower
memory frequency this can be a lower value. This can be
considered a separate issue and corrected in a later commit.
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The delay needs to be before the write to ref_ctrl register
which initiates refreshes. An improper initialization sequence
generates an L3 noc error.
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
When loading an efi image, we pass it the location it was loaded from.
On file system backends, there are no relative paths, so we should always
pass in absolute ones. For network paths, we may be relative.
This fixes distro booting with grub2 for me when it fetches the grub2 config
file from the loader partition.
Reported-by: york sun <york.sun@nxp.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
In certain circumstances it comes in handy to be able to boot into a second
U-Boot. But as of now it is not possible to boot a U-Boot binary that is inside
a FIT image, which is problematic for projects that e.g. need to guarantee a
unbroken chain of trust from SOC all the way into the OS, since the FIT signing
mechanism cannot be used.
This patch adds the capability to load such FIT images.
An example .its snippet (utilizing signature verification) might look
like the following:
images {
firmware@1 {
description = "2nd stage U-Boot image";
data = /incbin/("u-boot-dtb.img.gz");
type = "firmware";
arch = "arm";
os = "u-boot";
compression = "gzip";
load = <0x8FFFC0>;
entry = <0x900000>;
signature@1 {
algo = "sha256,rsa4096";
key-name-hint = "key";
};
};
};
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Tom Rini <trini@konsulko.com>
commit 1f807a9f32 ("ARM: keystone2: Refactor MSMC macros to avoid
left under a macro KS2_MSMC_SEGMENT_QM_PDSP which is no longer valid.
This, in effect disabled DMA coherency for QM PDSP.
Given that msmc_k2hkle_common_setup is valid for all K2H/K/L/E SoCs,
the #ifdef should been removed in the first place. Do the same.
Fixes: 1f807a9f32 ("ARM: keystone2: Refactor MSMC macros to avoid #ifdeffery")
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
A feasible way to communicate certain errors for devices that have no
other way of signalling besides LEDs is to flash these LEDs. For errors
in U-Boot, a script that utilizes the led and sleep commands would be a
practicable way, but currently the sleep command can only delay for an
integral amount of seconds, which is too slow to create an easily
noticeable pattern for flashing LEDs.
Therefore, this patch adds support for fractions (down to .001 seconds)
to the sleep command.
The parsing is kept minimal, simplistic and as robust as possible: After
converting the passed string using simple_strtoul and multiplying it
with 1000, we search for the first dot, convert the three characters
after that into a number (if they are not numbers, we ignore the
fractional part and just use the delay we got from simple_strtoul), and
add this number to the delay.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
nand_do_write_ops() determines if it is writing a partial page with the
formula:
part_pagewr = (column || writelen < (mtd->writesize - 1))
When 'writelen' is exactly 1 byte less than the NAND page size the formula
equates to zero, so the code doesn't process it as a partial write, although
it should.
As a consequence the function remains in the while(1) loop with 'writelen'
becoming 0xffffffff and iterating until the watchdog timeout triggers.
To reproduce the issue on a NAND with 2K page (0x800):
=> nand erase.part <partition>
=> nand write $loadaddr <partition> 7ff
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
On some sunxi boards we have NANDs exposing 1664 OOB bytes per page.
Define the CONFIG_SYS_NAND_MAX_ECCPOS value accordingly.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Some NANDs are now exposing 1664 OOB bytes per page. Adjust the
NAND_MAX_OOBSIZE value accordingly.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
We already have an SPL driver for the sunxi NAND controller, now add
the normal/standard one.
The source has been copied from Linux 4.6 with a few changes to make
it work in u-boot.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
These are already-documented common bindings for NAND chips. Let's
handle them in nand_base.
If NAND controller drivers need to act on this data before bringing up
the NAND chip (e.g., fill out ECC callback functions, change HW modes,
etc.), then they can do so between calling nand_scan_ident() and
nand_scan_tail().
The original commit has been slightly reworked to use the fdtdec_xxx()
helpers (instead of the of_xxxx() ones).
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Modern NANDs do not guarantee that data written in raw mode will not
contain bitflips just after writing them. This is fine since the number
of bitflips should be rather low and thus fixable by the ECC engine,
but since we are reading data in raw mode to verify if they match the
input data we cannot prevent failures if some bits are flipped.
The option of using standard mode to verify the data is not acceptable
either, since one of the usage of raw mode is to allow flashing images
that do not respect the standard NAND page layout or the default ECC
config (this is the case on Allwinner platforms, where the ROM code
tests several hardcoded configs, which are not necessarily matching the
NAND characteristics).
Add an extension to the nand write.raw command allowing one to disable
the verification step.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Deassert resets and enable clock signals of xHCI blocks if the
corresponding CONFIG is enabled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
I need to add more board attributes, so the "flags" member will be
handier than separate boolean ones.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Sync register macros with Linux code. This will be helpful to
develop the counterpart of Linux.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This does not have much impact on behavior, but makes code look more
more like Linux. The use of devm_ioremap() often helps to delete
.remove callbacks entirely.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
On these two boards, the serial0 is used for inter-chip connection,
so cannot be used for login console. The serial2 is used instead
for them, but it is tedious to use because upper level deployment
projects must switch login console per board.
[ Linux commit: 2a4a2aadbaad9dffdb564a2895348f3d8e825416 ]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Getting this error:
Zynq> sb load hostfs - 100
/home/monstr/data/disk/u-boot/build-zynq_zc706/test.fit
Unknown command 'sb' - try 'help'
because sb command is present only for Sandbox
obj-$(CONFIG_SANDBOX) += host.o
that's why mark this test to be run only at Sandbox
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Simon Glass <sjg@chromium.org>
Commit 17c2987 introduces an undesired dependency on CONFIG_SPL_LOAD_FIT
when building U-Boot for AM57xx and DRA7xx high-security (HS) devices that
causes the build to break when that option is not active. Fix this issue
by only building the u-boot_HS.img target when building U-Boot into an
actual FIT image.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Commit e29878f introduces an undesired dependency on CONFIG_SPL_LOAD_FIT
when building U-Boot for AM43xx high-security (HS) devices that causes the
build to break when that option is not active. Fix this issue by only
building the u-boot_HS.img target when building U-Boot into an actual
FIT image.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
In raw mode a full sector is to be read even if image covers part of
a sector. Number of sectors are calculated as ROUND_UP(size)/sec_size by FIT
framework. This calculation assumes that image is at the 0th offset of a sector,
which is not true always in FIT case. So, include the image offset while
calculating number of sectors.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
When signing images, we repeatedly call fit_add_file_data() with
successively increasing size values to include the keys in the DTB.
Unfortunately, if large keys are used (such as 4096 bit RSA keys), this
process fails sometimes, and mkimage needs to be called repeatedly to
integrate the keys into the DTB.
This is because fit_add_file_data actually returns the wrong error
code, and the loop terminates prematurely, instead of trying again with
a larger size value.
This patch corrects the return value by fixing the return value of
fdt_add_bignum, fixes a case where an error is masked by a unconditional
setting of a return value variable, and also removes a error message,
which is misleading, since we actually allow the function to fail. A
(hopefully helpful) comment is also added to explain the lack of error
message.
This is probably related to 1152a05 ("tools: Correct error handling in
fit_image_process_hash()") and the corresponding error reported here:
https://www.mail-archive.com/u-boot@lists.denx.de/msg217417.html
Signed-off-by: Mario Six <mario.six@gdsys.cc>
When signing images, we repeatedly call fit_add_file_data() with
successively increasing size values to include the keys in the DTB.
Unfortunately, if large keys are used (such as 4096 bit RSA keys), this
process fails sometimes, and mkimage needs to be called repeatedly to
integrate the keys into the DTB.
This is because fit_add_file_data actually returns the wrong error
code, and the loop terminates prematurely, instead of trying again with
a larger size value.
This patch corrects the return value and also removes a error message,
which is misleading, since we actually allow the function to fail. A
(hopefully helpful) comment is also added to explain the lack of error
message.
This is probably related to 1152a05 ("tools: Correct error handling in
fit_image_process_hash()") and the corresponding error reported here:
https://www.mail-archive.com/u-boot@lists.denx.de/msg217417.html
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Without this, the test fails if the test is run with a cwd other than the
root of the U-Boot source tree.
Fixes: 8729d58259 ("test: Convert the vboot test to test/py")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As part of the startup process for boards using the SPL, the
meaning of board_init_f changed such that it should return normally
rather than calling board_init_r directly. (see
db910353a1 )
This was fixed in 32-bit arm, but broke when SPL was added to
64 bit arm. This fixes crt0_64 so that it calls board_init_r
during the SPL and removes the direct call from board_init_f
from the arm SPL example.
Signed-off-by: Jeremy Hunt <Jeremy.Hunt@DEShawResearch.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tracing the arguments has been helpful for pinpointing overflows.
Cc: Alexander Graf <agraf@suse.de>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Alexander Graf <agraf@suse.de>
Try to avoid adhoc iteration of the environment. Reuse fw_getenv
to find the variables that should be printed. Only use open-coded
iteration when printing all variables.
For backwards compatibility, keep emitting a newline when
printing with value_only.
Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
there are two groups of functions:
- application ready tools: fw_setenv/fw_getenv/fw_parse_script
these are used, when creating a single binary containing multiple
tools (busybox like)
- file access like: open/read/write/close
above functions are implemented on top of these. applications
can use those to modify several variables without creating a
temporary batch script file
tested with "./scripts/kernel-doc -html -v tools/env/fw_env.h"
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Andreas Fenkart <andreas.fenkart@digitalstrom.com>
On most platforms the print_fpga_state function is never called. Only
on dlvision-10g do we, so in that case inline it. Drop it from
everywhere else to avoid extra strings.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Reinhard Pfau <reinhard.pfau@gdsys.cc>
Acked-by: Dirk Eibach <dirk.eibach@gdsys.cc>
A negative value for the offset is treated as a backwards offset for
from the end of the device/partition for block devices. This aligns
the behavior of the config file with the syntax of CONFIG_ENV_OFFSET
where the functionality has been introduced with
commit 5c088ee841 ("env_mmc: allow negative CONFIG_ENV_OFFSET").
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Currently flash_read completes a crucial part of the environment
device configuration, the device type (mtd_type). This is rather
confusing as flash_io calls flash_read conditionally, and one might
think flash_write, which also makes use of mtd_type, gets called
before flash_read. But since flash_io is always called with O_RDONLY
first, this is not actually the case in reality.
However, it is much cleaner to complete and verify the config early
in parse_config. This also prepares the code for further extension.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Reviewed-by: Andreas Fenkart
Partitions on the iso el torito partition table interpreter
only start from partition 1. So when printing out the tables,
let's also start counting at 1.
Signed-off-by: Alexander Graf <agraf@suse.de>
Convert IGEP board to use UBI volumes for U-Boot, its environment and
kernel. With exception of first four sectors read by SoC boot
ROM whole (One)NAND is UBI managed.
Also merge NAND and OneNAND defconfigs as now one binary can serve
both flashes.
As code is too big now, drop CONFIG_SPL_EXT_SUPPORT to make it fit.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Some CPUs contains boot ROM code capable reading first few blocks
(where SPL resides) of NAND flash and executing it. It is wise to
create separate partition here for SPL. As block size depends on
NAND chip used, we could either use worst case (biggest) partition
size or base its size on actual block size. This patch adds support
for the latter option.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Boards which are defining default mtdparts often need them early
in boot process (to load environment from UBI volume, for example).
This is currently solved by adding mtdparts and mtdids variable
definitions also to default environment. With this change, default
partitions are used by default unless explicitely deleted or
redefined.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
In case there is no mtdparts variable in relocated environment,
NULL is assigned to p, which is later fed to strncpy.
Also function parameter mtdparts is completely ignored, so use it
in case mtdparts variable is not found in environment. This
parameter is checked not to be NULL in caller.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
A private buffer is used to read mtdparts variable from non-relocated
environment. A pointer to that buffer is returned unconditionally,
confusing later test for variable presence in the environment.
Fix it by returning NULL when getenv_f fails.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Add timeout to onenand_wait ready loop as it hangs here indefinitely
when chip not present. Once there, do the same for onenand_bbt_wait
as well (note: recent Linux driver code does the same)
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
identify_nand_chip hangs forever in loop when NAND is not present.
As IGEPv2 comes either with NAND or OneNAND flash, add reset timeout
to let function fail gracefully allowing caller to know NAND is
not present. On NAND equipped board, reset succeeds on first read,
so 1000 loops seems to be safe timeout.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Other payload than uImage is currently considered to be raw U-Boot
image. Check also for zImage in Falcon mode.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Add support for loading from UBI volumes on the top of NAND
and OneNAND.
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Booting a payload out of NAND FLASH from the SPL is a crux today, as
it requires hard partioned FLASH. Not a brilliant idea with the
reliability of todays NAND FLASH chips.
The upstream UBI + UBI fastmap implementation which is about to
brought to u-boot is too heavy weight for SPLs as it provides way more
functionality than needed for a SPL and does not even fit into the
restricted SPL areas which are loaded from the SoC boot ROM.
So this provides a fast and lightweight implementation of UBI scanning
and UBI fastmap attach. The scan and logical to physical block mapping
code is developed from scratch, while the fastmap implementation is
lifted from the linux kernel source and stripped down to fit the SPL
needs.
The text foot print on the board which I used for development is:
6854 0 0 6854 1abd
drivers/mtd/ubispl/built-in.o
Attaching a NAND chip with 4096 physical eraseblocks (4 blocks are
reserved for the SPL) takes:
In full scan mode: 1172ms
In fastmap mode: 95ms
The code requires quite some storage. The largest and unknown part of
it is the number of fastmap blocks to read. Therefor the data
structure is not put into the BSS. The code requires a pointer to free
memory handed in which is initialized by the UBI attach code itself.
See doc/README.ubispl for further information on how to use it.
This shares the ubi-media.h and crc32 implementation of drivers/mtd/ubi
There is no way to share the fastmap code, as UBISPL only utilizes the
slightly modified functions ubi_attach_fastmap() and ubi_scan_fastmap()
from the original kernel ubi fastmap implementation.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
To support UBI in SPL we need a simple NAND read function. Add one to
nand_spl_simple and keep it as simple as it goes.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
Acked-by: Scott Wood <oss@buserror.net>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
This patch implements the reading functionality for the generic I2C
EEPROM driver, which was just a non-functional stub until now.
Since the page size will be of importance for the writing support, we
add suitable members to the private data structure to keep track of it.
Compatibility strings for a range of at24c* chips are added.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Remove unnecessary board specifc config files for
zynq boards(microzed, picozed, ZC770(all), zed) and point
to zynq common config file.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable config CONFIG_SYS_NO_FLASH through defconfig
for all zynq boards.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Move config option CONFIG_SYS_NO_FLASH as Kconfig
option. All the boards which needs to enable this
option can be done through defconfigs
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Define config USB_STORAGE through defconfig for all
respective zynq boards
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add Kconfig entry config option for USB_EHCI_ZYNQ
and update the same to enable for all zynq boards
which supports USB
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The EP platform also has working AHCI emulation, so I see little reason
not to implement the plumbing for it that enables us to boot from AHCI.
Signed-off-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Simple version of clk_get_by_index() added by:
"dm: clk: Add a simple version of clk_get_by_index()"
(sha1: a4b10c088c)
is only working for #clock-cells=<1> but not for
any other values. Fixed clocks is using #clock-cells=<0>
which requires full implementation.
Remove simplified versions of clk_get_by_index() and use full version.
Also remove empty clk_get_by_name() which is failing when it is called
which is useless.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Compile SPL for all boards even psu_init.c/h files are not in the tree
yet. But this change enables covering SPL issues in mainline.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Make code 64bit aware.
Warnings:
+../arch/arm/lib/spl.c: In function ‘jump_to_image_linux’:
+../arch/arm/lib/spl.c:63:3: warning: cast to pointer from integer of
different size [-Wint-to-pointer-cast]
+../common/spl/spl_fat.c: In function ‘spl_load_image_fat’:
+../common/spl/spl_fat.c:91:33: warning: cast to pointer from integer
of different size [-Wint-to-pointer-cast]
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Disable internal clock by clearing the internal
clock enable bit. This bit needs to be cleared too
when we stop the SDCLK for changing the frequency
divisor. This bit should be set to zero when the
device is not using the Host controller.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
When CONFIG_API is selected with DM_ETH this
error is present:
api/api_net.c: In function 'dev_enum_net':
api/api_net.c:61:35: warning: initialization from incompatible pointer
type
struct eth_device *eth_current = eth_get_dev();
^
api/api_net.c:68:39: error: dereferencing pointer to incomplete type
memcpy(di->di_net.hwaddr, eth_current->enetaddr, 6);
^
Disable api_net functions when ETH_DM is selected.
Signed-off-by: Chris Johns <chrisj@rtems.org>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Based on:
"ARM: uniphier: use the default CONFIG_BOOTDELAY=2"
(sha1: 7c8ef0feb9)
"I do not insist on CONFIG_BOOTDELAY=3. The default value in Kconfig,
CONFIG_BOOTDELAY=2, is just fine for these boards."
Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Per Vikas' request, the problem this commit is supposed to be solving is
something he doesn't see and further this introduces additional hardware
requirements.
This reverts commit 4b2fd720a7.
Signed-off-by: Tom Rini <trini@konsulko.com>
Adds information regarding SPL handling validation process of main u-boot
image on power/mpc85xx and arm/layerscape platforms.
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
For mpc85xx SoCs, the core begins execution from address 0xFFFFFFFC.
In non-secure boot scenario from NAND, this address will map to CPC
configured as SRAM. But in case of secure boot, this default address
always maps to IBR (Internal Boot ROM).
The IBR code requires that the bootloader(U-boot) must lie in 0 to 3.5G
address space i.e. 0x0 - 0xDFFFFFFF.
For secure boot target from NAND, the text base for SPL is kept same as
non-secure boot target i.e. 0xFFFx_xxxx but the SPL U-boot binary will
be copied to CPC configured as SRAM with address in 0-3.5G(0xBFFC_0000)
As a the virtual and physical address of CPC would be different. The
virtual address 0xFFFx_xxxx needs to be mapped to physical address
0xBFFx_xxxx.
Create a new PBI file to configure CPC as SRAM with address 0xBFFC0000
and update DCFG SCRTACH1 register with location of Header required for
secure boot.
The changes are similar to
commit 467a40dfe3
powerpc/mpc85xx: SECURE BOOT- NAND secure boot target for P3041
While P3041 has a 1MB CPC and does not require SPL. On T104x, CPC
is only 256K and thus SPL framework is used.
The changes are only applicable for SPL U-Boot running out of CPC SRAM
and not the next level U-Boot loaded on DDR.
Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
As part of Chain of Trust for Secure boot, the SPL U-Boot will validate
the next level U-boot image. Add a new function spl_validate_uboot to
perform the validation.
Enable hardware crypto operations in SPL using SEC block.
In case of Secure Boot, PAMU is not bypassed. For allowing SEC block
access to CPC configured as SRAM, configure PAMU.
Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Due to the blow up of the latest kernel size, the default gnuzip
size (8M) seems too small. The yocto kernel size I built for
mpc8315erdb board is 5294393, and it can't be boot by using the
latest u-boot. So expand gnuzip buffer for all the mpc83xx boards
to fix this issue.
Robert P. J. Day also pointed that the kernel partition on the NAND
flash is also too small, fix it at the same time.
Reported-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Kevin Hao <kexin.hao@windriver.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Robert P. J. Day has pointed that the value of SYS_MONITOR_LEN in
MPC8315ERDB.h is smaller than the u-boot.bin. This will cause the
overlap between the code of u-boot and the environment variable.
So when executing saveenv, it will corrupt the code of u-boot and
causes the board not boot. Fix this for all the mpc83xx boards by
reserving a 512K area.
Reported-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Kevin Hao <kexin.hao@windriver.com>
Reviewed-by: York Sun <york.sun@nxp.com>
On Tegra186, U-Boot is booted by the binary firmware as if it were a
Linux kernel. Consequently, a DTB is passed to U-Boot. Cache the address
of that DTB, and parse the /memory/reg property to determine the actual
RAM regions that U-Boot and subsequent EL2/EL1 SW may actually use.
Given the binary FW passes a DTB to U-Boot, I anticipate the suggestion
that U-Boot use that DTB as its control DTB. I don't believe that would
work well, so I do not plan to put any effort into this. By default the
FW-supplied DTB is the L4T kernel's DTB, which uses non-upstreamed DT
bindings. U-Boot aims to use only upstreamed DT bindings, or as close as
it can get. Replacing this DTB with a DTB using upstream bindings is
physically quite easy; simply replace the content of one of the GPT
partitions on the eMMC. However, the binary FW at least partially relies
on the existence/content of some nodes in the DTB, and that requires the
DTB to be written according to downstream bindings. Equally, if U-Boot
continues to use appended DTBs built from its own source tree, as it does
for all other Tegra platforms, development and deployment is much easier.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Implement a hook to allow boards to save boot-time CPU state for later
use. When U-Boot is chain-loaded by another bootloader, CPU registers may
contain useful information such as system configuration information. This
feature mirrors the equivalent ARMv7 feature.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Rev A03 of P2180 requires some PMIC programming adjustments, yet the
PMIC's own OTP has not been updated. Consequently, U-Boot must make
these changes itself.
NVIDIA's syseng team has confirmed that these changes can be enabled on
all board revisions without issue.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
IVC (Inter-VM Communication) protocol is a Tegra-specific IPC (Inter
Processor Communication) framework. Within the context of U-Boot, it is
typically used for communication between the main CPU and various
auxiliary processors. In particular, it will be used to communicate with
the BPMP (Boot and Power Management Processor) on Tegra186 in order to
manipulate clocks and reset signals.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Many files in arch/arm/mach-tegra are compiled conditionally based on
Kconfig variables, or applicable to all platforms. We can let the main
Tegra Makefile handle compiling (or not) those files to avoid each SoC-
specific Makefile needing to duplicate entries for those files. This
leaves the SoC-specific Makefiles to compile truly SoC-specific code.
In the future, we'll hopefully add Kconfig variables for all the other
files, and refactor those files, and so reduce the need for SoC-specific
Makefiles and/or ifdefs in the Makefiles.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
There are multiple versions of p2771-0000 board. There are SW visible
incompatible differences between the versions, and they are relevant to
U-Boot. Create separate "A02" and "B00" defconfigs (named after the first
and/or only board rev the defconfig supports) so that users can select
which build they want.
With the minimal set of HW currently enabled in U-Boot, the differences
are irrelevant, hence the DT files aren't different. However, that will
change in a future patch.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tegra186 uses different GPIO port IDs compared to previous chips. Make
sure the SoC DT file includes the correct GPIO binding header.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Commit 555f45d8f9 ("image: Convert the IH_... values to enums")
accidentally changed some IH_ARCH_... values.
Prior to that commit, there existed a gap between IH_ARCH_M68K and
IH_ARCH_MICROBLAZE, like follows.
#define IH_ARCH_SPARC64 11 /* Sparc 64 Bit */
#define IH_ARCH_M68K 12 /* M68K */
#define IH_ARCH_MICROBLAZE 14 /* MicroBlaze */
#define IH_ARCH_NIOS2 15 /* Nios-II */
The enum conversion broke the compatibility with existing uImage
files. Reverting 555f45d8f9 will cause build error unfortunately,
so here is a more easy fix.
I dug the git history and figured out the gap was introduced by
commit 1117cbf2ad ("nios: remove nios-32 arch"). So, I revived
IH_ARCH_NIOS just for filling the gap.
I added comments to each enum block. Once we assign a value to
IH_... it is not allowed to change it.
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
I2C offset was changed by commit 00f792e0 (added multibus support)
from 0x3100 to 0x3000. This typo leads to error when reading SPD
from DDR DIMMs.
Signed-off-by: Benjamin Kamath <bkamath@spaceflight.com>
Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
flash_full_status_check() checks bit XSR.7 on Intel chips. This
should be done by only checking bit 7 and not by comparing the
whole status byte or word with 0x80.
This fixes the non-working block erase in the pflash emulation
of Qemu when used with the MIPS Malta board. MIPS Malta uses x32
mode to access the pflash device. In x32 mode Qemu mirrors the
lower 16 bits of the status word into the upper 16 bits. Thus
the CFI driver gets a status word of 0x8080 in x32 mode. If
flash_full_status_check() uses flash_isequal(), then it polls for
XSR.7 by comparing 0x8080 with 0x80 which never becomes true.
Reported-by: Alon Bar-Lev <alon.barlev@gmail.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The PPA use PSCI to make secondary cores bootup. So when PPA was
enabled, add the CONFIG_ARMV8_PSCI to identify the SMP boot-method
between PSCI and spin-table.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Set the enable-method in the cpu node to PSCI, and create device
node for PSCI, when PSCI was enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
If the PSCI and PPA is ready, skip the fixup for spin-table and
waking secondary cores. Otherwise, change SMP method to spin-table,
and the device node of PSCI will be removed.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The FSL Primary Protected Application (PPA) is a software component
loaded during boot which runs in TrustZone and remains resident
after boot.
Use the secure firmware framework to integrate FSL PPA into U-Boot.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This framework is introduced for ARMv8 secure monitor mode firmware.
The main functions of the framework are, on EL3, verify the firmware,
load it to the secure memory and jump into it, and while it returned
to U-Boot, do some necessary setups at the 'target exception level'
that is determined by the respective secure firmware.
So far, the framework support only FIT format image, and need to define
the name of which config node should be used in 'configurations' and
the name of property for the raw secure firmware image in that config.
The FIT image should be stored in Byte accessing memory, such as NOR
Flash, or else it should be copied to main memory to use this framework.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This function assume that the d-cache and MMU has been enabled earlier,
so it just created MMU table in main memory. But the assumption is not
always correct, for example, the early setup is done in EL3, while
enable_caches() is called when the PE has turned into another EL.
Define the function mmu_setup() for fsl-layerscape to cover the weak
one.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Drop platform code to create static MMU tables. Use common framework
to create MMU tables on the run. Tested on LS2080ARDB with secure and
non-secure ram scenarios.
Signed-off-by: York Sun <york.sun@nxp.com>
This should be spl_of_platdata, since otherwise it will try to run on boards
that don't support of-platdata.
Signed-off-by: Simon Glass <sjg@chromium.org>
Introduce virtual and physical addresses in the mapping table. This change
have no impact on existing boards because they all use idential mapping.
Signed-off-by: York Sun <york.sun@nxp.com>
When page tables are created, allow later table to be created on
previous block entry. Splitting block feature is already working
with current code. This patch only rearranges the code order and
adds one condition to call split_block().
Signed-off-by: York Sun <york.sun@nxp.com>
Make setup_pgtages() and get_tcr() available for platform code to
customize MMU tables.
Remove unintentional call of create_table().
Signed-off-by: York Sun <york.sun@nxp.com>
When secure ram is used, MMU tables have to be put into secure ram.
To use common MMU code, gd->arch.tlb_addr will be used to host TLB
entry pointer. To save allocated memory for later use, tlb_allocated
variable is added to global data structure.
Signed-off-by: York Sun <york.sun@nxp.com>
Secure_ram variable was put in generic global data. But only ARMv8
uses this variable. Move it to ARM specific data structure.
Signed-off-by: York Sun <york.sun@nxp.com>
Now that we have a secure data section for storing variables, there
should be no need for platform code to get the stack address.
Make psci_get_cpu_stack_top a local function, as it should only be
used in armv7/psci.S and only by psci_stack_setup.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Now that we have a secure data section and space to store per-CPU target
PC address, switch to it instead of storing the target PC on the stack.
Also save clobbered r4-r7 registers on the stack and restore them on
return in psci_cpu_on for Tegra, i.MX7, and LS102xA platforms.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Now that we have a data section, add helper functions to save and fetch
per-CPU target PC.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The secure monitor may need to store global or static values within the
secure section of memory, such as target PC or CPU power status.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
sunxi and i.mx7 both define the __secure modifier to put functions in
the secure section. Move this to a common place.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
As the PSCI implementation grows, we might exceed the size of the secure
memory that holds the firmware.
Add a configurable CONFIG_ARMV7_SECURE_MAX_SIZE so platforms can define
how much secure memory is available. The linker then checks the size of
the whole secure section against this.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
psci_text_end was used to calculate the PSCI stack address following the
secure monitor text. Now that we have an explicit secure stack section,
this is no longer used.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Now that we have a secure stack section that guarantees usable memory,
allocate the PSCI stacks in that section.
Also add a diagram detailing how the stacks are placed in memory.
Reserved space for the target PC remains unchanged. This should be
moved to global variables within a secure data section in the future.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Until now we've been using memory beyond psci_text_end as stack space
for the secure monitor or PSCI implementation, even if space was not
allocated for it.
This was partially fixed in ("ARM: allocate extra space for PSCI stack
in secure section during link phase"). However, calculating stack space
from psci_text_end in one place, while allocating the space in another
is error prone.
This patch adds a separate empty secure stack section, with space for
CONFIG_ARMV7_PSCI_NR_CPUS stacks, each 1 KB. There's also
__secure_stack_start and __secure_stack_end symbols. The linker script
handles calculating the correct VMAs for the stack section. For
platforms that relocate/copy the secure monitor before using it, the
space is not allocated in the executable, saving space.
For platforms that do not define CONFIG_ARMV7_PSCI_NR_CPUS, a whole page
of stack space for 4 CPUs is allocated, matching the previous behavior.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The original PSCI implementation assumed CONFIG_ARMV7_PSCI_NR_CPUS=4.
Add this to platforms that have not defined it, using CONFIG_MAX_CPUS if
it is defined, or the actual number of cores for the given platform.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Targets that define CONFIG_ARMV7_SECURE_BASE will copy the secure section
to another address before execution.
Since the secure section in the u-boot image is only storage, there's
no reason to page align it and increase the binary image size.
Page align the secure section only when CONFIG_ARMV7_SECURE_BASE is not
defined. And instead of just aligning the __secure_start symbol, align
the whole .__secure_start section. This also makes the section empty,
so we need to add KEEP() to the input entry to prevent the section from
being garbage collected.
Also use ld constant "COMMONPAGESIZE" instead of hardcoded page size.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
This patch finishes the rewrite of sunxi specific PSCI parts into C
code.
The assembly-only stack setup code has been factored out into a common
function for ARMv7. The GIC setup code can be renamed as psci_arch_init.
And we can use an empty stub function for psci_text_end.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Every platform has the same stack setup code in assembly as part of
psci_arch_init.
Move this out into a common separate function, psci_stack_setup, for
all platforms. This will allow us to move the remaining parts of
psci_arch_init into C code, or drop it entirely.
Also provide a stub no-op psci_arch_init for platforms that don't need
their own specific setup code.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The Orange Pi Lite SBC is a small H3 based SBC, with 512MB RAM,
micro-sd slot, HDMI out, 2 USB-A connectors, 1 micro-USB connector,
sdio attached rtl8189ftv wifi and an ir receiver.
The dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
This enables extra USB controllers which enable use of the 3rd USB
port on the new Orange Pi Plus 2E variant.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The Plus variant of the Orange Pi PC has an eMMC, add support for this.
Note we are using the same u-boot defconfig / dts for both the regular
Orange Pi PC as well as the Orange Pi PC Plus.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Now that we know that the BROM stores a value indicating the boot-source
at the beginning of SRAM, use that instead of trying to recreate the
BROM's boot probing.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
We always define CONFIG_MISC_INIT_R on sunxi and misc_init_r is never
called in the spl, so the linker will optimize it and parse_spl_header(),
of which it is the only caller, away.
On the tests I've done (Orange Pi PC build) the SPL actually becomes
8 bytes smaller with this patch.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Currently we fill ethaddr with a fixed unique address based on the SoCs
serial (from the sid) to make sure that boards which use the integrated
emac / gmac get a fixed mac rather then a random one.
On some boards the wifi does not come with a fixed mac either, so we need
to also set eth1addr.
This commit changes the ethaddr setting code to check for ethernet%d
aliases (as fdt_fixup_ethernet does) and set an ethaddr variable for
all present aliases.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
This patch add EMAC driver support for H3/A83T/A64 SoCs.
Tested on Pine64(A64-External PHY) and Orangepipc(H3-Internal PHY).
BIG Thanks to Andre for providing some of the DT code.
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
With a recent bunch of SD3.0 cards in our A20-based board we
experienced data transfer rates of about 250 KiB/s instead of 10 MiB/s
with previous cards from the same vendor (both 4 GB/class 10). By
increasing status register polling rate from 1 kHz to 1 MHz we were
able to reach the original transfer rates again. With the old cards
we now even reach about 16 MiB/s.
Signed-off-by: Tobias Doerffel <tobias.doerffel@ed-chemnitz.de>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The patch converts one of the "reserved" fields in the sunxi SPL
header to a fel_uEnv_length entry. When booting over USB ("FEL
mode"), this enables the sunxi-fel utility to pass the string
length of uEnv.txt compatible data; at the same time requesting
that this data be imported into the U-Boot environment.
If parse_spl_header() in the sunxi board.c encounters a non-zero
value in this header field, it will therefore call himport_r() to
merge the string (lines) passed via FEL into the default settings.
Environment vars can be changed this way even before U-Boot will
attempt to autoboot - specifically, this also allows overriding
"bootcmd".
With fel_script_addr set and a zero fel_uEnv_length, U-Boot is
safe to assume that data in .scr format (a mkimage-type script)
was passed at fel_script_addr, and will handle it using the
existing mechanism ("bootcmd_fel").
Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de>
Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Allwinner devices support SPI flash as one of the possible
bootable media type. The SPI flash chip needs to be connected
to SPI0 pins (port C) to make this work. More information is
available at:
https://linux-sunxi.org/Bootable_SPI_flash
This patch adds the initial support for booting from SPI flash.
The existing SPI frameworks are not used in order to reduce the
SPL code size. Right now the SPL size grows by ~370 bytes when
CONFIG_SPL_SPI_SUNXI option is enabled.
While there are no popular Allwinner devices with SPI flash at
the moment, testing can be done using a SPI flash module (it
can be bought for ~2$ on ebay) and jumper wires with the boards,
which expose relevant pins on the expansion header. The SPI flash
chips themselves are very cheap (some prices are even listed as
low as 4 cents) and should not cost much if somebody decides to
design a development board with an SPI flash chip soldered on
the PCB.
Another nice feature of the SPI flash is that it can be safely
accessed in a device-independent way (since we know that the
boot ROM is already probing these pins during the boot time).
And if, for example, Olimex boards opted to use SPI flash instead
of EEPROM, then they would have been able to have U-Boot installed
in the SPI flash now and boot the rest of the system from the SATA
hard drive. Hopefully we may see new interesting Allwinner based
development boards in the future, now that the software support
for the SPI flash is in a better shape :-)
Testing can be done by enabling the CONFIG_SPL_SPI_SUNXI option
in a board defconfig, then building U-Boot and finally flashing
the resulting u-boot-sunxi-with-spl.bin binary over USB OTG with
a help of the sunxi-fel tool:
sunxi-fel spiflash-write 0 u-boot-sunxi-with-spl.bin
The device needs to be switched into FEL (USB recovery) mode first.
The most suitable boards for testing are Orange Pi PC and Pine64.
Because these boards are cheap, have no built-in NAND/eMMC and
expose SPI0 pins on the Raspberry Pi compatible expansion header.
The A13-OLinuXino-Micro board also can be used.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Revise the content based on the v2 additions. This is kept as a separate
patch to avoid confusing those who have already reviewed the v1 series.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Tom Rini <trini@konsulko.com>
Add a simple test which checks that the of-platdata system is working
correctly. The sequence is as follows:
- SPL starts up and probes all the UCLASS_MISC drivers
- There are 3 of these in sandbox.dts
- Therefore there should be 3 U_BOOT_DEVICE() declarations in dt-platdata.c
- These should produce 3 sandbox_spl_test devices
- Each device prints out its platform data when probed
- This test checks for this output and compares it against expectations
Signed-off-by: Simon Glass <sjg@chromium.org>
When sandbox SPL is enabled we want to start that rather than U-Boot proper,
since some tests may rely on running it first.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the SPL and U-Boot consoles both present the same error message
when the expected console output does not appear. Add "SPL" to the SPL error
message to resolve this ambiguity.
Signed-off-by: Simon Glass <sjg@chromium.org>
This board can sometimes be used for tests. Handle it the same way as
sandbox.
Note: I plan to drop the sandbox_spl board at some point and merge its
features into sandbox. So this commit may not be necessary.
Signed-off-by: Simon Glass <sjg@chromium.org>
As an experiment, move this board over to use of-platdata. This means that
its SPL configuration will come from C structures generated at build-time
from the device tree, instead of coming from the device tree at run-time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for of-platdata with rk3288 SDRAM initr. This requires decoding
the of-platdata struct and setting up the device from that. Also the driver
needs to be renamed to match the string that of-platdata will search for.
The platform data is copied from the of-platdata structure to the one used
by the driver. This allows the same code to be used with device tree and
of-platdata.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is more correct to avoid touching the device tree in the probe() method.
Update the driver to work this way. Note that only SPL needs to fiddle with
the SDRAM registers, so decoding the platform data fully is not necessary in
U-Boot proper.
Signed-off-by: Simon Glass <sjg@chromium.org>
The syscon devices all end up having diffent driver names with of-platdata,
since the driver name comes from the first string in the compatible list.
Add separate device declarations for each one, and add a bind method to set
up driver_data correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for of-platdata with rk3288. This requires disabling access to
the device tree and renaming the driver to match the string that of-platdata
will search for.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for of-platdata with rk3288. This requires decoding the
of-platdata struct and setting up the devices from that. Also the driver
needs to be renamed to match the string that of-platdata will search for.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is more correct to avoid touching the device tree in the probe() method.
Update the driver to work this way. Also add an error check on grf since if
that fails then we should not use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for of-platdata with rk3288. This requires decoding the
of-platdata struct and setting up the device from that. Also the driver
needs to be renamed to match the string that of-platdata will search for.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is more correct to avoid touching the device tree in the probe() method.
Update the driver to work this way.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an extra byte so that this data is not byteswapped. Add a comment to
the code to explain the purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a driver that works with of-platdata. It sets up the platform data and
calls the standard ns16550 driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
With of-platdata this driver cannot know the format of the of-platdata
struct, so we cannot use generic code for accessing the of-platdata. Each
SoC that uses this driver will need to set up ns16550's platdata for it.
So don't compile in the generic code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an implementation of this function which mirrors the functions of the
automatic device-tree implementation. This can be used with of-platdata to
create regmaps.
Signed-off-by: Simon Glass <sjg@chromium.org>
We plan to add a new way of creating a regmap for of-platdata. Move the
allocation code into a separate function so that it can be shared.
Signed-off-by: Simon Glass <sjg@chromium.org>
Devices which use of-platdata have their own platdata. However, in many
cases the driver will have its own auto-alloced platdata, for use with the
device tree. The ofdata_to_platdata() method converts the device tree
settings to platdata.
With of-platdata we would not normally allocate the platdata since it is
provided by the U_BOOT_DEVICE() declaration. However this is inconvenient
since the of-platdata struct is closely tied to the device tree properties.
It is unlikely to exactly match the platdata needed by the driver.
In fact a useful approach is to declare platdata in the driver like this:
struct r3288_mmc_platdata {
struct dtd_rockchip_rk3288_dw_mshc of_platdata;
/* the 'normal' fields go here */
};
In this case we have dt_platadata available, but the normal fields are not
present, since ofdata_to_platdata() is never called. In fact driver model
doesn't allocate any space for the 'normal' fields, since it sees that there
is already platform data attached to the device.
To make this easier, adjust driver model to allocate the full size of the
struct (i.e. platdata_auto_alloc_size from the driver) and copy in the
of-platdata. This means that when the driver's bind() method is called,
the of-platdata will be present, followed by zero bytes for the empty
'normal field' portion.
A new DM_FLAG_OF_PLATDATA flag is available that indicates that the platdata
came from of-platdata. When the allocation/copy happens, the
DM_FLAG_ALLOC_PDATA flag will be set as well. The dtoc tool is updated to
output the platdata_size field, since U-Boot has no other way of knowing
the size of the of-platdata struct.
Signed-off-by: Simon Glass <sjg@chromium.org>
When of-platdata is used in SPL we don't use the device tree. So there is no
point in attaching it. Adjust the Makefile to skip attaching the device tree
when of-platdata is enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
When CONFIG_OF_PLATDATA is enabled, we cannot use the u-boot,dm-pre-reloc
device tree property since the device tree is not available. However,
dt-platdata.c only includes devices which would have been present in the
device tree, and we can assume that all such devices are needed for SPL.
If they were not needed, they would have been omitted to save space.
So in this case, bind all devices regardless of the u-boot,dm-pre-reloc
setting. This avoids needing to add a DM_FLAG_PRE_RELOC to every driver,
thus affecting U-Boot proper also.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present assert() is not supported with tiny-printf, so when DEBUG is
enabled a build error is generated for each assert().
Add an __assert_fail() function to correct this. It prints a message and
then hangs.
Signed-off-by: Simon Glass <sjg@chromium.org>
When swig is not available, we can still build correctly. So make this
optional. Add a comment about how to enable this build.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a Python version of the libfdt library which contains enough features to
support the dtoc tool. This is only a very bare-bones implementation. It
requires the 'swig' to build.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update the Makefile to call dtoc to create the C header and source files,
then build these into the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
This tool can produce C struct definitions and C platform data tables.
This is used to support the of-platdata feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
This Python library provides a way to access the contents of the device
tree. It uses fdtget, so is inefficient for larger device tree files.
Signed-off-by: Simon Glass <sjg@chromium.org>
We cannot access the device tree in this case, so avoid compiling in the
various device-tree helper functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
When this feature is enabled, we cannot access the device tree to find out
which serial device to use. Just use the first serial driver we find.
Signed-off-by: Simon Glass <sjg@chromium.org>
This header can be included from anywhere, but will only pull in the
of-platdata struct definitions when this feature is enabled (and only in
SPL).
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a driver which uses of-platdata to obtain its platform data. This can
be used to test the feature in sandbox. It displays the contents of its
platform data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Provide a new function which can cope with obtaining information from
of-platdata instead of the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
When CONFIG_SPL_OF_PLATDATA is enabled we should not access the device
tree. Remove all references to this in the core driver-model code.
Signed-off-by: Simon Glass <sjg@chromium.org>
Start up the test devices. These print out of-platdata contents, providing a
check that the of-platdata feature is working correctly.
The device-tree changes are made to sandbox.dts rather than test.dts. since
the former controls the of-platdata generation.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to build SPL for sandbox. It provides additional
build coverage and allows SPL features to be tested in sandbox. However
it does not need worthwhile to always create an SPL build. It nearly
doubles the build time and the feature is (so far) seldom used.
So for now, create a separate build target for sandbox SPL. This allows
experimentation with this new feature without impacting existing workflows.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an sandbox implementation for the generic SPL framework. This supports
locating and running U-Boot proper.
Signed-off-by: Simon Glass <sjg@chromium.org>
When building an SPL image, override the link flags so that it uses the
system libraries. This is similar to the way the non-SPL image is built.
Signed-off-by: Simon Glass <sjg@chromium.org>
SPL is expected to load and run U-Boot. This needs to work with sandbox also.
Provide a function to locate the U-Boot image, and another to start it. This
allows SPL to function on sandbox as it does on other archs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Overriding the final link rule is possible with U-Boot proper. It us used to
create a sandbox image links with host libraries. To build a sandbox SPL
image we need the same feature for SPL.
To support this, update the SPL link rule so sandbox can override it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sandbox includes this code to provide build coverage. While we retain this
feature we should have sandbox build it. Sandbox does not in fact use the
I2C compatibility mode. Showing a warning for sandbox is just confusing,
since no conversion is expected.
Drop the warning for sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
SPL tends to be more space-constrained that U-Boot proper. Some error
messages are best suppressed in SPL. Add a macros to make this easy.
warn_non_spl() does nothing when built in SPL code.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present armv7 will unhappily invalidate a cache region and print an
error message. Make it skip the operation instead, as it does with other
cache operations.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Marek Vasut <marex@denx.de>
Enable bootz command on Texas Instruments DA850 EVM
board. This helps it boot zImage with device-tree
blob passed.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Tested-by: Kevin Hilman <khilman@baylibre.com>
Errata i727 is applicable on all OMAP5 and DRA7 variants but enabled only
on OMAP5 ES1.0. So, enable it on all platforms.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The function fixup_silent_linux() is called in status BOOTM_STATE_LOADOS
to silence Linux if variable 'silent' is set.
Currently only the 'bootm' command state machine contains
BOOTM_STATE_LOADOS, but others like 'booti' or 'bootz' commands do not.
This means silent Linux does not work with these commands.
This patch moves the fixup_silent_linux() call out of the
BOOTM_STATE_LOADOS state and into BOOTM_STATE_OS_PREP, to silence Linux
independently of the used command (booti, bootm or bootz).
Signed-off-by: Hector Palacios <hector.palacios@digi.com>
This change is to remove a halt at about 200KiB
while sending a large(1MiB) binary to a micro controller using USART1.
USART1 is connected to a PC via an on-board ST-Link debugger
that also functions as a USB-Serial converter.
However, it seems to loss some data occasionally.
So I changed the serial port to USART6 and connected it to the PC using
an FTDI USB-Serial cable, therefore the transmission was successfully
completed.
Signed-off-by: Toshifumi NISHINAGA <tnishinaga.dev@gmail.com>
Make the external devices the preferred ones when booting the system
(usb is already the first option). This allows users to easily boot
custom distributions without requiring them to reflash/customize u-boot.
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Signed-off-by: Ricardo Salveti <rsalveti@rsalveti.net>
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: Andreas Färber <afaerber@suse.de>
Acked-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Now that we have a suitable test framework we should move all tests into it.
The vboot test is a suitable candidate. Rewrite it in Python and move the
data files into an appropriate directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
We should not be returning -1 as an error code. This can mask a situation
where we run out of space adding things to the FIT. By returning the correct
error in this case (-ENOSPC) it can be handled by the higher-level code.
This may fix the error reported by Tom Van Deun here:
https://www.mail-archive.com/u-boot@lists.denx.de/msg217417.html
although I am not sure as I cannot actually repeat it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Tom Van Deun <tom.vandeun@wapice.com>
Reviewed-by: Teddy Reed <teddy.reed@gmail.com>
The error code may provide useful information for debugging. Add it to the
error string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Teddy Reed <teddy.reed@gmail.com>
Some tests want to execute a sequence of commands. Add a helper for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Teddy Reed <teddy.reed@gmail.com>
Sometimes we want to run a command and check that it fails. Add a function
to handle this. It can check the return code and also make sure that the
output contains a given error message.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is sometimes inconvenient to convert a string into a list for execution
with run_and_log(). Provide a helper function to do this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Teddy Reed <teddy.reed@gmail.com>
It is useful to be able to obtain the output from a command. Return it from
this function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Teddy Reed <teddy.reed@gmail.com>
Tests may want to look at the output from running a command, even if it
fails (e.g. with a non-zero return code). Provide a means to obtain this.
Another approach would be to return a class object containing both the
output and the exception, but I'm not sure if that would result in a lot
of refactoring.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Teddy Reed <teddy.reed@gmail.com>
Tests may want to look at the output from running a command. Return it so
that this is possible.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Teddy Reed <teddy.reed@gmail.com>
Normally tests will run with the test.dtb file designed for this purpose.
However, the verified boot tests need to run with their own device-tree
file, containing a public key.
Make the device-tree file a config option so that it can be adjusted by
tests. The default is to keep the current behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Teddy Reed <teddy.reed@gmail.com>
At present sandbox exits when the 'bootm' command completes, since it is not
actually able to run the OS that is loaded. Normally 'bootm' failure is
considered a fatal error in U-Boot.
However this is annoying for tests, which may want to examine the state
after a test is complete. In any case there is a 'reset' command which can
be used to exit, if required.
Change the behaviour to return normally from the 'bootm' command on sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Teddy Reed <teddy.reed@gmail.com>
A common check before sending patches is to run all available tests on
sandbox. But everytime I do this I have to look up the README. This presents
quite a barrier to actually doing this.
Add a shell script to help. To run the tests, type:
test/run
in the U-Boot directory, which should be easy to remember.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Teddy Reed <teddy.reed@gmail.com>
Sometimes it is useful to build tools with debugging information included so
that line-number information is available when run under gdb. Add a Kconfig
option to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Update the error-handling code for -A, -C and -O to show a list of valid
options when an invalid one is provided.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Vinoth Eswaran <evinoth1206@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The existing error code only displays image types which are claimed by a
particular U_BOOT_IMAGE_TYPE() driver. But this does not seem correct. The
mkimage tool should support all image types, so it makes sense to allow
creation of images of any type with the tool.
When an incorrect image type is provided, use generic code to display the
error.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add a generic function which can display a list of items in any category.
This will allow displaying of images for the -A, -C, -O and -T flags. At
present only -T is supported.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add generic functions which can look up information about a category:
- the number of items in the category
- the category description
- an item long time
- an item short time
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
At present the name is NULL, which prevents qsort() fromp being used. Use
the name "invalid" instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add a table that contains the category name, the number of items in each
category and a pointer to the table of items. This will allow us to use
generic code to deal with the categories.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
We need to know the number of values of each category (architecture,
compression, OS and image type). To make this value easier to maintain,
convert all values to enums. The count is then automatic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The fit_write_images() function incorrectly uses the long name for the
architecture. This cannot be parsed with the FIT is read. Fix this by using
the short name instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
There is no need to set params.fit_image_type while parsing the arguments.
It is set up later anyway.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
When auto-fit is used, it is not valid to create a FIT without an image
file. Add a check for this to avoid a very confusing error message later
("Can't open (null): Bad address").
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
There is a special case in the code when auto-fit is used. Add a comment to
make it easier to understand why this is needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The default image type is supposed to be IH_TYPE_KERNEL, as set in the
'params' variable. Honour this with auto-fit also.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
For most of architectures in U-Boot, virtual address is straight
mapped to physical address. So, it makes sense to have generic
defines of ioremap and friends in <linux/io.h>.
All of them are just empty and will disappear at compile time, but
they will be helpful to implement drivers which are counterparts of
Linux ones.
I notice MIPS already has its own implementation, so I added a
Kconfig symbol CONFIG_HAVE_ARCH_IOREMAP which MIPS (and maybe
Sandbox as well) can select.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
These defines are valid only when iomem_valid_addr is defined,
but I do not see such defines anywhere. Remove.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, this is only defined in arch/arm/include/asm/types.h,
so move it to include/linux/types.h to make it available for all
architectures.
I defined it with phys_addr_t as Linux does. I needed to surround
the define with #ifdef __KERNEL__ ... #endif to avoid build errors
in tools building. (Host tools should not include <linux/types.h>
in the first place, but this is already messy in U-Boot...)
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds information regarding SPL handling the loading and processing of
secured u-boot images as part of the second stage boot the SPL does.
Introduces the description of a new interface script in the TI SECDEV
Package which handles the creation and prep of secured binary images.
Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Modify the SPL build procedure for AM437x high-security (HS) device
variants to create a secure u-boot_HS.img FIT blob that contains U-Boot
and DTB artifacts signed (and optionally encrypted) with a TI-specific
process based on the CONFIG_TI_SECURE_DEVICE config option and the
externally-provided image signing tool.
Also populate the corresponding FIT image post processing call to be
performed during SPL runtime.
Signed-off-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Modify the SPL build procedure for AM57xx and DRA7xx high-security (HS)
device variants to create a secure u-boot_HS.img FIT blob that contains
U-Boot and DTB artifacts signed with a TI-specific process based on the
CONFIG_TI_SECURE_DEVICE config option and the externally-provided image
signing tool.
Also populate the corresponding FIT image post processing call to be
performed during SPL runtime.
Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The next stage boot loader image and the selected FDT can be post-
processed by board/platform/device-specific code, which can include
modifying the size and altering the starting source address before
copying these binary blobs to their final destination. This might be
desired to do things like strip headers or footers attached to the
images before they were packaged into the FIT, or to perform operations
such as decryption or authentication. Introduce new configuration
option CONFIG_SPL_FIT_IMAGE_POST_PROCESS to allow controlling this
feature. If enabled, a platform-specific post-process function must
be provided.
Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds commands so that when a secure device is in use and the SPL is
built to load a FIT image (with combined U-Boot binary and various
DTBs), these components that get fed into the FIT are all processed to
be signed/encrypted/etc. as per the operations performed by the
secure-binary-image.sh script of the TI SECDEV package. Furthermore,
perform minor comments cleanup to make better use of the available
space.
Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds an API that verifies a signature attached to an image (binary
blob). This API is basically a entry to a secure ROM service provided by
the device and accessed via an SMC call, using a particular calling
convention.
Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Adds a generic C-callable API for making secure ROM calls on OMAP and
OMAP-compatible devices. This API provides the important function of
flushing the ROM call arguments to memory from the cache, so that the
secure world will have a coherent view of those arguments. Then is
simply calls the omap_smc_sec routine.
Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add an interface for calling secure ROM APIs across a range of OMAP and
OMAP compatible high-security (HS) device variants. While at it, also
perform minor cleanup/alignment without any change in functionality.
Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Adds missing flush_dcache_range and invalidate_dcache_range dummy
(empty) placeholder functions to the #else portion of the #ifndef
CONFIG_SYS_DCACHE_OFF, where full implementations of these functions
are defined.
Signed-off-by: Daniel Allred <d-allred@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
There are two enable methods supported by ARM64 Linux; psci and
spin-table. The latter is simpler and helpful for quick SoC bring
up. My main motivation for this patch is to improve the spin-table
support, which allows us to boot an ARMv8 system without the ARM
Trusted Firmware.
Currently, we have multi-entry code in arch/arm/cpu/armv8/start.S
and the spin-table is supported in a really ad-hoc way, and I see
some problems:
- We must hard-code CPU_RELEASE_ADDR so that it matches the
"cpu-release-addr" property in the DT that comes from the
kernel tree.
- The Documentation/arm64/booting.txt in Linux requires that
the release address must be zero-initialized, but it is not
cared by the common code in U-Boot. We must do it in a board
function.
- There is no systematic way to protect the spin-table code from
the kernel. We are supposed to do it in a board specific manner,
but it is difficult to predict where the spin-table code will be
located after the relocation. So, it also makes difficult to
hard-code /memreserve/ in the DT of the kernel.
So, here is a patch to solve those problems; the DT is run-time
modified to reserve the spin-table code (+ cpu-release-addr).
Also, the "cpu-release-addr" property is set to an appropriate
address after the relocation, which means we no longer need the
hard-coded CPU_RELEASE_ADDR.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Upon further review this breaks most other platforms as we need to check
what core we're running on before touching it at all.
This reverts commit d73718f323.
Signed-off-by: Tom Rini <trini@konsulko.com>
With the change to set up pinctrl after relocation, link fails to boot. Add
a special case in the link code to handle this.
Fixes: d8906c1f (x86: Probe pinctrl driver in cpu_init_r())
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add support for Advantech SOM-DB5800 with the SOM-6867 installed.
This is very similar to conga-qeval20-qa3-e3845 in that there is a
reference carrier board (SOM-DB5800) with a Baytrail based SoM (SOM-6867)
installed.
Currently supported:
- 2x UART (From ITE EC on SOM-6867) routed to COM3/4 connectors on
SOM-DB5800.
- 4x USB 2.0 (EHCI)
- Video
- SATA
- Ethernet
- PCIe
- Realtek ALC892 HD Audio
Pad configuration for HDA_RSTB, HDA_SYNC, HDA_CLK, HDA_SDO
HDA_SDI0 is set in DT to enable HD Audio codec.
Pin defaults for codec pin complexs are not changed.
Not supported:
- Winbond Super I/O (Must be disabled with jumpers on SOM-DB8500)
- USB 3.0 (XHCI)
- TPM
Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This introduces quark-specific ACPI global NVS structure, defined in
both C header file and ASL file.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds support to enable and use the internal BayTrail UART
instead of the one integrated in the Super IO Winbond chip. For this,
a 2nd defconfig file is added.
This is useful for tests done for the congatec SoM used on baseboards
without such a Super IO chip.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For any FSP-enabled boards that want to enable debug UART support,
setup_internal_uart() will be called, but this API is only available
on BayTrail platform. Change to wrap it with CONFIG_INTERNAL_UART.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are quite a number of BayTrail boards that uses an external
SuperIO chipset to provide the legacy UART. For such cases, it's
better to have a Kconfig option to enable the internal UART.
So far BayleyBay and MinnowMax boards are using internal UART as
the U-Boot console, enable this on these two boards.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
For consistency with board_should_run_oprom(), do the same to
should_load_oprom(). Board support codes can provide this one
to override the default weak one.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present should_load_oprom() calls board_should_run_oprom() to
determine whether oprom should be loaded. But sometimes we just
want to load oprom without running. Make them independent.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch support the driver mode for exynos dwmmc controller.
To support the legacy model, maintained the existing code.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
If there is not "samsung,bus-width" property, use the 4bit buswidth by
default.
Almost all Exnyos SoCs support at least 4bit buswidth.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Clean the unused and unnecessary codse.
This patch is one of them for preparing to use DM.
Because it's easy to maintain and combine DM after cleaning codes.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
PERIPH_ID_SDMMC4(131) is not continous value with PERIPH_ID_SDMMC0(75).
If there is no 'index' property in fdt, then dev_index should be
assigned to dev_id(Peripheral ID).
At this time, dev_index should be "56". It means Exynos SoC has "56"
numbers of DWMMC IP. To prevent this behavior, it needs to check the
maximum device index.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
This function have maintained for supporting Non-FDT.
Now, Almost all SoC are changed to fdt style.
So there are no that this function is called anywhere.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The following python error:
Traceback (most recent call last):
File "./tools/patman/patman", line 144, in <module>
series = patchstream.FixPatches(series, args)
File "./tools/patman/patchstream.py", line 477, in FixPatches
commit = series.commits[count]
IndexError: list index out of range
is seen when:
- 'END' is missing in those tags
- those tags are put in the last part in a commit message
- the commit is not the last commit of the series
Add testing logic to see if a new commit starts.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
'Series-changes' uses blank line to indicate its end. If that is
missing, series internal state variable 'in_change' may be wrong.
Correct its state.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
If 'END' is missing in a 'Cover-letter' section, and that section
happens to show up at the very end of the commit message, and the
commit is the last commit of the series, patman fails to generate
cover letter for us. Handle this in CloseCommit of patchstream.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
'Cover-letter', 'Series-notes' and 'Commit-notes' tags require an
'END' to be put at the end of its section. If we forget to put an
'END' in those sections, and these sections are followed by another
patman tag, patman generates incorrect patches. This adds codes to
handle such scenario.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Like other patman tags, use a new variable cover_match to indicate
a match for 'Cover-letter'.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Some uclass ids are out of order. Per the comments, sort them
in alphabetical order.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
The cros-ec keyboard is always a child of the cros-ec node. Rather than
searching the device tree, looking at the children. Remove the compat string
which is now unused.
Signed-off-by: Simon Glass <sjg@chromium.org>
The 'COMPAT_' part should appear only once so drop the duplicate part. It is
ignored anyway, but let's keep things consistent.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The list is shrinking and we should avoid adding new things. Instead, a
proper driver should be created with driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
A few drivers have moved to driver model, so we can drop these strings.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
We have drivers for several more devices now, so drop the strings which are
no-longer used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This fixes the following compiler error:
common/fb_mmc.c: In function ‘fb_mmc_erase’:
common/fb_mmc.c:209:17: error: ‘struct blk_desc’ has no member named
‘block_erase’
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Define a platform data structure for the MPC85XX GPIO driver to allow
use of the driver without device tree. Users should define the GPIO
blocks for their platform like this:
struct mpc85xx_gpio_plat gpio_blocks[] = {
{
.addr = 0x130000,
.ngpios = 32,
},
{
.addr = 0x131000,
.ngpios = 32,
},
};
U_BOOT_DEVICES(my_platform_gpios) = {
{ "gpio_mpc85xx", &gpio_blocks[0] },
{ "gpio_mpc85xx", &gpio_blocks[1] },
};
This is intended to build upon the recent submission of the base
MPC85XX driver from Mario Six. We need to use that new driver
without dts support and this patch gives us that flexibility.
This has been tested on a Freescale T2080 CPU, although only the first
GPIO block.
Signed-off-by: Hamish Martin <hamish.martin@alliedtelesis.co.nz>
Reviewed-by: Mario Six <mario.six@gdsys.cc>
Tested-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Simon Glass <sjg@chromium.org>
The driver model conversion for MMC has moved in small steps. The first step
was to have an MMC device (CONFIG_DM_MMC). The second was to use a child
block device (CONFIG_BLK). The final one is to use driver model for MMC
operations (CONFIG_DM_MMC_OP). Add support for this.
The immediate priority is to make all boards that use DM_MMC also use those
other two options. This will allow them to be removed.
Signed-off-by: Simon Glass <sjg@chromium.org>
This option is not actually needed for rockchip boards. Drop it, since it
will not support driver-model MMC operation support.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move this code into separate functions so that it can be used from the uclass
also. Add static inline versions for when the option is disabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rather than having an #ifdef in the main mmc.c file, control this feature
from the Makefile by moving the code into its own file.
Signed-off-by: Simon Glass <sjg@chromium.org>
These private functions are used both in the driver-model implementation and
in the legacy code. Add them to the header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Rockchip uses driver model for all subsystems. Specify this in the arm
Kconfig rather than as defaults in the Rockchip Kconfig. This means that
boards cannot turn these options off, which seems correct.
Signed-off-by: Simon Glass <sjg@chromium.org>
These comments were missed when the original code was written. Add them to
help people port their drivers over.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since we lack information about the DRAM initialization for the
Allwinner A64 SoC, booting any A64 based board like the Pine64 is a bit
involved at the moment.
Add a README file to explain the process.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Move to board/sunxi/ from doc/]
Signed-off-by: Tom Rini <trini@konsulko.com>
Because a gpimage cannot be detected, a false
GP header is printed instead of checking
for further image types.
Move gpimage as last to be linked, letting check
all other image types and printing a GP header just
in case no image is detected.
Signed-off-by: Stefano Babic <sbabic@denx.de>
In case of DT boot, don't read default speed and mode for SPI from
CONFIG_*, instead read from DT node. This will make sure that boards
with multiple SPI/QSPI controllers can be probed at different
bus frequencies and SPI modes.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on
DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas
MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better
throughput.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Enable Cadence QSPI controller support to use QSPI on K2G SoC. Also
enable Spansion flash support to access s25fl512s flash present on K2G
QSPI bus.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
K2G SoC has a Cadence QSPI controller to communicate with NOR flash
devices. Add DT nodes to support the same.
Also, K2G EVM has a s25fl512s flash connect to QSPI bus at CS 0. Add nor
flash slave node for the same.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Instead of relying on CONFIG_SPI_FLASH_QUAD to be defined to enable QUAD
mode, make use of mode_rx field of dm_spi_slave_platdata to determine
whether to enable or disable QUAD mode. This is necessary to support
muliple SPI controllers where one of them may not support QUAD mode.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
AHB address can be as long as 32 bit, hence remove the
CQSPI_REG_INDIRECTRDSTARTADDR mask. Since AHB address is passed from DT
and read as u32 value, it anyway does not make sense to mask upper bits.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Tested-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Enable SPI and SPI Flash driver model as K2G SPI controller driver
supports driver model.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
K2G SoC has 4 SPI instances that are compatible with davinci_spi
controller(present on previous generation of Keystone2 devices). Add DT
nodes for the same. K2G EVM has a N25Q128A13 SPI NOR flash connected on
SPI-1. Add DT bindings for the same.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Enable SPI and SPI Flash driver model as K2L SPI controller driver
supports driver model.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Now that davinci_spi driver has been converted to DM framework, enable
the same in DT. Also add "spi-flash" as compatible property to
n25q128a11 node as it is required for flash device to be probed in
U-Boot.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Enable SPI and SPI Flash driver model as K2E SPI controller driver
supports driver model.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Now that davinci_spi driver has been converted to DM framework, enable
the same in DT. Also add "spi-flash" as compatible property to
n25q128a11 node as it is required for flash device to be probed in
U-Boot.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Enable SPI and SPI Flash driver model as K2HK SPI controller driver
supports driver model.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Now that davinci_spi driver has been converted to DM framework, enable
the same in DT. Also add "spi-flash" as compatible property to
n25q128a11 node as it is required for flash device to be probed in
U-Boot.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Add aliases for SPI nodes in order for it to be probed by the DM
framework.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Since Keystone2 devices do not have support DM in SPL, do not define
DM_SPI and DM_SPI_FLASH for SPL build.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Convert davinci_spi driver so that it complies with SPI DM framework.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
This API helps to map physical register addresss pace of device to
virtual address space easily. Its just a wrapper around map_physmem()
with MAP_NOCACHE flag.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Suggested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jteki@openedev.com>
For A53, data coherency is enabled only when the CPUECTLR.SMPEN bit is
set. The SMPEN bit should be set before enabling the data cache.
If not enabled, the cache is not coherent with other cores and
data corruption could occur.
For A57/A72, SMPEN bit enables the processor to receive instruction
cache and TLB maintenance operations broadcast from other processors
in the cluster. This bit should be set before enabling the caches and
MMU, or performing any cache and TLB maintenance operations.
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Some archs like MIPS or PPC have a different 'bdinfo' output
than ARM regarding the memory configuration. Also support
'memstart = 0x*' in u_boot_utils.find_ram_base() to make
all tests requiring the RAM base working on those archs.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Prior to this patch, any VT100 codes emitted by U-Boot are considered part
of a command's output, which often causes tests to fail. For example,
test_env_echo_exists executes printenv, and then considers any text on a
line before an = sign as a valid U-Boot environment variable name. This
includes any VT100 codes emitted. When the test later attempts to use that
variable, the name would be invalid since it includes the VT100 codes.
Solve this by stripping VT100 codes from the match buffer, so they are
never seen by higher level test code.
The codes are still logged unmodified, so that users can expect U-Boot's
exact output without interference. This does clutter the log file a bit.
However, it allows users to see exactly what U-Boot emitted rather than a
modified version, which hopefully is better for debugging. It's also much
simpler to implement, since logging happens as soon as text is received,
and so stripping the VT100 codes from the log would require handling
reception and stripping of partial VT100 codes.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Commit e677724 (arm: Fix setjmp) added code to fix compilation of the setjmp
code path with thumv1. Unfortunately it missed a constraint that the adr
instruction can only refer to 4 byte aligned offsets.
So this patch adds the required alignment hooks to make compilation
work again even when setjmp doesn't happen to be 4 byte aligned.
Signed-off-by: Alexander Graf <agraf@suse.de>
Tested-by: Tom Rini <trini@konsulko.com>
As printf calls may be executed quite early, we should avoid using any
BSS stored variables, since some boards put BSS in DRAM, which may not
have been initialised yet.
Explicitly mark those "static global" variables as belonging to the
.data section, to keep tiny-printf clear of any BSS usage.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Some CONFIG_ variables were recently renamed, but test/py wasn't updated
to match. This causes some tests to be skipped. Fix test/py so the tests
are run.
Fixes: 1163625898 ("Rename reset to sysreset")
Fixes: f1f9d4fac5 ("hush: complete renaming CONFIG_SYS_HUSH_PARSER to CONFIG_HUSH_PARSER")
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
MMC core expects (now) valid mmc->dev pointer.
During conversion in commit cffe5d86 not every driver was updated.
This patch fixes crash while accessing MMC on
boards using Qualcomm SDHCI controller.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Commit 9262367 moves USB errata workaround into a C file. This
causes compiling error for kmcoge4 and kmlion1. To enable the
errata workaround, define CONFIG_USB_EHCI_FSL in common header.
Signed-off-by: York Sun <york.sun@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Ed Swarthout <Ed.Swarthout@nxp.com>
Cc: Sriram Dash <sriram.dash@nxp.com>
Fixes: 92623672f9 ("fsl: usb: make errata function common for PPC and ARM")
Return value of rtl_send_common propogates unmodified all the way
up to eth_send and further to API consumer if CONFIG_API is enabled.
Previously rtl_send_common returned number of bytes sent on success
which was erroneouly detected as error condition by API consumers
that checked for operation success by comparing return value with 0.
Switch rtl_send_common to use common convention: return 0 on success
and negative value for failure.
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Oleksandr Tymoshenko <gonzo@bluezbox.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This patch fixes incorrect RPC packet layout caused by
'long' type size difference on 64 and 32-bit architectures.
Signed-off-by: Ralf Hubert <r.hubert@technisat.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
We want people using errnos for errors instead of -1, so make it easy
by always including the definition of all the errnos.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We have driver-model drivers for some of these now, so drop them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
We have standard drivers for panels and backlights which can do most of the
work for us. Move the tegra20 LCD driver over to use those instead of custom
code.
This patch includes device tree changes for the nvidia boards. I have only
been able to test seaboard. If this patch is applied, these boards will
also need to be synced with the kernel, and updated to use display-timings:
- colibri
- medcom-wide
- paz00
- tec
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Sync everything except the display panel, which will come in a future patch.
One USB port is left disabled since we don't want to support it in U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The pmic framework uses errno_str() and this requires board that use it to
enable CONFIG_ERRNO_STR to avoid a build error. Update the header to provide
a NULL error message when CONFIG_ERRNO_STR is not defined, and fix the build
error.
This will show as "(null)" when U-Boot prints it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Bring in a copyright for this file from cmd/pmic.c since this file was
submitted by the same author at around the same time. Also fix the missing
header guard.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
On recent SoCs, tegra_pcie_phy_enable() isn't called; but instead
tegra_pcie_enable_controller() calls tegra_xusb_phy_enable(). However,
part of tegra_pcie_phy_enable() needs to happen in all cases. Move that
code to tegra_pcie_port_enable() instead.
For reference, NVIDIA's downstream Linux kernel performs this operation
in tegra_pcie_enable_rp_features(), which is called immediately after
tegra_pcie_port_enable(). Since that function doesn't exist in the U-Boot
driver, we'll just add it to the tail of tegra_pcie_port_enable() instead.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The value that should be programmed into the PADS_REFCLK register varies
per SoC. Fix the Tegra PCIe driver to program the correct values. Future
SoCs will require different values in cfg0/1, so the two values are stored
separately in the per-SoC data structures.
For reference, the values are all documented in NV bug 1771116 comment 20.
The Tegra210 value doesn't match the current TRM, but I've filed a bug to
get the TRM fixed. Earlier TRMs don't document the value this register
should contain, but the ASIC team has validated all these values, except
for the Tegra20 value which is simply left unchanged in this patch.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Waiting 30 seconds for the hpd to go high seems a bit much, especially
on headless boots. Lowering the timeout to 300ms.
Sending as RFC because frankly i don't know what a sensible timeout is
here, but 30 seconds is clearly not it :)
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Dropped RFC tag:
Signed-off-by: Simon Glass <sjg@chromium.org>
The errata command is useless in SPL, so don't build it. This fixes
multiple build failures on PowerPC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: York Sun <york.sun@nxp.com>
Fixes: 92623672f9 ("fsl: usb: make errata function common for PPC and ARM")
The old dm "usb info" implementation has several issues:
1) NULL pointer deref when a bus has no children
2) Not showing usb devices on busses without an emulated root-hub (otg host)
3) Attempting to show devices on inactive busses
4) "usb info" Would cause some hosts to get re-probed something which only
"usb reset" should do
TL;DR: proper iterating over usb bus root devs is hard, use the helper
for it.
Reported-by: Bernhard Nortmann <bernhard.nortmann@web.de>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Iterating over usb-root devs and doing something for all of them is
a bit tricky with dm, factor out the proven usb_show_tree() for this
into a helper function.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Currently on attempt to use global_data.h in an assembly file following
will happen:
-------------------->8-----------------
./arch/arc/include/asm/global_data.h: Assembler messages:
./arch/arc/include/asm/global_data.h:11: Error: bad instruction 'struct arch_global_data{'
./arch/arc/include/asm/global_data.h:12: Error: junk at end of line, first unrecognized character is `}'
scripts/Makefile.build:316: recipe for target 'arch/arc/lib/start.o' failed
-------------------->8-----------------
In this change we disable struct arch_global_data in ASM which fixes
the issue above.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Newer ARC toolchains don't support "-marchs" option any longer.
Instead "-mcpu=archs" should be used. What's also important older
toiolchains that support ARC HS cores will also happily accept
"-mcpu=archs" so that's a very safe move.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
The Parrot Board is an evaluation board with an Allwinner R16 (assumed
to be close to an Allwinner A33), 4GB of eMMC, 512MB of RAM, USB host
and OTG, a WiFi/Bluetooth combo chip, a micro SD Card reader, 2
controllable buttons, an LVDS port with separated backlight and
capacitive touch panel ports, an audio/microphone jack, a camera CSI
port, 2 sets of 22 GPIOs and an accelerometer.
The DTS file is identical to the one submitted to the upstream kernel.
Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Commit b19236fd1 ("sunxi: Increase SPL header size to 64 bytes to avoid
code corruption") Added defines for MMC0 and SPI as boot identification.
After verifying on an OLinuXino Lime2 with NAND and eMMC, the expected
values have been confirmed and added to spl.h
Signed-off-by: Olliver Schinagl <oliver@schinagl.nl>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The switch to simple_printf was causing the SPL dram info to show as:
DRAM: u MiB
This fixes this by switching from %lu to %d for printing the DRAM size.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Otherwise, ocassionally see errors like this:
Flashing sparse image at offset 2078720
Flashing Sparse Image
sdhci_send_command: Timeout for status update!
mmc fail to send stop cmd
write_sparse_image: Write failed, block #2181088 [0]
This does not affect the actual writing speed, which is controlled by
the default value:
CONFIG_SDHCI_CMD_DEFAULT_TIMEOUT
It only increases the retries when reading:
SDHCI_INT_STATUS
to avoid the timeout error.
Signed-off-by: Steve Rae <steve.rae@raedomain.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
Move the bootdelay >= 0 check to the caller, which simplifies
the callees.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Because abortboot_keyed() and abortboot_normal() are not compiled
at the same time, we can rename both of them to __abortboot().
This allows to drop #ifdef from the caller.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
As the help message of CONFIG_BOOTDELAY says, CONFIG_BOOTDELAY=-2
means the autoboot with no delay, with no abort check even if
CONFIG_ZERO_BOOTDELAY_CHECK is defined.
To sum up, the autoboot behaves as follows:
[1] CONFIG_BOOTDELAY=0 && CONFIG_ZERO_BOOTDELAY_CHECK=y
autoboot with no delay, but you can abort it by key input
[2] CONFIG_BOOTDELAY=0 && CONFIG_ZERO_BOOTDELAY_CHECK=n
autoboot with no delay, with no check for abort
[3] CONFIG_BOOTDELAY=-1
disable autoboot
[4] CONFIG_BOOTDELAY=-2
autoboot with no delay, with no check for abort
As you notice, [2] and [4] come to the same result, which means we
do not need CONFIG_ZERO_BOOTDELAY_CHECK. We can control all the
cases only by CONFIG_BOOTDELAY, like this:
[1] CONFIG_BOOTDELAY=0
autoboot with no delay, but you can abort it by key input
[2] CONFIG_BOOTDELAY=-1
disable autoboot
[3] CONFIG_BOOTDELAY=-2
autoboot with no delay, with no check for abort
This commit converts the logic as follow:
CONFIG_BOOTDELAY=0 && CONFIG_ZERO_BOOTDELAY_CHECK=n
--> CONFIG_BOOTDELAY=-2
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Acked-by: Christian Riesch <christian.riesch@omicronenergy.com>
Acked-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
The same information now exists in common/Kconfig. Do not duplicate
documentation from the point of view of maintainability.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Align the name of the defconfig file for high-security (HS) device variants
from the AM43xx family of SoCs with the corresponding name used for the
general purpose devices. This allows for easier cross-association of those
files and also provides room to grow from an HS device part number
perspective.
Furthermore, update and cleanup associated MAINTAINERS file.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Madan Srinivas <madans@ti.com>
Correcting QSPI disable/unselect CS reset value.
CTRL_CORE_CONTROL_IO_2: QSPI_MEMMAPPED_CS[10:8]
This is not causing any issue, but its better
to untouch the reserved bits.
Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Ravi Babu <ravibabu@ti.com>
I will carry this work-around until it is cared in the kernel.
This looks up the AIDET node and sets up a register to handle
active low interrupt signals.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The AIDET (ARM Interrupt Detector Add-on Circuit) is a kind of
syscon block related with the interrupt controller.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
PH1-LD4 and PH1-sLD8 SoCs have pins that support pin configuration
(pin biasing, drive strength control), but not pin-muxing.
Allow to fill the mux value table with -1 for those pins; pins with
mux value -1 will be skipped in the pin-mux set function. The mux
value type should be changed from "unsigned" to "int" in order to
accommodate -1 as a special case.
[ Linux commit: 363c90e743b50a432a91a211dd8b078d9df446e9 ]
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
PH1-LD11 and PH1-LD20 have much pin controlling in common, so I
added a single driver shared between them in the initial commit.
However, the Ethernet pin-mux settings I am going to add are
different with each other, and they may diverge more as the
progress of development. Split it into two dedicated drivers.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, the UniPhier pinctrl driver itself is a syscon, but it
turned out much more reasonable to make it a child node of a syscon
because our syscon node consists of a bunch of system configuration
registers, not only pinctrl, but also phy, and misc registers.
It is difficult to split the node. This commit allows to migrate to
the new DT structure.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
There is a dummy pch driver in the coreboot directory. This causes
drivers of its children fail to function due to empty ops. Remove
the whole file since it is no longer needed.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently layescape SoCs are not using cpu nodes. So removing
them in favour of compatibly with similar SoCs that
have different cores like LS2080A and LS2088A.
This has been tested on LS2080AQDS, LS1043ARDB, LS1012ARDB.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Freescale ARMv8 SoC name ends with "A" to represent ARM SoCs.
like LS2080A, LS1043A, LS1012A.
So append "A" to SoC names.
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Introudce wp_enable. To check WPSPL, wp_enable needs to be set
to 1 in board code.
Take i.MX6UL for example, for some boards, they do not use WP singal,
so they does not configure USDHC1_WP_SELECT_INPUT, and its default
value is 0(GPIO1_IO02). However GPIO1_IO02 is muxed for i2c usage and
SION bit set. So USDHC controller can always get wp signal and WPSPL
shows write protect and blocks driver continuing. This is not what
we want to see, so add wp_enable, and if set to 0, just omit the
WPSPL checking and this does not effect normal working of usdhc
controller.
If wp-gpios is provided in dts, wp_enable is set to 1, otherwise 0.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The USDHC moves the 4 clock bits CARD_CLK_SOFT_EN, IPG_PERCLK_SOFT_EN,
HCLK_SOFT_EN, and IPG_CLK_SOFT_EN from sysctl register to vendorspec
register. The driver uses RSTA to replace the clock gate off
operation. But this is not a good solution because:
1. when using RSTA, we should wait this bit to clear by itself. This is not
implemeneted in the code.
2. After RSTA is set, it is recommended that the Host Driver reset the
external card and reinitialize it.
So in this patch, we change to use the vendorspec registers for these bits
operation.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
When booting in eMMC fast boot, MMC host does not exit from
boot mode after bootrom loading image. So the first command
'CMD0' sent in uboot will pull down the CMD line to low and
cause errors.
This patch cleans the MMC boot register in "mmc_init" to put the
MMC host back to normal mode.
Also clear DLL_CTRL delay line settings at USDHC initialization
to eliminate the pre-settings from boot rom.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Now I2C is initialized early enough to access FPGA so it supports to
show board info as early as other boot methods.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
- increase the size of the fill buffer
- testing has shown a 10x improvement when the sparse image
has large CHUNK_TYPE_FILL chunks
Signed-off-by: Steve Rae <srae@broadcom.com>
In order to process the CHUNK_TYPE_DONT_CARE properly, there is
a requirement to be able to 'reserve' a specified number of blocks
in the storage media. Because of the special handling of "bad blocks"
in NAND devices, this is implemented in a storage abstraction function.
Signed-off-by: Steve Rae <srae@broadcom.com>
Reviewed-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This "session-id" alogrithm is not required, and currently corrupts
the stored image whenever more the one "session" is required.
Signed-off-by: Steve Rae <srae@broadcom.com>
These condition checking are wrong.
Original Author's intention might be "&" instead of "&&".
It can know whether receive or transmit data request with
BIT[4]/BIT[5] of RINTSTS register.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
add DM and DTS support for the at91 based siemens
boards.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
[rebased on current ToT]
Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
Add this files from Linux v4.6-rc5
66b8a424d: [workqueue: fix ghost PENDING flag while doing MQ IO]
Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Andreas Bießmann <andreas@biessmann.org>
Since the spl_boot_mode() is now passed the boot device to boot from,
make use of it instead of inquiring for the boot device again. This
allows board_boot_order() to function correctly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
The SPL code already knows which boot device it calls the spl_boot_mode()
on, so pass that information into the function. This allows the code of
spl_boot_mode() avoid invoking spl_boot_device() again, but it also lets
board_boot_order() correctly alter the behavior of the boot process.
The later one is important, since in certain cases, it is desired that
spl_boot_device() return value be overriden using board_boot_order().
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
[add newly introduced zynq variant]
Signed-aff-by: Andreas Bießmann <andreas@biessmann.org>
The USBNC_PHYCFG2_ACAENB bit should be cleared to enable the
OTG ID detection, not set it. When the bit is set, the ACA
Resistance Detection is enabled, which disables the OTG ID
detection, because the internal pull up is off.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
There is a 4 bytes hole between phy_cfg2 and phy_status, fix the
usbnc_regs structure to include the hole.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
If the final targets depend on both "dtbs" and "dts/dt.dtb",
and -j option is given to the command line, multiple threads
descend into the dts/ directory, which causes build error.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Tested-by: Andreas Dannenberg <dannenberg@ti.com>
The distro script is supposed to use the internal fdt as fallback if we
find no viable other option. However, we're missing a space key to actually
make that work.
Add the space, so we can successfully load an EFI blob even when there is
no device tree provided on the target device.
Signed-off-by: Alexander Graf <agraf@suse.de>
The handling of the "usage counter" is incorrect, and the clock should
only be disabled when transitioning from 1 to 0.
Reported-by: Chris Brand <chris.brand@broadcom.com>
Signed-off-by: Steve Rae <srae@broadcom.com>
The Kona Peripheral Slave CCU has 4 policy mask registers, not 8.
Signed-off-by: Chris Brand <chris.brand@broadcom.com>
Signed-off-by: Steve Rae <srae@broadcom.com>
clk->id is unsigned, so it can't be < 0. Remove the check for that.
FWIW, this issue was introduced when the clock API converted e.g.
clk_get_rate()'s clock ID parameter from an int to an unsigned long
(with a struct clk), without removing this check.
Fixes: 135aa95002 ("clk: convert API to match reset/mailbox style")
Reported-by: Coverity Scan
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
There is no more define of CONFIG_SYS_HUSH_PARSER. Rename some
remaining references and drop the backward compatible Kconfig entry.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
I still see some defines of this config in board headers. Move them
to defconfigs (+ renaming to CONFIG_HUSH_PARSER) to complete this
migration.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Match the #ifdef ... #endif and the code,
ret = do_something();
if (ret)
return ret;
This will make it easier to add more #ifdef'ed code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
gic_kick_secondary_cpus can directly return to the caller of
smp_kick_all_cpus. We do not have to use x29 register here.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: York Sun <york.sun@nxp.com>
When the input data is not compressed at all,
lzo1x_decompress_safe will fail, so call memcpy()
instead.
Signed-off-by: Joris Lijssens <joris.lijssens@gmail.com>
If CONFIG_ENV_VARS_UBOOT_CONFIG is enabled (it is by distro), this
code causes build error for boards without CONFIG_SYS_{CPU,_BOARD}.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
s/hardkernel/amlogic/ to have a single place for all the amlogic-based
boards.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
Introduce a meson-gxbb-common.h header file and derive the
configuration for Hardkernel Odroid-C2 board from that.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Carlo Caione <carlo@endlessm.com>
Acked-by: Beniamino Galvani <b.galvani@gmail.com>
We already support iminfo for other images. The idea
of this patch is start to have a minimal support for
android image format. We still need to print id[] array
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When building a FIT with external data (-E), U-Boot proper may require
absolute positioning for executing the external firmware. To acheive this
use the (-p) switch, which will replace the amended 'data-offset' with
'data-position' indicating the absolute position of external data.
It is considered an error if the requested absolute position overlaps with the
initial data required for the compact FIT.
Signed-off-by: Teddy Reed <teddy.reed@gmail.com>
Short help (description) in bootefi command has a trailing "\n" that
breaks the "help" command output (empty line after "bootefi").
Nothing important, doesn't affect anything but better be fixed in the
upcoming release.
Still working on i.MX6 and their siblings NAND U-Boot update -- it
works here but not ready for a submission yet. Anyway it is for the
next cycle, not going to go into this release because it is too big
and may affect something else.
Also have some thoughts about fastboot (using multiple devices) but
this will go into separate email with RFC.
Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
The LBMAP switches on the board will tell which boot device is used.
Only QSPI boot is supported if the boot device is IFCCard.
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The register CLKCNCSR controls the frequency of all cores in the same
cluster.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This fixes commit d31e9c575f ,
which broke booting from SD card on all SoCFPGA boards. The
patch assumes the bootloader partition to be partition 3, at
the end of the SD card, which doesn't make any sense. U-Boot
assumes the bootloader partition is partition 1 or that the
bootloader image is at offset +1 MiB from the start of SD card.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Sylvain Lesne <lesne@alse-fr.com>
There are some cases where config options are moved, but they are
ripped off at the final savedefconfig stage:
- The moved option is not user-configurable, for example, due to
a missing prompt in the Kconfig entry
- The config was not defined in the original config header despite
the Kconfig specifies it as non-bool type
- The config define in the header contains reference to another
macro, for example:
#define CONFIG_CONS_INDEX (CONFIG_SYS_LPC32XX_UART - 2)
The current moveconfig does not support recursive macro expansion.
In these cases, the conversion is very likely to be an unexpected
result. That is why I decided to display the log in yellow color
in commit 5da4f857be ("tools: moveconfig: report when CONFIGs are
removed by savedefconfig").
It would be nice to display the list of suspicious boards when the
tool finishes processing. It is highly recommended to check the
defconfigs once again when this message is displayed.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Since commit 1d085568b3 ("tools: moveconfig: display log atomically
in more readable format"), the function color_text() is clever enough
to exclude LF from escape sequences. Exploit it for removing the
"for" loops from Slots.show_failed_boards().
Also, display "(the list has been saved in moveconfig.failed)" if
there are failed boards.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
The subprocess.Popen() does not change the child process's working
directory if cwd=None is given. Let's exploit this fact to refactor
the source directory handling.
We no longer have to pass "-C <reference_src_dir>" to the sub-process
because self.current_src_dir tracks the source tree against which we
want to run defconfig/autoconf.
The flag self.use_git_ref is not necessary either because we can know
the current state by checking whether the self.current_src_dir is a
valid string or None.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The class WorkDir can be used in a very generic way, but currently
it is only used for containing a reference source directory.
This commit changes it for a more dedicated use. The move_config
function can be more readable by enclosing the git-clone and git-
checkout in the class constructor.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
When moving an integer type option with default value 1, the tool
moves configs with the same value as the default (, and then removed
by the later savedefconfig). This is a needless operation.
The KconfigParser.parse_one_config() should compare the config after
the "=y -> =1" fixup.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Commit a058052c "net: phy: do not read configuration register on reset",
changes the behaviour of the phy_reset function such that the state of
the BMCR register is not preserved during reset.
Change the config function for the m88e1310 so that it does not do a
reset after configuring auto-negotiation.
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Stefan Roese <sr@denx.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This patch adds a phy driver for the Micrel KSZ886x switches.
Similarly to the KSZ8895, SoC MAC is directly connected to the switch
MAC on the switch CPU port, so the link to the switch is always up.
KSZ886x switches can be used in the following configuration modes:
- Unmanaged mode with config stored in external EEPROM
- Managed mode over SPI
- Managed mode over I2C
- Managed mode over mdio/mdc (aka MIIM or SMI)
This patch supports only unmanaged and MIIM modes.
Based on Micrel KSZ886x driver from Linux kernel and
Micrel KSZ8895 driver from U-Boot.
Verified with the KSZ8863MLL.
Signed-off-by: Alexey Firago <alexey_firago@mentor.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The rtl8169 driver uses a global variable to store the register address
of the adapter being operated upon. This is updated to point at the
correct adapter when sending or receiving a packet, or shutting down the
adapter, but not when initializing the adapter. Consequently, switching
between different adapters within the same U-Boot runtime does not work
correctly since the driver programs the wrong registers during
rtl8169_eth_start() -> rtl8169_common_start() -> rtl8169_hw_start().
Note that since rtl8169_eth_stop() does set the global variable, the
second consecutive attempt to use the "new" adapter did work even before
this patch, because each time network usage is shut down, the network
core calls stop, which sets the variable so that the next start does
actually initialize the hardware, and the adapter works.
Equally, rtl8169_eth_probe() calls rtl_init() which sets the global, so
if using only a single device, or if picking the "right" device (based on
probe order) when multiple devices are present, ioaddr will already be set
correctly from the get-go, so the issue does not occur.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
DISTRO_DEFAULTS is intended to mirror / replace
include/config_distro_defaults.h.
The intend is for boards which include this file to select this from
their Kconfig files and when moving setting to Kconfig which are #define-ed
in config_distro_defaults.h to select this from DISTRO_DEFAULTS so that
boards which have selected DISTRO_DEFAULTS will keep the same configuration
as before without needing any defconfig file changes.
The initial list of selected things matches all settings recently removed
from config_distro_defaults.h because they have been converted to Kconfig,
with the exception of CMD_ELF and CMD_NET, which have a default of y, if
the default of these ever changes they should be selected by DISTRO_DEFAULTS
too.
For testing and example purposes this commit also converts ARCH_SUNXI
to use DISTRO_DEFAULT instead of selecting everything it needs itself.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
To make the PSCI backend more maintainable and easier to port to newer
SoCs, rewrite the current PSCI implementation in C.
Some inline assembly bits are required to access coprocessor registers.
PSCI stack setup is the only part left completely in assembly. In theory
this part could be split out of psci_arch_init into a separate common
function, and psci_arch_init could be completely in C.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Instead of hardcoding the GIC addresses in the PSCI implementation,
provide a base address in the cpu header.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
CPUCFG has an unlisted debug control register, which is used to disable
external debug access.
Also, sun7i secondary core power controls are in CPUCFG, as there's no
separate PRCM block.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Instead of listing individual registers for controls to each processor
core, list them as an array of registers. This makes accessing controls
by core index easier.
Also rename "cpucfg_sun6i.h" (which was unused anyway) to the more generic
"cpucfg.h", and add packed attribute to struct sunxi_cpucfg.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
cpucfg_sun6i.h includes a register definition for the CPUCFG register
block. The types used are u32 and u8, which are defined in linux/types.h.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
struct sunxi_prcm_reg is a representation of the PRCM registers. Add
the packed attribute to prevent the compiler from doing funny things.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Use SUNXI_CPUCFG_BASE across all families. This makes writing common
PSCI code easier.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The PSCI implementation expects at most 2 pages worth of space reserved
at the end of the secure section for its stacks. If PSCI is relocated to
secure SRAM, then everything is fine. If no secure SRAM is available,
and PSCI remains in main memory, the reserved memory space doesn't cover
the space used by the stack.
If one accesses PSCI after Linux has fully booted, the memory that should
have been reserved for the PSCI stacks may have been used by the kernel
or userspace, and would be corrupted. Observed after effects include the
system hanging or telinit core dumping when trying to reboot. It seems
the init process gets hit the most on my test bed.
This fix allocates the space used by the PSCI stacks in the secure
section by skipping pages in the linker script, but only when there is
no secure SRAM, to avoid bloating the binary.
This fix is only a stop gap. It would be better to rework the stack
allocation mechanism, maybe with proper usage of CONFIG_ macros and an
explicit symbol.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Some common PSCI functions are written in assembly, but it should be
possible to use them from C code.
Add function declarations for C code to consume.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
For psci_get_cpu_stack_top() to be usable in C code, it must adhere to
the ARM calling conventions. Since it could be called when the stack
is still unavailable, and the entry code to linux also expects r1 and
r2 to remain unchanged, stick to r0 and r3.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
This reverts commit 1a5f0de08e86("sunxi: make SoC variant choice
mandatory").
With the optional marking in the Kconfig "make savedefconfig"
will drop CONFIG_MACH_SUN4I=y from all the A10 boards, making it
hard to see at a glance which family of sunxi chips the defconfig
is for.
This commit therefore restores the optional, and restores
CONFIG_MACH_SUN4I=y to all defconfig's which had it dropped
because of this.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The inet86dz board is a board used in 7" tablets from various oems.
These tablets are a23 based 7" tablets featuring a 1024x600 LCD,
512MB RAM, 4G NAND, rtl8188etv usb wifi, gsl1680 touchschreen,
micro-sd slot, 3.5mm headphone jack and a micro-usb otg connector
which doubles as charging port.
The dts file this commit adds is identical to the one submitted to
the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
The Polaroid MID2407PXE03 is an a23 based 7" tablet based on a M86_MB V2.0
PCB, featuring a 800x480 LCD, 512MB RAM, 4G NAND, esp8089 wifi, gsl1680
touchschreen, micro-sd slot, 3.5mm headphone jack and a micro-usb otg
connector which doubles as charging port.
The dts file is identical to the one submitted to the upstream kernel.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
vprintf is used by panic() which is used in various SPL paths on some
boards.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since commit bb597c0eeb ("common: bootdelay: move CONFIG_BOOTDELAY
into a Kconfig option"), CONFIG_BOOTDELAY is defined for all boards.
Prior to that commit, it was allowed to unset CONFIG_BOOTDELAY to
not compile common/autoboot.c, as described in common/Makefile:
# This option is not just y/n - it can have a numeric value
ifdef CONFIG_BOOTDELAY
obj-y += autoboot.o
endif
It was a bit odd to enable/disable code with an integer type option,
but it was how this option worked before that commit, and several
boards actually unset it to opt out of the autoboot feature.
This commit adds a new bool option, CONFIG_AUTOBOOT, and makes
CONFIG_BOOTDELAY depend on it.
I chose "default y" for this option because most boards use the
autoboot. I added "# CONFIG_AUTOBOOT is not set" for the boards that
had not set CONFIG_BOOTDELAY prior to the bad commit.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Due to changes in distro environment, ENV_SIZE limit was reached on Dragonboard.
This patch increases environment size to 8KiB.
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Some drivers are still directly accessing the chip->mtd field. Patch
them to use nand_to_mtd() instead.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
nand torture currently works on exactly one nand block which is specified
by giving the byteoffset to the beginning of the block.
Extend this by allowing for a second parameter specifying the byte size
to be tested.
e.g.
==> nand torture 1000000
NAND torture: device 0 offset 0x1000000 size 0x20000 (block size 0x20000)
Passed: 1, failed: 0
==> nand torture 1000000 40000
NAND torture: device 0 offset 0x1000000 size 0x40000 (block size 0x20000)
Passed: 2, failed: 0
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
[scottwood: fix usage to show size as optional, and add misssing braces]
Signed-off-by: Scott Wood <oss@buserror.net>
Somehow this got overlooked when getting rid of nand_info.
Small patch, won't affect anything else, no reason to wait for the
next cycle.
Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
NAND chips are supposed to expose their capabilities through advanced
mechanisms like READID, ONFI or JEDEC parameter tables. While those
methods are appropriate for the bootloader itself, it's way to
complicated and takes too much space to fit in the SPL.
Replace those mechanisms by a dumb 'trial and error' mechanism.
With this new approach we can get rid of the fixed config list that was
used in the sunxi NAND SPL driver.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Split the 'load page' and 'read page' logic in 2 different functions so
we can later load the page and test different ECC configs without the
penalty of reloading the same page in the NAND cache.
We also move common setup to a dedicated function (nand_apply_config()) to
avoid rewriting the same values in NFC registers each time we read a page.
These new functions are passed a pointer to an nfc_config struct to limit
the number of parameters.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
check_value_xxx() helpers are using a 1ms delay between each test, which
can be quite long for some operations (like a page read on an SLC NAND).
Since we don't have anything to do but to poll this register, reduce the
delay between each test to 1us.
While we're at it, rename the max_number_of_retries parameters and the
MAX_RETRIES macro into timeout_us and DEFAULT_TIMEOUT_US to reflect that
we're actually waiting a given amount of time and not only a number of
retries.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Use CONFIG_SYS_NAND_U_BOOT_OFFS_REDUND value instead of trying to guess
where the redundant u-boot image is based on simple (and most of the time
erroneous) heuristics.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
# Conflicts:
# drivers/mtd/nand/sunxi_nand_spl.c
On modern NAND it's more than recommended to have a backup copy of the
u-boot binary to recover from corruption: bitflips are quite common on
MLC NANDs, and the read-disturbance will corrupt your u-boot partitition
more quickly than what you would see on an SLC NAND.
Add an extra Kconfig option to specify the offset of the redundant u-boot
image.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
[scottwood: added ifdef to fix build break]
Signed-off-by: Scott Wood <oss@buserror.net>
The SYS_NAND_U_BOOT_OFFS is quite generic, but the Kconfig entry is forced
to explicitly depend on platforms that are not already defining it in their
include/configs/<board>.h header.
Add the SYS_NAND_U_BOOT_LOCATIONS option, make the SYS_NAND_U_BOOT_OFFS
depends on it, remove the dependency on NAND_SUNXI and make it dependent
on SPL selection.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
The sunxi SPL NAND controller driver supports use 'BootROM'-like configs,
that is, configs where the ECC bytes and real data are interleaved in the
page instead of putting ECC bytes in the OOB area.
Doing that has several drawbacks:
- since you're interleaving data and ECC bytes you can't use the whole page
otherwise you might override the bad block marker with non-FF bytes.
- to solve the bad block marker problem, the ROM code supports partially
using the page, but this introduces a huge penalty both in term of read
speed and NAND memory usage. While this is fine for rather small
binaries(like the SPL one which is at maximum 24KB large), it becomes
non-negligible for the bootloader image (several hundred of KB).
- auto-detection of the page size is not reliable (this is in my opinion
the biggest problem). If you get the page size wrong, you'll end up
reading data at a different offset than what was specified by the caller
and the reading may succeed (if valid data were written at this address).
For all those reasons I think it's wiser to completely remove support for
'syndrome' configs. If we ever need to support it again, then I'd recommend
specifying all the config parameters through Kconfig options.
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
The following changes are made to the clock API:
* The concept of "clocks" and "peripheral clocks" are unified; each clock
provider now implements a single set of clocks. This provides a simpler
conceptual interface to clients, and better aligns with device tree
clock bindings.
* Clocks are now identified with a single "struct clk", rather than
requiring clients to store the clock provider device and clock identity
values separately. For simple clock consumers, this isolates clients
from internal details of the clock API.
* clk.h is split so it only contains the client/consumer API, whereas
clk-uclass.h contains the provider API. This aligns with the recently
added reset and mailbox APIs.
* clk_ops .of_xlate(), .request(), and .free() are added so providers
can customize these operations if needed. This also aligns with the
recently added reset and mailbox APIs.
* clk_disable() is added.
* All users of the current clock APIs are updated.
* Sandbox clock tests are updated to exercise clock lookup via DT, and
clock enable/disable.
* rkclk_get_clk() is removed and replaced with standard APIs.
Buildman shows no clock-related errors for any board for which buildman
can download a toolchain.
test/py passes for sandbox (which invokes the dm clk test amongst
others).
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
This adds a sandbox reset implementation (provider), a test client
device, instantiates them both from Sandbox's DT, and adds a DM test
that excercises everything.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
A reset controller is a hardware module that controls reset signals that
affect other hardware modules or chips.
This patch defines a standard API that connects reset clients (i.e. the
drivers for devices affected by reset signals) to drivers for reset
controllers/providers. Initially, DT is the only supported method for
connecting the two.
The DT binding specification (reset.txt) was taken from Linux kernel
v4.5's Documentation/devicetree/bindings/reset/reset.txt.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tegra186's HSP module implements doorbells, mailboxes, semaphores, and
shared interrupts. This patch provides a driver for HSP, and hooks it
into the mailbox API. Currently, only doorbells are supported.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Simon Glass <sjg@chromium.org>
Rename mailbox*.h to match the naming convention requested during review
of the new reset subsystem.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
The documentation of parameters in arch/sandbox/include/asm/gpio.h is
either missing or faulty.
This patch corrects the documentation.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Simon Glass <sjg@chromium.org>
A number of style fixes across the files in this directory, including:
* Correct invalid kernel-doc content.
* Tidy up massive comment in fdt_region.c.
* Use correct spelling of "U-Boot".
* Replace tests of "! <var>" with "!<var>".
* Replace "libfdt_env.h" with <libfdt_env.h>.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Acked-by: Simon Glass <sjg@chromium.org>
A bug in the pca953x driver prevents correct reading of GPIO input
values beyond the 8th GPIO; all values are reported as zero. Setting of
GPIO output values is not affected.
This patch fixes the reading behavior.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Peng Fan <van.freenix@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Some architectures as m68k still need to use CONFIG_NEEDS_MANUAL_RELOC,
and are not still using the device tree.
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Acked-by: Simon Glass <sjg@chromium.org>
I do not insist on CONFIG_BOOTDELAY=3. The default value in Kconfig,
CONFIG_BOOTDELAY=2, is just fine for these boards.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The DRAM PHY layer on PH1-LD20 is able to calibrate PHY parameters
periodically. This compensates for the voltage and temperature
deviation and improves the PHY parameter adjustment. Instead, it
requires 64 byte scratch memory in each DRAM channel for the dynamic
training. The memory regions must be reserved in DT before jumping
to the kernel.
The scratch area can be anywhere in each DRAM channel, but the DRAM
init code in SPL currently assigns it at the end of each channel.
So, it makes sense to reserve the regions on run-time by U-Boot
instead of statically embedding it in the DT in Linux. Anyway,
a boot-loader should know much more about memory initialization
than the kernel.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This will make it easier to select config options specific to
particular ARM processor generation.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
At first, 256 byte of the head of DRAM space was reserved for some
reasons. However, as the progress of development, it turned out
unnecessary, and it was never used in the end. Move the CPU release
address to leave no space.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Correct the error message in spl_load_image_ext() when image parsing
fails. Instead of "ext4fs_read failed" print "failed to parse image
header".
Signed-off-by: Petr Kulhavy <brain@jikos.cz>
CC: Guillaume GARDET <guillaume.gardet@free.fr>
CC: Tom Rini <trini@konsulko.com>
Fix the following build errors when building sandbox on x86 32-bit:
In file included from fs/cbfs/cbfs.c:8:0:
include/malloc.h:364:7: error: conflicting types for 'memset'
void* memset(void*, int, size_t);
^
In file included from include/compiler.h:123:0,
from include/cbfs.h:10,
from fs/cbfs/cbfs.c:7:
include/linux/string.h:78:15: note: previous declaration of 'memset' was here
extern void * memset(void *,int,__kernel_size_t);
^
In file included from fs/cbfs/cbfs.c:8:0:
include/malloc.h:365:7: error: conflicting types for 'memcpy'
void* memcpy(void*, const void*, size_t);
^
In file included from include/compiler.h:123:0,
from include/cbfs.h:10,
from fs/cbfs/cbfs.c:7:
include/linux/string.h:81:15: note: previous declaration of 'memcpy' was here
extern void * memcpy(void *,const void *,__kernel_size_t);
^
scripts/Makefile.build:280: recipe for target 'fs/cbfs/cbfs.o' failed
Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
CONFIG_VERSION_VARIABLE isn't always defined, so we can't simply look up
its value directly, or an exception will occur if it isn't defined.
Instead, we must use .get() to supply a default value if the variable
isn't defined.
Fixes: da37f006e7 ("tests: py: disable main_signon check for printenv cmd")
Acked-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Currently DFU is not working.
Adjust CONFIG_SYS_MALLOC_LEN and dfu_alt_info so that we are
able to flash u-boot.imx into the eMMC via dfu using the
following method:
=> dfu 0 mmc 0
In the host PC:
dfu-util -D u-boot.imx -a boot
This is the same approach done in the mx6sl warp board.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Add a README file for helping users to install U-Boot into the eMMC.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
The latest version of warp7 board provides the connection of the
WDOG1_B pin to the PMIC.
Program the watchdog to enable the WDOG1_B output which causes
a POR reset.
Based on the imx7dsabresd code.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Acked-by: Fabio Estevam <fabio.estevam@nxp.com>
The current pad DSE for QSPI is 60ohm. This setting cause
too strong drive to clock and data signals. Need to change
the DSE to 120ohm for better signal quality.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Q901 is PMOS, LCD_nPWREN should be at low voltage then output is 3V3.
If LCD_nPWREN is high, output is 2.4V which is not correct.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Fix 74LV OE gpio index. gpio index is wrong,
so gpio output will not have effect, since we
use wrong GPIO5_IO18, but not correct GPIO5_IO8.
And at the end of the initialization of 74lv init, should
keep OE voltage level at LOW to make 74lv output the correct
voltage.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
LCD_PWR_EN controls the G pin of Q13 PMOS which needs low voltage to connect
D to S for outputting LCD 3.3V. If LCD_PWR_EN is high, we measured the LCD 3v3
is actually 1.2V.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Currently the LVDS backlight does not work in U-Boot after a “reboot” comand
in the kernel.
This problem occurs because the kernel uses this pin in PWM mode and U-Boot
does not configure the backlight pin as GPIO functionality.
So fix the problem by explicitly configuring the backlight pin as GPIO in
U-Boot.
Signed-off-by: Marco Franchi <marco.franchi@nxp.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Tested-by: Fabio Estevam <fabio.estevam@nxp.com>
If the usb controller is not running, no need to shutdown it,
otherwise `usb stop` complains about:
"EHCI failed to shut down host controller".
To i.MX7D SDB, there are two usb ports, one Host, one OTG.
If we only plug one udisk to the Host port and then `usb start`,
the OTG controller for OTG port does not run actually. Then,
if `usb stop`, the OTG controller for OTG port will also be
shutdown, but it is not running.
This patch adds a check to only shutdown the running controller.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: "Stefan Brüns" <stefan.bruens@rwth-aachen.de>
Cc: Stephen Warren <swarren@nvidia.com>
The setjmp/longjmp implementation did not work on thumb1 implementations
because it used instruction encodings that don't exist on thumb1 yet.
This patch limits itself to thumb1 instruction set for 32bit arm and
removes a superfluous printf along the way.
Signed-off-by: Alexander Graf <agraf@suse.de>
Enable FIT support for AM57xx platforms using the high-security (HS)
device variant.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Remove redundant #if defined(CONFIG_SPL_OS_BOOT) statement around
getenv() calls in spl_load_image_ext_os().
The whole function is surrounded by #ifdef CONFIG_SPL_OS_BOOT.
No functional change.
Signed-off-by: Petr Kulhavy <brain@jikos.cz>
CC: Guillaume GARDET <guillaume.gardet@free.fr>
Acked-by: Guillaume GARDET <guillaume.gardet@free.fr>
The comments in the source file are riddled with spelling mistakes. Be
a good citizen and take a stab at cleaning up some of the more obvious
ones.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds FIT support to the SPL and u-boot for AM437x HS devices.
Signed-off-by: Madan Srinivas <madans@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Adds missing NAND option to CONFIG_SYS_EXTRA_OPTIONS for
AM437x HS EVMs. This syncs up the config options between
GP and HS EVMs.
Signed-off-by: Madan Srinivas <madans@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
With updated moveconfig.py and an better default, re-generate
the migration of BOOTDELAY to the defconfig.
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This patch is doing the following:
1. Implementing the errata for LS2080.
2. Adding fixup for fdt for LS2080.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
This errata a008751 is applied on Soc specific file currently.This will be
moved to a file where all the errata implementation will take place for usb
for fsl. This patch removes the errata workaround from soc specific file
for LS2080.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
This patch does the following things:
1. Makes the errata checking code common for PPC and ARM
2. Moves all these static inline functions into a dedicated C file
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Performs code cleanup for device tree fixup for fsl usb controllers by
making functions to handle these similar errata checking code.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Adds get_svr and IS_SVR_REV helpers for ARMv8 platforms,
similar to PPC and ARMv7.
Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Define CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8 to allow the
physical interface to be 8-bit (rather than 16-bit).
Signed-off-by: Steve Rae <srae@broadcom.com>
FIT allows for a multiple dtb in a single image. SPL needs away to
detect the right dtb to be used. Adding support for the same for am57xx
platforms.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
board/am57xx supports all boards based on am57xx. Rename the taget
as TARGET_AM57XX_EVM.
Fixes: 74cc8b097d ("board: ti: beagle_x15: Rename to indicate support for TI am57xx evms")
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add initial support for NXP's S32V234 SoC and S32V234EVB board.
The S32V230 family is designed to support computation-intensive applications
for image processing. The S32V234, as part of the S32V230 family, is a
high-performance automotive processor designed to support safe
computation-intensive applications in the area of vision and sensor fusion.
Code originally writen by:
Original-signed-off-by: Stoica Cosmin-Stefan <cosminstefan.stoica@freescale.com>
Original-signed-off-by: Mihaela Martinas <Mihaela.Martinas@freescale.com>
Original-signed-off-by: Eddy Petrișor <eddy.petrisor@gmail.com>
Signed-off-by: Eddy Petrișor <eddy.petrisor@nxp.com>
Memory barriers are proven to be a requirement for both compiler and
real hardware to properly serialize access to critical data.
For example if CPU or data bus it uses may do reordering of data
accesses absence of memory barriers might easily lead to very subtle and
hard to debug data corruptions.
This implementation was heavily borrowed from up to date Linux kernel.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Now when we have support of IOC (IO-Coherency block) cahce operations
on regions are tuned to not be dummy stubs if IOC was found and enabled
in the core. That makes flush_dcache_range() useless for our purposes
here. And since we do need to flush modified reset vector to at least L2
cache (AKA SLC) so other cores will see it via its L1 instruction cache
we're using always functional flush_dcache_all() here.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
According to ARC HS databook it is required to flush and disable
caches prior programming IOC registers. Otherwise ongoing coherent
memory operations may not observe the coherency protocols as
expected.
But since in ARC HS v2.1 there's no way to disable SLC (AKA L2 cache)
we're doing our best flushing and invalidating it.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
invalidate_dcache_all() could be used in different use-cases
and what is especially important most of those cases won't be
related to DMAed data to or from peripherals, i.e. we'll be doing
invalidation of data used purely by CPU cores.
Given that IOC engine only snoops data that goes through DMA
we need to care ourselves about data used only by CPU cores
and so remove dependency on IOC from invalidate_dcache_all()
and always do real invalidation.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
In case we have restarted u-boot there is a chance that environment
buffer contains old environment (from the previous boot). If UBI volume
is zero size, ubi_volume_read() doesn't modify the buffer and exits
successfully.
We need to clear buffer manually before reading it from UBI, so the
invalid CRC will cause setting default environment in case that the UBI
volume is zero size.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Tidy up garbage left by commit bb597c0eeb ("common: bootdelay: move
CONFIG_BOOTDELAY into a Kconfig option").
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
At this point, this is not referenced from anywhere, so remove it
(but it will be re-added later for a different meaning).
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The sed script, tools/scripts/define2mk.sed, converts config defines
from C headers into include/autoconf.mk for the use in Makefiles.
I found the tool adds quotes around negative integer values.
For example, at the point of the v2016.07-rc1 tag,
include/configs/microblaze-generic.h defines
#define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
Because it is an integer option, it should be converted to:
CONFIG_BOOTDELAY=-1
But, the script actually converts it to:
CONFIG_BOOTDELAY="-1"
This is a fatal problem for the tools/moveconfig.py because it parses
include/autoconf.mk for the config defines from the board headers.
CONFIG_BOOTDELAY="-1" is considered as a string type option and it
is dropped due to the type mismatch from the entry in Kconfig.
This commit fixes the script so that the tools/moveconfig.py can
correctly convert integer options with a negative value.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This option allows the 'make autoconf.mk' step to run against a former
repo state, while the savedefconfig step runs against the current repo
state. This is convenient for the case where something in the Kconfig
has changed such that the defconfig is no longer complete with the new
Kconfigs. This feature allows the .config to be built assuming those old
Kconfigs, but then savedefconfig based on the new state of the Kconfigs.
If in doubt, always specify this switch. It will always do the right
thing even if not required, but if it was required and you don't use it,
the moved configs will be incorrect. When not using this switch, you
must very carefully evaluate that all moved configs are correct.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The Slot.poll() method is already complicated and a new feature
we are going to add will make it more difficult to understand
the execution flow.
Refactor it with helper methods, .handle_error(), .do_defconfig(),
.do_autoconf(), .do_savedefconfig, and .update_defconfig().
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
I found "tools/moveconfig -s" might be useful for defconfig re-sync.
I could optimize it for re-sync if I wanted, but I do not want to
make the code complex for this feature.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Now, this tools invokes "make savedefconfig" only when it needs to
do so, but there might be cases where a user wants the tool to do
savedefconfig forcibly, for example, some defconfigs were already
out of sync and the user wants to fix it as well.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
There are various factors that determine if the given defconfig is
updated, and it is probably what users are more interested in.
Show the log when the defconfig is updated. Also, copy the file
only when the file content was really updated to avoid changing
the time stamp needlessly.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
This is a rare case, but there is still possibility that some CONFIG
is moved to the .config, but it is removed by "make savedefconfig".
(For example, it happens when the specified CONFIG has no prompt in
the Kconfig entry, i.e. it is not user-configurable.)
It might be an unexpected case. So, display the log in this case
(in yellow color to gain user's attention if --color option is given).
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
If no CONFIG option is moved to the .config, no need to sync the
defconfig file. This accelerates the processing by skipping
needless "make savedefconfig".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Before this commit, the log was displayed in the format:
<defconfig_name> : <action1>
<defconfig_name> : <action2>
<defconfig_name> : <action3>
When we move multiple CONFIGs at the same time, we see as many
<defconfig_name> strings as actions for every defconfig, which is
redundant information.
Moreover, since normal log and error log are displayed separately,
Messages from different threads could be mixed, like this:
<foo> : <action1>
<foo> : <action2>
<bar> : <action1>
<bar> : <action2>
<foo> : <error_log>
This commit makes sure to call "print" once a defconfig, which
enables atomic logging for each defconfig. It also makes it
possible to refactor the log format as follows:
<foo_defconfig>
<action1>
<action2>
<error_log>
<bar_defconfig>
<action1>
<action2>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
The paths to .config, include/autoconf.mk, include/config/auto.conf
are not changed during the defconfig walk. Compute them only once
when a new class instance is created.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
We still pass the input file with CONFIG name, type, default value
in each line, but the last two fields are just ignored by the tool.
So, let's deprecate the input file and allow users to give CONFIG
names directly from the command line. The types and default values
are automatically detected and handled nicely by the tool.
Going forward, we can use this tool more easily like:
tools/moveconfig.py CONFIG_FOO CONFIG_BAR
Update the documentation and fix some typos I noticed while I was
working on.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Now types and defalut values given by the input file are just
ignored. Delete unnecessary code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Commit 96464badc7 ("moveconfig: Always run savedefconfig on the
moved config") changed the work flow of this tool a lot from the
original intention when this tool was designed first.
Since then, before running this tool, users must edit the Kconfig to
add the menu entries for the configs they are moving. It means users
had already specified the type and the default value for each CONFIG
via its Kconfig entry. Nevertheless, users are still required to
dictate the same type and the default value in the input file. This
is tedious to use. So, my idea here is to deprecate the latter.
Before moving forward with it, there is one issue worth mentioning;
since the savedefconfig re-sync was introduced, this tool has not
been able to move bool options with "default y". Joe sent a patch
to solve this problem about a year ago, but it was not applied for
some reasons. Now, he came back with an updated patch, so this
problem will be fixed soon.
For other use cases, I see no reason to require redundant dictation
in the input file. Instead, the tool can know the types and default
values by parsing the .config file.
This commit changes the tool to use the CONFIG names, but ignore the
types and default values given by the input file.
This commit also fixes one bug. Prior to this commit, it could not
move an integer-typed CONFIG with value 1.
For example, assume we are moving CONFIG_CONS_INDEX. Please note
this is an integer type option.
Many board headers define this CONFIG as 1.
#define CONFIG_CONS_INDEX 1
It will be converted to
CONFIG_CONS_INDEX=y
and moved to include/autoconf.mk, by the tools/scripts/define2mk.sed.
It will cause "make savedefconfig" to fail due to the type conflict.
This commit takes care of it by detecting the type and converting the
CONFIG value correctly.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Currently, the progress " * defconfigs out of 1133" does not increase
monotonically.
Moreover, the number of processed defconfigs does not match the total
number of defconfigs when this tool finishes, like:
1132 defconfigs out of 1133
Clean up headers? [y/n]:
It looks like the task was not completed, and some users might feel
upset about it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
When the source tree is not clean, this tool raises an exception
with a message like follows:
Traceback (most recent call last):
File "tools/moveconfig.py", line 939, in <module>
main()
File "tools/moveconfig.py", line 934, in main
move_config(config_attrs, options)
File "tools/moveconfig.py", line 808, in move_config
while not slots.available():
File "tools/moveconfig.py", line 733, in available
if slot.poll():
File "tools/moveconfig.py", line 645, in poll
self.parser.update_dotconfig(self.defconfig)
File "tools/moveconfig.py", line 503, in update_dotconfig
with open(autoconf_path) as f:
IOError: [Errno 2] No such file or directory: '/tmp/tmpDtzCgl/include/autoconf.mk'
This does not explain what is wrong. Show an appropriate error
message "source tree is not clean, please run 'make mrproper'"
in such a situation.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Since commit 25400090b1 ("moveconfig: Print a message for
missing compiler"), this tool parses an error message every time an
error occurs during the process in order to detect missing compiler.
Instead of that, we can look for compilers in the PATH environment
only once before starting the defconfig walk. If a desired compiler
is missing, "make include/config/auto.conf" will apparently fail for
that architecture. So, the tool can just skip those board, showing
"Compiler is missing. Do nothing.".
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
We must ensure this tool is run from the top of source directory
before calling update_cross_compile(). Otherwise, the following
exception is thrown:
Traceback (most recent call last):
File "./moveconfig.py", line 918, in <module>
main()
File "./moveconfig.py", line 908, in main
update_cross_compile()
File "./moveconfig.py", line 292, in update_cross_compile
for arch in os.listdir('arch'):
OSError: [Errno 2] No such file or directory: 'arch'
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Nesting by "else:" is not generally useful after such statements
as return, break, sys.exit(), etc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Commit 96464badc7 ("moveconfig: Always run savedefconfig on the
moved config") changed how defconfig files were updated.
Since then, the function update_defconfig() does not modify defconfig
files at all (instead, they are updated by "make savedefconfig"), so
update_dotconfig() is a better fit for this function. Also, update
the comment block to match the actual behavior.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Since commit 96464badc7 ("moveconfig: Always run savedefconfig on
the moved config"), --dry-run option is broken.
The --dry-run option prevents the .config from being modified,
but defconfig files might be updated by "make savedefconfig"
regardless of the --dry-run option.
Move the "if not self.options.dry_run" conditional to the correct
place.
Fixes 96464badc7 ("moveconfig: Always run savedefconfig on the moved config")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
This board is based on Snapper 9G45 which has an Atmel AT91SAM9G45 chip and
128MB of SDRAM. It includes a small LCD, 2xUSB host, SD card, Ethernet and
two UARTs.
Signed-off-by: Andre Renaud <andre@designa-electronics.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
[apply CONFIG_BOOTDELAY transition]
Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
This should return a non-zero value if there is a missing property. Update
the return value accordingly. The only expected error is -FDT_ERR_NOTFOUND.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Add driver-model support to this driver. Most features can be controlled
from the device tree.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Adjust the driver to use struct display_timing for its display timing.
This is what is used by driver-model and allows the LCD init code to be
common.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
In order to prevent build errors for copied code from linux introduce
dev_warn().
Suggested-by: Scott Wood <oss@buserror.net>
Signed-off-by: Andreas Bießmann <andreas@biessmann.org>
Acked-by: Simon Glass <sjg@chromium.org>
Add these definitions so that GPIOs can be used with driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-on: smartweb, corvus, taurus, axm
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Add driver-model support to this driver. The old code remains for now so
that we can convert boards one at a time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-on: smartweb, corvus, taurus, axm
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
The end address of the cache flush must be cache-line-aligned since
otherwise (at least on ARM926-EJS) the request is ignored. When the cache
is enabled this means that packets are not sent.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Adjust this driver to avoid using struct netdev in functions that driver
model will call. Also refactor the receive function to be compatible with
driver model.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-on: smartweb, corvus, taurus, axm
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
Flushing part of the cache should be done on cache boundaries. Trying to
flush part of a cache line is not supported and the request may be ignored
or print warnings.
Adjust the bootm code to align the end address to prevent this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-on: smartweb, corvus, taurus, axm
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
At present CONFIG_SKIP_LOWLEVEL_INIT prevents U-Boot from calling
lowlevel_init(). This means that the instruction cache is not enabled and
the board runs very slowly.
What is really needed in many cases is to skip the call to lowlevel_init()
but still perform CP15 init. Add an option to handle this.
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-on: smartweb, corvus, taurus, axm
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
On systems with PIO3 (SAMA5D3/D4/..), the pullup and pulldown configuration
is mutualy exclusive. This patch assures that the opposite pull resistor gets
disabled before the requested pull resistor is enabled. This changes behavior
of at91_set_pio_pulldown() such that the pullup is only disabled if pulldown
is to be enabled. This changes behavior of at91_set_pio_pullup() such that
the pulldown is only disabled if pullup is to be enabled.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andreas Bießmann <andreas.devel@googlemail.com>
Cc: Josh Wu <josh.wu@atmel.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Andreas Bießmann <andreas@biessmann.org>
This allows a board to configure verified boot within the SPL using
a FIT or FIT with external data. It also allows the SPL to perform
signature verification without needing relocation.
The board configuration will need to add the following feature defines:
CONFIG_SPL_CRYPTO_SUPPORT
CONFIG_SPL_HASH_SUPPORT
CONFIG_SPL_SHA256
In this example, SHA256 is the only selected hashing algorithm.
And the following booleans:
CONFIG_SPL=y
CONFIG_SPL_DM=y
CONFIG_SPL_LOAD_FIT=y
CONFIG_SPL_FIT=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_SPL_OF_LIBFDT=y
CONFIG_SPL_FIT_SIGNATURE=y
Signed-off-by: Teddy Reed <teddy.reed@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Andreas Dannenberg <dannenberg@ti.com>
Acked-by: Sumit Garg <sumit.garg@nxp.com>
The kernel can now use DT to reserve memory carveouts and
these areas are now the default for drivers that need reserved
memory, so reserving more here is unneeded and any memory reserved
this way will be wasted.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Currently omap_vcores which holds pmic data is being assigned based
on the SoC type. PMIC is not a part of SoC. It is logical to
to assign omap_vcores based on board type. Hence over ride the
vcores_init function and assign omap_vcores based on the board type.
Reported-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Now that we have set up pin control in cpu_init_r(), remove the
duplicated codes in the broadwell gpio driver.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present pinctrl driver gets probed in ich6_gpio driver's probe
routine, which has two issues:
- Pin's PADs only gets configured when GPIO driver is probed, which
is not done by default. This leaves the board in a partially
functional state as we must initialize PADs correctly to get
perepherals fully working.
- The probe routine of pinctrl driver is called multiple times, as
normally there are multiple GPIO controllers. It should really
be called just once.
Move the call to syscon_get_by_driver_data() from ich6_gpio driver
to cpu_init_r().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: George McCollister <george.mccollister@gmail.com>
Tested-by: George McCollister <george.mccollister@gmail.com>
These are generic and should be turned on on coreboot and qemu-x86.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
This updates the device-tree-bindings doc for x86-pinctrl driver:
- clarify "gpio-offset" is required only when "mode-gpio" is set
- correct property name "pull-strength"
- use tab instead of space at several places
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
As of today, the latest version FSP (gold4) for BayTrail misses the
PAD configuration of the SD controller's Card Detect signal. The
default PAD value for the CD pin sets the pin to work in GPIO mode,
which causes card detect status cannot be reflected by the Present
State register in the SD controller (bit 16 & bit 18 are always zero).
Add a configuration for this pin in the pinctrl node.
Note I've checked the PAD configuration for all the pins in all the
3 controllers (eMMC/SDIO/SD). Only this SDMMC3_CD_B pin does not get
initialized to correct mode by FSP. With fsp,emmc-boot-mode set to
2 (eMMC 4.1), eMMC pins are initialized to func 1, but if we set
fsp,emmc-boot-mode to 1 (auto), those pins are initialized to func 3
which is correct according to datasheet.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present all BayTrail boards configure fsp,emmc-boot-mode to 2,
which means "eMMC 4.1" per FSP documentation. However, eMMC 4.1
only shows up on some early stepping silicon of BayTrail SoC.
Newer stepping SoC integrates an eMMC 4.5 controller. Intel FSP
provides a config option fsp,emmc-boot-mode which tells FSP which
eMMC controller it initializes. Instead of hardcoded to 2, now
we change it to 1 which means "auto".
With this change, MinnowMax board (with a D0 stepping BayTrail SoC)
can see the eMMC 4.5 controller at PCI address 00.17.00 via U-Boot
'pci' command.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Without a 'reg' property, pinctrl driver probe routine fails in
its pre_probe() with a return value of -EINVAL.
Add 'reg' property for all BayTrail boards. Note for BayleyBay,
the pinctrl node is newly added.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
The call to syscon_get_by_driver_data() does not save its return value.
Print it out to aid debugging.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
An accumulated length was incorrectly added to current each pass
through the loop. On system with more than 2 cores this caused a
corrupt MADT to be generated.
Signed-off-by: George McCollister <george.mccollister@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch adds QSPI boot support for LS2080AQDS board.
The QSPI boot image need to be programmed into the QSPI flash
first. Then we can switch to booting from QSPI memory space.
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The Freescale QSPI driver has been converted to Driver Model.
This patch enables FSL_QSPI and its dependence options, DM, DM_SPI,
OF_CONTROL and so on.
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
When QSPI is enabled, NOR flash and QIXIS can't be accessed
through IFC due to pin mux. Enable I2C QIXIS access and I2C
early init to read the sysclk and ddrclk.
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The NOR flash related configure options appear in ls2080aqds.h and
ls2080ardb.h, and the two files both includ ls2080a_common.h.
This patch remove the duplicated options in ls2080a_common.h.
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Add early i2c init function with conservative divider when the exact
clock rate is not available.
Signed-off-by: Yuan Yao <yao.yuan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Environment variable mcinitcmd is defined to initiate MC and DPL
deployment from the location where it is stored (NOR, NAND, SD, SATA,
USB) during booting. If this variable is not defined then macro
MC_BOOT_ENV_VAR will be null and MC will not be booted and DPL will
not be applied during U-boot booting.
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The SP805-WDT module on LS2080A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.
Signed-off-by: Yunhui Cui <yunhui.cui@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Since the SRAM C corruption issue is now resolved on Allwinner
A64, it is possible to move the stack top to the address 0x1A000
on both A64 and A80. The boot ROM can load SPL binaries with
up to 32 KiB size on A64 (the 24 KiB SPL size limitation only
affects A10/A20), and this patch also ensures the availability
of 8 KiB stack.
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Currently the AHB1 clock speed is configured as 200MHz by
the SPL, but this causes a subtle and hard to reproduce data
corruption in SRAM C (for example, this can't be easily
detected with a trivial memset/memcmp test).
For what it's worth, the Allwinner's BSP configures AHB1
as 200MHz, as can be verified by running the devmem2 tool
in the system running the Allwinner's kernel 3.10.x:
0x1C20028: PLL_PERIPH0_CTRL_REG = 0x90041811
0x1C20054: AHB1_APB1_CFG_REG = 0x3180
0x1C20058: APB2_CFG_REG = 0x1000000
0x1C2005C: AHB2_CFG_REG = 0x1
However the FEL mode uses more conservative settings (100MHz
for AHB1):
0x1C20028: PLL_PERIPH0_CTRL_REG = 0x90041811
0x1C20054: AHB1_APB1_CFG_REG = 0x3190
0x1C20058: APB2_CFG_REG = 0x1000000
0x1C2005C: AHB2_CFG_REG = 0x0
It is yet to be confirmed whether faster AHB1/AHB2 clock settings
can be used safely if we initialize the AXP803 PMIC instead of
using reset defaults. But in order to resolve the data corruption
problem right now, it's best to downclock AHB1 to a safe level.
Note that this issue only affects the SPL, which is not fully
supported on Allwinner A64 yet and it should not affect the boot0
usage (unless somebody can confirm SRAM C corruption with the
boot0 too).
Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
This driver implements SPI protocol in master mode to communicate
with the SPI device connected on SPI bus. It handles /CS explicitly
by controlling respective pin as gpio ('cs-gpios' property in dt node)
and uses PIO mode for SPI transaction. It is configurable based
on driver-model only.
Cc: Jagan Teki <jteki@openedev.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
For consistency with the other cache-related Kconfig entries & the
values actually set by boards, make CONFIG_SYS_DCACHE_LINE_SIZE an int
entry instead of a hex entry.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fixes: 372286217f ("MIPS: Split I & D cache line size config")
Commit fb64cda579 ("MIPS: Abstract cache op loops with a macro")
accidentally modified invalidate_dcache_range to operate on the L1
Icache instead of the Dcache. Fix the cache op used to operate on the
Dcache.
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Fixes: fb64cda579 ("MIPS: Abstract cache op loops with a macro")
Turn of the clock and assert the reset when musb_stop gets called, so that
the os gets the musb controller in a pristine state. This fixes a spurious
VBus error interrupt triggering as soon as the Linux musb driver loads.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
The Mele_A1000G_quad has an onboard usb <-> sata conversion which needs
longer then the usb-spec allows to connect after getting power.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
These are used for the usb wifi and if we leave the enabling up to the
kernel, we get hit by the axp209 issues with enabling ldo3 or 4 post boot
and the systems hangs as soon as it is enabled.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
In the draco CPU board family, etamin is a new variant
with bigger flash and more RAM. Due to new flash that
uses larger pages (4K) some changes are necessary because
it impacts the MTD partition layout and the ubi mount
parameters.
Signed-off-by: Samuel Egli <samuel.egli@siemens.com>
Signed-off-by: Heiko Schocher <hs@denx.de>
[trini: Move BOOTDELAY into defconfig, just always be 3 now]
Signed-off-by: Tom Rini <trini@konsulko.com>
writting to ubi nand partitions need after write ends an erase
of the remaining sectors. This fail, if dfu write size was not
a multiple of erasesize, example log:
Failure erase: -1
Fix this error.
Signed-off-by: Heiko Schocher <hs@denx.de>
read the ECC Type field from the i2c eeprom, instead
configuring it static in the U-Boot binary.
see RM:
Table 26-17. NAND Geometry Information on I2C EEPROM
Signed-off-by: Heiko Schocher <hs@denx.de>
add for nand devices mtd concat support. Generic MTD concat
support is already ported to mainline, and used in the cfi_mtd
driver. This patch adds it similiar for nand devices.
Signed-off-by: Heiko Schocher <hs@denx.de>
on the shc board we see when booting in net boot mode,
that the ROM bootloader sends "AM335x ROM" as
vendor-class-identifier. U-Boots doc says "DM814x ROM".
So, add the info to the doc, that there is also
"AM335x ROM" possible.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Enable 8bit interface on HSMMC2 for am33xx to support 8bit eMMC chips.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
revert patch:
commit: 6b2221b008: mmc: Handle switch error status bit in MMC card status
to get eMMC working on shc board
Signed-off-by: Heiko Schocher <hs@denx.de>
Enable Spread Spectrum for the MPU by calculating the required
values and setting the registers accordingly.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
add missing CM_CLKMODE_DPLL_SSC_ACK_MASK,
CM_CLKMODE_DPLL_SSC_DOWNSPREAD_MASK and
CM_CLKMODE_DPLL_SSC_TYPE_MASK
defines. Used for enabling spread spectrum.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
add the following defines, needed for the upcoming shc board
support:
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
if CONFIG_VERSION_VARIABLE is set, the U-Boot environment
contains a "vers" variable with the current U-Boot version
string. If now "printenv" is called, test/py fails as it
detects the main_sign string, which is in this case correct.
So check only the main_sign as an error, if CONFIG_VERSION_VARIABLE
is not set.
Signed-off-by: Heiko Schocher <hs@denx.de>
This current code passes the variable arguments list to sprintf(). This is
not correct. Fix it by calling _vprintf() directly.
This makes firefly-rk3288 boot again.
Fixes: abeb272 ("tiny-printf: Support snprintf()")
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
I noticed secondary CPUs sometimes fail to wake up, and the root
cause is that the sev instruction wakes up slave CPUs before the
preceding the register write is observed by them.
The read-back of the accessed register does not guarantee the order.
In order to ensure the order between the register write and the sev
instruction, a dsb instruction should be executed prior to the sev.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This code auto-detects the best-match FDT file name, but it should
respect the user's choice if "fdt_file" environment is found in a
saved set of environments.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This function is shared between PH1-LD11 and PH1-LD20. The difference
is the boot-mode latch for the USB boot mode.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The Boot ROM on PH1-LD11/LD20 exports built-in APIs to load images
from an eMMC device. They are useful to reduce the memory footprint
of SPL, rather than compiling the whole MMC framework.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This adds support for IS1 board. Pretty usual socfpga board,
256MB of RAM, does not have MMC, two SPI chips, one ethernet port, two
additional ethernet ports connected to the FPGA.
Signed-off-by: Pavel Machek <pavel@denx.de>
Add missing ${partnum} to set rootdev correctly when
booting from USB or MMC.
Signed-off-by: Kimmo Surakka <kimmo.surakka@ge.com>
[Rebased against v2016.05 and adjusted the variable name]
Signed-off-by: Andrew Shadura <andrew.shadura@collabora.co.uk>
Disable unused FPGA, NFS, FAT and EFI support to reduce the bootloader
size. Don't clear memory reserved for malloc to improve boot speed.
Signed-off-by: Andrew Shadura <andrew.shadura@collabora.co.uk>
The SATA support is only useful for development and shouldn't be enabled
in production, so it has to be disabled in U-boot by default.
Signed-off-by: Andrew Shadura <andrew.shadura@collabora.co.uk>
The network support is only useful for development and shouldn't be enabled
in production, so it has to be disabled in U-boot by default.
Signed-off-by: Andrew Shadura <andrew.shadura@collabora.co.uk>
The USB support is only useful for development and shouldn't be enabled
in production, so it has to be disabled in U-boot by default.
Signed-off-by: Andrew Shadura <andrew.shadura@collabora.co.uk>
The kernel already knows how to initialise the display, and initialising
the display from U-boot is only useful for debugging and isn't necessary
in production, so no need to have it enabled in U-boot by default.
Signed-off-by: Andrew Shadura <andrew.shadura@collabora.co.uk>
In 'commit d584c68ce0f5bf2f430ccfb2ba00bd506206fb91',
ar8031 is changed to use ar8035_config. ar8035_config
actually does the same thing as mx6_rgmii_rework, so
drop mx6_rgmii_rework and board_phy_config.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Acked-by: Stefano Babic <sbabic@denx.de>
UHS-I support is available on Ventana boards with micro-SD sockets depending
on the board revision. For backwards compatibility to not break users
who have old bootloaders and newer kernels the device-tree on boards with
microSD disables UHS-I support by default by defining the no-1-8-v property
in the esdhc controller node. For models/revisions that support switchable
1.8V/3.3V I/O which is detectable by the presence of a pull-down on the
SD3_VSELECT pin we remove that property to enable support in the kernel.
Additionally we add SD3_VSELECT to the pinmux for clarity (even though U-Boot
does not currently support UHS-I modes requiring 1.8V I/O).
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Removed several EEPROM bit dependencies:
- for dt aliases that don't exist and thus don't ever do anything
(pcie,lvds1,uart*,vpu,csi*,hdmi_in,hdmi_out,cvbs_in,cvbs_out,gps)
- for features that don't effect bus ordering or have no detrimental affect
if erroneously enabled when not present (ahci,nand,i2c*)
- for features that have little to no impact on being erroneously enabled
but high impact if erroneously disabled (can*, spi*)
- for features that have an high adverse affect of not being set when they
should and no adverse affect of being set when they
shouldn't (ipu*).
Removing these means the following:
- these no longer are supported with the econfig command
- these no longer affect the device-tree in any way
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The MSATA feature is a board-specific feature on Gateworks Ventana boards.
In most cases a 2:1 mux will steer either PCIe or SATA to a miniPCIe socket
through an MSATA_EN gpio. In these such cases assign the gpio in the board
specific struct and use its presence to determine if we default the GPIO to
PCIe and if we later steer it according to hwconfig.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Most Ventana boards have a connector with off-board digital-I/O signals
including some that can be pinmuxed as either a PWM or a GPIO. The hwconfig
env variable is used to configure these and they will be pinmuxed according
to this configuration in the bootloader.
This patch adds a device-tree fixup that will enable the pwm controller
nodes appropriately for digital-I/O's that are configured as pwm via hwconfig
so that the pin can be used with the Linux kernel /sys/class/pwm API.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Calling request_gpio to register bklt_gpio with the GPIO driver had no effect
in setup_display called from early board init (although pinmuxing it and
configuring it as output-low does do what it should). Therefore move the
request_gpio later in enable_lvds so that its registered for use by the
gpio command if LVDS is actually enabled.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
The Gateworks System Controller on Ventana boards has the ability to
disable the board's primary power supply until the RTC hits a specific
time. When sleeping a button-down event on the GSC user pushbutton will
wake the board before it's wake time has been reached. This feature is
referred to as GSC sleep.
Add a command to invoke sleep mode for a specified number of seconds.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
If not booting Falcon mode, leave the boot watchdog enabled as a work-around
for other non-resolved bootloader hangs.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
If we are loading a script to ${loadaddr} then we need to use that address
explicitly when calling the source command in case user has changed loadaddr
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
In order to make the default boot scripts more flexible, use the variable
'fs' to specify the filesystem type to use for block storage devices
(USB/MMC/SATA) when loading files.
Additionally default this to ext4 and enable ext4 filesystem support
(which encompasses ext2 support) instead of just ext2 support.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
In order to make the default boot scripts more flexible, use the variable
'bootdir' to specify the filesystem directory to look for fdt files in.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
In order to make the default boot scripts more flexible, use the variable
'disk' to specify the disk device number and the variable 'part' to specify
the partition number.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
This commit fixes the MMC data transactions timeout problem on the
TS4800.
The changes introduced in the commit e978a31 on the timeout calculation
for the MMC data transactions has revealed there is something wrong with
the timeout setting of the eSDHC controller used in the IMX51.
The IMX51 seems to be concerned by this erratum and without this change
the MMC driver is unable to do any transactions.
Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
This commit updates the environment variables to be able to boot with a
device tree. The expected partition layout on the SD card is:
- partition 1: type 0xDA, contains u-boot.bin
- partition 2: type 0xC (fat), contains zImage and device tree
- partition 3: type 0x83, root filesystem.
Signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Remove SPL_EXT_SUPPORT to resolve build issue. It may be useful to bring
it back in the future after comparing its merits to storing the args/kernel
in fixed raw locations.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
NAND+MMC env support costs 12KB in the SPL which is fairly expensive just
for the ability to specify whether or not to boot to uboot or directly
to linux. The Ventana boards have plenty of EEPROM storage so we will use
a byte there to signify if we should boot to the bootloader or to the OS.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
To i.MX6DQPlus, osc can be choosed as the source of gpt, so
add i.MX6DQPlus support in gpt_has_clk_source_osc.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
The i.MX6DQPlus support sata interface, we should not
return failure when CPU is i.MX6DQPlus.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Correct get_cpu_speed_grade_hz for i.MX6DQP, otherwise we
will get wrong speed grade info i.MX6DQP.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Use simpler runtime cpu dection macros.
i.MX6DL and i.MX6SOLO work the same, so use is_mx6sdl.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
i.MX6DL and i.MX6SOLO work the same, add i.MX6SOLO support
when enable/disable_ldb_di_clock_sources.
Signed-off-by: Peng Fan <van.freenix@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
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