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1259 Commits

Author SHA1 Message Date
Tom Rini
f95ab1fb6e Prepare v2018.03
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-13 08:02:19 -04:00
Bryan O'Donoghue
ca89df7dd4 imx: hab: Convert DCD non-NULL error to warning
commit 8c4037a09a ("imx: hab: Ensure the IVT DCD pointer is Null prior
to calling HAB authenticate function.") makes the DCD field being NULL a
dependency.

This change though will break loading and executing of existing pre-signed
binaries on a u-boot update i.e. if this change is deployed on a board you
will be forced to redo all images on that board to NULL out the DCD.

There is no prior guidance from NXP that the DCD must be NULL similarly
public guidance on usage of the HAB doesn't call out this NULL dependency
(see boundary devices link).

Since later SoCs will reject a non-NULL DCD there's no reason to make a
NULL DCD a requirement, however if there is an actual dependency for later
SoCs the appropriate fix would be to do SoC version checking.

Earlier SoCs are capable (and happy) to authenticate images with non-NULL
DCDs, we should not be forcing this change on downstream users -
particularly if it means those users now must rewrite their build systems
and/or redeploy signed images in the field.

Fixes: 8c4037a09a ("imx: hab: Ensure the IVT DCD pointer is Null prior
to calling HAB authenticate function.")

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Link: https://boundarydevices.com/high-assurance-boot-hab-dummies
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-13 07:51:32 -04:00
Breno Lima
6d7403bf72 doc: mxc_hab: Update i.MX HAB documentation
The README.mxc_hab is outdated and need improvements, add the following
modifications:

- Reorganize document and remove duplicate content
- Add CST download link
- Update CST package name
- Align command lines with CST v2.3.3
- Update U-Boot binary name
- Remove CSF padding since is not documented in AN4581

Signed-off-by: Breno Lima <breno.lima@nxp.com>
2018-03-11 16:00:21 +01:00
Breno Lima
b887f0a68e doc: mxc_hab: Move HAB related info to the appropriate doc
Currently the High Assurance Boot procedure is documented in two
places:

- doc/README.imx6
- doc/README.mxc_hab

It is better to consolidate all HAB related information into
README.mxc_hab file, so move the content from README.imx6 to
README.mxc_hab.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-11 16:00:16 +01:00
Bryan O'Donoghue
f0d5bd4ba5 imx: hab: Make usage of packed attribute consistent
commit cd2d46003c ("arm: imx: hab: Add IVT header definitions") declares
struct ivt_header as "__attribute__((packed))".

commit ed286bc80e ("imx: hab: Check if CSF is valid before
authenticating image") declares struct hab_hdr with __packed.

This patch makes the __packed convention consistent.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-11 16:00:00 +01:00
Bryan O'Donoghue
ffab61f4aa imx: hab: Fix usage of packed attribute
commit ed286bc80e ("imx: hab: Check if CSF is valid before authenticating
image") makes use of "__packed" as a prefix to the "struct hab_hdr"
declaration.

With my compiler "gcc version 7.2.1 20171011 (Linaro GCC 7.2-2017.11)" we
get:

./arch/arm/include/asm/mach-imx/hab.h:42:25: error: expected ‘=’, ‘,’, ‘;’,
‘asm’ or ‘__attribute__’ before ‘{’ token
 struct __packed hab_hdr {

Fix this problem by including <linux/compiler.h>

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Cc: Breno Lima <breno.lima@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-11 15:59:51 +01:00
Jagan Teki
2b0bc47661 ARM: dts: imx6dl-icore-rqs: Fix to include correct dtsi
This patch fixes the wrongly included dtsi file which was
breaking mainline support for Engicam i.CoreM6 DualLite/Solo RQS.

Linux commit details for the same change as
"ARM: dts: imx6dl: Include correct dtsi file for Engicam i.CoreM6
DualLite/Solo RQS"
(sha1: c0c6bb2322964bd264b4ddedaa5776f40c709f0c)

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-11 15:59:43 +01:00
Jagan Teki
85e1f6be03 ARM: dts: imx6qdl-icore-rqs: Sync usdhc4 node from Linux
usdhc4 node need to update pinctrl, bus-width and non-removable
properties, sync the same from Linux.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-11 15:59:34 +01:00
Tom Rini
2e5c42c630 Merge git://git.denx.de/u-boot-imx 2018-03-09 13:29:58 -05:00
Tom Rini
48ba1f3c38 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-09 12:31:08 -05:00
Stefan Theil
63f881d46a tools/mkimage: Use proper output parameter in dtc-system call
The system call used by mkimage to run dtc redirects stdout to a
temporary file. This can cause problems on Windows (with a MinGW
cross-compiled version). Using the "-o" dtc parameter avoids
this problem.

Signed-off-by: Stefan Theil <stefan.theil@mixed-mode.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-03-09 12:31:07 -05:00
Marek Behún
51be471663 fs: ext4: Do not print mount fail message when not ext4 filesystem
Other filesystem drivers don't do this.

Signed-off-by: Marek Behun <marek.behun@nic.cz>
2018-03-09 12:31:07 -05:00
Heinrich Schuchardt
b7d6e0abab MAINTAINERS: bring sections into alphabetic order
NETWORK should be after NAND_FLASH.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-09 12:31:07 -05:00
Heinrich Schuchardt
4320e2fda4 scripts/coccinelle: add some more coccinelle tests
kmerr: verify that malloc and calloc are followed by a check to verify
that we are not out of memory.

badzero: Compare pointer-typed values to NULL rather than 0

Both checks are copied from the Linux kernel archive.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-09 12:31:07 -05:00
Heinrich Schuchardt
428e60e079 yaffs2: iterator variable cannot be NULL
The iterator of list_for_each() is never NULL.

Identified with coccinelle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-09 12:31:06 -05:00
Alexander Graf
c9bf43dd9d bcm283x_pl011: Flush RX queue after setting baud rate
After the UART was initialized, we may still have bogus data in the
RX queue if it was enabled with incorrect pin muxing before.

So let's flush the RX queue whenever we initialize baud rates.

This fixes a regression with the dynamic pinmuxing code when enable_uart=1
is not set in config.txt on Raspberry Pis that use pl011 for serial.

Fixes: caf2233b28 ("bcm283x: Add pinctrl driver")
Reported-by: Göran Lundberg <goran@lundberg.email>
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09 12:31:04 -05:00
Alexander Graf
293b9814d7 serial_bcm283x_mu: Flush RX queue after setting baud rate
After the UART was initialized, we may still have bogus data in the
RX queue if it was enabled with incorrect pin muxing before.

So let's flush the RX queue whenever we initialize baud rates.

This fixes a regression with the dynamic pinmuxing code when enable_uart=1
is not set in config.txt.

Fixes: caf2233b28 ("bcm283x: Add pinctrl driver")
Reported-by: Göran Lundberg <goran@lundberg.email>
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09 12:26:47 -05:00
Tuomas Tynkkynen
b996b7d426 ARM: Drop unreferenced CONFIG_* defines named after boards
The following config symbols are only defined once and never referenced
anywhere else:

CONFIG_AT91SAM9263EK
CONFIG_AT91SAM9RLEK
CONFIG_BARIX_IPAM390
CONFIG_BOARD_H2200
CONFIG_EP9301
CONFIG_KZM_A9_GT
CONFIG_PICOSAM
CONFIG_PLATINUM_PICON
CONFIG_PLATINUM_TITANIUM
CONFIG_PM9261
CONFIG_PM9263
CONFIG_PM9G45
CONFIG_SIEMENS_DRACO
CONFIG_SIEMENS_PXM2
CONFIG_SIEMENS_RUT
CONFIG_SMDKC100
CONFIG_SMDKV310
CONFIG_STM32F4DISCOVERY

Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09 09:23:10 -05:00
Tuomas Tynkkynen
17796171be ARM: Drop unreferenced CONFIG_* defines named after SoCs
The following config symbols are only defined once and never referenced
anywhere else:

CONFIG_ARM926EJS
CONFIG_CPUAT91
CONFIG_EXYNOS5800
CONFIG_SYS_CORTEX_R4

Most of them are config symbols named after the respective SoCs which
seems to have been a standard practice at some point.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09 09:23:10 -05:00
Tuomas Tynkkynen
c604f47a80 MIPS: Drop unreferenced CONFIG_* defines
The following config symbols are only defined once and never referenced
anywhere else:

CONFIG_DBAU1X00
CONFIG_PB1X00

Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-03-09 09:23:10 -05:00
Mario Six
d38826a3dc treewide: Fix gdsys mail addresses
The @gdsys.cc addresses are supposed to be used for mailing lists.
Switch all occurrences of @gdsys.de mail addresses to their @gdsys.cc
equivalent.

Also, Dirk's address was wrong in one place; fix that as well.

Signed-off-by: Mario Six <six@gdsys.cc>
2018-03-09 09:23:10 -05:00
Tuomas Tynkkynen
b771f0b126 ARM: qemu-arm: Increase CONFIG_SYS_CBSIZE
CONFIG_SYS_CBSIZE determines the maximum length of the kernel command
line, and the default value of 256 is too small for booting some Linux
images in the wild.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
2018-03-09 09:23:10 -05:00
Yasushi SHOJI
314d9f7e3e imx: syscounter: make sure asm is volatile
Without the volatile attribute, compilers are entitled to optimize out
the same asm().  In the case of __udelay() in syscounter.c, it calls
`get_ticks()` twice, one for the starting time and the second in the
loop to check the current time.  When compilers inline `get_ticks()`
they see the same `mrrc` instructions and optimize out the second one.
This leads to infinite loop since we don't get updated value from the
system counter.

Here is a portion of the disassembly of __udelay:

  88:	428b      	cmp	r3, r1
  8a:	f8ce 20a4 	str.w	r2, [lr, #164]	; 0xa4
  8e:	bf08      	it	eq
  90:	4282      	cmpeq	r2, r0
  92:	f8ce 30a0 	str.w	r3, [lr, #160]	; 0xa0
  96:	d3f7      	bcc.n	88 <__udelay+0x88>
  98:	e8bd 8cf0 	ldmia.w	sp!, {r4, r5, r6, r7, sl, fp, pc}

Note that final jump / loop at 96 to 88, we don't have any `mrrc`.

With a volatile attribute, the above changes to this:

  8a:	ec53 2f0e 	mrrc	15, 0, r2, r3, cr14
  8e:	42ab      	cmp	r3, r5
  90:	f8c1 20a4 	str.w	r2, [r1, #164]	; 0xa4
  94:	bf08      	it	eq
  96:	42a2      	cmpeq	r2, r4
  98:	f8c1 30a0 	str.w	r3, [r1, #160]	; 0xa0
  9c:	d3f5      	bcc.n	8a <__udelay+0x8a>
  9e:	e8bd 8cf0 	ldmia.w	sp!, {r4, r5, r6, r7, sl, fp, pc}
  a2:	bf00      	nop

I'm advised[1] to put volatile on all asm(), so this commit also adds it
to the asm() in timer_init().

[1]: https://lists.denx.de/pipermail/u-boot/2018-March/322062.html

Signed-off-by: Yasushi SHOJI <yasushi.shoji@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-09 13:06:14 +01:00
Fabio Estevam
b5b0e4e351 imximage: Remove failure when no IVT offset is found
Sometimes imximage throws the following error:

  CFGS    board/freescale/vf610twr/imximage.cfg.cfgtmp
  CFGS    board/freescale/vf610twr/imximage.cfg.cfgtmp
  MKIMAGE u-boot-dtb.imx
Error: No BOOT_FROM tag in board/freescale/vf610twr/imximage.cfg.cfgtmp
arch/arm/mach-imx/Makefile💯 recipe for target 'u-boot-dtb.imx' failed

Later on, when running mkimage for the u-boot.imx it will succeed in
finding the IVT offset.

Looks like some race condition happening during parallel build when
processing mkimage for u-boot-dtb.imx and u-boot.imx.

A proper fix still needs to be implemented, but as a workaround let's
remove the error when the IVT offset is not found.

It is useful to have such message, especially during bring-up phase,
but the build error that it causes is severe, so better avoid the
build error for now.

The error checking can be re-implemented later when we have a proper
fix.

Reported-by: Breno Lima <breno.lima@nxp.com>
Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-03-09 13:04:02 +01:00
Tom Rini
5e62f82825 Prepare v2018.03-rc4
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-05 20:27:08 -05:00
Tom Rini
81f077f40f Merge git://git.denx.de/u-boot-sh 2018-03-05 20:24:17 -05:00
Tom Rini
3cbd5ff18d Devboards.de DBM-SoC1 BOARD: Add S line
This was missing the 'S' line causing a warning from genboardscfg.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-05 10:20:46 -05:00
Adam Ford
7f586d6fc4 ARM: DTS: Re-sync logicpd-som-lv with Linux 4.16-rc3
This should clean up a warning about a missing phy-cells

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-03-05 10:16:30 -05:00
Heinrich Schuchardt
4ef17f9cbe MAINTAINERS: bring sections into alphabetic order
POWER should be after ONENAND

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-05 10:16:30 -05:00
Fabio Estevam
7c0764b436 scripts/spelling.txt: Sync script with kernel 4.16-rc4
Keep spelling.txt in sync with the version from kernel 4.16-rc4.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-05 10:16:30 -05:00
Adam Ford
61ec4e0742 omap3_logic: Remove unnecessary undefs
Due to evolution of the MMC driver and better support, let's
remove unnecessary undefs.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-03-05 10:16:29 -05:00
Adam Ford
24c9309254 ti_armv7_omap: Remove comment remnant
With the migration to Kconfig, the I2C block no longer exists in here.
Let's clean up the comment.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-03-05 10:16:29 -05:00
Ed Bartosh
1bb34c8b89 MPC8315ERDB: Enable DHCP support
Enable DHCP support for this board.

Signed-off-by: Ed Bartosh <ed.bartosh@linux.intel.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-03-05 10:16:29 -05:00
Masahiro Yamada
b08c8c4870 libfdt: move headers to <linux/libfdt.h> and <linux/libfdt_env.h>
Thomas reported U-Boot failed to build host tools if libfdt-devel
package is installed because tools include libfdt headers from
/usr/include/ instead of using internal ones.

This commit moves the header code:
  include/libfdt.h         -> include/linux/libfdt.h
  include/libfdt_env.h     -> include/linux/libfdt_env.h

and replaces include directives:
  #include <libfdt.h>      -> #include <linux/libfdt.h>
  #include <libfdt_env.h>  -> #include <linux/libfdt_env.h>

Reported-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05 10:16:28 -05:00
Paul Kocialkowski
e0d20dc152 tools: Include U-Boot libfdt headers from their actual path
There are no headers for libfdt in lib/libfdt, as they are instead
located in scripts/dtc/libfdt. Specifying lib/libfdt for headers
inclusion in host tools results in using the system libfdt headers,
which is not what we want. Change this to the proper path.

Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
2018-03-05 10:16:28 -05:00
Heinrich Schuchardt
a84f559262 input: indicate that code page 437 is used
Add a comment indicating that the German key map assumes code page 437.

Add support for character ² (square sign) in the German key map.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-03-05 10:06:05 -05:00
Marek Behún
de2069c761 pinctrl: Kconfig: Fix typo
Signed-off-by: Marek Behun <marek.behun@nic.cz>
2018-03-05 10:06:05 -05:00
Mario Six
1e5f89881a gpio: pca953x_gpio: Support label setting from DT
The PCA953x driver uses "gpio@%x_" as the GPIO bank name, where "%x" is
instantiated with the I2C address of the chip. While this works, it
becomes very confusing if a board has multiple PCAs with the same
address on different I2C busses, and it also becomes an issue when a
GPIO's value is to be set via the 'gpio' command, because this command
only ever sets the value of the first device it encounters, leaving the
other devices inaccessible to the command.

As to not break boards that rely on this naming scheme, we introduce a
new device tree string property "label" for the driver. If it exists, it
is used to build a bank name of the form "%s@%x_" (where %x is still
instantiated with the I2C address). If it does not exist, the legacy
labeling scheme is used.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-03-05 10:06:05 -05:00
Faiz Abbas
b432b1ebdf spl: Kconfig: Rename SPL_USBETH_SUPPORT to SPL_USB_ETHER to match with the U-boot CONFIG
Rename CONFIG_SPL_USBETH_SUPPORT to CONFIG_SPL_USB_ETHER.

This enables users to block text using CONFIG_IS_ENABLED() instead
of resorting to #if ladders with SPL and non-SPL cases.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-03-05 10:06:05 -05:00
Stefan Agner
cd655514aa tools/env: allow equal sign as key value separation
Treat the first equal sign as a key/value separation too. This makes
the script files compatible with mkenvimage input file format. It
won't support variables with equal signs anymore, but this seems not
really like a loss.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-03-05 10:05:36 -05:00
Jeremy Boone
b3f4070340 Atmel TPM: Fix potential buffer overruns
Ensure that the Atmel TPM driver performs sufficient
validation of the length returned in the TPM response header.
This patch prevents memory corruption if the header contains a
length value that is larger than the destination buffer.

Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
2018-03-05 10:05:36 -05:00
Jeremy Boone
afe0e6bddf Infineon TPM: Fix potential buffer overruns
Ensure that the Infineon I2C and SPI TPM driver performs adequate
validation of the length extracted from the TPM response header.
This patch prevents integer underflow when the length was too small,
which could lead to memory corruption.

Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
2018-03-05 10:05:36 -05:00
Jeremy Boone
12e0ab327d STMicro TPM: Fix potential buffer overruns
This patch prevents integer underflow when the length was too small,
which could lead to memory corruption.

Signed-off-by: Jeremy Boone <jeremy.boone@nccgroup.trust>
2018-03-05 10:05:36 -05:00
Marek Vasut
b2c38dc3d3 ARM: dts: rmobile: Add PHY reset GPIO
This patch got dropped during the update of DTs to 4.14, re-add it
back. This adds reset GPIOs to the ethernet PHYs.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 11:48:53 +01:00
Marek Vasut
33ba5b3d1d ARM: dts: rmobile: Make PFC and RST available early on Gen2 only
These do not need to be available early on Gen3 , so move them to
the respective DT files.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:41 +01:00
Marek Vasut
60299e0d4e ARM: rmobile: Add R8A77965 Salvator-XS board support
Add R8A77965 M3N Salvator-XS development kit support. This kit is
similar to the other Salvator-X(S) ones, except is has M3N SoC on
it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
89fcfd1f58 ARM: dts: rmobile: Add SDHI nodes to R8A77965 M3N DT
Add SDHI nodes to r8a77965.dtsi to get eMMC and SD slots operational.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
4610343950 ARM: dts: rmobile: Add xHCI node to R8A77965 M3N DT
Add xHCI node to r8a77965.dtsi to get xHCI USB operational.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
cce09d2676 ARM: dts: rmobile: Add EHCI nodes to R8A77965 M3N DT
Add generic EHCI nodes to r8a77965.dtsi to get EHCI USB operational.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
beb84f921a ARM: dts: rmobile: Add RAVB node to R8A77965 M3N DT
Add RAVB node to r8a77965.dtsi to get ethernet operational.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
50e031efa4 ARM: dts: rmobile: Import R8A77965 M3N DT files from Linux
Import the R8A77965 M3N DT from Linux 4.16-rc1 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
4f0533ffcd usb: xhci-rcar: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
d1fe3182fa pinctrl: rmobile: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:38 +01:00
Marek Vasut
7a7081e6f3 net: ravb: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-03-05 10:59:37 +01:00
Marek Vasut
d6eb25c2f1 mmc: uniphier-sd: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-03-05 10:59:37 +01:00
Marek Vasut
76ed8f0542 gpio: rcar: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:37 +01:00
Marek Vasut
c6d99986f0 clk: renesas: Add R8A77965 M3N entries
Add entries for the R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:37 +01:00
Marek Vasut
f295a5697e ARM: rmobile: Add R8A77965 M3N IDs
Add CPU and PRR IDs for R8A77965 M3N SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-03-05 10:59:37 +01:00
Tom Rini
77bba970e2 Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2018-03-01 15:50:52 -05:00
Tom Rini
e1541b1d7f Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-03-01 15:50:43 -05:00
Tom Rini
6256b02db3 Merge tag 'xilinx-kconfig-for-v2018.03' of git://www.denx.de/git/u-boot-microblaze
Xilinx Kconfig changes for v2018.03

- Moving some macros to Kconfig

# gpg: Signature made Thu 01 Mar 2018 10:45:58 AM EST using DSA key ID 294A0C21
# gpg: Good signature from "Michal Simek <monstr@monstr.eu>"
# gpg:                 aka "Michal Simek (Xilinx) <michals@xilinx.com>"
# gpg:                 aka "Michal Simek (Xilinx) <michal.simek@xilinx.com>"
2018-03-01 12:41:21 -05:00
Vipul Kumar
3ccc207a30 mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MIN_FREQ
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 16:44:10 +01:00
Vipul Kumar
5dc5a53c5e mmc: Added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ
This patch added Kconfig support for CONFIG_ZYNQ_SDHCI_MAX_FREQ
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 16:44:10 +01:00
Vipul Kumar
71d5a14204 microblaze: Added Kconfig support for CONFIG_XILINX_GPIO
This patch added Kconfig support for CONFIG_XILINX_GPIO
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 15:43:45 +01:00
Vipul Kumar
e885b4255f i2c: Added kconfig support for CONFIG_ZYNQ_I2C0 and CONFIG_ZYNQ_I2C1
This patch added Kconfig support for CONFIG_ZYNQ_I2C0 and
CONFIG_ZYNQ_I2C1 and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:01 +01:00
Vipul Kumar
5c32de202b i2c: Added Kconfig support for CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET
This patch added Kconfig support for CONFIG_ZYNQ_GEM_I2C_MAC_OFFSET
and enabled it in respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:01 +01:00
Vipul Kumar
ce3c9a59af i2c: Added Kconfig support for CONFIG_SYS_I2C_ZYNQ_SPEED
This patch added Kconfig support for CONFIG_SYS_I2C_ZYNQ_SPEED
and set it to default value 100000.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:01 +01:00
Vipul Kumar
e7affad190 i2c: Added Kconfig support for CONFIG_SYS_I2C_ZYNQ_SLAVE
This patch added Kconfig support for CONFIG_SYS_I2C_ZYNQ_SLAVE
and set it default to 0.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:01 +01:00
Vipul Kumar
fc3a6f1c53 i2c: Enabled CONFIG_SYS_I2C_ZYNQ in the respective defconfig
This patch enabled CONFIG_SYS_I2C_ZYNQ in the respective
defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:01 +01:00
Vipul Kumar
38a69e96b3 i2c: Added Kconfig support for CONFIG_SYS_I2C_ZYNQ
This patch added Kconfig support for CONFIG_SYS_I2C_ZYNQ.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-03-01 08:03:00 +01:00
Vipul Kumar
3990c9d627 arm: zynq: fpga: Added Kconfig support for CONFIG_FPGA_ZYNQPL
This patch added Kconfig support for CONFIG_FPGA_ZYNQPL and migrates the
values over to the defconfigs.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2018-02-28 13:00:25 -05:00
Vipul Kumar
f415834608 fpga: Added Kconfig support for FPGA_SPARTAN3
This patch added Kconfig support for FPGA_SPARTAN3 and migrates the
values over to the defconfigs.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2018-02-28 13:00:04 -05:00
Tom Rini
d231182441 Merge git://git.denx.de/u-boot-net 2018-02-27 20:10:28 -05:00
Michal Simek
3b3ea2c56e Kconfig: cmd: Make networking command dependent on NET
Enable networking command only when NET is enabled.
And remove selecting NET for CMD_NET

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-27 16:25:30 -05:00
Marek Vasut
44c5580f1c ARM: rmobile: Build u-boot-spl.srec on Gen2
The u-boot-spl.srec is needed for the minimon update on Gen2 SoCs,
conveniently generate this file if SPL is enabled.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
2018-02-27 21:05:35 +01:00
Marek Vasut
3ee58ea425 Makefile: add u-boot-spl.srec target
The u-boot-spl.srec is needed for some platforms, add target to generate this file.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Tom Rini <trini@konsulko.com>
2018-02-27 21:05:35 +01:00
Masaru Nagai
b691c9a668 ARM: rmobile: Build u-boot-elf.srec on Gen3
The u-boot-elf.srec is needed for the minimon update on Gen3 SoCs,
conveniently generate this file.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-27 21:05:35 +01:00
Masaru Nagai
341ca90560 Makefile: add u-boot-elf.srec target
The u-boot-elf.srec is needed for some platforms, add target to generate this file.

Signed-off-by: Masaru Nagai <masaru.nagai.vx@renesas.com>
Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-27 21:05:35 +01:00
Chin Liang See
92afd7ecf9 arm: socfpga: cyclone5: Enable Macronix flash support
Enable Macronix flash support for Cyclone5 SoC

Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
2018-02-27 20:45:45 +01:00
Arno Steffens
a0fd381fc6 net: phy: smsc: Add SMSC LAN8741 support
Signed-off-by: Arno Steffens <star@gmx.li>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-26 15:51:37 -06:00
Bernhard Messerklinger
8f5672ea9d net: e1000: Fix e1000_igb semaphore handling
Fix commit f1bcad22dd ("net: e1000: add support for writing to
EEPROM").

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-26 15:51:36 -06:00
Eugeniy Paltsev
1693a577be NET: designware: fix clock enable
After commit ba1f966725 ("net: designware: add clock support")
we got NET broken on axs101 and axs103 platforms.

Some clock don't support gating so their clock drivers don't
implement .enable/.disable callbacks. In such case clk_enable
returns -ENOSYS.
Also some clock drivers implement .enable/.disable callbacks not for all
clock IDs and return -ENOSYS (or -ENOTSUPP) for others.

If we have such clock in 'clocks' list of designware ethernet controller
node we fail to probe designware ethernet.

Fix it.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-26 15:49:26 -06:00
Mario Six
8d6312032e phy: Fix style violations
Fix some style violations in the generic PHY management code.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-26 15:48:55 -06:00
Mario Six
c550389881 cmd: mdio: Fix style violations
Fix some style violations in the MDIO command.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-26 15:47:43 -06:00
Mario Six
431be621c6 net: phy: marvell 88e151x: Fix handling of bare RGMII interface type
Commit 68e6ecadc5 ("net: phy: marvell 88e151x: Fix handling of RGMII
interface types") fixed the initialization of 88e151x phys, but made it
so that interfaces of type PHY_INTERFACE_MODE_RGMII had both RX and TX
delay bits cleared. The default (like in m88e1111s_config) is to have
both bits set.

Hence, this patch changes the behavior in the PHY_INTERFACE_MODE_RGMII
case so that both bits are set.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-26 15:47:07 -06:00
Mario Six
76f11d3adf net: phy: marvell: Fix style violations
Fix some style violations (mostly wrong indentions) in the Marvell PHY
driver.

Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-26 15:46:09 -06:00
Mario Six
1313aaf031 net: tsec: Make live-tree compatible
Make the tsec ethernet driver compatible with a live device tree.

Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-26 15:45:56 -06:00
Mario Six
5775f00e12 net: tsec: Fix memory leak in error path
tsec_initialize allocates a private driver structure using malloc.
Should the memory allocation of this private structure fail, the
function execution is aborted with a return 0, but the previously
allocated device structure is never freed, hence leaked.

Free the device structure in the error case.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-26 15:28:43 -06:00
Mario Six
d38de3380d net: tsec: Fix style violations
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-26 15:28:39 -06:00
Marek Vasut
2155a7981d ARM: dts: rmobile: Import proper DTS for H2 Stout
Replace the placeholder DTS for R8A7790 H2 Stout with a proper
DTS from Linux next .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-26 20:00:01 +01:00
Marek Vasut
7fb464302e ARM: socfpga: Add new CycloneV SoC Devboards DBM-SoC1 board
Add support for a new boards from devboards.de , the DBM-SoC1 .
This board has one ethernet port, one USB OTG port and USB UART.

Signed-off-by: Marek Vasut <marex@denx.de>
2018-02-26 14:06:02 +01:00
Tom Rini
4bafceff0e Merge git://git.denx.de/u-boot-mmc 2018-02-25 22:28:59 -05:00
Jean-Jacques Hiblot
beac7d33d9 mmc: omap_hsmmc: use a default 52MHz max clock rate if none is specified
mmc_of_parse() doesn't set a default value if none is available in DT.
In that case, use a default 52MHz clock rate.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Jean-Jacques Hiblot
27a4b3bc4c mmc: omap_hsmmc: make it possible to compile out ADMA support
Some platforms don't have ADMA controllers. For those platforms, compiling
it out reduces the size of the binary by about 600 bytes.
Leaving the support in doesn't break things as the driver checks at runtime
if the ADMA2 controller is present.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Jean-Jacques Hiblot
c7d08d80c3 mmc: omap_hsmmc: compile out write support if not needed
This reduces the size of the binary by about 196 bytes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Jean-Jacques Hiblot
45530e3943 mmc: omap_hsmmc: do not embed struct mmc in struct omap_hsmmc_plat
The area for struct mmc can be allocated dynamically. It greatly reduces
the size of struct omap_hsmmc_plat. This is useful in cases where the board
level code declares one or two struct omap_hsmmc_plat because it doesn't
use the Driver Model.

This saves around 740 bytes for the am335x_evm SPL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-26 10:52:15 +09:00
Tom Rini
85447f785c Merge git://git.denx.de/u-boot-rockchip 2018-02-25 15:39:10 -05:00
Tom Rini
e12546de54 Merge git://git.denx.de/u-boot-imx 2018-02-25 15:38:42 -05:00
Tom Rini
39bcbb7740 bootcount: Migrate CONFIG_SYS_BOOTCOUNT_ADDR
Migrate the users of CONFIG_SYS_BOOTCOUNT_ADDR to Kconfig.  We can
provide a default for BOOTCOUNT_AM33XX as that's a specific part of the
RTC in use.  We can also provide a default for ARCH_LS1043A and
ARCH_LS1021A as they had been previously calculated and their symbols
are in Kconfig.  In the case of other QE-enabled platforms, they are not
so we must update the relevant defconfig files.  The previous default
only applied in some cases, even on a specific SoC family.

Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Alex Kiernan <alex.kiernan@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-25 13:41:54 -05:00
Fabio Estevam
0339086bd9 imx: spl: Partially revert "spl: eMMC/SD: Provide one __weak spl_boot_mode() function"
Commit d695d66278 ("spl: eMMC/SD: Provide one __weak spl_boot_mode()
function") breaks the boot on several i.MX6 boards,
such as cuboxi and wandboard:

U-Boot SPL 2018.03-rc1-00212-g48914fc119 (Feb 10 2018 - 11:04:33 +1300)
Trying to boot from MMC1
Failed to mount ext2 filesystem...
spl_load_image_ext: ext4fs mount err - 0

Partially revert it so that we can boot U-Boot again on these
i.MX6 platforms.

Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
2018-02-24 19:33:32 +01:00
Philipp Tomsich
434d5a00a4 rockchip: clk: rk3399: handle set_rate/get_rate for PLL_PPLL
The device-tree node for the PMU clk controller assigns to its parent
(i.e. PLL_PPLL) even though this clock currently is set up statically
by an init-function.

In order to avoid unexpected failures, a simple implementation of
set_rate (which accepts requests, but notifies the caller of the
preset frequency in its return value) and get_rate (which always
returns the preset frequency) are added.

Note that this is required for the RK808 PMIC to probe successfully on
the RK3399-Q7, following the support for the assigned-clocks property.

References: commit f4fcba5c5b ("clk: implement clk_set_defaults()")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-02-24 18:50:03 +01:00
Jagan Teki
33554fcec9 rockchip: rk3288: Fix wrong TPL_TEXT_BASE
TPL offset 0xff704004 is unaligned address which is adding nearest
8-bytes for next instruction, So  0xff704004 is adding 0x20 for
proper alignment which is causing the next instruction data
0xefffffff is moved.

Hexdump with overlaped bytes:
-----------------------------
0000000 0000 0000 0000 0000 0000 0000 0000 0000
0000010 0000 0000 0000 0000 0000 0000 ffff eaff

So, Fix the TEXT_BASE for proper aligned address 0xff704000

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-24 18:47:23 +01:00
Jagan Teki
849f672bdb rockchip: rk3288: Add TPL_LDSCRIPT
Due to size limitations in SPL by adding falcon mode,
rk3288 support TPL. In order to not overlap SPL_TEXT_BASE
add TPL_TEXT_BASE with u-boot-tpl.lds that intern call
u-boot-spl.lds with proper TEXT_BASE values.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-24 18:47:22 +01:00
Philipp Tomsich
35a69a3b01 rockchip: clk: rk3368: handle clk_enable requests for GMAC
Since commit ba1f966725 ("net: designware: add clock support"), the
designware GMAC driver enables all referenced clocks. While this is a
no-op for the RK3368 during boot-up (reset behaviour has all the clock
gates open anyway), we still need to handle the clock-ids passed in
the enable op of the clock-driver and return a success.

This change extends the RK3368 clk driver to:
(a) provide a enable op
(b) signals success to the caller when the clocks for the GMAC are
    enabled (no actual action is necessary as the gates are open
    after reset)

References: commit ba1f966725 ("net: designware: add clock support")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-02-24 18:46:45 +01:00
Philipp Tomsich
a9bdd67653 rockchip: clk: rk3399: handle clk_enable requests for GMAC
Since commit ba1f966725 ("net: designware: add clock support"), the
designware GMAC driver enables all referenced clocks. While this is a
no-op for the RK3399 during boot-up (reset behaviour has all the clock
gates open anyway), we still need to handle the clock-ids passed in
the enable op of the clock-driver and return a success.

This change extends the enable-op of the rk3399 clk driver to signal
success to the caller when the clocks for the GMAC are enabled.

References: commit ba1f966725 ("net: designware: add clock support")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-02-24 18:46:45 +01:00
Jagan Teki
520d822632 ARM: dts: i.MX6QDL: icore-rqs: Fix eMMC detection during SPL
usdhc4 has eMMC on icore-rqs boards, SPL is not detecting
it becuase of u-boot,dm-spl flag so add it to make eMMC working.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-24 17:19:09 +01:00
Alex Kiernan
e9a98ba312 Remove CONFIG_SYS_BOOTCOUNT_SINGLEWORD
Tidy up CONFIG_SYS_BOOTCOUNT_SINGLEWORD from the whitelist as there's
no remaining uses of it left.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:45 -05:00
Alex Kiernan
4bc4f8a67a Migrate CONFIG_BOOTCOUNT_ALEN to Kconfig
Convert CONFIG_BOOTCOUNT_ALEN to Kconfig
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:45 -05:00
Alex Kiernan
aa5a863283 Migrate generic bootcount to Kconfig
Make generate boot counter selected in the same way as other boot count
drivers

Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:42 -05:00
Alex Kiernan
bec8c647bc Integrate AT91 bootcount driver
Integrate Boot counter for Atmel AT91SAM9XE into Kconfig

Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:42 -05:00
Alex Kiernan
8981433f4d Convert CONFIG_BOOTCOUNT_EXT to Kconfig
This converts the following to Kconfig:
  CONFIG_BOOTCOUNT_EXT

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:42 -05:00
Alex Kiernan
6cdd70eb52 Convert CONFIG_BOOTCOUNT_I2C to Kconfig
This converts the following to Kconfig:
  CONFIG_BOOTCOUNT_I2C

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-02-24 08:43:42 -05:00
Alex Kiernan
ff5410d34b Convert CONFIG_BOOTCOUNT_RAM to Kconfig
This converts the following to Kconfig:
  CONFIG_BOOTCOUNT_RAM

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-02-24 08:43:39 -05:00
Alex Kiernan
04c96ed2a6 Convert CONFIG_BOOTCOUNT_ENV to Kconfig
This converts the following to Kconfig:
  CONFIG_BOOTCOUNT_ENV

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-02-24 08:43:36 -05:00
Alex Kiernan
c35e2d91a9 Convert CONFIG_BOOTCOUNT_AM33XX to Kconfig
This converts the following to Kconfig:
  CONFIG_BOOTCOUNT_AM33XX

Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Acked-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:31 -05:00
Alex Kiernan
c1e1c1eca1 Prepare for multiple bootcount drivers
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-24 08:43:11 -05:00
Alex Kiernan
3dccc10ee1 Merge CONFIG_BOOTCOUNT and CONFIG_BOOTCOUNT_LIMIT
CONFIG_BOOTCOUNT was only used in mx53ppd, merge it with
CONFIG_BOOTCOUNT_LIMIT

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Ian Ray <ian.ray@ge.com>
2018-02-24 08:43:11 -05:00
Tom Rini
0bb430c849 Merge git://git.denx.de/u-boot-video 2018-02-24 08:02:17 -05:00
Adam Ford
ba8bf9481b Remove config_distro_defaults.h
With the contents of config_distro_defaults.h migrated to Kconfig,
we can remove this header file completely

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-02-23 21:44:22 -05:00
Adam Ford
d021e94210 Convert CONFIG_BOOTP_BOOTPATH et al to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOTP_BOOTPATH
   CONFIG_BOOTP_DNS
   CONFIG_BOOTP_GATEWAY
   CONFIG_BOOTP_HOSTNAME
   CONFIG_BOOTP_PXE
   CONFIG_BOOTP_SUBNETMASK
   CONFIG_CMDLINE_EDITING
   CONFIG_AUTO_COMPLETE
   CONFIG_SYS_LONGHELP
   CONFIG_SUPPORT_RAW_INITRD
   CONFIG_ENV_VARS_UBOOT_CONFIG

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Re-run the migration]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-23 21:41:49 -05:00
Philipp Tomsich
3f56552227 rockchip: video: update MAINTAINERS
The video drivers (VOP, HDMI encoder, LVDS encoder, MIPI encoder) for
Rockchip SOCs are self-contained and are mainly impacted by other
changes in the architecture support (e.g. pinctrl, clocking, etc).

Let's add these to the list of files maintained as part of the
Rockchip port.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-02-23 20:49:07 +01:00
Philipp Tomsich
5de0b5a36a rockchip: video: rk_vop: migrate to livetree
This migrates rk_vop (the shared functions used by multiple VOP
mini-drivers) to be compatible with a live tree.

Unfortunately, there's
(i)  a lot of tree traversal needed for a VOP (as each active VOP
     vnode references back to the endpoints in the encoders and vice
     versa) to configure the connection between VOPs and encoders;
(ii) the DTS binding is not too sane and one needs to walk a node's
     parents (the original code just assumed that the device would
     live 3 levels above the property linked through a phandle) until
     a UCLASS_DISPLAY device can be found.

As part of the migration, the code for finding the enclosing display
device has been changed to not assume a specific depth of nesting
(i.e. we walk until we reach the root or find a matching device) and
to use the newly introduced (in the same series) ofnode_get_parent()
function.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-02-23 20:48:48 +01:00
Philipp Tomsich
18e48776a6 rockchip: video: rk_hdmi: migrate to livetree
The rk_hdmi (shared functions for multiple HDMI mini-drivers) has been
using devfdt_get_addr() to read the HDMI controller's IO base address.
This will cause a failure with a live tree.

This changes the driver to use dev_read_addr() which is safe both for
flat trees and live trees.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-02-23 20:48:31 +01:00
Kever Yang
b4f20767b1 core: add ofnode_get_by_phandle() api
We need to get ofnode from a phandle, add interface to support
both live dt and fdt.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-23 20:48:09 +01:00
Philipp Tomsich
e2d5997ffd core: ofnode: add ofnode_get_parent function
The Rockchip video drivers need to walk the ofnode-parrents to find
an enclosing device that has a UCLASS_DISPLAY driver bound.  This
adds a ofnode_get_parent()-function that returns the parent-node.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-02-23 20:47:47 +01:00
Tom Rini
0c0eaee562 Merge git://git.denx.de/u-boot-sh 2018-02-23 13:05:03 -05:00
Tom Rini
1c124d379d Merge git://git.denx.de/u-boot-usb 2018-02-23 13:04:48 -05:00
Masahiro Yamada
9ab81fcc8a config_whitelist: remove false-positive CONFIG options
U-Boot pulled in several core makefiles from Linux.  The following
are not used in U-Boot:

  - CONFIG_DEBUG_SECTION_MISMATCH
  - CONFIG_FTRACE_MCOUNT_RECORD
  - CONFIG_GCOV_KERNEL
  - CONFIG_GCOV_PROFILE_ALL
  - CONFIG_KASAN
  - CONFIG_MODVERSIONS

We can remove the unused code if we like. (although it will get the
scripts out of sync)

CONFIG_BOOM and CONFIG_HIS_DRIVER are just mentioned in the comment
block of scripts/basic/fixdep.c

CONFIG_SHELL is not configuration, but a variable for internal-use.
It is just a historical misnomer in Kbuild.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-02-23 10:57:36 -05:00
Adam Ford
2a5945eee6 omap3_logic: Fix Environmental location
For the omap3_logic boards, the environment is always in NAND.
This removes the ENV_IS_IN_FAT flag to eliminate the extra chatter.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-02-23 10:40:52 -05:00
Marek Vasut
0a84925974 sf: Add ISSI IS25LP256 entry
Add entry for ISSI IS25LP256 part.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jagan Teki <jagan@openedev.com>
2018-02-23 10:40:52 -05:00
Alexey Brodkin
1022807c21 Makefile: Don't mess with .text section location for selected arches
Most of architectures have .text section situated in the very beginning
of U-Boot binary and thus it is very logical that CONFIG_SYS_TEXT_BASE
is used on final linkage step to specify where U-Boot gets linked to.

For that we pass the following construction to the LD:
---------------------------->8-----------------------
xxx-ld ...  -Ttext $(CONFIG_SYS_TEXT_BASE) ...
---------------------------->8-----------------------

But there could be exceptions. For example:
 1. In case of ARCv2 we want to put vectors table in its own section
    .ivt in front of .text section which means we need either add an
    offset to CONFIG_SYS_TEXT_BASE to compensate for .ivt or don't
    pass "-Ttext" to the LD at all and specify link base in linker
    script directly.

 2. Some architectures even though have .text section in the very
    beginning of the U-Boot image still use different symbols to
    specify link-base:
       * NIOS2: CONFIG_SYS_MONITOR_BASE (which I really like because
         that exactly what makes sense - where out image starts but not
         beginning of its .text section which just happened to match the
         whole image beginning)
       * EXTENSA: CONFIG_SYS_TEXT_ADDR
       * X86: Which doesn't use CONFIG_SYS_MONITOR_BASE in case of EFI
         otherwise sets explicit link base in u-boot.lds

I think that's good to allow for flexibility and don't require each and
every architecture or even platform to specify CONFIG_SYS_TEXT_BASE as well
as use it to set .text section location.

So let's only pass "-Ttext xxx" for those architectures who don't set
link-base explicitly in their linker scripts.

This patch iaddresses comments for previously sent
https://patchwork.ozlabs.org/patch/867540/.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2018-02-23 10:40:51 -05:00
Karl Beldan
fa7b8eae7c arm64: show_regs: Dump the LRs HW values
These were dropped in [1], after relocation, for their values offset by
reloc_off.
Unconditionally show the HW values and add a '(reloc)' hint for the
offset values showed after relocation.
Also, the LRs' dumps are now formatted the same way the other regs' are.

[1] Commit 082693f4 ("arm64 :show_regs: show the address before relocation")

Signed-off-by: Karl Beldan <karl.beldan+oss@gmail.com>
2018-02-23 10:40:51 -05:00
Jonathan Gray
a2d5efd74f tools/kwbimage: fix LibreSSL build
Fix build after addition of RSA_get0_key() to LibreSSL.
Patch from Theo Buehler and Stuart Henderson.

Signed-off-by: Theo Buehler <tb@openbsd.org>
Signed-off-by: Stuart Henderson <sthen@openbsd.org>
2018-02-23 10:40:51 -05:00
Michal Simek
744247de29 net: Remove Xilinx ll_temac driver
ll_temac driver was used by Xilinx Microblaze big endian and
Xilinx ppc405/ppc440 SoCs.

ppc support was removed by: "powerpc: remove 4xx support"
(sha1: 98f705c9ce)
and Microblaze BE is not tested for a long time that's why this driver
can be removed because none is going to updated it to DM anyway.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-23 10:40:51 -05:00
Faiz Abbas
e293542c1f configs: am335x_evm_usbspl: Add CONFIG_SPL_NET_VCI_STRING
Add CONFIG_SPL_NET_VCI_STRING to enable USB-Ethernet boot mode
support.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-23 10:40:50 -05:00
Thierry Reding
ed5af03f9b fdt: Fixup only valid memory banks
Memory banks with address 0 and size 0 are empty and should not be
passed to the OS via device tree.

Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-02-23 10:40:50 -05:00
Bernhard Messerklinger
78b7d37b1b ns16550: Fix mem mapped endian check
Do a explicit check for CONFIG_SYS_BIG_ENDIAN and
CONFIG_SYS_LITTLE_ENDIAN to avoid errors on platforms where both
are undefined (x86).

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-02-23 10:40:50 -05:00
Bernhard Messerklinger
664758c3dd pci: Fix decode regions for memory banks
Since memory banks may not be located behind each other we need to add
them separately.

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-02-23 10:40:50 -05:00
Andrew F. Davis
4be9f1f25d defconfig: k2x_hs_evm: Re-enable TI_SECURE_DEVICE in HS K2x parts
These got removed in config re-syncs due to a Kconfig bug. Add these
back here.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-02-23 10:22:40 -05:00
Andrew F. Davis
952c346272 env: Fix missed getenv_ulong to env_get_ulong conversion
This seems to have been missed, possibly due to the inability to
enable TI_SECURE_DEVICE on Keystone2 devices previously.

Fixes: bfebc8c965 ("env: Rename getenv_hex(), getenv_yesno(), getenv_ulong()")
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-02-23 10:21:41 -05:00
Andrew F. Davis
5fbed8f2c6 ARM: Kconfig: Move TI_SECURE_DEVICE to a common area
TI_SECURE_DEVICE is used by both OMAP2+ and Keystone2 family devices,
and so when ARCH_OMAP2PLUS was used to gate off the OMAP2+ Kconfig
Keystone2 family devices lost this config option.

Move this option out of mach-omap2 Kconfig to a spot accessible by both
families. We picked arch/arm/Kconfig over the TI specific board/ti/
location as this option is not specific to our boards but rather our
architecture.

Plus at some point this option can be changed to just
SECURE_DEVICE, as having secure parts is not exclusive to TI and
so other vendors can interpret this option as needed by their device
configurations.

Fixes: a93fbf4a78 ("ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig")
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-02-23 10:21:41 -05:00
Max Filippov
10117a2985 xtensa: clean up CONFIG_SYS_TEXT_ADDR
Drop CONFIG_SYS_MEMORY_TOP. Rename CONFIG_SYS_TEXT_ADDR to
XTENSA_SYS_TEXT_ADDR.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-02-23 10:21:41 -05:00
Tom Rini
fa2c14676c configs: Re-sync with CONFIG_DISTRO_DEFAULTS
A number of platforms include config_distro_defaults.h but do not enable
CONFIG_DISTRO_DEFAULTS.  As they plainly intended to, set that flag and
re-sync config files.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-23 10:21:41 -05:00
Alexander Kochetkov
76584e3398 mmc: fix off-by-one bug in mmc_startup_v4()
MMC card with EXT_CSD_REV value 9 will trigger off-by-one
bug while accessing mmc_versions array. The patch fix that.

Signed-off-by: Alexander Kochetkov <al.kochet@gmail.com>
2018-02-23 15:57:41 +09:00
Faiz Abbas
8a856db238 mmc: Drop unnecessary case for mmc_probe()
Drop the unnecessary empty function case for mmc_probe().

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-02-23 15:56:33 +09:00
Marek Vasut
0b75cc3f13 mmc: uniphier-sd: Add compatible strings for RCar Gen2
Add DT compatible strings for RCar Gen2 SoCs, so that this driver
can bind with them. Unlike Gen3, which uses 64bit FIFO, the Gen2
uses 16bit FIFO.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-02-23 00:06:05 +01:00
Tom Rini
b2a3372138 sh: Do not provide strncmp
With modern GCC, we get warnings such as:
cmd/jffs2.c: In function 'mtdparts_init':
arch/sh/include/asm/string.h:110:38:
warning: array subscript is above array bounds [-Warray-bounds]
   : "0" (__cs), "1" (__ct), "r" (__cs+__n)
                                  ~~~~^~~~

This results in a small size reduction as well.

Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-23 00:06:05 +01:00
Jagan Teki
3d40915350 imx6q: engicam: Use SPL_LOAD_FIT for MMC boards
Currently SPL_LOAD_FIT is unable to boot from nand on
i.MX6QDL platform, so enable only for MMC boards.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-22 14:51:01 +01:00
Jagan Teki
ac738a4a7b imx6: engicam: Drop SPL_EXT_SUPPORT
i.MX6 boards still using raw MMC write for SPL and
u-boot-dtb.img along with Falcon mode configurations,
so drop filesystem based write through SPL_EXT_SUPPORT.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-22 14:40:00 +01:00
Jagan Teki
b0fcd8ef60 imx6ul: engicam: Drop isiot-mmc defconfig
Engicam Is.IoT has eMMC and NAND cpu modules where MMC
is common for both, so remove explicit mmc defconfig.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-22 14:39:45 +01:00
Breno Lima
7b889baf29 arm: imx: hab: Define HAB_RVT_BASE according to the processor version
Currently the following devices are using a different definition for ROM
Vector Table addresses:

- i.MX6DQP =  All rev
- i.MX6DQ >= rev 1.5
- i.MX6SDL >= rev 1.2

There is no need to create a new RVT macros since the only update were the
RVT base address. Remove HAB_RVT_*_NEW macros and define a new RVT base
address.

More details about RVT base address can be found on processors Reference
Manual and in the following documents:

EB803: i.MX 6Dual/6Quad Applications Processor Silicon Revision 1.2 to 1.3
Comparison

EB804: i.MX 6Solo/6DualLite Application Processor Silicon Revision 1.1
to 1.2/1.3 Comparison

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-22 14:36:06 +01:00
Utkarsh Gupta
20fa1dd386 imx: hab: Check if CSF contains deprecated commands
Write, Check and Set MID commands have been deprecated from the Code
Signing Tool (CST) v2.3.3 and will not be implemented in newer versions
of HAB, hence the following features are no longer available:

- Write Data
- Clear Mask
- Set Mask
- Check All Clear
- Check All Set
- Check Any Clear
- Check Any Set
- Set MID

The inappropriate use of Write Data command may lead to an incorrect
authentication boot flow. Since no specific application has been identified
that requires the use of any of these features, it is highly recommended to
add this check.

Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-22 14:35:57 +01:00
Utkarsh Gupta
ed286bc80e imx: hab: Check if CSF is valid before authenticating image
For proper authentication the HAB code must check if the CSF is valid.
Users must call the csf_is_valid() function to parse the CSF prior to
authenticating any additional images. The function will return a failure
if any of the following invalid conditions are met:

- CSF pointer is NULL
- CSF Header does not exist
- CSF does not lie within the image bounds
- CSF command length zero

Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-22 14:35:42 +01:00
Utkarsh Gupta
8c4037a09a imx: hab: Ensure the IVT DCD pointer is Null prior to calling HAB authenticate function.
DCD commands should only be present in the initial boot image loaded by
the SoC ROM. DCD should not be present in images that will be verified
by software using HAB RVT authentication APIs. Newer versions of HAB
will generate an error if a DCD pointer is present in an image being
authenticated by calling the HAB RVT API. Older versions of HAB will
process and run DCD if it is present, and this could lead to an incorrect
authentication boot flow.

It is highly recommended this check is in place to ensure additional HAB
verified images do not include a DCD table.

Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-22 14:35:32 +01:00
Breno Lima
669f2d189e imx: hab: Keep CAAM clock enabled after authenticating additional images
Currently it is not possible to run CMD_DEK on i.MX SPL targets:

=> dek_blob 0x12000000 0x12001000 128

The system hangs after running dek_blob because the CAAM clock is being
disabled by the HAB code. There is no need to disable CAAM clock after
authenticating additional boot images, thus keep CAAM clock enabled to
address this issue.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-22 14:35:20 +01:00
Maxim Yu. Osipov
d247cf5069 Revert "mx6: ddr: Allow changing REFSEL and REFR fields"
This reverts commit edf0093732 for
cm_fx6 iMX.6 Solo module as it causes frequent (around 10 percent of
power cycles) board's hangs.

These hangs happen in SPL when BSS is being initialized in SDRAM -
it appear that variables from BSS contain trash values which lead to board
hangs. Looks like that SDRAM doesn't yet finish initialization in these
cases.

Signed-off-by: Maxim Yu. Osipov <mosipov@ilbers.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-22 14:30:53 +01:00
Tom Rini
036c9679d2 sh: Use -m2a-nofpu only
Based on reading over the GCC manual, passing both -m2a and -m2a-nofpu
are redundant, as -m2a-nofpu will provide functional code for both.  As
-m2a-nofpu functions with more toolchains and does what is expected,
switch.

Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-21 23:42:47 +01:00
Patrick Delaunay
b0cce3f90f cmd: fastboot: Kconfig: solve config issue
When FASTBOOT is activated, only one the supported device is supported in
code at the same time
- CONFIG_FASTBOOT_FLASH_MMC_DEV
- CONFIG_FASTBOOT_FLASH_NAND_DEV

But Today the choice is not exclusive in Kconfig
and that cause Kconfig issue when :
- CONFIG_FASTBOOT, CONFIG_MMC, CONFIG_NAND are activated
- CONFIG_FASTBOOT_FLASH_MMC_DEV = 0
- CONFIG_FASTBOOT_FLASH_NAND_DEV is not activated

The patch add a choice in Kconfig to select the FLASH provider
- CONFIG_FASTBOOT_FLASH_MMC
- CONFIG_FASTBOOT_FLASH_NAND

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-02-21 20:28:15 +01:00
Marek Vasut
36dd7e7e25 dfu: tftp: Fix arm64 build warnings
Fix two build warnings when building for arm64:

drivers/dfu/dfu_tftp.c: In function ‘dfu_tftp_write’:
drivers/dfu/dfu_tftp.c:59:37: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  ret = dfu_write_from_mem_addr(dfu, (void *)addr, len);
                                     ^
and

drivers/dfu/dfu_tftp.c: In function ‘dfu_tftp_write’:
drivers/dfu/dfu_tftp.c:41:8: warning: format ‘%u’ expects argument of type ‘unsigned int’, but argument 4 has type ‘__kernel_size_t {aka long unsigned int}’ [-Wformat=]
  debug("%s: image name: %s strlen: %u\n", __func__, sb, strlen(sb));
        ^

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
2018-02-21 20:28:15 +01:00
Marek Vasut
bb4059a53b dfu: Rename _FUNCTION_DFU to DFU_OVER_
Do the following to make the symbol names less confusing.

sed -i "s/\([TU][^_]\+\)_FUNCTION_DFU/DFU_OVER_\1/g" \
	`git grep _FUNCTION_DFU | cut -d ":" -f 1 | sort -u`

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
2018-02-21 20:28:15 +01:00
Marek Vasut
0f44d33536 dfu: Fix up the Kconfig mess
Clean up the screaming mess of configuration options that DFU is.
It was impossible to configure DFU such that TFTP is enabled and
USB is not, this patch fixes that and assures that DFU TFTP and
DFU USB can be enabled separatelly and that the correct pieces
of code are compiled in.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Lukasz Majewski <lukma@denx.de>
2018-02-21 20:28:15 +01:00
Heinrich Schuchardt
462c117ce0 usb: kbd: select SYS_STDIO_DEREGISTER
If SYS_STDIO_DEREGISTER is not selected and USB_KEYBOARD is selected
U-Boot cannot be built due to missing function stdio_deregister_dev.

So USB_KEYBOARD should select SYS_STDIO_DEREGISTER.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-21 20:28:15 +01:00
Andre Heider
a64a614db7 usb: gadget: sdp: fix pointer cast warnings for 64bit archs
The SDP protocol contains multiple 32bit pointers. Add a helper function
to get a valid pointer from these values and use it.

This fixes the following warnings:

drivers/usb/gadget/f_sdp.c: In function ‘sdp_rx_data_complete’:
drivers/usb/gadget/f_sdp.c:347:10: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
   memcpy((void *)sdp->dnl_address, req->buf + 1, datalen);
          ^
drivers/usb/gadget/f_sdp.c: In function ‘sdp_jump_imxheader’:
drivers/usb/gadget/f_sdp.c:625:10: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  entry = (void *)headerv2->entry;
          ^
drivers/usb/gadget/f_sdp.c: In function ‘sdp_handle_in_ep’:
drivers/usb/gadget/f_sdp.c:668:20: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
   memcpy(&data[1], (void *)sdp_func->dnl_address, datalen);
                    ^
drivers/usb/gadget/f_sdp.c:679:31: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
   status = sdp_jump_imxheader((void *)sdp_func->jmp_address);
                               ^

Signed-off-by: Andre Heider <a.heider@gmail.com>
2018-02-21 20:28:15 +01:00
Andre Heider
24ccd0c8fd usb: gadget: sdp: add missing line breaks
Cosmetic change.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-21 20:28:15 +01:00
Jaehoon Chung
1b313aa3e3 mmc: synchronize the sequence with enum bus_mode in mmc.h
If some configs are disabled, number of freqs array will not assigned to
correct value with bus_mode.
Synchornize the ordering with enum bus_mode in mmc.h.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-21 18:04:25 +09:00
Tom Rini
f0f6917188 Prepare v2018.03-rc3
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-20 16:51:56 -05:00
Lukasz Majewski
0778e7c50b script: Make the get_default_envs.sh script working with newest u-boot
This commit fixes several issues:

- After moving env related code to ./env directory the env_common.o file
is no longer present in the system (has been replaced with built-in.o).

- Use ${OBJCOPY} if available, fallback to system default's objcopy if not
present.

- Extend the script to accept different build directory than current one.
It is extremely handy with OE usage, where source code is separated from
build.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-20 08:21:30 -05:00
Faiz Abbas
26862b4a40 env: mmc/fat/ext4: make sure that the MMC sub-system is initialized before using it
When booting from a non-MMC device, the MMC sub-system may not be
initialized when the environment is first accessed.
We need to make sure that the MMC sub-system is ready in even a non-MMC
boot case.

Therefore, initialize mmc before loading environment from it.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-02-20 08:21:30 -05:00
Tom Rini
7b1cfec317 Merge git://git.denx.de/u-boot-mmc 2018-02-19 23:01:05 -05:00
Tom Rini
d884c58f0c Merge git://git.denx.de/u-boot-dm 2018-02-19 11:39:39 -05:00
Tom Rini
ede52d0482 Merge git://git.denx.de/u-boot-ubi 2018-02-19 09:50:37 -05:00
Tom Rini
60a53351fb Merge git://git.denx.de/u-boot-i2c 2018-02-19 09:50:18 -05:00
Tom Rini
3ffa5288c8 Merge git://git.denx.de/u-boot-sh 2018-02-19 09:50:15 -05:00
Linus Walleij
116b49cfc4 vexpress: Sign up as maintainer
These ARM boards are in nice shape and still being used a lot
with e.g. QEMU, so I can maintain them.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2018-02-19 09:49:20 -05:00
Alex Kiernan
4a41fec589 mmc: Fix uninitialised priv member
When using omap_hsmmc without the device model then the allocation
of mmc->priv ends up uninitialised.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-02-19 17:00:33 +09:00
Jean-Jacques Hiblot
ace1bed327 mmc: fix bug in mmc_startup_v4()
The correspondence between mmc versions as used in u-boot and the version
numbers reported in register EXT_CSD_REV is wrong for versions above and
including MMC_VERSION_4_41. All those versions were shifted by one:
real 4.5 hardware appeared to be MMC_VERSION_5_0.

Fix this by adding the missing version in the correspondence table.

Reported-by: eil Eilmsteiner Heribert <eil@keba.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-02-19 16:59:33 +09:00
Jean-Jacques Hiblot
a0276f3eee mmc: Fix bug in sd_set_card_speed()
After settings the speed of the sd with the switch command, a check is
done to make sure that the new speed has been set. The current check has a
masking error: speed are encoded on 4 bits only.
Fix it by masking the upper bits.

This fixes a problem seen with QEmu emulating a vexpress-a15.

Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Jonathan Gray <jsg@jsg.id.au>
2018-02-19 16:59:21 +09:00
Jean-Jacques Hiblot
127a6011ee configs: dra7xx_evm/dra7xx_hs_evm: Enable MMC HS200 and SD UHS support
By default UHS and HS200 are not enabled.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
c413baa95c ARM: DRA7x/AM57x: Add MMC/SD fixups for rev1.0 and rev 1.1
Since DRA7xx/AM57xx SR1.1 and SR1.0 has errata to limit the frequency of
MMC1 to 96MHz and frequency of MMC2 to 48MHz for AM572x SR1.1, limit the
frequency and disable higher speed modes for those revision.
Also use the recommended IO delays (those tagged with "rev11")

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
e74adafb04 dts: am57xx-idk: disable HS200 support
HS200 cannot be supported on mmc2, because the IO lines of mmc2 are
connected to 3.3v.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
4db25fe7fa dts: am57xx-beagle-x15: disable UHS and HS200 support
The UHS modes are not supported in beagle-x15 because it's not possible to
switch the IO lines supply voltage to 1.8v.
Also HS200 cannot be supported on mmc2, because the IO lines of mmc2 are
connected to 3.3v.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
2adee41db9 ARM: dts: dra7: Add supported MMC/SD modes in MMC dt nodes
On DRA7 family SoCs, MMC1 controller supports SDR104,
SDR50, DDR50, SDR25 and SDR12 UHS modes.

MMC2 controller supports HS200 and DDR modes.

MMC3 controller supports SDR12, SDR25 and SDR50 modes.

MMC4 controller supports SDR12 and SDR25 modes.

Add these supported modes in device-tree file.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
6ba41e5dc3 ARM: dts: DRA7: use new dra7-specific compatible string
Use the new compatible string "ti,dra7-hsmmc" that was specifically
added for dra7 and dra72. This is required since for dra7 and dra72
processors iodelay values has to be set unlike other processors.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
2022270c7d ARM: OMAP5: set mmc clock frequency to 192MHz
Now that omap_hsmmc has support for hs200 mode, change the clock
frequency to 192MHz. Also change the REFERENCE CLOCK frequency to
192MHz based on which the internal mmc clock divider is calculated.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
04f9f8be83 mmc: omap_hsmmc: add signal voltage selection support
I/O data lines of UHS SD card operates at 1.8V when in UHS speed
mode (same is true for eMMC in DDR and HS200 modes). Add support
to switch signal voltage to 1.8V in order to support
UHS cards and eMMC HS200 and DDR modes.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
90321dce0d mmc: omap_hsmmc: allow mmc clock to be gated
mmc core has defined a new parameter *clk_disable* to gate the clock.
Disable the clock here if *clk_disable* is set.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
42182c9b9c mmc: omap_hsmmc: implement send_init_stream callback
This callback is used to send the 74 clock cycles after power up.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
3149c13ac3 mmc: omap_hsmmc: update mmc->clock with the actual bus speed
When the clock is applied, compute the actual value of the clock. It may be
slightly different from the requested value (max freq, divisor threshold)

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
bcc6bd84d4 mmc: omap_hsmmc: allow the simple HS modes to use the default pinctrl
The default configuration is usually working fine for the the HS modes.
Don't enforce the presence of a dedicated pinmux for the HS modes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
2d28eeda33 mmc: omap_hsmmc: Add support to get pinctrl values and max frequency for different hw revisions
AM572x SR1.1 requires different IODelay values to be used than that used
in AM572x SR2.0. These values are populated in device tree. Add
capability in omap_hsmmc driver to extract IOdelay values for different
silicon revision. The maximum frequency is also reduced when using a ES1.1.
To keep the ability to boot both revsions with the same dtb, those values
can be provided by the platform code.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
33c1d77f4a mmc: omap_hsmmc: Add support to set IODELAY values
The data manual of J6/J6 Eco recommends to set different IODELAY values
depending on the mode in which the MMC/SD is enumerated in order to
ensure IO timings are met.

Add support to parse mux values and iodelay values from device tree
and set these depending on the enumerated MMC mode.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
6a27333ba3 ARM: OMAP5/DRA7: Enable iodelay recalibration to be done from uboot
Add a new API to perform iodelay recalibration without isolate
io to be used in uboot.

The data manual of J6/J6 Eco recommends to set different IODELAY values
depending on the mode in which the MMC/SD is enumerated in order to
ensure IO timings are met. The MMC driver can use the new API to
set the IO delay values depending on the MMC mode.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Kishon Vijay Abraham I
2d7482cf79 mmc: omap_hsmmc: use mmc_of_parse to populate mmc_config
Use the mmc_of_parse library function to populate mmc_config instead of
repeating the same code in host controller driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:55 +09:00
Jean-Jacques Hiblot
a4efd73773 mmc: omap_hsmmc: Reduce the max timeout for reset controller fsm
>From OMAP3 SoCs (OMAP3, OMAP4, OMAP5, AM572x, AM571x), the DAT/CMD lines
reset procedure section in TRM suggests to first poll the SRD/SRC bit
until it is set to 0x1. But looks like that bit is never set to 1 and there
is an observable delay of 1sec everytime the driver tries to reset DAT/CMD.
(The same is observed in linux kernel).

Reduce the time the driver waits for the controller to set the SRC/SRD bits
to 1 so that there is no observable delay.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
2faa1a302b mmc: omap_hsmmc: Workaround for errata id i802
According to errata i802, DCRC error interrupts
(MMCHS_STAT[21] DCRC=0x1) can occur during the tuning procedure.

The DCRC interrupt, occurs when the last tuning block fails
(the last ratio tested). The delay from CRC check until the
interrupt is asserted is bigger than the delay until assertion
of the tuning end flag. Assertion of tuning end flag is what
masks the interrupts. Because of this race, an erroneous DCRC
interrupt occurs.

The suggested  workaround is to disable DCRC interrupts during
the tuning procedure which is implemented here.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
14761caeee mmc: omap_hsmmc: Add tuning support
HS200/SDR104 requires tuning command to be sent to the card. Use
the mmc_send_tuning library function to send the tuning
command and configure the internal DLL.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
9b3fc21837 mmc: omap_hsmmc: Enable DDR mode support
In order to enable DDR mode, Dual Data Rate mode bit has to be set in
MMCHS_CON register. Set it here.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
8fc238bfad mmc: omap_hsmmc: set MMC mode in the UHSMS bit field
Use the timing parameter set in the MMC core to set the
mode in UHSMS  bit field. This is in preparation for
adding HS200 support in omap hsmmc driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
b594481709 mmc: omap_hsmmc: add support to set default io voltage
"ti,dual-volt" is used in linux kernel to set the voltage capabilities.
For host controller dt nodes that doesn't have "ti,dual-volt",
it's assumed 1.8v is the io voltage. This is not always true (like in
the case of beagle-x15 where the io lines are connected to 3.3v).
Hence if "no-1-8-v" property is set, io voltage will be set to 3v.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Kishon Vijay Abraham I
48a2f11443 mmc: omap_hsmmc: cleanup omap_hsmmc_set_ios
No functional change. Move bus width configuration setting to a
separate function and invoke it only if there is a change in the
bus width.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Jean-Jacques Hiblot
5baf543e52 mmc: omap_hsmmc: cleanup clock configuration
Add a separate function for starting the clock, stopping the clock and
setting the clock. Starting the clock and stopping the clock can
be used irrespective of setting the clock (For example during iodelay
recalibration).
Also set the clock only if there is a change in frequency.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-02-19 16:58:54 +09:00
Masahiro Yamada
d4d64889b0 mmc: use pr_* log functions
Use pr_* log functions from Linux.  They can be enabled/disabled
via CONFIG_LOGLEVEL.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-19 16:56:54 +09:00
Richard Weinberger
f82290afc8 mtd: ubi: Fix worker handling
Fixes a bug found on thuban boards, which were for 2 years in
a long-term test with varying temperatures. They showed
problems in u-boot when attaching the ubi partition:

U-Boot# run flash_self_test
Booting from nand
set A...
UBI: attaching mtd1 to ubi0
UBI: scanning is finished
data abort
pc : [<87f97c3c>]          lr : [<87f97c28>]
reloc pc : [<8012cc3c>]    lr : [<8012cc28>]
sp : 85f686e8  ip : 00000020     fp : 000001f7
r10: 8605ce40  r9 : 85f68ef8     r8 : 0001f000
r7 : 00000001  r6 : 00000006     r5 : 0001f000  r4 : 85f6ecc0
r3 : 00000000  r2 : 44e35000     r1 : 87fcbcd4  r0 : 87fc755b
Flags: nZCv  IRQs off  FIQs on  Mode SVC_32
Resetting CPU ...

Reason is, that accidentially the U-Boot implementation
from __schedule_ubi_work() did not check the flag
ubi->thread_enabled and started with wearleveling work,
but ubi did not have setup all structures at this point
and crashes.

Solve this problem by splitting work scheduling and processing.

Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Heiko Schocher <hs@denx.de>
2018-02-19 08:22:58 +01:00
Stefan Mavrodiev
004b4cdaec i2c: mvtwsi.c: Fix set speed
Previous patch for this driver breaks i2c initialization.

commit 8bcf12ccce ("i2c: mvtwsi.c: Avoid NULL dereference")

If actual_speed is passed as NULL in this function:
static void __twsi_i2c_init(struct mvtwsi_registers *twsi, int speed,
			    int slaveadd, uint *actual_speed)
than __twsi_i2c_set_bus_speed never get called. This causes i2c clock
to run on default speed - 2MHz (measured with oscilloscope). This is issue
on some boards, sunxi for example, since on I2C0 bus PMU is connected.

The bootlogs with and without the patch are as follows:

Wihtout the patch:
U-Boot SPL 2018.03-rc2 (Feb 13 2018 - 09:23:17 +0200)
DRAM: 1024 MiB
Failed to set core voltage! Can't set CPU frequency
Trying to boot from FEL

U-Boot 2018.03-rc2 (Feb 13 2018 - 09:23:17 +0200) Allwinner Technology

CPU:   Allwinner A20 (SUN7I)
Model: Olimex A20-OLinuXino-LIME2
I2C:   ready
DRAM:  1 GiB
MMC:   SUNXI SD/MMC: 0

With the patch:
U-Boot SPL 2018.03-rc2-00001-g838ff85 (Feb 13 2018 - 09:24:34 +0200)
DRAM: 1024 MiB
CPU: 912000000Hz, AXI/AHB/APB: 3/2/2
Trying to boot from FEL

U-Boot 2018.03-rc2-00001-g838ff85 (Feb 13 2018 - 09:24:34 +0200) Allwinner Technology

CPU:   Allwinner A20 (SUN7I)
Model: Olimex A20-OLinuXino-LIME2
I2C:   ready
DRAM:  1 GiB
MMC:   SUNXI SD/MMC: 0

Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2018-02-19 08:21:38 +01:00
Mario Six
c6b89f3180 sandbox: Add 64-bit sandbox
To debug device tree issues involving 32- and 64-bit platforms, it is useful to
have a generic 64-bit platform available.

Add a version of the sandbox that uses 64-bit integers for its physical
addresses as well as a modified device tree.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Added CONFIG_SYS_TEXT_BASE to configs/sandbox64_defconfig
Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-18 15:53:48 -07:00
Simon Glass
995b60b593 sandbox: Rename 'num-gpios' property to avoid dtc warning
At present dtc produces these warnings when compiling sandbox:

arch/sandbox/dts/test.dtb: Warning (gpios_property):
	Could not get phandle node for /base-gpios:num-gpios(cell 0)
arch/sandbox/dts/test.dtb: Warning (gpios_property):
	Missing property '#gpio-cells' in node /reset-ctl or bad phandle
	(referred from /extra-gpios:num-gpios[0])

Both are due to it assuming that the 'num-gpios' property holds a phandle
pointing to a GPIO node.

To avoid these warnings, rename the sandbox property so that it does not
include the string 'gpios'.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-18 15:53:32 -07:00
Simon Glass
7e87816caa sandbox: Correct dtc warning in /chosen node
At present dtc produces these warnings when compiling sandbox:

arch/sandbox/dts/test.dtb: Warning (reg_format): "reg" property in /chosen/chosen-test has invalid length (8 bytes) (#address-cells == 2, #size-cells == 1)
arch/sandbox/dts/test.dtb: Warning (avoid_default_addr_size): Relying on default #address-cells value for /chosen/chosen-test
arch/sandbox/dts/test.dtb: Warning (avoid_default_addr_size): Relying on default #size-cells value for /chosen/chosen-test

Add the missing properties to avoid this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: f200680 (dm: core: parse chosen node)
2018-02-18 12:53:38 -07:00
Thierry Reding
6d29cc7dcf fdt: Fixup only valid memory banks
Memory banks with address 0 and size 0 are empty and should not be
passed to the OS via device tree.

Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2018-02-18 12:53:38 -07:00
Alexey Brodkin
4280342adb fdt: Implement weak arch_fixup_fdt()
Only ARM and in some configs MIPS really implement arch_fixup_fdt().
Others just use the same boilerplate which is not good by itself,
but what's worse if we try to build with disabled CONFIG_CMD_BOOTM
and enabled CONFIG_OF_LIBFDT we'll hit an unknown symbol which was
apparently implemented in arch/xxx/lib/bootm.c.

Now with weak arch_fixup_fdt() right in image-fdt.c where it is
used we get both items highlighted above fixed.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: York Sun <york.sun@nxp.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-02-18 12:53:38 -07:00
Fabio Estevam
04a03b240f mx6sabresd: Select the CONFIG_EFI_PARTITION option
With fastboot support enabled, it is useful to be able to list
the eMMC EFI partitions, so select the CONFIG_EFI_PARTITION option.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-18 12:43:51 +01:00
Stefano Babic
0fb1a8a469 mx6: fix MAINTAINERS for Engicam i.CoreM6 1.5 MIPI
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jagan Teki <jagan@amarulasolutions.com>
2018-02-18 12:42:41 +01:00
Marek Vasut
5abcbd7847 net: sh_eth: Fix DT base address fetching
Drop the whole map/unmap_physmem stuff and just use the address
already obtained from DT in ofdata_to_platdata(), instead of
repeating that, wrongly, in probe.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-18 11:20:18 +01:00
Marek Vasut
5262767ded net: sh_eth: Fix checkpatch warning
Fix minor checkpatch warning about udelay(3000) being too long
and should be replaced by mdelay(3).

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-18 11:20:18 +01:00
Marek Vasut
60279b5757 net: sh_eth: Return directly from sh_eth_recv_start
Drop the len variable, it's useless.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-18 11:20:18 +01:00
Marek Vasut
3c5a7b7547 net: sh_eth: Zap port variable
Inline this variable which is quite useless.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-18 11:20:17 +01:00
Tom Rini
02b0895c21 Merge git://git.denx.de/u-boot-sh 2018-02-17 16:06:59 -05:00
Marek Vasut
25f6dc8955 ARM: rmobile: Fix broken reset code on Porter
The 'reset' command did not work on Porter because the reset code
was accessing the wrong PMIC address over broken I2C bus driver.
Replace the code with DM-aware code and fix up the PMIC address.
This makes the 'reset' command work again.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 22:00:25 +01:00
Marek Vasut
a6e50da0d5 ARM: rmobile: Replace SH I2C with IIC on Porter
Get rid of the SH I2C driver on Porter and enable the IIC driver
instead . The old SH I2C is completely broken on Porter anyway
and the DM/DT capable IIC driver allows access to the PMIC too.
Use the DM/DT capable driver instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 22:00:25 +01:00
Marek Vasut
88306dbb5a ARM: dts: rmobile: Enable I2C6 on Porter
Enable I2C6 bus on Porter to access the PMIC , ie. to reset the board.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:22 +01:00
Marek Vasut
f51155eced i2c: rcar_iic: Allow IIC on RCar Gen2
The IIC on Gen2 is compatible with this driver as well, allow it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:22 +01:00
Marek Vasut
7b8eeb4060 ARM: rmobile: Set FDT/initramfs limits on Porter
Set those limits to inform U-Boot about FDT and initramfs placement.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:22 +01:00
Marek Vasut
a05dab4e76 ARM: rmobile: Enable convenient commands on Porter
Enable cache and time commands, which are convenience tools for
doing benchmarks and various boot tests. Also enable FIT support
for booting fitImage.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:21 +01:00
Marek Vasut
cd07358c04 ARM: rmobile: Reset ethernet PHY
Toggle the PHY reset GPIO to bring the ethernet PHY out of reset properly.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
NOTE: This should be moved to the SH ethernet driver, but it's quite
      late in the cycle, so this is something to be done in 2018.05.
2018-02-17 21:59:21 +01:00
Marek Vasut
8a41f68870 ARM: dts: rmobile: Move the u-boot,dm-pre-reloc into u-boot DTS on porter
Fix ommission where the u-boot,dm-pre-reloc DT bit was pulled into the
common DT, not the U-Boot specific DT part. Move it to U-Boot DT part.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-17 21:59:20 +01:00
Tom Rini
bd650cd404 Merge git://git.denx.de/u-boot-sh 2018-02-16 13:56:02 -05:00
Tom Rini
7961b9f6db Merge git://git.denx.de/u-boot-socfpga 2018-02-16 13:55:51 -05:00
Tom Rini
fee626c449 Merge git://git.denx.de/u-boot-usb 2018-02-16 13:55:41 -05:00
Goldschmidt Simon
b2cdef4861 env: restore old env_get_char() behaviour
With multiple environments, the 'get_char' callback for env
drivers does not really make sense any more because it is
only supported by two drivers (eeprom and nvram).

To restore single character loading for these drivers,
override 'env_get_char_spec'.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-02-16 11:12:42 -05:00
York Sun
e1caa5841e env: Fix env_load_location
Commit 7d714a24d7 ("env: Support multiple environments") added
static variable env_load_location. When saving environmental
variables, this variable is presumed to have the value set before.
In case the value was set before relocation and U-Boot runs from a
NOR flash, this variable wasn't writable. This causes failure when
saving the environment. To save this location, global data must be
used instead.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-02-16 11:12:41 -05:00
Marek Vasut
5b6ae550a8 ARM: rmobile: Enable autocompletion on Gen2
This makes the shell so much more pleasant to use, so enable it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:11 +01:00
Marek Vasut
7ee37d0e0c ARM: rmobile: Convert Porter to SPL
Due to size limitations of the MERAM, switch U-Boot to SPL.
The SPL is loaded by the SPI_LOADER into MERAM and then loads
U-Boot proper into DRAM. This way U-Boot can freely grow in
size in DRAM, as there is plenty of it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
NOTE: To update U-Boot, first install u-boot.img to 0x140000 in SPI NOR,
      then use the Minimon to flash u-boot-spl.srec using ls,2,e6304000.
      To generate u-boot-spl.srec, use objcopy:
        arm-linux-gnueabi-objcopy -O srec spl/u-boot-spl u-boot-spl.srec
2018-02-16 16:43:11 +01:00
Marek Vasut
8a8d300005 ARM: dts: rmobile: Make PFC and RST available before reloc
Those two nodes are needed to configure pinmux before relocation
and to configure clock before relocation, since CPG/MSSR needs
access to RST node. This is not noticable on Gen3, but on Gen2
this causes problems in SPL if they are not available early.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:11 +01:00
Marek Vasut
ccb947f2ce ARM: dts: rmobile: Make scif0 available before reloc on Porter
Make the SCIF available before relocation and in SPL on R8A7791 Porter.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:11 +01:00
Marek Vasut
5c44ddcb13 serial: Replace CONFIG_ with CONFIG_IS_ENABLED
Cosmetic change, replace CONFIG_* with CONFIG_IS_ENABLED(*) .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:10 +01:00
Marek Vasut
974147b437 ARM: rmobile: Enable autocompletion on Gen3
This makes the shell so much more pleasant to use, so enable it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:09 +01:00
Marek Vasut
74caed0e33 ARM: rmobile: Enable DTO support on Gen3
Enable support for applying DT overlays on Gen3. This is convenient
for handling extra additional hardware, like ie. the Kingfisher.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:09 +01:00
Marek Vasut
d64c789414 net: ravb: Initialize PHY in probe() once
Reset and initialize the PHY once in the probe() function rather than
doing it over and over again is start() function. This requires us to
keep the clock enabled while the driver is in use. This significantly
reduces the time between transfers as the PHY doesn't have to restart
autonegotiation between transfers, which takes forever.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-02-16 16:43:09 +01:00
Marek Vasut
fd5577ce26 clk: rmobile: Assure SD-IF clock are configured correctly
The SD driver calls clk_set_rate() before clk_enable(), yet clk_set_rate()
implementation in the clock driver does not set the SD-IF divider. Fix it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-02-16 16:43:09 +01:00
Tom Rini
32fe36574e Merge git://git.denx.de/u-boot-arc 2018-02-15 14:07:04 -05:00
Alexander Graf
f116634cd1 RPi: Add myself as board maintainer
Commit 958d55f26c ("MAINTAINERS: Take over BCM2835 maintainership") put
me in as maintainer for the RPi soc, but forgot to update the board
MAINTAINERS file.

Add me there too.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-15 10:08:14 -05:00
Simon Goldschmidt
fef4a545b6 arm: socfpga: use imply instead of select where applicable
Kconfig should only 'select' features that are required for an arch.
Standard features that can be disabled without breaking board support
should use 'imply' instead, to allow users to disable it.

These options are changed for mach-socfpga:
- DM_SPI & DM_SPI_FLASH: only required with QSPI support enabled
- SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION: the boot rom supports a
  partitionless mode also, where SPL is located at address 0
- HW_WATCHDOG: while all mainline board defconfigs use it, U-Boot
  should still work without it.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-15 13:45:16 +01:00
Lukasz Majewski
21a9f435f3 Convert socfpga: select CONFIG_HW_WATCHDOG support for ARCH_SOCFPGA
All Socfpga boards from ./include/configs/socfpga_* define
CONFIG_HW_WATCHDOG.
To ease CONFIG_HW_WATCHDOG conversion to Kconfig select it in
config ARCH_SOCFPGA (arch/arm/Kconfig) section.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-15 13:45:16 +01:00
Simon Goldschmidt
a6fbf94550 arm: socfpga: fix qspi flash compatible (add "spi-flash")
This patch adds "spi-flash" to the compatible list of the qspi flash
chip for all socfpga boards. This is required to make qspi work on
these boards on top of the recent fixes. Without the "spi-flash"
compatible string for the flash chip, the speed cannot be read and a
speed of 0Hz is used (which results in a divide-by-zero on these
boards).

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-15 13:45:15 +01:00
Alexey Brodkin
d53b128df4 arc: Fix final linkage with Elf32 tools
ARC Elf32 tools by default enable usage of so-called "small data"
section or in ARC PRM parlance "GP-relative addressing".

The idea is to put up to 2kB of frequently used data into a separate
location and use indirect addressing via dedicated core register (GP).
Where GP is used as a base for offset calculation.

And so if "-msdata" toggle is passed to the compiler either explicitly
or implicitly (that's Elf32 tools case) it will try to put some data
in that "small data" area and then to calculate real offset from GP
to be encoded in instructions we need to know the base value which
liker gets from __SDATA_BEGIN__ symbol in hte linker script.

In U-Boot we don't use that feature and linker script doesn't define
__SDATA_BEGIN__ which gives us the following linkage error if we use
Elf32 tools:
------------------------->8-------------------
  LD      u-boot
.../bin/arc-elf32-ld.bfd: Error: Linker symbol __SDATA_BEGIN__ not found
.../bin/arc-elf32-ld.bfd: final link failed: Bad value
------------------------->8-------------------

Note if uClibc or glibc tools are used that problem doesn't happen
because usage of "small data section" is disabled by default as not very
useful for bigger executables. Moreover GP is just another name of r26
so we're loosing 1 core register which is not used by the compiler as a
generic register with "-msdata".

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-02-15 15:44:47 +03:00
Faiz Abbas
b16c129c22 usb: host: xhci-omap: Remove redundant board_usb_init and board_usb_cleanup functions
board_usb_init()/_cleanup() should be in board files and don't have
a place in the xhci-omap driver. Weak versions for
board_usb_init()/_cleanup() already exist in common/usb.c
(for host mode) and drivers/usb/gadget/g_dnl.c (for gadget mode).

Therefore, remove init and cleanup functions from xhci-omap and
implement them in the board files.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-02-15 13:44:30 +01:00
Alexey Brodkin
163f8858ae usb: dwc2: Rename CONFIG_DWC2_UTMI_PHY_WIDTH to CONFIG_DWC2_UTMI_WIDTH
For some reason from day one we used to have both CONFIG_DWC2_UTMI_WIDTH
mentioned in dwc2.h and in scripts/config_whitelist.txt but never really used
and CONFIG_DWC2_UTMI_PHY_WIDTH used in real code in dwc2.c (but never
defined).

Moreover even though CONFIG_DWC2_UTMI_WIDTH might be either 8 or 16
depending on hardware (and the same is said in a comment for it in
dwc2.h) but then 8 is hardcoded in the header leaving no ability to
override this value in board's configuration.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Marek Vasut <marex@denx.de>
2018-02-15 13:44:27 +01:00
Lukasz Majewski
04e2cead60 Convert CONFIG_SYS_BOOTCOUNT_SINGLEWORD to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_BOOTCOUNT_SINGLEWORD

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Ian Ray <ian.ray@ge.com>
2018-02-15 07:20:53 -05:00
Lukasz Majewski
d1ec9461f2 Convert CONFIG_BOOTCOUNT_LIMIT to Kconfig
This converts the following to Kconfig:
   CONFIG_BOOTCOUNT_LIMIT

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Tested-by: Alex Kiernan <alex.kiernan@gmail.com>
Reviewed-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Acked-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
2018-02-15 07:20:53 -05:00
Tom Rini
0c502b6c17 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-14 21:34:50 -05:00
Tom Rini
ac727577f0 Revert "drivers/ddr/fsl: Dual-license DDR driver"
Upon further review, not all code authors are in favour of this change.
This reverts commit ee3556bcaf.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-14 21:34:05 -05:00
Simon Goldschmidt
d693742b25 spl: unbreak CONFIG_SPL_MULTI_DTB_FIT after fixing CONFIG_OF_EMBED
With commit 9bd76b8076 ("spl: make CONFIG_OF_EMBED pass dts through
fdtgrep"), CONFIG_SPL_MULTI_DTB_FIT has been broken because
cmd_fdtgrep was now unknown in scripts/Makefile.spl after moving
it to dts/Makefile. This bug has been introduced with v2018.01.

This patch moves cmd_fdtgrep from dts/Makefile to scripts/Makefile.lib
and includes scripts/Makefile.lib in scripts/Makefile.spl.

Fixes: 9bd76b8076 ("spl: make CONFIG_OF_EMBED pass dts through fdtgrep")
Reported-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-02-14 12:14:16 -05:00
Heinrich Schuchardt
0c3fecd0bf cmd: scsi: move CMD_SCSI to device access commands
Configuration option CMD_SCSI should be placed in the same submenu as
CMD_SATA and CMD_MMC.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-14 12:14:16 -05:00
Andre Heider
678382c73a arm/PSCI: support PSCI versions greater than 1.0
ATF recently began announcing PSCI v1.1. Since that version is unknown
to u-boot, the PSCI device nodes were not updated.

Switch from the case statement to a greater/less-than comparison so that
v1.1, as well as future versions, get at least the compatible nodes of
known versions.

PSCI v1.1 doesn't seem to have introduced a new corresponding compatible.

Signed-off-by: Andre Heider <a.heider@gmail.com>
2018-02-14 12:14:15 -05:00
Alex Kiernan
d877a6c50e Fix --noheader on fw_printenv
The single argument `--noheader' is expecting isn't taken from getopt
parsing, but instead from the remaining argv arguments.

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-14 12:14:15 -05:00
Sam Protsenko
beffc170f2 am335x_evm: Consolidate eMMC partitions with DFU info
>From DFU_ALT_INFO_EMMC (include/environment/ti/dfu.h) we can see that
rootfs will be flashed to second partition on eMMC. But at the moment we
have only one partition in $partitions environment variable. Let's add
"bootloader" partition prior to "rootfs", so that DFU works correctly.
This also fixes eMMC boot, which looks for rootfs on second partition.

"bootloader" partition start corresponds to "u-boot.img.raw" in DFU
eMMC info, which is 0x300 sector (384 KiB offset from eMMC start).

rootfs start address can be also found from DFU eMMC info.
bootloader-related area is finished at 0x1500 sector (2688 KiB offset
from eMMC start). This should be the start address for rootfs in
$partitions environment variable.

While at it, fix U-Boot environment address to be the same as for
AM57x EVM, so that it doesn't clash with other partitions.

So now eMMC layout looks like this:

    ===============================================================

    0       +------------------------+
            | MBR/GPT header         |   128           -
    128     +------------------------+
            | MLO                    |   256           -
    384     +------------------------+
            | u-boot.img             |   1792          bootloader
    2176    +------------------------+
            | //////// hole //////// |   256           -
    2432    +------------------------+
            | U-Boot environment     |   128           -
    2560    +------------------------+
            | U-Boot environment     |   128           -
            | (redundant)            |
    2688    +------------------------+
            | rootfs                 |   remaining     rootfs
    end     +------------------------+

    ===============================================================

"hole" area can be used further for storing U-Boot environment (like
it's done in AM57x EVM config file) or for increasing u-boot.img area
(in case u-boot.img size increased, e.g. if new dtbs were added).

This commit conforms with Linux partition table from f6d245b8c5
("arm: am57xx: Fix Linux boot from eMMC") commit, making things in
uniform way.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-14 12:14:14 -05:00
Tom Rini
75670c81e4 configs: Migrate CONFIG_SPL_FRAMEWORK
Migrate the option CONFIG_SPL_FRAMEWORK and make this gate most of the
current set of options we have in Kconfig.  We will need to have some
options available for SPL and !SPL_FRAMEWORK so this is important.  In a
few cases we re-order existing options so that we have less escapes from
the SPL_FRAMEWORK guard.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-14 12:14:13 -05:00
Tom Rini
7a88afd080 configs: Drop unused CONFIG_SPL_MMC_MINIMAL
The option CONFIG_SPL_MMC_MINIMAL is unused in code, drop it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-14 12:14:13 -05:00
Faiz Abbas
d8aed6fae8 configs: am335x_evm: Add DYNAMIC_CRC_TABLE
Add CONFIG_DYNAMIC_CRC_TABLE to am335x_evm_defconfig to reduce the
size of the image.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-02-14 12:14:12 -05:00
Faiz Abbas
36c1877c5c lib: Kconfig: Move DYNAMIC_CRC_TABLE to Kconfig
Add CONFIG prefix to DYNAMIC_CRC_TABLE and implement it in
Kconfig.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-02-14 12:14:11 -05:00
Faiz Abbas
7e63ba2f49 configs: am335x_evm: Disable ISO and EFI partitions in SPL
ISO and EFI partition configs in SPL are selected by default.
However, they are not being used.

Therefore, remove ISO and EFI partition support in SPL.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-14 12:05:55 -05:00
Simon Goldschmidt
7d531e8a4f arm: update Kconfig help for ENABLE_ARM_SOC_BOOT0_HOOK
When this config is enabled, <asm/arch/boot0.h> is included,
but the Kconfig help says this should be a define
(ARM_SOC_BOOT0_HOOK).

The code for this in arch/arm/lib/vectors.s was changed on
01/02/2017 with commit ce62e57fc5 ("ARM: boot0 hook: remove macro,
include whole header file").

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-13 23:24:22 -05:00
Masahiro Yamada
6becd9de6b ARM: image: indent with tab instead of 4 spaces
Commit 6808ef9ac2 ("move booti_setup to arch/arm/lig/image.c")
not only moved the code, but also replaced a tab with 4 spaces
to break the Linux coding style.

Restore tab indentation.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Chen <bin.chen@linaro.org>
2018-02-13 23:24:22 -05:00
Masahiro Yamada
bf14d9a7e1 cmd: booti: fix invalid image address in debug message
With commit 6808ef9ac2 ("move booti_setup to arch/arm/lig/image.c"),
images->ep has not been set at this point.

Fixes: 6808ef9ac2 ("move booti_setup to arch/arm/lig/image.c")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Chen <bin.chen@linaro.org>
2018-02-13 23:24:22 -05:00
Heinrich Schuchardt
0850d7f7bf efi_driver: comment struct efi_driver_ops
Provide description for struct efi_driver_ops.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-13 23:24:22 -05:00
Heinrich Schuchardt
80ee4fc504 dm: core: fix typo in comment (device.h)
%s/Indentiies/Identifies/g

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-13 23:24:22 -05:00
Simon Goldschmidt
9095d5b894 fix spelling of 'functions' in 2 places (was 'funtcions')
Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-02-13 23:24:22 -05:00
Tom Rini
34a5c4257a SystemACE: Remove
This driver is no longer used on any supported platform in U-Boot and
there is no interest in maintaining it further from people that have
used it historically.

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
c: Alexey Brodkin <alexey.brodkin@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2018-02-13 23:24:22 -05:00
Tuomas Tynkkynen
fbca0e66cc spi: Migrate CONFIG_CF_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
4a942f49b8 spi: Migrate CONFIG_KIRKWOOD_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
2c4b096b4c spi: Migrate CONFIG_LPC32XX_SSP to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
bbdf38698e spi: Migrate CONFIG_MPC8XXX_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
60e5456291 spi: Migrate CONFIG_MXC_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:01:44 -05:00
Tuomas Tynkkynen
7b819b569e spi: Migrate CONFIG_MXS_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:00:53 -05:00
Tuomas Tynkkynen
a5dfabea19 spi: Migrate CONFIG_SH_QSPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:00:47 -05:00
Tuomas Tynkkynen
95d3877a58 spi: Migrate CONFIG_SH_SPI to Kconfig
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-13 23:00:29 -05:00
Max Filippov
4d69009462 .travis.yml: test xtensa xtfpga board in QEMU
This allows running tests on emulated KC705 board with DC233C xtensa
core. It expects to find conf.xtfpga_qemu in the uboot-test-hooks.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-02-13 23:00:29 -05:00
Max Filippov
64c26fee05 xtfpga: enable hush parser
Remove CONFIG_BOOT_RETRY_TIME as it doesn't do much good and enable
CONFIG_HUSH_PARSER in xtfpga_defconfig.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-02-13 23:00:29 -05:00
Max Filippov
b6f3a12ef8 .travis.yml: download xtensa prebuilt toolchain
xtensa toolchains are core-specific, so give full toolchain name and
download corresponding prebuilt toolchain from the github release.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2018-02-13 23:00:29 -05:00
Bin Meng
244ce78a04 microblaze: bootm: Fix compiler warning
Fix build warning in arch/microblaze/lib/bootm.c with gcc 7.3.0:

  warning: this 'if' clause does not guard... [-Wmisleading-indentation]

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2018-02-13 20:34:07 -05:00
Bin Meng
d679a529a4 arm: omap2: Fix compiler warning
Fix build warning in arch/arm/mach-omap2/emif-common.c and
arch/arm/mach-omap2/omap4/emif.c with gcc 7.3.0:

  warning: duplicate 'const' declaration specifier [-Wduplicate-decl-specifier]

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-13 20:34:07 -05:00
Bin Meng
e48be29ef3 video: ivybridge_igd: Fix compiler warning
Fix build warning in drivers/video/ivybridge_igd.c with gcc 7.3.0:

  warning: 'ivb_pm_gt2' defined but not used [-Wunused-const-variable=]

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-13 20:34:07 -05:00
Marek Vasut
175c3e3ade tftp: update: Include missing cfi_flash.h header
Add the missing header, otherwise CONFIG_SYS_MAX_FLASH_BANKS
may be undeclared.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2018-02-13 20:34:07 -05:00
Marek Vasut
b254c5291d cmd: fitupd: Convert CONFIG_UPDATE_TFTP and co.
Convert the CONFIG_UPDATE_TFTP and related symbols to Kconfig.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2018-02-13 20:34:07 -05:00
Marek Vasut
ac08432a4c cmd: fitupd: Convert CONFIG_CMD_FITUPD
Convert the CONFIG_CMD_FITUPD symbol to Kconfig.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
2018-02-13 20:34:07 -05:00
Tom Rini
85f855cf02 Merge git://git.denx.de/u-boot-rockchip 2018-02-13 10:51:00 -05:00
Philipp Tomsich
a5af51a703 spl: fit: move fdt_record_loadable out of ARCH_FIXUP_FDT_MEMORY guard
The fdt_record_loadable()-function was wedged between other functions
that were guarded by ARCH_FIXUP_FDT_MEMORY.  This could lead to linker
errors on some configurations.

With this change, fdt_record_loadable() is moved out of the
ARCH_FIXUP_FDT_MEMORY guard (plus I tried to retain alphabetical
ordering for functions by placing it appropriately).

References: 9f45aeb ("spl: fit: implement fdt_record_loadable")
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reported-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
2018-02-13 12:52:57 +01:00
Heinrich Schuchardt
6e5308c4b8 rockchip: gpio: remove dead code
In the following statements
if (a) return a; if (a) return c;
the second return can never be executed.

Identified by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-02-13 12:52:47 +01:00
Tom Rini
ebdb098c67 Prepare v2018.03-rc2
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-12 18:52:31 -05:00
Alex Kiernan
cda87ec558 Fix misaligned buffer in env_fat_save
When saving the environment on a platform which has DMA alignment
larger than the natural alignment, env_fat_save triggers a debug
message in file_fat_write:

  Saving Environment to FAT... writing uboot.env
  FAT: Misaligned buffer address (9df1c8e0)
  OK

Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
2018-02-12 15:31:18 -05:00
Tom Rini
f3177d02f3 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-02-12 12:08:32 -05:00
Tom Rini
278b90ce78 configs: Migrate CONFIG_SYS_TEXT_BASE
On the NIOS2 and Xtensa architectures, we do not have
CONFIG_SYS_TEXT_BASE set.  This is a strict migration of the current
values into the defconfig and removing them from the headers.

I did not attempt to add more default values in and for now will leave
that to maintainers.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-11 09:30:09 -05:00
Tom Rini
7c8f00e484 configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-10 20:29:02 -05:00
Tom Rini
f59ab6c659 Merge tag 'signed-efi-v2018.03' of git://github.com/agraf/u-boot
Patch queue for efi in 2018.03 - 2018-02-10

This time we have a few important bug fixes. Most noticable are:

  - Fix OpenBSD loader with CONFIG_BLK=n
  - Fix builds on various circumstances
  - Add missing stubs so callers don't call NULL
  - Bump UEFI revision to 2.7
2018-02-10 17:04:13 -05:00
Heinrich Schuchardt
df9cf561b0 efi_loader: correct efi_disk_register
efi_disk_register should return as status code (efi_status_t).

Disks with zero blocks should be reported as 'not ready' without throwing
an error.

This patch solves a problem running OpenBSD on system configured with
CONFIG_BLK=n (e.g. i.MX6).

Reported-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Jonathan Gray <jsg@jsg.id.au>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:25:49 +01:00
Heinrich Schuchardt
0c2307431e efi_loader: add missing runtime services stubs
Add stubs for UpdateCapsule, QueryCapsuleCapabilities, and
QueryVariableInfo.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:25:49 +01:00
Heinrich Schuchardt
f3b5056c4e efi_loader: split README.efi into two separate documents
README.efi describes two different concepts:
* U-Boot exposing the UEFI API
* U-Boot running on top of UEFI.

This patch splits the document in two.
Religious references are removed.

The separation of the concepts makes sense before detailing the internals
of U-Boot exposing the UEFI API in a future patch.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:24:00 +01:00
Heinrich Schuchardt
038782a27a efi_driver: return type of efi_driver_init()
Change the return type of efi_driver_init() to efi_status_t.

efi_driver_init() calls efi_add_driver() which returns an efi_status_t
value. efi_driver_init() should not subject this value to a conversion to
int losing high bits on 64bit systems.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:24:00 +01:00
Heinrich Schuchardt
f19a95a40b efi_loader: do not use 2.0.5 as UEFI revision number
Currently the UEFI revision number in the system table header is set to
2.0.5. This version number does not refer to any existing version of the
UEFI standard.

Set the revision number to 2.7.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:24:00 +01:00
Heinrich Schuchardt
9f0930e5d9 efi_loader: create stub for CreateEventEx
Currently we set the function pointer for the CreateEventEx boot service
to NULL. When called this would lead to an immediate failure.

A function stub is provided which handles the case that the boot service
is called without an event group and returns EFI_UNSUPPORTED otherwise.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:24:00 +01:00
Heinrich Schuchardt
ae86b6be12 efi_selftest: use correct compiler flags for miniapps
For EFI binaries we need special CFLAGS.

They were specified for an object file that since has been replaced.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:24:00 +01:00
Heinrich Schuchardt
f623e07f0c efi_loader: fix the online help for bootefi bootmgr
The bootefi command is missing in the online help for
bootefi bootmgr.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:24:00 +01:00
Heinrich Schuchardt
268ec6e00e efi_loader: fix building crt0 on arm
Before the patch an undefined constant EFI_SUBSYSTEM was used in the
crt0 code. The current version of binutils does not swallow the error.

https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=888403

The necessary constant IMAGE_SUBSYSTEM_EFI_APPLICATION is already
defined in pe.h. So let's factor out asm-generic/pe.h for the
image subsystem constants and use it in our assembler code.

IMAGE_SUBSYSTEM_SAL_RUNTIME_DRIVER does not exist in the specification
let's use IMAGE_SUBSYSTEM_EFI_ROM instead.

The include pe.h is only used in code maintained by Alex so let him be the
maintainer here too.

Reported-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-02-10 00:24:00 +01:00
York Sun
ee3556bcaf drivers/ddr/fsl: Dual-license DDR driver
To make this driver easier to be reused, dual-license DDR driver.

Signed-off-by: York Sun <york.sun@nxp.com>
CC: Simon Glass <sjg@chromium.org>
CC: Tom Rini <trini@konsulko.com>
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
CC: Thomas Schaefer <thomas.schaefer@kontron.com>
CC: Masahiro Yamada <yamada.masahiro@socionext.com>
CC: Robert P. J. Day <rpjday@crashcourse.ca>
CC: Alexander Merkle <alexander.merkle@lauterbach.com>
CC: Joakim Tjernlund <joakim.tjernlund@transmode.se>
CC: Curt Brune <curt@cumulusnetworks.com>
CC: Valentin Longchamp <valentin.longchamp@keymile.com>
CC: Wolfgang Denk <wd@denx.de>
CC: Anatolij Gustschin <agust@denx.de>
CC: Ira W. Snyder <iws@ovro.caltech.edu>
CC: Marek Vasut <marek.vasut@gmail.com>
CC: Kyle Moffett <Kyle.D.Moffett@boeing.com>
CC: Sebastien Carlier <sebastien.carlier@gmail.com>
CC: Stefan Roese <sr@denx.de>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Paul Gortmaker <paul.gortmaker@windriver.com>
CC: Peter Tyser <ptyser@xes-inc.com>
CC: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
2018-02-09 08:36:40 -08:00
Zhao Qiang
990d06b0bc PowerPC: phy: enable all phylib drivers when use phylib and tsec enet
config_phylib_all_drivers.h should be included when CONFIG_PHYLIB and
CONFIG_TSEC_ENET are defined.

Fixes: 3146f0c017 ("Move PHYLIB to Kconfig")
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-02-09 08:35:59 -08:00
Lukas Auer
dfaec76029 crypto/fsl: instantiate all rng state handles
Extend the instantiate_rng() function and the corresponding CAAM job
descriptor to instantiate all RNG state handles. This moves the RNG
instantiation code in line with the CAAM kernel driver.

Previously, only the first state handle was instantiated. The second
one was instantiated by the CAAM kernel driver. This works if the
kernel runs in secure mode, but fails in non-secure mode since the
kernel driver uses DEC0 directly instead of over the job ring
interface. Instantiating all RNG state handles in u-boot removes the
need for using DEC0 in the kernel driver, making it possible to use
the CAAM in non-secure mode.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-02-09 08:34:34 -08:00
Vinitha Pillai-B57223
c883f351e6 armv8: ls1012ardb: Add distro secure boot support
Enable validation of boot.scr script prior to its execution dependent
on "secureboot" flag in environment. Enable fall back option to
qspi boot in case of secure boot.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Signed-off-by: Vinitha Pillai <vinitha.pillai@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-02-09 08:34:33 -08:00
Sriram Dash
30cf7f818d armv8: Remove dependency of SERDES for LSCH2 and LSCH3
Remove dependency of SYS_HAS_SERDES for Layerscape Chasis 2 and
Layerscape Chasis 3.

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-02-09 08:33:21 -08:00
Rajat Srivastava
ccd6849031 armv8: ls1088a: qspi: Enable XIP mode above 16 MB addresses
Currently in LS1088A, XIP mode in QSPI works up to 16 MB
addresses. This patch enables QSPI support in XIP mode for
addresses above 16 MB as well.

Signed-off-by: Rajat Srivastava <rajat.srivastava@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-02-09 08:33:21 -08:00
Hou Zhiqiang
31cbcb5ddd ARMv8: ls1046a: Enable PCIe and E1000 in lpuart defconfig
Enable PCIe and E1000 in ls1046aqds lpuart defconfig.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-02-09 08:32:07 -08:00
Adam Ford
1811a928c6 Move most CONFIG_HAVE_BLOCK_DEVICE to Kconfig
config_fallbacks.h has some logic that sets HAVE_BLOCK_DEVICE
based on a list of enabled options.  Moving HAVE_BLOCK_DEVICE to
Kconfig allows us to drastically shrink the logic in
config_fallbacks.h

Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Rename HAVE_BLOCK_DEVICE to CONFIG_BLOCK_DEVICE]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-08 19:09:03 -05:00
Tom Rini
560eeee8c2 block: Migrate SystemACE chip to Kconfig
Migrate the base and sub-options to Kconfig.  Note that we only enable
this in the base sandbox config now.

Cc: Alexey Brodkin <alexey.brodkin@gmail.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
---
Is this driver still used anywhere?  It's fishy that it's only enabled
in sandbox anymore.
2018-02-08 19:08:41 -05:00
Adam Ford
a451bc27c9 Convert LIB_UUID to Kconfig
config_fallback.h has some logic that checks a variety of options
and selects LIB_UUID if it hasn't already been selected.  This
will all LIB_UUID in Kconfig and select this option for the list
of options to allow us to remove the logic from fallbacks

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-02-08 19:08:39 -05:00
Adam Ford
a5a37567c4 Convert CONFIG LIB_HW_RAND to Kconfig
config_fallbacks.h had some logic to automatically select
LIB_RAND if RANDOM_UUID or CMD_UUID were set if LIB_HW_RAND wasn't
already selected.  By migrating LIB_HW_RAND to Kconfig, we can
remove this check from config_fallbacks.h and put it into Kconfig

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
[trini: Turn into a choice, add NET_RANDOM_ETHADDR]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-08 12:48:22 -05:00
Adam Ford
99bec1aead Convert CONFIG_APBH_DMA et al to Kconfig
This converts the following to Kconfig:
   CONFIG_APBH_DMA
   CONFIG_APBH_DMA_BURST
   CONFIG_APBH_DMA_BURST8

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Stefan Agner <stefan.agner@toradex.com>
[trini: Add in MMC as well]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-08 12:48:11 -05:00
Michal Simek
99dcbdd8a3 Kconfig: Select networking commands only when NET is enabled
There is no reason to unconditially select network commands as distro
defaults without networking enable.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-02-08 12:48:11 -05:00
Michal Simek
c946b0e9fd Kconfig: net: phylib: Phylib should depends on NET
There is no value to enable phylib without networking support.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-02-08 12:48:10 -05:00
Michal Simek
389366f99a omap4: sdp4430: Enable CONFIG_NET for this platform
Distro default configuration contains also dhcp and pxe setting which
can't working without enabling CONFIG_NET.
EFI is not required that's why it is not enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-02-08 12:48:10 -05:00
Patrice Chotard
4c82b03c12 configs: stm32: Enable CONFIG_ENV_VARS_UBOOT_CONFIG
Enable CONFIG_ENV_VARS_UBOOT_CONFIG for all STM32 boards
It allows to retrieve the SoC name into the "soc" environment
variable.

Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-02-08 10:17:17 -05:00
Stefan Agner
c87c81186c Convert CONFIG_NAND_MXS to Kconfig
This converts CONFIG_NAND_MXS to Kconfig.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-08 10:17:17 -05:00
Stefan Agner
ac4605ae64 spl: use ARCH_MX23/28 to specify SPL_LDSCRIPT
Simplify SPL_LDSCRIPT config by using the new arch Kconfig
configurations ARCH_MX23 and ARCH_MX28.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-08 10:17:17 -05:00
Stefan Agner
25c5b4e1bf arm: imx: mx28: Move MX28 selection to Kconfig
The motivation for moving MX28 selection to Kconfig is to be able
to better handle NAND MXS selection through Kconfig.

This selection method also aligns with the way other i.MX SoCs are
selected in U-Boot.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-08 10:17:17 -05:00
Stefan Agner
c5343d4e11 arm: imx: mx23: Move MX23 selection to Kconfig
The motivation for moving MX23 selection to Kconfig is to be able
to better handle NAND MXS selection through Kconfig.

This selection method also aligns with the way other i.MX SoCs are
selected in U-Boot.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-08 10:17:16 -05:00
Adam Ford
8bbff6a70e Convert CONFIG_MXC_GPIO to Kconfig
This converts the following to Kconfig:
   CONFIG_MXC_GPIO

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-02-08 10:17:16 -05:00
Adam Ford
f1754f0810 configs: imx6q_logic: Move CONFIG_PHY_SMSC to defconfig
Since CONFIG_PHY_SMSC was already in Kconfig, move this from
header file to defconfig

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-02-08 10:16:54 -05:00
Adam Ford
71abe5ac00 configs: imx6q_logic: Move CONFIG_MXC_UART to Kconfig
Since CONFIG_MXC_UART is already in Kconfig, move this from
the header to imx6q_logic_defconfig

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-08 07:27:52 -05:00
Lukasz Majewski
5030eaa499 doc: watchdog: Remove Blackfin related documentation entry
This commit cleans up the README.watchdog by removing the reminescent of
ADI's Blackfin architecture removed some time ago.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-02-07 22:06:19 -05:00
Derald D. Woods
cbebe7a0f5 ARM: omap3: evm: Remove CONFIG_SYS_NS16550_REG_SIZE undefine
This commit removes an attempt to workaround a previous compilation
warning that is is now fixed in "include/configs/ti_omap3_common.h".

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-07 22:06:19 -05:00
Derald D. Woods
313ed5d505 ARM: omap3: ti_omap3_common: Fix CONFIG_SYS_NS16550_REG_SIZE compiler warning
This commit fixes the following compiler warnings when DM_SERIAL is
enabled.

---8<-------------------------------------------------------------------
...

  CC      spl/board/ti/evm/evm.o
In file included from /solution/scm/u-boot-master/board/ti/evm/evm.c:16:0:
/solution/scm/u-boot-master/include/ns16550.h:31:0: warning: "CONFIG_SYS_NS16550_REG_SIZE" redefined
 #define CONFIG_SYS_NS16550_REG_SIZE (-1)

In file included from /solution/scm/u-boot-master/include/configs/omap3_evm.h:22:0,
                 from include/config.h:5,
                 from /solution/scm/u-boot-master/include/common.h:21,
                 from /solution/scm/u-boot-master/board/ti/evm/evm.c:14:
/solution/scm/u-boot-master/include/configs/ti_omap3_common.h:33:0: note: this is the location of the previous definition
 # define CONFIG_SYS_NS16550_REG_SIZE (-4)

  LD      spl/board/ti/evm/built-in.o

...

  CC      spl/drivers/serial/ns16550.o
In file included from /solution/scm/u-boot-master/drivers/serial/ns16550.c:11:0:
/solution/scm/u-boot-master/include/ns16550.h:31:0: warning: "CONFIG_SYS_NS16550_REG_SIZE" redefined
 #define CONFIG_SYS_NS16550_REG_SIZE (-1)

In file included from /solution/scm/u-boot-master/include/configs/omap3_evm.h:22:0,
                 from include/config.h:5,
                 from /solution/scm/u-boot-master/include/common.h:21,
                 from /solution/scm/u-boot-master/drivers/serial/ns16550.c:7:
/solution/scm/u-boot-master/include/configs/ti_omap3_common.h:33:0: note: this is the location of the previous definition
 # define CONFIG_SYS_NS16550_REG_SIZE (-4)

  LD      spl/drivers/serial/built-in.o

...
---8<-------------------------------------------------------------------

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-07 22:06:18 -05:00
Lukasz Majewski
d695d66278 spl: eMMC/SD: Provide one __weak spl_boot_mode() function
The goal of this patch is to clean up the code related to choosing SPL
MMC boot mode.

The spl_boot_mode() now is called only in spl_mmc_load_image() function,
which is only compiled in if CONFIG_SPL_MMC_SUPPORT is enabled.

To achieve the goal, all per mach/arch implementations eligible for
unification has been replaced with one __weak implementation.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Michal Simek <michal.simek@xilinx.com> (For ZynqMP)
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-07 22:06:18 -05:00
Vignesh R
492322992b ARM: dts: keystone-k2g-ice: Add support for QSPI
K2G ICE has a s25fl256s1 QSPI NOR flash connected to QSPI at CS0. Add DT
entries for the same.

Signed-off-by: Vignesh R <vigneshr@ti.com>
2018-02-07 22:06:18 -05:00
Vignesh R
a47506ff8f ARM: k2g: Add pinmux data for QSPI on K2G ICE
Add pinmux for QSPI pins on K2G ICE board.

Signed-off-by: Vignesh R <vigneshr@ti.com>
2018-02-07 22:06:18 -05:00
Heinrich Schuchardt
923837e159 atcspi200: avoid possible NULL dereference
Check if ns before and not after dereferencing it.

Indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-07 22:06:18 -05:00
Alexey Brodkin
8639e34d2c part: Allocate only one legacy_mbr buffer
Commit ff98cb9051 ("part: extract MBR signature from partitions")
blindly switched allocated by ALLOC_CACHE_ALIGN_BUFFER buffer type from
"unsigned char" to "legacy_mbr" which caused allocation of size =
(typeof(legacy_mbr) * dev_desc->blksize) instead of just space enough
for "legacy_mbr" structure.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Rob Clark <robdclark@gmail.com>
Cc: Peter Jones <pjones@redhat.com>
Cc: Alexander Graf <agraf@suse.de>
Cc: Tom Rini <trini@konsulko.com>
2018-02-07 22:06:17 -05:00
Bin Chen
6808ef9ac2 move booti_setup to arch/arm/lig/image.c
Follow bootz's pattern by moving the booti_setup to arch/arm/lib.
This allows to use booti_setup in other paths, e.g booting
an Android image containing Image format.

Note that kernel relocation is move out of booti_setup and it is the
caller's responsibility to do it and allows them do it differently. say,
cmd/booti.c just do a manually, while in the bootm path, we can use
bootm_load_os(with some changes).

Signed-off-by: Bin Chen <bin.chen@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-07 22:06:11 -05:00
Bin Chen
104816142f parse the second area of android image
The second area of android image was intended to put a 2nd stage
bootloader but in practice were rarely used (in my knowledge).

An proposal was made to the AOSP to (re)use the second area as the dtb[1],
This patch itself doesn't depend on that proposal being accepted but it won't
be that helpful as well if that proposal won't be accepted. But don't do
any harm as well.

[1] https://android-review.googlesource.com/#/c/417447/
Signed-off-by: Bin Chen <bin.chen@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2018-02-07 21:58:26 -05:00
Tom Rini
e24bd1e79e Merge git://git.denx.de/u-boot-ubi 2018-02-06 12:17:00 -05:00
Tom Rini
ea0211b61f Merge git://git.denx.de/u-boot-i2c 2018-02-06 12:16:46 -05:00
Martin Townsend
2d2d306f79 ubi: Ensure no fastmap flush after uif_close
On detach UBI attempts to update fastmap after closing user interfaces
but at this point UBI volumes have already been free()'ed and fastmap
can no longer access these data structures.

Signed-off-by: Martin Townsend <mtownsend1973@gmail.com>
Cc: hs@denx.de
Cc: kmpark@infradead.org
Cc: richard@sigma-star.at
2018-02-06 07:05:57 +01:00
Heinrich Schuchardt
8bcf12ccce i2c: mvtwsi.c: Avoid NULL dereference
For '#ifndef CONFIG_DM_I2C' twsi_i2c_init() passes NULL as
4th parameter to __twsi_i2c_init().

Identified with cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2018-02-06 07:02:32 +01:00
Mario Six
9cef983d1c i2c: ihs_i2c: Factor out send_buffer method
Simplify the driver logic by extracting a common send_buffer method.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-06 07:02:11 +01:00
Mario Six
92164216a7 i2c: ihs_i2c: Make DM compatible
Make the ihs_i2c driver DM-compatible; for legacy boards, the old functions are
retained within #ifdefs.

No board uses the new DM driver yet; this patch only lays the foundation for
future support.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-06 07:01:06 +01:00
Mario Six
64ef094bc5 i2c: ihs_i2c: Prepare DM conversion
Prepare the function interface of the ihs_i2c driver for DM conversion
in a future patch.

While we're at it, fix some style violations, and make the code more readable.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-06 07:00:33 +01:00
Mario Six
84a4d34e96 i2c: fsl_i2c: Make live-tree compatible
Make the fsl_i2c driver compatible with a live device tree.

Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-06 06:59:59 +01:00
Mario Six
d4f422f886 i2c: fsl_i2c: Remove inline declarations
Some functions in the fsl_i2c driver are declared as inline, even though
they are quite large, which needlessly increases the size of the
resulting binary.

This patch removes the inline declarations.

Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-06 06:59:34 +01:00
Mario Six
a059de11c9 i2c: fsl_i2c: Fix style violations
Fix some style violations in the fsl_i2c I2C driver, and use shorter
type names for variables in some cases.

Reviewed-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-02-06 06:59:15 +01:00
Ulf Magnusson
a43aebee89 usb: ulpi: kconfig: Remove meaningless choice default
'default' on a choice refers to the symbol selected by default, not to
the choice mode, so 'default n' is meaningless.

No functional changes. Optional choices implicitly default to n mode
(and there is no way to make them default to another mode).

Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which prints the following warning:

	warning: the default selection n (undefined) of <choice> (defined at drivers/usb/ulpi/Kconfig:3) is not contained in the choice

I've added a corresponding warning to the C tools too, which is
currently in linux-next: https://patchwork.kernel.org/patch/9983667/

Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
2018-02-05 20:58:12 -05:00
Ulf Magnusson
c631e150fe am335x, shc: kconfig: Fix misspelled choice default
There is no EMMC symbol in the "enable different boot versions for the
shc board" choice. SHC_EMMC was probably intended.

No functional changes. Kconfig choices fall back on using the first
(visible) symbol in the choice as the default if the default symbol is
not visible.

Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which prints the following warning:

	warning: the default selection EMMC (undefined) of <choice> (defined at board/bosch/shc/Kconfig:15) is not contained in the choice

I've added a corresponding warning to the C tools too, which is
currently in linux-next: https://patchwork.kernel.org/patch/9983667/

Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
2018-02-05 20:58:11 -05:00
Justin Hibbits
f29aa23b54 Fix FreeBSD endian checks
FreeBSD, like OpenBSD, uses BIG_ENDIAN, LITTLE_ENDIAN, and BYTE_ORDER,
whereas Linux and compatibles use __-prefixed names.  Define the names
the same as the OpenBSD block below it.
2018-02-05 20:58:11 -05:00
Tuomas Tynkkynen
a4fa811463 cmd: Make CONFIG_CMD_FPGA depend on CONFIG_FPGA
cmd/Makefile has:

ifdef CONFIG_FPGA
obj-$(CONFIG_CMD_FPGA) += fpga.o
endif

which means that if CONFIG_FPGA is not set, CONFIG_CMD_FPGA silently
does nothing. Let's remove that Makefile conditional and instead express
this equivalent dependency in Kconfig, so a lot of redundant

 # CONFIG_CMD_FPGA is not set

can be removed from board defconfigs that don't actually have an FPGA.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-05 20:58:11 -05:00
Tuomas Tynkkynen
86c2f1e75b fpga: Resync various CONFIG_FPGA_* symbols
These are declared in Kconfig, but some #defines have crept in.

CONFIG_FPGA
CONFIG_FPGA_ALTERA
CONFIG_FPGA_CYCLON2
CONFIG_FPGA_SOCFPGA
CONFIG_FPGA_XILINX
CONFIG_FPGA_ZYNQMPPL

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-02-05 20:58:11 -05:00
Tom Rini
a4d403290e usb: dwc2: make casts of ep->dma_buf consistent
In most places in the code we cast this to an unsigned long, but in one
place we cast to an unsigned int.  For consistency and to fix a warning
on 64bit targets, always cast this to unsigned long.  For the long term
we should however change the declaration of dma_buf.

Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-02-05 12:09:43 -05:00
Jorge Ramirez-Ortiz
7e13f1d08f MAINTAINERS: board: qcom: db410c, db820c: update email.
Update email address.

Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
2018-02-04 22:55:34 -05:00
Daniel Schwierzeck
329f5ef51d travis.yml: run buildman with option -E
This forces all compiler warnings to be treated as errors.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-02-04 22:55:34 -05:00
Daniel Schwierzeck
38314d0e64 travis.yml: fix 'set +e' in build script
The build script should not manipulate shell flags (especially '-e').
A non-zero exit value can also be catched with 'cmd || ret=$?'.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-02-04 22:55:34 -05:00
Daniel Schwierzeck
2371d1bcbf buildman: add option -E for treating compiler warnings as errors
Add a new option '-E' for treating all compiler warnings as errors.
Eventually this will pass 'KCFLAGS=-Werror' to Kbuild.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-02-04 22:55:34 -05:00
Daniel Schwierzeck
215bb1c147 README: add doc for how to supply user specific compiler flags to Kbuild
Probably not all users are aware of this possibility, thus add a
pointer to the README. Also add a useful example.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-02-04 22:55:34 -05:00
Maxime Ripard
bf8f4c4400 MAINTAINERS: Update email address for Maxime Ripard
Free Electrons is no more and is now known as Bootlin, change my email
address accordingly.

Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
2018-02-04 19:21:00 -05:00
Tom Rini
211a3a23b9 Merge git://git.denx.de/u-boot-dm 2018-02-04 08:30:31 -05:00
Tom Rini
ab1af91093 Merge git://git.denx.de/u-boot-imx 2018-02-04 08:30:13 -05:00
Bryan O'Donoghue
d1ceb0c488 imx: mx7: run sec_init for CAAM RNG
This patch adds a sec_init call into arch_misc_init(). Doing so in
conjunction with the patch "drivers/crypto/fsl: assign job-rings to
non-TrustZone" enables use of the CAAM in Linux when OPTEE/TrustZone is
active.

u-boot will initialise the RNG and assign ownership of the job-ring
registers to a non-TrustZone context. With recent changes by Lukas Auer to
fully initialize the RNG in sec_init() this means that u-boot will hand-off
the CAAM in a state that Linux then can use the CAAM without touching the
reserved DECO registers.

This change is safe both for the OPTEE/TrustZone boot path and the regular
non-OPTEE/TrustZone boot path.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Marco Franchi <marco.franchi@nxp.com>
Cc: Vanessa Maegima <vanessa.maegima@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:14:11 +01:00
Bryan O'Donoghue
22191ac353 drivers/crypto/fsl: assign job-rings to non-TrustZone
After enabling TrustZone various parts of the CAAM silicon become
inaccessible to non TrustZone contexts. The job-ring registers are designed
to allow non TrustZone contexts like Linux to still submit jobs to CAAM
even after TrustZone has been enabled.

The default job-ring permissions after the BootROM look like this for
job-ring zero.

ms=0x00008001 ls=0x00008001

The MS field is JRaMIDR_MS (job ring MID most significant).

Referring to "Security Reference Manual for i.MX 7Dual and 7Solo
Applications Processors, Rev. 0, 03/2017" section 8.10.4 we see that
JROWN_NS controls whether or not a job-ring is accessible from non
TrustZone.

Bit 15 (TrustZone) is the logical inverse of bit 3 hence the above value of
0x8001 shows that JROWN_NS=0 and TrustZone=1.

Clearly then as soon as TrustZone becomes active the job-ring registers are
no longer accessible from Linux, which is not what we want.

This patch explicitly sets all job-ring registers to JROWN_NS=1 (non
TrustZone) by default and to the Non-Secure MID 001. Both settings are
required to successfully assign a job-ring to non-secure mode. If a piece
of TrustZone firmware requires ownership of job-ring registers it can unset
the JROWN_NS bit itself.

This patch in conjunction with a modification of the Linux kernel to skip
HWRNG initialisation makes CAAM usable to Linux with TrustZone enabled.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Alex Porosanu <alexandru.porosanu@nxp.com>
Cc: Ruchika Gupta <ruchika.gupta@nxp.com>
Cc: Aneesh Bansal <aneesh.bansal@nxp.com>
Link: https://github.com/OP-TEE/optee_os/issues/1408
Link: https://tinyurl.com/yam5gv9a
Tested-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
2018-02-04 12:14:11 +01:00
Eran Matityahu
a1ffd9e2e6 i2c: imx: Take mx6dqp in consideration in the I2C_PADS_INFO macro
We should take the MX6DP and MX6QP options in consideration
in the I2C_PADS_INFO macro.

Based on a patch by Pierluigi Passaro <pierluigi.p@variscite.com>

Signed-off-by: Eran Matityahu <eran.m@variscite.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:14:11 +01:00
Eran Matityahu
03073a6665 iomux-v3: Take mx6dqp in consideration for imx_iomux_v3_setup_pad()
We should take the MX6DP and MX6QP options in consideration
when defining imx_iomux_v3_setup_pad().

Based on a patch by Pierluigi Passaro <pierluigi.p@variscite.com>

Signed-off-by: Eran Matityahu <eran.m@variscite.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:14:10 +01:00
Fabio Estevam
79d0802953 doc: mxc_hab: Improve the config option list
The original text is from the time that the config options were not
converted to Kconfig.

After the conversion to Kconfig only CONFIG_SECURE_BOOT and
CONFIG_CMD_DEKBLOB need to be selected by the user.

The other config options are automatically selected by the Kconfig
logic.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Breno Lima <breno.lima@nxp.com>
2018-02-04 12:14:10 +01:00
Stefan Agner
8955519bb3 arm: dts: imx6ull: move input include to base device tree
The input keycode KEY_POWER is used in the imx6ull.dtsi file,
hence include the input header where used.

Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2018-02-04 12:14:10 +01:00
Fabio Estevam
78804518e4 mx6sabresd: Add fastboot support
fastboot tool is a convenient way to flash the eMMC, so
add support for it.

Examples of usages:

On the mx6sabresd:

=> fastboot 0

On the Linux PC connected via USB:

$ sudo fastboot getvar bootloader-version -i 0x0525
bootloader-version: U-Boot 2018.01-00550-g7517cfe
finished. total time: 0.000s

$ sudo fastboot reboot -i 0x0525

(this causes the mx6sabresd to reboot)

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
2018-02-04 12:14:10 +01:00
Fabio Estevam
11f3090532 mx6sabresd: Select CONFIG_CMD_USB_MASS_STORAGE
Select CONFIG_CMD_USB_MASS_STORAGE so that the 'ums' can be used.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:14:04 +01:00
Fabio Estevam
e705e2cd5b mx6sabre_common: Allow building CONFIG_USB_FUNCTION_MASS_STORAGE
Selecting CONFIG_USB_FUNCTION_MASS_STORAGE=y in the defconfig leads to
the following error:

cmd/built-in.o: In function `do_usb_mass_storage':
cmd/usb_mass_storage.c:217: undefined reference to `fsg_main_thread'
cmd/usb_mass_storage.c:170: undefined reference to `fsg_init'

CONFIG_USB_FUNCTION_MASS_STORAGE option is built only for
the non-SPL case as per the logic in drivers/usb/gadget/Makefile,
so remove the incorrect CONFIG_SPL ifdefery to fix the build
failure.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Shawn Guo <shawn.guo@linaro.org>
2018-02-04 12:02:35 +01:00
Soeren Moch
c12737cea0 board: tbs2910: add private imx config
Add board specific imx config file with recommended IPU Qos settings
and adapted DDR configuration.

Signed-off-by: Soeren Moch <smoch@web.de>
2018-02-04 12:00:58 +01:00
Michael Trimarchi
77e04034ec imx: mx25: Remove SION bit in all pin-mux that are safe
SION bit should be used in the situation that we need
to read back the value of a pin and should not be set by
default macro.

We get some malfunction as raised by following thread

https://www.spinics.net/lists/linux-usb/msg162574.html

As reported by this application note:
https://www.nxp.com/docs/en/application-note/AN5078.pdf

The software input on (SION) bit is an option to force an input
path to be active regardless of the value driven by the
corresponding module. It is used when the nature direction
of a pin depending on selected alternative function is an output,
but it is needed to read the real logic value on a pin.

The SION bit can be used in:
• Loopback: the module of a selected alternative function drives
the pad and also receives the pad value as an input
• GPIO capture: the module of a selected alternative function
drives the pin and the value is captured by the GPIO

SION bit is not necessary when the pin is configured as a peripheral
apart specific silicon bug. If an application needs to have this
set, this should be done in board file or in dts file

Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
c966c7b977 imx: mx7dsabresd: enable UHS and HS200
Enable UHS and HS200 for mx7dsabresd.

Read Speed improvement:
Kingston SD10VG2/16GB SDHC 3.0 card
22.2MB/s -> 73.7MB/s
eMMC5.0 MTFC8GACAEAM:
68MB/s -> 87MB/s

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04 12:00:58 +01:00
Peng Fan
51313b49f2 mmc: fsl_esdhc: support SDR104 and HS200
Introduce SDR104 and HS200 support
The implementation takes linux kernel sdhci.c and sdhci-esdhc-imx.c
as reference.
 - Implement esdhc_change_pinstate to dynamically change pad settings
 - Implement esdhc_set_timing
 - Implement esdhc_set_voltage to switch voltage
 - Implement fsl_esdhc_execute_tuning to execute time process
 - Enlarge the cfg->f_max to 200MHz.
 - Parse fsl,tuning-step, fsl,tuning-start-tap and
   fsl,strobe-dll-delay-target from device tree.
 - Parse no-1-8-v property
 - Introduce esdhc_soc_data to indicate the flags and caps

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04 12:00:58 +01:00
Peng Fan
893d98d9aa ARM: dts: add pinmux and tuning settings for HS200/SDR104
The pinmux and tuning settings are from
https://source.codeaurora.org/external/imx/linux-imx/tree/arch/
arm/boot/dts/imx7s.dtsi?h=imx_4.9.11_1.0.0_ga
https://source.codeaurora.org/external/imx/linux-imx/tree/arch/
arm/boot/dts/imx7d-sdb.dts?h=imx_4.9.11_1.0.0_ga

To support HS200 and SDR104, we need change pinmux settings dynamically.
And configure tuning step and start tuning tap, otherwise you may
see tuning failure.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04 12:00:58 +01:00
Peng Fan
59d3782cda mmc: fsl_esdhc: add strobe and tuning entry
Add entries that will be used for tuning control.
The whole layout not changed, just expand reserved3[84] and
rename other reservedx in sequence.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04 12:00:58 +01:00
Eric Nelson
d8acc9deec mx6memcal: fix comment in board header file
The board header file included a reference to the starting point
from nitrogen6x.h, but since so much changed, the file bears
little resemblance to that file.

Signed-off-by: Eric Nelson <eric@nelint.com>
2018-02-04 12:00:58 +01:00
Eric Nelson
0093b3fcd8 mx6memcal: enable SDP support
The initial implementation of mx6memcal reset the CPU after
running the memory calibration procedure because the generic
board has no information about which boot devices are available.

Now that we have SDP support in SPL, use it to allow a full
U-Boot to be uploaded (i.e. to use "mtest").

Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Eric Nelson
cc9467ef7e mx6memcal: launder through savedefconfig
This patch just changes the order of configuration items in
mx6memcal_defconfig to match the Kconfig layout, making it easier
to track changes made using menuconfig.

Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Patrick Bruenn
55e83d2e36 arm: imx: mx53loco: remove usage of mx53_dram_size
Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().

Reused dram initialization functions from arch/arm/mach-imx/mx5/mx53_dram.c

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-02-04 12:00:58 +01:00
Patrick Bruenn
9d9baacb90 arm: imx: m53evk: remove usage of mx53_dram_size
Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().

Reused dram initialization functions from arch/arm/mach-imx/mx5/mx53_dram.c

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-02-04 12:00:58 +01:00
Patrick Bruenn
daebb796ff arm: imx: cx9020: move dram init into common place
Move dram_init(), dram_init_banksize() and get_effective_memsize() to
arch/arm/mach-imx/mx5/mx53_dram.c, where it can be reused by m53evk and
mx53loco.

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-02-04 12:00:58 +01:00
Patrick Bruenn
a75a3ef305 arm: imx: cx9020: remove usage of mx53_dram_size
Static variables are not available during board_init_f().
'static uint32_t mx53_dram_size[2];' was used in board specific
dram_init(), dram_init_banksize() and get_effective_memsize() to avoid
multiple calls to get_ram_size().

However multiple calls are better than undefined behavior...
This fixes:
https://lists.denx.de/pipermail/u-boot/2017-November/313214.html
https://lists.denx.de/pipermail/u-boot/2017-December/314480.html

Signed-off-by: Patrick Bruenn <p.bruenn@beckhoff.com>
2018-02-04 12:00:58 +01:00
Nandor Han
886678fcf7 board,ge,bx50v3 - rtc time validation
Validate the time at startup:
 - in case rtc error add to kernel command line RTC_ERROR
 - clamp date to 1-Jan-2036

Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Ian Ray
9e41b54a2e configs: ge_bx50v3: automatic partition selection and video output failure message
The exact definition of a successful boot is defined by user-space.
Determine the boot partition automatically.  A partition is selected if
file `/boot/bootcause/firstboot' exists (meaning that the partition has
freshly installed software) OR if file `/boot/fitImage' exists.

When userspace determines that new software was successfully installed,
it must (1) delete `/boot/fitImage' on the _inactive_ partition and (2)
remove `/boot/bootcause/firstboot'.

Enable video, but do not display logos or other version information.
Silence kernel console logging by default.

Print a message to VGA screen in case of boot failure and reset bootcount
to allow the user to attempt boot again.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Hannu Lounento
f41a45830b board: ge: bx50v3: mount rootfs read-only
Change the kernel command line to mount the root filesystem read-only in
order to be able to run filesystem check on it on boot.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Ian Ray
44395c8504 configs: ge_bx50v3: enable bootcount
Enable bootcount using an EXT file.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Ian Ray
78ca33508d config: ge_bx50v3: read boot script
Read boot script from shared partition, if available.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Ian Ray
f07b3148d7 board: ge: bx50v3: Support FIT and select configuration based on VPD
Modify configuration to support FIT. Set variable `confidx' from VPD,
in order to load the correct device tree. Modify/simplify U-Boot
environment to support loading FIT image.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Martyn Welch
6d6564957c board: ge: bx50v3: Enable hardware watchdog
Enable the hardware watchdog on bx50v3 to cause it to reset in the event
the board hangs.

Configure GPIO_9 pin as WDOG1_B so that a watchdog timeout results in a
full system reset.

The watchdog is used and reconfigured by systemd approximately 1.7 seconds
into boot. Adding a few seconds for U-Boot and a few more seconds as a
safety margin.

Note that the PCIe controller is _not_ put back into a safe state prior
to board reset.  This is a problem if board reset is implemented as CPU
reset.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Hannu Lounento
2850645cab board: ge: bx50v3: program MAC address to I210
There are two I210s on the b850v3 and one on the b450v3 and b650v3.
One is connected to Marvell 88e6240 which is already programmed.

Follow the flow documented in doc/README.enetaddr: set the
enet[0-9]*addr environment variable and let the driver program the
hardware.

The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order.

The environment variables are removed after programming the hardware
because the variables seem to influence MAC addresses also after U-Boot.
Specifically the MAC address of FEC (MC interface) would be incorrectly
set: 'ethaddr', which maps to the first I210 chip and is set to I210's
default address read from the driver by eth_write_hwaddr in eth_legacy.c
because the variable is undefined (not set even by bx50v3.c), would
result in the eth0 interface's MAC address to be set to I210's default
address.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Martyn Welch
cf678b31ac board: ge: bx50v3: move FEC MAC address programming to driver
Instead of programming the hardware directly in the board
implementation, follow the flow documented in doc/README.enetaddr: set
the enet[0-9]*addr environment variable and let the driver program the
hardware.

This avoids duplicating the implementation as it already exists in the
driver (drivers/net/fec_mxc.c: fec_set_hwaddr).

The mapping from the driver's index to the environment variable's name
is documented in README: Note for Redundant Ethernet Interfaces. It is
assumed that eth_devices for the controllers on the board are always
indexed in the same order, i.e. FEC always has the index 2.

The FEC driver does *not* set the flag Set MAC Address on Transmit (bit
set_eth0_mac_address used to do but this is unnecessary as the Linux
networking stack fills in the MAC address.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Ian Ray
3414913c24 configs: Add network device support for bx50v3 products
Modify b450v3, b650v3 and b850v3 defconfigs to enable the network devices
found in these products.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Martyn Welch
87da89e803 board: ge: Enable access to i2c bus 1 and 2
The change in i2c configuration added to support access to the VPD has
inadvertantly caused access to i2c buses 1 & 2 to be lost. This has
resulted in the configuration for the PMIC to be attempted on the wrong
bus and thus isn't taking effect.

Add the required configuration to return access to buses 1 & 2. In order
to ensure that any users of the bus numbering prior to addition in VPD
patches work, add buses before configuration related to mux on bus 0 and
tweak VPD bus usage to fit new numbering scheme.

Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Nandor Han
958a2106f5 rtc: adding RX8010SJ rtc driver
Add a new driver for RX8010SJ rtc chip. The driver implements both
formats of U-Boot driver model.

Signed-off-by: Nandor Han <nandor.han@ge.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Hannu Lounento
8d9bde0dbb net: e1000: implement eth_write_hwaddr
Implement programming MAC address to the hardware, i.e. external flash
seen as EEPROM.

MAC address is only written if it differs from what is already stored in
flash or if reading the current MAC address fails.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Hannu Lounento
e0a75fed9e net: e1000: split e1000_read_mac_addr
Split the implementation of e1000_read_mac_addr into eeprom and register
versions called by e1000_read_mac_addr.

This allows for calling e1000_read_mac_addr when MAC address is needed
with no constraints where it is read from, and for calling the register
and, especially, the eeprom version directly in order to specify where
to read the address from.

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Hannu Lounento
f1bcad22dd net: e1000: add support for writing to EEPROM
Port functions for writing to EEPROM, updating the checksum and
committing data to flash from the Linux kernel igb driver.

Functions were ported from Linux 4.8-rc2 (694d0d0bb20).

Signed-off-by: Hannu Lounento <hannu.lounento@ge.com>
CC: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Martyn Welch <martyn.welch@collabora.co.uk>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
2018-02-04 12:00:58 +01:00
Peng Fan
a61b65ffb5 imx: mx8m: add ddr controller memory map
Add ddrc memory map and enum types used in ddr initialization.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
a35332fa28 power: pmic/regulator allow dm be omitted by SPL
Allow the dm driver be omitted by SPL.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-04 12:00:58 +01:00
Peng Fan
52df705c96 imx: imx8mq: add dtsi file
Add dtsi file for i.MX8MQ.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Ye Li
f24e482ae0 net: fec: fix build warnings for 64bits support
When building for 64bits system, we get some warnings about type
cast between pointer and integer. This patch eliminates the warnings
by using ulong/long type which is 32bits on 32bits system or 64bits on
64bits system.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
238a53c710 net: fec: do not access reserved register for i.MX8M
The MIB RAM and FIFO receive start register does not exist on
i.MX8M. Accessing these register will cause system hang.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
8953d86664 gpio: mxc: add i.MX8M support
Add i.MX8M GPIO support.
There are 4 GPIO banks on i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
3baa9ec44a imx: lcdif: include i.MX8M
Include i.MX8M in lcdif register layout map.
Also included i.MX7ULP in this patch, since share same with i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
eec2d43795 mmc: fsl_esdhc: support i.MX8M
Support i.MX8M in fsl esdhc driver.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
8a099b6860 misc: ocotp: add i.MX8M support
i.MX8M OCOTP follow same flow as i.MX6Q, but it has 64 banks
and each bank 4 words.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
e0e4e53375 imx: makefile: compile files for i.MX8M
Compile files for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
fcdbde7ce0 imx: mx8m: add soc related settings and files
Add SoC level initialization code
 - arch_cpu_init
 - mmu table
 - detect cpu revision
 - reset cpu and wdog settings
 - timer init
 - wdog settings
 - lowlevel init to save/restore registers
 - a few dummy header file to avoid build failure
 - ft_system_setup

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
c1ef486327 imx: mx7: move mmc env code to mmc_env.c
The mx7 mmc env code is shared by i.MX8M, so move it to mmc_env.c.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
80ebf86d9b imx: cpu: support get_boot_device for i.MX8M
Enable get_boot_device for i.MX8M, it supports boot type USB.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
770611f21e imx: mx7: move get_boot_device to cpu.c
Move get_boot_device to cpu.c to prepare adding i.MX8M support,
because i.MX8M share same code with i.MX7.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
ecd7ab5628 imx: bootaux: support i.MX8M
Add i.MX8M support. Because i.MX8M use SiP call trap
to Arm Trusted Firmware to handle M4, so use #ifdef
to avoid build error on i.MX6/7.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
8cf223133c imx: cleanup bootaux
Move i.MX6/7 bootaux code to imx_bootaux.c.
The i.MX6/7 has different src layout, so define M4 reg offset
to ease the cleanup. Redefine the M4 related BIT for share
common code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
6ce8b10b87 imx: refactor imx_get_mac_from_fuse
Move imx_get_mac_from_fuse to a new mac.c for i.MX6/7.
Since fuse regs structure are different for i.MX6/7, use mac
address offset in code and define a new local struture
imx_mac_fuse.

Also sort the config order.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
e56d9d79e5 imx: cpu: add cpu speed/grade for i.MX8M
Use more general enum types for speed grade.
Refine get_cpu_speed_grade_hz to support i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
423e84bc72 imx: cpu: move speed/temp to common cpu
The i.MX7 cpu speed/temp code could be reused on i.MX8M,
so move them to common cpu code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
995e9fef8f imx: add pad settings bit definition for i.MX8M
Add pad settings bit definition for i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
4fdffb9856 imx: add i.MX8MQ SoC Revision and is_mx8m helper
Add i.MX8MQ SoC Revision
Add is_mx8m helper
The 7ULP is a dummy number, so use 0xEx.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
d7cb10a05f imx: spl: implement spl_boot_device for i.MX8M
Implement spl_boot_device for i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
7537e93290 imx: cpu: update cpu file to support i.MX8M
Update get_reset_cause to reflect i.MX8M
Compile out get_ahb_clk and set_chipselect_size for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
912d97b108 imx: boot_mode: add USB_BOOT entry
Add USB_BOOT entry.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-02-04 12:00:58 +01:00
Peng Fan
de274663f5 imx: add sip function
Add SiP (Silicon Provider) services function to issue
SMC call to Arm Trusted Firmware.

More SiP information could be found in
  https://github.com/ARM-software/arm-trusted-firmware/blob/master/
  docs/arm-sip-service.rst

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
bb0fabe42d imx: mx8m: add clock driver
Add clock driver to support i.MX8M.

There are two kind PLLs, FRAC pll and SSCG pll. ROM already
configured SYS PLL1/2, we only need to configure the output.
ocotp/i2c/pll decoding and configuration/usdhc/lcdif/dram pll/
enet clock are configured in the code.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
80fd219ec7 imx: mx8m: add pin header file
Add pin header file for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
3e4aeebcdb imx: mx8m: add register definition header file
Add register definition header file for i.MX8M

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Peng Fan
7a7391fd7e imx: add i.MX8M into Kconfig
Add i.MX8M into Kconfig, create a new folder mx8m
dedicated for i.MX8M.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-02-04 12:00:58 +01:00
Jagan Teki
b9d984ea16 configs: icore: enable nand on mmc defconfig
Enable nand on mmc defconfig, so-that preparing nand
for writing/updating bootimage, Linux becomes easy.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-04 12:00:58 +01:00
Jagan Teki
c282eae07c configs: enable spl support wrt env device
nand device needed for mmc config to access nand
for write and update so enabling SPL_SUPPORT to mmc
or nand is wrt to env device rather nand driver check.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-04 12:00:58 +01:00
Anson Huang
4f0cd03723 imx: mx7: psci: add system power off support
Add i.MX7 PSCI system power off support, linux
kernel can use "poweroff" command to power off
system via SNVS, PMIC power will be disabled.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-02-04 12:00:58 +01:00
Anson Huang
169c20e903 imx: mx7: psci: add system reset support
Add i.MX7 PSCI system reset support, linux
kernel can use "reboot" command to reset
system even wdog driver is disabled in kernel.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-02-04 12:00:58 +01:00
Anson Huang
0ec3d98f76 mx7_common: use psci 1.0 instead of 0.1
Use PSCI 1.0 instead of 0.1 to support more power
management feature like system reset, power off etc..

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2018-02-04 12:00:58 +01:00
Jagan Teki
04c28a7810 board: i.MX6QDL: add Engicam i.CoreM6 1.5 QDL MIPI starter kit
i.CoreM6 1.5 is an another i.CoreM6 QDL cpu modules which can be connected
to EDIMM starter kit design with eMMC and MIPI-CSI interfaces suitable for
Android and video capture application.

notable features:
CPU			NXP i.MX6 S/DL/D/Q, Up to 4 x Cortex-A9@800MHz
Memory  		Up to 2 GB DDR3-1066
Video Interfaces	Up to 1 Parallel Up to 2 LVDS HDMI 1.4
			port 8 bit CSI INPUT MIPI-CSI INPUT
1 x 10/100 Ethernet interface, 2 x USB, 1 x PCIe, 1 x I2S etc

This patch adds support for Quad/Dual and DualLite/Solo SOM's on
MIPI starter kit with boot from SD and eMMC.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-02-04 12:00:58 +01:00
Heinrich Schuchardt
1973b381a1 log: add category LOGC_EFI
The EFI implementation does not fit into any of the existing categories.

Provide LOGC_EFI so that EFI related message can be filtered.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:09:28 -07:00
Simon Glass
3707c6ee0d log: Add a way to log error-return values
When functions return an error it propagates up the stack to the point
where it is reported. Often the error code provides enough information
about the root cause of the error that this is obvious what went wrong.

However in some cases the error may be hard to trace. For example if a
driver uses several devices to perform an operation, it may not be
obvious which one failed.

Add a log_ret() macro to help with this. This can be used to wrap any
error-return value. The logging system will then output a log record when
the original error is generated, making it easy to trace the call stack
of the error.

This macro can significantly impact code size, so its use is controlled
by a Kconfig option, which is enabled for sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:09:27 -07:00
Simon Glass
8cb7c04248 log: Add documentation for commands and formatting
Add some notes about recent new features.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:09:27 -07:00
Simon Glass
aa4e0e005b log: Add tests for the new log features
Add a test of the 'log format' and 'log rec' commands. This also covers
things like log_get_cat_by_name(), since they are used by these commands.
Fix a style nit in the tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:09:27 -07:00
Simon Glass
3fd24fa9ed log: Add a command to output a log record
Add a 'log rec' command which allows a log record to be manually output.
This is useful for scripts which want full control over what is logged. It
also permits easy testing of the log system.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:09:27 -07:00
Simon Glass
ad0e503991 log: Add a command to control the log output format
Add a 'log format' command which can display or change the log output
format. This is useful for changing how much information is displayed. The
ordering of the fields is fixed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:09:27 -07:00
Simon Glass
deca50fbd5 log: Update log_console to honour the log format
At present this just outputs the message. Update it to output whatever the
format requests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:09:27 -07:00
Simon Glass
3b73e8d067 log: Add control over log formatting
It is useful to be able to control the output format of log records on the
console. As a starting point, add definitions for controlling which
elements of the log record are displayed. Use function and message as the
default, since these are the most useful fields.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:09:27 -07:00
Simon Glass
f941c8d76c log: Add functions to convert IDs to/from names
Category and level both use an enum for their ID values. Add functions to
convert these IDs to strings and vice versa. This will allow the log to
output the strings instead of the (inscrutable) values.

At the same time, add a new 'driver-model' category, to cover core
driver-model functions and fix an incorrect value for LOGL_MAX.

Tests will be added with the new 'log' subcommands.

Signed-off-by: Simon Glass <sjg@chromium.org>
(Updated to correct clang warnings)
2018-02-03 10:09:13 -07:00
Simon Glass
6e43d1b199 dm: core: Add a function to look up a uclass by name
Each uclass has a driver name which we can use to look up the uclass. This
is useful for logging, where the uclass ID is used as the category.

Add a function to handle this, as well as a test.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-02-03 10:08:40 -07:00
Lukasz Majewski
b2153075f4 Kconfig: usb: rockchip: Remove not needed *_defconfig USB/gadget entries
After moving some USB gadget configs (USB_FUNCTIONS_*) to Kconfig it
turned out that following *_defconfig entries for RockChip are not
needed.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-02-02 07:13:48 -05:00
Lukasz Majewski
e4d4604a7b usb: ums: Kconfig: Select USB_FUNCTION_MASS_STORAGE when enabling 'ums' command
The CONFIG_USB_FUNCTION_MASS_STORAGE must be selected when one enables
support for ums command.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-02 07:13:48 -05:00
Lukasz Majewski
4f60e5d3a8 Kconfig: gadget: Move CONFIG_USB_FUNCTION_MASS_STORAGE to Kconfig
This commit moves USB_FUNCTION_MASS_STORAGE config to Kconfig.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-02 07:13:48 -05:00
Lukasz Majewski
c6c1ca100f Kconfig: gadget: Move CONFIG_USB_FUNCTION_THOR to Kconfig
This commit moves USB_FUNCTION_THOR config to Kconfig.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-02-02 07:13:48 -05:00
Lukasz Majewski
b76965958c Kconfig: usb: Sort USB_FUNCTION_* entries
Lets provide alphabetical order for USB_FUNCTION_* entries of
USB_GADGET_DOWNLOAD

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2018-02-02 07:13:48 -05:00
Simon Goldschmidt
80719938c9 env: sf: use env_import_redund to simplify env_sf_load
For the redundant environment configuration, env_sf_load still
contained duplicate code instead of using env_import_redund().

Simplify the code by only executing the load twice and delegating
everything else to env_import_redund.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-02-01 08:05:53 -05:00
Simon Goldschmidt
2166ebf783 env: make env drivers propagate env_import return value
For multiple env drivers to correctly implement fallback when
one environment fails to load (e.g. crc error), the return value
of env_import has to be propagated by all env driver's load
function.

Without this change, the first driver that succeeds to load an
environment with an invalid CRC return 0 (success) and no other
drivers are checked.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-02-01 08:05:53 -05:00
Simon Goldschmidt
31f044bd91 env: move more common code to env_import_redund
There is more common code in mmc, nand and ubi env drivers that
can be shared by moving to env_import_redund.

For this, a status/error value whether the buffers were loaded
are passed as additional parameters to env_import_redund.
Ideally, these are already returned to the env driver by the
storage driver. This is the case for mmc, nand and ubi, so for
this change, code deduplicated.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-02-01 08:05:49 -05:00
Simon Goldschmidt
42a1820bbc env: make env_import(_redund) return 0 on success, not 1
env_import (and env_import_redund) currently return 1 on success
and 0 on error. However, they are only used from functions
returning 0 on success or a negative value on error.

Let's clean this up by making env_import and env_import_redund
return 0 on success and -EIO on error (as was the case for all
users before).

Users that cared for the return value are also updated. Funny
enough, this only affects onenand.c and sf.c

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-31 18:45:10 -05:00
Simon Goldschmidt
87c7fb396a cmd: nvedit: env_get_f must check for env_get_char error codes
env_get_f calls env_get_char to load single characters from the
environment. However, the return value of env_get_char was not
checked for errors. Now if the env driver does not support the
.get_char call, env_get_f did not notice this and looped over the
whole size of the environment, calling env_get_char over 8000
times with the default settings, just to return an error in the
end.

Fix this by checking if env_get_char returns < 0.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-31 18:45:10 -05:00
Tom Rini
48f58a5973 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-01-31 18:44:31 -05:00
Tom Rini
2e87980580 davinci: Fix omapl138_lcdk builds
The omapl138_lcdk platform is not a DA850 SoC so we need to select
SOC_DA8XX and not SOC_DA850, as it was before.  It does however point
out a bit of a misnomer in how all of these PLL defines are named as
they are generic to DA8xx, not DA850 centric.  Remove the 'if SOC_DA850'
under the defaults as these are simply the defaults.  As SOC_DA8XX will
select SYS_DA850_DDR_INIT when needed, we do not need it under both SOC
options.

Fixes: 76e22222d3 ("Convert CONFIG_SYS_DV_CLKMODE et al to Kconfig")
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-31 15:44:58 -05:00
Tom Rini
ab21ecef7a Merge tag 'xilinx-for-v2018.03' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2018.03

- Several Kconfig fixes (also moving configs to defconfigs)
- Some DTS updates
- ZynqMP psu rework based on Zynq concept
- Add low level initialization for zc770 and zcu102
- Add support for Zynq zc770 x16 nand configuration
- Add mini nand/emmc ZynqMP targets
- Some arasan nand changes
2018-01-31 07:10:55 -05:00
Adam Ford
11d2e98d7e Convert CONFIG_SYS_OMAP24_I2C_SLAVE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_OMAP24_I2C_SLAVE
   CONFIG_SYS_OMAP24_I2C_SPEED

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Paul Kocialkowski <contact@paulk.fr>
2018-01-30 14:59:32 -05:00
Adam Ford
76e22222d3 Convert CONFIG_SYS_DV_CLKMODE et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SYS_DV_CLKMODE
   CONFIG_SYS_DA850_PLL0_POSTDIV
   CONFIG_SYS_DA850_PLL0_PLLDIV1
   CONFIG_SYS_DA850_PLL0_PLLDIV2
   CONFIG_SYS_DA850_PLL0_PLLDIV3
   CONFIG_SYS_DA850_PLL0_PLLDIV4
   CONFIG_SYS_DA850_PLL0_PLLDIV5
   CONFIG_SYS_DA850_PLL0_PLLDIV6
   CONFIG_SYS_DA850_PLL0_PLLDIV7
   CONFIG_SYS_DA850_PLL1_POSTDIV
   CONFIG_SYS_DA850_PLL1_PLLDIV1
   CONFIG_SYS_DA850_PLL1_PLLDIV2
   CONFIG_SYS_DA850_PLL1_PLLDIV3

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-30 12:52:57 -05:00
Derald D. Woods
405fc8305b Convert CONFIG_SYS_BOOT_GET_{CMDLINE, KBD} to Kconfig
This converts the following to Kconfig:
	CONFIG_SYS_BOOT_GET_CMDLINE
	CONFIG_SYS_BOOT_GET_KBD

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2018-01-30 12:52:57 -05:00
York Sun
58932ec68c armv8: ls2088ardb: Add 3DS RDIMM support
Tested with MTA72ASS8G72PSZ-2S6G1. This is 3DS RDIMM module with x4
DDR chips. LS2088ARDB needs to be modified to connect all DQS signals.
Some of them are grounded by default for x8 chips. Tested with RDIMM
MTA18ASF2G72PDZ on main memory controllers. DP-DDR doesn't support
RDIMM. Dropped related timing table.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30 09:14:07 -08:00
York Sun
f513de6c82 armv8: ls1046ardb: Add RDIMM support
This adds 2Rx8 RDIMM on LS1046ARDB board. Tested with RDIMM
MTA18ASF2G72PDZ and MTA9ASF1G72PZ.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30 09:14:07 -08:00
York Sun
140ad2d899 drivers/ddr/fsl: Cleanup unused variable
Variable "row_density" is no longer used. Drop it from DIMM structure.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30 09:14:07 -08:00
York Sun
944537c56e drivers/ddr/fsl: Modify binding registers to save time on data init
DDR controllers always use binding register to determine the memory
space to perform data initialization. In case of controller interleaving,
the space is doubled, resulting twice long wait. It wasn't too bad until
the memory capacity increases. To reduce the wait time, reduce the
binding space to half and restore it after data initialization.
Three-way interleaving is no longer used and is removed.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30 09:14:07 -08:00
York Sun
564e9383e5 drivers/ddr/fsl: Add calculation of register control words
DDR4 RDIMM has some information in SPD to be used to calculate the
control words for register chip. The rest can be found from JEDEC
spec DDR4RCD02.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30 09:14:07 -08:00
York Sun
c0c32af0b2 drivers/ddr/fsl: Add 3DS RDIMM support
On top of RDIMM support, add new register calculation to support
3DS RDIMMs. Only symmetrical 3DS is supported at this time.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30 09:14:07 -08:00
York Sun
d46ec0bbaf drivers/ddr/fsl: Fix workaround for A009803
Wrong field was masked in this workaround due to wrong endianness. The
impacted SoCs have big-endian.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30 09:14:06 -08:00
York Sun
426230a65f drivers/ddr/fsl: Fix DDR4 RDIMM support
For DDR4, command/address delay in mode registers and parity latency
in timing config register are only needed for UDIMMs, but not RDIMMs.
Add additional register rcw_3 for DDR4 RDIMM. Fix mirrored bit for
dual rank RDIMMs. Set sdram_cfg_3[DIS_MRS_PAR] for RDIMMs. Fix
calculation of timing config registers. Use hexadecimal format for
printing RCW (register control word) registers.

Signed-off-by: York Sun <york.sun@nxp.com>
2018-01-30 09:14:06 -08:00
Ashish Kumar
a9b1c2164a armv8: ls1088a: Add CONFIG_SPI_FLASH_SPANSION to sdcard defconfigs
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-30 09:13:45 -08:00
Yogesh Gaur
f9747a5a5d driver: fsl-mc: Perform fsl-mc fdt fixup for lazyapply dpl
For for case of lazyapply method, API fdt_fixup_board_enet() gets
invoked before DPL being deployed. This leads to an issue that
fsl-mc fdt fixup status marked as fail and dprc driver didn't get
registered in linux boot.

Fixes this issue by calling fdt_fixup_board_enet() for case when
DPL is deployed successfully in lazyapply method.

Signed-off-by: Yogesh Gaur <yogeshnarayan.gaur@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-30 09:13:32 -08:00
Tom Rini
f1554b28d3 Merge git://git.denx.de/u-boot-x86 2018-01-30 10:09:01 -05:00
Ulf Magnusson
e21b04fec4 x86: kconfig: Remove meaningless 'select n'
'select n' selects a constant symbol, which is meaningless and has no
effect. Maybe this was meant to be a 'default n', though bool and
tristate symbols already implicitly default to n.

Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which does more strict checking here:

	kconfiglib.KconfigSyntaxError: board/google/Kconfig:34: Couldn't parse '	select n': expected nonconstant symbol

Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 22:34:38 +08:00
Tom Rini
d0c0752add x86: quark: Fix unused warnings
The variable t_rfc is never used, so drop it.  The variables ddr_wctl
and ddr_wcmd are only used in certain manual instances, so guard their
declaration by the same check as their use.

Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 22:34:38 +08:00
Heinrich Schuchardt
ca92ad4f68 cmd/bdinfo: print relocation info on X86
For debugging U-Boot in qemu-x86 the relocation address is needed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 22:34:38 +08:00
Bin Meng
2d1c661915 x86: qemu: qfw: Implement acpi_get_rsdp_addr()
U-Boot on QEMU does not build ACPI table by ourself, instead it uses
the prebuilt ACPI table via the qfw interface. This implements the
qfw version of acpi_get_rsdp_addr() for setup_zimage().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2018-01-30 22:34:37 +08:00
Bin Meng
45410da714 x86: acpi: Use an API to get the ACPI RSDP table address
At present the acpi_rsdp_addr variable is directly referenced in
setup_zimage(). This changes to use an API for better encapsulation
and extension.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2018-01-30 22:34:37 +08:00
Ulf Magnusson
e7563c204e arm64: zynqmp: Fix misspelled choice default
There is no JTAG symbol in the "Boot mode" choice. JTAG_MODE was
probably intended.

No functional changes. Kconfig choices fall back on using the first
(visible) symbol in the choice as the default if the default symbol is
not visible.

Discovered in Kconfiglib (https://github.com/ulfalizer/Kconfiglib),
which prints the following warning:

	warning: the default selection JTAG (undefined) of <choice> (defined at arch/arm/cpu/armv8/zynqmp/Kconfig:107) is not contained in the choice

I've added a corresponding warning to the C tools too, which is
currently in linux-next: https://patchwork.kernel.org/patch/9983667/

Signed-off-by: Ulf Magnusson <ulfalizer@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:52 +01:00
Vipul Kumar
aae7422b45 arm64: zynqmp: Moved ethernet PHY configs of ZynqMP boards to defconfig
This patch moved ethernet PHY configs of ZynqMP boards
to respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:52 +01:00
Vipul Kumar
bd5a8e5850 microblaze: Moved ethernet PHY configs of Microblaze board to defconfig
This patch moved ethernet PHY configs of Microblaze board to
respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:52 +01:00
Vipul Kumar
77217c4b5f arm: zynq: Moved ethernet PHY configs of Zynq boards to defconfig
This patch moved ethernet PHY configs of Zynq boards
to respective defconfig.

Signed-off-by: Vipul Kumar <vipulk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:48 +01:00
Michal Simek
c239f49f8a arm: zynq: Remove ethernet alias for topic-miami
Ethernet is not enabled that's why this alias should be completely
unused.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:41 +01:00
Michal Simek
d78b4ae06a arm: zynq: Mark cc108 uart to be initialized before relocation
The same change is done for others zynq boards to get uart as early as
possible.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:37 +01:00
Michal Simek
3e1b61de58 arm: zynq: Update years in copyright to reflect latest changes
Updating year in zynq files. Also add missing Copyright to board.c.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:32 +01:00
Michal Simek
6c45abe709 arm64: zynqmp: Add psu_init for zcu102-rev1.0
Add low level initialization for zcu102-rev1.0.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:24 +01:00
Michal Simek
2ad341ed7d arm64: zynqmp: Prepare psu_init rework
Move generic functions to common location psu_spl_init.c. Function
declarations are added to private header.
These changes are done in connection to the fact that still files from
HDF can be copied over and compilation should pass.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:18 +01:00
Michal Simek
88f05a926d arm64: zynqmp: Call psu_init() only when ZYNQMP_PSU_INIT_ENABLED
Remove SPL_BUILD dependency from zynqmp.c and move it to header file.
Use only one symbol for including psu_init.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:12 +01:00
Michal Simek
9753c4f886 arm64: zynqmp: Remove unused empty functions
Remove functions which are no longer renerated by PCW.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:08 +01:00
Ezequiel Garcia
d55c8159bd nand: arasan: Select CONFIG_SYS_NAND_SELF_INIT
The Arasan NFC driver requires the self-init mode,
so it should select it.

Instead of having the config header define the macro,
it's cleaner to select the option at the Kconfig level.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:07 +01:00
Siva Durga Prasad Paladugu
f25ac66c52 nand: arasan_nfc: Use the calculated ecc address for updating ecc register
This patch corrects the ecc address calculation before updating
to ecc register. The ecc address has to be calculated based on
page, oob and ecc sizes of the device.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:07 +01:00
Siva Durga Prasad Paladugu
cacb8a029f nand: arasan_nfc: Add support for ondie ecc
This patch adds support for ondie ecc. As of now
this adds support for micron parts which supports
ondie ecc.
Didn't found any better way to detect ondie ecc
support by a device except sorting out with
manufacture and device id's.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:07 +01:00
Siva Durga Prasad Paladugu
b08fc34f3f nand: arasan_nfc: Move common ecc struct initialization init routine
Move common part of ecc structure initialization to
arasan_nand_init() routine.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:07 +01:00
Siva Durga Prasad Paladugu
2678059ec8 xilinx: zynqmp: Add new target with only emmc enabled
This patch adds new target which is called as mini configuration
with only emmc functionality and other required basic features enabled.
This will be used to run in system with small footprint and needs
emmc support.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:07 +01:00
Siva Durga Prasad Paladugu
c8a6bade5b xilinx: zynqmp: Add new target with only nand enabled
This patch adds new target which is called as mini configuration
with only nand functionality and other required basic features enabled.
This will be used to run in system with small footprint and needs
nand support.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:07 +01:00
Siva Durga Prasad Paladugu
3b644a3c2f arm64: zynqmp: Provide a config to not map DDR region in MMU table
DDR less systems are possible for configuration like mini qspi
and making DDR region as normal memory may cause speculative
access which results u-boot hang if DDR is absent. So, this
patch fixes the issue by not making DDR memory region
entry into MMU table.

Future solution is to prepare MMU table per memory node in dts instead
of hard code DDR addresses.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:29:03 +01:00
Michal Simek
f32e79f159 arm64: zynqmp: Propagate error value from psu_init()
psu_init() returns int which wasn't declared and checked.
The patch is fixing function declarations and code to handle return
values properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:59 +01:00
Michal Simek
7109930a70 arm64: zynqmp: Remove whitespaces in psu_init() comment
Remove additional spaces before comment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:58 +01:00
Michal Simek
427d568c31 arm: zynq: Fix pmu register description coding style
Drop the space before/after '<' and '>'; and
separate the entries to be a bit more readable.

Reported-by: Julia Cartwright <julia@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:54 +01:00
Michal Simek
a587051f5d arm: zynq: Enable distro defaults setting
BOOTCOMMAND is composed with distro_bootcmd but this variable is not
present. Enabling distro defaults setting is fixing it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:50 +01:00
Michal Simek
83144cd336 arm: zynq: Move bootcommand to defconfig
It will cleanup generic config and enable option to change it for every
board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:45 +01:00
Michal Simek
93561a327b arm: zynq: Enable DM_GPIO when needed
There are two reasons for doing this change.
There is still !DM driver for xilinx soft gpio IP and especially it is
saving some space for memory constrained boards like cse (almost ~400B).

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Michal Simek
c4a142f4a6 arm: zynq: Enable DM_ETH and DM_MMC only if subsystem is enabled
Do not enable DM_ETH/MMC if subsystems are not enabled.
This saves memory for memory constrained boards like cse.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Michal Simek
099b9ae7b7 arm: zynq: Enable BLK when needed
There is no reason to enable BLK by default for all boards which is just
increasing memory footprint for memory contrained boards like cse.
zc770s are also saving some space.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Michal Simek
92dde1a7cc arm: zynq: Disable networking for zc770 xm011
Ethernet cable is not connected for xm011 that's why disable all
ethernet related configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Michal Simek
df7810863f arm: zynq: Enable debug console for zc770 xm011
Wire debug console which is useful for early debugging.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Michal Simek
0732d7cd86 arm: zynq: Add identification string to Xilinx boards
It is good to see this string to make sure that u-boot which runs on the
board is the same which should run there.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:44 +01:00
Anders Hedlund
501fbc6744 armv8: zynqmp: Map PCIe High as device memory
Set the 8GB PCIe High area as device memory.
Also extend the DDR High area to cover the full 32GB range.

Signed-off-by: Anders Hedlund <anders.j.hedlund@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:40 +01:00
Siva Durga Prasad Paladugu
01c42d3d74 xilinx: zynqmp: Use strlen only if env_get doesn't return null
Add check if boot_targets exists in environment and then
generate new_targets env accordingly. Performing strlen on
null address causes it to fail with exception if isolation
is enabled with DDR address zero as secure. It works with out
isolation enabled as zero is valid address but it may lead to
junk values in boot_targets.
This patch fixes the issue by checking return value of env_get
so that it generate boot_targets properly.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:35 +01:00
Masahiro Yamada
3c0e607c31 ARM: zynq: remove unused CONFIG_ZC770_XM01* options
These are defined, but not referenced at all.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:34 +01:00
Michal Simek
5a60a548f7 arm: zynq: Fix types in ps7_spl_init
The patch is fixing the following Warning:
arch/arm/mach-zynq/ps7_spl_init.c:133:24: warning: comparison between
signed and unsigned integer expressions [-Wsign-compare]
    while (ioread(addr) < delay)
                        ^

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:31 +01:00
Michal Simek
77cbd9536e arm: zynq: Add support for zc770-xm011-x16 configuration
zc770-xm011 is x8 width configuration. This FMC card has also x16
variant which requires different ps7_init configuration. This patch adds
it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:25 +01:00
Michal Simek
b9b2724111 arm: zynq: Add zc770-xm013 spl configuration
Simplify ps7_init* initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:24 +01:00
Michal Simek
7f6a0d4688 arm: zynq: Add zc770-xm012 spl configuration
Simplify ps7_init* initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:24 +01:00
Michal Simek
7ad2a5b8fb arm: zynq: Add zc770-xm011 spl configuration
Simplify ps7_init* initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:24 +01:00
Michal Simek
ecd69c3e36 arm: zynq: Add zc770-xm010 spl configuration
Simplify ps7_init* initialization.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:24 +01:00
Michal Simek
546a496ffd doc: zynq: Describe status of zc770-xm011
zc770-xm011 is also added and supported. Reflect this in README.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-30 14:28:19 +01:00
Andy Shevchenko
3469bf4274 x86: zImage: Propagate acpi_rsdp_addr to kernel via boot parameters
New field acpi_rsdp_addr, which has been introduced in boot protocol
v2.14 [1], in boot parameters tells kernel the exact address of RDSP
ACPI table. Knowing it increases robustness of the kernel by avoiding
in some cases traversal through a part of physical memory.
It will slightly reduce boot time by the same reason.

[1] See Linux kernel commit

  2f74cbf ("x86/boot: Add the ACPI RSDP address to struct setup_header::acpi_rdsp_addr")
  @ https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/commit/?id=2f74cbf

for the details.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: updated the kernel commit git URL and fixed one style issue]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 14:29:07 +08:00
Andy Shevchenko
378960d8c2 x86: zImage: Move subarch assignment out of cmd_line check
The commit

  20bfac0599 ("x86: zImage: add Intel MID platforms support")

introduced an assignment of subarch field in boot parameters, though
missed the right place of doing that. It doesn't matter if we have or
not a kernel command line supplied, we just set that field. Although
guard it by protocol version which supports it.

Fixes: 20bfac0599 ("x86: zImage: add Intel MID platforms support")
Cc: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 14:29:07 +08:00
Andy Shevchenko
7b36dbdec7 x86: Fix reference to QEMU variant of write_acpi_tables()
The commit

  eece493a7a ("cmd: qfw: bring ACPI generation code into qfw core")

moves ACPI related code to another file and missed an update of
references in acpi_table.c.

Do it now.

Fixes: eece493a7a ("cmd: qfw: bring ACPI generation code into qfw core")
Cc: Miao Yan <yanmiaobest@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 14:29:07 +08:00
Andy Shevchenko
3ffb33d636 x86: tangier: Make _CRS for BTH0 Serialized to avoid warning
ASL compiler warns:

  ASL     board/intel/edison/dsdt.asl
  board/intel/edison/dsdt.asl.tmp    238:             Method (_CRS, 0, NotSerialized)
  Remark   2120 -      Control Method should be made Serialized ^  (due to creation of named objects within)

Do as suggested by ASL compiler.

Fixes: 5d8c4ebd95 ("x86: tangier: Add Bluetooth to ACPI table")
Reported-by: Ferry Toth <fntoth@gmail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 14:29:07 +08:00
Heinrich Schuchardt
368e86d983 configs: x86: allow to override CONFIG_BOOTCOMMAND
Allow to override CONFIG_BOOTCOMMAND in .config.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-30 14:29:07 +08:00
Tom Rini
eef11aceba Prepare v2018.03-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-29 20:12:33 -05:00
Klaus Goger
0b674a3120 spl: include timezone in banner
Include the timezone in the SPL banner so the timestamp matches with
that from u-boot proper.

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-29 12:50:13 -05:00
Андрей Мозжухин
af09eba64f aes: Allow non-zero initialization vector
AES encryption in CBC mode, in most cases, must be used with random
initialization vector. Using the same key and initialization vector several
times is weak and must be avoided.

Added iv parameter to the aes_cbc_encrypt_blocks and aes_cbc_decrypt_blocks
functions for passing initialization vector.

Command 'aes' now also require the initialization vector parameter.

Signed-off-by: Andrey Mozzhuhin <amozzhuhin@yandex.ru>
2018-01-29 12:50:13 -05:00
Masahiro Yamada
1414e09b4f kconfig: revert change that was not needed for -Wformat-security
Recent GCC versions warn if the format string is not a literal
because the compiler cannot check the argument validity at compile
time.

Commit 192bc6948b ("Fix GCC format-security errors and convert
sprintfs.") blindly replaced sprintf() with strcpy(), including
many cases where the format parameter is a string literal.

For the kconfig change:

    sprintf(header, "   ");

..., here the format parameter is a string literal "   ", so it is
definitely equivalent to:

    strcpy(header, "   ");

Of course, if the 'header' did not have enough length for containing
"   ", it would be a security problem, but another problem.  (in this
case, the 'header' is 4 byte length buffer, so it is not a problem at
all.)

The kconfig code is kept as synced with Linux as possible, but this
change made the code out-of-sync for nothing.  Just reverting.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-29 12:50:13 -05:00
Tom Rini
f39bfec230 fs: btrfs: Fix printf format character warning
When printing a size_t value we need to use %zu for portability between
32bit and 64bit targets.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Marek Behun <marek.behun@nic.cz>
2018-01-29 12:50:08 -05:00
Tom Rini
c5e6e9b3d6 mvpp2: Fix warning over 32bit vs 64bit targets
When we have a driver that is used on both 32bit and 64bit targets and
we are talking about address space we cannot use u64 nor u32 and instead
need to use phys_addr_t.

Fixes: 377883f16d ("net: mvpp2x: fix phy connected to wrong mdio issue")
Cc: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-29 12:48:34 -05:00
Patrice Chotard
05e23dd489 clk: clk_stm32: Add .set_rate callback
Since 'commit f4fcba5c5b ("clk: implement clk_set_defaults()")'
STM32F4 family board can't boot.

Above patch calls clk_set_rate() for all nodes with assigned-clock-rates
property. Clock driver for STM32F family doesn't implement .set_rate
callback which make clk_set_defaults() exit on error and prevent board
to boot.

Fixes: f4fcba5c5b ("clk: implement clk_set_defaults()")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-29 12:48:33 -05:00
Patrice Chotard
a70c05f10a board: stm32: Fix stm32f746-disco boot
Since 'commit af2f44267 ("fdc spl: use different BOARD_INIT MACRO for spl and tpl")'
board stm32f746-disco can't boot.

The macro CONFIG_IS_ENABLED() can't evaluate the value of
CONFIG_SPL_BOARD_INIT as it was defined in include/configs/stm32f746-disco.h
without attributed value.

Moving CONFIG_SPL_BOARD_INIT from stm32f746-disco.h to mach-stm32/Kconfig
fixes this issue.

Fixes: af2f44267 ("fdc spl: use different BOARD_INIT MACRO for spl and tpl")
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-29 12:48:30 -05:00
Alexander Graf
ae5326a6b3 serial: Make full device search optional
Commit 608b0c4ad4 ("serial: Use next serial device if probing fails")
added code to search for more serial devices if the default one was not
probed correctly.

Unfortunately, that breaks omap3_evm. So while investigating why that is
the case, let's disable the full search for everyone but bcm283x where it
is needed.

Fixes: 608b0c4ad4 ("serial: Use next serial device if probing fails")
Reported-by: Derald D. Woods <woods.technical@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-29 08:18:02 -05:00
Tom Rini
06bfb9f37c Merge git://git.denx.de/u-boot-marvell 2018-01-29 08:17:28 -05:00
Tom Rini
3703526f1e Merge git://git.denx.de/u-boot-cfi-flash 2018-01-29 08:17:13 -05:00
Andreas Färber
ceb3281803 tools/mrvl_uart.sh: Tidy script output
Fix a typo in help output (awailable -> available).
Tidy the grammar - not the board connects to a port, we do.

While at it, be consistent in upper-casing the comments.

Fixes: eee4835d22 ("tools: Add Marvell recovery image download script")
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 13:36:32 +01:00
Andreas Färber
3e00c48ef0 tools/mrvl_uart.sh: Fix minicom baudrate
minicom doesn't inherit the baudrate from stty but uses its own
defaults, such as for example 57600, whereas we expect 115200 here.
Explicitly tell minicom which baudrate to use.

Fixes: eee4835d22 ("tools: Add Marvell recovery image download script")
Cc: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 13:36:32 +01:00
Mario Six
d9a356972b cfi_flash: Always define cfi_flash_num_flash_banks
The variable cfi_flash_num_flash_banks is defined iff
CONFIG_SYS_MAX_FLASH_BANKS_DETECT is defined, but it is used
unconditionally in the function cfi_flash_init_dm. This leads to a
undefined variable compile error when CONFIG_SYS_MAX_FLASH_BANKS_DETECT
is not defined, but DM is enabled.

Fix this by always defining the cfi_flash_num_flash_banks variable.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:59 +01:00
Mario Six
c0350fbf4c cfi_flash: Fix indention
When long expressions surrounded by parentheses are split into multiple
lines, each consecutive line should be aligned with the corresponding
parenthesis. Fix all instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:59 +01:00
Mario Six
ddcf05403d cfi_flash: Fix long lines
Long lines (>80 characters) should be avoided where possible. Break up
some long lines where it's not detrimental to readability.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:59 +01:00
Mario Six
5701ba8289 cfi_flash: Bound-check index before array access
In a while loop in cfi_flash.c the array "start" is accessed at the index
"sector" before the index variable "sector" is bounds-checked, which
might lead to accesses beyond the bounds of the array.

Swap the order of the checks in the "&&" expression, so that the
short-circuit evaluation prevents out-of-bounds array accesses.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:59 +01:00
Mario Six
9dbaebcf9f flash: Fix spelling of "ERR_TIMOUT"
checkpatch.pl complains about the spelling of ERR_TIMOUT. Since the
error is only used in a handful of files, we rename the error to
ERR_TIMEOUT.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:59 +01:00
Mario Six
c8a9a82c10 cfi_flash: Rename camel-case variables
Camel-case naming should be avoided. Rename two camel-case variables,
and fix their usage accordingly.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
876c52f3c3 cfi_flash: Fix strings split across lines
Strings should not be split accross multiple lines. Where possible and
not detrimental to readability, fix the instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
5312838dd5 cfi_flash: Use u8 pointers instead of void pointers
According to the C standard, pointer arithmetic for pointers of type
void is undefined behavior (the assumption that they're 8-bit wide is a
GCC-specific assumption). In the interest of keeping the code
standards-compliant, and also better communicate intent, switch all
void* variables where pointer arithmetic is used to u8* variables.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
d3525b6bb0 cfi_flash: Remove assignments from if conditions
The condition in if statements should not be used for variable
assignment. Instead, the assignment should be done in a separate step
beforehand. Fix all instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
ab61cfb857 cfi_flash: Remove return from void function
void functions don't need an explicit return at the end.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
0cec0a12f9 cfi_flash: Fix placement of brace
The opening brace of block statements should be attached to the
statement itself, and not be on a separate line.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
9860137fbc cfi_flash: Fix else after break
If in a loop, the if block in a if/else statement ends in a break, the
statements in the else blockcan be extracted, since the break stops the
execution.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
9f720216b7 cfi_flash: Fix spelling of "Unknown"
"Unkown" should be spelled "Unknown".

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
12d7fed9b9 cfi_flash: Add missing braces in blocks
In if/else statements, either both blocks (if and else) should have
braces or both blocks should not have braces, but mixed configurations
are discouraged. Fix all instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
4f89da49e7 cfi_flash: Remove unnecessary braces
"==" and "!=" bind tighter than the boolean operators, so parentheses
around them in compound logical statements are unnecessary. Fix all
instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
a6d18f27c3 cfi_flash: Fix comment style
Comment blocks should end with a "*/" on a separate line, not with the
"*/" attached to the end of the last line of text. Fix all instances
where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
38d2831d3b cfi_flash: Use __func__ macro instead of function name
printf/debug statements should not include the file name as a hardcoded
string, but instead use the __func__ macro. Fix all instances where this
occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
88ecd8bf7c cfi_flash: Fix logical continuations
When splitting long logical statements across multiple lines, the
logical operators should be at the end of the lines. Fix all instances
where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
0412e903e4 cfi_flash: Remove braces for single-statement blocks
Blocks with a single statement should not be enclosed in braces. Fix all
instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
7223a8cb27 cfi_flash: Fix missing/superfluous lines
There should be no consecutive blank lines, and no blank lines at the
end of blocks. But there should be blank lines between variable
declarations and code. Fix all instances where either occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
640f4e35de cfi_flash: Fix spacing around casts/operators
There should be spaces around operators, and no spaces between a cast
and the variable its being applied to. Fix all instances where this
occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
dde0913b85 cfi_flash: Fix indent of case statements
case statements should be at the same level of indent as the switch
keyword. Fix all instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
db91bb242f cfi_flash: Fix whitespace with casting
When casting to a pointer type, the asterisk should be attached to the
type name, not separated by a space. Fix all instances where this
occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
b168386ba9 cfi_flash: Fix Parenthesis spacing
There should not be additional spaces when nesting parentheses
("( (...) )"). Fix all instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
ca2b07a8d4 cfi_flash: Fix style of pointer declarations
In a pointer declaration there should not be a space between the
asterisk and the pointer name. Fix all instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Mario Six
188a55651f cfi_flash: Fix space between function name and parenthesis
There should not be a space between a function name and a parenthesis
("func (...)"). Fix all instances where this occurs.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-29 07:48:58 +01:00
Tom Rini
bd39d86420 Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-01-28

This is the second part of patches for 2018.03-rc1, fixing
a few minor issues and adding a readme file for iSCSI booting.
2018-01-28 18:26:00 -05:00
Heinrich Schuchardt
29a8a2828e efi_loader: add a README.iscsi describing booting via iSCSI
The appended README explains how U-Boot and iPXE can be used
to boot a diskless system from an iSCSI SAN.

The maintainer for README.efi and README.iscsi is set.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: s/Adress/Address/]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 21:37:13 +01:00
Heinrich Schuchardt
4a8b5e7900 efi_loader: consistently use %pD to print device paths
Now that we have %pD support in vsprintf we should avoid separate
logic for printing device paths in other places.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 21:37:13 +01:00
Heinrich Schuchardt
7df5af6f3a efi_loader: do not install NULL as device path
In an image is loaded from memory we do not have a device path.
Do not install NULL as device path in this case.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 21:37:13 +01:00
Heinrich Schuchardt
5f1ce1d4ca vsprintf.c: correct printing of a NULL device path
When printing '%pD' with a value of NULL we want to output
'<NULL>'. But this requires copying to buf. Leave this
to string16.

A unit test is supplied which relies on EFI support in the sandbox.

The development for EFI support in the sandbox is currently in branch
u-boot-dm/efi-working. The branch lacks commit 6ea8b580f0 ("efi_loader:
correct DeviceNodeToText for media types"). Ater rebasing the aforementioned
branch on U-Boot v2018.01 and adding 256060e425 and this patch the test
is executed successfully.

Fixes: 256060e425 (vsprintf.c: add EFI device path printing)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 21:37:13 +01:00
Alexander Graf
56672bf52e efi_loader: Call Exit() on return from payload in StartImage()
When a UEFI payload just returns instead of calling the Exit() callback,
we handle that in efi_do_enter() and call Exit on its behalf, so that
the loaded_image->exit_status value is correct.

We were missing that logic in StartImage(). Call it there too.

Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 21:37:13 +01:00
Heinrich Schuchardt
c8df80c514 efi_loader: fix comments in indent_string()
Provide a better description for indent_string.
Fix a typo.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 21:37:13 +01:00
Heinrich Schuchardt
49db1cb8c3 efi_loader: catch misspelled bootefi subcommand
If 'bootefi hello' or 'bootefi selftest' can be executed depends on the
configuration.

If an invalid non-numeric 1st argument is passed to bootefi, e.g.
'bootefi hola', this string is converted to 0 and U-Boot jumps to
this typically invalid address.

With the patch the online help is shown instead.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 21:37:13 +01:00
Alexander Graf
c6fa5df6aa efi_loader: Always use EFIAPI instead of asmlinkage
EFI calls are usually defined as asmlinkage. That means we pass all parameters
to functions via the stack x86_32.

On x86_64 however, we need to also stick to the MS ABI calling conventions,
which the EFIAPI define conveniently handles for us. Most EFI functions were
also marked with EFIAPI, except for the entry call.

So this patch adjusts all entry calls to use EFIAPI instead of the manual
asmlinkage attribute.

While at it, we also change the prototype of the entry point to return
efi_status_t instead of ulong, as this is the correct prototype definition.

Signed-off-by: Alexander Graf <agraf@suse.de>

---

v1 -> v2:

  - Use efi_status_t in all occurences
2018-01-28 21:37:13 +01:00
Alexander Graf
6698bb343f efi: Conflict efi_loader with different stub bitness
We have 2 users of the EFI headers: efi_loader and the EFI stub. Efi_loader
always expects that the bitness of the definitions it uses is identical to
the execution.

The EFI stub however allows to run x86_64 U-Boot on 32bit EFI and the other
way around, so it allows for different bitness of EFI definitions and U-Boot
environment.

This patch explicitly requests via Kconfig that efi_loader can only be enabled
if the bitness is identical. Because we can run efi_loader on x86_64 without
EFI stub enabled, it also ensures that this case propagates the correct ABI
constraints.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 21:37:13 +01:00
Tom Rini
f2ee915018 Merge git://git.denx.de/u-boot-rockchip 2018-01-28 13:56:19 -05:00
Adam Ford
4f6c7b12ed omap3_logic: Clean up I2C pin muxing.
The SOM has external pull-up resistors, so let's turn these off.
It was helping reduce some errors when running I2C1 @ 2.6MHz.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-28 12:27:37 -05:00
Anatolij Gustschin
0292bc0d13 spl: add option to disable SPL banner output
Selecting this option will reduce SPL boot time by approx. 6 ms
(e. g. with 70 bytes long banner string at 115200 baud).

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 12:27:36 -05:00
Alexander Graf
9821636b64 bcm2835_pinctrl: Probe pre-reloc
The serial drivers now depend on the pinctrl driver to determine whether
they are enabled. That means if a serial device wants to be used pre-reloc,
we also need the pinctrl device pre-reloc.

Adapt the pinctrl driver as well as dts overlay accordingly.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:36 -05:00
Alexander Graf
6001985f92 bcm2835_pl011_serial: Add BCM2835 specific serial driver
On bcm2835 we need to ensure we only access serial devices that are
muxed to the serial output pins of the pin header. To achieve this
for the pl011 device, add a bcm2835 specific pl011 wrapper device
that does this check but otherwise behaves like a pl011 device.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:36 -05:00
Alexander Graf
958d55f26c MAINTAINERS: Take over BCM2835 maintainership
It seems as if I have more interest in BCM2835 support than most others,
so I'll bite the bullet and declare myself maintainer. It'd be a shame
to leave that platform orphaned.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:36 -05:00
Alexander Graf
fa4875942a bcm2835_mu_serial: Convert to Kconfig
Setting config options using headers is deprecated. This patch converts
the BCM2835 Mini-UART to Kconfig.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:36 -05:00
Alexander Graf
cf2c7784bd pl01x: Convert CONFIG_PL01X_SERIAL to Kconfig
We want to use Kconfig logic to depend on whether pl01x devices
are built in, so let's convert their inclusion selection to Kconfig.

This round goes to pl01x.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:35 -05:00
Alexander Graf
d10fc50f78 pl011: Convert CONFIG_PL011_SERIAL to Kconfig
We want to use Kconfig logic to depend on whether pl01x devices
are built in, so let's convert their inclusion selection to Kconfig.

This round goes to pl011.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:35 -05:00
Alexander Graf
884f901368 pl010: Convert CONFIG_PL010_SERIAL to Kconfig
We want to use Kconfig logic to depend on whether pl01x devices
are built in, so let's convert their inclusion selection to Kconfig.

This round goes to pl010.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:35 -05:00
Alexander Graf
b31116308c pl01x: Convert to dev_read
The fdtdec API is deprecated, convert the pl010 and pl011 devices to
use the dev_read API instead.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:34 -05:00
Alexander Graf
9dfeffe2f9 serial_bcm283x_mu: Fail loading if not muxed
The bcm283x mini-uart is only really usable as U-Boot serial output
when it is muxed to the UART pins of the RPi pin header.

So fail probing in case it is not muxed correctly, as in that case
firmware did not initialize it properly either.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:34 -05:00
Alexander Graf
bceab8d569 serial_bcm283x_mu: Always skip init
The serial initialization doesn't always quite work for me, so let's
always skip it for now. We know that firmware on the RPi initializes
us properly already.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:34 -05:00
Alexander Graf
80d5001c30 serial_bcm283x_mu: Convert to dev_read
The fdtdec API got deprecated in favor of dev_read calls.
Use those instead.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:34 -05:00
Alexander Graf
71fc2e1459 rpi: Determine PL011/Mini-UART availability at runtime
Firmware on the Raspberry Pi family of devices can dynamically configure either
the PL011, Mini-UART or no device at all to be routed to the user accessible
UART pins.

That means we need to always include both drivers, because we can never be sure
which of the two serial devices firmware actually chooses to use.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:33 -05:00
Alexander Graf
fc8523a147 serial: bcm283x_mu: Remove support for post-init disabling
We are switching to a model where a serial device doesn't even get probed when
it's not muxed properly, so we don't need device specific disabling
functionality anymore.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:33 -05:00
Alexander Graf
55b8a2ddaa rpi: Remove runtime disabling support for serial
We are switching to a model where our board file can directly fail probing
of serial devices when they're not usable, so remove the current runtime
hack we have.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:33 -05:00
Alexander Graf
608b0c4ad4 serial: Use next serial device if probing fails
Currently our serial device search chokes on the fact that the serial
probe function could fail. If it does, instead of searching for the next
usable serial device, it just quits.

This patch changes the fallback logic so that even when a serial device
was not probed correctly, we just try the next ones until we find one that
works.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 12:27:33 -05:00
Faiz Abbas
b442e16b87 am33xx: board: Call spl_early_init() to support sdram_init()
With driver model enabled in SPL, sdram_init() requires device tree
and malloc to be initialized.
Therefore call spl_early_init() in early_system_init().

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-28 12:27:33 -05:00
Felix Brack
85ab0452fe arm: add support for PDU001
This patch adds support for the PDU001 board.

Signed-off-by: Felix Brack <fb@ltec.ch>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-28 12:27:32 -05:00
Alexander Graf
c8a73a26d6 mmc: Add bcm2835 sdhost controller
The BCM2835 family of SoCs has 2 different SD controllers: One based on
the SDHCI spec and a custom, home-grown one.

This patch implements a driver for the latter based on the Linux driver.
This is needed so that we can make use of device trees that assume driver
presence of both SD controllers.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:32 -05:00
Alexander Graf
caf2233b28 bcm283x: Add pinctrl driver
The bcm283x family of SoCs have a GPIO controller that also acts as
pinctrl controller.

This patch introduces a new pinctrl driver that can actually properly mux
devices into their device tree defined pin states and is now the primary
owner of the gpio device. The previous GPIO driver gets moved into a
subdevice of the pinctrl driver, bound to the same OF node.

That way whenever a device asks for pinctrl support, it gets it
automatically from the pinctrl driver and GPIO support is still available
in the normal command line phase.

Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-28 12:27:32 -05:00
Tuomas Tynkkynen
8996975ff8 powerpc: Drop CONFIG_WALNUT and other related dead code
CONFIG_WALNUT was dropped in June 2017 in:
commit 98f705c9ce ("powerpc: remove 4xx support")

While at it, the related CONFIG_MACH_SPECIFIC and the have_of
and _machine variables are unused as well, so drop them too.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-28 12:27:32 -05:00
Masahiro Yamada
662282203a libfdt: migrate include/libfdt_env.h to a wrapper
libfdt_env.h is supposed to provide system-dependent defines.

scripts/dtc/libfdt/libfdt_env.h from upstream DTC is suitable
for user-space, so we should use this for USE_HOSTCC case.

For compiling U-Boot, we need to override such system-dependent
defines, so use <linux/libfdt_env.h> imported from Linux.

<libfdt.h> selects a proper one.  Maybe, we should split header
inclusion completely, but I do not want too many patches at one.

I can rip off the include/libfdt_env.h from HOST_EXTRACFLAGS.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 12:27:31 -05:00
Masahiro Yamada
144fbea969 libfdt: migrate libfdt.h to a wrapper + U-Boot own code
There is tons of code duplication between lib/libfdt/libfdt.h and
scripts/dtc/libfdt/libfdt.h.  Evacuate the U-Boot own code to
include/libfdt.h and remove lib/libfdt/libfdt.h.

For host tools, <libfdt.h> should include scripts/dtc/libfdt/libfdt.h,
which is already suitable for user-space.

For compiling U-Boot, <linux/libfdt.h> should be included because we
need a different libfdt_env.h .

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-28 12:27:31 -05:00
Masahiro Yamada
25ad202dd3 libfdt: move working_fdt and FDT_RAMDISK_OVERHEAD to include/libfdt.h
libfdt_env.h exists to contain system-dependent defines:

  - typedef of fdt*_t
  - fdt*_to_cpu(), cpu_to_fdt*

working_fdt and FDT_RAMDISK_OVERHEAD are unrelated to the environment,
so they must get out of this header.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 12:27:31 -05:00
Masahiro Yamada
d2bf1152c0 tools: include necessary headers explicitly
Several host-tools use "bool" type without including <stdbool.h>.
This relies on the crappy header inclusion chain.

tools/Makefile has the following line:

  HOST_EXTRACFLAGS += -include $(srctree)/include/libfdt_env.h \

All host-tools are forced to include libfdt_env.h even if they are
totally unrelated to FDT.  Then, <stdbool.h> is indirectly included
as follows:

     include/libfdt_env.h
  -> include/linux/types.h
  -> <stdbool.h>

I am fixing this horrible crap.  In advance, I need to add necessary
include directives explicitly.  tools/fdtgrep.c needs more; <fctl.h>
for open() and <errno.h> for errno.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 12:27:31 -05:00
Masahiro Yamada
b0bd96c858 libfdt: fix <linux/libfdt.h>
I do not remember why, but this is apparently a file-copy mistake.
The file name is libfdt.h, but its content is that of libfdt_env.h

Re-import it from upstream Linux.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 12:27:30 -05:00
Masahiro Yamada
ae9ace7089 libfdt: migrate fdt_rw.c to a wrapper of scripts/dtc/libfdt/fdt_rw.c
The only difference between scripts/dtc/libfdt/fdt_rw.c and
lib/libfdt/fdt_rw.c is fdt_remove_unused_strings().

It is only used by fdtgrep, so we do not need to compile it for U-Boot
image.  Move it to tools/libfdt/fdw_rw.c so that lib/libfdt/fdt_rw.c
can be a wrapper of scripts/dtc/libfdt/fdt_rw.c.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 12:27:30 -05:00
Masahiro Yamada
94b13bbae9 host-tools: use python2 explicitly for shebang
All of these host tools are apparently written for Python2,
not Python3.

Use 'python2' in the shebang line according to PEP 394
(https://www.python.org/dev/peps/pep-0394/).

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 12:27:30 -05:00
Derald D. Woods
56d1dded62 ARM: omap3: evm: Fix distro bootcmd UBIFS and MMC support
The omap3_evm board does not boot when commit:
    a47ca2cf67 ("ARM: omap3: evm: Add kernel image loading from UBIFS and EXT4")
is applied after commit:
    3dde8f2037 ("Merge git://git.denx.de/u-boot-mmc")

This commit reduces the CONFIG_EXTRA_ENV_SETTINGS size and better
leverages the existing distro bootcmd infrastructure.

- Use updated UBIFS support from config_distro_bootcmd.h
- Use LEGACY_MMC naming found in am335x_evm.h and ti_omap4_common.h
- Remove extra environment content that is no longer needed

[MMC(0:1)/extlinux/extlinux.conf]
---8<-------------------------------------------------------------------
default omap3-evm-mmc-fat
label omap3-evm-mmc-fat
	kernel /zImage
	fdt /omap3-evm.dtb
	append console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
---8<-------------------------------------------------------------------

[MMC(0:2)/boot/extlinux/extlinux.conf]
---8<-------------------------------------------------------------------
default omap3-evm-mmc-ext4
label omap3-evm-mmc-ext4
	kernel /boot/zImage
	fdt /boot/omap3-evm.dtb
	append console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
---8<-------------------------------------------------------------------

[NAND(ubi0:rootfs)/boot/extlinux/extlinux.conf]
---8<-------------------------------------------------------------------
default omap3-evm-nand-ubifs
label omap3-evm-nand-ubifs
	kernel /boot/zImage
	fdt /boot/omap3-evm.dtb
	append console=ttyO0,115200n8 root=ubi0:rootfs rw ubi.mtd=rootfs noinitrd rootfstype=ubifs rootwait
---8<-------------------------------------------------------------------

Fixes: a47ca2cf67 ("ARM: omap3: evm: Add kernel image loading from UBIFS and EXT4")
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2018-01-28 12:27:30 -05:00
Derald D. Woods
6e1364fe45 distro bootcmd: Allow board defined UBI partition and volume names
This commit allows overriding the default assumption that the boot UBI
MTD partition is named 'UBI' and the UBI volume is 'boot'. A board
desiring to use a legacy or alternative NAND layout can now define the
following two extra environment variables:

	bootubipart=<some_ubi_partition_name>
	bootubivol=<some_ubi_volume_name>

EXAMPLE:

[include/configs/some_board.h]
---8<-------------------------------------------------------------------
[...]
	#include <config_distro_defaults.h>

	#define MEM_LAYOUT_ENV_SETTINGS \
		DEFAULT_LINUX_BOOT_ENV

	#define BOOT_TARGET_DEVICES(func) \
		func(UBIFS, ubifs, 0)

	#include <config_distro_bootcmd.h>
[...]
	#define CONFIG_EXTRA_ENV_SETTINGS \
		MEM_LAYOUT_ENV_SETTINGS \
		"bootubivol=rootfs\0" \
		"bootubipart=rootfs\0" \
		BOOTENV
[...]
---8<-------------------------------------------------------------------

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2018-01-28 12:27:29 -05:00
Kever Yang
af2f44267f spl: use different BOARD_INIT MACRO for spl and tpl
SPL and TPL may not always need spl_board_init() at the same time.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 12:27:29 -05:00
Alberto Sánchez Molero
2021f083ed fs: btrfs: Fix unaligned memory accesses
Loading files stored with lzo compression from a btrfs filesystem was
producing unaligned memory accesses, which were causing a data abort
and a reset on an Orange Pi Zero.

The change in hash.c is not triggered by any error but follows the
same pattern. Please confirm.

Fixed according to doc/README.unaligned-memory-access.txt

Signed-off-by: Alberto Sánchez Molero <alsamolero@gmail.com>
Tested-by: Robert Nelson <robertcnelson@gmail.com>
2018-01-28 12:27:12 -05:00
Kever Yang
0289e291a5 spl: atf: pass NULL for bl32_ep pc
ATF use bl32_ep_info->pc to decide if thre is an available bl32,
let's mark it as NULL first.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:39 +01:00
Eddie Cai
451dcf5cd0 rockchip: rk3036: enable rockusb support on rk3036 based device
Rockchip Rockusb driver already merged. So we enable rockusb
support on rk3036 based device.

Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:39 +01:00
Kever Yang
2147c0d253 rockchip: dts: rk3128: update pwm-cell for pwm0
The backlight pwm-cell is 3.

This remove the warning in buildman:
arch/arm/dts/rk3126-evb.dtb: Warning (pwms_property): Property 'pwms', cell 3 is not a phandle reference in /backlight
arch/arm/dts/rk3126-evb.dtb: Warning (pwms_property): Missing property '#pwm-cells' in node /sram@10080400 or bad phandle (referred from /backlight:pwms[3])

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:39 +01:00
Philipp Tomsich
75b381aae8 rockchip: clk: guard set_parent implementations against OF_PLATDATA
The set_parent implementations do not make sense when OF_PLATDATA is
enabled.  We guard these against OF_PLATDATA and don't populate the
set_parent-op when this is the case.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:39 +01:00
David Wu
64a12202ed clk: rockchip: clk_rk3368: Implement "assign-clock-parent"
Implement the setting parent for gmac clock, and add internal
pll div set for mac clk.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:39 +01:00
David Wu
01c60eafbb clk: rockchip: clk_rk3288: Implement "assign-clock-parent" and "assign-clock-rate"
The RK3288 CRU-node assigns rates to a number of clocks that are not
implemented in the RK3288 clock-driver (but which have been
sufficiently initialised from rkclk_init()): for these clocks, we
implement the gmac clock set parent, but simply ignore the
others' set_rate() operation and return 0 to signal success.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:39 +01:00
David Wu
c513e9e1e6 ARM: dts: rk3288: Remove unused LCDC clock assigned
The LCDC assigned rate is 0, it will make boot error,
error log:"pll_para_config: the frequency can not be
 0 Hz". Remove them, and the lcdc driver will do the
correct clock rate setting.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:38 +01:00
David Wu
a50e5c9e33 config: evb-rk3229: Enable rk gmac configs
Add gmac config support for rk3229 evb.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:38 +01:00
David Wu
d12d7c09eb net: gmac_rockchip: Add support for the RK3228 GMAC
The GMAC in the RK3228 once again is identical to the incarnation in
the RK3288 and the RK3399, except for where some of the configuration
and control registers are located in the GRF.

This adds the RK3368-specific logic necessary to reuse this driver.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:38 +01:00
David Wu
5bb616c6e2 clk: rockchip: Add rk322x gamc clock support
Assuming mac_clk is fed by an external clock, set clk_rmii_src
clock select control register from IO for rgmii interface.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:38 +01:00
David Wu
20ee0fd825 rockchip: pinctrl: Add rk322x gmac pinctrl support
Set gmac pins iomux and rgmii tx pins to 12ma drive-strength,
clean others to 2ma.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:38 +01:00
David Wu
424324d3ca rockchip: pinctrl: rk322x: Move the iomux definitions into pinctrl-driver
Clean the iomux definitions at grf_rk322x.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.
After that, define the uart2 iomux at rk322x-board file.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:38 +01:00
David Wu
c132f38d24 rockchip: dts: rk3328-evb: Enable gmac2io for rk3328-evb
Add rk3328-evb gmac support.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:38 +01:00
David Wu
832762c145 rockchip: dts: rk3328: Add gmac2io support
Add basic dts configuration for rk3328 gmac2io.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:37 +01:00
David Wu
37cf651f6e rockchip: configs: Enable GMAC configs for evb-rk3328
Enable GMAC configs for evb-rk3328

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:37 +01:00
David Wu
b3d2a6df30 net: gmac_rockchip: Add rk3328 gmac support
The GMAC2IO in the RK3328 once again is identical to the incarnation in
the RK3288 and the RK3399, except for where some of the configuration
and control registers are located in the GRF.

This adds the RK3328-specific logic necessary to reuse this driver.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:37 +01:00
David Wu
7cd4ebab2b clk: rockchip: Add rk3328 gamc clock support
The rk3328 soc has two gmac controllers, one is gmac2io,
the other is gmac2phy. We use the gmac2io rgmii interface
for 1000M phy here.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:37 +01:00
David Wu
dfb886d4f2 rockchip: pinctrl: Add rk3328 gmac pinctrl support
Need to set gmac m1 pins iomux, gmac m0 tx pins, select bit2
and bit10 at com iomux register. After that, set rgmii m1 tx
pins to 12ma drive-strength, and clean others to 2ma.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:37 +01:00
David Wu
301fff4e57 rockchip: pinctrl: rk3328: Move the iomux definitions into pinctrl-driver
Clean the iomux definitions at grf_rk3328.h, and move them into
pinctrl-driver for resolving the compiling error of redefinition.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:37 +01:00
David Wu
caf746172b net: gmac_rockchip: Add support for the RV1108 GMAC
The rv1108 GMAC only support rmii interface, so need to add the
set_rmii() ops. Use the phy current interface to set rmii or
rgmii ops. At the same time, need to set the mac clock rate of
rmii with 50M, the clock rate of rgmii with 125M.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:37 +01:00
David Wu
77c4261130 rockchip: pinctrl: rv1108: Move the iomux definitions into pinctrl-driver
If we include both the rk3288_grf.h and rv1108_grf.h, it will cause the
conflicts of redefinition. Clean the iomux definitions at grf_rv1108.h,
and move them into pinctrl-driver.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:36 +01:00
David Wu
0788a31e03 rockchip: grf_rv1108.h: Fix the grf offsets
The last 4 grf registers offset of rv1108 are wrong, fix them
for correct usage.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:36 +01:00
David Wu
c422c4fa31 rockchip: configs: Enable CONFIG_NET_RANDOM_ETHADDR for rk3288-evb
If the Ethernet address is not set, the network can't work,
enable the random address config for default use.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:36 +01:00
David Wu
dc5b201384 rockchip: dts: rk3399-evb: Change the tx/rx delay value for transmission quality
Give the mac controller the correct tx-delay and rx-delay value
for the rgmii mode transmission. If they are not matched, there
would be Ethernet packets lost, the net feature may not work.

Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-28 17:12:36 +01:00
Philipp Tomsich
d2f1f1abaf rockchip: clk: rk3399: accept all assigned-clocks from the 'cru'-node
The RK3399 CRU-node assigns rates to a number of clocks that are not
implemented in the RK3399 clock-driver (but which have been
sufficiently initialised from rkclk_init()): for these clocks, we
simply ignore the set_rate() operation and return 0 to signal success.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: David Wu <david.wu@rock-chips.com>

Series-changes: 2
- Fixed David's email address.
2018-01-28 17:12:36 +01:00
Philipp Tomsich
f4fcba5c5b clk: implement clk_set_defaults()
Linux uses the properties 'assigned-clocks', 'assigned-clock-parents'
and 'assigned-clock-rates' to configure the clock subsystem for use
with various peripheral nodes.

This implements clk_set_defaults() and hooks it up with the general
device probibin in drivers/core/device.c: when a new device is probed,
clk_set_defaults() will be called for it and will process the
properties mentioned above.

Note that this functionality is designed to fail gracefully (i.e. if a
clock-driver does not implement set_parent(), we simply accept this
and ignore the error) as not to break existing board-support.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: David Wu <david.wu@rock-chips.com>

Series-changes: 2
- Fixed David's email address.

Series-version: 2

Cover-letter:
clk: support assigned-clock, assigned-clock-parents, assigned-clock-rates

For various peripherals on Rockchip SoCs (e.g. for the Ethernet GMAC),
the parent-clock needs to be set via the DTS.  This adds the required
plumbing and implements the GMAC case for the RK3399.
END
2018-01-28 17:12:36 +01:00
Philipp Tomsich
a45f17e8b9 rockchip: clk: rk3399: implement set_parent() operation
This implements the (newly added) set_parent() operation for the
RK3399 with a focus on allowing the RGMII clock parent to be
configured via the assigned-clock-parents property of the GMAC node.

This implementation supports only the GMAC (in fact only the RGMII
clock parent) and allows to set this clock's parent either to the
internal SCLK_GMAC or to an external clock input (identifiable by it
providing a 'clock-output-name' of "gmac_clkin").

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: David Wu <david.wu@rock-chips.com>

Series-changes: 2
- Fixed David's email address.
2018-01-28 17:12:36 +01:00
Philipp Tomsich
95f9a7e595 clk: refactor clk_get_by_index() into clk_get_by_indexed_prop()
The logic in clk_get_by_index() may be useful for other properties
than 'clocks': e.g. 'assigned-clocks' and 'assigned-clock-parents'
follows the same model.

This commit refactors clk_get_by_index() by introducing an internal
function clk_get_by_indexed_prop() that allows to specify the name
of the property to process.  The original clk_get_by_index() call
is simply directed through this helper function with the property
name fixed to "clocks".

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: David Wu <david.wu@rock-chips.com>

Series-changes: 2
- Fixed David's email address.
2018-01-28 17:12:35 +01:00
Philipp Tomsich
f7d1046da1 clk: add clk_set_parent()
Clocks may support multiple parents: this change introduces an
optional operation on the clk-uclass to set a clock's parent.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Tested-by: David Wu <david.wu@rock-chips.com>

Series-changes: 2
- Fixed David's email address.
2018-01-28 17:12:35 +01:00
Patrice Chotard
990dba6498 clk: clk_stm32f: Fix PLLSAICFGR_PLLSAIP_4 divider value
PLLSAIP divider uses 2 bits (bits 16 and 17) into RCC_PLLSAICFGR
register, available combination are :
  00: PLLSAIP = 2
  01: PLLSAIP = 4
  10: PLLSAIP = 6
  11: PLLSAIP = 8

Previously, the divider value was incorrectly set to 6.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28 09:39:15 -05:00
Faiz Abbas
a93feb2edc ARM: AM43XX: Call hw_data_init() again after relocation to update *ctrl
hw_data_init() is called before relocation to initialise hardware data.
Since ctrl is initialized to OMAP_SRAM_SCRATCH_SYS_CTRL in
arch/arm/mach-omap2/am33xx/hw_data.c, the pointer *ctrl will not be
updated during relocation and will hold a stale value.

Therefore call hw_data_init() again after relocation to
reinitialize *ctrl.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-01-28 09:39:15 -05:00
Faiz Abbas
ded509b44c configs: Replace CONFIG_ISW_ENTRY_ADDR with CONFIG_SYS_TEXT_BASE
Since 7e0ed13 ("Convert ARCH_OMAP2PLUS boards' CONFIG_SYS_TEXT_BASE to
Kconfig"), a default SYS_TEXT_BASE was set for all ARCH_OMAP2PLUS devices.
CONFIG_ISW_ENTRY_ADDR is used to set SYS_TEXT_BASE in qspi boot.

Simplify this by directly assigning SYS_TEXT_BASE in the defconfig.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-01-28 09:39:15 -05:00
Jelle van der Waa
9e82087cef tools: remove unused ret
Remove unused ret from fw_env_flush.

Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 09:39:15 -05:00
Patrice Chotard
20fe38e75a clk: clk_stm32f: Move SYSCFG clock setup into configure_clocks()
Move SYSCFG clock setup into configure_clocks() instead of calling
clock_setup() from board file.

As this clock is only needed in case of ethernet enabled and as
both stm32f4 and stm32f7 are using the Designware ethernet IP,
we use CONFIG_ETH_DESIGNWARE to only enable this clock if needed.

Move the RMII setup from board_early_init_f() to board_init()
to insure that RMII bit is set only when clock driver is initialized.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28 09:39:15 -05:00
Patrice Chotard
68a69ed2a4 clk: clk_stm32f: Remove STMMAC clock setup
Thanks to 'commit ba1f966725 ("net: designware: add clock support")'
we don't need anymore to setup the STMMAC clock in board.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-01-28 09:39:15 -05:00
Patrice Chotard
1e130558ab ARM: dts: stm32: Add STMMAC clocks for stm32f746
Add ETHMAC, ETHMACRX and ETHMACTX clocks for STMMAC.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-01-28 09:39:15 -05:00
Bradley Bolen
9c3264ce40 atomic-long: Fix warnings on arm64
Several inline functions in this file reference undefined functions in
U-Boot.  For example:

atomic-long.h:73:9: warning: implicit declaration of function
'atomic64_sub_and_test'
atomic-long.h:80:9: warning: implicit declaration of function
'atomic64_dec_and_test'
atomic-long.h:87:9: warning: implicit declaration of function
'atomic64_inc_and_test'

Handle this the same as the 32 bit build by wrapping these functions in
a __UBOOT__ check.

Signed-off-by: Bradley Bolen <bradleybolen@gmail.com>
2018-01-28 09:39:05 -05:00
Patrice Chotard
2d58dddf7a ARM: dts: stm32: add stm32429-eval-u-boot dts file
_ Add gpio compatible and aliases for stm32f469
   _ Add FMC sdram node
   _ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl,
     pwrcfg and gpio nodes.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28 09:39:05 -05:00
Patrice Chotard
c7ea4b0e09 ARM: dts: stm32: Add STM32F429 Evaluation board support
This DT file comes from kernel v4.15, this board offers :

   _ STM32F429NIH6 microcontroller
   _ 4.3” color TFT LCD with resistive touchscreen (480 x 272 pixels)
   _ Six 5 V power supply options:
        Power jack
        ST-LINK/V2 USB connector
        User USB HS connector
        User USB FS1 connector
        User USB FS2 connector
        Daughterboard
   _ SAI Audio DAC, stereo audio jack which supports headset with
     microphone
   _ Stereo digital microphone, audio terminal connector used to connect
     external speakers
   _ 2 GBytes (or more) SDIO interface MicroSD card
   _ RF EEPROM on I2 C compatible serial interface
   _ RS-232 communication
   _ IrDA transceiver
   _ JTAG/SWD and ETM trace debug support, ST-LINK/V2 embedded
   _ IEEE-802.3-2002 compliant Ethernet connector
   _ Camera module
   _ 8M x 32-bit SDRAM, 1M x 16-bit SRAM and 8M x 16-bit NOR Flash
   _ Joystick with 4-directional control and selector
   _ Reset, Wakeup and Tamper buttons
   _ 4 color user LEDs
   _ Extension connectors & memory connectors for daughterboard or
     wrapping board
   _ USB OTG HS and FS with Micro-AB connectors
   _ RTC with backup battery
   _ CAN2.0A/B compliant connection
   _ Potentiometer
   _ Motor control connector

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28 09:39:05 -05:00
Patrice Chotard
e23b19f4a8 board: stm32: Add stm32f429-evaluation board support
Add stm32f429-evaluation board support.
For more information, please visit:
http://www.st.com/en/evaluation-tools/stm32429i-eval.html

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28 09:39:05 -05:00
Patrice Chotard
09b9f649d0 configs: stm32f: Remove STM32_HSE_HZ for all STM32F series
As clk_stm32f driver is able to retrieve HSE frequency from DT,
CONFIG_STM32_HSE_HZ becomes useless.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28 09:39:05 -05:00
Patrice Chotard
cb97ff9d3d clk: stm32: retrieve external oscillator frequency from DT
All current STM32F4 supported boards uses a 8MHz external oscillator.
All current STM32F7 supported boards uses a 25MHz external oscillator.

In order to introduce the new stm32f429-evaluation board which uses a
25MHz external oscillator without creating a dedicated struct
stm32_clk_info for this board, retrieve the external oscillator
frequency from DT and set pll_m accordingly to obtain 1MHz for the VCO.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28 09:39:05 -05:00
Patrice Chotard
baf20a7d1a ARM: dts: stm32: add "u-boot, dm-pre-reloc" for clk_hse in stm32f7-u-boot
In order to retrieve the clk_hse fixed clock phandle in clk_stm32f driver,
add "u-boot,dm-pre-reloc" property in Uboot specific DT file.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-28 09:39:05 -05:00
Heiko Schocher
020da843fc arm: bootm-fdt.c: fix compiler warning
compiling U-Boot with bosch_mpcxxxxd_sd_defconfig
drops warning:

arch/arm/lib/bootm-fdt.c: In function ‘arch_fixup_fdt’:
arch/arm/lib/bootm-fdt.c:37:6: warning: unused variable ‘ret’ [-Wunused-variable]
  int ret = 0;
      ^~~

Fix it.

Signed-off-by: Heiko Schocher <hs@denx.de>
2018-01-28 09:39:05 -05:00
Andrew F. Davis
60013a2cf6 arm: mach-omap2: Pass args to secure ROM in SRAM in SPL
When in early SPL we make some secure ROM calls that can effect
DRAM, due to this it is more stable to store the args for these
calls in SRAM, but uninitialized and zero'd globals are placed
in BSS, located in DRAM. Force our args into the data section
which is in SRAM during SPL.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-01-28 09:39:05 -05:00
Mario Six
92f84b67e5 common: board_r: Fix style violations
Fix some style violations in the board_r file.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:39:05 -05:00
Mario Six
16ef147425 common: board_f: Fix style violations
Fix some style violations in the board_f file.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Mario Six
4dbf9bed18 serial: ns16550: Fix style violation
Clarify the computation precedence in two ternary operator
constructions.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Mario Six
7ba50418b9 include: dm: Fix 'devioe'/'devuce' typos
There are some typos in the documentation of some functions in read.h;
fix those.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-28 09:36:28 -05:00
Mario Six
f5ac4f2ea0 gpio: mpc8xxx: Make live-tree compatible
Make the MPC8xxx GPIO driver compatible with a live device tree.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Mario Six
f9c7fde260 gpio: mpc8xxx: Make compatible with more SoCs
Finally, make the mpc8xxx driver capable of handling more GPIO devices;
this entails adding a special case for the MPC5121 SoC, and adding a set
of new compatible strings.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Mario Six
3c21683480 gpio: mpc8xxx: Rename Kconfig option, structures, and functions
Rename the Kconfig option, structures (and their members), as well as
functions of the mpc85xx driver to include mpc8xxx to reflect the more
generic usage.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Mario Six
76d00cc9cb gpio: mpc85xx: Rename driver file to mpc8xxx
In preparation to making the MPC85xx GPIO driver useable for a broader
range of SoCs, rename the driver file.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Mario Six
aadc5e67ee gpio: mpc85xx_gpio: Fix style violations
Fix some style violations in the MPC85XX GPIO driver.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Mario Six
f62ca2cd2a gpio: pca953x_gpio: Make live-tree compatible
Make the pca953x_gpio driver compatible with a live device tree.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Mario Six
fb01e07a95 gpio: pca953x_gpio: Fix style violations
Fix some style violations in the pca953x_gpio driver.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-28 09:36:28 -05:00
Martin Etnestad
2d06fd839d Initialize SHA buffer size var in passwd_abort
The call to hash_block in passwd_abort fails with error ENOSPC on some
systems. The reason is that the variable which specifies the size of the
buffer to contain the computed hash does not get initialized.

This patch initializes the variable with the size of the buffer.

Signed-off-by: Martin Etnestad <martin.etnestad@appeartv.com>
2018-01-28 09:36:28 -05:00
Tom Rini
5b893baf08 Merge git://git.denx.de/u-boot-usb 2018-01-28 09:21:53 -05:00
Tom Rini
40b61180c1 usb: host: Drop unused hcd_name from r8a66597-hcd.c
The variable hcd_name is unsued, drop.

Cc: Marek Vasut <marex@denx.de>
Cc: Chris Brandt <chris.brandt@renesas.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-28 04:00:59 +01:00
Tom Rini
1c0ae0097b usb: Remove isp116x-hcd support
The isp116x-hcd driver is extremely long unused, so just remove it.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-28 04:00:59 +01:00
Tom Rini
1a7f6d4597 Merge git://git.denx.de/u-boot-uniphier 2018-01-27 21:55:04 -05:00
Tom Rini
9c486e7cb0 Merge branch 'rmobile-mx' of git://git.denx.de/u-boot-sh 2018-01-27 18:25:00 -05:00
Masahiro Yamada
7d8cca7be6 ARM: uniphier: enable HS200 support for uniphier_v8_defconfig
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-28 06:32:50 +09:00
Tom Rini
f95a4b3a55 Merge git://git.denx.de/u-boot-usb 2018-01-27 14:48:52 -05:00
Tom Rini
d61639e39a Merge git://git.denx.de/u-boot-socfpga 2018-01-27 14:48:41 -05:00
Marek Vasut
789edf694c ARM: rmobile: Convert R8A7791 Porter board to DM and DT
Convert the R8A7791 Porter board to DM and DT. This implies mostly
enabling the necessary configuration options and plucking out the
ad-hoc configuration from the board file. Moreover, the pre-reloc
malloc size was increased to allow the clock driver to start up
early without running out of malloc space and the early stack was
moved further up in the DRAM to avoid rewriting U-Boot itself.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:54 +01:00
Marek Vasut
bb834b6247 ARM: rmobile: Enable OF_CONTROL on RCar Gen2
Since the DTs are now in place, enable OF control so that they get
bundled into the U-Boot.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:54 +01:00
Marek Vasut
30ceb10c4c ARM: dts: rmobile: Add SoC and board U-Boot DT extras
Add U-Boot DT extras for each SoC and board. This marks the required
nodes with u-boot,dm-pre-reloc to start clock and PRR early on while
avoiding modification of the DTs imported from Linux.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:54 +01:00
Marek Vasut
a500e4e570 ARM: dts: rmobile: Add rudimentary R8A7790 Stout DT
The Stout board is not supported in Linux, so add a rudimentary DTS
for H2 Stout as a placeholder for when a proper DTS is available.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
---
NOTE: The Stout is already being shipped over, so proper DTS for both
      U-Boot and Linux will happen once it's delivered :-)
2018-01-27 20:38:54 +01:00
Marek Vasut
9a26fc5a73 ARM: dts: rmobile: Import R8A7794 DTS from Linux 4.15-rc8
Import the Renesas R8A7794 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:54 +01:00
Marek Vasut
92aa099592 ARM: dts: rmobile: Import R8A7793 DTS from Linux 4.15-rc8
Import the Renesas R8A7793 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:54 +01:00
Marek Vasut
a3fb9ff3b3 ARM: dts: rmobile: Import R8A7792 DTS from Linux 4.15-rc8
Import the Renesas R8A7792 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:54 +01:00
Marek Vasut
edd15fcffb ARM: dts: rmobile: Import R8A7791 DTS from Linux 4.15-rc8
Import the Renesas R8A7791 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:54 +01:00
Marek Vasut
16b6e4aa37 ARM: dts: rmobile: Import R8A7790 DTS from Linux 4.15-rc8
Import the Renesas R8A7790 DTS and headers from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:53 +01:00
Marek Vasut
319202640a net: sh_eth: Add DM and DT support
Add DM capable code into the SH ethernet driver and support probing
both from DT and pdata. The legacy non-DM, non-DT support is retained
as there are still systems in the tree which are not DM or DT capable.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
a220784b14 net: sh_eth: Clump legacy functions together
Move the legacy functions around, so that they can be wrapped in a
massive ifdef CONFIG_DM_ETH once DM support is added. No functional
change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
013af64f8f net: sh_eth: Split sh_eth_init
Split sh_eth_init() function into smaller chunks, which can
be called from both DM and non-DM code while handling the
specifics of both configurations.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
68ac92e937 net: sh_eth: Separate out MAC address programming
Pull out the code for writing MAC address into the NIC into a
separate function, so it can be reused by both DM and non-DM
code. This is done in preparation for DM support, which handles
MAC address programming separately.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
52c15e220b net: sh_eth: Split sh_eth_recv
Split sh_eth_recv into two functions, one which checks whether
a packet was received and one which handles the received packet.
This is done in preparation for DM support, which handles these
two parts separately.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
dca221bd92 net: sh_eth: Pass sh_eth_dev around
Pass sh_eth_dev structure around instead of eth_device, since the
later is specific to the legacy networking support. This change is
done in preparation for the DM addition.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
effb79027e net: sh_eth: Unify CONFIG_R8A779[01234] as CONFIG_RCAR_GEN2
Use the common RCAR_GEN2 config option instead of enumerating
each SoC and having a lengthy ifdef clause. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
e3105eacf5 net: ravb: staticize ravb_start
Cosmetic fix, make ravb_start() static.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Joe Hershberger <joe.hershberger@ni.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
5f14f7d783 pci: rmobile: Add RCar Gen2 PCIe controller driver
Add driver for the Renesas RCar PCIe controller present on Gen2 SoCs.
The PCIe on Gen2 is used both to connect external PCIe peripherals as
well as access the on-SoC USB EHCI controller.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2018-01-27 20:38:53 +01:00
Marek Vasut
8b05436ff5 gpio: rmobile: Add RCar Gen2 compatible string
Add DT compatible string for RCar Gen2.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-27 20:38:53 +01:00
Maxime Ripard
0163c9186b env: sunxi: Enable FAT-based environment support by default
Now that we have everything in place to implement the transition scheme,
let's enable it by default.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:23:32 -05:00
Maxime Ripard
b39117cad9 sunxi: Transition from the MMC to a FAT-based environment
The current environment has been hardcoded to an offset that starts to be
an issue given the current size of our main U-Boot binary.

By implementing a custom environment location routine, we can always favor
the FAT-based environment, and fallback to the MMC if we don't find
something in the FAT partition. We also implement the same order when
saving the environment, so that hopefully we can slowly migrate the users
over to FAT-based environment and away from the raw MMC one.

Eventually, and hopefully before we reach that limit again, we will have
most of our users using that setup, and we'll be able to retire the raw
environment, and gain more room for the U-Boot binary.

Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:23:22 -05:00
Maxime Ripard
40c08a68b9 env: Mark env_get_location as weak
Allow boards and architectures to override the default environment lookup
code by overriding env_get_location.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:23:22 -05:00
Maxime Ripard
fb69464eae env: Allow to build multiple environments in Kconfig
Now that we have everything in place in the code, let's allow to build
multiple environments backend through Kconfig.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:23:22 -05:00
Maxime Ripard
d282a1db6a env: mmc: depends on the MMC framework
The raw MMC environment directly calls into the MMC framework. Make sure
it's enabled before we can select it.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-27 09:21:57 -05:00
Maxime Ripard
1d4460871b env: Initialise all the environments
Since we want to have multiple environments, we will need to initialise
all the environments since we don't know at init time what drivers might
fail when calling load.

Let's init all of them, and only consider for further operations the ones
that have not reported any errors at init time.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:21:57 -05:00
Maxime Ripard
7d714a24d7 env: Support multiple environments
Now that we have everything in place to support multiple environment, let's
make sure the current code can use it.

The priority used between the various environment is the same one that was
used in the code previously.

At read / init times, the highest priority environment is going to be
detected, and we'll use the same one without lookup during writes. This
should implement the same behaviour than we currently have.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:21:57 -05:00
Maxime Ripard
58ae9990c0 env: common: Make the debug messages play a little nicer
Since we have global messages to indicate what's going on, the custom
messages in the environment drivers only make the output less readable.

Make the common code play a little nicer by removing all the extra output
in the standard case.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:19:11 -05:00
Maxime Ripard
29b8f21053 env: mmc: Make the debug messages play a little nicer
Since we have global messages to indicate what's going on, the custom
messages in the environment drivers only make the output less readable.

Make MMC play a little nicer by removing all the extra \n and formatting
that is redundant with the global output.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-27 09:19:11 -05:00
Maxime Ripard
d0816da54f env: fat: Make the debug messages play a little nicer
Since we have global messages to indicate what's going on, the custom
messages in the environment drivers only make the output less readable.

Make FAT play a little nicer by removing all the extra \n and formatting
that is redundant with the global output.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:19:11 -05:00
Maxime Ripard
3574ba019e env: Make it explicit where we're loading our environment from
Since we can have multiple environments now, it's better to provide a
decent indication on what environments were tried and which were the one to
fail and succeed.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:19:11 -05:00
Maxime Ripard
9efac3c805 env: Make the env save message a bit more explicit
Since we'll soon have support for multiple environments, the environment
saving message might end up being printed multiple times if the higher
priority environment cannot be used.

That might confuse the user, so let's make it explicit if the operation
failed or not.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:19:11 -05:00
Maxime Ripard
8a3a7e2270 env: Pass additional parameters to the env lookup function
In preparation for the multiple environment support, let's introduce two
new parameters to the environment driver lookup function: the priority and
operation.

The operation parameter is meant to identify, obviously, the operation you
might want to perform on the environment.

The priority is a number passed to identify the environment priority you
want to retrieve. The lowest priority parameter (0) will be the primary
source.

Combining the two parameters allow you to support multiple environments
through different priorities, and to change those priorities between read
and writes operations.

This is especially useful to implement migration mechanisms where you want
to always use the same environment first, be it to read or write, while the
common case is more likely to use the same environment it has read from to
write it to.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:19:11 -05:00
Maxime Ripard
52746c43d6 env: Rename env_driver_lookup_default and env_get_default_location
The env_driver_lookup_default and env_get_default_location functions are
about to get refactored to support loading from multiple environment.

The name is therefore not really well suited anymore. Drop the default
part to be a bit more relevant.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:19:11 -05:00
Maxime Ripard
9c24dfb2b8 cmd: nvedit: Get rid of the env lookup
The nvedit command is the only user of env_driver_lookup_default outside of
the environment code itself, and it uses it only to print the environment
it's about to save to during env save.

As we're about to rework the environment to be able to handle multiple
environment sources, we might not have an idea of what environment backend
is going to be used before trying (and possibly failing for some).

Therefore, it makes sense to remove that message and move it to the
env_save function itself. As a side effect, we also can get rid of the call
to env_driver_lookup_default that is also about to get refactored.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2018-01-27 09:19:11 -05:00
Tom Rini
748277c415 Merge git://git.denx.de/u-boot-sunxi 2018-01-26 13:22:40 -05:00
Tom Rini
ab12aa24e6 ARM: socfpga: Convert callers of cm_write_with_phase for wait_for_bit_le32
Now that we have and use wait_for_bit_le32() available, the callers of
cm_write_with_phase() should not be casting values to u32 and instead we
expect a const void *, so provide that directly.

Fixes: 48263504c8 ("wait_bit: use wait_for_bit_le32 and remove wait_for_bit")
Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-26 13:08:03 -05:00
Chris Blake
a6968ecb0a gpio: sunxi: Add compatible string for H5 PIO
Add allwinner,sun50i-h5-pinctrl compatible for H5 boards.

Signed-off-by: Chris Blake <chrisrblake93@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
[jagan: remove external link and format commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
9921966408 sunxi: Add limit with the MMC environment
The MMC environment offset is getting very close to the end of the U-Boot
binary now. Since we want to make sure this will not overflow, add a size
limit in the board for arm64. arm32 has already that limit enforced in our
custom image generation.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
e89f5591f4 Makefile: Add size check to the u-boot.itb make target
The make macro to check if the binary exceeds the board size limit is not
called. Make sure that is the case.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Andre Heider
eff264d731 sunxi: imply CONFIG_OF_LIBFDT_OVERLAY
fdt overlay support is useful for all sunxi boards, enable per default
and remove it from sunxi defconfigs.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
acd4d3343f net: regex: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.

Disable this option that is not critical until we can adress the issue
properly.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
0a319b610b video: bpp16: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.

Disable this command that is not critical until we can adress the issue
properly.

Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
2e8f1dd608 video: bpp8: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.

Disable this command that is not critical until we can adress the issue
properly.

Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
07dc22dd85 cmd: misc: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.

Disable this command that is not critical until we can adress the issue
properly.

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
e302ede73c cmd: loads: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.

Disable this command that is not critical until we can adress the issue
properly.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
197e0be744 cmd: loadb: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.

Disable this command that is not critical until we can adress the issue
properly.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
3b50382ab5 cmd: unzip: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.

Disable this command that is not critical until we can adress the issue
properly.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
b02436089a cmd: crc32: Disable by default on sunXi
The sunXi arm64 build has overflown, leading to the main U-boot binary
overwriting the environment when flashing the new image, or even worse,
overwriting itself when we're calling saveenv.

Disable this command that is not critical until we can adress the issue
properly.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Maxime Ripard
70c56c138f dfu: select HASH
The DFU code relies on the HASH config option. Make sure it is always there
by selecting it.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 20:02:33 +05:30
Tom Rini
fc04bd84b3 Merge git://git.denx.de/u-boot-mips 2018-01-26 07:46:47 -05:00
Tom Rini
1d12a7c8cd Merge git://git.denx.de/u-boot-spi 2018-01-26 07:46:34 -05:00
Álvaro Fernández Rojas
664ec31db7 MIPS: add BMIPS Comtrend AR-5315u board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26 12:38:13 +01:00
Álvaro Fernández Rojas
3483f28ebf MIPS: add support for Broadcom MIPS BCM6318 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26 12:38:13 +01:00
Álvaro Fernández Rojas
a80bf5e46e dm: ram: bmips: add BCM6318 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26 12:38:13 +01:00
Álvaro Fernández Rojas
70d30d8684 dm: cpu: bmips: add BCM6318 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26 12:38:13 +01:00
Álvaro Fernández Rojas
c320b923f5 MIPS: add BMIPS Comtrend WAP-5813n board
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26 12:35:22 +01:00
Álvaro Fernández Rojas
43b7ab99ec MIPS: add support for Broadcom MIPS BCM6368 SoC family
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26 12:35:22 +01:00
Álvaro Fernández Rojas
8c8ef2e825 dm: cpu: bmips: add BCM6368 support
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-26 12:35:22 +01:00
Eugeniy Paltsev
58c125b9e2 DW SPI: Get clock value from Device Tree
Add option to set spi controller clock frequency via device tree
using standard clock bindings.

Define dw_spi_get_clk function as 'weak' as some targets
(like SOCFPGA_GEN5 and SOCFPGA_ARRIA10) don't use standard clock API
and implement dw_spi_get_clk their own way in their clock manager.

Get rid of clock_manager.h include as we don't use
cm_get_spi_controller_clk_hz function anymore. (we use redefined
dw_spi_get_clk in SOCFPGA clock managers instead)

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 11:26:16 +05:30
Eugeniy Paltsev
21143ce127 SOCFPGA: clock manager: implement dw_spi_get_clk function
Implement dw_spi_get_clk function to override its weak
implementation in designware_spi.c driver.

We need this change to get rid of cm_get_spi_controller_clk_hz
function and clock_manager.h include in designware_spi.c driver.

Reviewed-by: Marek Vasut <marex@denx.de>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-26 11:25:49 +05:30
Daniel Schwierzeck
6f7c92db4c usb: ehci: mxs: fix swapped argument in ehci_writel()
ehci_writel() swaps the arguments for address and value. One call
in ehci-mxs ignores that.

This fixes the warning:

drivers/usb/host/ehci-mxs.c: In function ?ehci_hcd_stop?:
drivers/usb/host/ehci-mxs.c:159:19: error: initialization makes integer from pointer without a cast [-Werror=int-conversion]
  ehci_writel(tmp, &hcor->or_usbcmd);
                   ^
arch/arm/include/asm/io.h:117:34: note: in definition of macro ?writel?
 #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
                                  ^
drivers/usb/host/ehci-mxs.c:159:2: note: in expansion of macro ?ehci_writel?
  ^~~~~~~~~~~

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-25 20:59:20 +01:00
Gustavo A. R. Silva
eacccbda43 usb: xhci: Fix bool initialization in xhci_bulk_tx
Bool initializations should use true and false.

This issue was detected with the help of Coccinelle.

Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Marek Vasut <marex@denx.de>
2018-01-25 20:59:16 +01:00
Álvaro Fernández Rojas
cd1cc31fe1 mips: bmips: increment SYS_MALLOC_F_LEN
This prevents the following ENOMEM:
Error binding driver 'bmips_cpu': -12

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-25 17:40:42 +01:00
Paul Burton
b2f815bb5f boston: Pad binary in .mcs to a multiple of 16 bytes
When flashing U-Boot on a Boston board using Xilinx Vivado tools, the
final 0x00 byte which ends the .relocs section seems to be skipped &
left in flash as 0xff unless the data contained in the .mcs is padded
out to a 16 byte boundary. Without our final zero byte relocation will
fail with an error about a spurious reloc:

Avoid this problem by padding out the data in the .mcs file to a 16 byte
boundary using srec_cat's -range-pad functionality.

Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-01-25 17:40:42 +01:00
Goldschmidt Simon
92962b3caf ddr: altera: silence PHY calibration unless in debug mode
This driver has been using printf() including filename since it was
added. Convert to using debug() instead.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-01-25 09:59:37 +01:00
Simon Goldschmidt
1c7fa79314 arm: socfpga: allow configs without network support
Currently, socfpga_common.h does not allow configurations without
network support. This is because CONFIG_CMD_PXE is defined in this
file and distro mode has DHCP hard-coded as available.

Fix this by moving CONFIG_CMD_PXE and CONFIG_MENU to the defconfigs
and by making DHCP optional in BOOT_TARGET_DEVICES(func).

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
2018-01-25 09:59:37 +01:00
Tom Rini
a3f77c810b Merge branch 'master' of git://git.denx.de/u-boot-coldfire 2018-01-24 22:08:00 -05:00
Marek Vasut
34e93605ae pinctrl: rmobile: Import R8A7794 E2 PFC tables
Import PFC tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:23 +01:00
Marek Vasut
ab2d09b4be pinctrl: rmobile: Import R8A7792 V2H PFC tables
Import PFC tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:23 +01:00
Marek Vasut
427c75df5a pinctrl: rmobile: Import R8A7791/R8A7793 M2 PFC tables
Import PFC tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux
kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:23 +01:00
Marek Vasut
7547ad4ca0 pinctrl: rmobile: Import R8A7790 H2 PFC tables
Import PFC tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
19b1a8b7a7 clk: renesas: Import R8A7794 E2 clock tables
Import clock tables for R8A7794 E2 SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
ce43893d4d clk: renesas: Import R8A7792 V2H clock tables
Import clock tables for R8A7792 V2H SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
67dbebe203 clk: renesas: Import R8A7791/R8A7793 M2 clock tables
Import clock tables for R8A7791 M2W and R8A7793 M2N SoC from upstream Linux
kernel v4.15-rc8, commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
75a5096da4 clk: renesas: Import R8A7790 H2 clock tables
Import clock tables for R8A7790 H2 SoC from upstream Linux kernel v4.15-rc8,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
dedb60fb5b clk: renesas: Add Gen2 clock core
Add common clock code for Renesas RCar Gen2 platforms.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
28b8f225b4 clk: renesas: Add DIV6P1 clock type
Add macros for the DIV6P1 clock type, which is used on Gen2
and optionally also on Gen3.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
d26286715f clk: renesas: Split out code shared between Gen2 and Gen3
Pull code which is common for RCar Gen2 and RCar Gen3 into
separate source file. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
65f1bbf678 clk: renesas: Make clock tables Kconfig configurable
Add Kconfig entries for each SoC clock table, so they can be
compiled in or out at build time. This can reduce the size of
the binary if desired.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
ff50b323b3 clk: renesas: Split SMSTPCR and RMSTPCR tables
The Gen2 requires setting RMSTPCR before booting, while on Gen3 this
is thus far always zero. Split the tables so the RMSTPCR can be set
too.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
58f1788f47 clk: renesas: Pull Gen3 specific bits into separate header
Extract the macros specific to Gen3 clock into a separate header.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:22 +01:00
Marek Vasut
7c88556323 clk: renesas: Make PLL configurations per-SoC
Not all SoCs have the same PLL configuration options,
so make those PLL configuraion tables per-SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:21 +01:00
Marek Vasut
f11c9679ab clk: renesas: Make clk_ids per-driver
Not all drivers use the same IDs, so make those IDs per-driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:21 +01:00
Marek Vasut
f77b5a4cd1 clk: renesas: Split RCar Gen3 driver
Split the massive driver into smaller per-SoC drivers and pull the
common code into a separate file. This would allow configuring out
unnecessary clock drivers once the Kconfig changes are in and also
allow adding more clock tables easily.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:21 +01:00
Chris Brandt
8591ac8b16 serial: sh: Add support for R7S72100 (RZ/A1)
Add support for RZ/A1 series SoCs.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
2018-01-24 23:27:21 +01:00
Marek Vasut
a6e25b2e12 serial: sh: Unify CONFIG_R8A779[01234] as CONFIG_RCAR_GEN2
Use the common RCAR_GEN2 config option instead of enumerating
each SoC and having a lengthy ifdef clause. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:21 +01:00
Marek Vasut
c493756ab4 serial: sh: Replace fdtdec_get_addr() with devfdt_get_addr()
Replace fdtdec_get_addr() with devfdt_get_addr() as the later one is
the current recommended practice.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:21 +01:00
Marek Vasut
b606e1bbc3 ARM: rmobile: Convert CONFIG_R8A77xx to Kconfig
Convert these configuration options to Kconfig, update board defconfigs
and drop them from whitelist.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:21 +01:00
Marek Vasut
34df58a95e ARM: dts: rmobile: Factor out U-Boot extras
Pull out u-boot extras into dtsi files to make synchronization of DTS
from Linux kernel as easy as a simple copy. All the U-Boot extras are
now in *-u-boot.dts* files instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:21 +01:00
Marek Vasut
62b2bb5374 ARM: dts: rmobile: Update DTS to match Linux 4.14
Import the RCar Gen3 DTS and headers from upstream Linux kernel v4.14,
commit bebc6082da0a9f5d47a1ea2edc099bf671058bd4 . This includes both M3
and H3 ULCB and Salvator-X boards.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-01-24 23:27:21 +01:00
Tom Rini
fb4413295c Merge git://git.denx.de/u-boot-mmc 2018-01-24 11:28:44 -05:00
Ezequiel Garcia
fe3dfb2324 doc: Update the zynq u-boot status
NAND and QSPI devices are now supported, so mark
them as such.

Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-24 11:45:06 +01:00
Ezequiel Garcia
578d95e99f arm: zynq: Enable SPL_CLK only if SPL is enabled
Setup proper dependency in Kconfig for SPL_CLK.
If SPL is not enabled, SPL_CLK shouldn't be selected.

Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-24 11:45:06 +01:00
Jun Nie
2f516e4aa2 mmc: Poll for broken card detection case
Poll for broken card detection case instead of return
no card detected.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
2018-01-24 16:12:03 +09:00
Jaehoon Chung
c0fafe64a5 mmc: fix to assign to correct clock value when clock is enabling
When clock is enabling, it's assigned to 0 as mmc->clock.
Then it can't initialize any card.
Fix to assign to correct clock value as mmc->cfg->f_min or f_max.

Fixes: 9546eb92cb ("mmc: fix the wrong disabling clock")
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Tested-by: Stephen Warren <swarren@nvidia.com>
2018-01-24 16:08:27 +09:00
Jaehoon Chung
f35cdb7135 configs: odroid-xu3: enable the configs relevant to regulator
Enable the CONFIG_CMD_REGULATOR and CONFIG_DM_REGULATOR_S2MPS11.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2018-01-24 16:07:52 +09:00
Jaehoon Chung
173f023f46 power: pmic: s2mps11: probe the regulator driver
Add the probe function to support the s2mps11 regulator driver.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2018-01-24 16:07:35 +09:00
Jaehoon Chung
60599ea6cd power: regulator: s2mps11: add a regulator driver for s2mps11
exynos5422 has the s2mps11 PMIC.
s2mps11 pmic has the 10-BUCK and 38-LDO regulators.
Each IP and devices in exynos5422 can be controlled by each regulators.
This patch is support for s2mps11 regulator driver.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2018-01-24 16:07:19 +09:00
Vignesh R
aaa21d3ffc spi: cadence_qspi_apb: Make flash writes 32 bit aligned
Make flash writes 32 bit aligned by using bounce buffers to deal with
non 32 bit aligned buffers.
This is required because as per TI K2G TRM[1], the external master is
only permitted to issue 32-bit data interface writes until the last word
of an indirect transfer. Otherwise indirect writes is known to fail
sometimes.

[1] http://www.ti.com/lit/ug/spruhy8g/spruhy8g.pdf

Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:11:36 +05:30
Vignesh R
a743e2ba38 Revert "spi: cadence_qspi_apb: Use 32 bit indirect write transaction when possible"
This reverts commit 57897c13de.

Using bounce_buf.c to handle non-DMA alignment problems is bad as
bounce_buf.c does cache manipulations which is not required. Therefore
revert this patch in favour of local bounce buffer solution in the next
patch.

Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:11:36 +05:30
Goldschmidt Simon
948ad4f075 Revert "spi: cadence_qspi_apb: Use 32 bit indirect read transaction when possible"
This reverts commit b63b46313e.

This commit changed cadence_qspi_apb to use bouncebuf.c, which invalidates
the data cache after reading. This is meant for dma transfers only and
breaks the cadence_qspi driver which copies via cpu only: data that is
copied by the cpu is in cache only and the cache invalidation at the end
throws away this data.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jason Rush <jarush@gmail.com>
Acked-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:11:36 +05:30
Jason Rush
c58f300628 dts: cadence_spi: Update documentation for DT bindings
Update documentation to reflect adopting the Linux DT bindings.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-01-24 12:07:50 +05:30
Jason Rush
5a15ec19c8 config: cadence_spi: Remove defines read from DT
Cleanup unused #define values that are read from the DT.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-01-24 12:07:50 +05:30
Jason Rush
6e62b178e1 dts: cadence_spi: Sync DT bindings with Linux
Adopt the Linux DT bindings and clean-up duplicate
and unused values.

Fix indentation of the QSPI node in the keystone k2g
device tree.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-01-24 12:07:50 +05:30
Jason Rush
15a70a5da3 spi: cadence_spi: Sync DT bindings with Linux
Adopt the Linux DT bindings. This also fixes an issue
with the indaddrtrig register on the Cadence QSPI
device being programmed with the wrong value for the
socfpga arch.

Tested on TI K2G platform:
Tested-by: Vignesh R <vigneshr@ti.com>

Tested on a socfpga-cyclonev board:
Tested-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

Signed-off-by: Jason Rush <jarush@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Acked-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
Acked-by: Marek Vasut <marex@denx.de>
2018-01-24 12:07:50 +05:30
Chris Packham
df16881cea spi: kirkwood_spi: implement workaround for FE-9144572
Erratum NO. FE-9144572: The device SPI interface supports frequencies of
up to 50 MHz.  However, due to this erratum, when the device core clock
is 250 MHz and the SPI interfaces is configured for 50MHz SPI clock and
CPOL=CPHA=1 there might occur data corruption on reads from the SPI
device.

Implement the workaround by setting the TMISO_SAMPLE value to 0x2
in the timing1 register.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:08 +05:30
Mario Six
36890ff0d0 sf_probe: Merge spi_flash_probe_tail into spi_flash_probe
spi_flash_probe_tail is now only called from spi_flash_probe, hence we
can merge its body into spi_flash_probe.

Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:08 +05:30
Mario Six
24fc1ec2ee spi: spi-uclass: Fix style violations
Remove a superfluous newline, and reduce the scope of a variable.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:08 +05:30
Mario Six
a3e32c5038 spi: sf_probe: Fix style violations
Fix two indention-related style violations.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:08 +05:30
Mario Six
8ceb40c752 spi: Remove CONFIG_OF_SPI_FLASH
Previous patches removed the last usages of this config variable, so
that it is now obsolete.

This patch removes it from the whitelist.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:07 +05:30
Mario Six
184fa1c8da spi: Remove spi_setup_slave_fdt
A previous patch removed the spi_flash_probe_fdt function, which
contained the last call of the spi_setup_slave_fdt function, which is
now equally obsolete.

This patch removes the function.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:07 +05:30
Mario Six
74ea6e82f8 spi: Remove spi_flash_probe_fdt
Commit ba45756 ("dm: x86: spi: Convert ICH SPI driver to driver model")
removed the last usage of the spi_flash_probe_fdt function, rendering it
obsolete.

This patch removes the function.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:07 +05:30
Mario Six
c5b88f29ba spi: Remove obsolete spi_base_setup_slave_fdt
0efc024 ("spi_flash: Add spi_flash_probe_fdt() to locate SPI by FDT
node") added a helper function spi_base_setup_slave_fdt to to set up a
SPI slave from a given FDT blob. The only user was the exynos SPI
driver.

But commit 73186c9 ("dm: exynos: Convert SPI to driver model") removed
the use of this function, hence rendering it obsolete.

Remove this function, as well as the CONFIG_OF_SPI option, which guarded
only this function.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-24 12:04:07 +05:30
Mario Six
547bcc3d18 spi: Fix style violation and improve code
This patch fixes a printf specifier style violation, reduces the scope
of a variable, and turns a void pointer that is used with pointer
arithmetic into a u8 pointer.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:07 +05:30
Álvaro Fernández Rojas
1312906416 mips: bmips: enable the SPI flash on the Comtrend AR-5387un
It's a Macronix (mx25l12805d) 16 MB SPI flash.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:07 +05:30
Álvaro Fernández Rojas
727839b491 mips: bmips: add bcm63xx-hsspi driver support for BCM63268
This driver manages the high speed SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:07 +05:30
Álvaro Fernández Rojas
80be057c72 mips: bmips: add bcm63xx-hsspi driver support for BCM6328
This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:07 +05:30
Álvaro Fernández Rojas
29cc4368ad dm: spi: add BCM63xx HSSPI driver
This driver is a simplified version of linux/drivers/spi/spi-bcm63xx-hsspi.c

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:04:06 +05:30
Álvaro Fernández Rojas
46fe9dcfff mips: bmips: enable the SPI flash on the Netgear CG3100D
It's a Spansion (s25fl064a) 8 MB SPI flash.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
e4a06fa330 mips: bmips: enable the SPI flash on the Sagem F@ST1704
It's a Winbond (w25x32) 4 MB SPI flash.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
26cee0ecc7 mips: bmips: add bcm63xx-spi driver support for BCM63268
This driver manages the low speed SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
1c2479a5fa mips: bmips: add bcm63xx-spi driver support for BCM3380
This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
076c1aacba mips: bmips: add bcm63xx-spi driver support for BCM6358
This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
ff159286a7 mips: bmips: add bcm63xx-spi driver support for BCM6348
This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
0adfb199ce mips: bmips: add bcm63xx-spi driver support for BCM6338
This driver manages the SPI controller present on this SoC.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
5ac07d2969 dm: spi: add BCM63xx SPI driver
This driver is a simplified version of linux/drivers/spi/spi-bcm63xx.c

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
6c94bd12c4 drivers: spi: consider command bytes when sending transfers
Command bytes are part of the written bytes and they should be taken into
account when sending a spi transfer.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
8af74edc30 drivers: spi: allow limiting reads
For some SPI controllers it's not possible to keep the CS active between
transfers and they are limited to a known number of bytes.
This splits spi_flash reads into different iterations in order to respect
the SPI controller limits.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
48263504c8 wait_bit: use wait_for_bit_le32 and remove wait_for_bit
wait_for_bit callers use the 32 bit LE version

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Álvaro Fernández Rojas
91fe458bbf wait_bit: add 8/16/32 BE/LE versions of wait_for_bit
Add 8/16/32 bits and BE/LE versions of wait_for_bit.
This is needed for reading registers that are not aligned to 32 bits, and for
Big Endian platforms.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-24 12:03:43 +05:30
Tom Rini
1612128018 Merge git://git.denx.de/u-boot-fsl-qoriq 2018-01-23 21:48:53 -05:00
Angelo Dureghello
b9153fe308 common/board_f.c: align m68k arch to use CONFIG_DISPLAY_CPUINFO
Change all coldfire arch files to use CONFIG_DISPLAY_CPUINFO.

Signed-off-by: Angelo Dureghello <angelo@sysam.it>
Reviewed-by: Tom Rini <trini@konsulko.com>
---
Changes for v2:
   - update common/Kconfig to add M68K to the default y list
2018-01-23 23:47:02 +01:00
Ashish Kumar
6c8945ec41 armv8: ls1088a: Add IFC and eMMC as qixis boot sources
Add macro QIXIS_LBMAP_EMMC, QIXIS_LBMAP_IFC, QIXIS_RCW_SRC_IFC,
QIXIS_RCW_SRC_EMMC to enable IFC and eMMC as boot sources for
qixis commands.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[YS: Modify subject and add commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:26:21 -08:00
Ashish Kumar
fe997689c3 fsl: common: qixis: Add ifc and emmc switching via qixis
Currently only SD, NAND can be secondary boot sources controlled
by FPGA/CPLD via qixis commands. For SoC like LS1088 IFC-NOR
can be secondary boot source, while QSPI-NOR is the primary.
Add options in qixis to switch to other boot sources including
ifc and emmc.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:22:12 -08:00
Breno Lima
d7af2baa49 crypto/fsl: Fix HW accelerated hash commands
The hash command function were not flushing the dcache before passing data
to CAAM/DMA and not invalidating the dcache when getting data back.

Due the data cache incoherency, HW accelerated hash commands used to fail
with CAAM errors like "Invalid KEY Command".

Check if pbuf and pout buffers are properly aligned to the cache line size
and flush/invalidate the memory regions to address this issue.

This solution is based in a previous work from Clemens Gruber in
commit 598e9dccc7 ("crypto/fsl: fix BLOB encapsulation and
decapsulation")

Reported-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:21:20 -08:00
Pankaj Bansal
6d48d1c4b4 ARM: dts: Freescale: re-license device tree files under GPLv2+/X11
The current GPL only licensing on the device trees makes it very
impractical for other software components licensed under another
license.

To make it easier to reuse them, re-license the the device trees for
Freescale (now NXP) SoCs and boards under GPLv2+/X11 dual license.

Same trend is followed in linux.

Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:21:10 -08:00
Rajesh Bhagat
980d61a270 armv8: ls1088a: vid: Compiling VID specific functions for SPL
Enables and compiles VID specific functions for SPL.

Signed-off-by: Pankit Garg <pankit.garg@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:21:00 -08:00
Rajesh Bhagat
ef0789b7c6 ls1088a: Add VID support for QDS and RDB platforms
This patch adds the support for VID on LS1088AQDS and LS1088ARDB systems.
It reads the fusesr register and changes the VDD accordingly by adjusting
the voltage via LTC3882 regulator.

This patch also takes care of the special case of 0.9V VDD is present in
fusesr register. In that case,it also changes the SERDES voltage by
disabling the SERDES, changing the SVDD and then re-enabling SERDES.

Signed-off-by: Raghav Dogra <raghav.dogra@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Amrita Kumari <amrita.kumari@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:20:53 -08:00
Rajesh Bhagat
1fab98fb90 common: board_f: vid: Add VID specific API to adjust core voltage
Adds a VID specific API in init_sequence_f and spl code flow
namely init_func_vid which is required to adjust core voltage.

VID specific code is required in spl, hence moving flag CONFIG_VID
out of spl flags.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:20:46 -08:00
Rajesh Bhagat
75ad48153f ls1088a: ddr: configure DDR for 0.9v for VID support
When VID feature is supported, check the contents of fuse register
and configure DDR operate at 0.9v.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:20:28 -08:00
Rajesh Bhagat
554d33f3db ddr: fsl: set cdr1 first in case 0.9v VDD is enabled for some SoCs
Sets DDR configuration parameter cdr1 before all other settings
to support case 0.9v VDD is enabled for some SoCs

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:20:03 -08:00
Rajesh Bhagat
23a12cb3d0 board: common: vid: Add support for LTC3882 voltage regulator chip
Restructures common driver to support LTC3882 voltage regulator
chip.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:19:56 -08:00
Rajesh Bhagat
6f2d0a5020 Kconfig: Add LTC3882 voltage regulator config
Adds below LTC3882 voltage regulator config:
CONFIG_VOL_MONITOR_LTC3882_READ
CONFIG_VOL_MONITOR_LTC3882_SET

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:19:49 -08:00
Rajesh Bhagat
9458316a3a board: common: vid: Move IR chip specific code in flag
Moves IR chip (IR36021) specific code in flag to resolve
compilation issue where it is not present. For example,
LS1088A is having a new LTC3882 voltage chip.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:19:38 -08:00
Rajesh Bhagat
3607570b11 board: common: vid: Add board specific vdd adjust API
Adds a board specific API namely board_adjust_vdd which
is required to define the board VDD adjust settings.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:19:25 -08:00
Rajesh Bhagat
c535ad4e91 board: common:vid: Add LS1088A VID Supported voltage values
Adds below voltage values supported by LS1088A Soc:
1.025V(default), 0.9875V, 0.9750V, 0.9V, 1.0V, 1.0125V, 1.0250V.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:18:35 -08:00
Rajesh Bhagat
a1f95ff7d7 armv8: lsch3: Add serdes and DDR voltage setup
Adds SERDES voltage and reset SERDES lanes API and makes
enable/disable DDR controller support 0.9V API common.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-23 11:18:12 -08:00
Tom Rini
a516416d75 Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot
Patch queue for efi - 2018-01-23

This time around we have a lot of EFI patches from Heinrich.
Highlights are:

  - Allow EFI applications to register as drivers
  - Allow exposure of U-Boot block devices from an EFI payload
  - Compatibility improvements
2018-01-23 07:59:43 -05:00
Tom Rini
c761a7e29d Revert "travis-ci: Add qemu-x86_64 target"
This reverts commit 998ae28799.

This continues to fail in travis itself, so remove for now.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-22 21:06:41 -05:00
Adam Ford
6aa4ad8e38 Convert CONFIG_SOC_DA8XX et al to Kconfig
This converts the following to Kconfig:
   CONFIG_SOC_DA8XX
   CONFIG_SOC_DA850
   CONFIG_DA850_LOWLEVEL
   CONFIG_MACH_DAVINCI_DA850_EVM
   CONFIG_SYS_DA850_PLL_INIT
   CONFIG_SYS_DA850_DDR_INIT

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: David Lechner <david@lechnology.com>
[trini: Rework CONFIG_SYS_DA850_PLL_INIT so it's selected on SOC_DA8XX]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-22 20:09:26 -05:00
Heinrich Schuchardt
003876d469 efi_selftest: reduce noise in test output for device trees
Some messages are only useful if an error occurs.
Fix a use after free.
Add a missing free.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:10:20 +01:00
Heinrich Schuchardt
9dfd84da8c efi_loader: allow creation of more device part nodes
Create device path nodes for UCLASS_ETH udevices.
Create device path nodes of block device children of UCLASS_MMC udevices.
Consistently use debug for unsupported nodes.
Set the log level to error.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: Fix build failure by adding #ifdef CONFIG_DM_ETH]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:10:05 +01:00
Heinrich Schuchardt
f768619239 efi_selftest: provide a test for block io
This test checks the driver for block IO devices.
A disk image is created in memory.
A handle is created for the new block IO device.
The block I/O protocol is installed on the handle.
ConnectController is used to setup partitions and to install the simple
file protocol.
A known file is read from the file system and verified.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
05ef48a248 efi_driver: EFI block driver
This patch provides
* a uclass for EFI drivers
* a EFI driver for block devices

For each EFI driver the uclass
* creates a handle
* adds the driver binding protocol

The uclass provides the bind, start, and stop entry points for the driver
binding protocol.

In bind() and stop() it checks if the controller implements the protocol
supported by the EFI driver. In the start() function it calls the bind()
function of the EFI driver. In the stop() function it destroys the child
controllers.

The EFI block driver binds to controllers implementing the block io
protocol.

When the bind function of the EFI block driver is called it creates a
new U-Boot block device. It installs child handles for all partitions and
installs the simple file protocol on these.

The read and write functions of the EFI block driver delegate calls to the
controller that it is bound to.

A usage example is as following:

U-Boot loads the iPXE snp.efi executable. iPXE connects an iSCSI drive and
exposes a handle with the block IO protocol. It calls ConnectController.

Now the EFI block driver installs the partitions with the simple file
protocol.

iPXE uses the simple file protocol to load Grub or the Linux Kernel.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: add comment on calloc len]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
ba45c9e4e1 efi_selftest: add missing LF in test output
The output of the minicapps lacks a line feed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
17ff6f02f5 efi_loader: store DT in EFI_RUNTIME_SERVICES_DATA memory
The device tree is needed at runtime. So we have to store it in
EFI_RUNTIME_SERVICES_DATA memory.

The UEFI spec recommends to store all configuration tables in
EFI_RUNTIME_SERVICES_DATA memory.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
8218f7b5fc efi_selftest: test start image
This pair of tests checks the StartImage boot service.

Each test loads an EFI application into memory and starts it.
One returns by calling the Exit boot service. The other returns directly.

The tests are not built on x86_64 because the relocation code for the efi
binary cannot be created.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
cc20ed03f9 efi_loader: fix ExitBootServices
This patch lets the implementation of ExitBootServices conform to
the UEFI standard.

The timer events must be disabled before calling the notification
functions of the exit boot services events.

The boot services must be disabled in the system table.

The handles in the system table should be defined as efi_handle_t.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
9bc9664d5e efi_loader: add check_tpl parameter to efi_signal_event
In ExitBootServices we need to signal events irrespective of the current
TPL level. A new parameter check_tpl is added to efi_signal_event().

Function efi_console_timer_notify() gets some comments.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
65436f91c5 efi_loader: provide function to get last node of a device path
On a block device and its partitions the same protocols can be
installed. To tell the apart we can use the type of the last
node of the device path which is not the end node.

The patch provides a utility function to find this last node.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
4f94865b30 efi_loader: correct EFI_BLOCK_IO_PROTOCOL definitions
Add the revision constants.
Depending on the revision additional fields are needed in the
media descriptor.
Use efi_uintn_t for number of bytes to read or write.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
64e4db0f11 efi_loader: make efi_disk_create_partitions a global symbol
Up to now we have been using efi_disk_create_partitions() to create
partitions for block devices that existed before starting an EFI
application.

We need to call it for block devices created by EFI
applications at run time. The EFI application will define the
handle for the block device and install a device path protocol
on it. We have to use this device path as stem for the partition
device paths.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
98d48bdf41 efi_loader: provide a function to create a partition node
Provide new function efi_dp_part_node() to create a device
node for a partition.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
b3dd14b6b1 efi_loader: make efi_block_io_guid a global symbol
The GUID of the EFI_BLOCK_IO_PROTOCOL is needed in different code
parts. To avoid duplication make efi_block_io_guid a global symbol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
9bfca9f98a efi_loader: efi_disk_register: correctly determine if_type_name
The interface type name can be used to look up the interface type.
Don't confound it with the driver name which may be different.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:14 +01:00
Heinrich Schuchardt
5e55543e65 efi_loader: fix StartImage bootservice
The calling convention for the entry point of an EFI image
is always 'asmlinkage'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
0aaabbb2c8 efi_loader: check tables in helloworld.efi
Check if the device tree and the SMBIOS table are available.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
36b41a3ced efi_loader: allocate correct memory type for EFI image
The category of memory allocated for an EFI image should depend on
its type (application, bootime service driver, runtime service driver).

Our helloworld.efi built on arm64 has an illegal image type. Treat it
like an EFI application.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
476ed96e01 efi_loader: print device path when entering efi_load_image
Use %pD to print the device path instead of its address when
entering efi_load_image.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
110d80a1f2 efi_loader: correct find simple file system protocol
In contrast to the description the code did not split the device
path into device part and file part.

The code should use the installed protocol and not refer to the
internal structure of the the disk object.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
22de1de905 efi_loader: address of the simple file system protocol
When installing the the simple file system protocol we have to path
the address of the structure and not the address of a pointer to the
structure.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
04298686a4 efi_loader: return NULL from device path functions
For the construction of device paths we need to call the
AllocatePool service. We should not ignore if it fails due to an
out of memory situation.

This patch changes the device path functions to return NULL if
the memory allocation fails.

Additional patches will be needed to fix the callers.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
2074f70064 efi_loader: consistently use efi_handle_t for handles
We should consistently use the efi_handle_t typedef when
referring to handles.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
fb83350952 efi_selftest: test for (Dis)ConnectController
This unit test checks the following protocol services:
ConnectController, DisconnectController,
InstallProtocol, UninstallProtocol,
OpenProtocol, CloseProtcol, OpenProtocolInformation

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
8d7cf39090 efi_selftest: remove todo in device path test
The installation of UninstallProtocol is functional now.
So we do not expect errors when calling it.

Call UninstallProtocol with correct level of indirection
for parameter handle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
77425e73b8 efi_selftest: remove todo in manage protocols
The installation of UninstallProtocols is functional now.
So we do not expect errors when calling it.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
ad97373ba9 efi_loader: disconnect controllers in UninstallProtocol
The UninstallProtocol boot service should first try to
disconnect controllers that have been connected with
EFI_OPEN_PROTOCOL_BY_DRIVER.

If the protocol is still opened by an agent, it should be
closed.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
3f9b00425a efi_loader: implement DisconnectController
Unfortunately we need a forward declaration because both
OpenProtocol and CloseProtocol have to call DisconnectController.
And DisconnectController calls both OpenProtcol and CloseProtocol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
3ebcd0071f efi_loader: fix signature of efi_disconnect_controller
Handles should be passed as efi_handle_t and not as void *.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
f0959dbee2 efi_loader: implement ConnectController
Implement the ConnectController boot service.

A unit test is supplied in a subsequent patch.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
d550414434 efi_loader: debug output installed device path
When a device path protocol is installed write the device
path to the console in debug mode.

For printing the new macro EFI_PRINT is used, which can be reused
for future diagnostic output.

Remove unused EFI_PRINT_GUID macro

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
e3fbbc36f2 efi_loader: implement OpenProtocolInformation
efi_open_protocol_information provides the agent and controller
handles as well as the attributes and open count of an protocol
on a handle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: fix counting error]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
3b8a489c9f efi_loader: open_info in CloseProtocol
efi_open_protocol and efi_close_protocol have to keep track of
opened protocols.

Check if the protocol was opened for the same agent and
controller.

Remove all open protocol information for this pair.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
191a41cc32 efi_loader: open_info in OpenProtocol
efi_open_protocol has to keep track of opened protocols.

OpenProtocol enters the agent and controller handle
information into this list.

A unit test is supplied with a subsequent patch.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
fe1599daf5 efi_loader: list of open protocol infos
Add a list of open protocol infos to each protocol of a handle.

Provide helper functions to access the list items.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:13 +01:00
Heinrich Schuchardt
5be9744ae7 efi_selftest: do not try to close device path protocol
CloseProtocol cannot be called without agent handle.

There is no need to close the device path protocol if
it has been opened without agent handle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
32e6fed6e9 efi_loader: simplify efi_remove_all_protocols
Replace list_for_each_safe() and list_entry() by
list_for_each_entry_safe().

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
853540c84f efi_selftest: colored test output
Add color coding to output:
test section    blue
success         green
errors          red
todo            yellow
summary         white
others          light gray

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
[agraf: Fold in move of set_attribute before the print]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
ac02019616 tools: provide a tool to convert a binary file to an include
For testing EFI disk management we need an in-memory image of
a disk.

The tool file2include converts a file to a C include. The file
is separated into strings of 8 bytes. Only the non-zero strings
are written to the include. The output format has been designed
to maintain readability.

 #define EFI_ST_DISK_IMG { 0x00010000, { \
  {0x000001b8, "\x94\x37\x69\xfc\x00\x00\x00\x00"}, /* .7i..... */ \
  {0x000001c0, "\x02\x00\x83\x02\x02\x00\x01\x00"}, /* ........ */ \
  {0x000001c8, "\x00\x00\x7f\x00\x00\x00\x00\x00"}, /* ........ */ \
  {0x000001f8, "\x00\x00\x00\x00\x00\x00\x55\xaa"}, /* ......U. */ \
 ...
  {0x00006000, "\x48\x65\x6c\x6c\x6f\x20\x77\x6f"}, /* Hello wo */ \
  {0x00006008, "\x72\x6c\x64\x21\x0a\x00\x00\x00"}, /* rld!.... */ \
  {0, NULL} } }

As the disk image needed for testing contains mostly zeroes a high
compression ratio can be attained.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
727a1afb34 efi_loader: correctly call images
Avoid a failed assertion when an EFI app calls an EFI app.

Avoid that the indent level increases when calling 'bootefi hello'
repeatedly.

Avoid negative indent level when an EFI app calls an EFI app that
calls an EFI app (e.g. iPXE loads grub which starts the kernel).

Return the status code of a loaded image that returns without
calling the Exit boot service.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
256060e425 vsprintf.c: add EFI device path printing
For debugging efi_loader we need the capability to print EFI
device paths. With this patch we can write:

    debug("device path: %pD", dp);

A possible output would be

    device path: /MemoryMapped(0x0,0x3ff93a82,0x3ff93a82)

This enhancement is not available when building without EFI support
and neither in the SPL nor in the API example.

A test is provided. It can be executed in the sandbox with command
ut_print.

The development for EFI support in the sandbox is currently in
branch u-boot-dm/efi-working. The branch currently lacks
commit 6ea8b580f0 ("efi_loader: correct DeviceNodeToText
for media types"). Ater rebasing the aforementioned branch on
U-Boot v2018.01 the test is executed successfully.

Without EFI support in the sandbox the test is simply skipped.

Suggested-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
3c950b3178 efi_loader: text output for device path end node
Without the patch a device path consisting only of an end node is
displayed as '/UNKNOWN(007f,00ff)'. It should be displayed as '/'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
bc0bd77ed4 MAINTAINERS: correct entry for lib/efi*/
lib/efi* indicates files efi* in directory lib.
lib/efi*/ indicates all files in directories lib/efi*.

Fixes: 623b3a5797 efi_selftest: provide an EFI selftest application
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
e0abeaccef efi_selftest: do not cut off u16 strings when printing
Device paths can be very long. Due to a limited output buffer
the output for device paths is cut off. We can avoid this by
directly calling the boottime service with the the device path
string.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[agraf: Remove coloring code change]
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
6a380e5b66 efi_selftest: avoid superfluous messages for task priority levels
In the task priority levels test debug output is written even if no
failure is detected.

Remove this distracting output.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
ad50dcf8c7 efi_selftest: avoid superfluous messages for event services
In the event services test debug output is written even if no
failure is detected.

Remove this distracting output.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
e540c48636 efi_loader: use correct format string for unsigned long
virt_size is of type unsigned long.
So it should be printed with %ul.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
474a6f5aa1 efi_loader: add comments to memory functions
Add comments describing memory functions.

Fix the formatting of a function declaration.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
05b6f56ead efi_loader: use wide string do define firmware vendor
As the U-Boot is compiled with -fshort-wchar we can define
the firmware vendor constant as wide string.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
af3106a12d efi_loader: support device path for IDE and SCSI disks
Correctly create the device path for IDE and SCSI disks.

Support for SATA remains to be done in a future patch.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Heinrich Schuchardt
2bc61b8352 efi_loader: create full device path for block devices
When creating the device path of a block device it has to
comprise the block device itself and should not end at
its parent.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
2018-01-22 23:09:12 +01:00
Tuomas Tynkkynen
8bad6cb176 fs: fat: Drop CONFIG_SUPPORT_VFAT
fat.h unconditionally defines CONFIG_SUPPORT_VFAT (and has done since
2003), so as a result VFAT support is always enabled regardless of
whether a board config defines it or not. Drop this unnecessary option.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-22 16:43:31 -05:00
Tuomas Tynkkynen
e8df14d216 fs: FAT: Fix typo in FS_FAT_MAX_CLUSTSIZE description
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-22 16:43:31 -05:00
Tuomas Tynkkynen
3cd084d364 env: ENV_IS_IN_FAT improvements
Make it select FS_FAT as well, because if it's not selected, enabling
ENV_IS_IN_FAT causes a Kconfig warning:

warning: (ENV_IS_IN_FAT) selects FAT_WRITE which has unmet direct dependencies (FS_FAT)

This also allows dropping some code from config_fallbacks.

Also drop the unnecessary help text about having to enable
CONFIG_FAT_WRITE - Kconfig automatically handles that.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-22 16:43:31 -05:00
Tuomas Tynkkynen
f1698a8cf5 ARM: poplar: Use Kconfig to enable CONFIG_FAT_WRITE
The symbol's been converted to Kconfig for a while, poplar is the only
one #defining it.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-22 16:43:31 -05:00
Tuomas Tynkkynen
3d22bae57f fs: Migrate ext4 to Kconfig
Migrate the following symbols to Kconfig:

CONFIG_FS_EXT4
CONFIG_EXT4_WRITE

The definitions in config_fallbacks.h can now be expressed in Kconfig.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-22 16:43:30 -05:00
Adam Ford
6574864df8 Convert CONFIG_ROCKCHIP_USB2_PHY to Kconfig
This converts the following to Kconfig:
   CONFIG_ROCKCHIP_USB2_PHY

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-22 16:43:30 -05:00
Adam Ford
b9b500b0f9 Convert CONFIG_OMAP_USB_PHY to Kconfig
This converts the following to Kconfig:
   CONFIG_OMAP_USB_PHY

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-22 16:43:30 -05:00
Adam Ford
3b9e2a2520 Convert CONFIG_TWL4030_USB to Kconfig
This converts the following to Kconfig:
   CONFIG_TWL4030_USB

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-22 16:43:30 -05:00
Adam Ford
26410c1517 Convert CONFIG_DAVINCI_SPI to Kconfig
This converts the following to Kconfig:
   CONFIG_DAVINCI_SPI

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-22 16:43:30 -05:00
Adam Ford
e13a9dc370 Convert CONFIG_USB_MUSB_HCD et al to Kconfig
This converts the following to Kconfig:
   CONFIG_USB_MUSB_HCD
   CONFIG_USB_MUSB_UDC
   CONFIG_USB_DAVINCI
   CONFIG_USB_OMAP3
   CONFIG_USB_DA8XX
   CONFIG_USB_AM35X

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-22 16:43:29 -05:00
Adam Ford
86362221fc Convert CONFIG_USB_MUSB_OMAP2PLUS et al to Kconfig
This converts the following to Kconfig:
   CONFIG_USB_MUSB_OMAP2PLUS
   CONFIG_USB_MUSB_AM35X
   CONFIG_USB_MUSB_DSPS
   CONFIG_USB_MUSB_PIO_ONLY

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-22 16:43:29 -05:00
Adam Ford
6931ab2fb4 ARM: omap3_logic: Enable SPL_OF_CONTROL and SPL_OF_PLATDATA
The SPL doesn't have much room, so in order to support OF_CONTROL
in SPL, we need the extra functionality of SPL_OF_PLATDATA.

Adding these features allows us to remove a small part of code without
losing the serial port during SPL.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-22 10:27:13 -05:00
Tom Rini
998ae28799 travis-ci: Add qemu-x86_64 target
Add qemu-x86_64 to the list of targets we use for test.py runs.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-22 10:27:13 -05:00
Giulio Benetti
3900b45125 sunxi: Fix display timing flags
flags member of struct timing was not initialized,
this took to unpredictable behaviour of display flags,
such DISPLAY_FLAGS_HSYNC_HIGH instead of _LOW etc.

Init timing->flags = 0

Signed-off-by: Giulio Benetti <giulio.benetti@micronovasrl.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-01-22 13:53:08 +05:30
Benoît Thébaudeau
b9b4f146c9 mmc: fsl_esdhc: Fix i.MX53 eSDHCv3 clock
Commit 4f425280fa ("mmc: fsl_esdhc: Allow all supported prescaler
values") made it possible to set SYSCTL.SDCLKFS to 0 in SDR mode on
i.MX, thus bypassing the SD clock frequency prescaler, in order to be
able to get higher SD clock frequencies in some contexts. However, that
commit missed the fact that this value is illegal on the eSDHCv3
instance of the i.MX53. This seems to be the only exception on i.MX,
this value being legal even for the eSDHCv2 instances of the i.MX53.

Fix this issue by changing the minimum prescaler value for the single
instance of the i.MX53 eSDHCv3 controller.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-22 14:17:13 +09:00
Jaehoon Chung
9546eb92cb mmc: fix the wrong disabling clock
When power is off, clock is not disabling.
Because it's passed to 1, mmc->clock should be set to f_min value.
Some drivers can't initialize the eMMC/SD card with current status.

This patch is to fix the disabling clock value to 0.

Fixes: 2e7410d76a ("mmc: disable the mmc clock during power off")

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Guillaume GARDET <guillaume.gardet@free.fr>
Tested-by: Anand Moon <linux.amoon@gmail.com>
2018-01-22 14:15:34 +09:00
Masahiro Yamada
61f2e5ee12 mmc: sdhci: change data transfer failure into debug message
During the tuning, drivers repeat data transfer, changing timing
parameters in the controller hardware.  So, the tuning commands
(CMD19 for SD, CMD21 for eMMC) fail, and this is not a problem
at all.

Showing "Error detected..." in normal operation just make users
upset.  This should not be shown.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
dd43e2a6bd mmc: sdhci-cadence: add HS200 support
Add HS200 timing setting and the MMC tuning callback.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
4041bf7f8a mmc: sdhci-cadence: call mmc_of_parse()
This is needed to parse more capabilities such as mmc-hs200-1_8v.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
954a963146 mmc: sdhci-cadence: use bitfield access macros for cleanup
This driver is a counterpart from the one in Linux.  Follow the
clean-up I did in Linux.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
be165fbbf1 mmc: sdhci: do not overwrite host_caps in sdhci_setup_cfg()
This line overwrites host_cap that has been set by drivers and/or
helpers like mmc_of_parse().  Accumulate capabilities flags.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
4b28f7bc93 mmc: let mmc_of_parse() fail for insane bus-width value
You must fix your DT if it specifies insane bus-width, for example,
  bus-width = <3>;

debug() is not displayed in usual configuration, so people will not
even notice weirdness.  Use dev_err() instead, then let it fail.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
c42ee367fd mmc: do not overwrite cfg->f_max if "max-frequency" if missing
mmc_of_parse() in U-Boot is a pussy helper; it sets cfg->f_max to
52MHz even if DT does not provide "max-frequency" at all.  This can
overwrite cfg->f_max that may have been set to a reasonable default.

As the DT binding says, "max-frequency" is an optional property.
Do nothing if DT does not specify it.  This is the behavior of
mmc_of_parse() in Linux.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Masahiro Yamada
3ab48f6223 dm: add dev_read_u32()
dev_read_u32_default() always returns something even when the property
is missing.  So, it is impossible to do nothing in the case.  One
solution is to use ofnode_read_u32() instead, but adding dev_read_u32()
will be helpful.

BTW, Linux has an equvalent function, device_property_read_u32();
it is clearer that it reads a property.  I cannot understand the
behavior of dev_read_u32() from its name.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-22 14:11:58 +09:00
Tom Rini
485c13c753 Merge git://git.denx.de/u-boot-dm 2018-01-21 20:13:29 -05:00
Mario Six
b79221a7d9 lib: fdtdec: Fix some style violations
Fix some style violations in fdtdec.c, and reduce the scope of some
variables.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
2e38662dc6 lib: fdtdec: Fix whitespace style violations
Fix some whitespace-related style violations in fdtdec.c.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
29d11b8838 core: Make device_is_compatible live-tree compatible
Judging from its name and parameters, device_is_compatible looks like it
is compatible with a live device tree, but it actually isn't.

Make it compatible with a live device tree.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
147c607448 core: Add {ofnode, dev}_translate_address functions
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
83a462a5e3 core: read: Fix style violations
There are some whitespace-related style violations in read.c; fix those.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
51db287a14 core: ofnode: Fix style violations
There are some style violations in ofnode.c; fix those.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
fcca9db819 clk: Makefile: Sort entries alphabetically
The Makefile entries in the clk driver directory were not alphabetically
sorted. Correct this.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
7fe1b063d8 clk: Remove superfluous gd declarations
The clk uclass was converted to support a live device tree recently,
hence the global data pointer declarations are no longer needed.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
e2db9e7a06 clk: clk_fixed_rate: Fix style violation
Fix a mis-indented function call in clk_fixed_rate.c

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Mario Six
268453be7c clk: clk-uclass: Fix style violations
checkpatch.pl complains that the clk_ops structures used in clk-uclass.c
ought to be const, so we mark them as const.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-01-21 10:01:02 -07:00
Peng Fan
0fe4e41825 dm: pinctrl: sync with Linux to use pin_config_param
Sync with Linux commit 30a7acd573899fd8b("Linux 4.15-rc6")
to use enum pin_config_param.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-21 10:01:02 -07:00
Stefan Brüns
d1ccaa4760 patman: Unquote output from get_maintainer.pl
get_maintainer.pl quotes names which it considers unsafe, i.e. anything
containing [^a-zA-Z0-9_ \-]. This confuses patman, it will duplicate
addresses which are also in Series-to/cc. Strip the quotes.

Signed-off-by: Stefan Brüns <stefan.bruens@rwth-aachen.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-21 10:01:02 -07:00
Mario Six
286ede6515 drivers: core: Add translation in live tree case
The function dev_read_addr calls ofnode_get_addr_index in the live tree
case, which does not apply bus translations to the address read from the
device tree. This results in illegal addresses on boards that rely on
bus translations being applied.

Fix this situation by applying bus translations in the live tree case as
well.

Signed-off-by: Mario Six <mario.six@gdsys.cc>
Tested-by: Stephen Warren <swarren@nvidia.com>
2018-01-21 10:01:02 -07:00
Heinrich Schuchardt
fa9335a89c dm: fix typo falback
%s/falback/fallback/g

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-21 10:01:02 -07:00
Tom Rini
557767ed29 Merge git://git.denx.de/u-boot-marvell 2018-01-20 08:39:47 -05:00
Tom Rini
c4cb6e64bf Merge git://git.denx.de/u-boot-arc 2018-01-19 16:07:36 -05:00
Faiz Abbas
e8b9fdced6 configs: keystone2: env: Fix burn_uboot_spi command
Now the u-boot spi image is greater than 0x90000, increase the same in
env during spi erase.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:33 -05:00
Tom Rini
cd87c4e3ef checkpatch: Ignore 'short' Kconfig help entries
A 2 line help entry for a new Kconfig entry is, at this time, sufficient
in some cases, so lets drop that warning for now.

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:33 -05:00
Tuomas Tynkkynen
7dd97af523 powerpc: Drop unreferenced CONFIG_* defines
The following config symbols are only defined once and never referenced
anywhere else:

CONFIG_CYRUS
CONFIG_IDS8313
CONFIG_MPC8308_P1M
CONFIG_MPC8308RDB
CONFIG_MPC8349EMDS
CONFIG_MPC8349ITXGP
CONFIG_SBC8349
CONFIG_SBC8548
CONFIG_SBC8641D
CONFIG_TQM834X
CONFIG_VE8313
CONFIG_XPEDITE5140
CONFIG_XPEDITE5200
CONFIG_XPEDITE550X

Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Acked-by: Mario Six <mario.six@gdsys.cc>
2018-01-19 15:49:32 -05:00
Patrice Chotard
aea0af8993 configs: stm32: move config flag from defconfig to Kconfig
Move system flags from defconfig to mach-stm32/Kconfig

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-01-19 15:49:32 -05:00
Patrice Chotard
ae74de0dfd serial: stm32: Rename serial_stm32x7.c to serial_stm32.c
Now this driver is used across stm32f4, stm32f7 and stm32h7
SoCs family, give it a generic name.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
2018-01-19 15:49:32 -05:00
Tuomas Tynkkynen
e6e5ecc5e2 m68k: Drop unreferenced CONFIG_* defines
The following config symbols are only defined once and never referenced
anywhere else:

CONFIG_AMCORE
CONFIG_ASTRO5373L
CONFIG_M52277EVB
CONFIG_M5253DEMO
CONFIG_M5253EVBE
CONFIG_M5275EVB
CONFIG_M54418TWR
CONFIG_STMARK2

Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-19 15:49:32 -05:00
Tuomas Tynkkynen
557017386b nds32: Drop unreferenced CONFIG_ADP_AG101P
Seems to be again one of those CONFIG_ symbols named after a board, with
nothing referencing it.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-19 15:49:31 -05:00
Tuomas Tynkkynen
7e477755b1 pcmcia: Drop a bunch of unused CONFIG_SYS_PCMCIA_ macros
Last users of the following macros (for n = 0..7) were removed in
commit 5b8e76c35e ("powerpc, 8xx: remove support for 8xx"):

CONFIG_SYS_PCMCIA_PBRn
CONFIG_SYS_PCMCIA_PORn

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-19 15:49:31 -05:00
Tuomas Tynkkynen
a5bee50720 Travis-CI: Add job for running test.py on qemu_arm64
The corresponding changes in the uboot-test-hooks repo are:

https://github.com/swarren/uboot-test-hooks/pull/15

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:31 -05:00
Tuomas Tynkkynen
1b012a3e7b Travis-CI: Download ARM64 version of GRUB as well
For preparation of adding AArch64 test.py jobs.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:31 -05:00
Tuomas Tynkkynen
e7ba41c653 ARM: Document AArch64 version of qemu-arm
It's mostly obvious, except that QEMU is annoying and requires an
explicit '-cpu cortex-a57' (or some other 64-bit core) to actually run
in 64-bit mode.

While at it, remove the references to setting the ARCH environment
variable; that is not used in U-Boot.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:31 -05:00
Tuomas Tynkkynen
ddcca73051 ARM: qemu-arm: Add support for AArch64
This adds support for '-machine virt' on AArch64. This is rather simple:
we just add TARGET_QEMU_ARM_xxBIT to select a few different Kconfig
symbols, provide the ARMv8 memory map from the board file and add a new
defconfig based on the 32-bit defconfig.

Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:30 -05:00
Andrew F. Davis
6b3d4f3def arm: mach-omap2: Remove secure certificate name printing
The signing certificate name is always 15 chars long, but need not be
null terminated. One solution is then to use printf precision modifiers
to only print this many chars ("%.15s"), but tiny printf does not support
this, so lets just drop printing the cert name for now.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2018-01-19 15:49:30 -05:00
Madan Srinivas
fbd23b9b94 arm: am33xx: security: Fix size calculation on header
Fix the size calculation in the verify boot. The header size
should be subtracted from the image size, not be assigned to
the image size.

Fixes: 0830d72bb9 ("arm: am33xx: security: adds auth support for encrypted images")
Signed-off-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:30 -05:00
Drew Moseley
0d8c1df8d8 rpi_0_w: Add configs consistent with RpI3
CONFIG_OF_EMBED in particular is needed to allow the Raspberry Pi
firmware to pass the DTB to U-Boot and on to the kernel.

Signed-off-by: Drew Moseley <drew.moseley@northern.tech>
2018-01-19 15:49:30 -05:00
Derald D. Woods
a47ca2cf67 ARM: omap3: evm: Add kernel image loading from UBIFS and EXT4
This commit adds UBIFS_NAND to BOOT_TARGET_DEVICES. This will
allow the kernel zImage to be loaded from '/boot/zImage' in UBIFS
(ubi0:rootfs).

Additionally update the *_MMC devices to also load kernel image from
the MMC 0:2 EXT4 file system.

DISTRO_DEFAULTS Setup

=====================

[primary] Check MMC 0:1 for /extlinux/extlinux.conf and boot
[fallback 1] Check MMC 0:2 /boot/zImage and run mmcbootz
[fallback 2] Check MMC 0:2 /boot/uImage and run mmcboot
[fallback 3] Check NAND UBIFS /boot/zImage and run nandbootubifs
[fallback 4] Check NAND partitions and run nandboot

The following "extlinux.conf" can be used to load images in the
top-level of the MMC 0:1 FAT partition.

[MMC(0:1)/extlinux/extlinux.conf]
---8<-------------------------------------------------------------------
default omap3-evm
label omap3-evm
	kernel /zImage
	fdt /omap3-evm.dtb
	append console=ttyO0,115200n8 root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait
---8<-------------------------------------------------------------------

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2018-01-19 15:49:30 -05:00
Heinrich Schuchardt
7341714d6e board_r: remove superfluous #ifdef CONFIG_PRAM
initr_mem() is already enclosed by
	#if defined(CONFIG_PRAM)
	#endif

So there is no need to check CONFIG_PRAM again inside the
function.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-19 15:49:29 -05:00
Tom Rini
bb2277b3ee GPIO: tca642x: Rework to not include commands in SPL
The command portion of the GPIO driver can only be used in full SPL so
re-work to guard the command related portions and mark it as static.

Cc: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:29 -05:00
Tom Rini
0d097b774d GPIO: pca953x: Rework to not include commands in SPL
The command portion of the GPIO driver can only be used in full SPL so
re-work to guard the command related portions and mark it as static.

Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-19 15:49:29 -05:00
Klaus Goger
7e37a88465 cmd: pmic: update help description
Change help description to match the style of the other U-Boot commands
and get rid of the leading whitespace.

Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2018-01-19 15:49:29 -05:00
Heinrich Schuchardt
d2f7158028 fs/fat: remove distractive message in file_fat_read_at()
The message "reading %s\n" may be interesting when
debugging but otherwise it is superfluous.

Only output the message when debugging.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-19 15:49:28 -05:00
Heinrich Schuchardt
a327bde783 fs: remove distractive message in fs_read()
The message
"** %s shorter than offset + len **\n"
may be interesting when debugging but it does not indicate an
error.

So we should not write it if we are not in debug mode.

Fixes: 7a3e70cfd8 fs/fs.c: read up to EOF when len would read past EOF
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-19 15:49:28 -05:00
Adam Ford
3cf0061ab5 DA850evm: Remove dead code
There is an #ifdef and #endif with nothing in between.  This patch simply
removes this dead/useless code.

Signed-off-by: Adam Ford <aford173@gmail.com>
2018-01-19 15:49:28 -05:00
Derald D. Woods
4b37928d35 ARM: dts: omap3-beagle{-xm}: Enable DM and devicetree for BeagleBoard
This commit updates the configuration files needed to support OF_CONTROL
on the OMAP3 BeagleBoard(s).
2018-01-19 15:49:28 -05:00
Derald D. Woods
3ff0d80181 ARM: dts: omap3-beagle{-xm}: Add support for BeagleBoard
This commit adds OMAP3 BeagleBoard devicetree files from
Linux v4.15-rc5. This includes standard OMAP34XX board revisions as
well as the 'xM' which is OMAP36XX.

Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2018-01-19 15:49:28 -05:00
Lokesh Vutla
3741c044cb env: ti: Select dtb name for dra76x and am574
Select dtb name for am574x-idk and dra76x evm with acd package.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:27 -05:00
Lokesh Vutla
b4185e4fef ARM: dts: am574x-idk: Add initial support
Add initial dts support for am574x-idk

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:27 -05:00
Lokesh Vutla
1f126897d8 board: ti: am57xx: Enable CMD_DDR3
Enable CMD_DDR3 on all am57xx based platforms.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:27 -05:00
Lokesh Vutla
443b0df361 board: ti: am574x-idk: Update pinmux using latest PMT
Update the board pinmux for AM574x-IDK board using latest PMT[1] and the
board files named am574x_idk_v1p3b_sr2p0 that were auto generated on
13th October, 2017 by "Ahmad Rashed <a-rashed@ti.com>".

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:27 -05:00
Lokesh Vutla
7b16de8595 board: ti: am574x-idk: Add ddr data support
AM574x-idk has the following DDR parts attached:
EMIF1: MT41K256M16HA (1GB with ECC)
EMIF2: MT41K256M16HA (1GB without ECC)

Enabling 2GB DDR without interleaving between EMIFs. And
enabling ECC on EMIF1.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
2018-01-19 15:49:27 -05:00
Lokesh Vutla
10f430f3f1 board: ti: am574x-idk: Add hw data support
Update prcm, voltages and pinmux support for am574x-idk.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:26 -05:00
Lokesh Vutla
9646b95f64 board: ti: am574x-idk: Add epprom support
am574x-idk is a board based on TI's am574 processor
Add eeprom support.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:26 -05:00
Lokesh Vutla
941f2fcc5b arm: dra762: Add support for device package identification
DRA762 comes in two packages:
- ABZ: Pin compatible package with DRA742 with DDR@1333MHz
- ACD: High performance(OPP_PLUS) package with new IPs

Both the above packages uses the same IDCODE hence needs to
differentiate using package information in DIE_ID_2.
Add support for the same. Also update clock, ddr, emif information.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:26 -05:00
Lokesh Vutla
8a8af8a2fd cmd: ti: Generalize cmd_ddr3 command
Keystone and DRA7 based TI platforms uses same
EMIF memory controller. cmd_ddr3 command is customized
for keystone platforms, make it generic so that it can
be re used for DRA7  platforms.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:26 -05:00
Lokesh Vutla
5cd9661dc6 arm: keystone: Move cmd_ddr3 to a common place
Move cmd_ddr3 to cmd/ti in order to make
it build for non-keystone TI platforms.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Rename to ddr3.c not cmd_ddr3.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:26 -05:00
Lokesh Vutla
650fda93c8 arm: emif-common: Add suppport for enabling ECC
For data integrity, the EMIF1 supports ECC on the data
written or read from the SDRAM. Add support for enabling
ECC support in EMIF1.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
2018-01-19 15:49:25 -05:00
Lokesh Vutla
e18cd3d796 arm: emif-common: Add ecc specific emif registers
This is a slight difference in emif_ddr_phy_status register offsets for
DRA7xx EMIF and older versions. And ecc registers are available only
in DRA7xx EMIC. Add support for this difference and ecc registers.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:25 -05:00
Tero Kristo
72b7af5a04 drivers: dma: ti-edma3: add support for memory fill
Add support for simple memory fill operation. With large data sizes
it is much faster to use EDMA for memory fill rather than CPU.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2018-01-19 15:49:25 -05:00
Felix Brack
445277b9d1 dt-bindings: leds: adopt Linux PCA9532 binding constants
I'm working on a v2 patch to add support for a board named pdu001. Its
Linux DTS file uses the include file added by this patch. To keep Linux
and U-Boot DTS files in sync U-Boot requires a copy of this file,
although there is no driver for NXP's PCA9532 i2c LED driver chip (yet).

Signed-off-by: Felix Brack <fb@ltec.ch>
2018-01-19 15:49:25 -05:00
Lokesh Vutla
f1627bdc19 board: ti: k2g: Make ddr3* declarations as static
All ddr3_emif declarations are not used outside ddr3_k2g.c
file. So make all of them as static.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:25 -05:00
Tomi Valkeinen
8d0dcbf212 board: ti: dra76: mux wakeup2 as gpio1_2
gpio1_2 is used for HPD interrupt with DRA76's DVI add-on board, so mux
the pin as gpio and PIN_INPUT.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2018-01-19 15:49:24 -05:00
Lokesh Vutla
9b88a4bda2 arm: am33xx: Avoid writing into reserved DPLL divider
DPLL DRR doesn't have an M4 divider. But the clock driver is trying
to configure M4 divider as 4(writing into a reserved register).
Fixing it by making M4 divider as -1.

Reported-by: Steve Kipisz <s-kipisz2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:24 -05:00
Lokesh Vutla
3a0e70f181 tools: omapimage: Fix mismatch of image size in header
The size field in GP header that is expected by ROM is size of the
image + size of the header. But omapimage tool is updating size
as image size + 2 * header size. Remove this extra header size bytes.

Reported-by: Denys Dmytriyenko <denys@ti.com>
Debugged-by: Madan Srinivas <madans@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:24 -05:00
Rex Chang
4849d95407 board: ti: K2G FC SoC 1GHz and DDR3 1066 MT/s support
Added support for K2G EVM with FlipChip SoC of which
ARM/DDR3 runs at 1GHz/1066 MT/s. The patch is also
backward compatible with old revision EVM and EVM
with WireBond SoC. Their ARM/DDR3 run at 600MHz/800 MT/s.

The new SoC supports 2 different speeds at 1GHz and 600MHz.
Modyfied the CPU Name to show which SoC is used in the EVM.
Modified the DDR3 configuration to reflect New SoC supports
2 different CPU and DDR3 speeds, 1GHz/1066MT and 600MHz/800MT.

Added new inline function board_it_k2g_g1() for the new FlipChip 1GHz,
and set the u-boot env variable board_name accordingly.

Modified findfdt script in u-boot environment variable to include new k2g board type.

Signed-off-by: Rex Chang <rchang@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:24 -05:00
Lokesh Vutla
19f3feaed1 configs: k2g_evm: Allocate more space for u-boot
Now that we have multi dtb enabled in u-boot allocate
128K space for u-boot.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-01-19 15:49:24 -05:00
Vignesh R
e36edcec0a board: ti: dra7xx: Select MCAN instead of DCAN on DRA76 EVM
MCAN can be accessed via DCAN1 or DCAN2. Determining which DCAN instance
to use if any at all is done through
CTRL_CORE_CONTROL_SPARE_RW.SEL_ALT_MCAN. Since general pinmuxing is
handled in U-boot. Handle this additional pinmuxing requirement in U-boot
to ensure that MCAN is used by default via the DCAN1 pins.

Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
[fcooper@ti.com: Update commit message and use DCAN1 not DCAN2 for MCAN]
Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2018-01-19 15:49:23 -05:00
Kishon Vijay Abraham I
29171dcfaa mmc: omap_hsmmc: Fix incorrect bit operations for disabling a bit
omap_hsmmc driver uses "|" in a couple of places for disabling a bit.
While it's okay to use it in "mmc_reg_out" (since mmc_reg_out has a
_mask_ argument to take care of resetting a bit), it's incorrectly used
for resetting flags in "omap_hsmmc_send_cmd".

Fix it here by using "&= ~()" to reset a bit.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:23 -05:00
Kishon Vijay Abraham I
866bb98468 mmc: omap_hsmmc: Enable Auto command (CMD12) enable
Instead of sending STOP TRANSMISSION command from MMC core, enable
the auto command feature so that the Host Controller issues CMD12
automatically when last block transfer is completed.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:23 -05:00
Kishon Vijay Abraham I
f0d53e88a6 mmc: omap_hsmmc: Add support for DMA (ADMA2)
The omap hsmmc host controller can have the ADMA2 feature. It brings better
read and write throughput.
On most SOC, the capability is read from the hl_hwinfo register. On OMAP3,
DMA support is compiled out.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-19 15:49:17 -05:00
Chris Packham
672e559830 ddr: marvell: update ddr controller init and freq
Update the calculation for tWR and tPD. This improves the DDR refresh
interval and brings the initialization into line with the binary blobs
currently being supplied by Marvell.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-19 16:30:29 +01:00
Chris Packham
8bddf678db ddr: marvell: update additional ODT setting
The RD_SAMPLE_DELAY field is 5 bits so it needs to be masked with 0x1f
instead of 0xf. Rather than checking the read sample delay for all DDR
chip selects use the values for the chip selects that are actually
configured. Finally continue searching for the max_phase value even if the
current read_sample is the same as the max_read_sample.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-19 16:30:29 +01:00
Chris Packham
2efd27f76a ddr: marvell: use correct TREFI value
The ternary operation had the HIGH/LOW values the
wrong way round. Update it to use the correct value.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-19 16:30:29 +01:00
Chris Packham
dbaf09590d ddr: marvell: only assert M_ODT[0] on write for a single CS
When using only a single DDR chip select only assert M_ODT[0] on write.
Do not assert it on read and do not assert M_ODT[1] at all. Also set
tODT_OFF_WR to 0x9 which contradicts the recommendation from the
functional spec but is what Marvell's binary training blob does and
seems to give better results when ODT is active during writes.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-19 16:30:29 +01:00
Alexey Brodkin
8f44e1ee79 ARC: devboards: Allow huge uImages (up to 128 MiB)
Even though in production uImage usually is quite small as
it contains just Linux kernel image during development it might
be pretty convenient to have root-FS built into the same image.

That makes uImage much larger but given on our dev platforms we have
quite a lot of DDR (> 512 MiB) we may afford loading huge uImages.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
c0e6769a82 ARC: Invalidate instruction and data caches early on boot
This is useful to make sure no stale data exists in caches after bootloaders.

The worst thing could be some lines of cache were locked in a bootloader
for example during DDR recalibration and never unlocked. This may lead
to really unpredictable issues later down the line.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
7897f4e54c ARC: HSDK: DTS: Add cgu-clk node
Add cgu-clk (clock generation unit) node to HSDK device tree.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
320c8a1a86 ARC: HSDK: CGU: Add 'Hz' when printing clock frequency
Add 'Hz' when printing clock frequency in error messages.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
f6d7812d8d ARC: HSDK: CGU: Use plat data instead of priv data
Correctly allocate hsdk_cgu_clk private data structure using
priv_auto_alloc_size instead of platdata_auto_alloc_size.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
075cbae163 ARC: HSDK: CGU: Update AXI, TUN, ARC clock options
Update default AXI, TUN, ARC clock set options:
instead of changing only IDIV divider settings adjust also domain PLL
settings.

Add support of TUN_ROM and TUN_PWM clocks (subclocks of TUNN_PLL)

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
5aec2569a6 ARC: HSDK: Hang on panic
As HSDK is a development board it is better to hang on panic instead of
reset the board when panic occurs. That way we preserve a state of HW
for possibility to do post-mortem debug via JTAG.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
19b10a42f6 ARC: Cache: Fix style violations reported by checkpatch
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:35 +03:00
Eugeniy Paltsev
b0146f9e29 ARC: Cache: Disable IOC by default
We'd like to keep IOC HW at the same state as t is right after reset when we
start Linux kernel so there will be no re-configuration of IOC on the go.

The point is U-Boot doesn't benefit a lot from IOC as it doesn't do a
lot of DMA operations especially on multiple cores simultaneously.

At the same time re-configuration of IOC in run-time might become quite
a tricky experience because we need to make sure there're no DMA
trannsactions in flight otherwise unexpected consequencses might affect
us much later and debugging those kinds of issues will be a real
nightmare.

That said let's make our life easier a little bit.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:34 +03:00
Eugeniy Paltsev
41cada4d24 ARC: ARCv2: Cache: Fixed operation without IOC
Previous SLC management implementation is broken. Seems like it was
never sufficiently tested probably because most of the time IOC was used
instead (i.e. no manual cache operations were done).

Now if we disable IOC in U-boot we'll get a lot of errors while using
DMA-enabled peripherals.

This time we fix it by substitution of broken per-line SLC operations
region operations as it is done in the Linux kernel (we took it from
v4.14 which is the latest stable as of today).

Among other things this implementation might be a bit faster because
instead of iteration over each and every cache line we're taking care
about entire region in one go.

Main changes:
 * Replaced __slc_line_op (per line operations) by __slc_rgn_op
   (region operations).

 * Reworked __slc_entire_op to get rid of __after_slc_op and
   __before_slc_op functions.
   Note flush fix (flush only instead of flush-n-inv when OP_FLUSH is
   used, see [1] for more details) is already incorporated here.

 * Added SLC invalidation to invalidate_icache_all().

 * Added (start >= end) check to invalidate_dcache_range() and
   flush_dcache_range() as some buggy drivers pass region start == end.

 * Added read-out of MMU BCR so we may know if PAE40 exists in HW and then
   act on a particular AUX regs accordingly.

[1] http://lists.infradead.org/pipermail/linux-snps-arc/2018-January/003357.html

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-01-19 17:59:34 +03:00
Jean-Jacques Hiblot
f844d5f4e6 omap: Update the base address of the MMC controllers
Align the base address defined in header files with the base address used
in the DTS. This will facilitate the introduction of the DMA support.

Of all HSMMC users, only omap3 doesn't have the 0x100 reserved region at
the top. This region will be used to determine if the controller supports
DMA transfers

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-18 22:04:21 -05:00
Jean-Jacques Hiblot
741726ae4c Revert "omap_hsmmc: update struct hsmmc to accommodate omap3 from DT"
This reverts commit 46831c1a4c.
This reserved area at the beginning of struct hsmm, will be used later to
support ADMA

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-18 22:04:21 -05:00
Tom Rini
086ebcd40e Merge git://git.denx.de/u-boot-fsl-qoriq 2018-01-17 13:48:35 -05:00
Ashish Kumar
2eb2dbd457 armv8: ls1088ardb: Add environment variable address location for QSPI-NOR
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-17 10:30:54 -08:00
Ashish Kumar
b500c92b70 env: sf: Add support for env init for QSPI-NOR
ENV variables can now be used before relocation.

Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-17 10:30:54 -08:00
Ashish Kumar
134200a5ef armv8: ls1088: Add USB and PCI configs in SD-BOOT defconfig
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-17 10:30:54 -08:00
Yuantian Tang
ae02cf03bc arm64: ls1012a: Add sata distro boot support
Sata is equipped on ls1012a and can be a boot source. Add sata boot
support as an option if available.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-17 10:30:54 -08:00
Yuantian Tang
f216ef252e arm64: ls1046a: Add sata distro boot support
Sata is equipped on ls1046a and can be a boot source. Add sata boot
support as an option if available.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-17 10:30:54 -08:00
Tom Rini
1f0ce3259e freescale: Ensure common commands are not included in SPL binary
Both the "qixis_reset" and esbc_validate" commands can only be used in
full U-Boot so do not build them in SPL.  As part of this rework the
qixis code to declare things as static and make use of __weak for
function aliases.

Cc; York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-17 10:30:45 -08:00
Tom Rini
3759df0c08 tools: Update python "help" tests to cope with "more" oddities
In some cases when "more" is told to page a given file it will prepend
the output with:
::::::::::::::
/PATH/TO/THE/FILE
::::::::::::::

And when this happens the output will not match the expected length.
Further, if we use a different pager we will instead fail the coverage
tests as we will not have 100% coverage.  Update the help test to remove
the string in question.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-16 16:15:25 -05:00
Tom Rini
23b4cf32b7 Merge git://git.denx.de/u-boot-i2c 2018-01-16 10:13:38 -05:00
Tom Rini
da54e7e5a9 Merge git://git.denx.de/u-boot-dm 2018-01-16 10:12:40 -05:00
Peng Fan
fb0128736b i2c: mxc_i2c: Use or operation
The operation should be OR, not BIT OR.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
2018-01-16 06:59:39 +01:00
Peng Fan
34b0af8390 imx: mx7ulp: modify lpi2c seq number
Modify the lpi2c alias seq number to align with device.
Then no need to add 4 to get the device index.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-16 06:59:15 +01:00
Peng Fan
0074d4bf2d i2c: lpi2c: do not add 4 for bus seq
The number 4 is dedicated on i.MX7ULP, but lpi2c will be reused on i.MX8,
4 is not valid. The seq number could be configured by alias node.

The following patch will use i2c4 as the begin for i.MX7ULP.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-16 06:58:59 +01:00
Simon Glass
ed772fe79b test: Set the DTC environment variable
Set this to our own device-tree compiler since we know it is new enough to
run the tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
3ed0de31b4 dtoc: Allow DTC environment variable to provide path to dtc
The system device-tree compiler may not be new enough to run the tests we
use in U-Boot (e.g. with binman). Allow use of a DTC environment variable
to point to the correct dtc. If not defined, the dtc on the default PATH
is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Andre Przywara
4d4db83d18 armv8: secure firmware: fix incorrect unit address in node name
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Remove the unit address from the config node name when U-Boot deals with
secure firmware FIT images.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
2eda8e9aad tools: fix incorrect usage of DT node unit address
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Correct the generated unit names when U-Boot's mkimage creates a FIT
image.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
8837af154c sunxi: arm64: correct usage of DT node address in FIT generation
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Adjust the FIT build script for 64-bit Allwinner boards to remove the
bogus addresses from the node names and avoid the warnings.
This avoids a warning with recent versions of the dtc tool.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
b2267e8a22 fix incorrect usage of DT node unit address in comments
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the tree where node names were mentioned in
comments, to not give bad examples to the reader.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
971a54193c doc: fix incorrect usage of DT node unit address
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in various documentation files where this was not
observed, to not give bad examples to the reader.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
b8790ebeec doc: FIT image: fix incorrect examples of DT node unit address
The DT spec demands a unit-address of a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the FIT image example files where this was not
observed, to not give bad examples to the reader.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Andre Przywara
838404054e doc: FIT image: fix incorrect description of DT node unit address
The DT spec demands a unit-address in a node name to match the "reg"
property in that node. Newer dtc versions will throw warnings if this is
not the case.
Fix all occurences in the FIT image documentation files where this was not
observed, to not give bad examples to the reader.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2018-01-15 18:29:21 -07:00
Simon Glass
30d704c645 binman: Run code coverage tests
Binman has 100% test coverage for the code as it is at present. To
encourage it to stay that way, run the code-coverage test as part of the
normal U-Boot tests.

This is RFC because it requires the Python code coverage tools to be
available.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
f2d0778885 travis.yml: Run tests for tools
Run tests for the Python tools used by U-Boot.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
00f6c800b5 test: Run dtoc tests
Update the test script to run the dtoc tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
34ba7d777d test: Run buildman tests
Update the test script to run the buildman tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
adb5b61612 test: Run patman tests
Update the test script to run the patman tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Simon Glass
72d8172be0 test: Run binman tests
Update the test script to run the binman tests also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2018-01-15 18:29:21 -07:00
Tom Rini
fdb6c3232f Merge git://git.denx.de/u-boot-net 2018-01-15 19:01:23 -05:00
Tom Rini
8e9801c283 Merge git://git.denx.de/u-boot-imx 2018-01-15 16:44:18 -05:00
Rob Clark
a970ee2257 db410c: on aarch64 the fdtfile is in per-vendor subdirectory
Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-01-15 16:29:04 -05:00
Rob Clark
35bdd839d0 db410c: add reserved-memory node to dts
If lk lights up display and populates simple-framebuffer node, it will
also setup a reserved-memory node (needed by simplefb on linux).  But
it isn't clever enough to cope when the reserved-memory node is not
present.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-01-15 16:29:04 -05:00
Jorge Ramirez-Ortiz
9337dfb434 db410c: use the device tree parsed by the lk loader.
We dont need to keep copies of the properties that we are going to
fixup since we will be using the dtb provided by the firmware.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 16:29:03 -05:00
Rob Clark
3b595da441 fdtdec: allow board to provide fdt for CONFIG_OF_SEPARATE
Similar to CONFIG_OF_BOARD, but in this case the fdt is still built by
u-boot build.  This allows the board to patch the fdt, etc.

In the specific case of dragonboard 410c, we pass the u-boot generated
fdt to the previous stage of bootloader (by embedding it in the
u-boot.img that is loaded by lk/aboot), which patches the fdt and passes
it back to u-boot.

Signed-off-by: Rob Clark <robdclark@gmail.com>
[trini: Update board_fdt_blob_setup #if check]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-15 16:29:03 -05:00
Jorge Ramirez-Ortiz
0689eb7470 db410c: replace reset driver with psci
this should be the norm for armv8 platforms.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 16:29:03 -05:00
Jorge Ramirez-Ortiz
e2beb872f7 db410c: update wlan and bt mac addresses from firmware
The firmware that runs before u-boot modifies u-boot's device tree
adding the local-mac-address and local-bd-address properties for the
compatibles "qcom,wcnss-bt" and "qcom,wcnss-wlan".

This commit reads that firmware, retrieves the properties and fixups
the device tree that is passed to the kernel before booting.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 16:29:03 -05:00
Jorge Ramirez-Ortiz
5bef39982a db410c: configs: increase gunzip buffer size for the kernel
the kernel fails to boot when it goes over the limit.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 16:29:03 -05:00
Jorge Ramirez-Ortiz
100fb0bd99 db820c: stop autoboot when vol- pressed
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 16:29:02 -05:00
Jorge Ramirez-Ortiz
e0cc0b6c6d db820c: enable pmic gpios for pm8994
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 16:29:02 -05:00
Jorge Ramirez-Ortiz
4b684a6b82 db820c: add qualcomm dragonboard 820C support
This commit adds support for 96Boards Dragonboard820C.

The board is based on APQ8086 Qualcomm Soc, complying with the
96Boards specification.

Features
 - 4x Kyro CPU (64 bit) up to 2.15GHz
 - USB2.0
 - USB3.0
 - ISP
 - Qualcomm Hexagon DSP
 - SD 3.0 (UHS-I)
 - UFS 2.0
 - Qualcomm Adreno 530 GPU
 - GPS
 - BT 4.2
 - Wi-Fi 2.4GHz, 5GHz (802.11ac)
 - PCIe 2.0
 - MIPI-CSI, MIPI-DSI
 - I2S

U-Boot boots chained from LK (LK implements the fastboot protocol) in
64-bit mode.

For detailed build instructions see readme.txt in the board directory.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 16:29:02 -05:00
Jorge Ramirez-Ortiz
7c75f7f1b2 arm: mach-snapdragon: refactor clock driver
In preparation to add support for the Dragonboard820c (APQ8096),
refactor the current Snapdragon clock driver.

No new functionality has been added.

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 16:29:02 -05:00
Jorge Ramirez-Ortiz
1087a7942c env: enable accessing the environment in an EXT4 partition
For example to store the environment in a file named "/uboot.env" in MMC
"0", where partition "1" contains the EXT4 filesystem, the following
configs should be added to the board's default config:

  CONFIG_ENV_IS_IN_EXT4=y
  CONFIG_ENV_EXT4_DEVICE_AND_PART="0:1"
  CONFIG_ENV_EXT4_FILE="/uboot.env"
  CONFIG_ENV_EXT4_INTERFACE="mmc"

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
[trini: Fix some line over 80 chars issues]
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-15 16:28:57 -05:00
Tom Rini
68ae7772af arm: ls1021atwr: Rework local commands to not be included in SPL
Move some of the code for the "lane_bank" and "cpld" code local
commands so that they are not built for SPL as they can only be
used in full U-Boot.  This means we can mark a few functions as
static as well now.

Cc: Alison Wang <alison.wang@freescale.com>
Cc: Sumit Garg <sumit.garg@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Alison Wang <alison.wang@nxp.com>
Tested-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 12:44:24 -08:00
Tom Rini
3a72a0efcc powerpc: P1010RDB: Rework local command to not be included in SPL
Add a CONFIG_SPL_BUILD guard around the code for the "mux" command so
it is not included in SPL.

Cc: Qiang Zhao <qiang.zhao@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Reviewed-by: Qiang Zhao <qiang.zhao@nxp.com>
2018-01-15 12:44:24 -08:00
Priyanka Jain
da28a03ed4 board/ls2081ard: Correct code to get QMAP value in checkboard
QMAP value contains information about QSPI chip-selects. These bits
are used to display information of boot device in checkboard()
function.

QMAP value is stored in most significant 3-bits of 8-bit register
brdcfg[0] in Qixis, this patch corrects code to get QMAP bits using
below logic:
	(brdcfg[0] >> 5) & 0x7

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 12:44:23 -08:00
Priyanka Jain
f436fbfeb1 board/ls2081ardb: Update board related prints
Remove Board Arch print as its value is always constant '1' and does
not contain any important information to display during boot.
Add print to display Board FPGA version.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 12:44:23 -08:00
Sumit Garg
86c773fe83 configs: SECURE_BOOT: Enable CONFIG_CMD_EXT4_WRITE
As part of chain of trust with confidentiality along with distro
boot, linux kernel image needs to be stored in encrypted form on
ext4 boot partition. So enable CONFIG_CMD_EXT4_WRITE in case of
Secure boot on ARM based platforms.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 12:44:23 -08:00
Zhang Ying-22455
958b2ed526 armv8/ls1088a: configure PMU's PCTBENR to enable WDT
The SP805-WDT module on LS1088A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.

Signed-off-by: Zhang Ying-22455 <ying.zhang22455@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 12:44:23 -08:00
Sriram Dash
a2bbfc5480 serial: lpuart: Proper device identification
Identify and distinguish between platform device type of MX7ULP
and LS1021A.

This is a fix to commit 7edf5c45("serial: lpuart: add i.MX7ULP
support").

Signed-off-by: Sriram Dash <sriram.dash@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 12:44:09 -08:00
Bhaskar Upadhaya
b0ce187b1f board: ls1012a: LS1012A-2G5RDB board support
LS1012A-2G5RDB belongs to LS1012A family with features 2 2.5G SGMII
PFE MAC, SATA, USB 2.0/3.0, WiFi DDR, eMMC, QuadSPI, UART.

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 11:56:33 -08:00
Bhaskar Upadhaya
bdc48ec61e armv8/kconfig: Align boards of same family at one place
Align boards belonging to LS1012A, LS2080A SoC at one place.

Signed-off-by: Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-15 11:55:54 -08:00
Zhao Qiang
1e2d2597a6 phy: atheros: set auto-negotiation for AR8021
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:27 -06:00
Nobuhiro Iwamatsu
dcd18eaf61 net: sh-eth: Add to Kconfig and convert
This adds SH_ETHER to drivers/net/Kconfig and convert to Kconfig.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:26 -06:00
Nobuhiro Iwamatsu
aae5d237b9 net: sh-eth: Fix misaligned cache operation warning
When we using network on board using sh-eth, it prints a lot of
"CACHE: Misaligned operation at range" messages.
This commit fixes this problem.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:26 -06:00
Nobuhiro Iwamatsu
fbfb511548 net: sh-eth: Change read/write() param to struct sh_eth_info
This changes Change structure used in sh_eth_read and sh_eth_write function
from struct sh_eth_dev to struct sh_eth_info. This is necessary to convert
to Driver Model.

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:25 -06:00
Nobuhiro Iwamatsu
9b5f9ecf6e net: sh-eth: Remove bd_t from sh_eth_config()
bd_t is not used in sh_eth_config(). This deletes bd_t from sh_eth_config()

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:24 -06:00
Nobuhiro Iwamatsu
dc14867d0f net: sh-eth: Fix coding style checked by checkpatch.pl
This fixes the chord style checked by checkpatch.pl.
Details of change details are as follows:

 - Fix typo
    Change from alligned to aligned.
 - Remove whitespace before ','
 - Add spaces preferred around that '|'
 - Fix missing a blank line after declarations
 - Remove space after a cast declaration
 - Fix format of block comments
 - Add a blank line after function/struct/union/enum declarations

Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:24 -06:00
Joe Hershberger
2099b9f27c net: dhcp: Allow "MAY_FAIL" to still try each adapter
This change allows the "MAY_FAIL" DHCP option to still attempt to
contact a DHCP server on each adapter and only give up once each
adapter has failed once.  To get the existing behavior, set the
already-existing ethrotate=no variable.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
2018-01-15 12:05:23 -06:00
Florian Fainelli
d5d5757291 configs: Update Lamobo_R1 with B53 switch options
Enable CONFIG_B53_SWITCH, define the CPU/management port number (8) and
enable all 5 ports of the switch to be usable.

Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-01-15 12:05:22 -06:00
Florian Fainelli
f3d78fbfaf net: phy: b53: Add b53_reg read/write commands
Add a b53_reg read/write command which allows inspecting the switch
registers. Because the Broadcom BCM53xx registers have different sizes,
we need to split the accesses in 8, 16, 32, 48 or 64 bits to obtain
expected results.

Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-01-15 12:05:22 -06:00
Florian Fainelli
7a9ca9db40 net: designware: Pad small packets
Make sure that we pad small packets to a minimum length of 60 bytes
(without FCS). This is necessary to interface with Ethernet switches
that will reject RUNT frames unless padded correctly.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-01-15 12:05:21 -06:00
Florian Fainelli
137963d71a net: phy: Add Broadcom BCM53xx switch driver
Add a minimalistic Broadcom BCM53xx (roboswitch) switch driver similar
to the Marvell MV88E617x. This takes care of configuring the minimum
amount out of the switch hardware such that each user visible port
(configurable) and the CPU port can forward packets between each other
while preserving isolation with other ports.

This is useful for e.g: the Lamobo R1 board featuring a Broadcom
BCM53125 switch.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2018-01-15 12:05:21 -06:00
Patrice Chotard
ba1f966725 net: designware: add clock support
This implementation manages several clocks, disable and
free all of them in case of error during probe and in remove
callback.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:20 -06:00
Patrice Chotard
ea8cd652a7 dm: core: add missing dev_count_phandle_with_args()
Add missing dev_count_phandle_with_args() to avoid
compilation issue.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:19 -06:00
Jason Brown
32ac8b0bba net: mvneta - Fixed recv() when multiple packets have arrived.
This patch fixes a problem in the mvneta driver where if more than
one packet arrives between calls to mvneta_recv(), the additional
descriptors will be marked as free even though only one descriptor
has been read and processed from the receive queue.  This causes
the additional packet(s) to be delayed until the next packet arrives.
>From this point on all packets will be delayed because the receive
queue will contain unprocessed packets but the hardware shows no
busy descriptors.

Signed-off-by: Jason Brown <jason.brown@apcon.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:19 -06:00
Chris Brandt
33bab10457 net: miiphybb: fix casting error
Since the return value is a signed int, if the leading MSB of rdreg is a 1,
it will get signed extended and will return a negative value which is an
error even though we read the correct value.

Fixes: dfcc496ed7 ("net: mii: Changes not made by spatch")
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:17 -06:00
Chris Brandt
f6ac626c8a net: sh-eth: remove sh_eth_offset_rz table
First, this table could never be included in the build anyway because
SH_ETH_TYPE_RZ is not defined until later in the file.
Second, the register PIR was missing, so PHY MDIO never worked.
Third, after adding the PIR register, the table is EXACTLY the same as
sh_eth_offset_gigabit, so there is no value to it.

Therefore, just delete it use the gigabit one.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:17 -06:00
Chris Brandt
5ad565b0d1 net: sh-eth: fix inl and outl definitions
The macros inl and outl maybe already be defined from file
arch/arm/include/asm/io.h so there may be no reason to define them.
And if you do try defined them here, you get a redefined complier warning.

Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:16 -06:00
Lukasz Majewski
ce27eb9b40 net: phy: marvell: Add functions to read PHY's extended registers
This commit allows extended Marvell registers to be read with:

foo > mdio rx FEC 3.10
Reading from bus FEC
PHY at address 0:
3.16 - 0x1063
foo > mdio wx FEC 3.10 0x1011

The above code changes the way ETH connector LEDs blink.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: York Sun <york.sun@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:16 -06:00
Joe Hershberger
765a159cf5 net: Remove nfs.h include from bootp.c
Nothing from this header is used there, so remove it.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:15 -06:00
Joe Hershberger
3cacc6a772 net: Fix buffer overrun error in netconsole
Need to not access the byte after the input_buffer.

Reported-by: Coverity (CID: 144423)
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:14 -06:00
Wilson Lee
4bf56913d0 net: macb: Add support for Xilinx Zynq SoC
Although Xilinx Zynq SoC was using MACB similar hardware. However,
U-boot MACB driver was not supporting Xilinx Zynq SoC. This patch is
to add support for the Xilinx Zynq SoC to the existing MACB network
driver.

This patch is to add Zynq GEM DMA Config, provide callback
function for different linkspeed for case of using Xilinx Zynq
Programmable Logic as GMII to RGMII converter.

This patch convert the return value to use error codes.

Signed-off-by: Wilson Lee <wilson.lee@ni.com>
Cc: Chen Yee Chew <chen.yee.chew@ni.com>
Cc: Keng Soon Cheah <keng.soon.cheah@ni.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Wenyou Yang <wenyou.yang@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-01-15 12:05:14 -06:00
Rob Clark
f2006808f0 dm: core: parse chosen node
This is the node that would contain, for example, the framebuffer setup
by an earlier stage.

Signed-off-by: Rob Clark <robdclark@gmail.com>
2018-01-15 11:35:38 -05:00
Jorge Ramirez-Ortiz
42091fa9e8 poplar: configs: increase gunzip buffer size for the kernel
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 11:35:37 -05:00
Jorge Ramirez-Ortiz
210d959294 spmi: msm: display the PMIC Arb version (debug)
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-15 11:35:37 -05:00
Tom Rini
3dde8f2037 Merge git://git.denx.de/u-boot-mmc 2018-01-14 22:26:38 -05:00
Bryan O'Donoghue
9587b0d611 arm: imx: hab: Add hab_failsafe console command
hab_failsafe when called puts the part into BootROM recovery mode.
This will allow u-boot scripts to script the dropping down into recovery
mode.

=> hab_failsafe

Shows the i.MX7 appear as "hiddev0,hidraw5: USB HID v1.10 Device [Freescale
SemiConductor Inc  SP Blank ULT1] " in a Linux dmesg thus allowing download
of a new image via the BootROM USB download protocol routine.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
317956e82c arm: imx: hab: Implement hab_rvt_failsafe
This patch implements the basic callback hooks for
hab_rvt_check_failsafe for BootROM code using the older BootROM address
layout - in my test case the i.MX7. Code based on new BootROM callbacks
will just do nothing and there's definitely a TODO to implement that extra
functionality on the alternative BootROM API.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
aeae70fac5 arm: imx: hab: Define rvt_failsafe()
The hab_rvt_failsafe() callback according to the HABv4 documentation:

"This function provides a safe path when image authentication has failed
and all possible boot paths have been exhausted. It is intended for use by
post-ROM boot stage components, via the ROM Vector Table."

Once invoked the part will drop down to its BootROM USB recovery mode.
Should it be the case that the part is in secure boot mode - only an
appropriately signed binary will be accepted by the ROM and subsequently
executed.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
07eefaf16e arm: imx: hab: Make imx_hab_is_enabled global
It will be helpful to boot commands to know if the HAB is enabled. Export
imx_hab_is_enabled() now to facilitate further work with this data-point in
a secure-boot context.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
4467ae6c28 arm: imx: hab: Make authenticate_image() return zero on open boards
The BootROM will not successfully process a HAB image passed by u-boot
unless the board has been set into locked mode. Some of the existing usages
of authenticate_image() expect and rely on unlocked boards doing the
following

1. Not calling into the BootROM authenticate_image() callback
2. Returning a pass status for authenticate_image() calls anyway

A previous patch removed the necessity to call into imx_hab_is_enabled()
twice. This patch ensures the reliance on authenticate_image() returning
zero is maintained.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Suggested-by: Breno Matheus Lima <brenomatheus@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
e5b30e4ac1 arm: imx: hab: Rename is_hab_enabled imx_hab_is_enabled
Understanding if the HAB is enabled is something that we want to
interrogate and report on outside of the HAB layer. First step to that is
renaming the relevant function to match the previously introduced external
naming convention imx_hab_function()

The name imx_hab_is_hab_enabled() is a tautology. A more logical name is
imx_hab_is_enabled().

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
57f6548606 arm: imx: hab: Prefix authenticate_image with imx_hab
Tidy up the HAB namespace a bit by prefixing external functions with
imx_hab. All external facing functions past this point will be prefixed in
the same way to make the fact we are doing IMX HAB activities clear from
reading the code. authenticate_image() could mean anything
imx_hab_authenticate_image() is on the other hand very explicit.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
58bebfb753 arm: imx: hab: Make internal functions and data static
There is no need to export these functions and data structures externally.
Make them all static now.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
2c6c68d282 arm: imx: hab: Print HAB event log only after calling ROM
The current flow of authenticate_image() will print the HAB event log even
if we reject an element of the IVT header before ever calling into the ROM.
This can be confusing.

This patch changes the flow of the code so that the HAB event log is only
printed out if we have called into the ROM and received some sort of status
code.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Suggested-by: Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
b7c3cae7d3 arm: imx: hab: Add a hab_rvt_check_target to image auth
Add a hab_rvt_check_target() step to authenticate_image() as a sanity
check for the target memory region authenticate_image() will run over,
prior to making the BootROM authentication callback itself.

This check is recommended by the HAB documentation so it makes sense to
adhere to the guidance and perform that check as directed.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
c0a55b7344 arm: imx: hab: Implement hab_rvt_check_target
This patch implements the basic callback hooks for hab_rvt_check_target()
for BootROM code using the older BootROM address layout - in my test case
the i.MX7. Code based on new BootROM callbacks will just have HAB_SUCCESS
as a result code. Adding support for the new BootROM callbacks is a TODO.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
1addedadc4 arm: imx: hab: Define rvt_check_target()
The hab_rvt_check_target() callback according to the HABv4 documentation:

"This function reports whether or not a given target region is allowed for
 either peripheral configuration or image loading in memory. It is intended
 for use by post-ROM boot stage components, via the ROM Vector Table, in
 order to avoid configuring security-sensitive peripherals, or loading
 images over sensitive memory regions or outside recognized memory devices
 in the address map."

It is a useful function to support as a precursor to calling into
authenticate_image() to validate the target memory region is good.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
824ef302f3 arm: imx: hab: Print additional IVT elements during debug
This patch enables printout of the IVT entry, dcd and csf data fields.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
fd15fe5f84 arm: imx: hab: Print CSF based on IVT descriptor
The IVT gives the absolute address of the CSF. There is no requirement for
the CSF to be located adjacent to the IVT so lets use the address provided
in the IVT header instead of the hard-coded fixed CSF offset currently in
place.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
04099e9ced arm: imx: hab: Only call ROM once headers are verified
Previous patches added IVT header verification steps. We shouldn't call
hab_rvt_entry() until we have done the basic header verification steps.

This patch changes the time we make the hab_rvt_entry() call so that it
only takes place if we are happy with the IVT header sanity checks.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
e59eb9e00f arm: imx: hab: Verify IVT self matches calculated address
The IVT is a self-describing structure which contains a self field. The
self field is the absolute physical base address the IVT ought to be at in
memory. Use the IVT self field to validate the calculated ivt_addr bugging
out if the two values differ.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
49b6d05882 arm: imx: hab: Add IVT header verification
The IVT header contains a magic number, fixed length and one of two version
identifiers. Validate these settings before doing anything with a putative
IVT binary.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
cd2d46003c arm: imx: hab: Add IVT header definitions
The various i.MX BootROMs containing the High Assurance Boot (HAB) block
rely on a data structure called the Image Vector Table (IVT) to describe to
the BootROM where to locate various data-structures used by HAB during
authentication.

This patch adds a definition of the IVT header for use in later patches,
where we will break the current incorrect dependence on fixed offsets in
favour of an IVT described parsing of incoming binaries.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
c5800b2541 arm: imx: hab: Fix authenticate_image input parameters
u-boot command "hab_auth_img" tells a user that it takes

- addr - image hex address
- offset - hex offset of IVT in the image

but in fact the callback hab_auth_img makes to authenticate_image treats
the second 'offset' parameter as an image length.

Furthermore existing code requires the IVT header to be appended to the end
of the image which is not actually a requirement of HABv4.

This patch fixes this situation by

1: Adding a new parameter to hab_auth_img
   - addr   : image hex address
   - length : total length of the image
   - offset : offset of IVT from addr

2: Updates the existing call into authenticate_image() in
   arch/arm/mach-imx/spl.c:jump_to_image_no_args() to pass
   addr, length and IVT offset respectively.

This allows then hab_auth_img to actually operate the way it was specified
in the help text and should still allow existing code to work.

It has the added advantage that the IVT header doesn't have to be appended
to an image given to HAB - it can be prepended for example.

Note prepending the IVT is what u-boot will do when making an IVT for the
BootROM. It should be possible for u-boot properly authenticate images
made by mkimage via HAB.

This patch is the first step in making that happen subsequent patches will
focus on removing hard-coded offsets to the IVT, which again is not
mandated to live at the end of a .imx image.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
08a81cad2f arm: imx: hab: Move CSF_PAD_SIZE to hab.h
CSF_PAD_SIZE should be defined in hab.h, move it to that location now.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
191d8bd509 arm: imx: hab: Move IVT_SIZE to hab.h
The size of the IVT header should be defined in hab.h move it there now.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
53c8a510e7 arm: imx: hab: Optimise flow of authenticate_image on hab_entry fail
The current code disjoins an entire block of code on hab_entry pass/fail
resulting in a large chunk of authenticate_image being offset to the right.

Fix this by checking hab_entry() pass/failure and exiting the function
directly if in an error state.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
d2c61800fc arm: imx: hab: Optimise flow of authenticate_image on is_enabled fail
There is no need to call is_enabled() twice in authenticate_image - it does
nothing but add an additional layer of indentation.

We can check for is_enabled() at the start of the function and return the
result code directly.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
9535b3975f arm: imx: hab: Fix authenticate_image result code
authenticate_image returns 1 for success and 0 for failure. That result
code is mapped directly to the result code for the command line function
hab_auth_img - which means when hab_auth_img succeeds it is returning
CMD_RET_FAILURE (1) instead of CMD_RET_SUCCESS (0).

This patch fixes this behaviour by making authenticate_image() return 0 for
success and 1 for failure. Both users of authenticate_image() as a result
have some minimal churn. The upshot is once done when hab_auth_img is
called from the command line we set $? in the standard way for scripting
functions to act on.

Fixes: 36c1ca4d46 ("imx: Support i.MX6 High Assurance Boot
authentication")

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Bryan O'Donoghue
adbb051f08 arm: imx: hab: Make authenticate_image return int
Both usages of authenticate_image treat the result code as a simple binary.
The command line usage of authenticate_image directly returns the result
code of authenticate_image as a success/failure code.

Right now when calling hab_auth_img and test the result code in a shell a
passing hab_auth_img will appear to the shell as a fail.

The first step in fixing this behaviour is to fix-up the result code return
by authenticate_image() itself, subsequent patches fix the interpretation
of authenticate_image so that zero will return CMD_RET_SUCCESS and non-zero
will return CMD_RET_FAILURE.

The first step is fixing the return type in authenticate_image() so do that
now.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Sven Ebenfeld <sven.ebenfeld@gmail.com>
Cc: George McCollister <george.mccollister@gmail.com>
Cc: Breno Matheus Lima <brenomatheus@gmail.com>
Tested-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-14 17:26:30 +01:00
Tom Rini
18af965798 Merge git://git.denx.de/u-boot-tegra 2018-01-12 14:18:34 -05:00
Stephen Warren
5fed97af20 Makefile: ensure DTB doesn't overflow into initial stack
With CONFIG_SYS_INIT_SP_BSS_OFFSET enabled, the initial (pre-relocation)
stack is placed some distance after bss_start. The control DTB is appended
to the U-Boot binary at bss_start. If the DTB is too large, or the SP BSS
offset too small, then the initial stack could corrupt the DTB. Enhance
the Makefile to check whether this is likely to occur.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 10:12:32 -07:00
Stephen Warren
e43effc1d8 ARM: Tegra: p2771-0000: use calculate env var feature
Request that all environment variables containing hard-coded address be
calculated at boot time instead.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 10:12:32 -07:00
Stephen Warren
026a8b96bd ARM: Tegra186: calculate load addresses at boot
In the presence of potentially fragemented memory, we cannot hard-code
addresses into environment variables such as kernel_addr_r. Instead, we
must calculate those addresses at run-time based on available memory
locations. Implement the code to perform such runtime calculation, based
on requirements described in environment variables, to allow the user
full control over the allocation.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 10:12:32 -07:00
Stephen Warren
cdcf55584e ARM: Tegra186: don't map memory not in RAM banks
Tegra186 currently restricts its DRAM usage to entries in the /memory node
in the DTB passed to it. However, the MMU configuration always maps the
entire first 2GB of RAM. This could allow the CPU to speculatively access
RAM that isn't part of the in-use banks. This patch switches to runtime
construction of the table that's used to construct the MMU translation
tables, and thus prevents access to RAM that's not part of a valid bank.

Note: This patch is intended to prevent access to RAM regions which U-Boot
does not need to access, with the primary purpose of avoiding theoretical
speculative access to physical regions for which the HW will throw errors
(e.g. carve-outs that the CPU has no permission to access at a bus level,
bad ECC pages, etc.). In particular, this patch is not deliberately
related to the speculation-related security issues that were recently
announced. The apparent similarity is a coincidence.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 10:12:32 -07:00
Stephen Warren
a9819b9e33 ARM: tegra: p2771-000: increase max DRAM bank count
On this platform, there may be up to 1024 unusable chunks of memory.
Increase CONFIG_NR_DRAM_BANKS so that U-Boot can remember all the banks
required to represent such fragmented memory.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 10:12:31 -07:00
Stephen Warren
d5859255d9 ARM: Tegra186: search for best RAM bank
In the future, the list of DRAM regions passed to U-Boot in the DTB may
be quite long and fragmented. Due to this, U-Boot must search through the
regions to find the best region to relocate into, rather than relying on
the current assumption that the top of bank 0 is a reasonable relocation
target. This change implements such searching.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 10:12:31 -07:00
Stephen Warren
15751403b6 ARM: bootm: don't assume sp is in DRAM bank 0
arch_lmb_reserve() currently assumes that the stack pointer is within DRAM
bank 0. This is not necessarily true. Enhance the code to search through
DRAM banks until the bank that does contain SP is found, and then reserve
the tail of that bank.

Fixes: 2d1916e48b ("ARM: add flat device tree support")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 10:12:31 -07:00
Stephen Warren
f697471217 ARM: Tegra186: mem parsing fixes from downstream
Apply a few small fixes for the DTB /memory node parsing from NVIDIA's
downstream U-Boot:

- Allow arbitrary number of DRAM banks.
- Correctly calculate the number of DRAM banks.
- Clip PCIe memory in the same way as U-Boot CPU memory use.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 09:52:11 -07:00
Stephen Warren
ddecaaf3b9 ARM: tegra: use LINUX_KERNEL_IMAGE_HEADER
Enable CONFIG_LINUX_KERNEL_IMAGE_HEADER for all 64-bit Tegra boards.
cboot (the boot SW that runs before U-Boot) will eventually use this
information.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 09:52:11 -07:00
Stephen Warren
8163faf952 ARMv8: add optional Linux kernel image header
Allow placing a Linux kernel image header at the start of the U-Boot
binary. This is useful since the image header reports the amount of memory
(BSS and similar) that U-Boot needs to use, but that isn't part of the
binary size. This can be used by the code that loads U-Boot into memory to
determine where to load U-Boot, based on other users of memory.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 09:52:11 -07:00
Stephen Warren
f097532d27 ARM: tegra: use CONFIG_SYS_INIT_SP_BSS_OFFSET
Enable CONFIG_SYS_INIT_SP_BSS_OFFSET for all 64-bit Tegra boards. Place
the stack/... 512KiB from the end of the U-Boot binary. This should be
plenty to accommodate the current DTBs (max 64 KiB), early malloc region
(6KiB), stack usage, and plenty of slack, while still not placing it too
far away from the U-Boot binary.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 09:52:11 -07:00
Stephen Warren
e6c904489a ARMv8: Allow dynamic early stack pointer
U-Boot typically uses a hard-coded value for the stack pointer before
relocation. Implement option SYS_INIT_SP_BSS_OFFSET to instead calculate
the initial SP at run-time. This is useful to avoid hard-coding addresses
into U-Boot, so that can be loaded and executed at arbitrary addresses and
thus avoid using arbitrary addresses at runtime. This option's value is
the offset added to &_bss_start in order to calculate the stack pointer.
This offset should be large enough so that the early malloc region, global
data (gd), and early stack usage do not overlap any appended DTB.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 09:52:11 -07:00
Stephen Warren
0d1bd150f0 ARM: tegra: remove SPL config for non-SPL SoCs
No 64-bit Tegra uses SPL. Remove various unused definitions from config
headers.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 09:52:10 -07:00
Stephen Warren
3cdb5fa08a ARM: tegra: don't use CONFIG_SPL_TEXT_BASE when no SPL
64-bit Tegra don't use SPL, and soon won't define CONFIG_SPL_TEXT_BASE
when building. Fix the binman .dts file so that it doesn't use undefined
values.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2018-01-12 09:52:10 -07:00
Peng Fan
db359efd59 mmc: fsl_esdhc: Fix eMMC 1.8v setting issue
Current USDHC driver will reset VSELECT to 0 (3.3v) during mmc init,
then set to 1 for 1.8v eMMC I/O. When booting from eMMC, since ROM has
already set VSELECT to 1.8v before running the u-boot. This reset in
USDHC driver causes a short 2.2v pulse on CMD pin.

Fix this issue by not reset VSELECT to 0 when 1.8v flag is set.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-13 00:08:44 +09:00
Tom Rini
8c0bb85824 power: Rearrange code to guard power command with CONFIG_SPL_BUILD guard
In order to discard this code when unused in SPL we need to guard the
command with a check for CONFIG_SPL_BUILD and we rearrange the code
slightly to make this cleaner.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-13 00:07:57 +09:00
Christopher Spinrath
edc57f1df8 ARM: imx: cm_fx6: env: try to determine dtb to use
Some distributions like Fedora expect U-Boot to select a proper
devicetree. Since there are several variants of the cm-fx6 module
featuring different SoC variants and the module can be paired with
several baseboards, it is not viable to hardcode a filename.

Instead, follow the lead of other i.MX6 based devices and try to
determine the devicetree to use with the help of the board name
and the SoC variant exported by the board code, before calling the
distro bootcommand.

For now, only for the Utilite Pro a proper devicetree filename is
known but further variants of the Utilite Computer or other devices
based on the cm-fx6 module may be added in the future.

Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
2018-01-12 14:28:04 +01:00
Christopher Spinrath
dbeaa1d131 ARM: imx: cm_fx6: export board and soc info to env
Like many other i.MX6 based boards, there are multiple variants of
the cm-fx6 module featuring different SoC variants. Furthermore, the
module can be paired with multiple baseboards.

At the same time modern distribution like Fedora require U-Boot to
select a proper devicetree which depends on the SoC variant and the
baseboard.

Thus, export the SoC variant and the actual board to the environment
following the conventions of other i.MX6 devices (e.g. the NXP boards)
such that the environment can select a devicetree file to load.

For now, we only know for sure that the cm-fx6 module and the SB-fx6m
baseboard amount to a Utilite Computer variant (depending on the SoC).
Further combinations may be added in the future; e.g. CompuLab's
evaluation board once someone can verify the identification string
stored in its eeprom.

Signed-off-by: Christopher Spinrath <christopher.spinrath@rwth-aachen.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2018-01-12 14:28:04 +01:00
Koen Vandeputte
f57263ee9b drivers: pci: imx: fix enumeration logic error
By default, the subordinate is set equally to the secondary bus (1) when
the RC boots, and does not alter afterwards.

This means that theoretically, the highest bus reachable downstream is
bus 1.

Force the PCIe RC subordinate to 0xff, otherwise no downstream
devices will be detected behind bus 1 if the booting OS does not allow
enumerating a higher busnr than the subordinate value of the primary
bus.

Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
2018-01-12 14:28:04 +01:00
Fabio Estevam
0f194018f2 mx6memcal: spl: Disambiguate the error message
Currently mmdc_do_dqs_calibration() and mmdc_do_write_level_calibration()
show the same error message, which is confusing for debugging.

Disambiguate the mmdc_do_dqs_calibration() error message.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Fabio Estevam
941fcabfa7 mx6memcal: spl: Also take i.MX6ULL into account
i.MX6ULL also does not support 64-bit DDR bus, so add it to the
check logic.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Fabio Estevam
db00e921fd mx6memcal: Fix the UART ports for mx6sabresd/auto boards
mx6sabresd board uses the following pins for console:

PAD_CSI0_DAT10__UART1_TX_DATA
PAD_CSI0_DAT11__UART1_RX_DATA

,so put it in the same config option as wandboard.

mx6sabreauto board uses the following pins for console:

PAD_KEY_COL0__UART4_TX_DATA
PAD_KEY_ROW0__UART4_RX_DATA

So do not mention sabreauto board as part of the UART1_SD3_DAT6_7 option.

The config option for sabreauto can be added later when needed.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Tom Rini
64c7abf023 toradex: imx6: Rework PF0100 fuse programming commands to not be in SPL
The code for programming the OTP fuses on the PMIC PF0100 can only be
used in full U-Boot, so do not build / link it into SPL.

Cc: Max Krummenacher <max.krummenacher@toradex.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
2018-01-12 14:28:04 +01:00
Tom Rini
bf52330a50 imx: ventana: Rework CONFIG_CMD_GSC code to not be included in SPL
The command can only be used from full U-Boot, so do not build it into
SPL.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Tom Rini
c10b1c43fd imx: ventana: Rework CONFIG_CMD_EECONFIG code to not be included in SPL
The command can only be used from full U-Boot, so do not build it into
SPL.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Tom Rini
20b9f2eaf5 arm: imx: Rework i.MX specific commands to be excluded from SPL
The "clocks" and "bootaux" commands are only usable in full U-Boot, not
SPL, so do not link them inside of SPL.  Rework a little of the bootaux
related code to make use of __weak and declare parts of it static as
it's local to the file.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Eran Matityahu
e7528a3d74 imx7: spl: Add support for MMC3, SD3 and NAND boot devices
Signed-off-by: Eran Matityahu <eran.m@variscite.com>
2018-01-12 14:28:04 +01:00
Eran Matityahu
cd9f3ff651 imx7: spl: Use SPL boot device MMC1 for all of the SOCs MMC/SD boot devices
Use only one SPL MMC device, similarly to the iMX6 code

Signed-off-by: Eran Matityahu <eran.m@variscite.com>
2018-01-12 14:28:04 +01:00
Peng Fan
a3cc43551f imx: mx6ull-14x14-evk: enable DM QSPI driver
To support QSPI DM driver
 - Add spi0 alias for qspi node. Which is used for bus number 0.
 - Modify the n25q256a@0 compatible property to "spi-flash".
 - Modify spi4 (gpio_spi) node to spi5
 - Define DM SPI/QSPI related config to enable QSPI

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-12 14:28:04 +01:00
Peng Fan
afe8e1b033 spi: fsl_qspi: support i.MX6UL/6ULLL/7D
The QSPI module on i.MX7D is modified from i.MX6SX. The module used on
i.MX6UL/6ULL is reused from i.MX7D. They share same tx buffer size.

The endianness is not set at qspi driver initialization. So if we don't
boot from QSPI, we will get wrong endianness when accessing from AHB
address directly.

Add the compatible entry for 6ul/7d.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-12 14:28:04 +01:00
Fabio Estevam
6a2ccd64c3 mx6: ddr: Do not access MMDC_P1_BASE_ADDR on i.MX6ULL
i.MX6ULL also does not have a MMDC_P1_BASE_ADDR, so do not try to
access it.

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <ssbabic@denx.de>
2018-01-12 14:28:04 +01:00
Peng Fan
67b71df277 pci: imx: request gpio before use
Before use GPIO, we need to request gpio first. Free gpio after use.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Stefano Babic <ssbabic@denx.de>
2018-01-12 14:28:04 +01:00
Peng Fan
d9523fdd11 imx: mx6sxsabresd: enlarge ENV offset
The u-boot-dtb.imx size is about 519KB, so 8 * 64KB conflicts
with u-boot-dtb.imx. Enlarge the offset to 14 * 64KB to fix it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Peng Fan
e80f9e1a37 imx: mx6sxsabresd: config wdog pinmux
Because kernel set WDOG_B mux before pad with the common pinctrl
framwork now and wdog reset will be triggered once set WDOG_B mux
with default pad setting, we set pad setting here to workaround this.
Since imx_iomux_v3_setup_pad also set mux before pad setting, we set
as GPIO mux firstly here to workaround it.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Peng Fan
5dfc9d3766 imx: mx6sxsabresd: Enable DM driver
Enable I2C/MMC/GPIO/REGUALTOR/PMIC/USB DM drivers.
There are some dependency, such as when DM MMC enabled, USB compile error.
Also the i.MX I2C MMC DM driver does not support legacy GPIO interface.
So enable them all together.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Peng Fan
f8e450a7f6 board: freescale: common: add pfuze dm code
Add pfuze dm code, this code could be enabled with CONFIG_DM_PMIC_PFUZE100.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Peng Fan
83fccaf1f9 ARM: imx: Enable dts for i.MX6SX-SDB
Enable DTS and OF_CONTROL for i.MX6SX-SDB.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Peng Fan
220e88787a ARM: imx: Introduce dts for i.MX6SX-SDB
Introduce dts from Kernel commit
commit 71ee203389f7cb1c("Merge tag 'scsi-fixes' of
git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Peng Fan
8df42bee0e misc: mxc_ocotp: check fuse word before programming on i.MX7ULP
On i.MX7ULP, the fuse words (except bank 0 and 1) only supports to
write once, because they use ECC mode. Multiple writes may damage
the ECC value and cause a wrong fuse value decoded when reading.
This patch adds a checking before the fuse word programming, only
can write when the word value is 0.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-01-12 14:28:04 +01:00
Stefano Babic
fb8cac9366 mx6: Support SKS-Kinkel sksimx6 Board
Board  has 1GB RAM and boots from SD Card

U-Boot SPL 2018.01-rc3-00005-ga1898b8 (Jan 02 2018 - 13:48:54)
BT_FUSE_SEL already fused, will do nothing
Trying to boot from MMC1

U-Boot 2018.01-rc3-00005-ga1898b8 (Jan 02 2018 - 13:48:54 +0100)

CPU:   Freescale i.MX6DL rev1.2 996 MHz (running at 792 MHz)
CPU:   Commercial temperature grade (0C to 95C) at 40C
Reset cause: POR
I2C:   ready
DRAM:  1 GiB
MMC:   FSL_SDHC: 0
In:    serial
Out:   serial
Err:   serial
Net:   FEC [PRIME]

Signed-off-by: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
2018-01-12 14:28:04 +01:00
Rick Chen
b6896fcbeb travis.yml: Support RISC-V
Enable travis-ci support with a link having built.

Signed-off-by: Chih-Mao Chen <cmchen@andestech.com>
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
3fafced74d riscv: doc: Add relative doc to describe RISC-V
Add documents to describe NX25 and AE250.
Also update other documents for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
068feb9b86 riscv: Modify generic codes to support RISC-V
Support common commands bdinfo and image format,
also modify common generic flow for RISC-V.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-12 08:05:12 -05:00
Rick Chen
c7d7e80acd riscv: Support standalone
Run hello_world successfully.

U-Boot 2018.01-rc2-00033-gb265b91-dirty (Dec 22 2017 - 13:54:21 +0800)

DRAM:  1 GiB
MMC:   mmc@f0e00000: 0
SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB
In:    serial@f0300000
Out:   serial@f0300000
Err:   serial@f0300000
Net:
Warning: mac@e0100000 (eth0) using random MAC address - 0a:47:9b:f8:b4:f2
eth0: mac@e0100000
RISC-V # mmc rescan
RISC-V # fatls mmc 0:1
318907   u-boot-ae250-64.bin
1252   hello_world_ae250_32.bin
328787   u-boot-ae250-32.bin

3 file(s), 0 dir(s)

RISC-V # fatload mmc 0:1 0x600000 hello_world_ae250_32.bin
reading hello_world_ae250_32.bin
1252 bytes read in 23 ms (52.7 KiB/s)
RISC-V # go 0x600000
Example expects ABI version 9
Actual U-Boot ABI version 9
Hello World
argc = 1
argv[0] = "0x600000"
argv[1] = "$B@"
Hit any key to exit ...

RISC-V #

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
42ac26f2b0 riscv: tools: Prelink u-boot
Add prelink-riscv to arrange .rela.dyn and .rela.got
in compile time. So that u-boot can be directly
executed without fixup.

Signed-off-by: Chih-Mao Chen <cmchen@andestech.com>
Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
3dafc016c1 riscv: defconfig: Add nx25-ae250 defconfig to support RISC-V
Add nx25-ae250 default configuration for RISC-V

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
56a4ca8f72 riscv: configs: Add nx25-ae250.h to support RISC-V
Add nx25-ae250 board configuartion options for RISC-V

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
7885ea8568 riscv: board: Add nx25-ae250 to support RISC-V
Add nx25-ae250 board to do platform initializations.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
f94c44e51e riscv: Add Kconfig to support RISC-V
Add Kconfig and makefile for RISC-V
Also modify MAINTAINERS for it.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
2018-01-12 08:05:12 -05:00
Rick Chen
6020faf62c riscv: nx25: include: Add header files to support RISC-V
Add header files for RISC-V.
Cache, ptregs, data type and other definitions are included.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
039ed7c572 riscv: nx25: dts: Add AE250 dts to support RISC-V
AE250 is the Soc using NX25 cpu core base on RISC-V arch.
Details please see the doc/README.ae250.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
2018-01-12 08:05:12 -05:00
Rick Chen
8bbb2909cb riscv: nx25: lib: Add relative lib funcs to support RISC-V
Add makefile, interrupts.c and boot.c,... functions
to support RISC-V arch.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
2018-01-12 08:05:12 -05:00
Rick Chen
e8e39597a3 riscv: cpu: Add nx25 to support RISC-V
Add Andes nx25 cpu core (called AndesStar V5) to support RISC-V arch

Verifications:
1. startup and relocation ok.
2. boot from rom or ram both ok.
2. timer driver ok.
3. uart driver ok
4. mmc driver ok
5. spi driver ok.
6. 32/64 bit both ok.

Detail verification message please see doc/README.ae250.

Signed-off-by: Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rickchen36@gmail.com>
Signed-off-by: Greentime Hu <green.hu@gmail.com>
Cc: Padmarao Begari <Padmarao.Begari@microsemi.com>
2018-01-12 08:05:12 -05:00
Jean-Jacques Hiblot
b7a6e2c9c3 mmc: remove hc_wp_grp_size from struct mmc if not needed
hc_wp_grp_size is needed only if hardware partitionning is used.
On ARM removing it saves about 30 bytes of code space.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
173c06dfcc mmc: don't read the size of eMMC enhanced user data area in SPL
This information is only used by the "mmc info" command.
On ARM removing this information from SPL saves about 140 of code space.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
e6fa5a5461 mmc: compile out erase and write mmc commands if write operations are not enabled
Also remove erase_grp_size and write_bl_len from struct mmc as they are
not used anymore. On ARM, removing them saves about 100 bytes of code
space in SPL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
5b2e72f327 mmc: read ssr only if MMC write support is enabled
The content of ssr is useful only for erase operations.
on ARM, removing sd_read_ssr() saves around 300 bytes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
d6400c3f85 mmc: add a Kconfig option to enable the support for MMC write operations
This allows using CONFIG_IS_ENABLED(MMC_WRITE) to compile out code
needed only if write support is required.
The option is added for u-boot and for SPL

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
58a6fb7b04 mmc: reworked version lookup in mmc_startup_v4
Using a table versus a switch() structure saves a bit of space

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:24 +09:00
Jean-Jacques Hiblot
baef2070a4 mmc: compile out more code if support for UHS and HS200 is not enabled
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:23 +09:00
Jean-Jacques Hiblot
9b79dbd201 mmc: atmel: when sending a data command, use the provided block size
struct mmc_data contains the block size to use for the data transfer.
Use this information instead of using the default value or the block length
information stored in struct mmc.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:23 +09:00
Jean-Jacques Hiblot
d0e443786c common: do not compile common fastboot code when building the SPL
This is not required as fastboot can't be started from SPL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:23 +09:00
Tom Rini
dc80373299 am335x_hs_evm: Trim options in SPL to reduce binary size
The am335x_hs_evm runs into size constraint problems at times with
various toolchains as changes come in due to the config have a large
number of options in SPL (to showcase what is possible) while also
having rather constrained binary limits.  Gain some of this room back by
lowering the loglevel, disabling HW partition support and switching over
to the tiny FIT image support.

Cc: Andrew F. Davis <afd@ti.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
---
I'd really appreciate a run-time test of this patch if at all possible
as I'm a little worried about TINY_FIT being incompatible with all of
the security options.  Thanks!
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
49f89252ed dm: mmc: sandbox: Update SD card emulation
The SDcard initialization procedure does a few more things than it did earlier:
* switch the bus width even for 1-bit bus width
* check that speed has been properly set (in resp[4] of SD_CMD_SWITCH_FUNC)

Update the SD simulator to handle those requests gracefully.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
c9d3f34e77 configs: omapl138_lcdk: decrease the loglevel to reduce the size of the SPL
The changes in the MMC stack have increased its footprint up to the point
were its breaks the generation of the SPL for this platform.
Fix this by reducing the loglevel.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Peter Howard <phoward@gme.net.au>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
33678bd7f5 configs: openrd: removed support for eMMC hardware partitioning
builds are broken because the size of the binary exceeds the limit.
Make some space by removing support for hardware partitioning as those
boards don't have any eMMC.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
cf17789e07 mmc: make optional the support for eMMC hardware partitioning
Not all boards have an eMMC and not all users have a need for this.
Allow to compile it out. By default it is still included.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
f99c2efe56 mmc: make UHS and HS200 optional
Supporting USH and HS200 increases the code size as it brings in IO voltage
control, tuning and fatter data structures.
Use Kconfig configuration to select which of those features should be
built in.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
d8e3d42089 mmc: convert most of printf() to pr_err() and pr_warn()
This allows to compile out the log message by tweaking the LOGLEVEL.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
f7d5dffc65 mmc: don't use malloc_cache_aligned()
Not using this function reduces the size of the binary. It's replaces by
a standard malloc() and the alignment requirement is handled by an
intermediate buffer on the stack.

Also make sure that the allocated buffer is freed in case of error.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
1de06b9fa5 mmc: fix for old MMCs (below version 4)
The ext_csd is allocated only for MMC above version 4. The compare will
crash or fail for older MMCs.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
1da8eb598f mmc: all hosts support 1-bit bus width and legacy timings
Make sure that those basic capabilities are advertised by the host.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
00e446fa04 mmc: Fixed a problem with old sd or mmc that do not support High speed
As the legacy modes were not added to the list of supported modes, old
cards that do not support other modes could not be used.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
7abff2c3b3 dm: mmc: update mmc_of_parse()
* convert to livetree API
* don't fail because of an invalid bus-width, instead default to 1-bit.
* recognize 1.2v DDR and 1.2v HS200 flags

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
52d241dfba mmc: dump card and host capabilities if debug is enabled
This is a useful information while debugging the initialization process or
performance issues.
Also dump this information with the other mmc info if the verbose option
is selected

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jaehoon Chung
ef1614acf8 mmc: meson_gx_mmc: fix the complie error
mmc_set_clock() is changed.
This patch is for fixing complie error.

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
9215ef5ed5 dm: mmc: Add a library function to parse generic dt binding
Add a new function to parse host controller dt node and
set mmc_config. This function can be used by mmc controller
drivers to set the generic mmc_config.
This function can be extended to set other UHS mode caps
once UHS mode support is added.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
9815e3ba80 mmc: add a library function to send tuning command
HS200/SDR104 requires tuning command to be sent to the card.
Add a simple function to send tuning command and to read and
compare the received data with the tuning block pattern.
This function can be used by platform driver to perform DLL
tuning.
This patch is similar to
commit 996903de92f0 ("mmc: core: add core-level function for
sending tuning commands") added in linux kernel.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
bc1e3272ff mmc: use the right voltage level for MMC DDR and HS200 modes
HS200 only supports 1.2v and 1.8v signal voltages. DDR52 supports 3.3v/1.8v
or 1.2v signal voltages.
Select the lowest voltage available when using those modes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
83dc42271f mmc: Retry some MMC cmds on failure
With certain SD cards like Kingston 8GB/16GB UHS card, it is seen that
MMC_CMD_ALL_SEND_CID cmd fails on first attempt, but succeeds
subsequently. Therefore, retry MMC_CMD_ALL_SEND_CID cmd a few time
as done in Linux kernel.
Similarly, it is seen that MMC_CMD_SET_BLOCKLEN may fail on first
attempt, therefore retry this cmd a few times as done in kernel.

To make it clear that those are optionnal workarounds, a new Kconfig
option 'MMC_QUIRKS' is added (enabled by default).

Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
01298da31d mmc: Change mode when switching to a boot partition
Boot partitions do not support HS200. Changing to a lower performance mode
is required to access them.
mmc_select_mode_and_width() and sd_select_mode_and_width() are modified to
make it easier to call them outside of the initialization context.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
04a2ea248f mmc: disable UHS modes if Vcc cannot be switched on and off
If a power cycle cannot be done on Vcc, it is safer not to try the UHS
modes because we wouldn't be able to recover from an error occurring
during the UHS initialization.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
c10b85d6c2 mmc: Add support for UHS modes
Add UHS modes to the list of supported modes, get the UHS capabilites of
the SDcard and implement the procedure to switch the voltage (UHS modes
use 1v8 IO lines)
During the voltage switch procedure, DAT0 is used by the card to signal
when it's ready. The optional card_busy() callback can be used to get this
information from the host driver.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
634d484940 mmc: add HS200 support in MMC core
Add HS200 to the list of supported modes and introduce tuning in the MMC
startup process.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
ec841209a7 mmc: Add a execute_tuning() callback to the mmc operations.
Tuning is a mandatory step in the initialization of SDR104 and HS200 modes.
This callback execute the tuning process.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
2e7410d76a mmc: disable the mmc clock during power off
There is no point in having the mmc clock enabled during
power off. Disable the mmc clock. This is similar to how it's
programmed in Linux Kernel.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
35f6782055 mmc: add a new mmc parameter to disable mmc clock
mmc clock has to be disabled in certain cases like during
the voltage switch sequence. Modify mmc_set_clock function
to take disable as an argument that signifies if the
clock has to be enabled or disabled.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
fb7c3beb51 mmc: add power cyle support in mmc core
mmc/sd specification requires vdd to be disabled for 1 ms
and then enabled again during power cycle. Add a
function in mmc core to perform power cycle and set
the io signal to it's initial state.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
318a7a576b mmc: Add a new callback function to perform the 74 clocks cycle sequence
Add a new callback function *send_init_stream* which start a sequence of
at least 74 clock cycles.
The mmc core uses *mmc_send_init_stream* in order to invoke the callback
function. This will be used during power cycle where the specification
requires such a sequence after power up.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
aff5d3c83f mmc: Enable signal voltage to be selected from mmc core
Add a new function *mmc_set_signal_voltage* in mmc core
which can be used during mmc initialization to select the
signal voltage. Platform driver should use the set_ios
callback function to select the signal voltage.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:04 +09:00
Kishon Vijay Abraham I
2a4d212f71 mmc: make mmc_set_ios() return status
set_ios callback has a return value of 'int' but the mmc_set_ios()
function ignore this. Modify mmc_set_ios() and the callers of mmc_set_ios() to
to return the error status.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
3862b85474 mmc: refactor MMC startup to make it easier to support new modes
The MMC startup process currently handles 4 modes. To make it easier to
add support for more modes, let's make the process more generic and use a
list of the modes to try.
The major functional change is that when a mode fails we try the next one.
Not all modes are tried, only those supported by the card and the host.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
d0c221fe73 mmc: refactor SD startup to make it easier to support new modes
The SDcard startup process currently handles only 2 modes. To make it
easier to add support for more modes, let's make the process more generic
and use a list of the modes to try.
The major functional change is that when a mode fails we try the next one.
Not all modes are tried, only those supported by the card and the host.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
7a96ec7459 cmd: mmc: display the mode name and current bus speed in the mmc info
Display the mode name when the user execute 'mmc info'. Also instead of
displaying tran_speed, display the actual bus speed.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
05038576e0 mmc: use mmc modes to select the correct bus speed
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:04 +09:00
Jean-Jacques Hiblot
4c9d2aaa7e mmc: Add a function to dump the mmc capabilities
This adds a simple helper function to display information (bus width and
mode) based on a capability mask. Useful for debug.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
35f9e196f9 mmc: introduce mmc modes
no functionnal changes.
In order to add the support for the high speed SD and MMC modes, it is
useful to track this information.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
7382e691ca mmc: add a function to read and test the ext csd (mmc >= 4)
This will be reused later in the selection of high speed and ddr modes.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
dfda9d88e5 mmc: make ext_csd part of struct mmc
The ext csd is used for comparison many times. Keep a reference content
of the ext csd in the struct mmc to avoid reading multiple times

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
c744b6f6dc mmc: move the MMC startup for version above v4.0 in a separate function
no functionnal change. This is only to further reduce the size o
mmc_startup().

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
8ac8a26304 mmc: split mmc_startup()
No functionnal change here. The function is really big and can be split.
The part related to bus configuration are put in 2 separate functions: one
for MMC and one for SD.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-12 18:11:03 +09:00
Jean-Jacques Hiblot
06ec045fee mmc: dm: get the IO-line and main voltage regulators from the dts
Get a reference to the regulator devices from the dts and store them
in the struct mmc for later use.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-12 18:11:03 +09:00
Heinrich Schuchardt
bb7b4ef370 mmc: sdhci: do not compare pointer to 0
data is defined as struct mmc_data *data.
So it should not be compared to 0.

Problem identified with Coccinelle.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-01-12 18:11:03 +09:00
Jorge Ramirez-Ortiz
713e6815d9 mmc: sdhci: don't clear SDHCI_INT_STATUS register during CMD_INHIBIT
Fixes emmc initialization regression on the db410c platform.

Clearing this register while SDHCI_PRESENT_STATE reports
SDHCI_CMD_INHIBIT leads to undefined behaviour on the db410c.

When commit 7dde50 was merged (mmc: sdhci: Wait for SDHCI_INT_DATA_END
when transferring), SDHCI transfers transitioned to wait for bit
SDHCI_INT_DATA_END before flagging transfers done.

Without this patch, the db410 platform fails to initialize its eMMC
due to all of its transfers timing out (SDHCI_INT_DATA_END is never
raised after all the blocks have been transferred).

Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
2018-01-12 18:11:03 +09:00
Felix Brack
339d578900 mmc: sanitize includes for DM i2c
This patch fixes some warnings when building boards that do not define
DM_I2C_COMPAT i.e. boards that entirely rely on the new i2c layer.
Signed-off-by: Felix Brack <fb@ltec.ch>
2018-01-12 18:11:03 +09:00
Suniel Mahesh
0e1746acac drivers: mmc: Avoid memory leak in case of failure
priv pointer should be freed before returning with an error value
from exynos_dwmci_get_config().

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Signed-off-by: Raghu Bharadwaj <raghu@techveda.org>
2018-01-12 18:11:03 +09:00
Suniel Mahesh
18e7c8f6aa drivers: mmc: Change buffer type in ALLOC_CACHE_ALIGN_BUFFER macro
__be32_to_cpu() accepts argument of type __be32. This patch changes
type of the buffer in ALLOC_CACHE_ALIGN_BUFFER macro to __be32, which
is then passed to __be32_to_cpu().
This prevents sparse build warnings.
drivers/mmc/mmc.c: warning: cast to restricted __be32

Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Signed-off-by: Karthik Tummala <karthik@techveda.org>
2018-01-12 18:11:03 +09:00
Tom Rini
373b900341 Merge git://git.denx.de/u-boot-sunxi 2018-01-11 14:14:19 -05:00
Jagan Teki
00425e63f6 configs: sun50i: Enable eMMC on a64-olinuxino
a64-olinuxino has 8GiB eMMC, enable it.

Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2018-01-12 00:28:29 +05:30
Tom Rini
1a62f8597c Merge git://git.denx.de/u-boot-video 2018-01-11 13:43:36 -05:00
Tom Rini
6bf634223a Merge git://git.denx.de/u-boot-fsl-qoriq 2018-01-11 11:18:49 -05:00
Tom Rini
2ff1da9453 Merge git://git.denx.de/u-boot-socfpga 2018-01-11 11:18:41 -05:00
Tom Rini
e38c66edae Merge git://git.denx.de/u-boot-usb 2018-01-11 11:18:29 -05:00
Hannes Schmelzer
193f6fb9e8 board/BuR: drop LCDC clock manipulation from board code
The clock selection is done now from the am335x-fb code, so there is no
more need doing this in the board code.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11 15:20:30 +01:00
Hannes Schmelzer
0fcec57752 board/BuR: provide real clock-frequency instead a divider
Actual am335x-fb implementation takes now a real clock frequency instead
a divider. So this component doesn't need to know anymore some base
frequency of the LCDC, we simply provide the pixel-clock frequency.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11 15:19:51 +01:00
Hannes Schmelzer
8a094f508c am335x-fb: setup display PLL
The LCDC IP-core an be feed from several clock sources, one of those is
a dedicated DPLL for generating a dividable base-clock for this IP-core.

The TRM specifies the maximum input frequency for the LCCD with 200 MHz,
so we must not exceed this value with the PLL frequency (which can lock
much higher).

This patch tries every combination of multipliers and divisors of the
PLL and the IP-core itself for getting as near as possible the the
requested panel->pxl_clk.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11 15:19:12 +01:00
Hannes Schmelzer
0d8a7d6fa8 am335x-fb: cosmetic: fix coding style
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11 15:18:28 +01:00
Hannes Schmelzer
e880a5e219 am335x-fb: cosmetic: update-copyright
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11 15:17:09 +01:00
Hannes Schmelzer
3215192922 mach-omap2: add AM335x Display PLL register definition
Adds the register definition of the Display DPLL

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2018-01-11 15:16:34 +01:00
Sumit Garg
1cabeb88eb ls1088ardb: Add SD Secure boot target support
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
[YS: run moveconfig.py -s]
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:32:45 -08:00
Sumit Garg
10e7eaf04a armv8: ls1088a: SPL size reduction
Using changes in this patch we were able to reduce approx 8k
size of u-boot-spl.bin image. Following is breif description of
changes to reduce SPL size:
1. Changes in board/freescale/ls1088a/Makefile to remove
   compilation of eth.c and cpld.c in case of SPL build.
2. Changes in board/freescale/ls1088a/ls1088a.c to keep
   board_early_init_f funcations in case of SPL build.
3. Changes in ls1088a_common.h & ls1088ardb.h to remove driver
   specific macros due to which static data was being compiled in
   case of SPL build.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:31:31 -08:00
Sumit Garg
dcb081ba95 armv8: fsl-layerscape: SPL size reduction
Compile-off mp.c and libfdt.c in case of SPL build. SPL size reduces
by approx 2k.

Signed-off-by: Sumit Garg <sumit.garg@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:31:19 -08:00
Bao Xiaowei
7abcd0c018 Powerpc: T208xQDS: Modify the comment of the CONFIG_FSL_PCIE_RESET macro
Remove duplicate macro CONFIG_FSL_PCIE_RESET and update its comment.
It enables PCIe reset to fix link width 2x - 4x.

Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:30:50 -08:00
Alison Wang
ab0ab54e49 armv8: Implement workaround for Cortex-A53 erratum 855873
855873: An eviction might overtake a cache clean operation
Workaround: The erratum can be avoided by upgrading cache clean by
address operations to cache clean and invalidate operations. For
Cortex-A53 r0p3 and later release, this can be achieved by setting
CPUACTLR.ENDCCASCI to 1.

This patch is to implement the workaround for this erratum.

Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:29:57 -08:00
Ahmed Mansour
541d57663f configs: Move SYS_DPAA_QBMAN to Kconfig
The CONFIG_SYS_DPAA_QBMAN define is used by DPAA1 freescale SOCs to
add device tree fixups that allow deep sleep in Linux. The define was
placed in header files included by a number of boards, but was not
explicitly documented in any of the Kconfigs. A description was added
to the drivers/networking menuconfig and default selection for
current SOCs that have this part

Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:28:58 -08:00
Ahmed Mansour
44262327aa drivers/misc: Share qbman init between archs
This patch adds changes necessary to move functionality present in
PowerPC folders with ARM architectures that have DPAA1 QBMan hardware

- Create new board/freescale/common/fsl_portals.c to house shared
  device tree fixups for DPAA1 devices with ARM and PowerPC cores
- Add new header file to top includes directory to allow files in
  both architectures to grab the function prototypes
- Port inhibit_portals() from PowerPC to ARM. This function is used in
  setup to disable interrupts on all QMan and BMan portals. It is
  needed because the interrupts are enabled by default for all portals
  including unused/uninitialised portals. When the kernel attempts to
  go to deep sleep the unused portals prevent it from doing so

Signed-off-by: Ahmed Mansour <ahmed.mansour@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:28:47 -08:00
Yuantian Tang
1b76f3b8ab armv8: layerscape: sata: refine port register configuration
Sata registers PP2C and PP3C are used to control the configuration
of the PHY control OOB timing for the COMINIT/COMWAKE parameters
respectively. Calculate those parameters from port clock frequency.
Overwrite those registers with calculated values to get better OOB
timing.

Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:28:14 -08:00
Ashish Kumar
fa60abc6e6 armv8: ls1088 : MC alignment should always be fixed to 512MB
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-01-10 12:27:36 -08:00
Tom Rini
084edbb689 Merge git://git.denx.de/u-boot-marvell 2018-01-10 08:05:57 -05:00
Tom Rini
ec75fab302 build: Drop CONFIG_SPL_BUILD guards in some cases
Given gcc-6.1 and later we can now safely have strings discarded when
the functions are unused.  This lets us drop certain cases of not
building something so that we don't have the strings brought in when the
code was discarded.  Simplify the code now by dropping guards we don't
need now.

Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Chander Kashyap <k.chander@samsung.com>
Cc: Thomas Abraham <thomas.ab@samsung.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Wenyou Yang <wenyou.yang@microchip.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-10 08:05:52 -05:00
Jean-Jacques Hiblot
2c33b0c7d8 fat write: Fixed a problem with the case of file names when writing files
commit 21a24c3bf3 ("fs/fat: fix case for FAT shortnames") made it
possible that get_name() returns file names with some upper cases.
find_directory_entry() must be updated to take this account, and use
case-insensitive functions to compare file names.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-01-10 08:05:51 -05:00
Masahiro Yamada
75db00eea0 linux/kernel.h: Add ALIGN_DOWN macro
Follow Linux commit ed067d4a859f ("linux/kernel.h: Add ALIGN_DOWN
macro").

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-10 08:05:51 -05:00
Tuomas Tynkkynen
e7dd4f9b0c sh: Drop unreferenced CONFIG_* defines
The following config symbols are only defined once and never referenced
anywhere else:

CONFIG_AP325RXA
CONFIG_AP_SH4A_4A
CONFIG_CPU_SH_TYPE_R
CONFIG_ECOVEC
CONFIG_ESPT
CONFIG_MIGO_R
CONFIG_MPR2
CONFIG_MS7720SE
CONFIG_MS7722SE
CONFIG_MS7750SE
CONFIG_R0P7734
CONFIG_R2DPLUS
CONFIG_RSK7203
CONFIG_RSK7264
CONFIG_RSK7269
CONFIG_SH7752EVB
CONFIG_SH7753EVB
CONFIG_SH7757LCR
CONFIG_SH7763RDP
CONFIG_SH7785LCR

Most of them are config symbols named after the respective boards which
seems to have been a standard practice at some point.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-10 08:05:51 -05:00
Tuomas Tynkkynen
cfb8462aae ARM: Drop unreferenced CONFIG_MACH_* defines
These macros are all defined once and never checked or used anywhere:

CONFIG_MACH_ASPENITE
CONFIG_MACH_DAVINCI_CALIMAIN
CONFIG_MACH_DOCKSTAR
CONFIG_MACH_EDMINIV2
CONFIG_MACH_GOFLEXHOME
CONFIG_MACH_GONI
CONFIG_MACH_GURUPLUG
CONFIG_MACH_KM_KIRKWOOD
CONFIG_MACH_OPENRD_BASE
CONFIG_MACH_SHEEVAPLUG

Almost all of them were only used for the mach_is_foo() logic in
arch/arm/asm/mach-types.h that were dropped in
commit f9dadaef8b ("arm: Re-sync asm/mach-types.h with
Linux Kernel v4.9")

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-10 08:05:50 -05:00
Sekhar Nori
b5914419eb configs: am57xx_evm: fix ethernet phy configuration
Configure AM57xx EVMs for the exact PHY part that is
present on the various boards. This makes U-Boot apply
configurations needed for this PHY like centering the
FLP timing.

For configurations to take effect, DM_ETH needs to be
enabled. Do that too.

Tested on BeagleBoard x15 and AM571x IDK.

Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
2018-01-10 08:05:50 -05:00
Philipp Tomsich
9464dd56dc Travis-CI: Split 't208xrdb t4qds t102*'-job into separate jobs
The 't208xrdb t4qds t102*' job is close to the time limit and
sometimes fails, so this splits it into 3 separate jobs.

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-10 08:05:50 -05:00
Tuomas Tynkkynen
55acf49eab PCI: Drop CONFIG_TSI108_PCI
Last user of this option went away in 2015 in commit:
d928664f41 ("powerpc: 74xx_7xx: remove 74xx_7xx cpu support")

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
2018-01-10 08:05:49 -05:00
Henry Zhang
a8798a6114 BCM283x ALT5 function for JTAG pins
BCM2835 ARM Peripherals doc shows gpio pins 4, 5, 6, 12 and 13 carry altenate
function, ALT5 for ARM JTAG

Signed-off-by: Henry Zhang <henryzhang62@yahoo.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10 08:05:49 -05:00
Patrice Chotard
8a71138da3 configs: stm32f746-disco: enable MMC related flags
STM32F469-disco embeds an arm_pl180 mmc IP, so
enable CMD_MMC, DM_MMC and ARM_PL180_MMCI flags.

Also enables all filesystem command related flags :
  _ CMD_EXT2
  _ CMD_EXT4
  _ CMD_FAT
  _ CMD_FS_GENERIC
  _ CMD_GPT
  _ CMD_BOOTZ

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10 08:05:49 -05:00
Patrice Chotard
77729bd744 ARM: DTS: stm32: add MMC nodes for stm32f746-disco and stm32f769-disco
Add DT nodes to enable ARM_PL180_MMCI IP support for STM32F746
and STM32F769 discovery boards

There is a hardware issue on these boards, it misses a pullup on the GPIO line
used as card detect to allow correct SD card detection.
As workaround, cd-gpios property is not present in DT.
So SD card is always considered present in the slot.

Signed-off-by: Christophe Priouzeau <christophe.priouzeau@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10 08:05:48 -05:00
Patrice Chotard
45be08822f ARM: DTS: stm32: add SDIO controller support for stm32f469-disco
STM32F469 SoC uses an arm_pl180_mmci SDIO controller.

Signed-off-by: Andrea Merello <andrea.merello@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:48 -05:00
Patrice Chotard
c0cdd5adc8 board: stm32: add stm32f469-discovery board support
This board offers :

 _ STM32F469NIH6 microcontroller featuring 2 Mbytes of Flash memory
   and 324 Kbytes of RAM in BGA216 package
 _ On-board ST-LINK/V2-1 SWD debugger, supporting USB reenumeration capability:
     _ Mbed-enabled (mbed.org)
     _ USB functions: USB virtual COM port, mass storage, debug port
 _ 4 inches 800x480 pixel TFT color LCD with MIPI DSI interface and capacitive
   touch screen
 _ SAI Audio DAC, with a stereo headphone output jack
 _ 3 MEMS microphones
 _ MicroSD card connector
 _ I2C extension connector
 _ 4Mx32bit SDRAM
 _ 128-Mbit Quad-SPI NOR Flash
 _ Reset and wake-up buttons
 _ 4 color user LEDs
 _ USB OTG FS with Micro-AB connector
 _ Three power supply options:
 _ Expansion connectors and Arduino™ UNO V3 connectors

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:47 -05:00
Patrice Chotard
d95faab201 ARM: DTS: stm32: add stm32f469-disco-u-boot dts file
_ Add gpio compatible and aliases for stm32f469

  _ Add FMC sdram node

  _ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl,
    pwrcfg and gpio nodes.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:47 -05:00
Patrice Chotard
003b4c1e76 ARM: DTS: add STM32F469 Discovery board support
This DT file comes from kernel v4.15-rc1

stm32f469-pinctrl.dtsi header has been updated with correct
STMicroelectronics Copyright.

Remove the paragraph about writing to the Free Software
Foundation's mailing address as requested by checkpatch.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:47 -05:00
Patrice Chotard
0b3f789ad1 ram: stm32: add memory mapping selection support
This allows to controls the memory internal mapping at
address 0x0000 0000.
We can either map at 0x0000 0000 :
  _ main flash memory
  _ system flash memory
  _ FMC bank1 (NOR/PSRAM 1 and 2)
  _ embedded SRAM
  _ FMC/SDRAM bank1

This is needed for future STM32F469-disco board

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:47 -05:00
Patrice Chotard
c8f787760e board: stm32f429-disco: switch to DM STM32 pinctrl and gpio driver
Use available DM stm32f7_gpio.c and pinctrl_stm32.c drivers
instead of board GPIO initialization.

Remove stm32_gpio.c which is no more used and migrate
structs stm32_gpio_regs and stm32_gpio_priv into
arch-stm32f4/gpio.h to not break compilation.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:46 -05:00
Patrice Chotard
4a56fd484a board: stm32f429-disco: switch to DM STM32 clock driver
Use available DM clk_stm32f.c driver instead of dedicated
mach-stm32/stm32f4/clock.c.

Migrate periph_clock defines from stm32_periph.h directly in
CLK driver. These periph_clock defines will be removed when STMMAC,
TIMER2 and SYSCFG drivers will support DM CLK.

Enable also CLK flag.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:46 -05:00
Patrice Chotard
dcb11959d8 mach-stm32: stmf32f4: timer: remove clock_get() call
In order to use common clock driver between STM32F4 and
STM32F7, remove clock_get() call
As APB_PSC is always set to 2, only case when
clock_get(CLOCK_AHB) != clock_get(CLOCK_APB1) is kept

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:46 -05:00
Patrice Chotard
2d18d72858 board: stm32f429-disco: switch to DM STM32 serial driver
Remove serial_stm32.c driver and uart init from board file,
use available DM serial_stm32x7.c driver compatible for
STM32F4/F7 and H7 SoCs.

The serial_stm32x7.c driver will be renamed later with a more
generic name as it's shared with all STM32 Socs.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:46 -05:00
Patrice Chotard
a05707004d configs: stm32f429-disco: enable MISC, STM32_RCC, DM_RESET and STM32_RESET
This allows to support rcc MFD driver.
By enabling all these flags, we need to increase malloc area to avoid
crash during early stage.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:46 -05:00
Patrice Chotard
98693c22d9 pinctrl: stm32: add stm32f4 pinctrl compatible strings
STM32F4 SoCs uses the same pinctrl block as found into
STM32F7 and H7 SoCs.
We can add "st,stm32f429-pinctrl" and "st,stm32f469-pinctrl"
compatible string into pinctrl_stm32.c.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:45 -05:00
Patrice Chotard
7fd65ef552 board: stm32f429-discovery: switch to DM STM32 sdram driver
Use available DM stm32_sdram.c driver instead of board
SDRAM initialization.
For that, enable OF_CONTROL, OF_EMBED and STM32_SDRAM flags.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:45 -05:00
Patrice Chotard
791651e390 ARM: DTS: stm32: add stm32f429-disco-u-boot dts file
_ Add gpio compatible and aliases for stm32f429

_ Add FMC sdram node with associated new bindings value to
  manage second bank (ie bank 1).

_ Add "u-boot,dm-pre-reloc" for rcc, fmc, fixed-clock, pinctrl,
  pwrcfg and gpio nodes.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:45 -05:00
Patrice Chotard
46b1e54b18 ARM: DTS: stm32: add STM32F429 SoC and its Discovery board support
All these files comes from kernel v4.15-rc1.

Update some header with correct STMicroelectronics Copyright.

Remove the paragraph about writing to the Free Software
Foundation's mailing address as requested by checkpatch.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2018-01-10 08:05:45 -05:00
Chris Packham
0a05bf42b4 ARM: mvebu: correct reference for "ethernet1" on DB-88F6820-AMC
The DB-88F6820-AMC connects ethernet@34000 and ethernet@70000 which are
labeled as eth2 and eth0 in armada-38x.dts. The ethernet@30000 (eth1) is
not used on the AMC board.

This eliminates the following bootup message

  Device 'ethernet@70000': seq 0 is in use by 'ethernet@34000'

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-10 12:36:52 +01:00
Eddie Cai
c3d098e762 rockchip: rk3288: enable rockusb support on rk3288 based device
this patch enable rockusb support on rk3288 based device.

Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10 11:11:06 +01:00
Eddie Cai
1c977772a6 rockchip:usb: add a simple readme for rockusb
add a simple readme to introduce rockusb and tell people how to use it

Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10 11:11:06 +01:00
Eddie Cai
453c95e01a usb: rockchip: add rockusb command
this patch add rockusb command. the usage is
rockusb <USB_controller> <devtype> <dev[:part]>
e.g. rockusb 0 mmc 0

Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10 11:11:06 +01:00
Eddie Cai
bf2b72bef1 usb: rockchip: add the rockusb gadget
this patch implement rockusb protocol on the device side. this is based on
USB download gadget infrastructure. the rockusb function implements the rd,
wl, rid commands. it can work with rkdeveloptool

Signed-off-by: Eddie Cai <eddie.cai.linux@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-01-10 11:11:05 +01:00
Chen-Yu Tsai
f4f9896ac3 musb: sunxi: Use base address from device tree
Now that the musb sunxi glue driver is completely device model / device
tree driven, we should use the base address from the device tree,
instead of hard-coding it in the source code.

Fixes: 3a61b080ac ("musb: sunxi: switch to the device model")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2018-01-10 11:11:05 +01:00
Miquel Raynal
32466c445c doc: bindings: soft-spi: update documentation to match the code
Linux bindings have been introduced in the code (removing the U-Boot
specific ones) without documentation update. Compatible string has
changed, as well as the four GPIO properties. Reflect this by updating
the soft-spi.txt documentation.

Fixes: 102412c415 ("dm: spi: soft_spi: switch to use linux compatible string")
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2018-01-10 12:06:15 +05:30
Tuomas Tynkkynen
34439f73d9 ARM: sunxi: Remove left-over cd-inverted property from pcDuino3
Commit 8620f38409 ("dm: sunxi: Linksprite_pcDuino3: Correct polarity
of MMC card detect") claims that the Pcduino3 device tree had an
incorrect polarity for the card detect pin and thus changed the polarity
flag of the cd-gpios from GPIO_ACTIVE_HIGH to GPIO_ACTIVE_LOW.

Actually the DT was correct since according to the mmc binding, a
combination of GPIO_ACTIVE_HIGH + cd-inverted results in an active-low
polarity. But because the U-Boot driver lacks the code to look at the
cd-inverted property (unlike the Linux driver) it interpreted the
polarity of active-high. Thus, after that commit the DT is actually
wrong from the binding/Linux point of view.

To make both Linux and U-Boot interpret the DT in the same way, just
drop the left-over cd-inverted property. I've sent a Linux patch to
switch all sunxi DTs over to not using the cd-inverted property, so
eventually all sunxi boards in U-Boot will be consistent in not using
cd-inverted.

Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2018-01-10 11:37:09 +05:30
Maxime Ripard
3afdfd8ddc sunxi: maintainers: Add myself for the TBS A711
Support for that board got introduced recently without the maintainers
part. Let's fix that.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2018-01-10 11:30:49 +05:30
Chen-Yu Tsai
afe2754412 sunxi: Add support for Libre Computer Board ALL-H3-CC H3 ver.
The Libre Computer Board ALL-H3-CC from Libre Technology is a Raspberry
Pi B+ form factor single board computer based on the Allwinner H3 SoC.
The board has 1GB DDR3 SDRAM, provided by 4 2Gb chips. The mounting holes
and connectors are in the exact same position as on the Raspberry Pi B+.

Raspberry Pi B+ like peripherals supported on this board include:

  - Power input through micro-USB connector (without USB OTG)
  - Native 100 Mbps ethernet using the internal PHY, as opposed to
    USB-based on the RPi
  - 4x USB 2.0 host ports, directly connected to the SoC, as opposed to
    being connected through a USB 2.0 hub on the RPi
  - TV and audio output on a 3.5mm TRRS jack
  - HDMI output
  - Micro-SD card slot
  - Standard RPi B+ GPIO header, with the standard peripherals routed to
    the same pins.

    * 5V, 3.3V power, and ground
    * I2C0 on the H3 is routed to I2C1 pins on the RPi header
    * I2C1 on the H3 is routed to I2C0 pins on the RPi header
    * UART1 on the H3 is routed to UART0 pins on the RPi header
    * SPI0 on the H3 is routed to SPI0 pins on the RPi header,
      with GPIO pin PA17 replacing the missing Chip Select 1
    * I2S1 on the H3 is routed to PCM pins on the RPi header

  - Additional peripherals from the H3 are available on different pins.
    These include I2S0, JTAG, PWM1, SPDIF, SPI1, and UART3

In addition, there are a number of new features:

  - Console UART header
  - Consumer IR receiver
  - Camera interface (not compatible with RPi)
  - Onboard microphone
  - eMMC expansion module port
  - Heatsink mounting holes

This patch adds defconfig and dts files for this board. The dts file is
the same as the one submitted for inclusion in Linux, with some minor
revisions to match the dtsi file and old EMAC bindings in U-boot.

Since the OTG controller is wired to a USB host port, and the H3 has
proper USB hosts to handle host mode, the MUSB driver is not enabled.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2018-01-10 11:27:41 +05:30
Siarhei Siamashka
d852600ef0 arm: Exercise v7_arch_cp15_set_acr even without errata fixups
By applying this patch, we are ensuring that the code paths
responsible for applying errata workarounds are also exercised
on CPU revisions, which actually don't need these workarounds.

Only CONFIG_ARM_ERRATA_621766, CONFIG_ARM_ERRATA_454179,
CONFIG_ARM_ERRATA_725233 and CONFIG_ARM_ERRATA_430973 are
covered by this patch (Cortex-A8).

This improves code coverage when testing U-Boot builds
on newer hardware. In particular, the problematic commit
00bbe96eba ("arm: omap: Unify get_device_type() function")
would break both BeageBoard and BeagleBoard XM rather than
just older BeagleBoard.

As an additional bonus, we need fewer instructins and the SPL
size is reduced.

Signed-off-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2018-01-09 15:31:14 -05:00
Tom Rini
98691a60ab Merge git://git.denx.de/u-boot-rockchip 2018-01-09 13:28:51 -05:00
Miquel Raynal
3f3946d30d pinctrl: mvebu: Make drivers depend on the pinctrl framework
Armada pinctrl drivers shall not be compiled without the entire pinctrl
framework and thus lack a "depends on" condition, otherwise the driver
will simply not be probed.

Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00
Miquel Raynal
e7ab2ccd15 ARM: mvebu: Allow MVNETA to be selected with Armada 3700 SoCs
Until now, Armada 3700 SoCs could not enable the mvneta driver, and thus
did not benefit from Ethernet support. Add ARMADA_3700 in the
"depends on" list of the MVNETA Kconfig entry.

Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00
Florian Klink
0f70d705cf arm: mvebu: ClearFog: document boot selection switches, update UART
Signed-off-by: Florian Klink <flokli@flokli.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00
Andre Heider
6779d65b9f arm64: a37xx: use distro bootcmd
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00
Andre Heider
e4e18a8acb arm64: a37xx: defconfigs: enable CONFIG_DISTRO_DEFAULTS
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00
Andre Heider
e1489ba89d arm64: a37xx: add distro compatible env vars
the values of dt_addr_r/kernel_addr_r/ramdisk_addr_r are taken from
the downstream 'u-boot-2017.03-armada-17.10' release.

the chosen values of scriptaddr and pxefile_addr_r are below fdt_addr_r,
in 1MB steps.

Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00
Andre Heider
d7da570770 arm64: a37xx: use disto defaults
Signed-off-by: Andre Heider <a.heider@gmail.com>
Reviewed-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00
Konstantin Porotchkin
eee4835d22 tools: Add Marvell recovery image download script
Introduce the recovery image download script for usage with
Marvell Armada SoC families (excepting 37xx family).
Since Marvell BootROM uses a sliding window in UART buffer
for detecting escape sequence during the boot, it's easier
to interrupt the normal boot flow by sending a long stream
of chained escape sequences to the serial port instead of
periodically sending a single escape sequence as it is done
by kwboot utility.
Additional benefit of using this script is the ability to
adjust the escape sequence stream length withoiut need for
compilation.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Igal Liberman <igall@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2018-01-09 16:41:00 +01:00
Tom Rini
8c9e6f2817 Merge git://git.denx.de/u-boot-uniphier 2018-01-09 08:45:02 -05:00
Masahiro Yamada
a322eb9ff6 ARM: uniphier: hide memory top by platform hook instead of CONFIG
I do not see a good reason to do this by a CONFIG option that affects
all SoCs.  The ram_size can be adjusted by dram_init() at run-time.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-09 21:58:19 +09:00
Masahiro Yamada
3281532ab2 ARM: uniphier: enable CONFIG_MMC_SDHCI_SDMA for ARMv8 SoCs
I did not enable SDMA when I added sdhci-cadence support because LD20
boards are equipped with a large amount memory beyond 32 bit address
range, but SDMA does not support the 64bit address.  U-Boot relocates
itself to the end of effectively available RAM.  This would make the
MMC enumeration fail because the buffer for EXT_CSD allocated in the
stack would go too high, then SDMA would fail to transfer data.

Recent SDHCI-compatible controllers support ADMA, but unfortunately
U-Boot does not support ADMA.

In the previous commit, I hided the DRAM area that exceeds the 32 bit
address range.  Now, I can enable CONFIG_MMC_SDHCI_SDMA.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-09 21:58:18 +09:00
Masahiro Yamada
be893a5c09 ARM: uniphier: do not use RAM that exceeds 32 bit address range
LD20 / PXs3 boards are equipped with a large amount of memory beyond
the 32 bit address range.  U-Boot relocates itself to the end of the
available RAM.

This is a problem for DMA engines that only support 32 bit physical
address, like the SDMA of SDHCI controllers.

In fact, U-Boot does not need to run at the very end of RAM.  It is
rather troublesome for drivers with DMA engines because U-Boot does
not have API like dma_set_mask(), so DMA silently fails, making the
driver debugging difficult.

Hide the memory region that exceeds the 32 bit address range.  It can
be done by simply carving out gd->ram_size.  It would also possible to
override get_effective_memsize() or to define CONFIG_MAX_MEM_MAPPED,
but dram_init() is a good enough place to do this job.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-01-09 21:58:17 +09:00
Tom Rini
b4b9814f1c arm: socfpga: Guard commands with CONFIG_SPL_BUILD tests
In order for these commands to not be included in SPL we need to guard
compilation with CONFIG_SPL_BUILD checks.  Reorganize some sections of
code slightly in order to avoid new warnings and mark the command
functions as static as they should have been before.

Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-01-09 12:38:55 +01:00
Andrey Zhizhikin
08cc52abc9 ARM: socfpga: Enable part command for socfpga platform
Enable CONFIG_CMD_PART item, as default environment requires it
and complains this command in unknown.

Signed-off-by: Andrey Zhizhikin <andrey.z@gmail.com>
2018-01-09 12:38:55 +01:00
Ran Wang
91f4fb9b89 arm64: layerscape: Move CONFIG_HAS_FSL_DR_USB to Kconfig
Rename to USB_EHCI_FSL, use Kconfig to select ehci accordingly.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
2018-01-09 12:37:15 +01:00
Ran Wang
be3872ea81 usb: ehci: fsl: Fix some compile warnings.
When enable CONFIG_HAS_FSL_DR_USB, we might encounter below compile
warning, apply this patch can fix it:

drivers/usb/host/ehci-fsl.c:109:4: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
   ((u32)hccr + HC_LENGTH(ehci_readl(&hccr->cr_capbase)));
    ^
drivers/usb/host/ehci-fsl.c:108:9: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
  hcor = (struct ehci_hcor *)
         ^
drivers/usb/host/ehci-fsl.c:115:8: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
        (u32)hccr, (u32)hcor,
        ^
include/log.h:131:26: note: in definition of macro 'debug_cond'
    printf(pr_fmt(fmt), ##args); \
                          ^~~~
drivers/usb/host/ehci-fsl.c:114:2: note: in expansion of macro 'debug'
  debug("ehci-fsl: init hccr %x and hcor %x hc_length %d\n",
  ^~~~~
drivers/usb/host/ehci-fsl.c:115:19: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast]
        (u32)hccr, (u32)hcor,
                   ^
include/log.h:131:26: note: in definition of macro 'debug_cond'
    printf(pr_fmt(fmt), ##args); \
                          ^~~~
drivers/usb/host/ehci-fsl.c:114:2: note: in expansion of macro 'debug'
  debug("ehci-fsl: init hccr %x and hcor %x hc_length %d\n",
  ^~~~~

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
2018-01-09 12:37:15 +01:00
Ran Wang
8d9c3c2253 armv8: ls1012a: Add USB 2.0 controller phy type for ls1012aqds board
Without this propertiy, U-Boot will pop warning of 'USB phy type not
defined' when select CONFIG_HAS_FSL_DR_USB.

Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
2018-01-09 12:37:15 +01:00
Elaine Zhang
538f67c332 rockchip: clk: bind reset driver
Bind rockchip reset to clock-controller with rockchip_reset_bind().

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-09 11:13:32 +01:00
Elaine Zhang
760188c1aa rockchip: reset: support a (common) rockchip reset drivers
Create driver to support the soft reset (i.e. peripheral)
of all Rockchip SoCs.

Example of usage:
i2c driver:
	ret = reset_get_by_name(dev, "i2c", &reset_ctl);
	if (ret) {
		error("reset_get_by_name() failed: %d\n", ret);
	}

	reset_assert(&reset_ctl);
	udelay(50);
	reset_deassert(&reset_ctl);

i2c dts node:
resets = <&cru SRST_P_I2C1>, <&cru SRST_I2C1>;
reset-names = "p_i2c", "i2c";

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
[Fixed commit tag:]
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-01-09 11:13:32 +01:00
3075 changed files with 99197 additions and 23913 deletions

View File

@@ -25,3 +25,6 @@
# Ignore "WARNING: Prefer ether_addr_copy() over memcpy() if the Ethernet
# addresses are __aligned(2)".
--ignore PREFER_ETHER_ADDR_COPY
# A bit shorter of a description is OK with us.
--min-conf-desc-length=2

View File

@@ -46,6 +46,8 @@ install:
- grub-mkimage -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
- mkdir ~/grub2-arm
- ( cd ~/grub2-arm; wget -O - http://download.opensuse.org/ports/armv7hl/distribution/leap/42.2/repo/oss/suse/armv7hl/grub2-arm-efi-2.02~beta2-87.1.armv7hl.rpm | rpm2cpio | cpio -di )
- mkdir ~/grub2-arm64
- ( cd ~/grub2-arm64; wget -O - http://download.opensuse.org/ports/aarch64/distribution/leap/42.2/repo/oss/suse/aarch64/grub2-arm64-efi-2.02~beta2-87.1.aarch64.rpm | rpm2cpio | cpio -di )
env:
global:
@@ -70,7 +72,11 @@ before_script:
wget https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-2016.09-release/arc_gnu_2016.09_prebuilt_uclibc_le_archs_linux_install.tar.gz &&
tar -C /tmp -xf arc_gnu_2016.09_prebuilt_uclibc_le_archs_linux_install.tar.gz;
fi
- if [[ "${TOOLCHAIN}" == *xtensa* ]]; then ./tools/buildman/buildman --fetch-arch xtensa ; fi
- if [[ "${TOOLCHAIN}" == *xtensa* ]]; then
wget https://github.com/foss-xtensa/toolchain/releases/download/2018.02/x86_64-2018.02-${TOOLCHAIN}.tar.gz &&
tar -C /tmp -xf x86_64-2018.02-${TOOLCHAIN}.tar.gz &&
echo -e "\n[toolchain-prefix]\nxtensa = /tmp/2018.02/${TOOLCHAIN}/bin/${TOOLCHAIN}-" >> ~/.buildman;
fi
# If TOOLCHAIN is unset, we're on some flavour of ARM.
- if [[ "${TOOLCHAIN}" == "" ]]; then
wget http://releases.linaro.org/components/toolchain/binaries/6.3-2017.02/aarch64-linux-gnu/gcc-linaro-6.3.1-2017.02-x86_64_aarch64-linux-gnu.tar.xz &&
@@ -78,6 +84,11 @@ before_script:
tar -C /tmp -xf gcc-linaro-6.3.1-2017.02-x86_64_aarch64-linux-gnu.tar.xz &&
tar -C /tmp -xf gcc-linaro-6.3.1-2017.02-x86_64_arm-linux-gnueabihf.tar.xz;
fi
- if [[ "${TOOLCHAIN}" == "riscv" ]]; then
wget https://github.com/PkmX/riscv-prebuilt-toolchains/releases/download/20180111/riscv32-unknown-elf-toolchain.tar.gz &&
tar -C /tmp -xf riscv32-unknown-elf-toolchain.tar.gz &&
echo -e "\n[toolchain-prefix]\nriscv = /tmp/riscv32-unknown-elf/bin/riscv32-unknown-elf-" >> ~/.buildman;
fi
- if [[ "${QEMU_TARGET}" != "" ]]; then
git clone git://git.qemu.org/qemu.git /tmp/qemu;
pushd /tmp/qemu;
@@ -94,9 +105,8 @@ script:
#
# Exit code 129 means warnings only.
- if [[ "${BUILDMAN}" != "" ]]; then
set +e;
tools/buildman/buildman -P ${BUILDMAN};
ret=$?;
ret=0;
tools/buildman/buildman -P -E ${BUILDMAN} || ret=$?;
if [[ $ret -ne 0 && $ret -ne 129 ]]; then
tools/buildman/buildman -sdeP ${BUILDMAN};
exit $ret;
@@ -109,10 +119,25 @@ script:
- export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/.bm-work/${TEST_PY_BD};
cp ~/grub_x86.efi $UBOOT_TRAVIS_BUILD_DIR/;
cp ~/grub2-arm/usr/lib/grub2/arm-efi/grub.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm.efi;
cp ~/grub2-arm64/usr/lib/grub2/arm64-efi/grub.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm64.efi;
if [[ "${TEST_PY_BD}" != "" ]]; then
./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID}
-k "${TEST_PY_TEST_SPEC:-not a_test_which_does_not_exist}"
--build-dir "$UBOOT_TRAVIS_BUILD_DIR";
ret=$?;
if [[ $ret -ne 0 ]]; then
exit $ret;
fi;
fi;
if [[ -n "${TEST_PY_TOOLS}" ]]; then
PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"
PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}"
./tools/binman/binman -t &&
./tools/patman/patman --test &&
./tools/buildman/buildman -t &&
PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt"
PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}"
./tools/dtoc/dtoc -t;
fi
matrix:
@@ -206,7 +231,11 @@ matrix:
- env:
- BUILDMAN="mpc85xx -x t208xrdb -x t4qds -x t102* -x p1_p2_rdb_pc -x p1010rdb -x corenet_ds -x b4860qds -x sbc8548 -x bsc91*"
- env:
- BUILDMAN="t208xrdb t4qds t102*"
- BUILDMAN="t208xrdb"
- env:
- BUILDMAN="t4qds"
- env:
- BUILDMAN="t102*"
- env:
- BUILDMAN="p1_p2_rdb_pc"
- env:
@@ -246,7 +275,10 @@ matrix:
BUILDMAN="xilinx -x microblaze"
- env:
- BUILDMAN="xtensa"
TOOLCHAIN="xtensa"
TOOLCHAIN="xtensa-dc233c-elf"
- env:
- BUILDMAN="riscv"
TOOLCHAIN="riscv"
# QA jobs for code analytics
# static code analysis with cppcheck (we can add --enable=all later)
@@ -283,6 +315,7 @@ matrix:
TEST_PY_TEST_SPEC="test_ofplatdata"
BUILDMAN="^sandbox$"
TOOLCHAIN="x86_64"
TEST_PY_TOOLS="yes"
- env:
- TEST_PY_BD="sandbox_flattree"
BUILDMAN="^sandbox_flattree$"
@@ -308,6 +341,11 @@ matrix:
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^qemu_arm$"
- env:
- TEST_PY_BD="qemu_arm64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="aarch64-softmmu"
BUILDMAN="^qemu_arm64$"
- env:
- TEST_PY_BD="qemu_mips"
TEST_PY_TEST_SPEC="not sleep"
@@ -350,5 +388,12 @@ matrix:
QEMU_TARGET="arm-softmmu"
TEST_PY_ID="--id qemu"
BUILDMAN="^zynq_zc702$"
- env:
- TEST_PY_BD="xtfpga"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="xtensa-softmmu"
TEST_PY_ID="--id qemu"
BUILDMAN="^xtfpga$"
TOOLCHAIN="xtensa-dc233c-elf"
# TODO make it perfect ;-r

54
Kconfig
View File

@@ -69,20 +69,56 @@ config DISTRO_DEFAULTS
imply USE_BOOTCOMMAND
select CMD_BOOTZ if ARM && !ARM64
select CMD_BOOTI if ARM64
select CMD_DHCP
select CMD_PXE
select CMD_DHCP if NET && CMD_NET
select CMD_PXE if NET && CMD_NET
select CMD_EXT2
select CMD_EXT4
select CMD_FAT
select CMD_FS_GENERIC
select CMD_MII
select CMD_PING
select CMD_PART
imply CMD_MII if NET
select CMD_PING if NET
select CMD_PART if PARTITIONS
select HUSH_PARSER
select BOOTP_BOOTPATH if NET && CMD_NET
select BOOTP_DNS if NET && CMD_NET
select BOOTP_GATEWAY if NET && CMD_NET
select BOOTP_HOSTNAME if NET && CMD_NET
select BOOTP_PXE if NET && CMD_NET
select BOOTP_SUBNETMASK if NET && CMD_NET
select CMDLINE_EDITING
select AUTO_COMPLETE
select SYS_LONGHELP
select SUPPORT_RAW_INITRD
select ENV_VARS_UBOOT_CONFIG
help
Select this to enable various options and commands which are suitable
for building u-boot for booting general purpose Linux distributions.
config ENV_VARS_UBOOT_CONFIG
bool "Add arch, board, vendor and soc variables to default environment"
help
Define this in order to add variables describing the
U-Boot build configuration to the default environment.
These will be named arch, cpu, board, vendor, and soc.
Enabling this option will cause the following to be defined:
- CONFIG_SYS_ARCH
- CONFIG_SYS_CPU
- CONFIG_SYS_BOARD
- CONFIG_SYS_VENDOR
- CONFIG_SYS_SOC
config SYS_BOOT_GET_CMDLINE
bool "Enable kernel command line setup"
help
Enables allocating and saving kernel cmdline in space between
"bootm_low" and "bootm_low" + BOOTMAPSZ.
config SYS_BOOT_GET_KBD
bool "Enable kernel board information setup"
help
Enables allocating and saving a kernel copy of the bd_info in
space between "bootm_low" and "bootm_low" + BOOTMAPSZ.
config SYS_MALLOC_F
bool "Enable malloc() pool before relocation"
default y if DM
@@ -366,15 +402,13 @@ config SYS_EXTRA_OPTIONS
new boards should not use this option.
config SYS_TEXT_BASE
depends on ARC || X86 || ARCH_UNIPHIER || ARCH_ZYNQMP || \
(M68K && !TARGET_ASTRO_MCF5373L) || MICROBLAZE || MIPS || \
ARCH_ZYNQ || ARCH_KEYSTONE || ARCH_OMAP2PLUS
depends on !NIOS2 && !XTENSA
depends on !EFI_APP
default 0x80800000 if ARCH_OMAP2PLUS
hex "Text Base"
help
TODO: Move CONFIG_SYS_TEXT_BASE for all the architecture
The address in memory that U-Boot will be running from, initially.
default 0x80800000 if ARCH_OMAP2PLUS
config SYS_CLK_FREQ

View File

@@ -59,12 +59,6 @@ S: Maintained
T: git git://git.denx.de/u-boot-arc.git
F: arch/arc/
ARC HSDK CREG GPIO
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
L: uboot-snps-arc@synopsys.com
F: drivers/gpio/hsdk-creg-gpio.c
ARC HSDK CGU CLOCK
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
@@ -73,6 +67,12 @@ F: drivers/clk/clk-hsdk-cgu.c
F: include/dt-bindings/clock/snps,hsdk-cgu.h
F: doc/device-tree-bindings/clock/snps,hsdk-cgu.txt
ARC HSDK CREG GPIO
M: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
S: Maintained
L: uboot-snps-arc@synopsys.com
F: drivers/gpio/hsdk-creg-gpio.c
ARM
M: Albert Aribaud <albert.u.boot@aribaud.net>
S: Maintained
@@ -92,14 +92,17 @@ T: git git://git.denx.de/u-boot-atmel.git
F: arch/arm/mach-at91/
ARM BROADCOM BCM283X
#M: Stephen Warren <swarren@wwwdotorg.org>
S: Orphaned (Since 2017-07)
M: Alexander Graf <agraf@suse.de>
S: Maintained
F: arch/arm/mach-bcm283x/
F: drivers/gpio/bcm2835_gpio.c
F: drivers/mmc/bcm2835_sdhci.c
F: drivers/mmc/bcm2835_sdhost.c
F: drivers/serial/serial_bcm283x_mu.c
F: drivers/serial/serial_bcm283x_pl011.c
F: drivers/video/bcm2835.c
F: include/dm/platform_data/serial_bcm283x_mu.h
F: drivers/pinctrl/broadcom/
ARM FREESCALE IMX
M: Stefano Babic <sbabic@denx.de>
@@ -160,6 +163,7 @@ F: drivers/misc/rockchip-efuse.c
F: drivers/pinctrl/rockchip/
F: drivers/ram/rockchip/
F: drivers/sysreset/sysreset_rockchip.c
F: drivers/video/rockchip/
F: tools/rkcommon.c
F: tools/rkcommon.h
F: tools/rkimage.c
@@ -181,6 +185,12 @@ M: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
S: Maintained
F: arch/arm/mach-snapdragon/
ARM STI
M: Patrice Chotard <patrice.chotard@st.com>
S: Maintained
F: arch/arm/mach-sti/
F: arch/arm/include/asm/arch-sti*/
ARM STM SPEAR
#M: Vipin Kumar <vipin.kumar@st.com>
S: Orphaned (Since 2016-02)
@@ -194,15 +204,9 @@ S: Maintained
F: arch/arm/cpu/armv7/stv0991/
F: arch/arm/include/asm/arch-stv0991/
ARM STI
M: Patrice Chotard <patrice.chotard@st.com>
S: Maintained
F: arch/arm/mach-sti/
F: arch/arm/include/asm/arch-sti*/
ARM SUNXI
M: Jagan Teki <jagan@openedev.com>
M: Maxime Ripard <maxime.ripard@free-electrons.com>
M: Maxime Ripard <maxime.ripard@bootlin.com>
S: Maintained
T: git git://git.denx.de/u-boot-sunxi.git
F: arch/arm/cpu/armv7/sunxi/
@@ -286,10 +290,15 @@ EFI PAYLOAD
M: Alexander Graf <agraf@suse.de>
S: Maintained
T: git git://github.com/agraf/u-boot.git
F: doc/README.efi
F: doc/README.iscsi
F: include/efi*
F: lib/efi*
F: include/pe.h
F: include/asm-generic/pe.h
F: lib/efi*/
F: test/py/tests/test_efi*
F: cmd/bootefi.c
F: tools/file2include.c
FLATTENED DEVICE TREE
M: Simon Glass <sjg@chromium.org>
@@ -345,11 +354,48 @@ S: Maintained
T: git git://git.denx.de/u-boot-mmc.git
F: drivers/mmc/
NAND FLASH
M: Scott Wood <oss@buserror.net>
S: Maintained
T: git git://git.denx.de/u-boot-nand-flash.git
F: drivers/mtd/nand/
NDS32
M: Macpaul Lin <macpaul@andestech.com>
S: Maintained
T: git git://git.denx.de/u-boot-nds32.git
F: arch/nds32/
NETWORK
M: Joe Hershberger <joe.hershberger@ni.com>
S: Maintained
T: git git://git.denx.de/u-boot-net.git
F: drivers/net/
F: net/
NIOS
M: Thomas Chou <thomas@wytron.com.tw>
S: Maintained
T: git git://git.denx.de/u-boot-nios.git
F: arch/nios2/
ONENAND
#M: Lukasz Majewski <l.majewski@majess.pl>
S: Orphaned (Since 2017-01)
T: git git://git.denx.de/u-boot-onenand.git
F: drivers/mtd/onenand/
PATMAN
M: Simon Glass <sjg@chromium.org>
S: Maintained
F: tools/patman/
POWER
M: Jaehoon Chung <jh80.chung@samsung.com>
S: Maintained
T: git git://git.denx.de/u-boot-pmic.git
F: drivers/power/
POWERPC
M: Wolfgang Denk <wd@denx.de>
S: Maintained
@@ -386,42 +432,19 @@ S: Maintained
T: git git://git.denx.de/u-boot-ppc4xx.git
F: arch/powerpc/cpu/ppc4xx/
POWER
M: Jaehoon Chung <jh80.chung@samsung.com>
RISC-V
M: Rick Chen <rick@andestech.com>
S: Maintained
T: git git://git.denx.de/u-boot-pmic.git
F: drivers/power/
T: git git://git.denx.de/u-boot-riscv.git
F: arch/riscv/
F: tools/prelink-riscv.c
NETWORK
M: Joe Hershberger <joe.hershberger@ni.com>
ROCKUSB
M: Eddie Cai <eddie.cai.linux@gmail.com>
S: Maintained
T: git git://git.denx.de/u-boot-net.git
F: drivers/net/
F: net/
NAND FLASH
M: Scott Wood <oss@buserror.net>
S: Maintained
T: git git://git.denx.de/u-boot-nand-flash.git
F: drivers/mtd/nand/
NDS32
M: Macpaul Lin <macpaul@andestech.com>
S: Maintained
T: git git://git.denx.de/u-boot-nds32.git
F: arch/nds32/
NIOS
M: Thomas Chou <thomas@wytron.com.tw>
S: Maintained
T: git git://git.denx.de/u-boot-nios.git
F: arch/nios2/
ONENAND
#M: Lukasz Majewski <l.majewski@majess.pl>
S: Orphaned (Since 2017-01)
T: git git://git.denx.de/u-boot-onenand.git
F: drivers/mtd/onenand/
F: drivers/usb/gadget/f_rockusb.c
F: cmd/rockusb.c
F: doc/README.rockusb
SANDBOX
M: Simon Glass <sjg@chromium.org>

View File

@@ -3,7 +3,7 @@
#
VERSION = 2018
PATCHLEVEL = 01
PATCHLEVEL = 03
SUBLEVEL =
EXTRAVERSION =
NAME =
@@ -811,12 +811,16 @@ ifneq ($(CONFIG_BUILD_TARGET),)
ALL-y += $(CONFIG_BUILD_TARGET:"%"=%)
endif
ifneq ($(CONFIG_SYS_INIT_SP_BSS_OFFSET),)
ALL-y += init_sp_bss_offset_check
endif
LDFLAGS_u-boot += $(LDFLAGS_FINAL)
# Avoid 'Not enough room for program headers' error on binutils 2.28 onwards.
LDFLAGS_u-boot += $(call ld-option, --no-dynamic-linker)
ifneq ($(CONFIG_SYS_TEXT_BASE),)
ifeq ($(CONFIG_ARC)$(CONFIG_NIOS2)$(CONFIG_X86)$(CONFIG_XTENSA),)
LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE)
endif
@@ -922,6 +926,16 @@ OBJCOPYFLAGS_u-boot.srec := -O srec
u-boot.hex u-boot.srec: u-boot FORCE
$(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-elf.srec := $(OBJCOPYFLAGS_u-boot.srec)
u-boot-elf.srec: u-boot.elf FORCE
$(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-spl.srec = $(OBJCOPYFLAGS_u-boot.srec)
spl/u-boot-spl.srec: spl/u-boot-spl FORCE
$(call if_changed,objcopy)
OBJCOPYFLAGS_u-boot-nodtb.bin := -O binary \
$(if $(CONFIG_X86_16BIT_INIT),-R .start16 -R .resetvec)
@@ -939,6 +953,33 @@ binary_size_check: u-boot-nodtb.bin FORCE
fi \
fi
ifneq ($(CONFIG_SYS_INIT_SP_BSS_OFFSET),)
ifneq ($(CONFIG_SYS_MALLOC_F_LEN),)
subtract_sys_malloc_f_len = space=$$(($${space} - $(CONFIG_SYS_MALLOC_F_LEN)))
else
subtract_sys_malloc_f_len = true
endif
# The 1/4 margin below is somewhat arbitrary. The likely initial SP usage is
# so low that the DTB could probably use 90%+ of the available space, for
# current values of CONFIG_SYS_INIT_SP_BSS_OFFSET at least. However, let's be
# safe for now and tweak this later if space becomes tight.
# A rejected alternative would be to check that some absolute minimum stack
# space was available. However, since CONFIG_SYS_INIT_SP_BSS_OFFSET is
# deliberately build-specific, to take account of build-to-build stack usage
# differences due to different feature sets, there is no common absolute value
# to check against.
init_sp_bss_offset_check: u-boot.dtb FORCE
@dtb_size=$(shell wc -c u-boot.dtb | awk '{print $$1}') ; \
space=$(CONFIG_SYS_INIT_SP_BSS_OFFSET) ; \
$(subtract_sys_malloc_f_len) ; \
quarter_space=$$(($${space} / 4)) ; \
if [ $${dtb_size} -gt $${quarter_space} ]; then \
echo "u-boot.dtb is larger than 1 quarter of " >&2 ; \
echo "(CONFIG_SYS_INIT_SP_BSS_OFFSET - CONFIG_SYS_MALLOC_F_LEN)" >&2 ; \
exit 1 ; \
fi
endif
u-boot-nodtb.bin: u-boot FORCE
$(call if_changed,objcopy)
$(call DO_STATIC_RELA,$<,$@,$(CONFIG_SYS_TEXT_BASE))
@@ -1022,6 +1063,7 @@ u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl u-boot-ivt.img: \
u-boot.itb: u-boot-nodtb.bin dts/dt.dtb $(U_BOOT_ITS) FORCE
$(call if_changed,mkfitimage)
$(BOARD_SIZE_CHECK)
u-boot-spl.kwb: u-boot.img spl/u-boot-spl.bin FORCE
$(call if_changed,mkimage)
@@ -1264,6 +1306,10 @@ ifeq ($(CONFIG_KALLSYMS),y)
$(call cmd,u-boot__) common/system_map.o
endif
ifeq ($(CONFIG_RISCV),y)
@tools/prelink-riscv $@ 0
endif
quiet_cmd_sym ?= SYM $@
cmd_sym ?= $(OBJDUMP) -t $< > $@
u-boot.sym: u-boot FORCE

134
README
View File

@@ -143,6 +143,7 @@ Directory Hierarchy:
/nios2 Files generic to Altera NIOS2 architecture
/openrisc Files generic to OpenRISC architecture
/powerpc Files generic to PowerPC architecture
/riscv Files generic to RISC-V architecture
/sandbox Files generic to HW-independent "sandbox"
/sh Files generic to SH architecture
/x86 Files generic to x86 architecture
@@ -712,22 +713,6 @@ The following options need to be configured:
as a convenience, when switching between booting from
RAM and NFS.
- Bootcount:
CONFIG_BOOTCOUNT_LIMIT
Implements a mechanism for detecting a repeating reboot
cycle, see:
http://www.denx.de/wiki/view/DULG/UBootBootCountLimit
CONFIG_BOOTCOUNT_ENV
If no softreset save registers are found on the hardware
"bootcount" is stored in the environment. To prevent a
saveenv on all reboots, the environment variable
"upgrade_available" is used. If "upgrade_available" is
0, "bootcount" is always 0, if "upgrade_available" is
1 "bootcount" is incremented in the environment.
So the Userspace Applikation must set the "upgrade_available"
and "bootcount" variable to 0, if a boot was successfully.
- Pre-Boot Commands:
CONFIG_PREBOOT
@@ -1202,7 +1187,7 @@ The following options need to be configured:
key for the Replay Protection Memory Block partition in eMMC.
- USB Device Firmware Update (DFU) class support:
CONFIG_USB_FUNCTION_DFU
CONFIG_DFU_OVER_USB
This enables the USB portion of the DFU USB class
CONFIG_DFU_MMC
@@ -1542,14 +1527,8 @@ The following options need to be configured:
You can fine tune the DHCP functionality by defining
CONFIG_BOOTP_* symbols:
CONFIG_BOOTP_SUBNETMASK
CONFIG_BOOTP_GATEWAY
CONFIG_BOOTP_HOSTNAME
CONFIG_BOOTP_NISDOMAIN
CONFIG_BOOTP_BOOTPATH
CONFIG_BOOTP_BOOTFILESIZE
CONFIG_BOOTP_DNS
CONFIG_BOOTP_DNS2
CONFIG_BOOTP_SEND_HOSTNAME
CONFIG_BOOTP_NTPSERVER
CONFIG_BOOTP_TIMEOFFSET
@@ -1565,15 +1544,6 @@ The following options need to be configured:
to Link-local IP address configuration if the DHCP server
is not available.
CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
serverip from a DHCP server, it is possible that more
than one DNS serverip is offered to the client.
If CONFIG_BOOTP_DNS2 is enabled, the secondary DNS
serverip will be stored in the additional environment
variable "dnsip2". The first DNS serverip is always
stored in the variable "dnsip", when CONFIG_BOOTP_DNS
is defined.
CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
to do a dynamic update of a DNS server. To do this, they
need the hostname of the DHCP requester.
@@ -2000,11 +1970,6 @@ The following options need to be configured:
SPI EEPROM, also an instance works with Crystal A/D and
D/As on the SACSng board)
CONFIG_SH_SPI
Enables the driver for SPI controller on SuperH. Currently
only SH7757 is supported.
CONFIG_SOFT_SPI
Enables a software (bit-bang) SPI driver rather than
@@ -2023,11 +1988,6 @@ The following options need to be configured:
Currently supported on some MPC8xxx processors. For an
example, see include/configs/mpc8349emds.h.
CONFIG_MXC_SPI
Enables the driver for the SPI controllers on i.MX and MXC
SoCs. Currently i.MX31/35/51 are supported.
CONFIG_SYS_SPI_MXC_WAIT
Timeout for waiting until spi transfer completed.
default: (CONFIG_SYS_HZ/100) /* 10 ms */
@@ -2196,10 +2156,6 @@ The following options need to be configured:
#define CONFIG_NFS_TIMEOUT 10000UL
- Command Interpreter:
CONFIG_AUTO_COMPLETE
Enable auto completion of commands using TAB.
CONFIG_SYS_PROMPT_HUSH_PS2
This defines the secondary prompt string, which is
@@ -2228,12 +2184,6 @@ The following options need to be configured:
symbols.
- Command Line Editing and History:
CONFIG_CMDLINE_EDITING
Enable editing and History functions for interactive
command line input operations
- Command Line PS1/PS2 support:
CONFIG_CMDLINE_PS_SUPPORT
Enable support for changing the command prompt string
@@ -2267,20 +2217,6 @@ The following options need to be configured:
the environment like the "source" command or the
boot command first.
CONFIG_ENV_VARS_UBOOT_CONFIG
Define this in order to add variables describing the
U-Boot build configuration to the default environment.
These will be named arch, cpu, board, vendor, and soc.
Enabling this option will cause the following to be defined:
- CONFIG_SYS_ARCH
- CONFIG_SYS_CPU
- CONFIG_SYS_BOARD
- CONFIG_SYS_VENDOR
- CONFIG_SYS_SOC
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
Define this in order to add variables describing certain
@@ -2310,18 +2246,6 @@ The following options need to be configured:
CONFIG_SF_DEFAULT_MODE (see include/spi.h)
CONFIG_SF_DEFAULT_SPEED in Hz
CONFIG_SYSTEMACE
Adding this option adds support for Xilinx SystemACE
chips attached via some sort of local bus. The address
of the chip must also be defined in the
CONFIG_SYS_SYSTEMACE_BASE macro. For example:
#define CONFIG_SYSTEMACE
#define CONFIG_SYS_SYSTEMACE_BASE 0xf0000000
When SystemACE support is added, the "ace" device type
becomes available to the fat commands, i.e. fatls.
- TFTP Fixed UDP Port:
CONFIG_TFTP_PORT
@@ -2343,32 +2267,6 @@ The following options need to be configured:
A better solution is to properly configure the firewall,
but sometimes that is not allowed.
- bootcount support:
CONFIG_BOOTCOUNT_LIMIT
This enables the bootcounter support, see:
http://www.denx.de/wiki/DULG/UBootBootCountLimit
CONFIG_AT91SAM9XE
enable special bootcounter support on at91sam9xe based boards.
CONFIG_SOC_DA8XX
enable special bootcounter support on da850 based boards.
CONFIG_BOOTCOUNT_RAM
enable support for the bootcounter in RAM
CONFIG_BOOTCOUNT_I2C
enable support for the bootcounter on an i2c (like RTC) device.
CONFIG_SYS_I2C_RTC_ADDR = i2c chip address
CONFIG_SYS_BOOTCOUNT_ADDR = i2c addr which is used for
the bootcounter.
CONFIG_BOOTCOUNT_ALEN = address len
CONFIG_BOOTCOUNT_EXT
enable support for the bootcounter in EXT filesystem
CONFIG_SYS_BOOTCOUNT_ADDR = RAM address used for read
and write.
CONFIG_SYS_BOOTCOUNT_EXT_INTERFACE = interface
CONFIG_SYS_BOOTCOUNT_EXT_DEVPART = device and part
CONFIG_SYS_BOOTCOUNT_EXT_NAME = filename
- Show boot progress:
CONFIG_SHOW_BOOT_PROGRESS
@@ -2725,11 +2623,6 @@ FIT uImage format:
CONFIG_SYS_SPL_MALLOC_SIZE
The size of the malloc pool used in SPL.
CONFIG_SPL_FRAMEWORK
Enable the SPL framework under common/. This framework
supports MMC, NAND and YMODEM loading of U-Boot and NAND
NAND loading of the Linux Kernel.
CONFIG_SPL_OS_BOOT
Enable booting directly to an OS from SPL.
See also: doc/README.falcon
@@ -3510,7 +3403,7 @@ Low Level (hardware related) configuration options:
globally (CONFIG_CMD_MEMORY).
- CONFIG_SKIP_LOWLEVEL_INIT
[ARM, NDS32, MIPS only] If this variable is defined, then certain
[ARM, NDS32, MIPS, RISC-V only] If this variable is defined, then certain
low level initializations (like setting up the memory
controller) are omitted and/or U-Boot does not
relocate itself into RAM.
@@ -3718,6 +3611,11 @@ this behavior and build U-Boot to some external directory:
Note that the command line "O=" setting overrides the KBUILD_OUTPUT environment
variable.
User specific CPPFLAGS, AFLAGS and CFLAGS can be passed to the compiler by
setting the according environment variables KCPPFLAGS, KAFLAGS and KCFLAGS.
For example to treat all compiler warnings as errors:
make KCFLAGS=-Werror
Please be aware that the Makefiles assume you are using GNU make, so
for instance on NetBSD you might need to use "gmake" instead of
@@ -4964,6 +4862,22 @@ On NDS32, the following registers are used:
NOTE: DECLARE_GLOBAL_DATA_PTR must be used with file-global scope,
or current versions of GCC may "optimize" the code too much.
On RISC-V, the following registers are used:
x0: hard-wired zero (zero)
x1: return address (ra)
x2: stack pointer (sp)
x3: global pointer (gp)
x4: thread pointer (tp)
x5: link register (t0)
x8: frame pointer (fp)
x10-x11: arguments/return values (a0-1)
x12-x17: arguments (a2-7)
x28-31: temporaries (t3-6)
pc: program counter (pc)
==> U-Boot will use gp to hold a pointer to the global data
Memory Management:
------------------

View File

@@ -26,6 +26,8 @@ config ARM
config M68K
bool "M68000 architecture"
select HAVE_PRIVATE_LIBGCC
select SYS_BOOT_GET_CMDLINE
select SYS_BOOT_GET_KBD
config MICROBLAZE
bool "MicroBlaze architecture"
@@ -53,6 +55,12 @@ config PPC
bool "PowerPC architecture"
select HAVE_PRIVATE_LIBGCC
select SUPPORT_OF_CONTROL
select SYS_BOOT_GET_CMDLINE
select SYS_BOOT_GET_KBD
config RISCV
bool "riscv architecture"
select SUPPORT_OF_CONTROL
config SANDBOX
bool "Sandbox"
@@ -66,6 +74,7 @@ config SANDBOX
select DM_SPI
select DM_GPIO
select DM_MMC
select HAVE_BLOCK_DEVICE
select LZO
imply CMD_GETTIME
imply CMD_HASH
@@ -194,3 +203,4 @@ source "arch/sandbox/Kconfig"
source "arch/sh/Kconfig"
source "arch/x86/Kconfig"
source "arch/xtensa/Kconfig"
source "arch/riscv/Kconfig"

View File

@@ -50,7 +50,7 @@ ifdef CONFIG_CPU_ARCHS38
PLATFORM_CPPFLAGS += -mcpu=archs
endif
PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2
PLATFORM_CPPFLAGS += -ffixed-r25 -D__ARC__ -gdwarf-2 -mno-sdata
# Needed for relocation
LDFLAGS_FINAL += -pie

View File

@@ -24,6 +24,12 @@
};
};
cgu_clk: cgu-clk@f0000000 {
compatible = "snps,hsdk-cgu-clock";
reg = <0xf0000000 0x10>, <0xf00014B8 0x4>;
#clock-cells = <1>;
};
uart0: serial0@f0005000 {
compatible = "snps,dw-apb-uart";
reg = <0xf0005000 0x1000>;

View File

@@ -63,8 +63,15 @@
#define ARC_AUX_SLC_INVALIDATE 0x905
#define ARC_AUX_SLC_IVDL 0x910
#define ARC_AUX_SLC_FLDL 0x912
#define ARC_AUX_SLC_RGN_START 0x914
#define ARC_AUX_SLC_RGN_START1 0x915
#define ARC_AUX_SLC_RGN_END 0x916
#define ARC_AUX_SLC_RGN_END1 0x917
#define ARC_BCR_CLUSTER 0xcf
/* MMU Management regs */
#define ARC_AUX_MMU_BCR 0x06f
/* IO coherency related auxiliary registers */
#define ARC_AUX_IO_COH_ENABLE 0x500
#define ARC_AUX_IO_COH_PARTIAL 0x501

View File

@@ -37,11 +37,6 @@ void arch_lmb_reserve(struct lmb *lmb)
lmb_reserve(lmb, sp, (CONFIG_SYS_SDRAM_BASE + gd->ram_size - sp));
}
int arch_fixup_fdt(void *blob)
{
return 0;
}
static int cleanup_before_linux(void)
{
disable_interrupts();

View File

@@ -13,19 +13,24 @@
#include <asm/cache.h>
/* Bit values in IC_CTRL */
#define IC_CTRL_CACHE_DISABLE (1 << 0)
#define IC_CTRL_CACHE_DISABLE BIT(0)
/* Bit values in DC_CTRL */
#define DC_CTRL_CACHE_DISABLE (1 << 0)
#define DC_CTRL_INV_MODE_FLUSH (1 << 6)
#define DC_CTRL_FLUSH_STATUS (1 << 8)
#define DC_CTRL_CACHE_DISABLE BIT(0)
#define DC_CTRL_INV_MODE_FLUSH BIT(6)
#define DC_CTRL_FLUSH_STATUS BIT(8)
#define CACHE_VER_NUM_MASK 0xF
#define SLC_CTRL_SB (1 << 2)
#define OP_INV 0x1
#define OP_FLUSH 0x2
#define OP_INV_IC 0x3
/* Bit val in SLC_CONTROL */
#define SLC_CTRL_DIS 0x001
#define SLC_CTRL_IM 0x040
#define SLC_CTRL_BUSY 0x100
#define SLC_CTRL_RGN_OP_INV 0x200
/*
* By default that variable will fall into .bss section.
* But .bss section is not relocated and so it will be initilized before
@@ -41,88 +46,118 @@ bool icache_exists __section(".data") = false;
int slc_line_sz __section(".data");
bool slc_exists __section(".data") = false;
bool ioc_exists __section(".data") = false;
bool pae_exists __section(".data") = false;
static unsigned int __before_slc_op(const int op)
/* To force enable IOC set ioc_enable to 'true' */
bool ioc_enable __section(".data") = false;
void read_decode_mmu_bcr(void)
{
unsigned int reg = reg;
/* TODO: should we compare mmu version from BCR and from CONFIG? */
#if (CONFIG_ARC_MMU_VER >= 4)
u32 tmp;
if (op == OP_INV) {
/*
* IM is set by default and implies Flush-n-inv
* Clear it here for vanilla inv
*/
reg = read_aux_reg(ARC_AUX_SLC_CTRL);
write_aux_reg(ARC_AUX_SLC_CTRL, reg & ~DC_CTRL_INV_MODE_FLUSH);
}
tmp = read_aux_reg(ARC_AUX_MMU_BCR);
return reg;
}
static void __after_slc_op(const int op, unsigned int reg)
{
if (op & OP_FLUSH) { /* flush / flush-n-inv both wait */
/*
* Make sure "busy" bit reports correct status,
* see STAR 9001165532
*/
read_aux_reg(ARC_AUX_SLC_CTRL);
while (read_aux_reg(ARC_AUX_SLC_CTRL) &
DC_CTRL_FLUSH_STATUS)
;
}
/* Switch back to default Invalidate mode */
if (op == OP_INV)
write_aux_reg(ARC_AUX_SLC_CTRL, reg | DC_CTRL_INV_MODE_FLUSH);
}
static inline void __slc_line_loop(unsigned long paddr, unsigned long sz,
const int op)
{
unsigned int aux_cmd;
int num_lines;
#define SLC_LINE_MASK (~(slc_line_sz - 1))
aux_cmd = op & OP_INV ? ARC_AUX_SLC_IVDL : ARC_AUX_SLC_FLDL;
sz += paddr & ~SLC_LINE_MASK;
paddr &= SLC_LINE_MASK;
num_lines = DIV_ROUND_UP(sz, slc_line_sz);
while (num_lines-- > 0) {
write_aux_reg(aux_cmd, paddr);
paddr += slc_line_sz;
}
}
static inline void __slc_entire_op(const int cacheop)
{
int aux;
unsigned int ctrl_reg = __before_slc_op(cacheop);
if (cacheop & OP_INV) /* Inv or flush-n-inv use same cmd reg */
aux = ARC_AUX_SLC_INVALIDATE;
else
aux = ARC_AUX_SLC_FLUSH;
write_aux_reg(aux, 0x1);
__after_slc_op(cacheop, ctrl_reg);
}
static inline void __slc_line_op(unsigned long paddr, unsigned long sz,
const int cacheop)
{
unsigned int ctrl_reg = __before_slc_op(cacheop);
__slc_line_loop(paddr, sz, cacheop);
__after_slc_op(cacheop, ctrl_reg);
}
struct bcr_mmu_4 {
#ifdef CONFIG_CPU_BIG_ENDIAN
unsigned int ver:8, sasid:1, sz1:4, sz0:4, res:2, pae:1,
n_ways:2, n_entry:2, n_super:2, u_itlb:3, u_dtlb:3;
#else
#define __slc_entire_op(cacheop)
#define __slc_line_op(paddr, sz, cacheop)
#endif
/* DTLB ITLB JES JE JA */
unsigned int u_dtlb:3, u_itlb:3, n_super:2, n_entry:2, n_ways:2,
pae:1, res:2, sz0:4, sz1:4, sasid:1, ver:8;
#endif /* CONFIG_CPU_BIG_ENDIAN */
} *mmu4;
mmu4 = (struct bcr_mmu_4 *)&tmp;
pae_exists = !!mmu4->pae;
#endif /* (CONFIG_ARC_MMU_VER >= 4) */
}
static void __slc_entire_op(const int op)
{
unsigned int ctrl;
ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
if (!(op & OP_FLUSH)) /* i.e. OP_INV */
ctrl &= ~SLC_CTRL_IM; /* clear IM: Disable flush before Inv */
else
ctrl |= SLC_CTRL_IM;
write_aux_reg(ARC_AUX_SLC_CTRL, ctrl);
if (op & OP_INV) /* Inv or flush-n-inv use same cmd reg */
write_aux_reg(ARC_AUX_SLC_INVALIDATE, 0x1);
else
write_aux_reg(ARC_AUX_SLC_FLUSH, 0x1);
/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
read_aux_reg(ARC_AUX_SLC_CTRL);
/* Important to wait for flush to complete */
while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY);
}
static void slc_upper_region_init(void)
{
/*
* ARC_AUX_SLC_RGN_END1 and ARC_AUX_SLC_RGN_START1 are always == 0
* as we don't use PAE40.
*/
write_aux_reg(ARC_AUX_SLC_RGN_END1, 0);
write_aux_reg(ARC_AUX_SLC_RGN_START1, 0);
}
static void __slc_rgn_op(unsigned long paddr, unsigned long sz, const int op)
{
unsigned int ctrl;
unsigned long end;
/*
* The Region Flush operation is specified by CTRL.RGN_OP[11..9]
* - b'000 (default) is Flush,
* - b'001 is Invalidate if CTRL.IM == 0
* - b'001 is Flush-n-Invalidate if CTRL.IM == 1
*/
ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
/* Don't rely on default value of IM bit */
if (!(op & OP_FLUSH)) /* i.e. OP_INV */
ctrl &= ~SLC_CTRL_IM; /* clear IM: Disable flush before Inv */
else
ctrl |= SLC_CTRL_IM;
if (op & OP_INV)
ctrl |= SLC_CTRL_RGN_OP_INV; /* Inv or flush-n-inv */
else
ctrl &= ~SLC_CTRL_RGN_OP_INV;
write_aux_reg(ARC_AUX_SLC_CTRL, ctrl);
/*
* Lower bits are ignored, no need to clip
* END needs to be setup before START (latter triggers the operation)
* END can't be same as START, so add (l2_line_sz - 1) to sz
*/
end = paddr + sz + slc_line_sz - 1;
/*
* Upper addresses (ARC_AUX_SLC_RGN_END1 and ARC_AUX_SLC_RGN_START1)
* are always == 0 as we don't use PAE40, so we only setup lower ones
* (ARC_AUX_SLC_RGN_END and ARC_AUX_SLC_RGN_START)
*/
write_aux_reg(ARC_AUX_SLC_RGN_END, end);
write_aux_reg(ARC_AUX_SLC_RGN_START, paddr);
/* Make sure "busy" bit reports correct stataus, see STAR 9001165532 */
read_aux_reg(ARC_AUX_SLC_CTRL);
while (read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_BUSY);
}
#endif /* CONFIG_ISA_ARCV2 */
#ifdef CONFIG_ISA_ARCV2
static void read_decode_cache_bcr_arcv2(void)
@@ -168,7 +203,7 @@ static void read_decode_cache_bcr_arcv2(void)
} cbcr;
cbcr.word = read_aux_reg(ARC_BCR_CLUSTER);
if (cbcr.fields.c)
if (cbcr.fields.c && ioc_enable)
ioc_exists = true;
}
#endif
@@ -197,7 +232,7 @@ void read_decode_cache_bcr(void)
}
dbcr.word = read_aux_reg(ARC_BCR_DC_BUILD);
if (dbcr.fields.ver){
if (dbcr.fields.ver) {
dcache_exists = true;
l1_line_sz = dc_line_sz = 16 << dbcr.fields.line_len;
if (!dc_line_sz)
@@ -232,8 +267,7 @@ void cache_init(void)
* so setting 0x11 implies 512M, 0x12 implies 1G...
*/
write_aux_reg(ARC_AUX_IO_COH_AP0_SIZE,
order_base_2(ap_size/1024) - 2);
order_base_2(ap_size / 1024) - 2);
/* IOC Aperture start must be aligned to the size of the aperture */
if (ap_base % ap_size != 0)
@@ -242,9 +276,18 @@ void cache_init(void)
write_aux_reg(ARC_AUX_IO_COH_AP0_BASE, ap_base >> 12);
write_aux_reg(ARC_AUX_IO_COH_PARTIAL, 1);
write_aux_reg(ARC_AUX_IO_COH_ENABLE, 1);
}
#endif
read_decode_mmu_bcr();
/*
* ARC_AUX_SLC_RGN_START1 and ARC_AUX_SLC_RGN_END1 register exist
* only if PAE exists in current HW. So we had to check pae_exist
* before using them.
*/
if (slc_exists && pae_exists)
slc_upper_region_init();
#endif /* CONFIG_ISA_ARCV2 */
}
int icache_status(void)
@@ -272,7 +315,6 @@ void icache_disable(void)
IC_CTRL_CACHE_DISABLE);
}
#ifndef CONFIG_SYS_DCACHE_OFF
void invalidate_icache_all(void)
{
/* Any write to IC_IVIC register triggers invalidation of entire I$ */
@@ -287,12 +329,12 @@ void invalidate_icache_all(void)
__builtin_arc_nop();
read_aux_reg(ARC_AUX_IC_CTRL); /* blocks */
}
}
#else
void invalidate_icache_all(void)
{
}
#ifdef CONFIG_ISA_ARCV2
if (slc_exists)
__slc_entire_op(OP_INV);
#endif
}
int dcache_status(void)
{
@@ -382,8 +424,7 @@ static unsigned int __before_dc_op(const int op)
static void __after_dc_op(const int op, unsigned int reg)
{
if (op & OP_FLUSH) /* flush / flush-n-inv both wait */
while (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_FLUSH_STATUS)
;
while (read_aux_reg(ARC_AUX_DC_CTRL) & DC_CTRL_FLUSH_STATUS);
/* Switch back to default Invalidate mode */
if (op == OP_INV)
@@ -409,6 +450,7 @@ static inline void __dc_line_op(unsigned long paddr, unsigned long sz,
const int cacheop)
{
unsigned int ctrl_reg = __before_dc_op(cacheop);
__cache_line_loop(paddr, sz, cacheop);
__after_dc_op(cacheop, ctrl_reg);
}
@@ -419,6 +461,9 @@ static inline void __dc_line_op(unsigned long paddr, unsigned long sz,
void invalidate_dcache_range(unsigned long start, unsigned long end)
{
if (start >= end)
return;
#ifdef CONFIG_ISA_ARCV2
if (!ioc_exists)
#endif
@@ -426,12 +471,15 @@ void invalidate_dcache_range(unsigned long start, unsigned long end)
#ifdef CONFIG_ISA_ARCV2
if (slc_exists && !ioc_exists)
__slc_line_op(start, end - start, OP_INV);
__slc_rgn_op(start, end - start, OP_INV);
#endif
}
void flush_dcache_range(unsigned long start, unsigned long end)
{
if (start >= end)
return;
#ifdef CONFIG_ISA_ARCV2
if (!ioc_exists)
#endif
@@ -439,7 +487,7 @@ void flush_dcache_range(unsigned long start, unsigned long end)
#ifdef CONFIG_ISA_ARCV2
if (slc_exists && !ioc_exists)
__slc_line_op(start, end - start, OP_FLUSH);
__slc_rgn_op(start, end - start, OP_FLUSH);
#endif
}

View File

@@ -44,6 +44,14 @@ ENTRY(_start)
#endif
sr r5, [ARC_AUX_IC_CTRL]
mov r5, 1
sr r5, [ARC_AUX_IC_IVIC]
; As per ARC HS databook (see chapter 5.3.3.2)
; it is required to add 3 NOPs after each write to IC_IVIC.
nop
nop
nop
1:
; Disable/enable D-cache according to configuration
lr r5, [ARC_BCR_DC_BUILD]
@@ -57,6 +65,10 @@ ENTRY(_start)
#endif
sr r5, [ARC_AUX_DC_CTRL]
mov r5, 1
sr r5, [ARC_AUX_DC_IVDC]
1:
#ifdef CONFIG_ISA_ARCV2
; Disable System-Level Cache (SLC)

View File

@@ -19,6 +19,36 @@ config POSITION_INDEPENDENT
from almost any address. This logic relies on the relocation
information that is embedded into the binary to support U-Boot
relocating itself to the top-of-RAM later during execution.
config SYS_INIT_SP_BSS_OFFSET
int
help
U-Boot typically uses a hard-coded value for the stack pointer
before relocation. Define this option to instead calculate the
initial SP at run-time. This is useful to avoid hard-coding addresses
into U-Boot, so that can be loaded and executed at arbitrary
addresses and thus avoid using arbitrary addresses at runtime. This
option's value is the offset added to &_bss_start in order to
calculate the stack pointer. This offset should be large enough so
that the early malloc region, global data (gd), and early stack usage
do not overlap any appended DTB.
config LINUX_KERNEL_IMAGE_HEADER
bool
help
Place a Linux kernel image header at the start of the U-Boot binary.
The format of the header is described in the Linux kernel source at
Documentation/arm64/booting.txt. This feature is useful since the
image header reports the amount of memory (BSS and similar) that
U-Boot needs to use, but which isn't part of the binary.
if LINUX_KERNEL_IMAGE_HEADER
config LNX_KRNL_IMG_TEXT_OFFSET_BASE
hex
help
The value subtracted from CONFIG_SYS_TEXT_BASE to calculate the
TEXT_OFFSET value written in to the Linux kernel image header.
endif
endif
config STATIC_RELA
@@ -122,6 +152,9 @@ config ARM_ERRATA_852421
config ARM_ERRATA_852423
bool
config ARM_ERRATA_855873
bool
config CPU_ARM720T
bool
select SYS_CACHE_SHIFT_5
@@ -254,9 +287,8 @@ config ENABLE_ARM_SOC_BOOT0_HOOK
bool "prepare BOOT0 header"
help
If the SoC's BOOT0 requires a header area filled with (magic)
values, then choose this option, and create a define called
ARM_SOC_BOOT0_HOOK which contains the required assembler
preprocessor code.
values, then choose this option, and create a file included as
<asm/arch/boot0.h> which contains the required assembler code.
config ARM_CORTEX_CPU_IS_UP
bool
@@ -315,6 +347,7 @@ config ARCH_AT91
config TARGET_EDB93XX
bool "Support edb93xx"
select CPU_ARM920T
select PL010_SERIAL
config TARGET_ASPENITE
bool "Support aspenite"
@@ -362,54 +395,6 @@ config TARGET_APF27
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_APX4DEVKIT
bool "Support apx4devkit"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_XFI3
bool "Support xfi3"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_M28EVK
bool "Support m28evk"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_MX23EVK
bool "Support mx23evk"
select CPU_ARM926EJS
select SUPPORT_SPL
select BOARD_EARLY_INIT_F
config TARGET_MX28EVK
bool "Support mx28evk"
select CPU_ARM926EJS
select SUPPORT_SPL
select BOARD_EARLY_INIT_F
config TARGET_MX23_OLINUXINO
bool "Support mx23_olinuxino"
select CPU_ARM926EJS
select SUPPORT_SPL
select BOARD_EARLY_INIT_F
config TARGET_BG0900
bool "Support bg0900"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_SANSA_FUZE_PLUS
bool "Support sansa_fuze_plus"
select CPU_ARM926EJS
select SUPPORT_SPL
config TARGET_SC_SPS_1
bool "Support sc_sps_1"
select CPU_ARM926EJS
select SUPPORT_SPL
config ORION5X
bool "Marvell Orion"
select CPU_ARM926EJS
@@ -419,24 +404,28 @@ config TARGET_SPEAR300
select CPU_ARM926EJS
select BOARD_EARLY_INIT_F
imply CMD_SAVES
select PL011_SERIAL
config TARGET_SPEAR310
bool "Support spear310"
select CPU_ARM926EJS
select BOARD_EARLY_INIT_F
imply CMD_SAVES
select PL011_SERIAL
config TARGET_SPEAR320
bool "Support spear320"
select CPU_ARM926EJS
select BOARD_EARLY_INIT_F
imply CMD_SAVES
select PL011_SERIAL
config TARGET_SPEAR600
bool "Support spear600"
select CPU_ARM926EJS
select BOARD_EARLY_INIT_F
imply CMD_SAVES
select PL011_SERIAL
config TARGET_STV0991
bool "Support stv0991"
@@ -446,12 +435,14 @@ config TARGET_STV0991
select DM_SPI
select DM_SPI_FLASH
select SPI_FLASH
select PL01X_SERIAL
config TARGET_X600
bool "Support x600"
select BOARD_LATE_INIT
select CPU_ARM926EJS
select SUPPORT_SPL
select PL011_SERIAL
config TARGET_IMX31_PHYCORE
bool "Support imx31_phycore_eet"
@@ -500,6 +491,8 @@ config ARCH_BCM283X
select DM_SERIAL
select DM_GPIO
select OF_CONTROL
select PL01X_SERIAL
select SERIAL_SEARCH_ALL
imply FAT_WRITE
config TARGET_VEXPRESS_CA15_TC2
@@ -507,14 +500,17 @@ config TARGET_VEXPRESS_CA15_TC2
select CPU_V7
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select PL011_SERIAL
config TARGET_VEXPRESS_CA5X2
bool "Support vexpress_ca5x2"
select CPU_V7
select PL011_SERIAL
config TARGET_VEXPRESS_CA9X4
bool "Support vexpress_ca9x4"
select CPU_V7
select PL011_SERIAL
config TARGET_BCM23550_W1D
bool "Support bcm23550_w1d"
@@ -573,11 +569,13 @@ config ARCH_S5PC1XX
config ARCH_HIGHBANK
bool "Calxeda Highbank"
select CPU_V7
select PL011_SERIAL
config ARCH_INTEGRATOR
bool "ARM Ltd. Integrator family"
select DM
select DM_SERIAL
select PL01X_SERIAL
config ARCH_KEYSTONE
bool "TI Keystone"
@@ -604,14 +602,34 @@ config ARCH_MESON
targeted at media players and tablet computers. We currently
support the S905 (GXBaby) 64-bit SoC.
config ARCH_MX8M
bool "NXP i.MX8M platform"
select ARM64
select DM
select SUPPORT_SPL
config ARCH_MX23
bool "NXP i.MX23 family"
select CPU_ARM926EJS
select PL011_SERIAL
select SUPPORT_SPL
config ARCH_MX25
bool "NXP MX25"
select CPU_ARM926EJS
imply MXC_GPIO
config ARCH_MX28
bool "NXP i.MX28 family"
select CPU_ARM926EJS
select PL011_SERIAL
select SUPPORT_SPL
config ARCH_MX7ULP
bool "NXP MX7ULP"
select CPU_V7
select ROM_UNIFIED_SECTIONS
imply MXC_GPIO
config ARCH_MX7
bool "Freescale MX7"
@@ -621,6 +639,7 @@ config ARCH_MX7
select SYS_FSL_SEC_LE
select BOARD_EARLY_INIT_F
select ARCH_MISC_INIT
imply MXC_GPIO
config ARCH_MX6
bool "Freescale MX6"
@@ -629,6 +648,7 @@ config ARCH_MX6
select SYS_FSL_SEC_COMPAT_4
select SYS_FSL_SEC_LE
select SYS_THUMB_BUILD if SPL
imply MXC_GPIO
if ARCH_MX6
config SPL_LDSCRIPT
@@ -639,14 +659,14 @@ config ARCH_MX5
bool "Freescale MX5"
select CPU_V7
select BOARD_EARLY_INIT_F
imply MXC_GPIO
config ARCH_QEMU
bool "QEMU Virtual Platform"
select CPU_V7
select ARCH_SUPPORT_PSCI
select DM
select DM_SERIAL
select OF_CONTROL
select PL01X_SERIAL
config ARCH_RMOBILE
bool "Renesas ARM SoCs"
@@ -678,16 +698,17 @@ config ARCH_SOCFPGA
select OF_CONTROL
select SPL_OF_CONTROL
select DM
select DM_SPI_FLASH
select DM_SPI
select ENABLE_ARM_SOC_BOOT0_HOOK
select ARCH_EARLY_INIT_R
select ARCH_MISC_INIT
select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
select SYS_THUMB_BUILD
imply CMD_MTDPARTS
imply CRC32_VERIFY
imply DM_SPI
imply DM_SPI_FLASH
imply FAT_WRITE
imply HW_WATCHDOG
imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
config ARCH_SUNXI
bool "Support sunxi (Allwinner) SoCs"
@@ -715,6 +736,7 @@ config ARCH_SUNXI
select USE_TINY_PRINTF
imply CMD_GPT
imply FAT_WRITE
imply OF_LIBFDT_OVERLAY
imply PRE_CONSOLE_BUFFER
imply SPL_GPIO_SUPPORT
imply SPL_LIBCOMMON_SUPPORT
@@ -725,11 +747,6 @@ config ARCH_SUNXI
imply SPL_SERIAL_SUPPORT
imply USB_GADGET
config TARGET_TS4600
bool "Support TS4600"
select CPU_ARM926EJS
select SUPPORT_SPL
config ARCH_VF610
bool "Freescale Vybrid"
select CPU_V7
@@ -746,18 +763,16 @@ config ARCH_ZYNQ
select SPL_BOARD_INIT if SPL
select SPL_OF_CONTROL if SPL
select DM
select DM_ETH
select DM_GPIO
select DM_ETH if NET
select SPL_DM if SPL
select DM_MMC
select DM_MMC if MMC
select DM_SPI
select DM_SERIAL
select DM_SPI_FLASH
select SPL_SEPARATE_BSS if SPL
select DM_USB if USB
select BLK
select CLK
select SPL_CLK
select SPL_CLK if SPL
select CLK_ZYNQ
imply CMD_CLK
imply FAT_WRITE
@@ -784,15 +799,18 @@ config TEGRA
config TARGET_VEXPRESS64_AEMV8A
bool "Support vexpress_aemv8a"
select ARM64
select PL01X_SERIAL
config TARGET_VEXPRESS64_BASE_FVP
bool "Support Versatile Express ARMv8a FVP BASE model"
select ARM64
select SEMIHOSTING
select PL01X_SERIAL
config TARGET_VEXPRESS64_BASE_FVP_DRAM
bool "Support Versatile Express ARMv8a FVP BASE model booting from DRAM"
select ARM64
select PL01X_SERIAL
help
This target is derived from TARGET_VEXPRESS64_BASE_FVP and over-rides
the default config to allow the user to load the images directly into
@@ -802,6 +820,7 @@ config TARGET_VEXPRESS64_BASE_FVP_DRAM
config TARGET_VEXPRESS64_JUNO
bool "Support Versatile Express Juno Development Platform"
select ARM64
select PL01X_SERIAL
config TARGET_LS2080A_EMU
bool "Support ls2080a_emu"
@@ -894,6 +913,7 @@ config TARGET_HIKEY
select DM_GPIO
select DM_SERIAL
select OF_CONTROL
select PL01X_SERIAL
help
Support for HiKey 96boards platform. It features a HI6220
SoC, with 8xA53 CPU, mali450 gpu, and 1GB RAM.
@@ -905,6 +925,7 @@ config TARGET_POPLAR
select OF_CONTROL
select DM_SERIAL
select DM_USB
select PL01X_SERIAL
help
Support for Poplar 96boards EE platform. It features a HI3798cv200
SoC, with 4xA53 CPU, 1GB RAM and the high performance Mali T720 GPU
@@ -935,6 +956,18 @@ config TARGET_LS1012ARDB
development platform that supports the QorIQ LS1012A
Layerscape Architecture processor.
config TARGET_LS1012A2G5RDB
bool "Support ls1012a2g5rdb"
select ARCH_LS1012A
select ARM64
select BOARD_LATE_INIT
imply SCSI
help
Support for Freescale LS1012A2G5RDB platform.
The LS1012A 2G5 Reference design board (RDB) is a high-performance
development platform that supports the QorIQ LS1012A
Layerscape Architecture processor.
config TARGET_LS1012AFRDM
bool "Support ls1012afrdm"
select ARCH_LS1012A
@@ -1148,6 +1181,7 @@ config TARGET_THUNDERX_88XX
select ARM64
select OF_CONTROL
select SYS_CACHE_SHIFT_7
select PL01X_SERIAL
config ARCH_ASPEED
bool "Support Aspeed SoCs"
@@ -1156,6 +1190,16 @@ config ARCH_ASPEED
endchoice
config TI_SECURE_DEVICE
bool "HS Device Type Support"
depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS
help
If a high secure (HS) device type is being used, this config
must be set. This option impacts various aspects of the
build system (to create signed boot images that can be
authenticated) and the code. See the doc/README.ti-secure
file for further details.
source "arch/arm/mach-aspeed/Kconfig"
source "arch/arm/mach-at91/Kconfig"
@@ -1180,13 +1224,17 @@ source "arch/arm/cpu/armv7/ls102xa/Kconfig"
source "arch/arm/mach-imx/mx2/Kconfig"
source "arch/arm/mach-imx/mx7ulp/Kconfig"
source "arch/arm/mach-imx/mx7/Kconfig"
source "arch/arm/mach-imx/mx5/Kconfig"
source "arch/arm/mach-imx/mx6/Kconfig"
source "arch/arm/mach-imx/mx5/Kconfig"
source "arch/arm/mach-imx/mx7/Kconfig"
source "arch/arm/mach-imx/mx7ulp/Kconfig"
source "arch/arm/mach-imx/mx8m/Kconfig"
source "arch/arm/mach-imx/mxs/Kconfig"
source "arch/arm/mach-omap2/Kconfig"
@@ -1230,7 +1278,6 @@ source "arch/arm/cpu/armv8/Kconfig"
source "arch/arm/mach-imx/Kconfig"
source "board/aries/m28evk/Kconfig"
source "board/bosch/shc/Kconfig"
source "board/CarMediaLab/flea3/Kconfig"
source "board/Marvell/aspenite/Kconfig"
@@ -1238,7 +1285,6 @@ source "board/Marvell/gplugd/Kconfig"
source "board/armadeus/apf27/Kconfig"
source "board/armltd/vexpress/Kconfig"
source "board/armltd/vexpress64/Kconfig"
source "board/bluegiga/apx4devkit/Kconfig"
source "board/broadcom/bcm23550_w1d/Kconfig"
source "board/broadcom/bcm28155_ap/Kconfig"
source "board/broadcom/bcmcygnus/Kconfig"
@@ -1246,7 +1292,7 @@ source "board/broadcom/bcmnsp/Kconfig"
source "board/broadcom/bcmns2/Kconfig"
source "board/cavium/thunderx/Kconfig"
source "board/cirrus/edb93xx/Kconfig"
source "board/creative/xfi3/Kconfig"
source "board/eets/pdu001/Kconfig"
source "board/freescale/ls2080a/Kconfig"
source "board/freescale/ls2080aqds/Kconfig"
source "board/freescale/ls2080ardb/Kconfig"
@@ -1261,8 +1307,6 @@ source "board/freescale/ls1046ardb/Kconfig"
source "board/freescale/ls1012aqds/Kconfig"
source "board/freescale/ls1012ardb/Kconfig"
source "board/freescale/ls1012afrdm/Kconfig"
source "board/freescale/mx23evk/Kconfig"
source "board/freescale/mx28evk/Kconfig"
source "board/freescale/mx31ads/Kconfig"
source "board/freescale/mx31pdk/Kconfig"
source "board/freescale/mx35pdk/Kconfig"
@@ -1275,11 +1319,7 @@ source "board/hisilicon/hikey/Kconfig"
source "board/hisilicon/poplar/Kconfig"
source "board/imx31_phycore/Kconfig"
source "board/isee/igep003x/Kconfig"
source "board/olimex/mx23_olinuxino/Kconfig"
source "board/phytec/pcm051/Kconfig"
source "board/ppcag/bg0900/Kconfig"
source "board/sandisk/sansa_fuze_plus/Kconfig"
source "board/schulercontrol/sc_sps_1/Kconfig"
source "board/silica/pengwyn/Kconfig"
source "board/spear/spear300/Kconfig"
source "board/spear/spear310/Kconfig"
@@ -1291,7 +1331,6 @@ source "board/tcl/sl50/Kconfig"
source "board/birdland/bav335x/Kconfig"
source "board/timll/devkit3250/Kconfig"
source "board/toradex/colibri_pxa270/Kconfig"
source "board/technologic/ts4600/Kconfig"
source "board/vscom/baltos/Kconfig"
source "board/woodburn/Kconfig"
source "board/work-microwave/work_92105/Kconfig"
@@ -1302,7 +1341,7 @@ source "arch/arm/Kconfig.debug"
endmenu
config SPL_LDSCRIPT
default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if TARGET_APX4DEVKIT || TARGET_BG0900 || TARGET_M28EVK || TARGET_MX23_OLINUXINO || TARGET_MX23EVK || TARGET_MX28EVK || TARGET_SANSA_FUZE_PLUS || TARGET_SC_SPS_1 || TARGET_TS4600 || TARGET_XFI3
default "arch/arm/cpu/arm926ejs/mxs/u-boot-spl.lds" if ARCH_MX23 || ARCH_MX28
default "arch/arm/cpu/arm1136/u-boot-spl.lds" if CPU_ARM1136
default "arch/arm/cpu/armv8/u-boot-spl.lds" if ARM64

View File

@@ -95,11 +95,11 @@ libs-y += arch/arm/cpu/
libs-y += arch/arm/lib/
ifeq ($(CONFIG_SPL_BUILD),y)
ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_MX35)$(filter $(SOC), mx25 mx5 mx6 mx7 mx35))
ifneq (,$(CONFIG_MX23)$(CONFIG_MX28)$(CONFIG_MX35)$(filter $(SOC), mx25 mx5 mx6 mx7 mx35 mx8m))
libs-y += arch/arm/mach-imx/
endif
else
ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx7 mx7ulp mx31 mx35 mxs vf610))
ifneq (,$(filter $(SOC), mx25 mx27 mx5 mx6 mx7 mx7ulp mx31 mx35 mxs mx8m vf610))
libs-y += arch/arm/mach-imx/
endif
endif

View File

@@ -8,7 +8,4 @@
obj-y += generic.o
obj-y += timer.o
obj-y += devices.o
ifndef CONFIG_SPL_BUILD
obj-y += relocate.o
endif
obj-y += relocate.o

View File

@@ -10,7 +10,4 @@
obj-y += generic.o
obj-y += timer.o
obj-y += mx35_sdram.o
ifndef CONFIG_SPL_BUILD
obj-y += relocate.o
endif
obj-y += relocate.o

View File

@@ -524,24 +524,3 @@ u32 spl_boot_device(void)
return BOOT_DEVICE_NONE;
}
#ifdef CONFIG_SPL_BUILD
u32 spl_boot_mode(const u32 boot_device)
{
switch (spl_boot_device()) {
case BOOT_DEVICE_MMC1:
#ifdef CONFIG_SPL_FAT_SUPPORT
return MMCSD_MODE_FS;
#else
return MMCSD_MODE_RAW;
#endif
break;
case BOOT_DEVICE_NAND:
return 0;
break;
default:
puts("spl: ERROR: unsupported device\n");
hang();
}
}
#endif

View File

@@ -4,8 +4,4 @@
#
# SPDX-License-Identifier: GPL-2.0+
obj-y = generic.o timer.o reset.o
ifndef CONFIG_SPL_BUILD
obj-y += relocate.o
endif
obj-y += generic.o timer.o reset.o relocate.o

View File

@@ -4,8 +4,4 @@
#
# SPDX-License-Identifier: GPL-2.0+
obj-y = generic.o reset.o timer.o
ifndef CONFIG_SPL_BUILD
obj-y += relocate.o
endif
obj-y += generic.o timer.o reset.o relocate.o

View File

@@ -5,7 +5,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <asm/io.h>
#include <asm/processor.h>

View File

@@ -14,20 +14,3 @@ u32 spl_boot_device(void)
#endif
return BOOT_DEVICE_NAND;
}
u32 spl_boot_mode(const u32 boot_device)
{
switch (spl_boot_device()) {
case BOOT_DEVICE_MMC1:
#ifdef CONFIG_SPL_FAT_SUPPORT
return MMCSD_MODE_FS;
#else
return MMCSD_MODE_RAW;
#endif
case BOOT_DEVICE_NAND:
return 0;
default:
puts("spl: error: unsupported device\n");
hang();
}
}

View File

@@ -239,55 +239,47 @@ skip_errata_801819:
#endif
#ifdef CONFIG_ARM_ERRATA_454179
cmp r2, #0x21 @ Only on < r2p1
bge skip_errata_454179
mrc p15, 0, r0, c1, c0, 1 @ Read ACR
orr r0, r0, #(0x3 << 6) @ Set DBSM(BIT7) and IBE(BIT6) bits
cmp r2, #0x21 @ Only on < r2p1
orrlt r0, r0, #(0x3 << 6) @ Set DBSM(BIT7) and IBE(BIT6) bits
push {r1-r5} @ Save the cpu info registers
bl v7_arch_cp15_set_acr
pop {r1-r5} @ Restore the cpu info - fall through
skip_errata_454179:
#endif
#ifdef CONFIG_ARM_ERRATA_430973
cmp r2, #0x21 @ Only on < r2p1
bge skip_errata_430973
mrc p15, 0, r0, c1, c0, 1 @ Read ACR
orr r0, r0, #(0x1 << 6) @ Set IBE bit
cmp r2, #0x21 @ Only on < r2p1
orrlt r0, r0, #(0x1 << 6) @ Set IBE bit
push {r1-r5} @ Save the cpu info registers
bl v7_arch_cp15_set_acr
pop {r1-r5} @ Restore the cpu info - fall through
skip_errata_430973:
#endif
#ifdef CONFIG_ARM_ERRATA_621766
cmp r2, #0x21 @ Only on < r2p1
bge skip_errata_621766
mrc p15, 0, r0, c1, c0, 1 @ Read ACR
orr r0, r0, #(0x1 << 5) @ Set L1NEON bit
cmp r2, #0x21 @ Only on < r2p1
orrlt r0, r0, #(0x1 << 5) @ Set L1NEON bit
push {r1-r5} @ Save the cpu info registers
bl v7_arch_cp15_set_acr
pop {r1-r5} @ Restore the cpu info - fall through
skip_errata_621766:
#endif
#ifdef CONFIG_ARM_ERRATA_725233
cmp r2, #0x21 @ Only on < r2p1 (Cortex A8)
bge skip_errata_725233
mrc p15, 1, r0, c9, c0, 2 @ Read L2ACR
orr r0, r0, #(0x1 << 27) @ L2 PLD data forwarding disable
cmp r2, #0x21 @ Only on < r2p1 (Cortex A8)
orrlt r0, r0, #(0x1 << 27) @ L2 PLD data forwarding disable
push {r1-r5} @ Save the cpu info registers
bl v7_arch_cp15_set_l2aux_ctrl
pop {r1-r5} @ Restore the cpu info - fall through
skip_errata_725233:
#endif
#ifdef CONFIG_ARM_ERRATA_852421

View File

@@ -21,7 +21,7 @@
#include <linux/ctype.h>
#include <linux/types.h>
#include <asm/global_data.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <asm/armv7.h>
#include <asm/psci.h>

View File

@@ -85,11 +85,12 @@ endmenu
config PSCI_RESET
bool "Use PSCI for reset and shutdown"
default y
depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && !TARGET_LS2080A_EMU && \
depends on !ARCH_EXYNOS7 && !ARCH_BCM283X && \
!TARGET_LS2080A_SIMU && !TARGET_LS2080AQDS && \
!TARGET_LS2080ARDB && !TARGET_LS1012AQDS && \
!TARGET_LS2080ARDB && !TARGET_LS2080A_EMU && \
!TARGET_LS1088ARDB && !TARGET_LS1088AQDS && \
!TARGET_LS1012ARDB && !TARGET_LS1012AFRDM && \
!TARGET_LS1012A2G5RDB && !TARGET_LS1012AQDS && \
!TARGET_LS1043ARDB && !TARGET_LS1043AQDS && \
!TARGET_LS1046ARDB && !TARGET_LS1046AQDS && \
!TARGET_LS2081ARDB && \

View File

@@ -1,7 +1,10 @@
config ARCH_LS1012A
bool
select ARMV8_SET_SMPEN
select ARM_ERRATA_855873
select FSL_LSCH2
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR_BE
select SYS_FSL_MMDC
select SYS_FSL_ERRATUM_A010315
@@ -16,7 +19,10 @@ config ARCH_LS1012A
config ARCH_LS1043A
bool
select ARMV8_SET_SMPEN
select ARM_ERRATA_855873
select FSL_LSCH2
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR
select SYS_FSL_DDR_BE
select SYS_FSL_DDR_VER_50
@@ -43,6 +49,8 @@ config ARCH_LS1046A
bool
select ARMV8_SET_SMPEN
select FSL_LSCH2
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR
select SYS_FSL_DDR_BE
select SYS_FSL_DDR_VER_50
@@ -68,7 +76,10 @@ config ARCH_LS1046A
config ARCH_LS1088A
bool
select ARMV8_SET_SMPEN
select ARM_ERRATA_855873
select FSL_LSCH3
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR
select SYS_FSL_DDR_LE
select SYS_FSL_DDR_VER_50
@@ -102,6 +113,8 @@ config ARCH_LS2080A
select ARM_ERRATA_829520
select ARM_ERRATA_833471
select FSL_LSCH3
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
select SYS_FSL_DDR
select SYS_FSL_DDR_LE
select SYS_FSL_DDR_VER_50
@@ -139,13 +152,9 @@ config FSL_LSCH2
select SYS_FSL_HAS_SEC
select SYS_FSL_SEC_COMPAT_5
select SYS_FSL_SEC_BE
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
config FSL_LSCH3
bool
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
config FSL_MC_ENET
bool "Management Complex network"
@@ -493,8 +502,7 @@ config SYS_FSL_HAS_RGMII
config SYS_MC_RSV_MEM_ALIGN
hex "Management Complex reserved memory alignment"
depends on RESV_RAM
default 0x20000000 if ARCH_LS2080A
default 0x70000000 if ARCH_LS1088A
default 0x20000000 if ARCH_LS2080A || ARCH_LS1088A
help
Reserved memory needs to be aligned for MC to use. Default value
is 512MB.

View File

@@ -7,8 +7,10 @@
obj-y += cpu.o
obj-y += lowlevel.o
obj-y += soc.o
ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_MP) += mp.o
obj-$(CONFIG_OF_LIBFDT) += fdt.o
endif
obj-$(CONFIG_SPL) += spl.o
obj-$(CONFIG_$(SPL_)FSL_LS_PPA) += ppa.o

View File

@@ -30,6 +30,7 @@
#endif
#include <asm/arch/clock.h>
#include <hwconfig.h>
#include <fsl_qbman.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -564,6 +565,9 @@ int arch_early_init_r(void)
#endif
#ifdef CONFIG_FMAN_ENET
fman_enet_init();
#endif
#ifdef CONFIG_SYS_DPAA_QBMAN
setup_qbman_portals();
#endif
return 0;
}
@@ -574,7 +578,7 @@ int timer_init(void)
#ifdef CONFIG_FSL_LSCH3
u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR;
#endif
#ifdef CONFIG_ARCH_LS2080A
#if defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A)
u32 __iomem *pctbenr = (u32 *)FSL_PMU_PCTBENR_OFFSET;
u32 svr_dev_id;
#endif
@@ -593,7 +597,7 @@ int timer_init(void)
out_le32(cltbenr, 0xf);
#endif
#ifdef CONFIG_ARCH_LS2080A
#if defined(CONFIG_ARCH_LS2080A) || defined(CONFIG_ARCH_LS1088A)
/*
* In certain Layerscape SoCs, the clock for each core's
* has an enable bit in the PMU Physical Core Time Base Enable

View File

@@ -86,7 +86,7 @@ Example:
#address-cells = <1>;
images {
kernel@1 {
kernel {
description = "ARM64 Linux kernel";
data = /incbin/("./arch/arm64/boot/Image.gz");
type = "kernel";
@@ -96,7 +96,7 @@ Example:
load = <0x80080000>;
entry = <0x80080000>;
};
fdt@1 {
fdt-1 {
description = "Flattened Device Tree blob";
data = /incbin/("./fsl-ls1043ardb-static.dtb");
type = "flat_dt";
@@ -104,7 +104,7 @@ Example:
compression = "none";
load = <0x90000000>;
};
ramdisk@1 {
ramdisk {
description = "LS1043 Ramdisk";
data = /incbin/("./rootfs.cpio.gz");
type = "ramdisk";
@@ -116,12 +116,12 @@ Example:
};
configurations {
default = "config@1";
config@1 {
default = "config-1";
config-1 {
description = "Boot Linux kernel";
kernel = "kernel@1";
fdt = "fdt@1";
ramdisk = "ramdisk@1";
kernel = "kernel";
fdt = "fdt-1";
ramdisk = "ramdisk";
loadables = "fdt", "ramdisk";
};
};

View File

@@ -6,7 +6,7 @@
#include <common.h>
#include <efi_loader.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <fdt_support.h>
#include <phy.h>
#ifdef CONFIG_FSL_LSCH3
@@ -26,6 +26,8 @@
#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT
#include <asm/armv8/sec_firmware.h>
#endif
#include <asm/arch/speed.h>
#include <fsl_qbman.h>
int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
{
@@ -442,6 +444,13 @@ void ft_cpu_setup(void *blob, bd_t *bd)
fdt_fixup_esdhc(blob, bd);
#endif
#ifdef CONFIG_SYS_DPAA_QBMAN
fdt_fixup_bportals(blob);
fdt_fixup_qportals(blob);
do_fixup_by_compat_u32(blob, "fsl,qman",
"clock-frequency", get_qman_freq(), 1);
#endif
#ifdef CONFIG_SYS_DPAA_FMAN
fdt_fixup_fman_firmware(blob);
#endif

View File

@@ -155,8 +155,22 @@ void get_sys_info(struct sys_info *sys_info)
sys_info->freq_localbus = sys_info->freq_systembus /
CONFIG_SYS_FSL_IFC_CLK_DIV;
#endif
#ifdef CONFIG_SYS_DPAA_QBMAN
sys_info->freq_qman = sys_info->freq_systembus;
#endif
}
#ifdef CONFIG_SYS_DPAA_QBMAN
unsigned long get_qman_freq(void)
{
struct sys_info sys_info;
get_sys_info(&sys_info);
return sys_info.freq_qman;
}
#endif
int get_clocks(void)
{
struct sys_info sys_info;

View File

@@ -158,6 +158,293 @@ void serdes_init(u32 sd, u32 sd_addr, u32 rcwsr, u32 sd_prctl_mask,
serdes_prtcl_map[NONE] = 1;
}
__weak int get_serdes_volt(void)
{
return -1;
}
__weak int set_serdes_volt(int svdd)
{
return -1;
}
#define LNAGCR0_RT_RSTB 0x00600000
#define RSTCTL_RESET_MASK 0x000000E0
#define RSTCTL_RSTREQ 0x80000000
#define RSTCTL_RST_DONE 0x40000000
#define RSTCTL_RSTERR 0x20000000
#define RSTCTL_SDEN 0x00000020
#define RSTCTL_SDRST_B 0x00000040
#define RSTCTL_PLLRST_B 0x00000080
#define TCALCR_CALRST_B 0x08000000
struct serdes_prctl_info {
u32 id;
u32 mask;
u32 shift;
};
struct serdes_prctl_info srds_prctl_info[] = {
#ifdef CONFIG_SYS_FSL_SRDS_1
{.id = 1,
.mask = FSL_CHASSIS3_SRDS1_PRTCL_MASK,
.shift = FSL_CHASSIS3_SRDS1_PRTCL_SHIFT
},
#endif
#ifdef CONFIG_SYS_FSL_SRDS_2
{.id = 2,
.mask = FSL_CHASSIS3_SRDS2_PRTCL_MASK,
.shift = FSL_CHASSIS3_SRDS2_PRTCL_SHIFT
},
#endif
{} /* NULL ENTRY */
};
static int get_serdes_prctl_info_idx(u32 serdes_id)
{
int pos = 0;
struct serdes_prctl_info *srds_info;
/* loop until NULL ENTRY defined by .id=0 */
for (srds_info = srds_prctl_info; srds_info->id != 0;
srds_info++, pos++) {
if (srds_info->id == serdes_id)
return pos;
}
return -1;
}
static void do_enabled_lanes_reset(u32 serdes_id, u32 cfg,
struct ccsr_serdes __iomem *serdes_base,
bool cmplt)
{
int i, pos;
u32 cfg_tmp;
pos = get_serdes_prctl_info_idx(serdes_id);
if (pos == -1) {
printf("invalid serdes_id %d\n", serdes_id);
return;
}
cfg_tmp = cfg & srds_prctl_info[pos].mask;
cfg_tmp >>= srds_prctl_info[pos].shift;
for (i = 0; i < 4 && cfg_tmp & (0xf << (3 - i)); i++) {
if (cmplt)
setbits_le32(&serdes_base->lane[i].gcr0,
LNAGCR0_RT_RSTB);
else
clrbits_le32(&serdes_base->lane[i].gcr0,
LNAGCR0_RT_RSTB);
}
}
static void do_pll_reset(u32 cfg,
struct ccsr_serdes __iomem *serdes_base)
{
int i;
for (i = 0; i < 2 && !(cfg & (0x1 << (1 - i))); i++) {
clrbits_le32(&serdes_base->bank[i].rstctl,
RSTCTL_RESET_MASK);
udelay(1);
setbits_le32(&serdes_base->bank[i].rstctl,
RSTCTL_RSTREQ);
}
udelay(1);
}
static void do_rx_tx_cal_reset(struct ccsr_serdes __iomem *serdes_base)
{
clrbits_le32(&serdes_base->srdstcalcr, TCALCR_CALRST_B);
clrbits_le32(&serdes_base->srdstcalcr, TCALCR_CALRST_B);
}
static void do_rx_tx_cal_reset_comp(u32 cfg, int i,
struct ccsr_serdes __iomem *serdes_base)
{
if (!(cfg == 0x3 && i == 1)) {
udelay(1);
setbits_le32(&serdes_base->srdstcalcr, TCALCR_CALRST_B);
setbits_le32(&serdes_base->srdstcalcr, TCALCR_CALRST_B);
}
udelay(1);
}
static void do_pll_reset_done(u32 cfg,
struct ccsr_serdes __iomem *serdes_base)
{
int i;
u32 reg = 0;
for (i = 0; i < 2; i++) {
reg = in_le32(&serdes_base->bank[i].pllcr0);
if (!(cfg & (0x1 << (1 - i))) && ((reg >> 23) & 0x1)) {
setbits_le32(&serdes_base->bank[i].rstctl,
RSTCTL_RST_DONE);
}
}
}
static void do_serdes_enable(u32 cfg,
struct ccsr_serdes __iomem *serdes_base)
{
int i;
for (i = 0; i < 2 && !(cfg & (0x1 << (1 - i))); i++) {
setbits_le32(&serdes_base->bank[i].rstctl, RSTCTL_SDEN);
udelay(1);
setbits_le32(&serdes_base->bank[i].rstctl, RSTCTL_PLLRST_B);
udelay(1);
/* Take the Rx/Tx calibration out of reset */
do_rx_tx_cal_reset_comp(cfg, i, serdes_base);
}
}
static void do_pll_lock(u32 cfg,
struct ccsr_serdes __iomem *serdes_base)
{
int i;
u32 reg = 0;
for (i = 0; i < 2 && !(cfg & (0x1 << (1 - i))); i++) {
/* if the PLL is not locked, set RST_ERR */
reg = in_le32(&serdes_base->bank[i].pllcr0);
if (!((reg >> 23) & 0x1)) {
setbits_le32(&serdes_base->bank[i].rstctl,
RSTCTL_RSTERR);
} else {
udelay(1);
setbits_le32(&serdes_base->bank[i].rstctl,
RSTCTL_SDRST_B);
udelay(1);
}
}
}
int setup_serdes_volt(u32 svdd)
{
struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
struct ccsr_serdes __iomem *serdes1_base =
(void *)CONFIG_SYS_FSL_LSCH3_SERDES_ADDR;
u32 cfg_rcwsrds1 = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS1_REGSR - 1]);
#ifdef CONFIG_SYS_FSL_SRDS_2
struct ccsr_serdes __iomem *serdes2_base =
(void *)(CONFIG_SYS_FSL_LSCH3_SERDES_ADDR + 0x10000);
u32 cfg_rcwsrds2 = gur_in32(&gur->rcwsr[FSL_CHASSIS3_SRDS2_REGSR - 1]);
#endif
u32 cfg_tmp;
int svdd_cur, svdd_tar;
int ret = 1;
/* Only support switch SVDD to 900mV */
if (svdd != 900)
return -EINVAL;
/* Scale up to the LTC resolution is 1/4096V */
svdd = (svdd * 4096) / 1000;
svdd_tar = svdd;
svdd_cur = get_serdes_volt();
if (svdd_cur < 0)
return -EINVAL;
debug("%s: current SVDD: %x; target SVDD: %x\n",
__func__, svdd_cur, svdd_tar);
if (svdd_cur == svdd_tar)
return 0;
/* Put the all enabled lanes in reset */
#ifdef CONFIG_SYS_FSL_SRDS_1
do_enabled_lanes_reset(1, cfg_rcwsrds1, serdes1_base, false);
#endif
#ifdef CONFIG_SYS_FSL_SRDS_2
do_enabled_lanes_reset(2, cfg_rcwsrds2, serdes2_base, false);
#endif
/* Put the all enabled PLL in reset */
#ifdef CONFIG_SYS_FSL_SRDS_1
cfg_tmp = cfg_rcwsrds1 & 0x3;
do_pll_reset(cfg_tmp, serdes1_base);
#endif
#ifdef CONFIG_SYS_FSL_SRDS_2
cfg_tmp = cfg_rcwsrds1 & 0xC;
cfg_tmp >>= 2;
do_pll_reset(cfg_tmp, serdes2_base);
#endif
/* Put the Rx/Tx calibration into reset */
#ifdef CONFIG_SYS_FSL_SRDS_1
do_rx_tx_cal_reset(serdes1_base);
#endif
#ifdef CONFIG_SYS_FSL_SRDS_2
do_rx_tx_cal_reset(serdes2_base);
#endif
ret = set_serdes_volt(svdd);
if (ret < 0) {
printf("could not change SVDD\n");
ret = -1;
}
/* For each PLL thats not disabled via RCW enable the SERDES */
#ifdef CONFIG_SYS_FSL_SRDS_1
cfg_tmp = cfg_rcwsrds1 & 0x3;
do_serdes_enable(cfg_tmp, serdes1_base);
#endif
#ifdef CONFIG_SYS_FSL_SRDS_2
cfg_tmp = cfg_rcwsrds1 & 0xC;
cfg_tmp >>= 2;
do_serdes_enable(cfg_tmp, serdes2_base);
#endif
/* Wait for at at least 625us, ensure the PLLs being reset are locked */
udelay(800);
#ifdef CONFIG_SYS_FSL_SRDS_1
cfg_tmp = cfg_rcwsrds1 & 0x3;
do_pll_lock(cfg_tmp, serdes1_base);
#endif
#ifdef CONFIG_SYS_FSL_SRDS_2
cfg_tmp = cfg_rcwsrds1 & 0xC;
cfg_tmp >>= 2;
do_pll_lock(cfg_tmp, serdes2_base);
#endif
/* Take the all enabled lanes out of reset */
#ifdef CONFIG_SYS_FSL_SRDS_1
do_enabled_lanes_reset(1, cfg_rcwsrds1, serdes1_base, true);
#endif
#ifdef CONFIG_SYS_FSL_SRDS_2
do_enabled_lanes_reset(2, cfg_rcwsrds2, serdes2_base, true);
#endif
/* For each PLL being reset, and achieved PLL lock set RST_DONE */
#ifdef CONFIG_SYS_FSL_SRDS_1
cfg_tmp = cfg_rcwsrds1 & 0x3;
do_pll_reset_done(cfg_tmp, serdes1_base);
#endif
#ifdef CONFIG_SYS_FSL_SRDS_2
cfg_tmp = cfg_rcwsrds1 & 0xC;
cfg_tmp >>= 2;
do_pll_reset_done(cfg_tmp, serdes2_base);
#endif
return ret;
}
void fsl_serdes_init(void)
{
#if defined(CONFIG_FSL_MC_ENET) && !defined(CONFIG_SPL_BUILD)

View File

@@ -341,6 +341,8 @@ int sata_init(void)
#ifdef CONFIG_SYS_SATA2
ccsr_ahci = (void *)CONFIG_SYS_SATA2;
out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY2_CFG);
out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY3_CFG);
out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG);
#endif
@@ -348,6 +350,8 @@ int sata_init(void)
#ifdef CONFIG_SYS_SATA1
ccsr_ahci = (void *)CONFIG_SYS_SATA1;
out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY2_CFG);
out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY3_CFG);
out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG);
@@ -359,6 +363,45 @@ int sata_init(void)
}
#endif
/* Get VDD in the unit mV from voltage ID */
int get_core_volt_from_fuse(void)
{
struct ccsr_gur *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR);
int vdd;
u32 fusesr;
u8 vid;
/* get the voltage ID from fuse status register */
fusesr = in_le32(&gur->dcfg_fusesr);
debug("%s: fusesr = 0x%x\n", __func__, fusesr);
vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_ALTVID_SHIFT) &
FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK;
if ((vid == 0) || (vid == FSL_CHASSIS3_DCFG_FUSESR_ALTVID_MASK)) {
vid = (fusesr >> FSL_CHASSIS3_DCFG_FUSESR_VID_SHIFT) &
FSL_CHASSIS3_DCFG_FUSESR_VID_MASK;
}
debug("%s: VID = 0x%x\n", __func__, vid);
switch (vid) {
case 0x00: /* VID isn't supported */
vdd = -EINVAL;
debug("%s: The VID feature is not supported\n", __func__);
break;
case 0x08: /* 0.9V silicon */
vdd = 900;
break;
case 0x10: /* 1.0V silicon */
vdd = 1000;
break;
default: /* Other core voltage */
vdd = -EINVAL;
debug("%s: The VID(%x) isn't supported\n", __func__, vid);
break;
}
debug("%s: The required minimum volt of CORE is %dmV\n", __func__, vdd);
return vdd;
}
#elif defined(CONFIG_FSL_LSCH2)
#ifdef CONFIG_SCSI_AHCI_PLAT
int sata_init(void)
@@ -368,6 +411,8 @@ int sata_init(void)
/* Disable SATA ECC */
out_le32((void *)CONFIG_SYS_DCSR_DCFG_ADDR + 0x520, 0x80000000);
out_le32(&ccsr_ahci->ppcfg, AHCI_PORT_PHY_1_CFG);
out_le32(&ccsr_ahci->pp2c, AHCI_PORT_PHY2_CFG);
out_le32(&ccsr_ahci->pp3c, AHCI_PORT_PHY3_CFG);
out_le32(&ccsr_ahci->ptc, AHCI_PORT_TRANS_CFG);
out_le32(&ccsr_ahci->axicc, AHCI_PORT_AXICC_CFG);

View File

@@ -26,23 +26,6 @@ u32 spl_boot_device(void)
return 0;
}
u32 spl_boot_mode(const u32 boot_device)
{
switch (spl_boot_device()) {
case BOOT_DEVICE_MMC1:
#ifdef CONFIG_SPL_FAT_SUPPORT
return MMCSD_MODE_FS;
#else
return MMCSD_MODE_RAW;
#endif
case BOOT_DEVICE_NAND:
return 0;
default:
puts("spl: error: unsupported device\n");
hang();
}
}
#ifdef CONFIG_SPL_BUILD
void spl_board_init(void)
@@ -84,6 +67,9 @@ void board_init_f(ulong dummy)
#ifdef CONFIG_SPL_I2C_SUPPORT
i2c_init_all();
#endif
#ifdef CONFIG_VID
init_func_vid();
#endif
dram_init();
#ifdef CONFIG_SPL_FSL_LS_PPA

View File

@@ -0,0 +1,86 @@
/*
* (C) Copyright 2017 NVIDIA Corporation <www.nvidia.com>
*
* Derived from Linux kernel v4.14 files:
*
* arch/arm64/include/asm/assembler.h:
* Based on arch/arm/include/asm/assembler.h, arch/arm/mm/proc-macros.S
* Copyright (C) 1996-2000 Russell King
* Copyright (C) 2012 ARM Ltd.
*
* arch/arm64/kernel/head.S:
* Based on arch/arm/kernel/head.S
* Copyright (C) 1994-2002 Russell King
* Copyright (C) 2003-2012 ARM Ltd.
* Authors: Catalin Marinas <catalin.marinas@arm.com>
* Will Deacon <will.deacon@arm.com>
*
* arch/arm64/kernel/image.h:
* Copyright (C) 2014 ARM Ltd.
*
* SPDX-License-Identifier: GPL-2.0
*/
/*
* There aren't any ELF relocations we can use to endian-swap values known only
* at link time (e.g. the subtraction of two symbol addresses), so we must get
* the linker to endian-swap certain values before emitting them.
*
* Note that, in order for this to work when building the ELF64 PIE executable
* (for KASLR), these values should not be referenced via R_AARCH64_ABS64
* relocations, since these are fixed up at runtime rather than at build time
* when PIE is in effect. So we need to split them up in 32-bit high and low
* words.
*/
#ifdef CONFIG_CPU_BIG_ENDIAN
#define DATA_LE32(data) \
((((data) & 0x000000ff) << 24) | \
(((data) & 0x0000ff00) << 8) | \
(((data) & 0x00ff0000) >> 8) | \
(((data) & 0xff000000) >> 24))
#else
#define DATA_LE32(data) ((data) & 0xffffffff)
#endif
#define DEFINE_IMAGE_LE64(sym, data) \
sym##_lo32 = DATA_LE32((data) & 0xffffffff); \
sym##_hi32 = DATA_LE32((data) >> 32)
#define __MAX(a, b) (((a) > (b)) ? (a) : (b))
#define __CODE_DATA_SIZE (__bss_start - _start)
#define __BSS_SIZE (__bss_end - __bss_start)
#ifdef CONFIG_SYS_INIT_SP_BSS_OFFSET
#define __MAX_EXTRA_RAM_USAGE __MAX(__BSS_SIZE, CONFIG_SYS_INIT_SP_BSS_OFFSET)
#else
#define __MAX_EXTRA_RAM_USAGE __BSS_SIZE
#endif
#define __MEM_USAGE (__CODE_DATA_SIZE + __MAX_EXTRA_RAM_USAGE)
#ifdef CONFIG_CPU_BIG_ENDIAN
#define __HEAD_FLAG_BE 1
#else
#define __HEAD_FLAG_BE 0
#endif
#define __HEAD_FLAG_PAGE_SIZE 1 /* 4K hard-coded */
#define __HEAD_FLAG_PHYS_BASE 1
#define __HEAD_FLAGS ((__HEAD_FLAG_BE << 0) | \
(__HEAD_FLAG_PAGE_SIZE << 1) | \
(__HEAD_FLAG_PHYS_BASE << 3))
#define TEXT_OFFSET (CONFIG_SYS_TEXT_BASE - \
CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE)
/*
* These will output as part of the Image header, which should be little-endian
* regardless of the endianness of the kernel. While constant values could be
* endian swapped in head.S, all are done here for consistency.
*/
#define HEAD_SYMBOLS \
DEFINE_IMAGE_LE64(_kernel_size_le, __MEM_USAGE); \
DEFINE_IMAGE_LE64(_kernel_offset_le, TEXT_OFFSET); \
DEFINE_IMAGE_LE64(_kernel_flags_le, __HEAD_FLAGS);
HEAD_SYMBOLS

View File

@@ -30,7 +30,7 @@ phys_addr_t sec_firmware_addr;
#define SEC_FIRMWARE_FIT_IMAGE "firmware"
#endif
#ifndef SEC_FIRMEWARE_FIT_CNF_NAME
#define SEC_FIRMEWARE_FIT_CNF_NAME "config@1"
#define SEC_FIRMEWARE_FIT_CNF_NAME "config-1"
#endif
#ifndef SEC_FIRMWARE_TARGET_EL
#define SEC_FIRMWARE_TARGET_EL 2

View File

@@ -6,7 +6,7 @@
*/
#include <common.h>
#include <libfdt.h>
#include <linux/libfdt.h>
#include <asm/spin_table.h>
int spin_table_update_dt(void *fdt)

View File

@@ -19,7 +19,9 @@
.globl _start
_start:
#ifdef CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK
#if defined(LINUX_KERNEL_IMAGE_HEADER)
#include <asm/boot0-linux-kernel-header.h>
#elif defined(CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK)
/*
* Various SoCs need something special and SoC-specific up front in
* order to boot, allow them to set that in their boot0.h file and then
@@ -196,7 +198,10 @@ reset_sctrl:
WEAK(apply_core_errata)
mov x29, lr /* Save LR */
/* For now, we support Cortex-A57 specific errata only */
/* For now, we support Cortex-A53, Cortex-A57 specific errata */
/* Check if we are running on a Cortex-A53 core */
branch_if_a53_core x0, apply_a53_core_errata
/* Check if we are running on a Cortex-A57 core */
branch_if_a57_core x0, apply_a57_core_errata
@@ -204,6 +209,25 @@ WEAK(apply_core_errata)
mov lr, x29 /* Restore LR */
ret
apply_a53_core_errata:
#ifdef CONFIG_ARM_ERRATA_855873
mrs x0, midr_el1
tst x0, #(0xf << 20)
b.ne 0b
mrs x0, midr_el1
and x0, x0, #0xf
cmp x0, #3
b.lt 0b
mrs x0, S3_1_c15_c2_0 /* cpuactlr_el1 */
/* Enable data cache clean as data cache clean/invalidate */
orr x0, x0, #1 << 44
msr S3_1_c15_c2_0, x0 /* cpuactlr_el1 */
#endif
b 0b
apply_a57_core_errata:
#ifdef CONFIG_ARM_ERRATA_828024

View File

@@ -159,4 +159,8 @@ SECTIONS
/DISCARD/ : { *(.plt*) }
/DISCARD/ : { *(.interp*) }
/DISCARD/ : { *(.gnu*) }
#ifdef CONFIG_LINUX_KERNEL_IMAGE_HEADER
#include "linux-kernel-image-header-vars.h"
#endif
}

View File

@@ -68,6 +68,12 @@ config PMUFW_INIT_FILE
config ZYNQMP_USB
bool "Configure ZynqMP USB"
config ZYNQMP_NO_DDR
bool "Disable DDR MMU mapping"
help
This option configures MMU with no DDR to avoid speculative
access to DDR memory where DDR is not present.
config SYS_MALLOC_F_LEN
default 0x600
@@ -90,6 +96,9 @@ config SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
Overwrite bootmode selected via boot mode pins to tell SPL what should
be the next boot device.
config ZYNQ_SDHCI_MAX_FREQ
default 200000000
config SPL_ZYNQMP_ALT_BOOTMODE
hex
default 0x0 if JTAG_MODE
@@ -107,7 +116,7 @@ config SPL_ZYNQMP_ALT_BOOTMODE
choice
prompt "Boot mode"
depends on SPL_ZYNQMP_ALT_BOOTMODE_ENABLED
default JTAG
default JTAG_MODE
config JTAG_MODE
bool "JTAG_MODE"

View File

@@ -9,3 +9,4 @@ obj-y += clk.o
obj-y += cpu.o
obj-$(CONFIG_MP) += mp.o
obj-$(CONFIG_SPL_BUILD) += spl.o handoff.o
obj-$(CONFIG_ZYNQMP_PSU_INIT_ENABLED) += psu_spl_init.o

View File

@@ -17,20 +17,24 @@
DECLARE_GLOBAL_DATA_PTR;
static struct mm_region zynqmp_mem_map[] = {
#if !defined(CONFIG_ZYNQMP_NO_DDR)
{
.virt = 0x0UL,
.phys = 0x0UL,
.size = 0x80000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
},
#endif
{
.virt = 0x80000000UL,
.phys = 0x80000000UL,
.size = 0x70000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
},
{
.virt = 0xf8000000UL,
.phys = 0xf8000000UL,
.size = 0x07e00000UL,
@@ -48,20 +52,24 @@ static struct mm_region zynqmp_mem_map[] = {
#endif
.virt = 0x400000000UL,
.phys = 0x400000000UL,
.size = 0x200000000UL,
.size = 0x400000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN
}, {
.virt = 0x600000000UL,
.phys = 0x600000000UL,
},
#if !defined(CONFIG_ZYNQMP_NO_DDR)
{
.virt = 0x800000000UL,
.phys = 0x800000000UL,
.size = 0x800000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE
}, {
.virt = 0xe00000000UL,
.phys = 0xe00000000UL,
.size = 0xf200000000UL,
},
#endif
{
.virt = 0x1000000000UL,
.phys = 0x1000000000UL,
.size = 0xf000000000UL,
.attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN

View File

@@ -0,0 +1,80 @@
/*
* Copyright 2018 Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*
* SPDX-License-Identifier: GPL-2.0+
*/
#include <common.h>
#include <asm/io.h>
#include <asm/arch/psu_init_gpl.h>
#define PSU_MASK_POLL_TIME 1100000
int __maybe_unused mask_pollonvalue(unsigned long add, u32 mask, u32 value)
{
int i = 0;
while ((__raw_readl(add) & mask) != value) {
if (i == PSU_MASK_POLL_TIME)
return 0;
i++;
}
return 1;
}
__weak int mask_poll(u32 add, u32 mask)
{
int i = 0;
unsigned long addr = add;
while (!(__raw_readl(addr) & mask)) {
if (i == PSU_MASK_POLL_TIME)
return 0;
i++;
}
return 1;
}
__weak u32 mask_read(u32 add, u32 mask)
{
unsigned long addr = add;
return __raw_readl(addr) & mask;
}
__weak void mask_delay(u32 delay)
{
udelay(delay);
}
__weak void psu_mask_write(unsigned long offset, unsigned long mask,
unsigned long val)
{
unsigned long regval = 0;
regval = readl(offset);
regval &= ~(mask);
regval |= (val & mask);
writel(regval, offset);
}
__weak void prog_reg(unsigned long addr, unsigned long mask,
unsigned long shift, unsigned long value)
{
int rdata = 0;
rdata = readl(addr);
rdata = rdata & (~mask);
rdata = rdata | (value << shift);
writel(rdata, addr);
}
__weak int psu_init(void)
{
/*
* This function is overridden by the one in
* board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists.
*/
return -1;
}

View File

@@ -115,28 +115,6 @@ u32 spl_boot_device(void)
return 0;
}
u32 spl_boot_mode(const u32 boot_device)
{
switch (boot_device) {
case BOOT_DEVICE_RAM:
return 0;
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
return MMCSD_MODE_FS;
default:
puts("spl: error: unsupported device\n");
hang();
}
}
__weak void psu_init(void)
{
/*
* This function is overridden by the one in
* board/xilinx/zynqmp/(platform)/psu_init_gpl.c, if it exists.
*/
}
#ifdef CONFIG_SPL_OS_BOOT
int spl_start_uboot(void)
{

View File

@@ -147,6 +147,8 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-zybo.dtb
dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-ep108.dtb \
zynqmp-mini-emmc.dtb \
zynqmp-mini-nand.dtb \
zynqmp-zcu102-revA.dtb \
zynqmp-zcu102-revB.dtb \
zynqmp-zcu102-rev1.0.dtb \
@@ -161,7 +163,8 @@ dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-bone.dtb \
am335x-bonegreen.dtb \
am335x-icev2.dtb \
am335x-pxm50.dtb \
am335x-rut.dtb
am335x-rut.dtb \
am335x-pdu001.dtb
dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb \
am43x-epos-evm.dtb \
am437x-idk-evm.dtb
@@ -174,6 +177,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
socfpga_cyclone5_is1.dtb \
socfpga_cyclone5_mcvevk.dtb \
socfpga_cyclone5_socdk.dtb \
socfpga_cyclone5_dbm_soc1.dtb \
socfpga_cyclone5_de0_nano_soc.dtb \
socfpga_cyclone5_de1_soc.dtb \
socfpga_cyclone5_de10_nano.dtb \
@@ -187,6 +191,7 @@ dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb \
dtb-$(CONFIG_TARGET_AM57XX_EVM) += am57xx-beagle-x15.dtb \
am57xx-beagle-x15-revb1.dtb \
am57xx-beagle-x15-revc.dtb \
am574x-idk.dtb \
am572x-idk.dtb \
am571x-idk.dtb
dtb-$(CONFIG_TARGET_STV0991) += stv0991.dtb
@@ -209,9 +214,15 @@ dtb-$(CONFIG_FSL_LSCH2) += fsl-ls1043a-qds-duart.dtb \
fsl-ls1046a-rdb.dtb \
fsl-ls1012a-qds.dtb \
fsl-ls1012a-rdb.dtb \
fsl-ls1012a-2g5rdb.dtb \
fsl-ls1012a-frdm.dtb
dtb-$(CONFIG_ARCH_SNAPDRAGON) += dragonboard410c.dtb
dtb-$(CONFIG_TARGET_DRAGONBOARD410C) += dragonboard410c.dtb
dtb-$(CONFIG_TARGET_DRAGONBOARD820C) += dragonboard820c.dtb
dtb-$(CONFIG_STM32F4) += stm32f429-disco.dtb \
stm32429i-eval.dtb \
stm32f469-disco.dtb
dtb-$(CONFIG_STM32F7) += stm32f746-disco.dtb \
stm32f769-disco.dtb
@@ -329,6 +340,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \
dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h2-plus-orangepi-zero.dtb \
sun8i-h3-bananapi-m2-plus.dtb \
sun8i-h3-libretech-all-h3-cc.dtb \
sun8i-h3-orangepi-2.dtb \
sun8i-h3-orangepi-lite.dtb \
sun8i-h3-orangepi-one.dtb \
@@ -374,15 +386,17 @@ dtb-$(CONFIG_MX6) += imx6ull-14x14-evk.dtb \
imx6sl-evk.dtb \
imx6sll-evk.dtb \
imx6dl-icore.dtb \
imx6dl-icore-mipi.dtb \
imx6dl-icore-rqs.dtb \
imx6q-cm-fx6.dtb \
imx6q-icore.dtb \
imx6q-icore-mipi.dtb \
imx6q-icore-rqs.dtb \
imx6q-logicpd.dtb \
imx6sx-sabreauto.dtb \
imx6sx-sdb.dtb \
imx6ul-geam-kit.dtb \
imx6ul-isiot-emmc.dtb \
imx6ul-isiot-mmc.dtb \
imx6ul-isiot-nand.dtb \
imx6ul-opos6uldev.dtb
@@ -396,6 +410,7 @@ dtb-$(CONFIG_RCAR_GEN3) += \
r8a7795-salvator-x.dtb \
r8a7796-m3ulcb.dtb \
r8a7796-salvator-x.dtb \
r8a77965-salvator-x.dtb \
r8a77970-eagle.dtb \
r8a77995-draak.dtb
@@ -438,6 +453,11 @@ dtb-$(CONFIG_TARGET_OMAP3_EVM) += \
omap3-evm-37xx.dtb \
omap3-evm.dtb
dtb-$(CONFIG_TARGET_OMAP3_BEAGLE) += \
omap3-beagle-xm-ab.dtb \
omap3-beagle-xm.dtb \
omap3-beagle.dtb
dtb-$(CONFIG_TARGET_SAMA5D2_PTC_EK) += \
at91-sama5d2_ptc_ek.dtb

View File

@@ -0,0 +1,39 @@
/*
* Copyright (C) 2018 EETS GmbH - https://www.eets.ch/
*
* SPDX-License-Identifier: GPL-2.0+
*/
/ {
ocp {
u-boot,dm-pre-reloc;
};
};
&l4_wkup {
u-boot,dm-pre-reloc;
};
&scm {
u-boot,dm-pre-reloc;
};
&am33xx_pinmux {
u-boot,dm-pre-reloc;
};
&uart3_pins {
u-boot,dm-pre-reloc;
};
&uart3 {
u-boot,dm-pre-reloc;
};
&mmc1_pins {
u-boot,dm-pre-reloc;
};
&mmc2_pins {
u-boot,dm-pre-reloc;
};

View File

@@ -0,0 +1,595 @@
/*
* pdu001.dts
*
* EETS GmbH PDU001 board device tree file
*
* Copyright (C) 2018 EETS GmbH - http://www.eets.ch/
*
* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "am33xx.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/leds/leds-pca9532.h>
/ {
model = "EETS,PDU001";
compatible = "eets,pdu001", "ti,am33xx";
chosen {
stdout-path = &uart3;
};
cpus {
cpu@0 {
cpu0-supply = <&vdd1_reg>;
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x10000000>; /* 256 MB */
};
vbat: fixedregulator@0 {
compatible = "regulator-fixed";
regulator-name = "vbat";
regulator-min-microvolt = <3600000>;
regulator-max-microvolt = <3600000>;
regulator-boot-on;
};
lis3_reg: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "lis3_reg";
regulator-boot-on;
};
panel {
compatible = "ti,tilcdc,panel";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins_s0>;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
dma-burst-sz = <16>;
bpp = <16>;
fdd = <0x80>;
sync-edge = <0>;
sync-ctrl = <1>;
raster-order = <0>;
fifo-th = <0>;
};
display-timings {
240x320p16 {
clock-frequency = <6500000>;
hactive = <240>;
vactive = <320>;
hfront-porch = <6>;
hback-porch = <6>;
hsync-len = <1>;
vback-porch = <6>;
vfront-porch = <6>;
vsync-len = <1>;
hsync-active = <0>;
vsync-active = <0>;
pixelclk-active = <1>;
de-active = <0>;
};
};
};
};
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&clkout2_pin>;
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x988, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
AM33XX_IOPAD(0x98c, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x958, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d1.i2c1_sda */
AM33XX_IOPAD(0x95c, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_cs0.i2c1_scl */
>;
};
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x950, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_clk.i2c2_sda */
AM33XX_IOPAD(0x954, PIN_INPUT_PULLUP | MUX_MODE2) /* spi0_d0.i2c2_scl */
>;
};
spi1_pins: pinmux_spi1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x990, PIN_OUTPUT | MUX_MODE3) /* mcasp0_aclkx.spi1_sclk */
AM33XX_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
AM33XX_IOPAD(0x998, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
AM33XX_IOPAD(0x99C, PIN_OUTPUT | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x96C, PIN_OUTPUT | MUX_MODE7) /* uart0_rtsn.gpio1_9 */
AM33XX_IOPAD(0x970, PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
AM33XX_IOPAD(0x974, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
uart1_pins: pinmux_uart1_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x980, PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
AM33XX_IOPAD(0x984, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
>;
};
uart3_pins: pinmux_uart3_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x960, PIN_INPUT_PULLUP | MUX_MODE1) /* spi0_cs1.uart3_rxd */
AM33XX_IOPAD(0x964, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* ecap0_in_pwm0_out.uart3_txd */
>;
};
clkout2_pin: pinmux_clkout2_pin {
pinctrl-single,pins = <
AM33XX_IOPAD(0x9b4, PIN_OUTPUT_PULLDOWN | MUX_MODE3) /* xdma_event_intr1.clkout2 */
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Port 1 (emac0) */
AM33XX_IOPAD(0x908, PIN_INPUT | MUX_MODE0) /* mii1_col.mii1_col */
AM33XX_IOPAD(0x90C, PIN_INPUT | MUX_MODE0) /* mii1_crs.mii1_crs */
AM33XX_IOPAD(0x910, PIN_INPUT | MUX_MODE0) /* mii1_rxer.mii1_rxer */
AM33XX_IOPAD(0x914, PIN_OUTPUT | MUX_MODE0) /* mii1_txen.mii1_txen */
AM33XX_IOPAD(0x918, PIN_INPUT | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
AM33XX_IOPAD(0x91c, PIN_OUTPUT | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
AM33XX_IOPAD(0x920, PIN_OUTPUT | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
AM33XX_IOPAD(0x924, PIN_OUTPUT | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
AM33XX_IOPAD(0x928, PIN_OUTPUT | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
AM33XX_IOPAD(0x92c, PIN_INPUT | MUX_MODE0) /* mii1_txclk.mii1_txclk */
AM33XX_IOPAD(0x930, PIN_INPUT | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
AM33XX_IOPAD(0x934, PIN_INPUT | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
AM33XX_IOPAD(0x938, PIN_INPUT | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
AM33XX_IOPAD(0x93c, PIN_INPUT | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
AM33XX_IOPAD(0x940, PIN_INPUT | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
/* Port 2 (emac1) */
AM33XX_IOPAD(0x840, PIN_OUTPUT | MUX_MODE1) /* mii2_txen.gpmc_a0 */
AM33XX_IOPAD(0x844, PIN_INPUT | MUX_MODE1) /* mii2_rxdv.gpmc_a1 */
AM33XX_IOPAD(0x848, PIN_OUTPUT | MUX_MODE1) /* mii2_txd3.gpmc_a2 */
AM33XX_IOPAD(0x84c, PIN_OUTPUT | MUX_MODE1) /* mii2_txd2.gpmc_a3 */
AM33XX_IOPAD(0x850, PIN_OUTPUT | MUX_MODE1) /* mii2_txd1.gpmc_a4 */
AM33XX_IOPAD(0x854, PIN_OUTPUT | MUX_MODE1) /* mii2_txd0.gpmc_a5 */
AM33XX_IOPAD(0x858, PIN_INPUT | MUX_MODE1) /* mii2_txclk.gpmc_a6 */
AM33XX_IOPAD(0x85c, PIN_INPUT | MUX_MODE1) /* mii2_rxclk.gpmc_a7 */
AM33XX_IOPAD(0x860, PIN_INPUT | MUX_MODE1) /* mii2_rxd3.gpmc_a8 */
AM33XX_IOPAD(0x864, PIN_INPUT | MUX_MODE1) /* mii2_rxd2.gpmc_a9 */
AM33XX_IOPAD(0x868, PIN_INPUT | MUX_MODE1) /* mii2_rxd1.gpmc_a10 */
AM33XX_IOPAD(0x86C, PIN_INPUT | MUX_MODE1) /* mii2_rxd0.gpmc_a11 */
AM33XX_IOPAD(0x870, PIN_INPUT | MUX_MODE1) /* mii2_crs.gpmc_wait0 */
AM33XX_IOPAD(0x874, PIN_INPUT | MUX_MODE1) /* mii2_rxer.gpmc_wpn */
AM33XX_IOPAD(0x878, PIN_INPUT | MUX_MODE1) /* mii2_col.gpmc_ben1 */
>;
};
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
AM33XX_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
AM33XX_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
mmc1_pins: pinmux_mmc1_pins {
/* eMMC */
pinctrl-single,pins = <
AM33XX_IOPAD(0x8f0, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3 */
AM33XX_IOPAD(0x8f4, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2 */
AM33XX_IOPAD(0x8f8, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1 */
AM33XX_IOPAD(0x8fc, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0 */
AM33XX_IOPAD(0x900, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk */
AM33XX_IOPAD(0x904, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd */
>;
};
mmc2_pins: pinmux_mmc2_pins {
/* SD cardcage */
pinctrl-single,pins = <
AM33XX_IOPAD(0x80c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
AM33XX_IOPAD(0x808, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
AM33XX_IOPAD(0x804, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
AM33XX_IOPAD(0x800, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
AM33XX_IOPAD(0x880, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn1.mmc1_clk */
AM33XX_IOPAD(0x884, PIN_INPUT_PULLUP | MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
/* card change signal for frontpanel SD cardcage */
AM33XX_IOPAD(0x890, PIN_INPUT | MUX_MODE7) /* gpmc_advn_ale.gpio2_2 */
>;
};
lcd_pins_s0: lcd_pins_s0 {
pinctrl-single,pins = <
AM33XX_IOPAD(0x8a0, PIN_OUTPUT | MUX_MODE0) /* lcd_data0.lcd_data0 */
AM33XX_IOPAD(0x8a4, PIN_OUTPUT | MUX_MODE0) /* lcd_data1.lcd_data1 */
AM33XX_IOPAD(0x8a8, PIN_OUTPUT | MUX_MODE0) /* lcd_data2.lcd_data2 */
AM33XX_IOPAD(0x8ac, PIN_OUTPUT | MUX_MODE0) /* lcd_data3.lcd_data3 */
AM33XX_IOPAD(0x8b0, PIN_OUTPUT | MUX_MODE0) /* lcd_data4.lcd_data4 */
AM33XX_IOPAD(0x8b4, PIN_OUTPUT | MUX_MODE0) /* lcd_data5.lcd_data5 */
AM33XX_IOPAD(0x8b8, PIN_OUTPUT | MUX_MODE0) /* lcd_data6.lcd_data6 */
AM33XX_IOPAD(0x8bc, PIN_OUTPUT | MUX_MODE0) /* lcd_data7.lcd_data7 */
AM33XX_IOPAD(0x8c0, PIN_OUTPUT | MUX_MODE0) /* lcd_data8.lcd_data8 */
AM33XX_IOPAD(0x8c4, PIN_OUTPUT | MUX_MODE0) /* lcd_data9.lcd_data9 */
AM33XX_IOPAD(0x8c8, PIN_OUTPUT | MUX_MODE0) /* lcd_data10.lcd_data10 */
AM33XX_IOPAD(0x8cc, PIN_OUTPUT | MUX_MODE0) /* lcd_data11.lcd_data11 */
AM33XX_IOPAD(0x8d0, PIN_OUTPUT | MUX_MODE0) /* lcd_data12.lcd_data12 */
AM33XX_IOPAD(0x8d4, PIN_OUTPUT | MUX_MODE0) /* lcd_data13.lcd_data13 */
AM33XX_IOPAD(0x8d8, PIN_OUTPUT | MUX_MODE0) /* lcd_data14.lcd_data14 */
AM33XX_IOPAD(0x8dc, PIN_OUTPUT | MUX_MODE0) /* lcd_data15.lcd_data15 */
AM33XX_IOPAD(0x8e0, PIN_OUTPUT | MUX_MODE0) /* lcd_vsync.lcd_vsync */
AM33XX_IOPAD(0x8e4, PIN_OUTPUT | MUX_MODE0) /* lcd_hsync.lcd_hsync */
AM33XX_IOPAD(0x8e8, PIN_OUTPUT | MUX_MODE0) /* lcd_pclk.lcd_pclk */
AM33XX_IOPAD(0x8ec, PIN_OUTPUT | MUX_MODE0) /* lcd_ac_bias_en.lcd_ac_bias_en */
>;
};
dcan0_pins: pinmux_dcan0_pins {
pinctrl-single,pins = <
AM33XX_IOPAD(0x978, PIN_OUTPUT | MUX_MODE2) /* uart1_ctsn.d_can0_tx */
AM33XX_IOPAD(0x97c, PIN_INPUT_PULLDOWN | MUX_MODE2) /* uart1_rtsn.d_can0_rx */
>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
rts-gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
rs485-rts-active-high;
rs485-rts-delay = <0 0>;
linux,rs485-enabled-at-boot-time;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "okay";
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&uart3_pins>;
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
tps: tps@2d {
reg = <0x2d>;
};
m2_eeprom: m2_eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
status = "okay";
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
clock-frequency = <100000>;
board_24aa025e48: board_24aa025e48@50 {
compatible = "microchip,24aa025e48";
reg = <0x50>;
};
backplane_24aa025e48: backplane_24aa025e48@53 {
compatible = "microchip,24aa025e48";
reg = <0x53>;
};
pca9532: pca9532@60 {
compatible = "nxp,pca9532";
reg = <0x60>;
psc0 = <0x97>;
pwm0 = <0x80>;
psc1 = <0x97>;
pwm1 = <0x10>;
run.red@0 {
type = <PCA9532_TYPE_LED>;
};
run.green@1 {
type = <PCA9532_TYPE_LED>;
default-state = "on";
};
s2.red@2 {
type = <PCA9532_TYPE_LED>;
};
s2.green@3 {
type = <PCA9532_TYPE_LED>;
};
s1.yellow@4 {
type = <PCA9532_TYPE_LED>;
};
s1.green@5 {
type = <PCA9532_TYPE_LED>;
};
};
pca9530: pca9530@61 {
compatible = "nxp,pca9530";
reg = <0x61>;
tft-panel@0 {
type = <PCA9532_TYPE_LED>;
linux,default-trigger = "backlight";
default-state = "on";
};
};
mcp79400: mcp79400@6f {
compatible = "microchip,mcp7940x";
reg = <0x6f>;
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
status = "okay";
clock-frequency = <100000>;
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
ti,pindir-d0-out-d1-in;
status = "okay";
cfaf240320a032t {
compatible = "orise,otm3225a";
reg = <0>;
spi-max-frequency = <1000000>;
// SPI mode 3
spi-cpol;
spi-cpha;
status = "okay";
};
};
&usb {
status = "okay";
};
&usb_ctrl_mod {
status = "okay";
};
&usb0_phy {
status = "okay";
};
&usb1_phy {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};
&cppi41dma {
status = "okay";
};
/*
* Disable soc's rtc as we have no VBAT for it. This makes the board
* rtc (Microchip MCP79400) the default rtc device 'rtc0'.
*/
&rtc {
status = "disabled";
};
&lcdc {
status = "okay";
};
&elm {
status = "okay";
};
#include "tps65910.dtsi"
&tps {
vcc1-supply = <&vbat>;
vcc2-supply = <&vbat>;
vcc3-supply = <&vbat>;
vcc4-supply = <&vbat>;
vcc5-supply = <&vbat>;
vcc6-supply = <&vbat>;
vcc7-supply = <&vbat>;
vccio-supply = <&vbat>;
regulators {
vrtc_reg: regulator@0 {
regulator-name = "ldo_vrtc";
regulator-always-on;
};
vio_reg: regulator@1 {
regulator-name = "buck_vdd_ddr";
regulator-always-on;
};
vdd1_reg: regulator@2 {
/* VDD_MPU voltage limits */
regulator-name = "buck_vdd_mpu";
regulator-min-microvolt = <912500>;
regulator-max-microvolt = <1312500>;
regulator-boot-on;
regulator-always-on;
};
vdd2_reg: regulator@3 {
/* VDD_CORE voltage limits */
regulator-name = "buck_vdd_core";
regulator-min-microvolt = <912500>;
regulator-max-microvolt = <1150000>;
regulator-boot-on;
regulator-always-on;
};
vdd3_reg: regulator@4 {
regulator-name = "boost_res";
regulator-always-on;
};
vdig1_reg: regulator@5 {
regulator-name = "ldo_vdig1";
regulator-always-on;
};
vdig2_reg: regulator@6 {
regulator-name = "ldo_vdig2";
regulator-always-on;
};
vpll_reg: regulator@7 {
regulator-name = "ldo_vpll";
regulator-always-on;
};
vdac_reg: regulator@8 {
regulator-name = "ldo_vdac";
regulator-always-on;
};
vaux1_reg: regulator@9 {
regulator-name = "ldo_vaux1";
regulator-always-on;
};
vaux2_reg: regulator@10 {
regulator-name = "ldo_vaux2";
regulator-always-on;
};
vaux33_reg: regulator@11 {
regulator-name = "ldo_vaux33";
regulator-always-on;
};
vmmc_reg: regulator@12 {
regulator-name = "ldo_vmmc";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vbb_reg: regulator@13 {
regulator-name = "bat_vbb";
};
};
};
&mac {
pinctrl-names = "default";
pinctrl-0 = <&cpsw_default>;
dual_emac; /* no switch, two distinct MACs */
status = "okay";
};
&davinci_mdio {
pinctrl-names = "default";
pinctrl-0 = <&davinci_mdio_default>;
status = "okay";
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <0>;
phy-mode = "mii";
dual_emac_res_vlan = <1>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <1>;
phy-mode = "mii";
dual_emac_res_vlan = <2>;
};
&tscadc {
status = "okay";
tsc {
ti,wires = <4>;
ti,x-plate-resistance = <200>;
ti,coordinate-readouts = <5>;
ti,wire-config = <0x01 0x10 0x22 0x33>;
ti,charge-delay = <0x400>;
};
adc {
ti,adc-channels = <4 5 6 7>;
};
};
&mmc1 {
status = "okay";
vmmc-supply = <&vmmc_reg>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
non-removable;
};
&mmc2 {
status = "okay";
vmmc-supply = <&vmmc_reg>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
cd-gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
};
&sham {
status = "okay";
};
&aes {
status = "okay";
};
&dcan0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&dcan0_pins>;
};

View File

@@ -0,0 +1,100 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "am57xx-idk-common.dtsi"
/ {
memory@0 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x80000000>;
};
status-leds {
compatible = "gpio-leds";
cpu0-led {
label = "status0:red:cpu0";
gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "cpu0";
};
usr0-led {
label = "status0:green:usr";
gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
heartbeat-led {
label = "status0:blue:heartbeat";
gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "heartbeat";
};
cpu1-led {
label = "status1:red:cpu1";
gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "cpu1";
};
usr1-led {
label = "status1:green:usr";
gpios = <&gpio7 23 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
mmc0-led {
label = "status1:blue:mmc0";
gpios = <&gpio7 22 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "mmc0";
};
};
};
&omap_dwc3_2 {
extcon = <&extcon_usb2>;
};
&extcon_usb2 {
id-gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>;
vbus-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>;
};
&sn65hvs882 {
load-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
};
&pcie1_rc {
status = "okay";
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
};
&pcie1_ep {
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
};
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
status = "okay";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
status = "okay";
};
};
&mailbox6 {
status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
status = "okay";
};
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
status = "okay";
};
};

View File

@@ -9,8 +9,7 @@
/dts-v1/;
#include "dra74x.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "am572x-idk-common.dtsi"
#include "am57xx-idk-common.dtsi"
#include "dra74x-mmc-iodelay.dtsi"
@@ -18,54 +17,6 @@
model = "TI AM5728 IDK";
compatible = "ti,am5728-idk", "ti,am5728", "ti,dra742", "ti,dra74",
"ti,dra7";
memory@0 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x80000000>;
};
status-leds {
compatible = "gpio-leds";
cpu0-led {
label = "status0:red:cpu0";
gpios = <&gpio4 0 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "cpu0";
};
usr0-led {
label = "status0:green:usr";
gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
heartbeat-led {
label = "status0:blue:heartbeat";
gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "heartbeat";
};
cpu1-led {
label = "status1:red:cpu1";
gpios = <&gpio3 10 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "cpu1";
};
usr1-led {
label = "status1:green:usr";
gpios = <&gpio7 23 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
mmc0-led {
label = "status1:blue:mmc0";
gpios = <&gpio7 22 GPIO_ACTIVE_HIGH>;
default-state = "off";
linux,default-trigger = "mmc0";
};
};
};
&mmc1 {
@@ -85,45 +36,3 @@
pinctrl-1 = <&mmc2_pins_hs>;
pinctrl-2 = <&mmc2_pins_ddr_rev20>;
};
&omap_dwc3_2 {
extcon = <&extcon_usb2>;
};
&extcon_usb2 {
id-gpio = <&gpio3 16 GPIO_ACTIVE_HIGH>;
vbus-gpio = <&gpio3 26 GPIO_ACTIVE_HIGH>;
};
&sn65hvs882 {
load-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
};
&pcie1_rc {
status = "okay";
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
};
&pcie1_ep {
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
};
&mailbox5 {
status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
status = "okay";
};
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
status = "okay";
};
};
&mailbox6 {
status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
status = "okay";
};
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
status = "okay";
};
};

View File

@@ -0,0 +1,22 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
*/
/dts-v1/;
#include "dra76x.dtsi"
#include "am572x-idk-common.dtsi"
/ {
model = "TI AM5748 IDK";
compatible = "ti,am5728-idk", "ti,dra762", "ti,dra7";
};
&qspi {
spi-max-frequency = <96000000>;
m25p80@0 {
spi-max-frequency = <96000000>;
};
};

View File

@@ -25,6 +25,11 @@
pinctrl-1 = <&mmc1_pins_hs>;
vmmc-supply = <&ldo1_reg>;
/delete-property/ sd-uhs-sdr104;
/delete-property/ sd-uhs-sdr50;
/delete-property/ sd-uhs-ddr50;
/delete-property/ sd-uhs-sdr25;
/delete-property/ sd-uhs-sdr12;
};
&mmc2 {
@@ -32,6 +37,7 @@
pinctrl-0 = <&mmc2_pins_default>;
pinctrl-1 = <&mmc2_pins_hs>;
pinctrl-2 = <&mmc2_pins_ddr_3_3v_rev11 &mmc2_iodelay_ddr_3_3v_rev11_conf>;
/delete-property/ mmc-hs200-1_8v;
};
/* errata i880 "Ethernet RGMII2 Limited to 10/100 Mbps" */

View File

@@ -1,3 +1,4 @@
// SPDX-License-Identifier: GPL-2.0
&cpu_alert0 {
temperature = <80000>; /* milliCelsius */
};

View File

@@ -413,6 +413,8 @@
bus-width = <8>;
ti,non-removable;
max-frequency = <96000000>;
no-1-8-v;
/delete-property/ mmc-hs200-1_8v;
};
&dcan1 {

View File

@@ -1,3 +1,4 @@
// SPDX-License-Identifier: GPL-2.0
&cpu_alert0 {
temperature = <90000>; /* milliCelsius */
};

View File

@@ -53,7 +53,7 @@
aliases {
ethernet0 = &eth0;
ethernet1 = &eth1;
ethernet1 = &eth2;
i2c0 = &i2c0;
spi1 = &spi1;
};

View File

@@ -20,3 +20,7 @@
skip-init;
u-boot,dm-pre-reloc;
};
&gpio {
u-boot,dm-pre-reloc;
};

View File

@@ -246,7 +246,7 @@
jtag_gpio4: jtag_gpio4 {
brcm,pins = <4 5 6 12 13>;
brcm,function = <BCM2835_FSEL_ALT4>;
brcm,function = <BCM2835_FSEL_ALT5>;
};
jtag_gpio22: jtag_gpio22 {
brcm,pins = <22 23 24 25 26 27>;

View File

@@ -1056,7 +1056,7 @@
};
mmc1: mmc@4809c000 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
reg = <0x4809c000 0x400>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc1";
@@ -1067,10 +1067,15 @@
status = "disabled";
pbias-supply = <&pbias_mmc_reg>;
max-frequency = <192000000>;
sd-uhs-sdr104;
sd-uhs-sdr50;
sd-uhs-ddr50;
sd-uhs-sdr25;
sd-uhs-sdr12;
};
mmc2: mmc@480b4000 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
reg = <0x480b4000 0x400>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc2";
@@ -1079,10 +1084,14 @@
dma-names = "tx", "rx";
status = "disabled";
max-frequency = <192000000>;
sd-uhs-sdr25;
sd-uhs-sdr12;
mmc-hs200-1_8v;
mmc-ddr-1_8v;
};
mmc3: mmc@480ad000 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
reg = <0x480ad000 0x400>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc3";
@@ -1092,10 +1101,13 @@
status = "disabled";
/* Errata i887 limits max-frequency of MMC3 to 64 MHz */
max-frequency = <64000000>;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
};
mmc4: mmc@480d1000 {
compatible = "ti,omap4-hsmmc";
compatible = "ti,dra7-hsmmc", "ti,omap4-hsmmc";
reg = <0x480d1000 0x400>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "mmc4";
@@ -1104,6 +1116,8 @@
dma-names = "tx", "rx";
status = "disabled";
max-frequency = <192000000>;
sd-uhs-sdr12;
sd-uhs-sdr25;
};
mmu0_dsp1: mmu@40d01000 {

View File

@@ -23,11 +23,16 @@
reg = <0 0x80000000 0 0x3da00000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
};
chosen {
stdout-path = "/soc/serial@78b0000";
};
soc {
#address-cells = <0x1>;
#size-cells = <0x1>;
@@ -48,11 +53,6 @@
clock = <&clkc 4>;
};
restart@4ab000 {
compatible = "qcom,pshold";
reg = <0x4ab000 0x4>;
};
soc_gpios: pinctrl@1000000 {
compatible = "qcom,apq8016-pinctrl";
reg = <0x1000000 0x300000>;
@@ -86,6 +86,16 @@
clock-frequency = <200000000>;
};
wcnss {
bt {
compatible="qcom,wcnss-bt";
};
wifi {
compatible="qcom,wcnss-wlan";
};
};
spmi@200f000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0x200f800 0x200 0x2400000 0x400000 0x2c00000 0x400000>;

View File

@@ -0,0 +1,19 @@
/*
* U-Boot addition to handle Dragonboard 820c pins
*
* (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
*
* SPDX-License-Identifier: GPL-2.0+
*/
&pm8994_pon {
key_vol_down {
gpios = <&pm8994_pon 1 0>;
label = "key_vol_down";
};
key_power {
gpios = <&pm8994_pon 0 0>;
label = "key_power";
};
};

View File

@@ -0,0 +1,108 @@
/*
* Qualcomm APQ8096 based Dragonboard 820C board device tree source
*
* (C) Copyright 2017 Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "skeleton64.dtsi"
/ {
model = "Qualcomm Technologies, Inc. DB820c";
compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc";
#address-cells = <2>;
#size-cells = <2>;
aliases {
serial0 = &blsp2_uart1;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
device_type = "memory";
reg = <0 0x80000000 0 0xc0000000>;
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
soc: soc {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0 0 0xffffffff>;
compatible = "simple-bus";
gcc: clock-controller@300000 {
compatible = "qcom,gcc-msm8996";
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
reg = <0x300000 0x90000>;
};
blsp2_uart1: serial@75b0000 {
compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
reg = <0x75b0000 0x1000>;
};
sdhc2: sdhci@74a4900 {
compatible = "qcom,sdhci-msm-v4";
reg = <0x74a4900 0x314>, <0x74a4000 0x800>;
index = <0x0>;
bus-width = <4>;
clock = <&gcc 0>;
clock-frequency = <200000000>;
};
spmi@400f000 {
compatible = "qcom,spmi-pmic-arb";
reg = <0x400f800 0x200>,
<0x4400000 0x400000>,
<0x4c00000 0x400000>;
#address-cells = <0x1>;
#size-cells = <0x1>;
pmic0: pm8994@0 {
compatible = "qcom,spmi-pmic";
reg = <0x0 0x1>;
#address-cells = <0x1>;
#size-cells = <0x1>;
pm8994_pon: pm8994_pon@800 {
compatible = "qcom,pm8994-pwrkey";
reg = <0x800 0x96>;
#gpio-cells = <2>;
gpio-controller;
gpio-bank-name="pm8994_key.";
};
pm8994_gpios: pm8994_gpios@c000 {
compatible = "qcom,pm8994-gpio";
reg = <0xc000 0x400>;
gpio-controller;
gpio-count = <24>;
#gpio-cells = <2>;
gpio-bank-name="pm8994.";
};
};
pmic1: pm8994@1 {
compatible = "qcom,spmi-pmic";
reg = <0x1 0x1>;
#address-cells = <0x1>;
#size-cells = <0x1>;
};
};
};
};
#include "dragonboard820c-uboot.dtsi"

View File

@@ -0,0 +1,92 @@
/*
* Copyright 2017 NXP
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/{
cpus {
#address-cells = <2>;
#size-cells = <0>;
idle-states {
entry-method = "psci";
CPU_SLEEP: cpu-sleep {
compatible = "arm,idle-state";
local-timer-stop;
arm,psci-suspend-param = <0x0000000>;
entry-latency-us = <700>;
exit-latency-us = <250>;
min-residency-us = <1000>;
};
CLUSTER_SLEEP: cluster-sleep {
compatible = "arm,idle-state";
local-timer-stop;
arm,psci-suspend-param = <0x1000000>;
entry-latency-us = <1000>;
exit-latency-us = <700>;
min-residency-us = <2700>;
wakeup-latency-us = <1500>;
};
};
/* We have 1 clusters having 4 Cortex-A53 cores */
A53_0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP>;
};
A53_1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP>;
};
A53_2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x2>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP>;
};
A53_3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53";
reg = <0x0 0x3>;
enable-method = "psci";
next-level-cache = <&A53_L2>;
cpu-idle-states = <&CPU_SLEEP>;
};
A53_L2: l2-cache0 {
compatible = "cache";
};
};
psci {
compatible = "arm,psci-1.0";
method = "smc";
cpu_suspend = <0xc4000001>;
cpu_off = <0xc4000002>;
cpu_on = <0xc4000003>;
};
};

View File

@@ -0,0 +1,429 @@
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
* Copyright 2017 NXP
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include "fsl-imx8-ca53.dtsi"
#include <dt-bindings/clock/imx8mq-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/pins-imx8mq.h>
#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "fsl,imx8mq";
interrupt-parent = <&gpc>;
#address-cells = <2>;
#size-cells = <2>;
aliases {
ethernet0 = &fec1;
mmc0 = &usdhc1;
mmc1 = &usdhc2;
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
gpio3 = &gpio4;
gpio4 = &gpio5;
i2c0 = &i2c1;
i2c1 = &i2c2;
i2c2 = &i2c3;
i2c3 = &i2c4;
};
memory@40000000 {
device_type = "memory";
reg = <0x00000000 0x40000000 0 0xc0000000>;
};
gic: interrupt-controller@38800000 {
compatible = "arm,gic-v3";
reg = <0x0 0x38800000 0 0x10000>, /* GIC Dist */
<0x0 0x38880000 0 0xC0000>; /* GICR (RD_base + SGI_base) */
#interrupt-cells = <3>;
interrupt-controller;
interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&gic>;
};
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) |
IRQ_TYPE_LEVEL_LOW)>, /* Physical Secure */
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) |
IRQ_TYPE_LEVEL_LOW)>, /* Physical Non-Secure */
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) |
IRQ_TYPE_LEVEL_LOW)>, /* Virtual */
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) |
IRQ_TYPE_LEVEL_LOW)>; /* Hypervisor */
clock-frequency = <8333333>;
interrupt-parent = <&gic>;
};
power: power-controller {
compatible = "fsl,imx8mq-pm-domain";
num-domains = <11>;
#power-domain-cells = <1>;
};
pwm2: pwm@30670000 {
compatible = "fsl,imx8mq-pwm", "fsl,imx27-pwm";
reg = <0x0 0x30670000 0x0 0x10000>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_PWM2_ROOT>,
<&clk IMX8MQ_CLK_PWM2_ROOT>;
clock-names = "ipg", "per";
#pwm-cells = <2>;
status = "disabled";
};
gpio1: gpio@30200000 {
compatible = "fsl,imx8mq-gpio", "fsl,imx35-gpio";
reg = <0x0 0x30200000 0x0 0x10000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio2: gpio@30210000 {
compatible = "fsl,imx8mq-gpio", "fsl,imx35-gpio";
reg = <0x0 0x30210000 0x0 0x10000>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio3: gpio@30220000 {
compatible = "fsl,imx8mq-gpio", "fsl,imx35-gpio";
reg = <0x0 0x30220000 0x0 0x10000>;
interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio4: gpio@30230000 {
compatible = "fsl,imx8mq-gpio", "fsl,imx35-gpio";
reg = <0x0 0x30230000 0x0 0x10000>;
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio5: gpio@30240000 {
compatible = "fsl,imx8mq-gpio", "fsl,imx35-gpio";
reg = <0x0 0x30240000 0x0 0x10000>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
tmu: tmu@30260000 {
compatible = "fsl,imx8mq-tmu";
reg = <0x0 0x30260000 0x0 0x10000>;
interrupt = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
little-endian;
u-boot,dm-pre-reloc;
fsl,tmu-range = <0xa0000 0x90026 0x8004a 0x1006a>;
fsl,tmu-calibration = <0x00000000 0x00000020
0x00000001 0x00000028
0x00000002 0x00000030
0x00000003 0x00000038
0x00000004 0x00000040
0x00000005 0x00000048
0x00000006 0x00000050
0x00000007 0x00000058
0x00000008 0x00000060
0x00000009 0x00000068
0x0000000a 0x00000070
0x0000000b 0x00000077
0x00010000 0x00000057
0x00010001 0x0000005b
0x00010002 0x0000005f
0x00010003 0x00000063
0x00010004 0x00000067
0x00010005 0x0000006b
0x00010006 0x0000006f
0x00010007 0x00000073
0x00010008 0x00000077
0x00010009 0x0000007b
0x0001000a 0x0000007f
0x00020000 0x00000002
0x00020001 0x0000000e
0x00020002 0x0000001a
0x00020003 0x00000026
0x00020004 0x00000032
0x00020005 0x0000003e
0x00020006 0x0000004a
0x00020007 0x00000056
0x00020008 0x00000062
0x00030000 0x00000000
0x00030001 0x00000008
0x00030002 0x00000010
0x00030003 0x00000018
0x00030004 0x00000020
0x00030005 0x00000028
0x00030006 0x00000030
0x00030007 0x00000038>;
#thermal-sensor-cells = <0>;
};
thermal-zones {
/* cpu thermal */
cpu-thermal {
polling-delay-passive = <250>;
polling-delay = <2000>;
thermal-sensors = <&tmu>;
trips {
cpu_alert0: trip0 {
temperature = <85000>;
hysteresis = <2000>;
type = "passive";
};
cpu_crit0: trip1 {
temperature = <125000>;
hysteresis = <2000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu_alert0>;
cooling-device =
<&A53_0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
lcdif: lcdif@30320000 {
compatible = "fsl,imx8mq-lcdif", "fsl,imx28-lcdif";
reg = <0x0 0x30320000 0x0 0x10000>;
clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL_DIV>,
<&clk IMX8MQ_CLK_DUMMY>,
<&clk IMX8MQ_CLK_DUMMY>;
clock-names = "pix", "axi", "disp_axi";
assigned-clocks = <&clk IMX8MQ_CLK_LCDIF_PIXEL_SRC>;
assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>;
assigned-clock-rate = <594000000>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
iomuxc: iomuxc@30330000 {
compatible = "fsl,imx8mq-iomuxc";
reg = <0x0 0x30330000 0x0 0x10000>;
};
gpr: iomuxc-gpr@30340000 {
compatible = "fsl,imx8mq-iomuxc-gpr", "fsl,imx7d-iomuxc-gpr", "syscon";
reg = <0x0 0x30340000 0x0 0x10000>;
};
ocotp: ocotp-ctrl@30350000 {
compatible = "fsl,imx8mq-ocotp", "fsl,imx7d-ocotp", "syscon";
reg = <0x0 0x30350000 0x0 0x10000>;
};
anatop: anatop@30360000 {
compatible = "fsl,imx8mq-anatop", "fsl,imx6q-anatop",
"syscon", "simple-bus";
reg = <0x0 0x30360000 0x0 0x10000>;
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
};
clk: ccm@30380000 {
compatible = "fsl,imx8mq-ccm";
reg = <0x0 0x30380000 0x0 0x10000>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
};
gpc: gpc@303a0000 {
compatible = "fsl,imx8mq-gpc", "fsl,imx7d-gpc", "syscon";
reg = <0x0 0x303a0000 0x0 0x10000>;
interrupt-controller;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <3>;
interrupt-parent = <&gic>;
};
usdhc1: usdhc@30b40000 {
compatible = "fsl,imx8mq-usdhc", "fsl,imx7d-usdhc";
reg = <0x0 0x30b40000 0x0 0x10000>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_DUMMY>,
<&clk IMX8MQ_CLK_NAND_USDHC_BUS_DIV>,
<&clk IMX8MQ_CLK_USDHC1_ROOT>;
clock-names = "ipg", "ahb", "per";
assigned-clocks = <&clk IMX8MQ_CLK_USDHC1_DIV>;
assigned-clock-rates = <400000000>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
bus-width = <4>;
status = "disabled";
};
usdhc2: usdhc@30b50000 {
compatible = "fsl,imx8mq-usdhc", "fsl,imx7d-usdhc";
reg = <0x0 0x30b50000 0x0 0x10000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_DUMMY>,
<&clk IMX8MQ_CLK_NAND_USDHC_BUS_DIV>,
<&clk IMX8MQ_CLK_USDHC2_ROOT>;
clock-names = "ipg", "ahb", "per";
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
bus-width = <4>;
status = "disabled";
};
fec1: ethernet@30be0000 {
compatible = "fsl,imx8mq-fec", "fsl,imx6sx-fec";
reg = <0x0 0x30be0000 0x0 0x10000>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_ENET1_ROOT>,
<&clk IMX8MQ_CLK_ENET1_ROOT>,
<&clk IMX8MQ_CLK_ENET_TIMER_DIV>,
<&clk IMX8MQ_CLK_ENET_REF_DIV>,
<&clk IMX8MQ_CLK_ENET_PHY_REF_DIV>;
clock-names = "ipg", "ahb", "ptp",
"enet_clk_ref", "enet_out";
assigned-clocks = <&clk IMX8MQ_CLK_ENET_AXI_SRC>,
<&clk IMX8MQ_CLK_ENET_TIMER_SRC>,
<&clk IMX8MQ_CLK_ENET_REF_SRC>,
<&clk IMX8MQ_CLK_ENET_TIMER_DIV>;
assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_266M>,
<&clk IMX8MQ_SYS2_PLL_100M>,
<&clk IMX8MQ_SYS2_PLL_125M>;
assigned-clock-rates = <0>, <0>, <125000000>, <100000000>;
stop-mode = <&gpr 0x10 3>;
fsl,num-tx-queues=<3>;
fsl,num-rx-queues=<3>;
fsl,wakeup_irq = <2>;
status = "disabled";
};
imx_ion {
compatible = "fsl,mxc-ion";
fsl,heap-id = <0>;
};
i2c1: i2c@30a20000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx21-i2c";
reg = <0x0 0x30a20000 0x0 0x10000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_I2C1_ROOT>;
status = "disabled";
};
i2c2: i2c@30a30000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx21-i2c";
reg = <0x0 0x30a30000 0x0 0x10000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_I2C2_ROOT>;
status = "disabled";
};
i2c3: i2c@30a40000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx21-i2c";
reg = <0x0 0x30a40000 0x0 0x10000>;
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_I2C3_ROOT>;
status = "disabled";
};
i2c4: i2c@30a50000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx21-i2c";
reg = <0x0 0x30a50000 0x0 0x10000>;
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_I2C4_ROOT>;
status = "disabled";
};
wdog1: wdog@30280000 {
compatible = "fsl,imx21-wdt";
reg = <0 0x30280000 0 0x10000>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_WDOG1_ROOT>;
status = "disabled";
};
wdog2: wdog@30290000 {
compatible = "fsl,imx21-wdt";
reg = <0 0x30290000 0 0x10000>;
interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_WDOG2_ROOT>;
status = "disabled";
};
wdog3: wdog@302a0000 {
compatible = "fsl,imx21-wdt";
reg = <0 0x302a0000 0 0x10000>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_WDOG3_ROOT>;
status = "disabled";
};
dma_cap: dma_cap {
compatible = "dma-capability";
only-dma-mask32 = <1>;
};
qspi: qspi@30bb0000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx7d-qspi";
reg = <0 0x30bb0000 0 0x10000>, <0 0x08000000 0 0x10000000>;
reg-names = "QuadSPI", "QuadSPI-memory";
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk IMX8MQ_CLK_QSPI_ROOT>,
<&clk IMX8MQ_CLK_QSPI_ROOT>;
clock-names = "qspi_en", "qspi";
status = "disabled";
};
};
&A53_0 {
#cooling-cells = <2>;
};

View File

@@ -0,0 +1,43 @@
/*
* NXP ls1012a 2G5RDB board device tree source
*
* Copyright 2017 NXP
*
* SPDX-License-Identifier: GPL-2.0+
*/
/dts-v1/;
#include "fsl-ls1012a.dtsi"
/ {
model = "LS1012A 2G5RDB Board";
aliases {
spi0 = &qspi;
};
chosen {
stdout-path = &duart0;
};
};
&qspi {
bus-num = <0>;
status = "okay";
qflash0: s25fl128s@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-flash";
spi-max-frequency = <20000000>;
reg = <0>;
};
};
&i2c0 {
status = "okay";
};
&duart0 {
status = "okay";
};

View File

@@ -3,7 +3,7 @@
*
* Copyright 2016, Freescale Semiconductor
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

View File

@@ -3,7 +3,7 @@
*
* Copyright 2016, Freescale Semiconductor
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/include/ "fsl-ls1012a.dtsi"

View File

@@ -1,7 +1,7 @@
/*
* Copyright 2016 Freescale Semiconductor
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

View File

@@ -1,7 +1,7 @@
/*
* Copyright 2016 Freescale Semiconductor
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/include/ "fsl-ls1012a.dtsi"
@@ -121,3 +121,8 @@
&duart0 {
status = "okay";
};
&usb0 {
status = "okay";
phy_type = "ulpi";
};

View File

@@ -3,7 +3,7 @@
*
* Copyright 2016, Freescale Semiconductor
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

View File

@@ -3,9 +3,7 @@
*
* Copyright 2016, Freescale Semiconductor
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/include/ "fsl-ls1012a.dtsi"

View File

@@ -1,7 +1,7 @@
/*
* Copyright 2016 Freescale Semiconductor
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/include/ "skeleton64.dtsi"

View File

@@ -3,7 +3,7 @@
*
* Copyright (C) 2015, Freescale Semiconductor
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

View File

@@ -3,7 +3,7 @@
*
* Copyright (C) 2015, Freescale Semiconductor
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

View File

@@ -5,9 +5,7 @@
*
* Mingkai Hu <Mingkai.hu@freescale.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/include/ "fsl-ls1043a.dtsi"

View File

@@ -5,9 +5,7 @@
*
* Mingkai Hu <Mingkai.hu@freescale.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

View File

@@ -5,9 +5,7 @@
*
* Mingkai Hu <Mingkai.hu@freescale.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/include/ "skeleton64.dtsi"

View File

@@ -3,7 +3,7 @@
*
* Copyright (C) 2016, Freescale Semiconductor
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

View File

@@ -3,7 +3,7 @@
*
* Copyright (C) 2016, Freescale Semiconductor
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

View File

@@ -5,9 +5,7 @@
*
* Mingkai Hu <Mingkai.hu@nxp.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/include/ "fsl-ls1046a.dtsi"

View File

@@ -5,9 +5,7 @@
*
* Mingkai Hu <Mingkai.hu@freescale.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

View File

@@ -5,9 +5,7 @@
*
* Mingkai Hu <mingkai.hu@nxp.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/include/ "skeleton64.dtsi"

View File

@@ -3,7 +3,7 @@
*
* Copyright 2017 NXP
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

View File

@@ -3,7 +3,7 @@
*
* Copyright 2017 NXP
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

View File

@@ -3,7 +3,7 @@
*
* Copyright 2017 NXP
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/ {

View File

@@ -3,7 +3,7 @@
*
* Copyright 2013-2015 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

View File

@@ -3,7 +3,7 @@
*
* Copyright 2013-2015 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

View File

@@ -3,7 +3,7 @@
*
* Copyright 2013-2015 Freescale Semiconductor, Inc.
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/ {

View File

@@ -5,7 +5,7 @@
*
* Copyright 2017 NXP
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

View File

@@ -5,7 +5,7 @@
*
* Copyright 2017 NXP
*
* SPDX-License-Identifier: GPL-2.0+
* SPDX-License-Identifier: GPL-2.0+ X11
*/
/dts-v1/;

View File

@@ -0,0 +1,21 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2017 Engicam S.r.l.
* Copyright (C) 2017 Amarula Solutions B.V.
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-icore.dtsi"
/ {
model = "Engicam i.CoreM6 DualLite/Solo MIPI Starter Kit";
compatible = "engicam,imx6-icore", "fsl,imx6dl";
};
&usdhc3 {
u-boot,dm-spl;
status = "okay";
};

View File

@@ -41,7 +41,7 @@
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6dl.dtsi"
#include "imx6qdl-icore-rqs.dtsi"
/ {

View File

@@ -0,0 +1,21 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2017 Engicam S.r.l.
* Copyright (C) 2017 Amarula Solutions B.V.
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-icore.dtsi"
/ {
model = "Engicam i.CoreM6 Quad/Dual MIPI Starter Kit";
compatible = "engicam,imx6-icore", "fsl,imx6q";
};
&usdhc3 {
u-boot,dm-spl;
status = "okay";
};

View File

@@ -114,9 +114,14 @@
};
&usdhc4 {
pinctrl-names = "default";
u-boot,dm-spl;
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc4>;
pinctrl-1 = <&pinctrl_usdhc4_100mhz>;
pinctrl-2 = <&pinctrl_usdhc4_200mhz>;
bus-witdh = <8>;
no-1-8-v;
non-removable;
status = "okay";
};
@@ -183,6 +188,7 @@
};
pinctrl_usdhc4: usdhc4grp {
u-boot,dm-spl;
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
@@ -196,4 +202,35 @@
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
>;
};
pinctrl_usdhc4_100mhz: usdhc4grp_100mhz {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170B1
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100B1
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170B1
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170B1
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170B1
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170B1
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170B1
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170B1
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170B1
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170B1
>;
};
pinctrl_usdhc4_200mhz: usdhc4grp_200mhz {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x170F9
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x100F9
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x170F9
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x170F9
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x170F9
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x170F9
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x170F9
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x170F9
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x170F9
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x170F9
>;
};
};

View File

@@ -44,6 +44,10 @@
#include <dt-bindings/input/input.h>
/ {
aliases {
mmc1 = &usdhc3;
};
memory {
reg = <0x10000000 0x80000000>;
};
@@ -126,6 +130,14 @@
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
no-1-8-v;
non-removable;
status = "disabled";
};
&iomuxc {
pinctrl_enet: enetgrp {
fsl,pins = <
@@ -219,4 +231,20 @@
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17070
>;
};
pinctrl_usdhc3: usdhc3grp {
u-boot,dm-spl;
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
};
};

138
arch/arm/dts/imx6sx-sdb.dts Normal file
View File

@@ -0,0 +1,138 @@
/*
* Copyright (C) 2015 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include "imx6sx-sdb.dtsi"
/ {
model = "Freescale i.MX6 SoloX SDB RevB Board";
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
pmic: pfuze100@8 {
compatible = "fsl,pfuze200";
reg = <0x08>;
regulators {
sw1a_reg: sw1ab {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw2_reg: sw2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
sw3a_reg: sw3a {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-boot-on;
regulator-always-on;
};
sw3b_reg: sw3b {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-boot-on;
regulator-always-on;
};
swbst_reg: swbst {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5150000>;
};
snvs_reg: vsnvs {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3000000>;
regulator-boot-on;
regulator-always-on;
};
vref_reg: vrefddr {
regulator-boot-on;
regulator-always-on;
};
vgen1_reg: vgen1 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
regulator-always-on;
};
vgen2_reg: vgen2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
};
vgen3_reg: vgen3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen4_reg: vgen4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen5_reg: vgen5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen6_reg: vgen6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
};
&qspi2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_qspi2>;
status = "okay";
flash0: n25q256a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";
spi-max-frequency = <29000000>;
reg = <0>;
};
flash1: n25q256a@1 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a", "jedec,spi-nor";
spi-max-frequency = <29000000>;
reg = <1>;
};
};
&reg_arm {
vin-supply = <&sw1a_reg>;
};
&reg_soc {
vin-supply = <&sw1a_reg>;
};

View File

@@ -0,0 +1,612 @@
/*
* Copyright (C) 2014 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "imx6sx.dtsi"
/ {
model = "Freescale i.MX6 SoloX SDB Board";
compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
chosen {
stdout-path = &uart1;
};
memory {
reg = <0x80000000 0x40000000>;
};
backlight {
compatible = "pwm-backlight";
pwms = <&pwm3 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <6>;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_keys>;
volume-up {
label = "Volume Up";
gpios = <&gpio1 18 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEUP>;
};
volume-down {
label = "Volume Down";
gpios = <&gpio1 19 GPIO_ACTIVE_LOW>;
linux,code = <KEY_VOLUMEDOWN>;
};
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
vcc_sd3: regulator@0 {
compatible = "regulator-fixed";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_vcc_sd3>;
regulator-name = "VCC_SD3";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usb_otg1_vbus: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg1>;
regulator-name = "usb_otg1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 9 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_usb_otg2_vbus: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg2>;
regulator-name = "usb_otg2_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_psu_5v: regulator@3 {
compatible = "regulator-fixed";
reg = <3>;
regulator-name = "PSU-5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_lcd_3v3: regulator@4 {
compatible = "regulator-fixed";
reg = <4>;
regulator-name = "lcd-3v3";
gpio = <&gpio3 27 0>;
enable-active-high;
};
reg_peri_3v3: regulator@5 {
compatible = "regulator-fixed";
reg = <5>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_peri_3v3>;
regulator-name = "peri_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio4 16 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
reg_enet_3v3: regulator@6 {
compatible = "regulator-fixed";
reg = <6>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet_3v3>;
regulator-name = "enet_3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
};
};
sound {
compatible = "fsl,imx6sx-sdb-wm8962", "fsl,imx-audio-wm8962";
model = "wm8962-audio";
ssi-controller = <&ssi2>;
audio-codec = <&codec>;
audio-routing =
"Headphone Jack", "HPOUTL",
"Headphone Jack", "HPOUTR",
"Ext Spk", "SPKOUTL",
"Ext Spk", "SPKOUTR",
"AMIC", "MICBIAS",
"IN3R", "AMIC";
mux-int-port = <2>;
mux-ext-port = <6>;
};
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
phy-supply = <&reg_enet_3v3>;
phy-mode = "rgmii";
phy-handle = <&ethphy1>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy1: ethernet-phy@1 {
reg = <1>;
};
ethphy2: ethernet-phy@2 {
reg = <2>;
};
};
};
&fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2>;
phy-mode = "rgmii";
phy-handle = <&ethphy2>;
status = "okay";
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
};
&i2c4 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4>;
status = "okay";
codec: wm8962@1a {
compatible = "wlf,wm8962";
reg = <0x1a>;
clocks = <&clks IMX6SX_CLK_AUDIO>;
DCVDD-supply = <&vgen4_reg>;
DBVDD-supply = <&vgen4_reg>;
AVDD-supply = <&vgen4_reg>;
CPVDD-supply = <&vgen4_reg>;
MICVDD-supply = <&vgen3_reg>;
PLLVDD-supply = <&vgen4_reg>;
SPKVDD1-supply = <&reg_psu_5v>;
SPKVDD2-supply = <&reg_psu_5v>;
};
};
&lcdif1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcd>;
lcd-supply = <&reg_lcd_3v3>;
display = <&display0>;
status = "okay";
display0: display0 {
bits-per-pixel = <16>;
bus-width = <24>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <33500000>;
hactive = <800>;
vactive = <480>;
hback-porch = <89>;
hfront-porch = <164>;
vback-porch = <23>;
vfront-porch = <10>;
hsync-len = <10>;
vsync-len = <10>;
hsync-active = <0>;
vsync-active = <0>;
de-active = <1>;
pixelclk-active = <0>;
};
};
};
};
&pwm3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm3>;
status = "okay";
};
&snvs_poweroff {
status = "okay";
};
&sai1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sai1>;
status = "disabled";
};
&ssi2 {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart5 { /* for bluetooth */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
uart-has-rtscts;
status = "okay";
};
&usbotg1 {
vbus-supply = <&reg_usb_otg1_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usb_otg1_id>;
status = "okay";
};
&usbotg2 {
vbus-supply = <&reg_usb_otg2_vbus>;
dr_mode = "host";
status = "okay";
};
&usbphy1 {
fsl,tx-d-cal = <106>;
};
&usbphy2 {
fsl,tx-d-cal = <106>;
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
non-removable;
no-1-8-v;
keep-power-in-suspend;
wakeup-source;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
bus-width = <8>;
cd-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
keep-power-in-suspend;
wakeup-source;
vmmc-supply = <&vcc_sd3>;
status = "okay";
};
&usdhc4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4>;
cd-gpios = <&gpio6 21 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio6 20 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
};
&iomuxc {
imx6x-sdb {
pinctrl_audmux: audmuxgrp {
fsl,pins = <
MX6SX_PAD_CSI_DATA00__AUDMUX_AUD6_TXC 0x130b0
MX6SX_PAD_CSI_DATA01__AUDMUX_AUD6_TXFS 0x130b0
MX6SX_PAD_CSI_HSYNC__AUDMUX_AUD6_TXD 0x120b0
MX6SX_PAD_CSI_VSYNC__AUDMUX_AUD6_RXD 0x130b0
MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK 0x130b0
>;
};
pinctrl_enet1: enet1grp {
fsl,pins = <
MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1
MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1
MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b1
MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1
MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1
MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0xa0b1
MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0xa0b1
MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1
MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081
MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081
MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081
MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081
MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081
MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
MX6SX_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M 0x91
>;
};
pinctrl_enet_3v3: enet3v3grp {
fsl,pins = <
MX6SX_PAD_ENET2_COL__GPIO2_IO_6 0x80000000
>;
};
pinctrl_enet2: enet2grp {
fsl,pins = <
MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC 0xa0b9
MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0 0xa0b1
MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1 0xa0b1
MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2 0xa0b1
MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3 0xa0b1
MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN 0xa0b1
MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK 0x3081
MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0 0x3081
MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1 0x3081
MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2 0x3081
MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3 0x3081
MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN 0x3081
>;
};
pinctrl_gpio_keys: gpio_keysgrp {
fsl,pins = <
MX6SX_PAD_CSI_DATA04__GPIO1_IO_18 0x17059
MX6SX_PAD_CSI_DATA05__GPIO1_IO_19 0x17059
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x4001b8b1
MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x4001b8b1
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1
MX6SX_PAD_KEY_COL4__I2C3_SCL 0x4001b8b1
>;
};
pinctrl_i2c4: i2c4grp {
fsl,pins = <
MX6SX_PAD_CSI_DATA07__I2C4_SDA 0x4001b8b1
MX6SX_PAD_CSI_DATA06__I2C4_SCL 0x4001b8b1
>;
};
pinctrl_lcd: lcdgrp {
fsl,pins = <
MX6SX_PAD_LCD1_DATA00__LCDIF1_DATA_0 0x4001b0b0
MX6SX_PAD_LCD1_DATA01__LCDIF1_DATA_1 0x4001b0b0
MX6SX_PAD_LCD1_DATA02__LCDIF1_DATA_2 0x4001b0b0
MX6SX_PAD_LCD1_DATA03__LCDIF1_DATA_3 0x4001b0b0
MX6SX_PAD_LCD1_DATA04__LCDIF1_DATA_4 0x4001b0b0
MX6SX_PAD_LCD1_DATA05__LCDIF1_DATA_5 0x4001b0b0
MX6SX_PAD_LCD1_DATA06__LCDIF1_DATA_6 0x4001b0b0
MX6SX_PAD_LCD1_DATA07__LCDIF1_DATA_7 0x4001b0b0
MX6SX_PAD_LCD1_DATA08__LCDIF1_DATA_8 0x4001b0b0
MX6SX_PAD_LCD1_DATA09__LCDIF1_DATA_9 0x4001b0b0
MX6SX_PAD_LCD1_DATA10__LCDIF1_DATA_10 0x4001b0b0
MX6SX_PAD_LCD1_DATA11__LCDIF1_DATA_11 0x4001b0b0
MX6SX_PAD_LCD1_DATA12__LCDIF1_DATA_12 0x4001b0b0
MX6SX_PAD_LCD1_DATA13__LCDIF1_DATA_13 0x4001b0b0
MX6SX_PAD_LCD1_DATA14__LCDIF1_DATA_14 0x4001b0b0
MX6SX_PAD_LCD1_DATA15__LCDIF1_DATA_15 0x4001b0b0
MX6SX_PAD_LCD1_DATA16__LCDIF1_DATA_16 0x4001b0b0
MX6SX_PAD_LCD1_DATA17__LCDIF1_DATA_17 0x4001b0b0
MX6SX_PAD_LCD1_DATA18__LCDIF1_DATA_18 0x4001b0b0
MX6SX_PAD_LCD1_DATA19__LCDIF1_DATA_19 0x4001b0b0
MX6SX_PAD_LCD1_DATA20__LCDIF1_DATA_20 0x4001b0b0
MX6SX_PAD_LCD1_DATA21__LCDIF1_DATA_21 0x4001b0b0
MX6SX_PAD_LCD1_DATA22__LCDIF1_DATA_22 0x4001b0b0
MX6SX_PAD_LCD1_DATA23__LCDIF1_DATA_23 0x4001b0b0
MX6SX_PAD_LCD1_CLK__LCDIF1_CLK 0x4001b0b0
MX6SX_PAD_LCD1_ENABLE__LCDIF1_ENABLE 0x4001b0b0
MX6SX_PAD_LCD1_VSYNC__LCDIF1_VSYNC 0x4001b0b0
MX6SX_PAD_LCD1_HSYNC__LCDIF1_HSYNC 0x4001b0b0
MX6SX_PAD_LCD1_RESET__GPIO3_IO_27 0x4001b0b0
>;
};
pinctrl_peri_3v3: peri3v3grp {
fsl,pins = <
MX6SX_PAD_QSPI1A_DATA0__GPIO4_IO_16 0x80000000
>;
};
pinctrl_pwm3: pwm3grp-1 {
fsl,pins = <
MX6SX_PAD_SD1_DATA2__PWM3_OUT 0x110b0
>;
};
pinctrl_qspi2: qspi2grp {
fsl,pins = <
MX6SX_PAD_NAND_WP_B__QSPI2_A_DATA_0 0x70f1
MX6SX_PAD_NAND_READY_B__QSPI2_A_DATA_1 0x70f1
MX6SX_PAD_NAND_CE0_B__QSPI2_A_DATA_2 0x70f1
MX6SX_PAD_NAND_CE1_B__QSPI2_A_DATA_3 0x70f1
MX6SX_PAD_NAND_CLE__QSPI2_A_SCLK 0x70f1
MX6SX_PAD_NAND_ALE__QSPI2_A_SS0_B 0x70f1
MX6SX_PAD_NAND_DATA01__QSPI2_B_DATA_0 0x70f1
MX6SX_PAD_NAND_DATA00__QSPI2_B_DATA_1 0x70f1
MX6SX_PAD_NAND_WE_B__QSPI2_B_DATA_2 0x70f1
MX6SX_PAD_NAND_RE_B__QSPI2_B_DATA_3 0x70f1
MX6SX_PAD_NAND_DATA02__QSPI2_B_SCLK 0x70f1
MX6SX_PAD_NAND_DATA03__QSPI2_B_SS0_B 0x70f1
>;
};
pinctrl_vcc_sd3: vccsd3grp {
fsl,pins = <
MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059
>;
};
pinctrl_sai1: sai1grp {
fsl,pins = <
MX6SX_PAD_CSI_DATA00__SAI1_TX_BCLK 0x130b0
MX6SX_PAD_CSI_DATA01__SAI1_TX_SYNC 0x130b0
MX6SX_PAD_CSI_HSYNC__SAI1_TX_DATA_0 0x120b0
MX6SX_PAD_CSI_VSYNC__SAI1_RX_DATA_0 0x130b0
MX6SX_PAD_CSI_PIXCLK__AUDMUX_MCLK 0x130b0
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1
MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1
>;
};
pinctrl_uart5: uart5grp {
fsl,pins = <
MX6SX_PAD_KEY_ROW3__UART5_RX 0x1b0b1
MX6SX_PAD_KEY_COL3__UART5_TX 0x1b0b1
MX6SX_PAD_KEY_ROW2__UART5_CTS_B 0x1b0b1
MX6SX_PAD_KEY_COL2__UART5_RTS_B 0x1b0b1
>;
};
pinctrl_usb_otg1: usbotg1grp {
fsl,pins = <
MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0
>;
};
pinctrl_usb_otg1_id: usbotg1idgrp {
fsl,pins = <
MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059
>;
};
pinctrl_usb_otg2: usbot2ggrp {
fsl,pins = <
MX6SX_PAD_GPIO1_IO12__GPIO1_IO_12 0x10b0
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6SX_PAD_SD2_CMD__USDHC2_CMD 0x17059
MX6SX_PAD_SD2_CLK__USDHC2_CLK 0x10059
MX6SX_PAD_SD2_DATA0__USDHC2_DATA0 0x17059
MX6SX_PAD_SD2_DATA1__USDHC2_DATA1 0x17059
MX6SX_PAD_SD2_DATA2__USDHC2_DATA2 0x17059
MX6SX_PAD_SD2_DATA3__USDHC2_DATA3 0x17059
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059
MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */
MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */
>;
};
pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
fsl,pins = <
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9
>;
};
pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
fsl,pins = <
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9
>;
};
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059
MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059
MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059
MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059
MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059
MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059
MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */
MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x30b0
>;
};
};
};

View File

@@ -8,7 +8,6 @@
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "imx6ull.dtsi"
/ {
@@ -67,7 +66,7 @@
};
};
spi4 {
spi5 {
compatible = "spi-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi4>;
@@ -455,7 +454,8 @@
flash0: n25q256a@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "micron,n25q256a";
/* compatible = "micron,n25q256a"; */
compatible = "spi-flash";
spi-max-frequency = <29000000>;
spi-nor,ddr-quad-read-dummy = <6>;
reg = <0>;

View File

@@ -8,6 +8,7 @@
#include <dt-bindings/clock/imx6ul-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "imx6ull-pinfunc.h"
#include "imx6ull-pinfunc-snvs.h"
@@ -38,10 +39,11 @@
serial5 = &uart6;
serial6 = &uart7;
serial7 = &uart8;
spi0 = &ecspi1;
spi1 = &ecspi2;
spi2 = &ecspi3;
spi3 = &ecspi4;
spi0 = &qspi;
spi1 = &ecspi1;
spi2 = &ecspi2;
spi3 = &ecspi3;
spi4 = &ecspi4;
usbphy0 = &usbphy1;
usbphy1 = &usbphy2;
};

View File

@@ -134,6 +134,28 @@
>;
};
pinctrl_usdhc1_100mhz: usdhc1grp_100mhz {
fsl,pins = <
MX7D_PAD_SD1_CMD__SD1_CMD 0x5a
MX7D_PAD_SD1_CLK__SD1_CLK 0x1a
MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a
MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a
>;
};
pinctrl_usdhc1_200mhz: usdhc1grp_200mhz {
fsl,pins = <
MX7D_PAD_SD1_CMD__SD1_CMD 0x5b
MX7D_PAD_SD1_CLK__SD1_CLK 0x1b
MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b
MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b
MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b
MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX7D_PAD_SD2_CMD__SD2_CMD 0x59
@@ -147,6 +169,28 @@
>;
};
pinctrl_usdhc2_100mhz: usdhc2grp_100mhz {
fsl,pins = <
MX7D_PAD_SD2_CMD__SD2_CMD 0x5a
MX7D_PAD_SD2_CLK__SD2_CLK 0x1a
MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5a
MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5a
MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5a
MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5a
>;
};
pinctrl_usdhc2_200mhz: usdhc2grp_200mhz {
fsl,pins = <
MX7D_PAD_SD2_CMD__SD2_CMD 0x5b
MX7D_PAD_SD2_CLK__SD2_CLK 0x1b
MX7D_PAD_SD2_DATA0__SD2_DATA0 0x5b
MX7D_PAD_SD2_DATA1__SD2_DATA1 0x5b
MX7D_PAD_SD2_DATA2__SD2_DATA2 0x5b
MX7D_PAD_SD2_DATA3__SD2_DATA3 0x5b
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x59
@@ -162,6 +206,38 @@
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19
>;
};
pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x5a
MX7D_PAD_SD3_CLK__SD3_CLK 0x1a
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a
>;
};
pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
fsl,pins = <
MX7D_PAD_SD3_CMD__SD3_CMD 0x5b
MX7D_PAD_SD3_CLK__SD3_CLK 0x1b
MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b
MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b
MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b
MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b
MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b
MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b
MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b
MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b
MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b
>;
};
};
};
@@ -287,23 +363,35 @@
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>;
pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>;
pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>;
cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
vmmc-supply = <&reg_sd1_vmmc>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
status = "okay";
};
&usdhc2 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc2>;
pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
non-removable;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default", "state_100mhz", "state_200mhz";
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
bus-width = <8>;
non-removable;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
status = "okay";
};

View File

@@ -27,10 +27,10 @@
serial2 = &lpuart6;
serial3 = &lpuart7;
usbphy0 = &usbphy1;
i2c0 = &lpi2c4;
i2c1 = &lpi2c5;
i2c2 = &lpi2c6;
i2c3 = &lpi2c7;
i2c4 = &lpi2c4;
i2c5 = &lpi2c5;
i2c6 = &lpi2c6;
i2c7 = &lpi2c7;
};
cpus {

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