The btrfs implementation passes cache-unaligned buffers into the
block layer, which triggers cache alignment problems down in the
block device drivers. Align the buffers to prevent this.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Marek Behun <marek.behun@nic.cz>
MSM uses the chipidea controller IP, however it requires
to reinit the phy after controller reset. in EHCI mode there's a
dedicated callback for it.
In device mode however there's no such callback.
Add implementaion of ci_init_after_reset() to implement the above
requirement in case CI_UDC driver is used.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
MSM variant of Chipidea must reinitalize the phy
after controller reset.
Introduce ci_init_after_reset() weak function that
can be used to achieve the above init.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Add a PHY driver for the Qualcomm dragonboard 410c which
allows switching on/off and resetting the phy connected
to the EHCI controllers and USBHS controller.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
The serial# environment variable needs to be
defined so it will be used by fastboot as serial
for the endpoint descriptor.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
platdata_auto_alloc_size was not initialized in structure.
Caused null pointer dereference when configuring device as
gadget.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Since commit 7b3b74d321 ("serial: serial_stm32: Enable overrun")
on STM32F7xx based boards, the first lines of serial output are
missing during boot (we no more see the U-Boot release version,
board model and DRAM size).
By enabling the uart FIFO on STM32F7, the complete U-boot log
can be sent correctly.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Prevent cache warning messages when using the 'bootelf' command on an
Arm target. Round down each section start address and round up the
respective section end to the nearest cache line.
Signed-off-by: Neil Stainton <nstainton@asl-control.co.uk>
[trini: Manually apply, rework whitespace]
Signed-off-by: Tom Rini <trini@konsulko.com>
The escape sequence '\#' does not work for the latest GNU Make from
the git tree.
Replace it with $(pound) as Linux did.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[ commit 9564a8cf422d7b58f6e857e3546d346fa970191e in Linux ]
I tried building using a freshly built Make (4.2.1-69-g8a731d1), but
already the objtool build broke with
orc_dump.c: In function ‘orc_dump’:
orc_dump.c:106:2: error: ‘elf_getshnum’ is deprecated [-Werror=deprecated-declarations]
if (elf_getshdrnum(elf, &nr_sections)) {
Turns out that with that new Make, the backslash was not removed, so cpp
didn't see a #include directive, grep found nothing, and
-DLIBELF_USE_DEPRECATED was wrongly put in CFLAGS.
Now, that new Make behaviour is documented in their NEWS file:
* WARNING: Backward-incompatibility!
Number signs (#) appearing inside a macro reference or function invocation
no longer introduce comments and should not be escaped with backslashes:
thus a call such as:
foo := $(shell echo '#')
is legal. Previously the number sign needed to be escaped, for example:
foo := $(shell echo '\#')
Now this latter will resolve to "\#". If you want to write makefiles
portable to both versions, assign the number sign to a variable:
C := \#
foo := $(shell echo '$C')
This was claimed to be fixed in 3.81, but wasn't, for some reason.
To detect this change search for 'nocomment' in the .FEATURES variable.
This also fixes up the two make-cmd instances to replace # with $(pound)
rather than with \#. There might very well be other places that need
similar fixup in preparation for whatever future Make release contains
the above change, but at least this builds an x86_64 defconfig with the
new make.
Link: https://bugzilla.kernel.org/show_bug.cgi?id=197847
Cc: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Rasmus Villemoes <linux@rasmusvillemoes.dk>
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
If we fail to find the MMC boot device, report the number of the one
we were looking for in the error to aid diagnosis.
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
The Arm Versatile Express and Juno development boards contain an
OSC clock generator that can be accessed through the Versatile
Express config bus. The generators are quite often being controlled
by some MCU and the config bus offers a uniform way of exposing them.
Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Add a test which verifies that all subnodes under "/firmware"
nodes are scanned.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added 'imply FIRMWARE' to sandbox Kconfig to fix test failures, fixed
ordering of lines in arch/sandbox/dts/test.dts and test/dm/Makefile,
updated #if condition in drivers/firmware/firmware-uclass.c:
Signed-off-by: Simon Glass <sjg@chromium.org>
There is no prompt string for FIRMWARE config. Without this,
FIRMWARE config cannot be enabled through menuconfing or
config file. Fix this by adding prompt summary.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Something has changed in the last several month such that when buildman
builds U-Boot incrementally and a new CONFIG option has been added to the
Kconfig, the build hanges waiting for input:
Test new config (NEW_CONFIG) [N/y/?] (NEW)
Since binamn does not connect the build's stdin to anything this waits on
stdin to the build thread, which never comes. Eventually I suspect all the
threads end up in this state and the build does not progress.
Fix this by passing /dev/null as input to the build. That way, if there is
a new CONFIG, the build will stop (and fail):
Test new config (NEW_CONFIG) [N/y/?] (NEW)
Error in reading or end of file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Remove duplicated inclusion of dm/ofnode.h
Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Drop period at end of commit subject:
Signed-off-by: Simon Glass <sjg@chromium.org>
The comment references a structure name that doesn't exist. Use
the name of the actual uclass.
Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Drop period at end of commit subject:
Signed-off-by: Simon Glass <sjg@chromium.org>
Converts fdtdec_setup_memory_banksize() to use ofnode functions instead.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Since there is no canonical "board device" that can be used in board
files, it is difficult to use DM function for board initialization in
these cases.
Hence, add a uclass that implements a simple "board device", which can
hold devices not suitable anywhere else in the device tree, and is also
able to read encoded information, e.g. hard-wired GPIOs on a GPIO
expander, read-only memory ICs, etc. that carry information about the
hardware.
The devices of this uclass expose methods to read generic data types
(integers, strings, booleans) to encode the information provided by the
hardware.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
We cannot use device structures to disable devices, since getting
them with the API functions would bind and activate the device, which
would fail if the underlying device does not exist.
Reviewed-by: Simon Glass <sjg@chromium.org>
Add tests for the ofnode_set_enabled, ofnode_write_string, and
ofnode_write_property functions.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Implement a set of functions to manipulate properties in a live device
tree:
* ofnode_write_prop() to set generic properties of a node
* ofnode_write_string() to set string properties of a node
* ofnode_set_enabled() to either enable or disable a node
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
When we get a problem like overlapping regions it is sometimes hard to
figure what what is going on. At present we don't write the map file in
this case. However the file does provide useful information.
Catch any packing errors and write a map file (if enabled with -m) to aid
debugging.
Signed-off-by: Simon Glass <sjg@chromium.org>
For sandbox we want to put ELF files in the image since that is what we
need to execute. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Normally x86 platforms use the end-at-4gb option. This currently produces
an FMAP with positions which have a large offset. The use of end-at-4gb is
a useful convenience within binman, but we don't really want to export
a map with these offsets.
Fix this by subtracting the 'skip at start' parameter.
Also put the code which convers names to fmap format, for clarity.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present sections have no record of their parent so it is not possible
to traverse up the tree to the root and figure out the position of a
section within the image.
Change the constructor to record this information.
Signed-off-by: Simon Glass <sjg@chromium.org>
When TPL is used on x86 we may want to program the microcode (at least for
the first CPU) early in boot. Add support for this by refactoring the
existing code to be more generic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimesi it us useful to be able to verify the content of entries with
a hash. Add an easy way to do this in binman. The hash information can be
retrieved from the device tree at run time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Images and sections have the same attributes, since an image is mostly
just a top-level section. Update the docs to explain this.
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases it is useful to add a group of files to the image and be
able to access them at run-time. Of course it is possible to generate
the binman config file with a set of blobs each with a filename. But for
convenience, add an entry type which can do this.
Add required support (for adding nodes and string properties) into the
state module.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if there is only a zero-size entry in a section this is
reported as an error, e.g.:
Offset 0x0 (0) is outside the section starting at 0x0 (0)
Adjust the logic in CheckEntries() to avoid this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for compressing blob entries. This can help reduce image sizes
for many types of data. It requires that the firmware be able to
decompress the data at run-time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Switch to driver model for eSDHC on Layerscape SoCs including LS1021A,
LS1043A, LS1046A, LS1088A, LS2088A.
Switch to driver model for SATA on LS1021A and LS1043A.
Add support for LS1012AFRWY rev C board.
Enable SMMU for LS1043A.
With DM enabled, this patch enables DM_SERIAL and removes
the NS16550 initialization from da850_lowlevel since the driver
will take care of that itself.
Signed-off-by: Adam Ford <aford173@gmail.com>
With DM_MMC working for both SPL and U-Boot, this patch removes
the legacy style of initializing the MMC driver.
Signed-off-by: Adam Ford <aford173@gmail.com>
With the pinctrl function enabled and the device tree setting up
the pins we want to use, this patch removes the manual pinmuxing
except for that which is not done by the device tree and minimal
pins necessary for SPL (like serial, GPMC, and MMC)
Signed-off-by: Adam Ford <aford173@gmail.com>
With DM_I2C and DM_GPIO working, this patch can enable the
GPIO expander on the I2C bus. This GPIO expander is connected
to some of the DIP switches and can now read the status of these
pins.
Signed-off-by: Adam Ford <aford173@gmail.com>
The simple pin controller works for da850, so this patch enables
this to pin-mux the pins defined in the device tree for the da850evm.
Signed-off-by: Adam Ford <aford173@gmail.com>
The simple pinctrl driver currently available works with the omap3.
Enabling this will use the device tree to automatically set the
pin-muxing for various drivers.
Signed-off-by: Adam Ford <aford173@gmail.com>
Previously poweroff was located under boot. It seems to make more
sense to have it located under the Device access commands.
Signed-off-by: Adam Ford <aford173@gmail.com>
With the omap_mmc driver no longer supporting cd-inverted, this
patch removes all these references since they are not needed.
Signed-off-by: Adam Ford <aford173@gmail.com>
With DM_GPIO and DM_MMC translating GPIO_ACTIVE_LOW, any boards
using the 'cd-invert' option will no longer need to do this. This
patch removes the support for 'invert' from the MMC driver.
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Fix warning over when !DM_GPIO]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add commands for fdt overlay merging. This is required for the boot scripts
that detect PDAs and apply specific overlays to the DTB passed on to kernel.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Call the PDA detection mechanism at boot time so we can have
the pda environment variable ready for use.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
This adds the support for PDA detection as common code for
Atmel boards.
Using the one wire interface over GPIO , an EEPROM memory is read
and compared to preprogrammed values for PDA screens TM4300, TM7000
and TM7000B.
Once the PDA is detected, an environment variable is set accordingly.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
SAMA5D4 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
SAMA5D2 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
SAMA5D2 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
SAMA5D3 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
SAMA5D2 SoC can have extra clip boards (PDAs) connected, which have
an EEPROM memory for identification. A special GPIO can be used to read
this memory over 1wire protocol.
Enabling one wire and eeprom drivers for this memory.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
To be able to test Dallas onewire protocol and one wire eeproms driver
and subsystem, add in sandbox defconfig the drivers' config.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add basic command for bus information and read for onewire
bus using Dallas 1-Wire protocol.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add a driver that supports Maxim 1 wire EEPROMs families
DS24B33 and DS2431.
Can be extended for other families as well.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
[eugen.hristev@microchip.com: reworked driver]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
When a new device is discovered, this may be a w1 eeprom device.
Attempt to find the proper node and driver from the w1-eeprom subsystem.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
We might want to access data stored onto one wire EEPROMs.
Create a framework to provide a consistent API.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
[eugen.hristev@microchip.com: reworked patch]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add a bus driver for bitbanging a 1-Wire bus over a GPIO.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
[eugen.hristev@microchip.com: fixed some issues]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
We might want to use 1-Wire devices connected on boards such as EEPROMs in
U-Boot.
Provide a framework to be able to do that.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
[eugen.hristev@microchip.com: reworked]
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
This is file system generic loader which can be used to load
the file image from the storage into target such as memory.
The consumer driver would then use this loader to program whatever,
ie. the FPGA device.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Add a document to describe file system firmware loader binding
information.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Provide information about
- overview of file system firmware loader driver model
- describe storage device and partition in device tree source
- describe fie system firmware loader API
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a function to find the block device descriptor of the parent
device.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
[trini: Move function declaration to avoid warning]
Signed-off-by: Tom Rini <trini@konsulko.com>
cmd_ubifs_mount() function would be called directly instead of
involving whole command machinery for mounting ubifs in
generic firmware loader, so some checking codes need to be factored out
into cmd_ubifs_mount() without breaking original functionality design.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
cmd_ubifs_umount() function would be called directly instead of involving
whole command machinery in generic firmware loader, so checking on
ubifs_initialized status need to be done in cmd_ubifs_umount() without
breaking original functionality design.
Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
[trini: Fix conflicting type error in cmd/ubi.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add support for Arm Mali Display Processors DP500, DP550 and DP650.
Only one layer is being used to display the console or boot logo,
even if more layers are supported in the hardware.
Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
When tools are needed but not present, at present we just get an error
which can be confusing for the user. Try to be helpful by reporting the
tool as missing and suggesting a possible remedy.
Also update the Run() method to support this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Binman currently supports updating the main device tree with things like
the position of each entry. Extend this support to SPL and TPL as well,
since they may need (a subset of) this information.
Also adjust DTB output files to have a .out extension since this seems
clearer than having a .dtb extension with 'out' in the name somwhere.
Also add a few missing comments and update the DT setup code to use
ReadFile and WriteFile().
Signed-off-by: Simon Glass <sjg@chromium.org>
We use a fake device tree in tests most of the time since tests don't
normally care about the actual data. For example, for U-Boot proper we use
U_BOOT_DTB_DATA which is just a four-character string. This makes testing
the image output against an expected value very easy.
However in some cases, such as when the test wants to check that the DT
output containing particular nodes, we do actually need the real DT. Add
support for this, along with a command-line option to select 'test mode'.
Signed-off-by: Simon Glass <sjg@chromium.org>
We always have a device tree for U-Boot proper. But we may also have one
for SPL and TPL. Add a new Entry method to find out what DTs an entry
has, and use that list when updating DTs.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we have a few calls to device-tree functions in binman and plan
to add more as we add new entry types which need to report their results.
It makes sense to put this code in a central place so that we can make
sure all device trees are updated. At present we only have U-Boot proper,
but plan to add SPL and TPL too.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the control module has state information in it, since it is the
primary user of this. But it is a bit odd to have entries and other
modules importing control to obtain this information.
It seems better to have a dedicated state module, which control can use as
well. Create a new module using code from control and update other modules
to use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Various entry implementations provide a way to obtain the default filename
for an entry. But at present there is no base-class implementation for
this function. Add one so that the API is defined.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a few more functions which allow creating and modifying property
values. If only we could do this so easily in the real world.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we require the caller to manually update the device tree using
individual calls to libfdt functions. This is not ideal. It would be
better if we could make changes using the Python structure and then call a
Sync() function to write them back.
Add this feature to the Fdt class. Update binman and the tests to match.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes it is useful to build only a subset of the images provided by
the binman configuration. Add a -i option for this. It can be given
multiple times to build several images. If the option is not given, all
images are built.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if there are two vblock entries an image their contents are
written to the same file in the output directory. This prevents checking
the contents of each separately.
Fix this by adding part of the entry path to the filename, and add some
missing comments.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes we want to include TPL for x86 platforms, such as when we want
to select between different SPL images (e.g. for Chrome OS verified boot).
Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
When the value of a text entry is not provided an execption is generated
talking about a None type. This is confusing. Add a more explanatory error
and a test for this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Pull this support from these upstream commits:
bfbfab0 pylibfdt: Add a means to add and delete notes
9005f41 pylibfdt: Allow delprop() to return errors
Signed-off-by: Simon Glass <sjg@chromium.org>
Update all A10 devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 5d9ef839f874f4e3923c8a9ae7b136c6c3912cd5
Author: Stefan Mavrodiev <stefan@olimex.com>
Date: Wed May 16 14:38:08 2018 +0300
ARM: dts: sun7i: Add Olimex A20-SOM-EVB-eMMC board
Note:
- Update sun7i-a20-primo73.dts as per Linux, since
this dts is U-Boot specific.
- Drop sun7i-a20-olimex-som-evb-emmc.dts since no board
added for this.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Update all A10s/A13/gr8/r8devicetree dtsi and dtsi files from
Linux-v4.18-rc3 with below commit:
commit 190e3138f9577885691540dca59c2f07540bde04
Merge: cafc87023b0d a7affb13b271
Author: Arnd Bergmann <arnd@arndb.de>
Date: Tue Mar 27 14:58:00 2018 +0200
Merge tag 'sunxi-h3-h5-for-4.17' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Update all A10 devicetree dtsi and dtsi files from Linux-v4.18-rc3
with below commit:
commit 590b0c0cfc6162aeebbf43eaafb9753b56df1532
Author: Pascal Roeleven <dev@pascalroeleven.nl>
Date: Fri Apr 20 12:21:12 2018 +0200
ARM: dts: sun4i: Fix incorrect clocks for displays
Note: Update pinctrl-0 for sun4i-a10-inet-3f.dts, sun4i-a10-inet-3w.dts
like other dts file since there dts file are U-Boot specific.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
video_init, video_putc and video_puts functions are not implemented
anywhere, remove their declaration from the header.
Signed-off-by: Liviu Dudau <liviu.dudau@foss.arm.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Add command to query information from and write text to on-screen
display (OSD) devices.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add tests for the hex2bin, bin2hex, and hex_to_bin functions, which were
recently added to U-Boot.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a unit test assert-method, which compares two given memory areas for
byte-wise equality.
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Reviewed-by: Simon Glass <sjg@chromium.org>
Some devices offer a text-based OSD (on-screen display) that can be
programmatically controlled (i.e. text displayed on).
Add a uclass to support such devices.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
The EFI subsystems needs to know the size of the terminal. If the
environment variable
stdout = serial,vidconsole
this size cannot be read from the video console. So the EFI subsystem
sends escape sequences to read the size. With this patch we get support
for the following escape sequences:
ESC "7" Save cursor position
ESC "8" Restore cursor position
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The include/video*.h files are part of the drivers in drivers/video. So it
makes sense to assign them to the same maintainer.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add device tree for T2080QDS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Below is the sequence to embed dtb inside U-Boot,
1. Remove bootpg and resetvec section if needed
2. Append dtb
3. Append bootpg and resetvec section back if removed in step 1
Above procedure is required only when CONFIG_MPC85xx and
CONFIG_OF_SEPARATE are defined.
Add new config CONFIG_MPC85XX_HAVE_RESET_VECTOR to indicate that
image has resetvec section. Step 1 and step 3 described above are
required only if this config is y.
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
Currently binman calculates '_skip_at_start' based on 'end-at-4gb'
property and it is used for x86 images.
For PowerPC mpc85xx based CPU, CONFIG_SYS_TEXT_BASE is the entry
offset of the first entry. It can be 0xeff40000 or 0xfff40000 for
nor flash boot, 0x201000 for sd boot etc, so "_skip_at_start"
should be set to CONFIG_SYS_TEXT_BASE.
'end-at-4gb' property is not applicable where CONFIG_SYS_TEXT_BASE +
Image size != 4gb.
Add new property 'skip-at-start' in Section class so that
'_skip_at_start' can be calculated either based on 'end-at-4gb'
or based on "skip-at-start".
Add a test case to check that 'skip-at-start' and 'end-at-4gb'
property can't be used together.
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: York Sun <york.sun@nxp.com>
'board_fdt_blob_setup' function sets up fdt blob at '&_end' so
define '_end' symbol in mpc85xx lds files.
Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Recently the FMan Port and MAC compatibles were changed. This patch
aligns the FMan Port and MAC compatibles to the new FMan device tree
binding document. The FMan device tree binding document can be found
in the Linux kernel version 3.18.0, commit
297d35fd2a7d3fbd4e5c0f0c1c18213117ba11ba
./Documentation/devicetree/bindings/powerpc/fsl/fman.txt
This patch doesn't affect legacy compatibles support.
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
[York S: reformatted commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Enable support for ICID setup of qman portals and the required device
tree fixups.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Reuse the existing ICID setup code done for LS1046A smmu enablement
and add the equivalent setup for LS1043A chips.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
The QMan IP block in this SoC is version 3.2 so advertise
this in the SoC configuration header.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Memory reserved for Management Complex needs to be cleaned before any
usage.
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
[York S: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
The iommu-map property in the fsl-mc node is updated by
valid stream-ids by u-boot. This patch is to fixup this
property for LS208x and LS1088.
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
LS1012AFRWY supports three board revisions.
Revision A and B board are collectively identified as revA/B,
Revision C board is identifies as revC.
Signed-off-by: Pramod Kumar <pramod.kumar_1@nxp.com>
[York S: revised commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
At present the MMC subsystem maintains its own list of MMC devices.
This cannot work with driver model when CONFIG_BLK is enabled, use
blk_dread to replace previous mmc read interface, use
mmc_get_blk_desc to get the mmc device property.
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
[York S: reformatted commit message]
Reviewed-by: York Sun <york.sun@nxp.com>
Xilinx changes for v2018.11
- Handle BOARD_LATE_INIT via Kconfig
SPL:
- Enable GZIP for all partitions types(not only for kernel)
ZynqMP:
- Rearrange pmufw version handling
- Support newer PMUFW with improved fpga load sequence
Zynq:
- Cleanup config file
- Simplify zybo config by enabling option via Kconfig
net:
- Fix gems max-speed property reading
- Enable support for fixed-link phys
Based on dt-specs fixed-link doesn't require phy-handle to be used.
Fix driver to only read phy related setting when phy-handle is found.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Patch queue for efi - 2018-09-26
A lot of goodness in this release. We're *very* close to running the
UEFI Shell and SCT natively. The only missing piece are HII protocols.
- FAT write support (needed for SCT)
- improved FAT directory support (needed for SCT)
- RTC support with QEMU -M virt
- Sandbox support (run UEFI binaries in Linux - yay)
- Proper UTF-16 support
- EFI_UNICODE_COLLATION_PROTOCOL support (for UEFI Shell)
- EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL support (for UEFI Shell)
- Fix window size determination
- Fix Tegra by explicitly unmapping RAM
- Clean up handle entanglement
- Lots of generic code cleanup
[trini: Fixup merge conflict in include/configs/qemu-arm.h]
Signed-off-by: Tom Rini <trini@konsulko.com>
When running sandbox with the new pointer sanitization we just recently
introduced, we're running into a case with FIT images where we end up
interpreting pointers as addresses.
What happened is that most callers of set_working_fdt_addr() simply
convert pointers into addresses without taking into account that they
might be 2 separate address spaces. Fix the callers up to map their
pointers into addresses.
This makes sandbox tests pass for me again.
Signed-off-by: Alexander Graf <agraf@suse.de>
Only add CONFIG_DISPLAY to defconfig because CONFIG_I2C_EDID
is automatically selected by CONFIG_DISPLAY
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
max-speed property is part of phynode and it has to be
read using ofnode_read_u32_default(). This fixes the issue
of incorrect max-speed read from DT.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no reason to limit gzip usage only for OS_BOOT and kernel image
type.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: York Sun <york.sun@nxp.com>
This patch modifies PL bitstream loading sequence as per
latest Xilfpga which supports all variants of bitstream images
generated from vivado and from bootgen. With this new change in
Xilfpga, uboot doesn't need to validate and swap bitstream as it will
be taken care inside Xilfpga. ZynqMP PL driver now checks for supporting
PMUFW version before skipping the validation and swap sequence as there
can be old PMUFW which doesn't supports this feature. In this case, driver
uses old way of PL bitstream loading sequence.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Modify the zynqmp_pmufw_version() routine to return PMUFW version so
that it can be reused wherever required. Get PMUFW version from PMU
only once at bootup and later just return stored value.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch moves the PM version related macros to .h file so that
they can be reused in other files.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Now that we already disable the "strict-aliasing" globally, remove
the duplicates in the nds32/riscv/x86 arch-specific Makefiles.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The -fstrict-aliasing option is implicitly enabled at levels -O2,
-O3, -Os by GCC. This option allows the compiler to assume the
strictest aliasing rules applicable to the language being compiled.
For example, the practice of reading from a different union member
than the one most recently written to (called "type-punning") is
common. In this case, "type-punning" only works if the memory is
accessed through the union type, but might not work by taking the
address, casting the resulting pointer and dereferencing the result,
which is an undefined behavior per the "strict aliasing rules".
GCC's -Wstrict-aliasing (included in -Wall) option does not catch
all cases, but does attempt to catch the more common pitfalls. So
there are cases that GCC does not report but the codes are violating
the "strict aliasing rules".
Given lots of codes that may be written to rely on "type-punning",
and Linux kernel disables it by -fno-strict-aliasing globally, since
U-Boot currently does this on nds32/riscv/x86 builds only, extend
this for all architecture builds.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
AM654 uses a UART controller that is compatible (partially) with
existing OMAP UART, Introduce a compatible for adding support
for this controller.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This option has never been used for anything. Drop it.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
These options are not used or necessary when device model is being used
for SCSI. Just drop them.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
When using device model this sort of hardcoded limits aren't used or
necessary.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
The loop in ahci_start_ports() is looping over the maximum number of
SCSI devices in the system, which can be larger than the amount of ports
a particular AHCI controller has. The extra looping isn't directly
harmful because the link_port_map bitmap won't have the bit set for a
nonexistent port, but it is wasteful. Replace the loop limit with the
port count of the AHCI controller instead.
Signed-off-by: Tuomas Tynkkynen <tuomas.tynkkynen@iki.fi>
Reviewed-by: Simon Glass <sjg@chromium.org>
Make use of asm-generic/atomic.h retaining the smp_mb_... definitions.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The arm, xtensa and mips version of atomic.h were already very similar
(the mips one was a copy of xtensa). Combine these implementations
together to produce a generic atomic.h that can be included by these
architectures (and any others that need it in future).
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The 'conitrace' command prints the codes received from the console input as
hexadecimal numbers.
This developer utility is useful for testing the handling of special keys
by keyboard drivers.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The MMC card detect pin is connected to gpio127 on omap3_logic.
When setting up the pbias register for MMC, let's also enable
gpio_127 for the card detect. As part of the package deal,
gpio_126 and gpio_129 are also enabled.
Signed-off-by: Adam Ford <aford173@gmail.com>
In the section about Device Trees add a paragraph at the end that
clarifies how we decide of a tree is valid or not. We say that all
bindings must either be in the specification (link provided) or in our
device-tree-bindings directory. We say that most of these come from the
Linux Kernel and as such some design decisions are made for us already,
but that in most cases we wish to retain compatibility.
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The SSP2 clock is at bit 6 in the register, so the value is 0x40 unlike
the current 0x70 which enables the clock of UART2, SSP1 and SSP2.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Acked-by: Stefan Roese <sr@denx.de>
SPI controllers SSP1, 2 and 3 require to enable their respective clocks.
Let's enable them only when the SPI controller driver is built.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
This adds support for the ARM PL022 SPI controller for the standard
variant (0x00041022) which has a 16bit wide and 8 locations deep TX/RX
FIFO.
A few parts were borrowed from the Linux kernel driver.
Cc: Armando Visconti <armando.visconti@st.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Enable CONFIG_OF_BOARD_SETUP as it is needed for Beaglebone
black to overwrite the Ethernet phy address present in DT
in case the phy latches on to a different address.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
On beaglebone black, it can so happen that PHY address
is not latched correctly on reset and board boots with
PHY responding to a different address than that
programmed in device-tree. For example, see this report:
https://groups.google.com/d/msg/beagleboard/9mctrG26Mc8/1FuI_i5KW10J
Workaround this by fixing up device-tree passed to kernel
by using the PHY address detected in hardware.
Beaglebone itself uses only one ethernet port and its DT
currently uses phy_id (obsoleted). But the function has
been written to handle multiple ports and phy_id as well
as phy-handle to make the function more generically useful.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
On some boards using TI CPSW, it may be possible that
PHY address was not latched correctly, and the actual
address that the phy responds on is different from that
set in device-tree. For example, see this problem report
on beaglebone black:
https://groups.google.com/d/msg/beagleboard/9mctrG26Mc8/1FuI_i5KW10J
Add support to check for this condition and use the
detected phy address when its safe to do so.
Also, add a public API that exposes the phy address of
a given slave. This can be used to update device-tree that
is passed to Linux kernel.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
This adds a defconfig for sama5d27_som1_ek board to get environment from
uSD. The defconfig is made from sama5d27_som1_ek_mmc_defconfig, with
'bootcmd' and 'bootargs' changed to kernel, device-tree and rootfs from
uSD. The environment is expected to be found in uSD's FAT partition.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
CONFIG_BOOTARGS can be set using Kconfig, so we no longer need it
in the config files.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
FAT_ENV_xxx options can now be set using Kconfig, so we no longer
need them in the config files.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
This adds a defconfig for sama5d2_xplained board to get environment from
eMMC. The defconfig is made from sama5d2_xplained_mmc_defconfig, with
'bootcmd' and 'bootargs' changed to kernel, device-tree and rootfs from
eMMC. The environment is expected to be found in eMMC's FAT
partition.
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
The SPL loaders assume that the CONFIG_SYS_TEXT_BASE memory location
is available and can be corrupted by loading ie. uImage or fitImage
headers there. Sometimes it could be beneficial to load the headers
elsewhere, ie. if CONFIG_SYS_TEXT_BASE is not yet writable while we
still want to parse the image headers in some local onchip memory to
ie. extract firmware from that image.
Add the possibility to override the location where the headers get
loaded by introducing new function, spl_get_load_buffer() which takes
two arguments -- offset from the CONFIG_SYS_TEXT_BASE and size of the
data that are to be loaded there -- and returns a valid buffer address
or hangs the system. The default behavior is the same as before, add
the offset to CONFIG_SYS_TEXT_BASE and return that address. User can
override the weak spl_get_load_buffer() function though.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Enable USB gadget support using DWC2 driver
Populate board_usb_init() to initialize clocks,
phy, reset and data needed for DWC2 IP.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Enable config USB relative flags in order to enable USB
EHCI, DWC2 gadget, download and mass_storage support.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Create the handle of loaded images and the EFI_LOADED_IMAGE_PROTOCOL
inside efi_setup_loaded_image(). Do not use local variables.
Currently we expect the loaded image handle to point to the loaded image
protocol. Additionally we have appended private fields to the protocol.
With the patch the handle points to a loaded image object and the private
fields are added here. This matches how we handle the net and the gop
object.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Virtual machine provided by qemu-arm has a ARM PL031 Real Time Clock
device. With this patch, the driver is enabled by default.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
With this patch, PL031 driver is converted to driver-model-compliant
driver. In addition, CONFIG_SYS_RTC_PL031_BASE is no longer valid.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
When running in EL3 mode on AArch64, we have to first drop to EL2
to execute a UEFI payload. When dropping down, the arguments to
the entry point have to stay identical to the ones for normal entry
though.
In commit ea54ad5928 ("efi_loader: pass handle of loaded image")
we incorrectly changed that logic and had the el3 entry path diverge.
Fix it up by syncing it back to what it's supposed to be.
Fixes: ea54ad5928 ("efi_loader: pass handle of loaded image")
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
The EFI selftest does not succeed on Sandbox yet. The network support
seems to need some love to actually make our current tests succeed.
So let's disable running the selftest on sandbox for now until "make
tests" just works. Then we can have more amazing CI than ever.
Signed-off-by: Alexander Graf <agraf@suse.de>
Since GRUB patch d0c070179d4d ("arm/efi: Switch to arm64 linux loader",
2018-07-09) we do not need a workaround for GRUB on 32bit ARM anymore.
So let's eliminate function efi_exit_caches().
This will require Linux distributions to update grub-efi-arm to the GRUB
git HEAD (a tag containing the aforementioned GRUB patch is not available
yet).
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
CSI H can be used to position the cursor. The calling application may
specify a location that is beyond the limits of the screen. This may
lead to an illegal memory access.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
ascii2unicode() always ends the u16 string with '\0'.
Remove redundant assignment.
Add description for efi_str_to_u16() and ascii2unicode().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Currently we assign a lot of protocols to loaded images though
these protocols are not related to them. Instead they should be
installed on a separate handle. Via the device path it is the
parent to the devices like the network adapter.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
In efi_get_variable() a string is longer than the allocated space which
results in overwriting the linked list of malloc().
The prefixes used for variables are 41 characters long, e.g.
efi_67029eb5-0af2-f6b1-da53-fcb566dd1ce6_
Change PREFIX_LEN to 41.
Fixes: faff21556748 ("efi_loader: remove limit on variable length")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
We should run the EFI selftest on both a 32bit and a 64bit ARM platform on
Travis to catch possible errors.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Convert the function descriptions to Sphinx style.
efi_driver_init() is cCalled by efi_init_obj_list().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Not all terminals understand CSI [18t for querying the console size.
We should adhere to escape sequences documented in the console_codes
manpage and the ECMA-48 standard.
So here we follow a different approach. We position the cursor to the
bottom right and query its position. Before leaving the function we
restore the original cursor position.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
We currently do not combine memory entries that are adjacent and have
the same attributes. The problem with that is that our memory map can
easily grow multiple hundreds of entries in a simple UEFI Shell
environment.
So let's make sure we always combine all entries to make the memory
map as small as possible. That way every other piece of code that
loops through it should also gain some nice speed ups.
Signed-off-by: Alexander Graf <agraf@suse.de>
efi_set_bootdev() may be called repeatedly.
Free the memory allocated for device paths in previous calls.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Do not use a local variable for the handle backing the memory device path.
Adjust relate comments.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
gcc 4.8.4 wants to see all levels of braces when initializing a
structure to zeros.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
We should not check parameter file twice.
We should check parameter new_handle.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
With efi_loader, we may want to execute payloads from RAM. By default,
permissions on the RAM region don't allow us to execute from there though.
So let's change the default allocation scheme for RAM to also allow
execution from it. That way payloads that live in U-Boot RAM can be
directly executed.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
In sandbox, longjmp returns to itself in an endless loop because
os_longjmp() calls into longjmp() which is provided by U-Boot which
again calls os_longjmp().
Setjmp on the other hand must not return because otherwise the
return freees up stack elements that we need during longjmp().
The only straight forward fix that doesn't involve nasty hacks I
could find is to directly link against the system setjmp/longjmp
implementations. That means we just provide the compiler with
hints that the symbol will be available and actually fill them
out with versions from libc.
This approach should be reasonably platform agnostic
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
For the VT102 and the Linux console the left upper corner is [1, 1].
EFI uses [0, 0] as left upper corner.
Check parameters of the SetCursorPosition() service.
Use CSI H like EDK2 for positioning.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
efi_file_getinfo() is called with a GUID. In EFI_ENTRY use %pUl as
format type. This way the GUID is printed in debug mode.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
We should not directly cast between pointers and addresses since it breaks
sandbox. Fix this and simplify the code in file_read().
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
At present map_sysmem() maps an address into the sandbox RAM buffer,
return a pointer, while map_to_sysmem() goes the other way.
The mapping is currently just 1:1 since a case was not found where a more
flexible mapping was needed. PCI does have a separate and more complex
mapping, but uses its own mechanism.
However this arrange cannot handle one important case, which is where a
test declares a stack variable and passes a pointer to it into a U-Boot
function which uses map_to_sysmem() to turn it into a address. Since the
pointer is not inside emulated DRAM, this will fail.
Add a mapping feature which can handle any such pointer, mapping it to a
simple tag value which can be passed around in U-Boot as an address.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
This function is useful to signal that the application needs to exit
immediate. It can be caught with a debugger (e.g. gdb). Add a stub for it
so that it can be called from within sandbox when an internal error
occurs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
At present the sandbox RAM buffer is not aligned to any particular
address boundary. This makes the internal pointers somewhat random with
respect to the associated RAM buffer addresses.
Align the buffer to the page size of the machine to help with this. Note
that there is a header at the start of the allocated pointer. To avoid
returning a pointer which is not aligned to a page boundary, we waste
almost an entire page of memory for each allocation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
This allows this feature to build within sandbox. This is useful for
testing.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
With sandbox these values depend on the host system. Let's assume that it
is x86_64 for now.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
The UEFI spec requires that attributes are only set for when
EFI_FILE_MODE_CREATE is set in open_mode.
The SCT tries to read a directory with EFI_FILE_DIRECTORY.
As EDK2 allows this we should not be more strict.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The FAT driver supports unaligned reads and writes and EFI applications
will make use of these. So a misaligned buffer is only worth a debug
message.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Unset CONFIG_EFI_UNICODE_CAPITALIZATION on boards with tough size
restrictions.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Use a key notification function to leave the
EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL test.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Implement registering and unregistreing key notify functions in the
EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Add a unit test for the EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Provide a unit test for the EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Support modifiers for F1 - F4.
Add support for letters with ALT key.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
This patch implements the EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL.
The implementation of notification functions is postponed to a later
patch.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
We should test the WaitForKey event.
Testing for EFI_NOT_READY can be done after resetting the console.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Preread the next key in the console timer event.
The EFI_SIMPLE_TEXT_INPUT_EX_PROTOCOL requires to trigger registered key
notification functions based on the prefetched key.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Move reusable utility functions to efi_selftest_util.c.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Test that the Euro sign is correctly retrieved from the console via the
EFI_SIMPLE_TEXT_INPUT_PROTOCOL.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Up to now the EFI_TEXT_INPUT_PROTOCOL only supported ASCII characters.
With the patch it can consume UTF-8 from the console.
Currently only the serial console and the console can deliver UTF-8.
Local consoles are restricted to ASCII.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
In this commit, test cases for unlink interfaces are added as part of
"test_fs" test suite.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
In this commit, test cases for mkdir interfaces are added as part of
"test_fs" test suite.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
In this commit and the following, test scripts for new filesystem
functionalities introduced by my patch set, "fs: fat: extend FAT write
operations," are provided.
In particular, this patch adds test cases for sub-directory write
and write with non-zero offset.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
In this commit, the same set of test cases as in test/fs/fs-test.sh
is provided using pytest framework.
Actually, fs-test.sh provides three variants:"sb" (sb command), "nonfs"
(fatxx and etc.) and "fs" (hostfs), and this patch currently supports
only "nonfs" variant; So it is not a replacement of fs-test.sh for now.
Simple usage:
$ py.test test/py/tests/test_fs [<other options>]
You may also specify filesystem types to be tested:
$ py.test test/py/tests/test_fs --fs-type fat32 [<other options>]
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
As far as this patch series has been applied, all the tests should
pass. So update the test result summary.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
'Delete' will be implemented here by calling fs_unlink() which relies on
underlying file system's implementation.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
In this patch, a new command, fatrm, is added so as to delete a file
or directory.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
In this patch, unlink support is added to FAT file system.
A directory can be deleted only if it is empty.
In this implementation, only a directory entry for a short file name
will be removed. So entries for a long file name can and should be
reclaimed with fsck.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
"unlink" interface is added to file operations.
This is a preparatory change as unlink support for FAT file system
will be added in next patch.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
In efi world, there is no obvious "mkdir" interface, instead, Open()
with EFI_FILE_MODE_CREATE in mode parameter and EFI_FILE_DIRECTORY
in attributes parameter creates a directory.
In this patch, efi_file_open() is extended so as to accept such
a combination of parameters and call u-boot's mkdir interface for
expected action.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
In this patch, a new command, fatmkdir, is added.
Please note that, as there is no notion of "current directory" on u-boot,
a directory name specified must contains an absolute directory path as
a parent directory. Otherwise, "/" (root directory) is assumed.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
In this patch, mkdir support is added to FAT file system.
A newly created directory contains only "." and ".." entries.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
The starting cluster number of directory is needed to initialize ".."
(parent directory) entry when creating a new directory.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
"mkdir" interface is added to file operations.
This is a preparatory change as mkdir support for FAT file system
will be added in next patch.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
In this patch, fatwrite command is extended so as to accept an additional
parameter of file offset.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
In this patch, all the necessary code for allowing for a file offset
at write is implemented. What plays a major roll here is get_set_cluster(),
which, in contrast to its counterpart, set_cluster(), only operates on
already-allocated clusters, overwriting with data.
So, with a file offset specified, set_contents() seeks and writes data
with set_get_cluster() until the end of a file, and, once it reaches
there, continues writing with set_cluster() for the rest.
Please note that a file will be trimmed as a result of write operation if
write ends before reaching file's end. This is an intended behavior
in order to maintain compatibility with the current interface.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
The current write implementation is quite simple: remove existing clusters
and then allocating new ones and filling them with data. This, inevitably,
enforces always writing from the beginning of a file.
As the first step to lift this restriction, fat_file_write() and
set_contents() are modified to accept an additional parameter, file offset
and further re-factored so that, in the next patch, all the necessary code
will be put into set_contents().
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
In this patch, write implementation is overhauled and rewritten by
making full use of directory iterator. The obvious bonus is that we are
now able to write to a file with a directory path, like /A/B/C/FILE.
Please note that, as there is no notion of "current directory" on u-boot,
a file name specified must contain an absolute directory path. Otherwise,
"/" (root directory) is assumed.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
It would be good that FAT write function return error code instead of
just returning -1 as fat_read_file() does.
This patch attempts to address this issue although it is 'best effort
(or estimate)' for now.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
FAT file system's long file name support is a bit complicated and has some
restrictions on its naming. We should be careful about it especially for
write as it may easily end up with wrong file system.
normalize_longname() check for the rules and normalize a file name
if necessary. Please note, however, that this function is yet to be
extended to fully comply with the standard.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
In my attempt to re-work write operation, it was revealed that iterator's
"clust" does not always point to a cluster to which a current directory
entry ("dent") belongs.
This patch assures that it is always true by adding "next_clust" which is
used solely for dereferencing a cluster chain.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
FAT's root directory does not have "." nor ".."
So care must be taken when scanning root directory with fat_itr_resolve().
Without this patch, any file path starting with "." or ".." will not be
resolved at all.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
get_fs_info() was introduced in major re-work of read operation by Rob.
We want to reuse this function in write operation by extending it with
additional members in fsdata structure.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Add the missing SPDX-License-Identifier based on Linux kernel commit
b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier to
files with no license").
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Add the missing SPDX-License-Identifier based on Linux kernel commit
b24413180f56 ("License cleanup: add SPDX GPL-2.0 license identifier to
files with no license").
Correct formatting errors.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
%s/efi_simple_input_interface/efi_simple_text_input_protocol/
We should be consistent in the naming of the EFI protocol interface
structures. The protocol is called EFI_SIMPLE_TEXT_INPUT_PROTOCOL.
%s/ExtendedVerification/extended_verification/
Use consistent naming of function parameters. Do not use CamelCase.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Execute the EFI selftest for the EFI_SIMPLE_TEXT_INPUT_PROTOCOL.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Provide a unit test for the EFI_UNICODE_COLLATION_PROTOCOL.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The patch implements the EFI_UNICODE_COLLATION_PROTOCOL.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Provide unit tests for utf_to_lower() utf_to_upper().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Provide functions for upper and lower case conversion.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
This patch provides a define to initialize a table that maps lower to
capital letters for Unicode code point 0x0000 - 0xffff.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
We register the console in/out protocol on the loaded image handle, but
never tell anyone about it in the systab.
Because of this Shell.efi can not find the input protocol. So let's add
a proper reference.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We have moved generating html documentation with Sphinx.
%s/Return Value/Return/g
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
This reverts commit ccfc78b820.
Now that the underlying issue is fixed, we can revert the revert and hence
restore the original EFI code.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Tegra U-Boot ensures that board_get_usable_ram_top() never returns a value
over 4GB, since some peripherals can't access such addresses. However, on
systems with more than 2GB of RAM, RAM bank 1 does describe this extra
RAM, so that Linux (or whatever OS) can use it, subject to DMA
limitations. Since board_get_usable_ram_top() points at the top of RAM
bank 0, the memory locations describes by RAM bank 1 are not mapped by
U-Boot's MMU configuration, and so cannot be used for anything.
For some completely inexplicable reason, U-Boot's EFI support ignores the
value returned by board_get_usable_ram_top(), and EFI memory allocation
routines will return values above U-Boot's RAM top. This causes U-Boot to
crash when it accesses that RAM, since it isn't mapped by the MMU. One
use-case where this happens is TFTP download of a file on Jetson TX1
(p2371-2180).
This change explicitly tells the EFI code that this extra RAM should not
be used, thus avoiding the crash.
A previous attempt to make EFI honor board_get_usable_ram_top() was
rejected. So, this patch will need to be replicated for any board that
implements board_get_usable_ram_top().
Fixes: aa909462d0 ("efi_loader: efi_allocate_pages is too restrictive")
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
Use CONFIG_IS_ENABLED(EFI_LOADER) to avoid explicitly checking CONFIG_SPL
too. This simplifies the conditional.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
The number of bytes in an utf-8 string is an upper limit for the number of
words in the equivalent utf-16 string. In so far the inumbant coding works
correctly. For non-ASCII characters the utf-16 string is shorter. With the
patch only the necessary buffer size is allocated for the load options.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The length of a string printed to the console by the
EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL is not limited by the UEFI spec.
Hence should not allocate a buffer for it on the stack.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The EFI spec does not provide a length limit for variables.
Reviewed-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The width and precision of the printf() function refer to the number of
characters not to the number of bytes printed.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
utf8_get() - get next UTF-8 code point from buffer
utf8_put() - write UTF-8 code point to buffer
utf8_utf16_strnlen() - length of a utf-8 string after conversion to utf-16
utf8_utf16_strncpy() - copy a utf-8 string to utf-16
utf16_get() - get next UTF-16 code point from buffer
utf16_put() - write UTF-16 code point to buffer
utf16_strnlen() - number of codes points in a utf-16 string
utf16_utf8_strnlen() - length of a utf-16 string after conversion to utf-8
utf16_utf8_strncpy() - copy a utf-16 string to utf-8
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The function names utf16_strlen() and utf16_strnlen() are misnomers.
The functions do not count utf-16 characters but non-zero words.
So let's rename them to u16_strlen and u16_strnlen().
In utf16_dup() avoid assignment in if clause.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Using CONFIG_IS_ENABLED(EFI_LOADER) allows to simply the #if statements.
Suggested-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Using CONFIG_IS_ENABLED(EFI_LOADER) allows to simply the #if statements.
Suggested-by: Alexander Graf <agraf@suse.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The fs_read() function wants to get an address rather than the
pointer to a buffer.
So let's convert the passed buffer from pointer back a the address
to make efi_loader on sandbox happier.
Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
At present this function takes a pointer as its argument, then passes this
to efi_allocate_pages(), which actually takes an address. It uses casts,
which are not supported on sandbox.
Also the function calculates the FDT size rounded up to the neared EFI
page size, then its caller recalculates the size and adds a bit more to
it.
This function is much better written as something that works with
addresses only, and returns both the address and the size of the relocated
FDT.
Also, copy_fdt() returns NULL on error, but really should propagate the
error from efi_allocate_pages(). To do this it needs to return an
efi_status_t, not a void *.
Update the code in this way, so that it is easier to follow, and also
supports sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Sandbox only has 128MB of memory so we cannot relocate the device tree up
to start at 128MB. Use 127MB instead, which should be safe.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Alexander Graf <agraf@suse.de>
Verify that the loaded image protocol is installed on the image handle.
Verify that the loaded image protocol points to the system table.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
The system table must be passed as a pointer in the loaded image
protocol.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
Remove memory leak in efi_selftest_manageprotocols.c.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Alexander Graf <agraf@suse.de>
This patch adds the clock-frequency property to the SPI controller
DT node. It will be used by the SPI driver to calculate the baud rate.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch adds the necessary sysreset DT node and enables the required
drivers via Kconfig.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
The Gardena Smart-Gateway boards have a MT7688 SoC with 128 MiB of RAM
and 8 MiB of flash (SPI NOR) and additional 128MiB SPI NAND storage.
This patch also includes 2 targets. One is the target that can be
programmed into the SPI NOR flash and a 2nd target "xxx-ram" is
added to support loading and booting via an already running U-Boot
version. This allows easy development and testing without the
need to flash the image each time.
Signed-off-by: Stefan Roese <sr@denx.de>
[fixed and regenerated defconfig files]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
The LinkIt Smart 7688 modules have a MT7688 SoC with 128 MiB of RAM
and 32 MiB of flash (SPI NOR).
This patch also includes 2 targets. One is the target that can be
programmed into the SPI NOR flash and a 2nd target "xxx-ram" is
added to support loading and booting via an already running U-Boot
version. This allows easy development and testing without the
need to flash the image each time.
Signed-off-by: Stefan Roese <sr@denx.de>
[fixed and regenerated defconfig files]
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This patch adds basic support for the MediaTek MT7620/88 SoCs. Parts of
the code is copied from the MediaTek GitHub repository:
https://github.com/MediaTek-Labs/linkit-smart-uboot.git
The mt7628a.dtsi file is imported from Linux v4.17.
Support for the LinkIt Smart 7688 module and the Gardena Smart Gateway
both based on the MT7688 will be added in further patches.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
This is needed for the UBIFS support. The file is a copy of
arch/xtensa/include/asm/atomic.h
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Caches should be configured to mode CONF_CM_CACHABLE_NONCOHERENT
(or CONF_CM_CACHABLE_COW when a CM is available). There is no
need to make this configurable.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
The index base address used for the cache initialisation is currently
hard-coded to CKSEG0. Make this value configurable if a MIPS system
needs to have a different address (e.g. in SRAM or ScratchPad RAM).
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Changing the Cache Coherency Algorithm (CCA) for kernel mode
requires executing from KSEG1. Thus do a jump from KSEG0 to KSEG1
before changing the CCA mode. Jump back to KSEG0 afterwards.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Those functions are not needed during cache init and can be
implemented in C. Only support the safe disabling of caches when
this is required for booting an OS. Reenabling caches is much
harder to implement if an optional coherency manager must be
supported. As there is no real use-case anyway, dcache_enable
is implemented with an error message.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Some MIPS systems store some board-specific boot configuration
in the U-Boot binary at offset 0x10. This is used by Malta boards
and by Lantiq/Intel SoC's when booting from parallel NOR flash.
Convert the hard-coded values to Kconfig options to remove such
board-specific stuff out of the generic start.S code. This also
deprecates the config option CONFIG_SYS_XWAY_EBU_BOOTCFG.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
- Multiples updates to the turris boards / platform
- Changes / enhancements to the Marvell PHY drivers, mainly
to support the turris platform
- Many fixes and enhancements to the pxa3xx NAND driver
- Fixes for the UART boot mode in kwboot
- Misc minor changes to other 32bit and 64bit boards
The Clearfog SOM can optionally have eMMC installed. Enable support for
eMMC boot partitions by default.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds support to Armada 7k/8k comphy RX/TX lane swap. The
'phy-invert' DT property defines the inverted signals.
Signed-off-by: Rabeeh Khoury <rabeeh@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
Add definitions for CONFIG_ENV_SPI_BUS and CONFIG_ENV_SPI_CS
to Armada-388-GP board configuration
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
For some reason the spi_flash_probe_bus_cs() is called
inside the setup_flash_device() with zero values in place
of configurated SPI flash mode and maximum flash speed.
This code causes HALT error during startup environment
relocation on some platforms - namely Armada-38x-GP board.
Fix the function call by replacing zeros with the appropriate
values - CONFIG_ENV_SPI_MAX_HZ and CONFIG_ENV_SPI_MODE.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Add comments with timing parameter names and some details about
nand layout fileds.
Remove unneeded definition.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Replace the hardcoded value of page chink with value that
depends on flash page size and ECC strength.
This fixes nand access errors for 2K page flashes with 8-bit ECC.
Move the initial flash commannd function assignment past the ECC
structures initialization for eliminating usage of hardcoded page
chunk size value.
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
In the current driver, OOB bytes are accessed in raw mode, and when a
page access is done with NDCR_SPARE_EN set and NDCR_ECC_EN cleared, the
driver must read the whole spare area (64 bytes in case of a 2k page,
16 bytes for a 512 page). The driver was only reading the free OOB
bytes, which was leaving some unread data in the FIFO and was somehow
leading to a timeout.
We could patch the driver to read ->spare_size + ->ecc_size instead of
just ->spare_size when READOOB is requested, but we'd better make
in-band and OOB accesses consistent.
Since the driver is always accessing in-band data in non-raw mode (with
the ECC engine enabled), we should also access OOB data in this mode.
That's particularly useful when using the BCH engine because in this
mode the free OOB bytes are also ECC protected.
Fixes: 43bcfd2bb24a ("mtd: nand: pxa3xx: Add driver-specific ECC BCH support")
Cc: stable@vger.kernel.org
Reported-by: Sean Nyekjær <sean.nyekjaer@prevas.dk>
Tested-by: Willy Tarreau <w@1wt.eu>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Tested-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Acked-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Richard Weinberger <richard@nod.at>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
This commit is needed to properly support the 8-bits ECC configuration
with 4KB pages.
When pages larger than 2 KB are used on platforms using the PXA3xx
NAND controller, the reading/programming operations need to be split
in chunks of 2 KBs or less because the controller FIFO is limited to
about 2 KB (i.e a bit more than 2 KB to accommodate OOB data). Due to
this requirement, the data layout on NAND is a bit strange, with ECC
interleaved with data, at the end of each chunk.
When a 4-bits ECC configuration is used with 4 KB pages, the physical
data layout on the NAND looks like this:
| 2048 data | 32 spare | 30 ECC | 2048 data | 32 spare | 30 ECC |
So the data chunks have an equal size, 2080 bytes for each chunk,
which the driver supports properly.
When a 8-bits ECC configuration is used with 4KB pages, the physical
data layout on the NAND looks like this:
| 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 1024 data | 30 ECC | 64 spare | 30 ECC |
So, the spare area is stored in its own chunk, which has a different
size than the other chunks. Since OOB is not used by UBIFS, the initial
implementation of the driver has chosen to not support reading this
additional "spare" chunk of data.
Unfortunately, Marvell has chosen to store the BBT signature in the
OOB area. Therefore, if the driver doesn't read this spare area, Linux
has no way of finding the BBT. It thinks there is no BBT, and rewrites
one, which U-Boot does not recognize, causing compatibility problems
between the bootloader and the kernel in terms of NAND usage.
To fix this, this commit implements the support for reading a partial
last chunk. This support is currently only useful for the case of 8
bits ECC with 4 KB pages, but it will be useful in the future to
enable other configurations such as 12 bits and 16 bits ECC with 4 KB
pages, or 8 bits ECC with 8 KB pages, etc. All those configurations
have a "last" chunk that doesn't have the same size as the other
chunks.
In order to implement reading of the last chunk, this commit:
- Adds a number of new fields to the pxa3xx_nand_info to describe how
many full chunks and how many chunks we have, the size of full
chunks and partial chunks, both in terms of data area and spare
area.
- Fills in the step_chunk_size and step_spare_size variables to
describe how much data and spare should be read/written for the
current read/program step.
- Reworks the state machine to accommodate doing the additional read
or program step when a last partial chunk is used.
This commit is taken from Linux:
'commit c2cdace755b'
("mtd: nand: pxa3xx_nand: add support for partial chunks")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
This commit simplifies the initial configuration performed
by pxa3xx_nand_scan. No functionality change is intended.
This commit is taken from Linux:
'commit 154f50fbde53'
("mtd: pxa3xx_nand: Simplify pxa3xx_nand_scan")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
The Data Flash Control Register (NDCR) contains two types
of parameters: those that are needed for device identification,
and those that can only be set after device identification.
Therefore, the driver can't set them all at once and instead
needs to configure the first group before nand_scan_ident()
and the second group later.
Let's split pxa3xx_nand_config in two halves, and set the
parameters that depend on the device geometry once this is known.
This commit is taken from Linux:
'commit 66e8e47eae65'
("mtd: pxa3xx_nand: Fix initial controller configuration")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
The chunk size represents the size of the data chunks, which
is used by the controllers that allow to split transferred data.
However, the initial chunk size is used in a non-split way,
during device identification. Therefore, it must be large enough
for all the NAND commands issued during device identification.
This includes NAND_CMD_PARAM which was recently changed to
transfer up to 2048 bytes (for the redundant parameter pages).
Thus, the initial chunk size should be 2048 as well.
On Armada 370/XP platforms (NFCv2) booted without the keep-config
devicetree property, this commit fixes a timeout on the NAND_CMD_PARAM
command:
[..]
pxa3xx-nand f10d0000.nand: This platform can't do DMA on this device
pxa3xx-nand f10d0000.nand: Wait time out!!!
nand: device found, Manufacturer ID: 0x2c, Chip ID: 0x38
nand: Micron MT29F8G08ABABAWP
nand: 1024 MiB, SLC, erase size: 512 KiB, page size: 4096, OOB size: 224
This commit is taken from Linux:
'commit c7f00c29aa8'
("mtd: pxa3xx_nand: Increase the initial chunk size")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
The read ID count should be made as large as the maximum READ_ID size,
so there's no need to have dynamic size. This commit sets the hardware
maximum read ID count, which should be more than enough on all cases.
Also, we get rid of the read_id_bytes, and use a macro instead.
This commit is taken from Linux:
'commit b226eca2088'
("nand: pxa3xx: Increase READ_ID buffer and make the size static")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
When 2 commands are submitted in a row, and the second is very quick,
the completion of the second command might never come. This happens
especially if the second command is quick, such as a status read
after an erase
This patch is taken from Linux:
'commit 21fc0ef9652f'
("mtd: nand: pxa3xx-nand: fix random command timeouts")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
When the nand is first probe, and upon the first command start, the
status bits should be cleared before the interrupts are unmasked.
This commit is taken from Linux:
'commit 0b14392db2e'
("mtd: nand: pxa3xx_nand: fix early spurious interrupt")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Since the pxa3xx_nand driver was added there has been a discrepancy in
pxa3xx_nand_set_sdr_timing() around the setting of tWP_min and tRP_min.
This brings us into line with the current Linux code.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
Don't store struct mtd_info in struct pxa3xx_nand_host. Instead use the
one that is already part of struct nand_chip. This brings us in line
with current U-boot and Linux conventions.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
The initial buffer is used for the initial commands used to detect
a flash device (STATUS, READID and PARAM).
ONFI param page is 256 bytes, and there are three redundant copies
to be read. JEDEC param page is 512 bytes, and there are also three
redundant copies to be read. Hence this buffer should be at least
512 x 3. This commits rounds the buffer size to 2048.
This commit is taken from Linux:
'commit c16340973fcb64614' ("nand: pxa3xx: Increase initial buffer size")
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Ofer Heifetz <oferh@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Roese <sr@denx.de>
If PCIe Mox module is connected we want to have PCIe node enabled
in U-Boot's device tree.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
Remove smi_pins definition since it is already in armada-37xx.dtsi.
Add assigned-clocks definitions to spi0.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
Enable the pci-aardvark driver in defconfig for Turris Mox and also
enable the pci command.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
The macro name CONFIG_WDT_ARMADA_3720 is called CONFIG_WDT_ARMADA_37XX
instead. Fix this so that watchdog really is enabled in board_init.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
Add support for changing clock rate and parent clock for Armada 37xx
peripheral clocks.
Only clocks which can be disabled (.can_gate is true) can have parent
or rate changed.
This is needed so that Turris Mox can change SPI clock in device tree.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
This adds a weak definition of comphy_update_map to comphy_core,
which does nothing. If this function is defined elsewhere, for example
in board file, the board file can change some parameters of SERDES
configuration.
This is needed on Turris Mox, where the SERDES speed on lane 1 has to
be set differently when SFP module is connected and when Topaz Switch
module is connected.
This is a temporary solution. When the comphy driver for armada-3720
will be added to the kernel, the comphy driver in u-boot shall also be
updated and this should be done differently then.
Signed-off-by: Marek Behun <marek.behun@nic.cz>
Signed-off-by: Stefan Roese <sr@denx.de>
The bootROM in the Armada-38x (and similar) SoC has two modes for UART
boot. The first is when the normal boot media is blank (or otherwise
missing the kwb header). The second is when the boot sequence has been
interrupted with the magic byte sequence on the UART lines.
In the first mode the bootROM routine and error code register will
indicate that there was an error booting from the configured media in
bits 7:0. In the second mode there is no error to indicate but the boot
source is provided via bits 31:28.
Handle both situations so that kwboot can be used for both boot
strapping a blank board and for intercepting a regular boot sequence.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Sean Nyekjaer <sean.nyekjaer@prevas.dk>
Signed-off-by: Stefan Roese <sr@denx.de>
This reverts commit e83e2b3900. This
prevents kwboot from overriding the hardware strapped boot source.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Detect the SD/eMMC boot device at run-time. Load the environment from
the boot deice, as well as save to it.
Leave the environment offset the same as in the SPI flash.
Make SD/eMMC 0 the default environment device when the boot device is
not detected.
Cc: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch accomplishes 2 things to make the kwboot procedure
on the a38x more reliable.
1) We fill the tty with 1K of the magic bootparam. This helps
with the timing of where the microcode picks up in the read of
the line to ensure we actually catch the break to go into recovery
mode
2) Before starting the xmodem transfer we sleep for 2 seconds
and then flush the line. This allows all the magic bootparam
to be flushed from the line and makes the xmodem transfer reliable
and removes the Bad message failures.
Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Stefan is listed as a kirkwood maintainer since commit f822d8578b
(MAINTAINERS: Update Marvell custodianship).
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
The default bootdelay of 3 seconds is good enough and there is no need
to duplicate it in CONFIG_EXTRA_ENV_SETTINGS.
Signed-off-by: Evgeni Dobrev <evgeni@studio-punkt.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The comment of child_pre_probe, one of the 'struct uclass_driver'
members, is currently missing.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently, "help dm" shows as follows:
=> help dm
dm - Driver model low level access
Usage:
dm tree Dump driver model tree ('*' = activated)
dm uclass Dump list of instances for each uclass
dm devres Dump list of device resources for each device
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
This adds a new defconfig which pre-selects the PICO-Hobbit baseboard
allowing a completely non-interactive boot process.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
This adds a new defconfig which pre-selects the PICO-Pi baseboard
allowing a completely non-interactive boot process.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Adds ofnode_by_prop_value() to search for nodes with a given property
and value, an ofnode version of fdt_node_offset_by_prop_value().
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
commit 30a90f56c3 ("dm: core: add functions to get memory-mapped I/O
addresses") introduced a devfdt_remap_addr_index() routine but it does
not make use of the index parameter.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
All Linux firmware drivers are put under "/firmware" node
and it has support to populate "/firmware" node by default.
u-boot and Linux can share same DTB. In this case, driver
probe for devices under "/firmware" will not be invoked
as "/firmware" does not have its own "compatible" property.
This patch scans "/firmware" node by default like "/clocks".
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Create separate function for scanning node by path and
move "/clock" node scan code into that function.
This will be usable if scanning of more node is required.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a driver to configure the SerDes (Serializer/Deserializer) lanes on
the MPC83xx architecture.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
When the DM CPU drivers are active, printing information about a CPU
should be delegated to a matching driver.
Hence, add a static print_cpuinfo that implements this delegation when
DM CPU drivers are active.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Changed condition to CONFIG_IS_ENABLED(CPU):
Signed-off-by: Simon Glass <sjg@chromium.org>
To print the reset status during boot, add a method print_resetinfo to
board_f, which is called in init_sequence_f[], that gets the reset
information from the sysreset driver (assuming there is only one seems
reasonable), and prints it.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
It's useful to have the reset status of the SoC printed out during reset
(e.g. to learn whether the reset was caused by software or a watchdog).
As a first step to implement this, add a get_status method to the
sysreset class, which enables the caller to get printable information
about the reset status (akin to get_desc in the CPU uclass).
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Mario Six <mario.six@gdsys.cc>
Sandbox is not a real bootloader and it does require
a position independent code to be supported.
Thus, build it with -fPIC explicitly.
Fixes: 16940f720f9b ("Makefile: Don't generate position independent code")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reported-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Now that we have the pinctrl driver for Merrifield in place we can make
use of it and set I2C#6 pins appropriately.
Initial configuration came from the firmware. Which quite likely has
been used in the phones, where that is not part of Atom peripheral, is
in use. Thus we need to override the leftover.
Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This API is going to be used to configure some pins that are protected
for simple modification.
It's not a comprehensive pinctrl driver but can be turned into one
when we need this in the future. Now it is planned to be used only
in one place. So that's why I decided not to pollute the codebase with a
full-blown pinctrl-merrifield nobody will use.
This driver reads corresponding fields in DT and configures pins
accordingly.
The "protected" flag is used to distinguish configuration of SCU-owned
pins from the ordinary ones.
The code has been adapted from Linux work done by Andy Shevchenko
in pinctrl-merrfifield.c
Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix build warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This interface will be used to configure properly some pins on
Merrifield that are shared with SCU.
scu_ipc_raw_command() writes SPTR and DPTR registers before sending
a command to SCU.
This code has been ported from Linux work done by Andy Shevchenko.
Signed-off-by: Georgii Staroselskii <georgii.staroselskii@emlid.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
On a
u32 val = __sw32(*addr);
multiple memory accesses are not welcome, since "addr" may
be an IO peripheral register address.
This patch changes __sw16/32 to perform a single memory
access for the source value.
Signed-off-by: Angelo Dureghello <angelo@sysam.it>
The Gen2 TMU is fed with fixed 32.5 MHz signal from CP .
This is then divided by 4 in TMU. Fix the timer clock
setting in Gen2.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Replace those two functions with generic ones by defining the
timer macros in include/config/*.h .
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
The code uses all in all three TMU registers, drop the massive
register layout structures and just define the required timer
registers and use them throughout the code.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
The header contains only the TMU register layout, just inline it
into the TMU timer implementation and drop the header completely.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
The R-Car Gen2 feeds the TMU with CONFIG_SYS_CLK_FREQ / 2,
while the old SH parts use CONFIG_SYS_CLK_FREQ directly.
Just put this into the TMU implementation and drop the
CONFIG_SH_TMU_CLK_FREQ config option.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
These functions are always called for timer = 0, so drop the
timer check. Since these functions are called from one place
only and they are reduced to one line of code, just inline
them.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
The tmu_bit value evaluates to (ffs(4) >> 1) - 1 = (3 >> 1) - 1 = 0.
Just drop the tmu_bit completely as well as CONFIG_SYS_TMU_CLK_DIV.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
This constant is always 4 , for all boards that exist. Define it
once in arch/sh/lib/time.c and remove it from the configs.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Add vbus-supply regulator support.
On some board vbus is not controlled by the phy but by
an external regulator.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
The dtb should be embedded in the u-boot-spl image so that
the CONFIG_SPL_TARGET of spl/u-boot-spl.hex includes it.
This also affects the main u-boot image, so adjust
CONFIG_SPL_FS_LOAD_PAYLOAD_NAME to u-boot.img which now
also includes the dtb.
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Incorrect type of size variable results in 0 being
returned for sdram sizes greater than or equal to
4GB.
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Stratix10 combines the u-boot-spl image into the fpga configuration
bitstream so that the SDM can load the processors memory. This
process requires a hex format of the u-boot-spl image.
CONFIG_SPL_TARGET is set to "spl/u-boot-spl.hex"
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Some devices, namely Intel's stratix10 SoC, require u-boot-spl in
a hex format. This patch adds spl/u-boot-spl.hex as a possible
target.
Signed-off-by: Dalon Westergreen <dwesterg@gmail.com>
Add code to reset all reset signals as in gpio DT node. A reset property
is an optional feature, so only print out a warning and do not fail if a
reset property is not present.
If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Enabled get_function support for dwapb where the function will
return the state of GPIO port.
Signed-off-by: Chin Liang See <chin.liang.see@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Falcon mode allows the SPL to load and jump directly to the kernel,
without loading U-Boot proper.
Add detailed step by step on how to use Falcon mode on pico-imx6ul.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Falcon mode boots the kernel directly from SPL, without loading
the full U-Boot.
As pico-imx6ul does not have a GPIO for selecting Falcon versus normal
mode, enter in Falcon mode when the customer selects the
CONFIG_SPL_OS_BOOT option in menuconfig.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
The serverip part is provided from DHCP server with
'option root-path "192.168.3.1:/srv/tftp/rootfs";' parameter in dhcpd.conf
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The quotes around ${bootargs} were missing as we elaborate those variables
twice - once when we "setenv" the command and secondly when we "run" it.
Without quotes we have just empty string in the second call.
Moreover there is an issue with line breaks - as the original commands
got truncated.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The 'dhcp' command is more versatile as it allows working with the DHCP
server to obtain serverip, ipaddress and other network parameters.
The configuration necessary to obtain the serverip (dhcpd.conf):
option option-150 code 150 = ip-address;
and in the subnet definition:
option option-150 192.168.X.Y;
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The 'rootpath' can be provided by DHCP server. Removing this line prevents
from overwriting it.
To do that on the DHCP server side (isc-dhcp-server) modify dhcpd.conf
and add 'option root-path "192.168.X.Y:/srv/tftp/rootfs";'
Signed-off-by: Lukasz Majewski <lukma@denx.de>
just try to bring up an imx6ull board with console
on uart5 and found, that input_val for pin
MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX is 7 and
not 5 on imx6ull.
With this patch rx works now.
Signed-off-by: Heiko Schocher <hs@denx.de>
The CONFIG_FSL_USDHC is defined inside "mx6_common.h", which is
already included in this file.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The new config skips the boot menu which asks which board is in
use. This is useful to allow direct booting of image without user
iteration.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
This rework the DFU settings so it supports the SPL and U-Boot image,
as well as the single partition layout we are using by default.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Currently the baseboards do not offer a way to autodetect which one is
in use, so we ask the user if no value has been set.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Due the changes in previous commits, we need to resync the defconfig
to reduce noise in next commits.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
The 'bmode' command is helpful for switching the boot media.
In the case of pico-imx6ul there are two possible boot media:
eMMC or USB.
To boot from eMMC:
=> bmode emmc
To boot from USB (via Serial Download Protocol):
=> bmode usb
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
fastboot tool is a convenient way to flash the eMMC, so
add support for it.
Examples of usages:
On the pico-imx6ul U-Boot prompt:
=> fastboot 0
On the Linux PC connected via USB:
1. Retrieving the U-Boot version
$ sudo fastboot getvar bootloader-version -i 0x0525
bootloader-version: U-Boot 2018.07-rc2-00130-g0881835-dirty
finished. total time: 0.000s
2. Resetting the board
$ sudo fastboot reboot -i 0x0525
(this causes the pico-imx6ul to reboot)
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
There are two versions of imx6ul pico SOMs: one with 256MB and another
one with 512MB of RAM.
Convert to SPL so that both versions can be supported. This patch
doesn't rework the clock initialization to avoid changing the behavior
in this same patch, so it will be cleaned up in future.
Currently only the 256MB is tested/supported.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Instead of keeping a custom environment, use a more generic approach
by switching to distro config.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
I just stumbled over some cluttered UBIFS messages. It seems some
newline chars are missing in the current U-Boot UBI source.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Last user of this driver went away in May 2017, in
commit eb5ba3aefd ("i2c: Drop use of CONFIG_I2C_HARD")
Signed-off-by: Tuomas Tynkkynen <tuomas@tuxera.com>
When used with a device tree, this will extract the card detect
and write protect pins from the device tree and configure them
accordingly. This assumes the GPIO_ACTIVE_LOW/HIGH is supported
by da8xx_gpio.
Signed-off-by: Adam Ford <aford173@gmail.com>
DM_I2C_COMPAT is somehow being enabled outside of Kconfig, so
this explicitly undefines it in the header file, and brackets
the I2C initialization around an #ifdef to not manually
initialize the I2C controller when the DM_I2C is enabled.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
Enabling DM_PMIC, DM_REGULATOR_FIXED, and DM_REGULATOR_GPIO
gives us the ability to better monitor voltages and enable
hardware through the device tree. The TL4030 (TPS65950) is
not yet migrated to DM, so this patch only enables the fixed
and GPIO controlled regulators.
Signed-off-by: Adam Ford <aford173@gmail.com>
With DM enabled, this patch enables DM_SERIAL and removes
the NS16550 initialization from da850_lowlevel since the driver
will take care of that itself.
Signed-off-by: Adam Ford <aford173@gmail.com>
With DM_MMC now available, this patch enables DM_MMC for the
omapl138_lcdk in U-Boot and keeps the older style for SPL.
Signed-off-by: Peter Howard <phoward@gme.net.au>
Signed-off-by: Adam Ford <aford173@gmail.com>
With CONFIG_BLK becoming a requirement, the Davinci MMC driver
needs to be updated with DM_MMC support. Since SPL is tiny and
many boards do not support DM in SPL, this retains the backwards
compatibility for those boards who need to initialize MMC manually
in SPL.
Signed-off-by: Peter Howard <phoward@gme.net.au>
Signed-off-by: Adam Ford <aford173@gmail.com>
The simple pinctrl driver currently available works with the omap3.
Enabling this will use the device tree to automatically set the
pin-muxing for various drivers.
Signed-off-by: Adam Ford <aford173@gmail.com>
The OF_CONTROL and OF_PLATDATA are not really useful without DM.
This patch supports DM_SPL, but it requires manual references
both Serial and MMC.
Signed-off-by: Adam Ford <aford173@gmail.com>
The getcd and getwp functions when DM_MMC is enabled are
assumming the DM_GPIO is enabled. In cases (like SPL) where
DM_GPIO may not be enabled, wrap these calls in an #ifdef
Signed-off-by: Adam Ford <aford173@gmail.com>
The serial port was being manually configured during SPL build,
however in preparation to allow DM in SPL, this needs to change
to be based on whether or not DM_SERIAL is enabled because, soon
the assumption that SPL means no DM may not be accurate.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
boot-common.c checks to see if I2C is enabled in SPL, but
it doens't check for DM_I2C before initializing it. This
will now only initialize the I2C is the DM_I2C is not enabled
to avoid initializing it more than once.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Platforms with limited resources in SPL may enable OF_PLATDATA,
this limits some of the library functions and cannot extract data
from the device tree. This patch adds additional wrappers around
these functions to only allow them when OF_CONTROL is enabled and
OF_PLATDATA is not.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Platforms with limited resources in SPL may enably OF_PLATDATA,
this limits some of the library functions and cannot extract data
from the device tree. This patch adds additional wrappers around
these functions to only allow them when OF_CONTROL is enabled and
OF_PLATDATA is not.
Signed-off-by: Adam Ford <aford173@gmail.com>
Platforms with limited resources in SPL may enably OF_PLATDATA,
this limits some of the library functions and cannot extract data
from the device tree. This patch adds additional wrappers around
these functions to only allow them when OF_CONTROL is enabled and
OF_PLATDATA is not.
Signed-off-by: Adam Ford <aford173@gmail.com>
The driver was developed with references for more than just
dra7, but never included. At least for omap3, this appears
to be functional.
Signed-off-by: Adam Ford <aford173@gmail.com>
The GPIO bank numbers do not appear in the device tree, so this
patch makes the gpio name based on the address
(ie gpio@49054000_31 vs gpio4_31)
adam
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Derald D. Woods <woods.technical@gmail.com>
With the re-sync from Linux 4.18, several entries in
da850-evm-u-boot.dtsi are no longer necessary, so this patch
removes them.
Signed-off-by: Adam Ford <aford173@gmail.com>
With DM and device tree support, let's use the GPIO_ACTIVE_HIGH
and GPIO_ACTIVE_LOW from the device tree as they are intended.
Signed-off-by: Adam Ford <aford173@gmail.com>
The GPIO banks are broken up into two 16-bit registers for each
bank set. Unfortunately, the math that determines how to shift
blindly shifted by the number of the gpio. This worked for gpio
numbers under 32, but higher gpio's are broken. This fixes the
gpio index, so the bank is passed and the shift amount within
the register is passed now instead of the gpio number.
Fixes: 8e51c0f25406("dm: gpio: Add DM compatibility to
GPIO driver for Davinci")
Signed-off-by: Adam Ford <aford173@gmail.com>
The DA850-EVM supports booting from NAND when used with the
UI expander board. da850evm_nand will create an ais file
that can be burned to NAND and booted while storing the env in
NAND along with some partitions tables for storing kernel,
dtb and rootfs in NAND.
Signed-off-by: Adam Ford <aford173@gmail.com>
At least for now, CONFIG_BLK is working, but this variant of
the da850evm doesn't need/support SPL so it's OK to enable it
here.
Signed-off-by: Adam Ford <aford173@gmail.com>
Add the minimum dt nodes required to boot. These nodes
will get deleted as kernel gets these nodes added in the
main dts files.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Create a basic U-Boot environment that allows the automatic loading
of a Linux Kernel located at /boot/Image and an associated device tree
blob located at /boot/k3-am654-base-board.dtb from the secondary
partition of an ext4-formatted SD card on the AM654x EVM. Furthermore
the boot.scr and uEnv.txt detection and loading schemes are supported
in a manner already known from other TI platforms.
Note that this is intended to be a starting point to enable initial
board use and will most certainly get extended and refactored as
different boot media become available.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add initial support for AM654 based EVM running on A53. Enable
4GB of DDR available on the EVM so that kernel DTB file
can be updated accordingly.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[Andreas: Added 4GB ddr support]
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
As no gpio.h is defined in arch/arm/mach-k3/include/,
to avoid compilation failure, do not include asm/arch/gpio.h.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
AM654 has an arasan sdhci controller and a mmc phy attached to it.
Add basic support for K3 specific arasan sdhci controller.
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add support for K3 based remoteproc driver that
communicates with TISCI to start start a remote processor.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
K3 specific SoCs have a dedicated microcontroller for doing
resource management. Any HLOS/firmware on compute clusters should
load a firmware to this microcontroller before accessing any resource.
Adding support for loading this firmware.
After the K3 system controller got loaded with firmware and started
up it sends out a boot notification message through the secure proxy
facility using the TI SCI protocol. Intercept and receive this message
through the rproc start operation which will need to get invoked
explicitly after the firmware got loaded.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Existing rproc_init() api tries to initialize all available
remoteproc devices. This will fail when there is dependency
among available remoteprocs. So introduce a separate api
that allows to initialize remoteprocs individually based
on id.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Secure Proxy module manages hardware threads that are meant
for communication between the processor entities. Adding
support for this driver.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Sometimes mbox controllers wants to store private data in
mbox_chan so that it can be used at a later point of time.
Adding support for hooking private data.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Devices from the TI K3 family of SoCs like the AM654x contain a Device
Management and Security Controller (SYSFW) that manages the low-level
device control (like clocks, resets etc) for the various hardware
modules present on the SoC. These device control operations are provided
to the host processor OS through a communication protocol called the TI
System Control Interface (TI SCI) protocol.
This patch adds a system reset driver that communicates to the system
controller over the TI SCI protocol for allowing to perform a system-
wide SoC reset.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Some TI Keystone 2 and K3 family of SoCs contain a system controller
(like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and
the Device Management and Security Controller on AM65x SoCs) that manage
the low-level device control (like clocks, resets etc) for the various
hardware modules present on the SoC. These device control operations are
provided to the host processor OS through a communication protocol
called the TI System Control Interface (TI SCI) protocol.
This patch adds a power domain driver that communicates to the system
controller over the TI SCI protocol for performing power management of
various devices present on the SoC. Various power domain functionalities
are achieved by the means of different TI SCI device operations provided
by the TI SCI framework.
This code is loosely based on the drivers/soc/ti/ti_sci_pm_domains.c
driver of the Linux kernel.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
There are cases where there are more than one power domain
attached to the device inorder to get the device functional.
So add support for enabling power domain based on the index.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Some TI Keystone 2 and K3 family of SoCs contain a system controller
(like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and
the Device Management and Security Controller on AM65x SoCs) that manage
the low-level device control (like clocks, resets etc) for the various
hardware modules present on the SoC. These device control operations are
provided to the host processor OS through a communication protocol
called the TI System Control Interface (TI SCI) protocol.
This patch adds a clock driver that communicates to the system
controller over the TI SCI protocol for performing clock management of
various devices present on the SoC. Various clock functionality is
achieved by the means of different TI SCI device operations provided by
the TI SCI framework.
This code is loosely based on the drivers/clk/keystone/sci-clk.c driver
of the Linux kernel.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Some systems require more than a single ID to identify and configure any
clock provider. For those scenarios add an optional data field to the
clock control structure.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Some TI Keystone 2 and K3 family of SoCs contain a system controller
(like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and
the Device Management and Security Controller on AM65x SoCs) that manage
the low-level device control (like clocks, resets etc) for the various
hardware modules present on the SoC. These device control operations are
provided to the host processor OS through a communication protocol
called the TI System Control Interface (TI SCI) protocol.
This patch adds a reset driver that communicates to the system
controller over the TI SCI protocol for performing reset management of
various devices present on the SoC. Various reset functionalities are
achieved by the means of different TI SCI device operations provided by
the TI SCI framework.
This code is loosely based on the drivers/reset/reset-ti-sci.c driver of
the Linux kernel.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Some systems require more than a single ID to identify and configure any
reset provider. For those scenarios add an optional data field to the
reset control structure.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add a reset operations function pointer to support querying the current
status of a reset control.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
To support scenarios where a firmware device node has subnodes that
have their own drivers automatically scan the DT and bind those when
the firmware device gets bound.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
TI-SCI message protocol provides support for controlling of various
physical cores available in SoC. In order to control which host is
capable of controlling a physical processor core, there is a processor
access control list that needs to be populated as part of the board
configuration data.
Introduce support for the set of TI-SCI message protocol apis that
provide us with this capability of controlling physical cores.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Since system controller now has control over SoC power management, it
needs to be explicitly requested to reboot the SoC. Add support for
it.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
In general, we expect to function at a device level of abstraction,
however, for proper operation of hardware blocks, many clocks directly
supplying the hardware block needs to be queried or configured.
Introduce support for the set of SCI message protocol support that
provide us with this capability.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
TI-SCI message protocol provides support for management of various
hardware entitites within the SoC. Introduce the fundamental
device management capability support to the driver protocol
as part of this change.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
TI-SCI message protocol provides support for board configuration
to assign resources and other board related operations.
Introduce the board configuration capability support to the driver protocol
as part of this change.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Texas Instrument's System Control Interface (TI SCI) message protocol is
used in Texas Instrument's System on Chip (SoC) such as those in the K3
family AM654 SoC to communicate between various compute processors with
a central system controller entity.
The TI SCI message protocol provides support for management of various
hardware entities within the SoC. Add support driver to allow
communication with system controller entity within the SoC using the
mailbox client.
This is mostly derived from the TI SCI driver in Linux located at
drivers/firmware/ti_sci.c.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Update Makefile to generate
- tispl.bin: First stage bootloader on ARMv8 core
- u-boot.img: Second stage bootloader on ARMv8 core.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add a script that is capable of generating a FIT image
source file that combines ATF, SPL(64 bit) and DT.
This combined image is used by R5 SPL and start ATF
on ARMv8 core.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
By default the device control module registers are locked,
preventing any writes to its registers.
Unlock those registers as part of the init flow.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
AM654 allows for booting from primary or backup boot media.
Both media can be chosen individually based on switch settings.
ROM looks for a valid image in primary boot media, if not found
then looks in backup boot media. In order to pass this boot media
information to boot loader, ROM stores a value at a particular
address. Add support for reading this information and determining
the boot media correctly.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
On K3 family SoCs, once the ROM loads image on R5, M3 resets R5 and
expects to start executing from 0x0. In order to handle this ROM
updates the boot vector of R5 such that first 64 bytes of image load
address are mapped to 0x0.
In this case, it is SPL's responsibility to jump to the proper image
location. So, update the PC with address of reset vector(like how
other exception vectors are handled), instead of branching to reset.
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The AM654 device is designed for industrial automation and PLC
controller class platforms among other applications. Introduce
base support for AM654 SoC.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The MIO clock is enabled by default, and the STDMAC clock is
enabled by the clk driver. The ad-hoc way to enable the clock
is no longer needed.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Now that CONFIG_SYS_MONITOR_LEN increased, we have room for enabling
more options again.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
With the migration to distro-boot, the size of the U-Boot proper
image for uniphier_v7_defconfig exceeded the current limit, 576KB.
Increase it to 832KB.
CONFIG_SYS_UBOOT_BASE must be moved as well to avoid the image
over-wrap because the boot ROM of Pro4, Pro5, PXs2/LD6b loads
the SPL to the physical address 0x100000.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
FPGA subsystem requires special care that's why it should be maintained
via one tree.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are ways how to call fpga loadmk
1. Full command
fpga loadmk [dev] [address]
2. Dev setup via variable
set fpga [dev]
fpga loadmk [address]
3. Address setup via variable
set fpgadata [address]
fpga loadmk [dev]
4. Dev and address setup via variables
set fpga [dev]
set fpgadata [address]
fpga loadmk
Before this patch only cases 1 and 3 are working but the part of code
was trying to support also cases 2 and 4.
This patch is adding support for cases 2 and 4 to have all of
combinations supported.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Convert loadmk command to fpga subcommands. Not all combinations are
working but they have never worked properly. This will be fixed later.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Separate dump, load, loadb, loadp and loadbp commands to separate
functions to make it clear how they are called and what parameters they
need.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move fpga info to U_BOOT_CMD_MKENT subcommand.
Also use strtol instead of simple_strtoul. The reason is that if -1 is
passed (or fpga info without "fpga" variable) the list of all fpgas is
shown.
This functionality is in the fpga core but it couldn't be performed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Create command wrapper to clean fpga subcommands.
The function logic is taken from cmd_dm.c
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is no reason to check parameters in separate switch. Check them
directly when they are read. Also there is no reason to check loadmk
case separately because fpga_data address must be non zero too.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Parameter checking is dead code because all the time there must be all
params assigned. If they are not assigned there is no 9th parameters
passed and checking before return CMD_RET_USAGE.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is no reason to check parameters in separate switch before main
one. This patch is simplifying error path and checking parameters right
after assignment.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Incorrect command is already handled and FPGA_NONE should be used only
one. In case of error CMD_RET_USAGE can be returned directly without any
addition logic around.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move fpga_get_op() to top of file to remove local function declaration
and also remove useless retyping.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Clean fpga_get_op() error handling by moving checking/print to do_fpga.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add support for info, load, loadp, loadb, loadbp, loadmk_legacy,
loadmk_legacy_gz, loadmk_fit, loadfs also with variable support.
There are probably missing failed tests.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The patch applied in 2010
"cmd_fpga: cleanup help and check parameters"
(sha1: a790b5b2326be9d7c9ad9e3d9b51a8bfabc62d07"
was adding this checking
+ if (dev == FPGA_INVALID_DEVICE) {
+ puts("FPGA device not specified\n");
+ op = FPGA_NONE;
+ }
which simply broke one command flow which was
setenv fpga <dev>
fpga loadmk <addr> // legacy image
fpga loadmk <addr>:<fit_image_name> //fit image
Also this sequence for FIT image is completely broken
setenv fpga <dev>
setenv fpgadata <addr>:<fit_image_name>
fpga loadmk
(Note: For legacy images this is working fine).
even from code I don't think this has ever worked properly
for fit image (dev = FPGA_INVALID_DEVICE should be rejected
by fpga core). Fit image support was in 2008 added by:
"[new uImage] Add new uImage fromat support to fpga command"
(sha1: c28c4d193d)
Just a summary of these facts that none found this for pretty long time
it shouldn't be a problem to remove this flow (without fpga dev)
completely to simplify the code.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
There are multiple GPIOs that can be used with the same driver depending
on the CONFIG_GPIO_BASE defined in the controller driver.
GPIO3 and 4 require a clock to be enabled so let's enable them when the
driver is built.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
The set_header call in kwbimage.c adds a checksum to the end of the
image in addition to setting up the header. It 'helpfully' updates the
st_size to match the fact that the file is now longer. However, mkimage
uses this length in the munmap call. This can lead to unmapping an extra
page, of perhaps required data. When this happens, a SEGV can occur.
To prevent this from happening, the munmap call now uses the same length
that was passed to mmap. This could also have been fixed by not changing
the length in kwbimage.c, however changing it in the main file means
that other plugins will also not fall for the same trap.
Signed-off-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
[cp: resolve checkpatch complaints]
Tested-by: Chris Packham <judge.packham@gmail.com>
This patch enables DM_SERIAL for the pandora board. Verified that
the default kernel can still be booted with this.
Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Add support for loading U-Boot on the Broadcom 7260 SoC. This port
assumes Broadcom's BOLT bootloader is acting as the second stage
bootloader, and U-Boot is acting as the third stage bootloader, loaded
as an ELF program by BOLT.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Change the configured serial console index to reflect that it is the
first physical UART, reorder some defconfig lines and move some
environment configuration from bcmstb.h to bcm7445.h.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Four different boards had different options for enabling cache
that were virtually all the same. This consolidates these
common functions into arch/arm/cpu/arm926ejs/cache.c
This also has the positive side-effect of enabling cache on
the Davinci (da850) boards.
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Add mach-at91 to the list of consolidations]
Signed-off-by: Tom Rini <trini@konsulko.com>
Following build warning appears when pinctrl-single is built for ARM64:
In file included from drivers/pinctrl/pinctrl-single.c:10:0:
drivers/pinctrl/pinctrl-single.c: In function ‘single_configure_pins’:
./arch/arm/include/asm/io.h:43:28: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
#define __arch_getw(a) (*(volatile unsigned short *)(a))
Fix this by using phys_addr_t for variable reg instead of u32
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
timer_pre_probe() tries to populate the clock rate from DT. omap
timer driver tries to overwrite this value irrespective of the value
populated fro DT. So update this value only when DT doesn't populate
the clock rate.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
In order to handle counter overflows use 64 bit values for counter.
Also load the initial value during probe.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The strobe dll code is ported from Linux Kernel:
drivers/mmc/host/sdhci-esdhc-imx.c
The comments are from the above file,
"For HS400 eMMC, there is a data_strobe line. This signal is generated
by the device and used for data output and CRC status response output
in HS400 mode. The frequency of this signal follows the frequency of
CLK generated by host. The host receives the data which is aligned to the
edge of data_strobe line. Due to the time delay between CLK line and
data_strobe line, if the delay time is larger than one clock cycle,
then CLK and data_strobe line will be misaligned, read error shows up.
So when the CLK is higher than 100MHz, each clock cycle is short enough,
host should configure the delay target. "
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stefano Babic <sbabic@denx.de>
Add HS400 support.
Selecting HS400 needs first select HS200 according to spec, so use
a dedicated function for HS400.
Add HS400 related macros.
Remove the restriction of only using the low 6 bits of
EXT_CSD_CARD_TYPE, using all the 8 bits.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit fixes various devicetree warnings in the at91 devicetrees
like:
arch/arm/dts/sama5d36ek_cmp.dtb: Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property
These warnings make buildman report failed builds for most of at91 boards.
Thus, fixing it.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
For at91family, makefile was building unwanted DTBs
Moved them under specific target configuration.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Replace clrsetbits on ODR register (2 operations: one read + one write)
by writing on the correct bit (SET or RESET) of the BSRR register
(only 1 write operation).
Moreover this register if safe for simultaneous access by 2 master on
the bus.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This patch adds support for :
- Rate calculation through muxes and generic dividers
- Basic gate setting propagation
- Reparenting for muxes
- Clock rate setting through generic dividers without reparenting
Support is only added to the Composite VPU and VAPB clocks in order
to support the Video Processing Unit Power Domain clock setup.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Amlogic Meson SoCs embeds a specific Power Domain dedicated to the
Video Processing Unit.
This patch implements support for this power domain in preparation of the
future support for the Video display support in U-Boot.
This driver will depend on changes in the clock driver to handle the setup
of the VPU and VAPB clocks configured from DT using assigned-clocks entries.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
In int-ll64.h, we always use the following typedefs:
typedef unsigned int u32;
typedef unsigned long uintptr_t;
typedef unsigned long long u64;
This does not need to match to the compiler's <inttypes.h>.
Do not include it.
The use of PRI* makes the code super-ugly. You can simply use
"l" for printing uintptr_t, "ll" for u64, and no modifier for u32.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
All architectures have the same definition for s8/16/32/64
and u8/16/32/64.
Factor out the duplicated code into <asm-generic/int-ll64.h>.
BTW, Linux unified the kernel space definition into int-ll64.h
a few years ago as you see in Linux commit 0c79a8e29b5f
("asm/types.h: Remove include/asm-generic/int-l64.h").
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
You do not need to use the typedefs provided by compiler.
Our compilers are either IPL32 or LP64. Hence, U-Boot can/should
always use int-ll64.h typedefs like Linux kernel, whatever the
typedefs the compiler internally uses.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
arch/arm/Makefile references armv5 for backwards compatibility with
older compilers. This patch removes those references to armv5,
since by now newer compilers are required which should have armv7
support enabled.
The Makefile also also has a list of options for mtune, but the
entry for CONFIG_CPU_V7A is empty, so this patch tunes the
CPU_V7A architecture to generic-armv7-a.
The following size changed apply to omap3_logic using GCC.
Stock
text data bss dec hex filename
50910 429 67580 118919 1d087 spl/u-boot-spl
540713 22700 327072 890485 d9675 u-boot
Without Armv5
text data bss dec hex filename
50916 429 67580 118925 1d08d spl/u-boot-spl
540719 22700 327064 890483 d9673 u-boot
mtune=generic-armv7-a
text data bss dec hex filename
50932 429 67580 118941 1d09d spl/u-boot-spl
540519 22700 327080 890299 d95bb u-boot
Signed-off-by: Adam Ford <aford173@gmail.com>
setparity users has been updated to use new setconfig ops,
so we can safely remove setparity ops
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Replace stm32_serial_setparity by stm32_serial_setconfig
which allows to set serial bits number, parity and stop
bits number.
Only parity setting is implemented.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Replace setparity by more generic setconfig ops
to allow uart parity, bits word length and stop bits
number change.
Adds SERIAL_GET_PARITY/BITS/STOP macros.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Unify the fgetc function when MUX is activated or not:
- always call tstc() : it is the normal behavior expected
by serial uclass (call tstc then getc) and that avoids
issue when SERIAL_RX_BUFFER is activated
- reload WATCHDOG in the char waiting loop
This patch allow to have the same behavior when CONSOLE_MUX is activated
or not and avoid regression when this feature is deactivated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add test to avoid access to rx buffer when this buffer is empty.
In this case directly call getc() function to avoid issue when tstc()
is not called.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Activate the serial rx buffer.
Prepare console MUX activation with vidconsole, and avoid console
performance issue (missing character for copy-paste).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
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