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78 Commits

Author SHA1 Message Date
Tom Rini
0157013f4a Prepare v2018.11
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-11-14 11:10:06 -05:00
Anatolij Gustschin
745915aa59 gpio: pca953x_gpio: fix DT GPIO flags translation
Commit fb01e07a95 accidentally broke initialisation of GPIO
descriptor flags from device tree: currently the active low
flag from gpio-specifier is always ignored. Fix it.

Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Mario Six <mario.six@gdsys.cc>
2018-11-14 10:59:23 -05:00
Tom Rini
cbabe7f87f configs: Migrate and re-enabled CONFIG_CMD_MTDPARTS
Now that CMD_UBI does not select CMD_MTDPARTS we need to make platforms
that had been enabling it turn it on by hand.  This exposed that we had
not yet migrated CMD_MTDPARTS fully, so do so now.

Fixes: 86dfa556d9 ("cmd: ubi: Remove useless call to mtdparts_init()")
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-11-14 10:53:27 -05:00
Tom Rini
20274b0626 Merge branch 'master' of git://git.denx.de/u-boot-spi 2018-11-13 19:50:01 -05:00
Tom Rini
4114a2614b configs: Resync with savedefconfig
Rsync all defconfig files using moveconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2018-11-13 19:44:53 -05:00
Boris Brezillon
1f758b7936 mtd: Drop duplicate MTD_PARTITIONS Kconfig option
Commit 9c5b00973b ("Convert CONFIG_MTD_PARTITIONS et al to Kconfig")
introduced a publicly visible Kconfig entry for the
CONFIG_MTD_PARTITIONS option, while the rework on MTD partitioning
was in progress, and we somehow did not notice that the same Kconfig
entry was added by commit 4048a5c519 ("mtd: declare MTD_PARTITIONS
symbol in Kconfig"), but this time as an invisible entry (this can
only be selected by other options).

Keep the non-visible version of this symbol, since MTD_PARTITIONS is
not something the user should be able to enable/disable directly.

Fixes: 4048a5c519 ("mtd: declare MTD_PARTITIONS symbol in Kconfig")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-13 18:53:10 +05:30
Boris Brezillon
86dfa556d9 cmd: ubi: Remove useless call to mtdparts_init()
Commit c58fb2cdb3 ("cmd: ubi: clean the partition handling")
introduced a call to mtd_probe_devices() in the ubi_attach() path
and this function takes care of parsing mtdparts/mtdids and
creating/registering the associated mtd partitions.

The mtdparts_init() call in the ubi_detach() path is not only
unnecessary but can sometimes print error messages even when things
work properly (that's the case with SPI NAND devices that have not
been probed with 'mtd list'), which is misleading.

Remove this call to mtdparts_init() and drop the dependency on
CMD_MTDPARTS.

Fixes: c58fb2cdb3 ("cmd: ubi: clean the partition handling")
Reported-by: Stefan Roese <sr@denx.de>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-13 18:53:10 +05:30
Boris Brezillon
03303fb715 mtd: Make {MTDIDS, MTDPARTS}_DEFAULT visible when MTD_PARTITIONS is selected
gwventana configs are relying on CMD_UBI to select CMD_MTDPARTS,
which is then making {MTDIDS,MTDPARTS}_DEFAULT options available.

We are about to remove the 'select CMD_MTDPARTS' statement in the
CMD_UBI entry, but if we do that without first making sure
{MTDIDS,MTDPARTS}_DEFAULT are visible, we end up with a build
failure when building gwventana configs.

Address that by adding a depends on MTD_PARTITIONS to
{MTDIDS,MTDPARTS}_DEFAULT which does the trick since CMD_UBI selects
MTD_UBI which in turn selects MTD_PARTITIONS.

We also get rid of the depends on CMD_MTD, since CMD_MTD also selects
MTD_PARTITIONS.

Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-13 18:53:10 +05:30
Boris Brezillon
96c2961ba6 dfu: nand: Add missing dependency on CMD_MTDPARTS
dfu_fill_entity_nand() uses find_dev_and_part() and mtdparts_init()
which are provided by cmd/mtdparts.c.

Add the dependency to avoid build failures when CMD_MTDPARTS is not
selected.

Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Fixes: 6828e602b7 ("dfu: Migrate to Kconfig")
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-13 18:53:10 +05:30
Boris Brezillon
5ffcd50612 mtd: Use default mtdparts/mtids when not defined in the environment
U-boot provides a mean to define default values for mtdids and mtdparts
when they're not defined in the environment. Patch mtd_probe_devices()
to use those default values when env_get("mtdparts") or
env_get("mtdids") return NULL.

This implementation is based on the logic found in cmd/mtdparts.c.

Fixes: 5db66b3aee ("cmd: mtd: add 'mtd' command")
Reported-by: Stefan Roese <sr@denx.de>
Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@openedev.com>
2018-11-13 18:53:10 +05:30
Tom Rini
c80cc3df3d Merge tag 'u-boot-imx-20181112' of git://git.denx.de/u-boot-imx
Fix build vf boards + fix gpr_init()
2018-11-12 08:06:34 -05:00
Marcel Ziswiler
43e6f94cbc imx: mkimage: add size check to the u-boot.imx make target
The make macro to check if the binary exceeds the board size limit is
taken straight from the root Makefile.

Without this and e.g. enabled EFI Vybrid fails booting as the regular
size limit check does not take the final u-boot.imx binary size into
account which is bigger due to alignment as well as IMX header stuff.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2018-11-12 11:08:53 +01:00
Marcel Ziswiler
42cc42acea board: toradex: colibri_vf: drop SPI support
Drop SPI support saving precious 4 Kb on boards with tough size
restrictions.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
2018-11-12 11:08:44 +01:00
Marcel Ziswiler
873629cd63 board: toradex: colibri_vf: unset CONFIG_CMDLINE_EDITING
Unset CONFIG_CMDLINE_EDITING saving precious 4 Kb on boards with tough
size restrictions.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
2018-11-12 11:08:32 +01:00
Marcel Ziswiler
f127124f8b board: toradex: colibri_vf: efi_loader: unset CONFIG_EFI_UNICODE_CAPITALIZATION
Unset CONFIG_EFI_UNICODE_CAPITALIZATION on boards with tough size
restrictions.

This is analogous to commit a90bf07afc
("efi_loader: unset CONFIG_EFI_UNICODE_CAPITALIZATION").

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Alexander Graf <agraf@suse.de>
2018-11-12 11:08:10 +01:00
Marek Vasut
26cc40d8c4 mmc: dw_mmc: Add RCRC handling
This patch adds check for command response CRC failure. The driver
is currently ignoring CRC check failure on command resposes which
have CRC atteched to it, which can be potentially dangerous. Even
more grueling problem happens when the command response is followed
by data transfer though, as in that case, the dwmci_data_transfer()
function will spin until it reaches the 240s timeout.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2018-11-10 08:16:30 -05:00
Jun Nie
fb3148a230 common: build ymodem only on need
Build ymodem only on need to shrink spl image size.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
2018-11-09 13:45:42 -05:00
Lars Povlsen
6b0afcc850 common: Compile error with CONFIG_MULTI_DTB_FIT and not SPL
common/common_fit.c is including <spl.h>, but not actually using it. The
inclusion will cuase compile error on platforms using CONFIG_OF_SEPARATE
and not SPL.

Signed-off-by: Lars Povlsen <lars.povlsen@microsemi.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
2018-11-09 10:44:50 -05:00
Andy Shevchenko
cdef6bb43c dm: Fix typo - missed semicolon
The commit

  484fdf5ba0 ("dm: Add support for all targets which requires MANUAL_RELOC")

introduces subtle typo, i.e. missed semicolon.

Fixes: 484fdf5ba0 ("dm: Add support for all targets which requires MANUAL_RELOC")
Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2018-11-09 10:44:50 -05:00
Simon Goldschmidt
30c0740e79 spl: fix debug prints for tiny printf
Tiny printf does not support %.*s and %lX. Since tiny printf should
be very common in SPL, replace these by %32s (for printing image
name) and %lx.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-09 10:44:50 -05:00
Patrick Delaunay
84ee59a5fd MAINTAINERS: Update stm32mp entry
Add mailing list for stm32mp architecture and board.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-09 10:44:50 -05:00
Stefan Roese
6514bfc298 fit: Add missing CR in debug output in fit_find_config_node()
Testing has shown that a line-break is missing in one debug line in
fit_find_config_node().

Signed-off-by: Stefan Roese <sr@denx.de>
2018-11-09 10:44:50 -05:00
Christoph Niedermaier
19bbd09825 imx: imx6: perform gpr_init only on suitable cpu types
If the function gpr_init is used in a common MX6 spl
implementation we have to ensure that it is only called for
suitable cpu types, otherwise it breaks hardware parts like
enet1, can1, can2, etc.

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.de>
2018-11-08 14:35:40 +01:00
Tom Rini
711720a0b3 Merge branch 'master' of git://git.denx.de/u-boot-ubi 2018-11-08 07:15:29 -05:00
Bin Meng
c5bbfaf05d imx8qxp_mek: Disable CONFIG_DISPLAY_CPUINFO
Due to revert of commit c0434407b5, this board does not build
any more. Disable CONFIG_DISPLAY_CPUINFO for v2018.11 release.

This commit should be reverted after v2018.11 release.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-07 12:13:45 -05:00
Bin Meng
5764ea2df4 Revert "board_f: Use static print_cpuinfo if CONFIG_CPU is active"
This reverts commit c0434407b5.

It turns out commit c0434407b5 broke some boards which have DM CPU
driver with CONFIG_DISPLAY_CPUINFO option on. These boards just fail
to boot when print_cpuinfo() is called during boot.

Fixes are already sent to ML and in u-boot-dm/next, however since
we are getting close to the v2018.11 release, it's safer we revert
the original commit.

This commit should be reverted after v2018.11 release.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2018-11-07 12:13:35 -05:00
Tom Rini
f63f65e489 Merge tag 'xilinx-for-v2018.11-rc3' of git://git.denx.de/u-boot-microblaze
Xilinx fixes for v2018.11-rc3

- Fix fit loading address for Zynq
2018-11-07 07:10:02 -05:00
Michal Simek
acb83bb3ec arm: zynq: Setup non zero SPL FIT load address
Default setup is 0 which is incorrect place because it points to OCM
which is allocated for SPL only in our case.
Use address in DDR.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-07 10:07:31 +01:00
Paul Davey
e4aa10ba57 fs: ubifs: Fix UBIFS decompression on 64 bit
Add local size_t variable to crypto_comp_decompress as intermediate
storage for destination length to avoid memory corruption and incorrect
results on 64 bit targets.

This is what linux does for the various lz compression implementations.

Signed-off-by: Paul Davey <paul.davey@alliedtelesis.co.nz>
Cc: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
2018-11-07 08:49:27 +01:00
Tom Rini
dd610e616c Merge tag 'u-boot-imx-20181106' of git://git.denx.de/u-boot-imx
Fix coverity issues for i.MX8
2018-11-06 11:12:00 -05:00
Tom Rini
acf52fb26f Merge git://git.denx.de/u-boot-marvell 2018-11-06 10:37:31 -05:00
Tom Rini
8f78e70012 Merge git://git.denx.de/u-boot-x86 2018-11-06 08:23:32 -05:00
Stefan Roese
ae4c38a538 arm: mvebu: armada-xp-theadorable.dts: Change CS# for 2nd FPGA
The new board version has the 2nd FPGA connected via CS# 0 instead of
2 on SPI bus 1. Change this setup in the DT accordingly. Please note
that this change does still work on the old board version because the
CS signal is not used on this board.

Signed-off-by: Stefan Roese <sr@denx.de>
2018-11-06 13:21:13 +01:00
Stefan Roese
6843db9922 arm: mvebu: armada-xp-theadorable.dts: Add "spi-flash" compatible property
Add the "spi-flash" compatible string so that the generic sf_probe
driver can probe the SPI flash on the theadorable Armada-XP board.

Signed-off-by: Stefan Roese <sr@denx.de>
2018-11-06 13:21:13 +01:00
Stefan Roese
a8483505e8 arm: mvebu: Move PCI(e) MBUS window to end of RAM
With patch 49b23e035d (pci: mvebu: Increase size of PCIe default mapping)
the mapping size for each PCI(e) controller was increased from 32MiB to
128MiB. This leads to problems on boards with multiple PCIe slots / ports
which are unable to map all PCIe ports, e.g. the Armada-XP theadorable:

DRAM:  2 GiB (667 MHz, 64-bit, ECC not enabled)
SF: Detected m25p128 with page size 256 Bytes, erase size 256 KiB, total 16 MiB
Cannot add window '4:f8', conflicts with another window
PCIe unable to add mbus window for mem at f0000000+08000000
Model: Marvell Armada XP theadorable

This patch moves the base address for the PCI(e) memory spaces from
0xe8000000 to the end of SDRAM (clipped to a max of 0xc0000000 right now).
This gives move room and flexibility for PCI(e) mappings.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: VlaoMao <vlaomao@gmail.com>
Tested-by: VlaoMao <vlaomao at gmail.com>
2018-11-06 13:21:13 +01:00
Peng Fan
0ea82ba2b0 MAINTAINERS: add NXP linux team maillist as i.MX reviewer
Add NXP linux team upstream maillist as reviewer

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-11-06 11:26:21 +01:00
Fabio Estevam
78c640fed6 ARM: dts: fsl-imx8qxp-mek: Move regulator outside "simple-bus"
Commit 3c28576bb0 ("arm: dts: imx8qxp: fix build warining")
fixed the dts warning by removing the unnecessary
#address-cells/#size-cells, but the recommendation for regulators is not
to place them under "simple-bus", so move the reg_usdhc2_vmmc regulator
accordingly.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2018-11-06 11:25:55 +01:00
Fabio Estevam
664fa567ef mx8mq_evk: README: Delete file introduced by mistake
board/freescale/mx8mq_evk/README has been introduced by mistake
in commit d0dd73974c ("imx: add i.MX8QXP MEK board support")

Remove it for now as this should be introduced when mx8mq_evk
support is in place.

Reported-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2018-11-06 11:24:36 +01:00
Peng Fan
47f7a9def7 tools: imx8image: flatten container header only when creating container
If there is no CONTAINER entry, there is no need to flatten container
header.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-11-06 11:24:10 +01:00
Peng Fan
a9f7f1c585 tools: imx8image: fix coverity CID 184233
Fix:
CID 184233:    (NEGATIVE_RETURNS)
Using variable "container" as an index to array "imx_header.fhdr".

Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-11-06 11:23:59 +01:00
Peng Fan
df439e938c tools: imx8image: fix coverity CID 184234
Fix:
CID 184234:    (TAINTED_SCALAR)
Using tainted variable "header.num_images - 1" as an index into an array "header.img".

Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2018-11-06 11:23:45 +01:00
Peng Fan
fc61cc2ca3 tools: imx8image: check lseek return value
Check lseek return value.

Fix Coverity CID: 184236 184235 184232

Reported-by: Coverity
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2018-11-06 11:23:27 +01:00
Andy Shevchenko
24109bba6a x86: acpi: Remove redundant Offset (0x00)
New ACPI assembler issues a warning:

board/intel/edison/dsdt.asl.tmp     13:     Offset (0x00),
Remark   2158 -                                       ^ Unnecessary/redundant use of Offset operator

Indeed, in the OperationRegion the offset is 0x00 by default.

Thus, drop unneeded Offset() use as suggested by ACPI assembler.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2018-11-06 13:35:06 +08:00
Tom Rini
5ef76e59c1 Merge branch 'master' of git://git.denx.de/u-boot-sh 2018-11-04 08:12:21 -05:00
Tom Rini
5d6fefa805 Merge tag 'mips-fixes-for-v2018.11' of git://git.denx.de/u-boot-mips
- replace the dynamic size of the relocation table
  with a fixed but configurable size
- fixes non-working CONFIG_OF_SEPARATE=y due to invalid _end symbol
2018-11-03 08:21:05 -04:00
Daniel Schwierzeck
9630146411 MIPS: make size of relocation table fixed but configurable
Currently the size of the relocation table will be shrunk
to the actual size needed. Although this gives a maximal
space saving, it messes up the _end symbol. This breaks
features like appended DTBs because the _end symbol doesn't
point to the real end of the U-Boot binary.

Remove the size shrinking and make the size of the relocation
table fixed but configurable. This follows the Linux approach
and the user can adjust the size to his needs.

Also rename the relocation table section from .rel to .data.reloc
to follow the Linux approach and to avoid ambiguities with the
.rel.* sections added by the linker.

Reported-by: Lars Povlsen <lars.povlsen@microsemi.com>
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2018-11-02 22:39:07 +01:00
Marek Vasut
a376dde1de mmc: tmio: sdhi: Merge DTCNTL access into single register write
It is perfectly fine to write th DTCNTL TAP count and enable the
SCC sampling clock operation in the same write.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 16:07:04 +01:00
Marek Vasut
2fc10754d1 mmc: tmio: sdhi: Implement waiting for DAT0 line state
When the bus switches to 1.8V mode of operation, it is necessary to
verify that the card correctly initiated and completed the voltage
switch. This is done by reading out the state of DATA0 line.

This patch implement support for reading out the state of the DATA0
line, so the MMC core code can correctly switch to 1.8V mode.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 16:04:45 +01:00
Marek Vasut
dc1488f1d2 mmc: tmio: sdhi: Clear HS400 settings when resetting SCC
Make sure to clear HS400 configuration when resetting the SCC block.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 16:04:45 +01:00
Marek Vasut
52e1796883 mmc: tmio: sdhi: Touch SCC only when UHS capable
Add check to avoid touching the SCC tuning registers in case the IP
doesn't support them or if the support isn't in place yet.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 16:04:44 +01:00
Marek Vasut
c83da2ebc0 mmc: tmio: Preinitialize regulator to 3.3V
Preinitialize the SD card signals regulator to 3.3V, which is the
default post-reset setting, to be sure the regulator is set to a
valid value.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 15:57:14 +01:00
Marek Vasut
8171f99e7d mmc: tmio: Configure clock before any other IOS
Configure the clock settings before reconfiguring any other IO settings.
This is required when the clock must be stopped before changing eg. the
pin configuration or any of the other properties of the bus. Running the
clock configuration first allows the MMC core to do just that.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 15:57:14 +01:00
Marek Vasut
33633ebb1c mmc: tmio: Silence transfer errors when tuning
In case the controller performs card tuning, that is, sends MMC
command 19 or 21, silence possible CRC error warning prints. The
warnings are bound to happen, since the tuning will fail for some
settings while searching for the optimal configuration of the bus
and that is perfectly OK.

This patch passes around the MMC command structure and adds check
into tmio_sd_check_error() to avoid printing CRC error warning
when the tuning happens.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 15:57:14 +01:00
Marek Vasut
b22c8d0de4 mmc: tmio: Improve error handling
Properly handle return values and abort operations when they are
non-zero. This is a minor improvement, which fixes two remaining
unchecked return values.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 15:57:14 +01:00
Marek Vasut
645a575aeb mmc: tmio: Simplify pinmux handling
The SD UHS SDR12, SDR25, SDR50, SDR104, DDR50 and MMC HS200, HS400
modes all use 1.8V signaling, while all the legacy modes use 3.3V
signaling. While there are extra modes which use 1.2V signaling,
the existing hardware does not support those.

Simplify the pinmux such that 3.3V signaling implies legacy mode
pinmux and the rest implies UHS mode pinmux. This prevents the
massive case statement from growing further. Moreover, it fixes
an edge case where during SD 1.8V switch, the bus mode is still
set to default while the signaling is already set to 1.8V, which
results in an attempt to communicate with a 1.8V card using pins
in 3.3V mode and thus communication failure.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-11-02 15:57:14 +01:00
Marek Vasut
e5cb6bd9a2 ARM: rmobile: Generate fitting mem_map on Gen3
Patch "ARM: rmobile: Mark 4-64GiB as DRAM on Gen3" marked the entire
64bit DRAM space as cachable. On CortexA57, this might result in odd
side effects, where the CPU tries to prefetch from those areas and if
there is no DRAM backing them, CPU bus hang can happen.

This patch fixes it by generating the mem_map structure based on the
actual memory layout obtained from the DT, thus not marking areas
without any DRAM behind them as cachable.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Fixes: c1ec347638 ("ARM: rmobile: Mark 4-64GiB as DRAM on Gen3")
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-11-02 15:57:13 +01:00
Marek Vasut
5dbdd3a600 pinctrl: renesas: Add POCCTRL handling to r8a77990
Add definition of the POCCTRL register and bits therein to R8A77990 E3
pincontrol driver. This allows the pincontrol driver to configure SDHI
pin voltage according to power-source DT property.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-11-02 15:57:13 +01:00
Marek Vasut
0ff9e4800f pinctrl: renesas: Fix DRV register offset
Use fixed 4bit size for generating the DRV register element mask,
not the size of the value, which can be smaller.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2018-11-02 15:57:13 +01:00
Tom Rini
99431c1c21 Merge tag 'arc-for-2018.11' of git://git.denx.de/u-boot-arc
Just 2 non-functinal changes:

 1. Rename of EMDK to EMSDP so it matches real marketing name
 2. Add essential README for IoTDK
2018-11-02 09:39:18 -04:00
Alexey Brodkin
a6b8c29fb8 iot_dk: Add README
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-11-01 23:04:05 +03:00
Alexey Brodkin
adc9b09a23 emdk->emsdp: Rename board
Real marketing name of the board was recently updated so
to accommodate that change renaming the board and all
related to it.

Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-11-01 23:04:05 +03:00
Sam Protsenko
de8566a160 arm: ti: boot: Don't read environment partition
This part should've been remove in commit 88d60db011 ("arm: ti: boot:
Remove environment partition"), but I missed it somehow. Remove reading
dtb file from environment partition on eMMC, as we don't have it
anymore.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
2018-11-01 10:02:43 -04:00
Jens Wiklander
c091dc7dad test: tee: fix resource leak in dm_test_tee()
Fixes possible resource leak in dm_test_tee() reported by Coverity.

Reported-by: Coverity (CID: 184175)
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-11-01 10:02:43 -04:00
Patrick Delaunay
be6eb23931 cmd: remove CONFIG_SOURCE support in Makefile
This line is no more needed and can be removed.

Only CONFIG_CMD_SOURCE is defined in Kconfig and
used in defconfig files.

CONFIG_SOURCE if not defined in source code and
"config SOURCE" is not present in any Kconfig.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-11-01 10:02:43 -04:00
Lokesh Vutla
26da01f700 power: spl: add SPL_DM_REGULATOR_GPIO in Kconfig
The Makefile already tests for SPL_DM_REGULATOR_GPIO, but Kconfig
does not provide it. This adds SPL_DM_REGULATOR_GPIO to Kconfig.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-11-01 10:02:43 -04:00
Keerthy
1a25d9071b cmd: remoteproc: Fix the base of strtoul for ID conversion from 3 to 10
Currently the base is 3 fix it 10 so that IDs follow decimal system.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvulta@ti.com>
2018-11-01 10:02:43 -04:00
Andrei.Stefanescu@microchip.com
25ae865171 configs: sama5d2_ptc_ek: read environment from FAT
On our demo setup for SD card boot, the u-boot environment
is in a FAT partition.

This patch changes the default configuration, specifing that
the u-boot environment is in a FAT partition instead of raw MMC.

Signed-off-by: Andrei Stefanescu <andrei.stefanescu@microchip.com>
Acked-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-11-01 10:02:43 -04:00
Eugen.Hristev@microchip.com
6b4dba48ff configs: at91: at91sam9x5ek: fix bootcmd for NAND flash
The default bootcommand needs to be accurate w.r.t the nand memory map
at http://www.at91.com/linux4sam/bin/view/Linux4SAM/AT91sam9x5ekMainPage#NAND_Flash_demo_Memory_map

Updated to load kernel + dtb at right offsets and boot the zImage.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-11-01 10:02:10 -04:00
Martin Fuzzey
65b60897a7 w1: fix data abort if no one wire bus master present
When the "w1 bus" command is used with no bus master present
a data abort may occur.

This is because uclass_first_device() returns zero, but sets the output
struct udevice pointer to NULL in the no device found case.

Fix w1_get_bus() to account for this and return an error code
as is expected by the callers.

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-11-01 10:02:10 -04:00
Martin Fuzzey
586d4b010e w1-eeprom: ds24xxx: fix data abort in ds24xxx_probe()
Data abort was occurring when using "w1 bus" with a DS24B33 present.

The abort occurred in the ds24xxx_probe() because the struct w1_device
pointer was NULL. This is because that structure  is allocated by
the parent device uclass (by .per_child_platdata_auto_alloc_size)
and thus the correct accessor is dev_get_parent_platdata() not
dev_get_platdata()

Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-11-01 10:02:10 -04:00
Tom Rini
fdaccfeb5e Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2018-10-31 17:15:55 -04:00
Simon Goldschmidt
f48db4ede0 arm: socfpga: imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
Using imply for SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION instead of
select ensures we can build without partition support (used to build
a network boot only version of SPL and U-Boot).

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-10-31 01:41:10 +01:00
Stefan Roese
f457c52eb8 arm: socfpga: Fix bootcounter located at the end of internal SRAM
Commit 768f23dc8a ("ARM: socfpga: Put stack at the end of SRAM") broke
those socfpga boards that keep the bootcounter at the end of the
internal SRAM as the bootcounter needs 8 bytes by default and thus the
very first SPL call to board_init_f_alloc_reserve overwrites the
bootcounter.

This patch allows to move the initial stack pointer down a bit by
checking if CONFIG_SYS_BOOTCOUNT_ADDR is located in the internal SRAM
area and then using this address as location for the start of the
stack pointer.

No new macros / defines are added by this approach.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-10-31 01:41:10 +01:00
Simon Goldschmidt
d5de3d4978 arm: socfpga: fpga: fix type of local variable
The 'status' variable in 'socfpga_load()' for both gen5 and arria10
is of type 'unsigned long' while it is always used as 'int' only.
Change it to 'int'.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-10-31 01:41:10 +01:00
Tom Rini
a744370e6f Merge tag 'mpc85xx-for-v2018.11' of git://git.denx.de/u-boot-mpc85xx
Workaround and bug fix for Freescale PowerPC

Add workaround for Freescale USB erratum A005275.
Correct RCW macros for T1080.
2018-10-30 16:53:42 -04:00
Bin Meng
db148f2a69 powerpc: t1040: Correct RCW EC2 settings
Per T1040RM (Rev. 1, 08/2015), there are 2 issues with the RCW EC2
settings.

- The value of FSL_CORENET_RCWSR13_EC2_FM1_GPIO is wrong and should
  be 0x04000000 (value of 1 in RCW bit [420:421])
- Value of 2/3 are reserved in RCW bit [420:421], hence there is no
  macro FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Poonam Aggrwal <poonam.aggrwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-10-29 13:19:43 -07:00
Bin Meng
c00d0012f5 powerpc: t1040: Correct RCW MAC2_GMII_SEL value
Per T1040RM (Rev. 1, 08/2015), the value of
FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT is wrong
and should be 0x00000080 (bit 440 in the RCW).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Poonam Aggrwal <poonam.aggrwal@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-10-29 13:13:33 -07:00
Chris Packham
4eaf7f525a fsl/usb: Workaround for USB erratum-A005275
Workaround makes FS as default mode on all affected socs.

Add support to check erratum-A005275 validity for an soc. This info is
required to determine whether a given soc is affected by this erratum.
Add quirk for this erratum "has_fsl_erratum_a005275" . This quirk is used
to enable workaround for the errata

Force FS mode as default by:
        - making EPS as FS
        - setting PFSC bit to disable HS chirping

This workaround can be disabled by mentioning "no_erratum_a005275" in
hwconfig string

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: York Sun <york.sun@nxp.com>
2018-10-29 13:13:05 -07:00
437 changed files with 925 additions and 706 deletions

View File

@@ -121,6 +121,7 @@ F: drivers/spi/bcmstb_spi.c
ARM FREESCALE IMX
M: Stefano Babic <sbabic@denx.de>
M: Fabio Estevam <fabio.estevam@nxp.com>
R: NXP Linux Team <linux-imx@nxp.com>
S: Maintained
T: git git://git.denx.de/u-boot-imx.git
F: arch/arm/cpu/arm1136/mx*/
@@ -232,6 +233,7 @@ ARM STM STM32MP
M: Patrick Delaunay <patrick.delaunay@st.com>
M: Christophe Kerello <christophe.kerello@st.com>
M: Patrice Chotard <patrice.chotard@st.com>
L: uboot-stm32@st-md-mailman.stormreply.com (moderated for non-subscribers)
S: Maintained
F: arch/arm/mach-stm32mp
F: drivers/clk/clk_stm32mp1.c

View File

@@ -3,7 +3,7 @@
VERSION = 2018
PATCHLEVEL = 11
SUBLEVEL =
EXTRAVERSION = -rc3
EXTRAVERSION =
NAME =
# *DOCUMENTATION*

View File

@@ -150,8 +150,8 @@ config TARGET_AXS101
config TARGET_AXS103
bool "Support Synopsys Designware SDP board AXS103"
config TARGET_EMDK
bool "Synopsys EM Development kit"
config TARGET_EMSDP
bool "Synopsys EM Software Development Platform"
select CPU_ARCEM6
config TARGET_HSDK
@@ -166,7 +166,7 @@ endchoice
source "board/abilis/tb100/Kconfig"
source "board/synopsys/Kconfig"
source "board/synopsys/axs10x/Kconfig"
source "board/synopsys/emdk/Kconfig"
source "board/synopsys/emsdp/Kconfig"
source "board/synopsys/hsdk/Kconfig"
source "board/synopsys/iot_devkit/Kconfig"

View File

@@ -4,7 +4,7 @@ dtb-$(CONFIG_TARGET_AXS101) += axs101.dtb
dtb-$(CONFIG_TARGET_AXS103) += axs103.dtb
dtb-$(CONFIG_TARGET_NSIM) += nsim.dtb
dtb-$(CONFIG_TARGET_TB100) += abilis_tb100.dtb
dtb-$(CONFIG_TARGET_EMDK) += emdk.dtb
dtb-$(CONFIG_TARGET_EMSDP) += emsdp.dtb
dtb-$(CONFIG_TARGET_HSDK) += hsdk.dtb
dtb-$(CONFIG_TARGET_IOT_DEVKIT) += iot_devkit.dtb

View File

@@ -7,7 +7,7 @@
#include "skeleton.dtsi"
/ {
model = "snps,emdk";
model = "snps,emsdp";
#address-cells = <1>;
#size-cells = <1>;

View File

@@ -807,7 +807,6 @@ config ARCH_SOCFPGA
select SPL_SPI_SUPPORT if DM_SPI
select SPL_WATCHDOG_SUPPORT
select SUPPORT_SPL
select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
select SYS_NS16550
select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10
imply CMD_DM
@@ -817,6 +816,7 @@ config ARCH_SOCFPGA
imply DM_SPI_FLASH
imply FAT_WRITE
imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION
imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE
config ARCH_SUNXI
bool "Support sunxi (Allwinner) SoCs"

View File

@@ -134,7 +134,7 @@
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q128a13", "jedec,spi-nor";
compatible = "n25q128a13", "jedec,spi-nor", "spi-flash";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <27777777>;
};
@@ -151,11 +151,11 @@
spi1: spi@10680 {
status = "okay";
fpga@2 {
fpga@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-generic-device";
reg = <2>; /* Chip select 2 */
reg = <0>; /* Chip select 0 */
spi-max-frequency = <27777777>;
};
};

View File

@@ -16,18 +16,14 @@
stdout-path = &lpuart0;
};
regulators {
compatible = "simple-bus";
reg_usdhc2_vmmc: usdhc2-vmmc {
compatible = "regulator-fixed";
regulator-name = "SD1_SPWR";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
gpio = <&gpio4 19 GPIO_ACTIVE_HIGH>;
off-on-delay = <3480>;
enable-active-high;
};
reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
compatible = "regulator-fixed";
regulator-name = "SD1_SPWR";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
gpio = <&gpio4 19 GPIO_ACTIVE_HIGH>;
off-on-delay = <3480>;
enable-active-high;
};
};

View File

@@ -58,6 +58,21 @@ obj-$(CONFIG_CMD_HDMIDETECT) += cmd_hdmidet.o
obj-$(CONFIG_CMD_DEKBLOB) += cmd_dek.o
endif
ifneq ($(CONFIG_BOARD_SIZE_LIMIT),)
BOARD_SIZE_CHECK = \
@actual=`wc -c $@ | awk '{print $$1}'`; \
limit=`printf "%d" $(CONFIG_BOARD_SIZE_LIMIT)`; \
if test $$actual -gt $$limit; then \
echo "$@ exceeds file size limit:" >&2 ; \
echo " limit: $$limit bytes" >&2 ; \
echo " actual: $$actual bytes" >&2 ; \
echo " excess: $$((actual - limit)) bytes" >&2; \
exit 1; \
fi
else
BOARD_SIZE_CHECK =
endif
PLUGIN = board/$(BOARDDIR)/plugin
ifeq ($(CONFIG_USE_IMXIMG_PLUGIN),y)
@@ -101,6 +116,7 @@ u-boot.imx: MKIMAGEOUTPUT = u-boot.imx.log
u-boot.imx: u-boot.bin u-boot.cfgout $(PLUGIN).bin FORCE
$(call if_changed,mkimage)
$(BOARD_SIZE_CHECK)
ifeq ($(CONFIG_OF_SEPARATE),y)
MKIMAGEFLAGS_u-boot-dtb.imx = -n $(filter-out $(PLUGIN).bin $< $(PHONY),$^) \

View File

@@ -660,6 +660,14 @@ void gpr_init(void)
{
struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR;
/*
* If this function is used in a common MX6 spl implementation
* we have to ensure that it is only called for suitable cpu types,
* otherwise it breaks hardware parts like enet1, can1, can2, etc.
*/
if (!is_mx6dqp() && !is_mx6dq() && !is_mx6sdl())
return;
/* enable AXI cache for VDOA/VPU/IPU */
writel(0xF00000CF, &iomux->gpr[4]);
if (is_mx6dqp()) {

View File

@@ -33,7 +33,9 @@ struct sdram_addr_dec {
#define REG_CPUCS_WIN_WIN0_CS(x) (((x) & 0x3) << 2)
#define REG_CPUCS_WIN_SIZE(x) (((x) & 0xff) << 24)
#define SDRAM_SIZE_MAX 0xc0000000
#ifndef MVEBU_SDRAM_SIZE_MAX
#define MVEBU_SDRAM_SIZE_MAX 0xc0000000
#endif
#define SCRUB_MAGIC 0xbeefdead
@@ -275,8 +277,8 @@ int dram_init(void)
* address space left for the internal registers etc.
*/
size += mvebu_sdram_bs(i);
if (size > SDRAM_SIZE_MAX)
size = SDRAM_SIZE_MAX;
if (size > MVEBU_SDRAM_SIZE_MAX)
size = MVEBU_SDRAM_SIZE_MAX;
}
for (; i < CONFIG_NR_DRAM_BANKS; i++) {
@@ -312,7 +314,7 @@ int dram_init_banksize(void)
/* Clip the banksize to 1GiB if it exceeds the max size */
size += gd->bd->bi_dram[i].size;
if (size > SDRAM_SIZE_MAX)
if (size > MVEBU_SDRAM_SIZE_MAX)
mvebu_sdram_bs_set(i, 0x40000000);
}

View File

@@ -68,10 +68,12 @@ enum {
MVEBU_SOC_UNKNOWN,
};
#define MVEBU_SDRAM_SIZE_MAX 0xc0000000
/*
* Default Device Address MAP BAR values
*/
#define MBUS_PCI_MEM_BASE 0xE8000000
#define MBUS_PCI_MEM_BASE MVEBU_SDRAM_SIZE_MAX
#define MBUS_PCI_MEM_SIZE (128 << 20)
#define MBUS_PCI_IO_BASE 0xF1100000
#define MBUS_PCI_IO_SIZE (64 << 10)

View File

@@ -6,6 +6,8 @@
#include <common.h>
#include <asm/io.h>
/* R-Car Gen3 caches are enabled in memmap-gen3.c */
#ifndef CONFIG_RCAR_GEN3
#ifdef CONFIG_ARCH_CPU_INIT
int arch_cpu_init(void)
{
@@ -20,6 +22,7 @@ void enable_caches(void)
dcache_enable();
}
#endif
#endif
#ifdef CONFIG_DISPLAY_CPUINFO
static u32 __rmobile_get_cpu_type(void)

View File

@@ -8,7 +8,9 @@
#include <common.h>
#include <asm/armv8/mmu.h>
static struct mm_region gen3_mem_map[] = {
#define GEN3_NR_REGIONS 16
static struct mm_region gen3_mem_map[GEN3_NR_REGIONS] = {
{
.virt = 0x0UL,
.phys = 0x0UL,
@@ -42,3 +44,88 @@ static struct mm_region gen3_mem_map[] = {
};
struct mm_region *mem_map = gen3_mem_map;
DECLARE_GLOBAL_DATA_PTR;
void enable_caches(void)
{
u64 start, size;
int bank, i = 0;
/* Create map for RPC access */
gen3_mem_map[i].virt = 0x0ULL;
gen3_mem_map[i].phys = 0x0ULL;
gen3_mem_map[i].size = 0x40000000ULL;
gen3_mem_map[i].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN;
i++;
/* Generate entires for DRAM in 32bit address space */
for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
start = gd->bd->bi_dram[bank].start;
size = gd->bd->bi_dram[bank].size;
/* Skip empty DRAM banks */
if (!size)
continue;
/* Skip DRAM above 4 GiB */
if (start >> 32ULL)
continue;
/* Mark memory reserved by ATF as cacheable too. */
if (start == 0x48000000) {
start = 0x40000000ULL;
size += 0x08000000ULL;
}
gen3_mem_map[i].virt = start;
gen3_mem_map[i].phys = start;
gen3_mem_map[i].size = size;
gen3_mem_map[i].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE;
i++;
}
/* Create map for register access */
gen3_mem_map[i].virt = 0xc0000000ULL;
gen3_mem_map[i].phys = 0xc0000000ULL;
gen3_mem_map[i].size = 0x40000000ULL;
gen3_mem_map[i].attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
PTE_BLOCK_NON_SHARE |
PTE_BLOCK_PXN | PTE_BLOCK_UXN;
i++;
/* Generate entires for DRAM in 64bit address space */
for (bank = 0; bank < CONFIG_NR_DRAM_BANKS; bank++) {
start = gd->bd->bi_dram[bank].start;
size = gd->bd->bi_dram[bank].size;
/* Skip empty DRAM banks */
if (!size)
continue;
/* Skip DRAM below 4 GiB */
if (!(start >> 32ULL))
continue;
gen3_mem_map[i].virt = start;
gen3_mem_map[i].phys = start;
gen3_mem_map[i].size = size;
gen3_mem_map[i].attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
PTE_BLOCK_INNER_SHARE;
i++;
}
/* Zero out the remaining regions. */
for (; i < GEN3_NR_REGIONS; i++) {
gen3_mem_map[i].virt = 0;
gen3_mem_map[i].phys = 0;
gen3_mem_map[i].size = 0;
gen3_mem_map[i].attrs = 0;
}
icache_enable();
dcache_enable();
}

View File

@@ -248,6 +248,24 @@ config MIPS_CACHE_INDEX_BASE
Normally this is CKSEG0. If the MIPS system needs to move this block
to some SRAM or ScratchPad RAM, adapt this option accordingly.
config MIPS_RELOCATION_TABLE_SIZE
hex "Relocation table size"
range 0x100 0x10000
default "0x8000"
---help---
A table of relocation data will be appended to the U-Boot binary
and parsed in relocate_code() to fix up all offsets in the relocated
U-Boot.
This option allows the amount of space reserved for the table to be
adjusted in a range from 256 up to 64k. The default is 32k and should
be ok in most cases. Reduce this value to shrink the size of U-Boot
binary.
The build will fail and a valid size suggested if this is too small.
If unsure, leave at the default value.
endmenu
menu "OS boot interface"

View File

@@ -55,7 +55,7 @@ PLATFORM_ELFFLAGS += -B mips $(OBJCOPYFLAGS)
# MODFLAGS += -mlong-calls
#
ifndef CONFIG_SPL_BUILD
OBJCOPYFLAGS += -j .got -j .rel -j .padding -j .dtb.init.rodata
OBJCOPYFLAGS += -j .data.reloc -j .dtb.init.rodata
LDFLAGS_FINAL += --emit-relocs
endif

View File

@@ -41,16 +41,22 @@ SECTIONS
__image_copy_end = .;
__init_end = .;
/*
* .rel must come last so that the mips-relocs tool can shrink
* the section size & the PT_LOAD program header filesz.
*/
.rel : {
.data.reloc : {
__rel_start = .;
BYTE(0x0)
. += (32 * 1024) - 1;
/*
* Space for relocation table
* This needs to be filled so that the
* mips-reloc tool can overwrite the content.
* An invalid value is left at the start of the
* section to abort relocation if the table
* has not been filled in.
*/
LONG(0xFFFFFFFF);
FILL(0);
. += CONFIG_MIPS_RELOCATION_TABLE_SIZE - 4;
}
. = ALIGN(4);
_end = .;
.bss __rel_start (OVERLAY) : {

View File

@@ -659,6 +659,7 @@ config ARCH_P1010
select SYS_FSL_ERRATUM_A004477
select SYS_FSL_ERRATUM_A004508
select SYS_FSL_ERRATUM_A005125
select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_A007075
select SYS_FSL_ERRATUM_ESDHC111
@@ -821,6 +822,7 @@ config ARCH_P2041
select FSL_LAW
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004849
select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_CPU_A003999
select SYS_FSL_ERRATUM_DDR_A003
@@ -845,6 +847,7 @@ config ARCH_P3041
select SYS_FSL_DDR_VER_44
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004849
select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A005812
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_CPU_A003999
@@ -910,6 +913,7 @@ config ARCH_P5020
select FSL_LAW
select SYS_FSL_DDR_VER_44
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_DDR_A003
select SYS_FSL_ERRATUM_DDR_A003474
@@ -935,6 +939,7 @@ config ARCH_P5040
select SYS_FSL_DDR_VER_44
select SYS_FSL_ERRATUM_A004510
select SYS_FSL_ERRATUM_A004699
select SYS_FSL_ERRATUM_A005275
select SYS_FSL_ERRATUM_A005812
select SYS_FSL_ERRATUM_A006261
select SYS_FSL_ERRATUM_DDR_A003
@@ -1303,6 +1308,9 @@ config SYS_FSL_ERRATUM_A005812
config SYS_FSL_ERRATUM_A005871
bool
config SYS_FSL_ERRATUM_A005275
bool
config SYS_FSL_ERRATUM_A006261
bool

View File

@@ -307,6 +307,10 @@ static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
(SVR_REV(svr) <= CONFIG_SYS_FSL_A004447_SVR_REV))
puts("Work-around for Erratum I2C-A004447 enabled\n");
#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_A005275
if (has_erratum_a005275())
puts("Work-around for Erratum A005275 enabled\n");
#endif
#ifdef CONFIG_SYS_FSL_ERRATUM_A006261
if (has_erratum_a006261())
puts("Work-around for Erratum A006261 enabled\n");

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@@ -1785,11 +1785,10 @@ typedef struct ccsr_gur {
#define FSL_CORENET_RCWSR13_EC1_FM1_DTSEC4_MII 0x20000000
#define FSL_CORENET_RCWSR13_EC2 0x0c000000 /* bits 420..421 */
#define FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_RGMII 0x00000000
#define FSL_CORENET_RCWSR13_EC2_FM1_GPIO 0x10000000
#define FSL_CORENET_RCWSR13_EC2_FM1_DTSEC5_MII 0x20000000
#define FSL_CORENET_RCWSR13_EC2_FM1_GPIO 0x04000000
#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL 0x00000080
#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_L2_SWITCH 0x00000000
#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT 0x80000000
#define FSL_CORENET_RCWSR13_MAC2_GMII_SEL_ENET_PORT 0x00000080
#define CONFIG_SYS_FSL_SCFG_PIXCLKCR_OFFSET 0x28
#define PXCKEN_MASK 0x80000000
#define PXCK_MASK 0x00FF0000

View File

@@ -8,7 +8,6 @@
OperationRegion(GNVS, SystemMemory, ACPI_GNVS_ADDR, ACPI_GNVS_SIZE)
Field(GNVS, ByteAcc, NoLock, Preserve)
{
Offset (0x00),
PCNT, 8, /* processor count */
IURE, 8, /* internal UART enabled */
}

View File

@@ -8,6 +8,5 @@
OperationRegion(GNVS, SystemMemory, ACPI_GNVS_ADDR, ACPI_GNVS_SIZE)
Field(GNVS, ByteAcc, NoLock, Preserve)
{
Offset (0x00),
PCNT, 8, /* processor count */
}

View File

@@ -10,6 +10,5 @@
OperationRegion(GNVS, SystemMemory, ACPI_GNVS_ADDR, ACPI_GNVS_SIZE)
Field(GNVS, ByteAcc, NoLock, Preserve)
{
Offset (0x00),
PCNT, 8, /* processor count */
}

View File

@@ -1,81 +0,0 @@
U-Boot for the NXP i.MX8MQ EVK board
Quick Start
===========
- Build U-Boot
- Build the ARM Trusted firmware binary
- Get DDR firmware and mkimage tool
- Generate flash.bin using imx-mkimage
- Flash the binary into the SD card
- Boot
Build U-Boot
============
$ make mx8mq_evk_defconfig
$ make
Get and Build the ARM Trusted firmware
======================================
$ git clone https://source.codeaurora.org/external/imx/imx-atf
$ cd imx-atf/
$ git checkout origin/imx_4.9.51_imx8m_beta
$ make PLAT=imx8mq bl31
Get the DDR firmware and mkimage tool
==============================
$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-7.2.bin
$ chmod +x firmware-imx-7.2.bin
$ ./firmware-imx-7.2.bin
Download the imx-mkimage tool:
$ git clone https://source.codeaurora.org/external/imx/imx-mkimage/
$ cd imx-mkimage/
$ git checkout origin/imx_4.9.51_imx8m_beta
Generate flash.bin using imx-mkimage
====================================
Copy the following binaries to imx-mkimage/iMX8M folder:
$ cp imx-atf/build/imx8mq/release/bl31.bin imx-mkimage/iMX8M/
$ cp u-boot/u-boot-nodtb.bin imx-mkimage/iMX8M/
$ cp u-boot/spl/u-boot-spl.bin imx-mkimage/iMX8M/
$ cp u-boot/arch/arm/dts/fsl-imx8mq-evk.dtb imx-mkimage/iMX8M/
Copy the following firmwares to imx-mkimage/iMX8 folder :
$ cp firmware-imx-7.2/firmware/ddr/synopsys/lpddr4_pmu_train_1d_dmem.bin imx-mkimage/iMX8M/
$ cp firmware-imx-7.2/firmware/ddr/synopsys/lpddr4_pmu_train_1d_imem.bin imx-mkimage/iMX8M/
$ cp firmware-imx-7.2/firmware/ddr/synopsys/lpddr4_pmu_train_2d_dmem.bin imx-mkimage/iMX8M/
$ cp firmware-imx-7.2/firmware/ddr/synopsys/lpddr4_pmu_train_2d_imem.bin imx-mkimage/iMX8M/
If you want to run with HDMI, copy signed_hdmi_imx8m.bin to imx-mkimage/iMX8M.
Before generating the flash.bin, transfer the mkimage generated by U-Boot to iMX8M folder:
$ cp u-boot/tools/mkimage imx-mkimage/iMX8M/
$ mv imx-mkimage/iMX8M/mkimage imx-mkimage/iMX8M/mkimage_uboot
$ cd imx-mkimage/
$ make SOC=iMX8M flash_spl_uboot
Or for using HDMI:
$ make SOC=iMX8M flash_hdmi_spl_uboot
Flash the binary into the SD card
=================================
Burn the flash.bin binary to SD card offset 33KB:
$ sudo dd if=iMX8M/flash.bin of=/dev/sd[x] bs=1024 seek=33
Boot
====
Set Boot switch SW801: 1100 and Bmode: 10 to boot from Micro SD.

View File

@@ -1,5 +1,6 @@
STM32MP1 BOARD
M: Patrick Delaunay <patrick.delaunay@st.com>
L: uboot-stm32@st-md-mailman.stormreply.com (moderated for non-subscribers)
S: Maintained
F: board/st/stm32mp1
F: include/configs/stm32mp1.h

View File

@@ -1,12 +1,12 @@
if TARGET_EMDK
if TARGET_EMSDP
config SYS_BOARD
default "emdk"
default "emsdp"
config SYS_VENDOR
default "synopsys"
config SYS_CONFIG_NAME
default "emdk"
default "emsdp"
endif

View File

@@ -1,5 +1,6 @@
EM DEVELOPMENT KIT BOARD
M: Alexey Brodkin <abrodkin@synopsys.com>
S: Maintained
F: board/synopsys/emdk/
F: configs/emdk_defconfig
F: arch/arc/dts/emsdp.dts
F: board/synopsys/emsdp/
F: configs/emsdp_defconfig

View File

@@ -4,4 +4,4 @@
# SPDX-License-Identifier: GPL-2.0+
#
obj-y += emdk.o
obj-y += emsdp.o

View File

@@ -1,11 +1,12 @@
================================================================================
Useful notes on bulding and using of U-Boot on ARC EM Development Kit (AKA EMDK)
Useful notes on bulding and using of U-Boot on
ARC EM Software Development Platform (AKA EMSDP)
================================================================================
BOARD OVERVIEW
The DesignWare ARC EM Development Kit is FPGA-bases platform for rapid
software development on the ARC EM family of processors.
The DesignWare ARC EM Software Development Platform is FPGA-bases platform
for rapid software development on the ARC EM family of processors.
Since this board is based on FPGA it's possible to load and use different
versions of ARC EM CPUs. U-Boot is built to be run on the simplest
@@ -50,7 +51,7 @@ Useful notes on bulding and using of U-Boot on ARC EM Development Kit (AKA EMDK)
1. Configure U-Boot:
------------------------->8----------------------
make emdk_defconfig
make emsdp_defconfig
------------------------->8----------------------
2. To build Elf file (for example to be used with host debugger via JTAG
@@ -69,7 +70,7 @@ Useful notes on bulding and using of U-Boot on ARC EM Development Kit (AKA EMDK)
EXECUTING U-BOOT
1. The EMDK board is supposed to auto-start U-Boot image stored in ROM on
1. The EMSDP board is supposed to auto-start U-Boot image stored in ROM on
power-on. For that make sure VCCIO DIP-switches are all in "off" state.
2. Though it is possible to load U-Boot as a simple Elf file via JTAG right

View File

@@ -55,7 +55,7 @@ void reset_cpu(ulong addr)
; /* loop forever till reset */
}
static int do_emdk_rom(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
static int do_emsdp_rom(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
u32 creg_boot = readl((u32 *)(CREG_BASE + CREG_BOOT_OFFSET));
@@ -71,17 +71,17 @@ static int do_emdk_rom(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
return CMD_RET_SUCCESS;
}
cmd_tbl_t cmd_emdk[] = {
U_BOOT_CMD_MKENT(rom, 2, 0, do_emdk_rom, "", ""),
cmd_tbl_t cmd_emsdp[] = {
U_BOOT_CMD_MKENT(rom, 2, 0, do_emsdp_rom, "", ""),
};
static int do_emdk(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
static int do_emsdp(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
{
cmd_tbl_t *c;
c = find_cmd_tbl(argv[1], cmd_emdk, ARRAY_SIZE(cmd_emdk));
c = find_cmd_tbl(argv[1], cmd_emsdp, ARRAY_SIZE(cmd_emsdp));
/* Strip off leading 'emdk' command */
/* Strip off leading 'emsdp' command */
argc--;
argv++;
@@ -92,8 +92,8 @@ static int do_emdk(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[])
}
U_BOOT_CMD(
emdk, CONFIG_SYS_MAXARGS, 0, do_emdk,
"Synopsys EMDK specific commands",
emsdp, CONFIG_SYS_MAXARGS, 0, do_emsdp,
"Synopsys EMSDP specific commands",
"rom unlock - Unlock non-volatile memory for writing\n"
"emdk rom lock - Lock non-volatile memory to prevent writing\n"
"emsdp rom lock - Lock non-volatile memory to prevent writing\n"
);

View File

@@ -0,0 +1,145 @@
================================================================================
Useful notes on bulding and using of U-Boot on
ARC IoT Development Kit (AKA IoTDK)
================================================================================
BOARD OVERVIEW
The DesignWare ARC IoT Development Kit is a versatile platform that includes
the necessary hardware and software to accelerate software development and
debugging of sensor fusion, voice recognition and face detection designs.
The ARC IoT Development Kit includes a silicon implementation of the
ARC Data Fusion IP Subsystem running at 144 MHz on SMIC's
55-nm ultra-low power process, and a rich set of peripherals commonly used
in IoT designs such as USB, UART, SPI, I2C, PWM, SDIO and ADCs.
The board is shipped with pre-installed U-Boot in non-volatile memory
(eFlash) so on power-on user sees U-Boot start header and command line
prompt which might be used for U-Boot environment fine-tuning, manual
loading and execution of user application binaries etc.
The board has the following features useful for U-Boot:
* On-board 2-channel FTDI TTL-to-USB converter
- The first channel is used for serial debug port (which makes it possible
to use a serial connection on pretty much any host machine be it
Windows, Linux or Mac).
On Linux machine typucally FTDI serial port would be /dev/ttyUSB0.
There's no HW flow-control and baud-rate is 115200.
- The second channel is used for built-in Digilent USB JTAG probe.
That means no extra hardware is required to access ARC core from a
debugger on development host. Both proprietary MetaWare debugger and
open source OpenOCD + GDB client are supported.
- Also with help of this FTDI chip it is possible to reset entire
board with help of a special `rff-ftdi-reset` utility, see:
https://github.com/foss-for-synopsys-dwc-arc-processors/rff-ftdi-reset
* Micro SD-card slot
- U-Boot expects to see the very first partition on the card formatted as
FAT file-system and uses it for keeping its environment in `uboot.env`
file. Note uboot.env is not just a text file but it is auto-generated
file created by U-Boot on invocation of `saveenv` command.
It contains a checksum which makes this saved environment invalid in
case of maual modification.
- There might be more useful files on that first FAT partition like
user applications, data files etc.
* USB OTG connector
- U-Boot may access USB mass-storage devices attached to this connector.
Note only FAT file-system is supported. It might be used for storing
user application binaries as well as micro SD-card mentioned above.
* The following memories are avaialble on the board:
- eFlash: 256 KiB @ 0x0000_0000
A non-volatile memory from which ARC core may execute code directly.
Still is is not direcly writable, thus this is not an ordinary RAM.
- ICCM: 256 KiB @ 0x2000_0000
Instruction Closely Coupled Memory - fast on-chip memory primary used
for code being executed, still data could be placed in this memory too.
In that sense it's just a general purpose RAM.
- SRAM: 128 KiB @ 0x3000_0000
On-chip SRAM. From user perspective is the same as ICCM above.
- DCCM: 128 KiB @ 0x8000_0000
Data Closely Coupled Memory is similar to ICCM with a major difference -
ARC core cannot execute code from DCCM. So this is very special RAM
only suitable for data.
BUILDING U-BOOT
1. Configure U-Boot:
------------------------->8----------------------
make iot_devkit_defconfig
------------------------->8----------------------
2. To build Elf file (for example to be used with host debugger via JTAG
connection to the target board):
------------------------->8----------------------
make mdbtrick
------------------------->8----------------------
This will produce `u-boot` Elf file.
3. To build binary image to be put in "ROM":
------------------------->8----------------------
make u-boot.bin
------------------------->8----------------------
EXECUTING U-BOOT
1. The IoTDK board is supposed to auto-start U-Boot image stored in eFlash on
power-on. Note it's possible to update that image - follow instructions in
user's manual.
2. Though it is possible to load and start U-Boot as a simple Elf file
via JTAG right in ICCM. For that it's required to re-configure U-Boot
so it gets linked to ICCM address 0x2000_0000 (remember eFlash is not
direcly writable).
Run U-Boot's configuration utility with "make menuconfig", go to
"Boot images" and change "Text Base" from default 0x00000000 to
0x20000000. Exit & save new configuration. Now run "make mdbtrick" to
build new Elf.
2.1. In case of proprietary MetaWare debugger run:
------------------------->8----------------------
mdb -digilent u-boot
------------------------->8----------------------
USING U-BOOT
Note due to limited memory size it's supposed that user will run binary
images of their applications instead of loading Elf files.
1. To load and start application binary from micro SD-card execute
the following commands in U-Boot's shell:
------------------------->8----------------------
fatload mmc 0 0x20000000 yourapp.bin
go 0x20000000
------------------------->8----------------------
2. To load and start application binary from USB mass-storage device execute
the following commands in U-Boot's shell:
------------------------->8----------------------
usb start
fatload usb 0x20000000 yourapp.bin
go 0x20000000
------------------------->8----------------------
3. To have a sequence of commands executed on U-Boot start put those
commands in "bootcmd" with semicolon between them.
For example to get (1) done automatically:
------------------------->8----------------------
setenv bootcmd fatload mmc 0 0x20000000 yourapp.bin\; go 0x20000000
saveenv
------------------------->8----------------------
4. To reboot the board just run:
------------------------->8----------------------
reset
------------------------->8----------------------

View File

@@ -1728,14 +1728,14 @@ config CMD_MTDPARTS
config MTDIDS_DEFAULT
string "Default MTD IDs"
depends on CMD_MTD || CMD_MTDPARTS || CMD_NAND || CMD_FLASH
depends on MTD_PARTITIONS || CMD_MTDPARTS || CMD_NAND || CMD_FLASH
help
Defines a default MTD IDs list for use with MTD partitions in the
Linux MTD command line partitions format.
config MTDPARTS_DEFAULT
string "Default MTD partition scheme"
depends on CMD_MTD || CMD_MTDPARTS || CMD_NAND || CMD_FLASH
depends on MTD_PARTITIONS || CMD_MTDPARTS || CMD_NAND || CMD_FLASH
help
Defines a default MTD partitioning scheme in the Linux MTD command
line partitions format
@@ -1856,7 +1856,6 @@ endmenu
config CMD_UBI
tristate "Enable UBI - Unsorted block images commands"
select CMD_MTDPARTS
select CRC32
select MTD_UBI
help

View File

@@ -15,7 +15,6 @@ obj-$(CONFIG_CMD_AES) += aes.o
obj-$(CONFIG_CMD_ADC) += adc.o
obj-$(CONFIG_CMD_ARMFLASH) += armflash.o
obj-y += blk_common.o
obj-$(CONFIG_SOURCE) += source.o
obj-$(CONFIG_CMD_SOURCE) += source.o
obj-$(CONFIG_CMD_BDI) += bdinfo.o
obj-$(CONFIG_CMD_BEDBUG) += bedbug.o

View File

@@ -120,7 +120,7 @@ static int do_remoteproc_load(cmd_tbl_t *cmdtp, int flag, int argc,
if (argc != 4)
return CMD_RET_USAGE;
id = (int)simple_strtoul(argv[1], NULL, 3);
id = (int)simple_strtoul(argv[1], NULL, 10);
addr = simple_strtoul(argv[2], NULL, 16);
size = simple_strtoul(argv[3], NULL, 16);
@@ -163,7 +163,7 @@ static int do_remoteproc_wrapper(cmd_tbl_t *cmdtp, int flag, int argc,
if (argc != 2)
return CMD_RET_USAGE;
id = (int)simple_strtoul(argv[1], NULL, 3);
id = (int)simple_strtoul(argv[1], NULL, 10);
if (!rproc_is_initialized()) {
printf("\tRemote Processors are not initialized\n");

View File

@@ -417,11 +417,6 @@ static int ubi_dev_scan(struct mtd_info *info, const char *vid_header_offset)
int ubi_detach(void)
{
if (mtdparts_init() != 0) {
printf("Error initializing mtdparts!\n");
return 1;
}
#ifdef CONFIG_CMD_UBIFS
/*
* Automatically unmount UBIFS partition when user

View File

@@ -121,6 +121,7 @@ obj-y += command.o
obj-$(CONFIG_$(SPL_)LOG) += log.o
obj-$(CONFIG_$(SPL_)LOG_CONSOLE) += log_console.o
obj-y += s_record.o
obj-y += xyzModem.o
obj-$(CONFIG_CMD_LOADB) += xyzModem.o
obj-$(CONFIG_$(SPL_TPL_)YMODEM_SUPPORT) += xyzModem.o
obj-$(CONFIG_AVB_VERIFY) += avb_verify.o

View File

@@ -11,7 +11,6 @@
#include <common.h>
#include <console.h>
#include <cpu.h>
#include <dm.h>
#include <environment.h>
#include <fdtdec.h>
@@ -166,33 +165,6 @@ static int print_resetinfo(void)
}
#endif
#if defined(CONFIG_DISPLAY_CPUINFO) && CONFIG_IS_ENABLED(CPU)
static int print_cpuinfo(void)
{
struct udevice *dev;
char desc[512];
int ret;
ret = uclass_first_device_err(UCLASS_CPU, &dev);
if (ret) {
debug("%s: Could not get CPU device (err = %d)\n",
__func__, ret);
return ret;
}
ret = cpu_get_desc(dev, desc, sizeof(desc));
if (ret) {
debug("%s: Could not get CPU description (err = %d)\n",
dev->name, ret);
return ret;
}
printf("%s", desc);
return 0;
}
#endif
static int announce_dram_init(void)
{
puts("DRAM: ");

View File

@@ -8,7 +8,6 @@
#include <errno.h>
#include <image.h>
#include <linux/libfdt.h>
#include <spl.h>
ulong fdt_getprop_u32(const void *fdt, int node, const char *prop)
{
@@ -73,7 +72,7 @@ int fit_find_config_node(const void *fdt)
}
if (dflt_conf_node != -ENOENT) {
debug("Selecting default config '%s'", dflt_conf_desc);
debug("Selecting default config '%s'\n", dflt_conf_desc);
return dflt_conf_node;
}

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@@ -185,9 +185,8 @@ static int spl_load_fit_image(struct spl_image_info *spl_image,
spl_image->os = IH_OS_U_BOOT;
spl_image->name = "U-Boot";
debug("spl: payload image: %.*s load addr: 0x%lx size: %d\n",
(int)sizeof(spl_image->name), spl_image->name,
spl_image->load_addr, spl_image->size);
debug("spl: payload image: %32s load addr: 0x%lx size: %d\n",
spl_image->name, spl_image->load_addr, spl_image->size);
#ifdef CONFIG_SPL_FIT_SIGNATURE
images.verify = 1;
@@ -256,9 +255,8 @@ int spl_parse_image_header(struct spl_image_info *spl_image,
}
spl_image->os = image_get_os(header);
spl_image->name = image_get_name(header);
debug("spl: payload image: %.*s load addr: 0x%lx size: %d\n",
IH_NMLEN, spl_image->name,
spl_image->load_addr, spl_image->size);
debug("spl: payload image: %32s load addr: 0x%lx size: %d\n",
spl_image->name, spl_image->load_addr, spl_image->size);
#else
/* LEGACY image not supported */
debug("Legacy boot image support not enabled, proceeding to other boot methods\n");
@@ -314,7 +312,7 @@ __weak void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
image_entry_noargs_t image_entry =
(image_entry_noargs_t)spl_image->entry_point;
debug("image entry point: 0x%lX\n", spl_image->entry_point);
debug("image entry point: 0x%lx\n", spl_image->entry_point);
image_entry();
}
@@ -554,7 +552,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2)
debug("Unsupported OS image.. Jumping nevertheless..\n");
}
#if CONFIG_VAL(SYS_MALLOC_F_LEN) && !defined(CONFIG_SYS_SPL_MALLOC_SIZE)
debug("SPL malloc() used %#lx bytes (%ld KB)\n", gd->malloc_ptr,
debug("SPL malloc() used 0x%lx bytes (%ld KB)\n", gd->malloc_ptr,
gd->malloc_ptr / 1024);
#endif
#ifdef CONFIG_BOOTSTAGE_STASH

View File

@@ -30,7 +30,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:1m(uboot),8m(kernel),512k(dtb),
CONFIG_ENV_IS_IN_NAND=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_MTD_PARTITIONS=y
CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y

View File

@@ -29,7 +29,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:1m(uboot),8m(kernel),512k(dtb),
CONFIG_ENV_IS_IN_NAND=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_MTD_PARTITIONS=y
CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y

View File

@@ -26,7 +26,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:1m(uboot),8m(kernel),512k(dtb),
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_MTD_PARTITIONS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y

View File

@@ -26,7 +26,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=ff800000.flash:1m(uboot),8m(kernel),512k(dtb),
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_MTD_PARTITIONS=y
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y

View File

@@ -29,7 +29,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=88000000.nor,nand0=ff800000.flash,"
CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(uboot);ff800000.flash:1m(uboot),8m(kernel),512k(dtb),-(fs)"
CONFIG_DM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -32,7 +32,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(u
CONFIG_ENV_IS_IN_NAND=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -29,7 +29,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=88000000.nor,nand0=ff800000.flash,"
CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(uboot);ff800000.flash:1m(uboot),8m(kernel),512k(dtb),-(fs)"
CONFIG_DM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -32,7 +32,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(u
CONFIG_ENV_IS_IN_NAND=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -29,7 +29,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=88000000.nor,nand0=ff800000.flash,"
CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(uboot);ff800000.flash:1m(uboot),8m(kernel),512k(dtb),-(fs)"
CONFIG_DM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -28,7 +28,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(u
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -29,7 +29,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=88000000.nor,nand0=ff800000.flash,"
CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(uboot);ff800000.flash:1m(uboot),8m(kernel),512k(dtb),-(fs)"
CONFIG_DM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -28,7 +28,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(u
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -29,7 +29,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=88000000.nor,nand0=ff800000.flash,"
CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(uboot);ff800000.flash:1m(uboot),8m(kernel),512k(dtb),-(fs)"
CONFIG_DM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -28,7 +28,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(u
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -29,7 +29,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=88000000.nor,nand0=ff800000.flash,"
CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(uboot);ff800000.flash:1m(uboot),8m(kernel),512k(dtb),-(fs)"
CONFIG_DM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -28,7 +28,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(u
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -29,7 +29,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=88000000.nor,nand0=ff800000.flash,"
CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(uboot);ff800000.flash:1m(uboot),8m(kernel),512k(dtb),-(fs)"
CONFIG_DM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -28,7 +28,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(u
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -29,7 +29,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=88000000.nor,nand0=ff800000.flash,"
CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(uboot);ff800000.flash:1m(uboot),8m(kernel),512k(dtb),-(fs)"
CONFIG_DM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -28,7 +28,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=88000000.nor:256k(dtb),7m(kernel),55m(fs),1m(u
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -7,6 +7,7 @@ CONFIG_USB0_VBUS_PIN="PB10"
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL_I2C_SUPPORT=y
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=sunxi-nand.0"
CONFIG_MTDPARTS_DEFAULT="mtdparts=sunxi-nand.0:256k(spl),256k(spl-backup),2m(uboot),2m(uboot-backup),-(UBI)"
CONFIG_DEFAULT_DEVICE_TREE="sun5i-gr8-chip-pro"

View File

@@ -10,6 +10,7 @@ CONFIG_AXP_GPIO=y
CONFIG_NR_DRAM_BANKS=1
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
# CONFIG_CMD_FLASH is not set
CONFIG_CMD_MTDPARTS=y
# CONFIG_SPL_DOS_PARTITION is not set
# CONFIG_SPL_EFI_PARTITION is not set
CONFIG_DEFAULT_DEVICE_TREE="sun8i-r16-nintendo-nes-classic-edition"

View File

@@ -42,7 +42,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=ec000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ec000000.nor:128k(dtb),6016k(kernel),57088k(fs),1m(vsc7385-firmware),1280k(u-boot)"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -40,7 +40,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=ec000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ec000000.nor:128k(dtb),6016k(kernel),57088k(fs),1m(vsc7385-firmware),1280k(u-boot)"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -41,7 +41,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=ec000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ec000000.nor:128k(dtb),6016k(kernel),57088k(fs),1m(vsc7385-firmware),1280k(u-boot)"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -30,7 +30,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=ec000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ec000000.nor:128k(dtb),6016k(kernel),57088k(fs),1m(vsc7385-firmware),1280k(u-boot)"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -44,7 +44,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9728k(fs),256k(qe-ucode-firmware),1280k(u-boot)"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -42,7 +42,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9728k(fs),256k(qe-ucode-firmware),1280k(u-boot)"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -43,7 +43,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9728k(fs),256k(qe-ucode-firmware),1280k(u-boot)"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -32,7 +32,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9728k(fs),256k(qe-ucode-firmware),1280k(u-boot)"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -43,7 +43,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=ef000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9728k(fs),256k(qe-ucode-firmware),1280k(u-boot)"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -41,7 +41,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=ef000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9728k(fs),256k(qe-ucode-firmware),1280k(u-boot)"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -42,7 +42,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=ef000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9728k(fs),256k(qe-ucode-firmware),1280k(u-boot)"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -31,7 +31,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=ef000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9728k(fs),256k(qe-ucode-firmware),1280k(u-boot)"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -42,7 +42,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:48m(ramdisk),14m(diagnostic),2m(dink),6m(kernel),58112k(fs),512k(dtb),768k(u-boot)"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_CFI_MTD=y

View File

@@ -40,7 +40,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:48m(ramdisk),14m(diagnostic),2m(dink),6m(kernel),58112k(fs),512k(dtb),768k(u-boot)"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_CFI_MTD=y

View File

@@ -41,7 +41,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:48m(ramdisk),14m(diagnostic),2m(dink),6m(kernel),58112k(fs),512k(dtb),768k(u-boot)"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_CFI_MTD=y

View File

@@ -30,7 +30,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:48m(ramdisk),14m(diagnostic),2m(dink),6m(kernel),58112k(fs),512k(dtb),768k(u-boot)"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_CFI_MTD=y

View File

@@ -41,7 +41,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=e8000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=e8000000.nor:48m(ramdisk),14m(diagnostic),2m(dink),6m(kernel),58112k(fs),512k(dtb),768k(u-boot)"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_CFI_MTD=y

View File

@@ -39,7 +39,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=e8000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=e8000000.nor:48m(ramdisk),14m(diagnostic),2m(dink),6m(kernel),58112k(fs),512k(dtb),768k(u-boot)"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_CFI_MTD=y

View File

@@ -40,7 +40,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=e8000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=e8000000.nor:48m(ramdisk),14m(diagnostic),2m(dink),6m(kernel),58112k(fs),512k(dtb),768k(u-boot)"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_CFI_MTD=y

View File

@@ -29,7 +29,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=e8000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=e8000000.nor:48m(ramdisk),14m(diagnostic),2m(dink),6m(kernel),58112k(fs),512k(dtb),768k(u-boot)"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_FLASH_CFI_MTD=y

View File

@@ -44,7 +44,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -42,7 +42,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -43,7 +43,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -32,7 +32,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=fef000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=fef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -43,7 +43,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=ef000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)"
CONFIG_ENV_IS_IN_NAND=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -41,7 +41,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=ef000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)"
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -42,7 +42,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=ef000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -31,7 +31,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=ef000000.nor"
CONFIG_MTDPARTS_DEFAULT="mtdparts=ef000000.nor:256k(vsc7385-firmware),256k(dtb),4608k(kernel),9984k(fs),1280k(u-boot)"
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -42,7 +42,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9
CONFIG_ENV_IS_IN_NAND=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -42,7 +42,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9
CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -32,7 +32,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:1m(uboot),5m(kernel),128k(dtb),-(user)"
CONFIG_DM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -43,7 +43,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -31,7 +31,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -33,7 +33,6 @@ CONFIG_MTDIDS_DEFAULT="nor0=fe8000000.nor,nand0=fff800000.flash,spi0=spife110000
CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),96m(fs),-(user);fff800000.flash:2m(uboot),9m(kernel),128k(dtb),96m(fs),-(user);spife110000.0:2m(uboot),9m(kernel),128k(dtb),-(user)"
CONFIG_DM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -32,7 +32,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9
CONFIG_ENV_IS_IN_FLASH=y
CONFIG_FSL_CAAM=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -44,7 +44,6 @@ CONFIG_ENV_IS_IN_NAND=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -44,7 +44,6 @@ CONFIG_ENV_IS_IN_MMC=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -34,7 +34,6 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=fe8000000.nor:1m(uboot),5m(kernel),128k(dtb),9
CONFIG_DM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

View File

@@ -45,7 +45,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_CAAM=y
CONFIG_SYS_FSL_DDR3=y
CONFIG_FSL_ESDHC=y
CONFIG_MTD_PARTITIONS=y
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y

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