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130 Commits

Author SHA1 Message Date
Tom Rini
3c99166441 Prepare v2019.04
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-08 21:40:40 -04:00
Jagan Teki
85c3d46322 arm: sunxi: Enable DM_MMC on required SoCs
Enabling DM_MMC is forcing CONFIG_BLK=y so if any board which uses
SCSI must need to enable DM_SCSI otherwise SCSI reads on that particular
target making invalid reading to the disk drive.

Allwinner platform do support SCSI on A10, A20 and R40 SoC's out of
these only A10 have DM_SCSI enabled. So enabling DM_MMC on A20, R40
would eventually end-up with scsi disk read failures like [1]

So, enable DM_MMC in all places of respective SoC's instead of enabling
them globally to Allwinner platform.

Now, DM_MMC is enabled in Allwinner SoC's except A20 and R40.

[1] https://lists.denx.de/pipermail/u-boot/2019-April/364057.html

Reported-by: Pablo Sebastián Greco <pgreco@centosproject.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-08 16:35:15 -04:00
Tom Rini
c48b07a9fd Merge tag 'fixes-for-2019.04-rc4' of git://git.denx.de/u-boot-staging
- i.MX8QXP-MEK ethernet fix
2019-04-08 10:11:29 -04:00
Andrejs Cainikovs
e82fa10b3e dts: imx8qxp-mek: Add PHY post reset delay
PHY cannot be detected unless we wait about 150 ms.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@netmodule.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2019-04-08 15:24:39 +02:00
Andrejs Cainikovs
31d4045d4b net: dm: fec: Support phy-reset-post-delay property
As per Linux kernel DT binding doc:
- phy-reset-post-delay : Post reset delay in milliseconds. If present then
  a delay of phy-reset-post-delay milliseconds will be observed after the
  phy-reset-gpios has been toggled. Can be omitted thus no delay is
  observed. Delay is in range of 1ms to 1000ms. Other delays are invalid.

Signed-off-by: Andrejs Cainikovs <andrejs.cainikovs@netmodule.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
2019-04-08 15:23:28 +02:00
Stefan Roese
ccd063e981 watchdog: Move watchdog_dev to data section (BSS may not be cleared)
This patch moves all instances of static "watchdog_dev" declarations to
the "data" section. This may be needed, as the BSS may not be cleared
in the early U-Boot phase, where watchdog_reset() is already beeing
called. This may result in incorrect pointer access, as the check to
"!watchdog_dev" in watchdog_reset() may not be true and the function
may continue to run.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: "Marek Behún" <marek.behun@nic.cz>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu100)
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
2019-04-08 09:21:39 -04:00
Hannes Schmelzer
afbc31948a net: phy: implement fallback mechanism for negative phy adresses
Negative phy-addresses can occour if the caller function was not able to
determine a valid phy address (from device-tree for example). In this
case we catch this here and search for ANY phy device on the given mdio-
bus.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Tested-by: Lukasz Majewski <lukma@denx.de>
2019-04-07 20:31:16 -04:00
Tom Rini
0e62d5b2ab Merge tag 'u-boot-imx-20190405' of git://git.denx.de/u-boot-imx
Fixes for 2019.04

	- fix bashism for MX8
	- fix ethernet for MX53
	- fix docs for i.MX8
2019-04-05 09:09:56 -04:00
Tom Rini
0e708abcbb Merge branch 'master' of git://git.denx.de/u-boot-usb
- Documentation fix
2019-04-03 10:28:10 -04:00
Tom Rini
05fa129a40 Merge branch '2019-04-03-master-imports'
- Important Khadas VIM2 fix
- Build fix for macOS Mojave
- Build fix for gcc-4.7 for host tools.
2019-04-03 10:26:57 -04:00
Thomas Petazzoni
d7edeba79b tools/Makefile: build host tools with -std=gnu99
Parts of the code are using C99 constructs (such as variables declared
inside loops), but also GNU extensions (such as typeof), so using
-std=gnu99 is necessary to build with older versions of gcc that don't
default to building with gnu99.

It fixes the following build failure:

./tools/../lib/crc16.c: In function "crc16_ccitt":
./tools/../lib/crc16.c:70:2: error: "for" loop initial declarations are only allowed in C99 mode
  for (int i = 0;  i < len;  i++)
  ^
./tools/../lib/crc16.c:70:2: note: use option -std=c99 or -std=gnu99 to compile your code

when building the host tools with gcc 4.7.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-04-03 10:26:46 -04:00
默默
ab8fc41302 fix compile error on macOS Mojave 2019-04-03 10:26:46 -04:00
Neil Armstrong
2118a272e3 configs: khadas_vim2: Fix defconfig
The Khadas VIM2 defconfig was missing the USB PHY config and
two other misc configs to setup dram banks and call misc_init_r.
Align it on the other Amlogic SoC based boards defconfig.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-04-03 10:23:45 -04:00
Neil Armstrong
82548aaad5 phy: Also allow MESON_GXM for MESON_GXL_USB_PHY
The MESON_GXL_USB_PHY is also used on the Amlogic Meson GXM SoCs.

Fixes: 2960e27e38 ("phy: Add Amlogic Meson USB2 & USB3 Generic PHY drivers")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2019-04-03 10:23:38 -04:00
Eugen Hristev
7252274978 travis-ci: fix at91 missing boards
Fix missing at91 boards and split the at91 in two categories:
at91 arm v7
at91 arm926esj
which are the two main cores for the at91 architecture.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2019-04-02 09:05:03 -04:00
Lukasz Majewski
da60b4301c DTS: Fix ETH PHY reset on HSC|DDC boards (imx53)
After the commit: "eth: dm: fec: Add gpio phy reset binding"
SHA1: efd0b79106

The FEC ETH driver switched to PHY GPIO reset performed with data defined
in DTS.
For the HSC|DDC boards the GPIO reset signal is active low and hence the
wrong DTS description must be changed (otherwise the reset for ETH is not
properly setup).

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-02 13:44:18 +02:00
Lukasz Majewski
8e2b1f2251 cosmetic: Remove not needed string from kp_imx53.h config
Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-02 13:44:18 +02:00
Lukasz Majewski
f73c09e735 cosmetic: config: Remove empty #ifdefs
After running tools/moveconfig.py it turned out that for various boards
there are an empty #ifdef statements.

Remove them to clean u-boot source code.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-04-02 13:44:18 +02:00
Krzysztof Kozlowski
2a766db11a doc: Fix outdated ohci board hook documentation
The ohci driver calls board_usb_init(), not usb_board_init().

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
2019-04-02 12:52:54 +02:00
Fabio Estevam
6574931732 imx8mq_evk: README: Make the underline marker fill the whole sentence
Let the underline marker "=" fill the whole sentence for better
readability.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-04-02 10:36:35 +02:00
Fabio Estevam
d3c8727bcf imx8mq_evk: README: Fix a typo in the destination path
The DDR firmware binaries should be copied to '$(srctree)', so fix
a typo.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-04-02 10:36:35 +02:00
Fabio Estevam
0adc3f8538 imx8mq_evk: README: Need to copy bl31.bin to U-Boot source tree
After building ATF it is needed to copy the generated bl31.bin file to
the U-Boot source tree.

Make this step explicit in the instructions.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-04-02 10:36:35 +02:00
Tom Rini
da06f9a185 Merge branch 'master' of git://git.denx.de/u-boot-sh
Minor fixes for the Alt board and PHY use on Gen2.
2019-04-01 23:30:00 -04:00
Tom Rini
bcd40c347d Merge branch 'master' of git://git.denx.de/u-boot-sunxi
- clk: sunxi: a10: Add CLK_AHB_GMAC
2019-04-01 12:31:22 -04:00
Jagan Teki
9d1e136734 clk: sunxi: a10: Add CLK_AHB_GMAC
CLK_AHB_GMAC was suppose to be part of previous commit
"clk: sunxi: Implement A10 EMAC clocks" add it so-that
we can get rid of sunxi_set_gate warning on boot message.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2019-04-01 21:45:15 +05:30
Baruch Siach
8a0746dba0 tools/imx8m_image.sh: remove bashism
Use a single '=' to test string equality for compatibility with non-bash
shells. Otherwise, if /bin/sh is dash, build fails:

./tools/imx8m_image.sh: 15: [: signed_hdmi_imx8m.bin: unexpected operator
./tools/imx8m_image.sh: 15: [: signed_hdmi_imx8m.bin: unexpected operator
./tools/imx8m_image.sh: 15: [: spl/u-boot-spl-ddr.bin: unexpected operator
./tools/imx8m_image.sh: 15: [: spl/u-boot-spl-ddr.bin: unexpected operator
WARNING './spl/u-boot-spl-ddr.bin' not found, resulting binary is not-functional

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Tested-by: Chris Spencer <christopher.spencer@sea.co.uk>
2019-04-01 17:52:37 +02:00
Tom Rini
4da84d1b9b Merge tag 'u-boot-imx-20190401' of git://git.denx.de/u-boot-imx
Fixes for 2019.01

	- pico-imx6ul: fix after conversion
	- engicam boards
	- pico-imx7d _ README due to hang with imx-usb-loader
2019-04-01 09:39:38 -04:00
Fabio Estevam
00102ae520 pico-imx7d: README: Recommend the usage of a USB hub
Since commit 9e3c0174da ("pico-imx7d: Add LCD support") we started to
notice some hangs in U-Boot.

There is not an issue on such commit per se, but due to the LCD support
the current drawn is increased and this may cause issues when powering
pico-imx7d-pi from USB.

Some computers may be a bit strict with USB current draw and will
shut down their ports if the draw is too high.

The solution for that is to use an externally powered USB hub between the
board and the host computer.

Add such recommendation to the README file.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2019-03-31 20:19:19 +02:00
Jagan Teki
40ee163cc4 configs: icorem6: Use imx6 cratch register for bootcount
SRAM address used for bootcount on exiting code is erasing
previous count value when system reset from Linux. So use
the dedicated imx6 scratch register, GPR2 to preserve the
contents even if the system reset from Linux.

Fixes: 4eb9aa3935 ("configs: imx6qdl_icore_mmc: Enable watchdog and bootcounter")
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Shyam Saini <shyam.saini@amarulasolutions.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
2019-03-31 20:12:37 +02:00
Michael Trimarchi
8b9cba0295 configs: icore: Fix U-Boot proper loading from nand
SPL on Engicam i.Core M6 boards enabled DM, so it would require some
malloc() pool before relocation in order to load U-Boot proper properly.

So, enable SPL malloc() pool of 0x2000 size similarly like what we have
used for icore mmc defconfigs.

Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Shyam Saini <shyam.saini@amarulasolutions.com>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2019-03-31 20:04:31 +02:00
Adam Ford
b7de88cd5c ARM: imx6q_logic: Enable UUID support
With UUID support, the root can now point to UUID.  This makes
swiching between mmc 0 and mmc 1 easier by simplying changing
mmcdev between 0 and 1.  From there, the scripts handle the rest.

Signed-off-by: Adam Ford <aford173@gmail.com>
2019-03-31 20:00:57 +02:00
Fabio Estevam
9b8d9ec41a pico-imx6ul: Fix eMMC boot after DM_MMC conversion
After the DM_MMC conversion the following eMMC boot error is observed:

U-Boot SPL 2019.04-rc4 (Mar 20 2019 - 18:53:28 +0000)
Trying to boot from MMC1
MMC Device 0 not found
spl: could not find mmc device 0. error: -19
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

This happens because the SPL code does not initialize the SDHC pins
and clock.

Fix it by moving the original eMMC initialization from U-Boot proper
to SPL.

Reported-by: Otavio Salvador <otavio@ossystems.com.br>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Fabio Berton <fabio.berton@ossystems.com.br>
Reviewed-by: Otavio Salvador <otavio@ossystems.com.br>
2019-03-31 19:54:56 +02:00
Stefano Babic
66c433ed43 Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
2019-03-31 19:54:10 +02:00
Tom Rini
48cf0d8c6d Merge tag 'video-fixes-for-2019.04-rc4' of git://git.denx.de/u-boot-video
sunxi HDMI clock fix
2019-03-31 07:25:11 -04:00
Tom Rini
4c644692f2 Merge tag 'rockchip-fixes-for-2019.04' of git://git.denx.de/u-boot-rockchip
Last-minute fixes for Rockchip for 2019.04:
- reverts the deprecation of the 'download-key' detection
  (with a full solution pending for the next release)
- applies a temporary fix for the 32bit pinctrl registers on the RK3288
2019-03-31 07:25:00 -04:00
Lukasz Majewski
d4c9a908d9 dfu: usb: Update MAINTAINERS file regarding DFU/USB gadget support
Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-03-31 07:23:38 -04:00
Marek Vasut
0c78ec64bc ARM: rmobile: alt: Fix I2C bus number
The I2C bus number to access the PMIC is I2C 7, fix this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-30 08:28:25 +01:00
Marek Vasut
e3b086cf04 ARM: dts: rmobile: Activate I2C7 on Alt
Activate I2C7 on Alt to allow access to the PMIC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-30 08:28:25 +01:00
Marek Vasut
0fe668d7d9 ARM: rmobile: rcar-gen2: Activate bootm_size
Commit d245059ff7 ("ARM: rmobile: rcar-gen3: Activate bootm_size")
only fixed the superfluous CONFIG_SYS_BOOTMAPSZ for R-Car Gen3, even
though it listed all affected boards. Apply the same fix to Gen2.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Fixes: d245059ff7 ("ARM: rmobile: rcar-gen3: Activate bootm_size")
Cc: Eugeniu Rosca <erosca@de.adit-jv.com>
2019-03-30 07:48:05 +01:00
Marek Vasut
4bbd464268 ARM: rmobile: Fix PHY LED mode register mask
The PHY LED mode register mask should be 0xc000 , not 0xc0000.
Correct the mask to operate on the right bits.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-30 07:31:02 +01:00
Marek Vasut
573b0f244c ARM: rmobile: alt: Synchronize defconfig
Synchronize the R8A7794 Alt defconfig, enable DM SPI, DM SPI FLASH
and I2C driver support.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-30 07:31:02 +01:00
Marek Vasut
078cbb8d95 ARM: rmobile: alt: Remove CLK2MHZ macro
The CLK2MHZ macro is unused, remove it.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-30 07:31:02 +01:00
Marek Vasut
308b1307c8 ARM: rmobile: alt: Remove R8A7794_ETHERNET_B
The R8A7794_ETHERNET_B config option is unused and based on the
description, this is a setting which should be fully done on a
DT level instead. Remove this config option.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-30 07:31:02 +01:00
Tom Rini
c3aef9339c Merge branch '2019-03-29-master-imports'
- Bugfixes:
  - mmc: correct the HS400 initialization process
  - configs: ti: Move FIT image load address to avoid overwrite
  - lib: time: update module enable MACRO
  - Add mbrugger as RPi board maintainer, correct agraf's email address.
2019-03-29 10:53:28 -04:00
Kever Yang
f00c26284e lib: time: update module enable MACRO
We'd better use correct way to check if module has enabled.
for we have 3 timer MACRO:
- CONFIG_TIMER
- CONFIG_SPL_TIMER
- CONFIG_TPL_TIMER

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
2019-03-29 10:53:18 -04:00
Heinrich Schuchardt
5ec072bb2b doc/git-mailrc: correct entry 'agraf'
Correct Alex's email address.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Alexander Graf <agraf@csgraf.de>
2019-03-29 10:53:18 -04:00
Matthias Brugger
ab107279ef RPi: Add mbrugger as board maintainer
I took over maintainership from Alex Graf with commit
3157bbfa18 ("rpi: Make Matthias maintainer")
But I forgot to update the board maintainer file.
This patch adds myself to the game.

Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Alexander Graf <agraf@csgraf.de>
2019-03-29 10:53:18 -04:00
Andrew F. Davis
1abddd933f configs: ti: Move FIT image load address to avoid overwrite
The FIT image is loaded to 0x8700_0000 followed by extracting from that
several large images also into the 0x8x00_0000 range. Large images
can end up overwriting the FIT image as it is being extracted from.
Move the FIT load address clear out to 0x9000_0000, this will require
a board to have at least 256MB of DRAM, if less then more careful
planning will be required for that platform.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2019-03-29 10:53:18 -04:00
BOUGH CHEN
5cf12031a4 mmc: correct the HS400 initialization process
After the commit b9a2a0e2e9 ("mmc: Add support for downgrading
HS200/HS400 to HS mode"), it add a parameter in mmc_set_card_speed()
which indicates that the HS200/HS400 to HS downgrade is happening.

During the HS400 initialization, first select to HS200, and config
the related clock rate, then downgrade to HS mode. So here also need
to config the downgrade value to be true for two reasons. First,
make sure in the function mmc_set_card_speed(), after switch to HS
mode, first config the clock rate, then read the EXT_CSD, avoid
receiving data of EXT_CSD in HS mode at 200MHz. Second, after issue
the MMC_CMD_SWITCH command, it need to wait a bit then switch bus
properties.

Test on i.MX8QM MEK board, some Micron eMMC will stuck in transfer
mode in this case, and USDHC will never get data transfer complete
status, cause the uboot hang.

Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
2019-03-29 10:53:18 -04:00
Tom Rini
b357ae5ed6 Merge tag 'efi-2019-04-rc5-2' of git://git.denx.de/u-boot-efi
Pull request for UEFI system for v2019.04-rc5-2

This patch series contains a bug fix for a double free in a UEFI unit
test. The other patches are documentation only (except for the definition
of two additional constants).
2019-03-29 09:21:30 -04:00
David Wu
502980914b pinctrl: rockchip: Add 32bit writing function for rk3288 gpio0 pinctrl
There are no higher 16 writing corresponding bits for pmu_gpio0's
iomux/drive/pull at rk3288, need to read the value from register
firstly. Add the flag to distinguish it from normal registers.

Signed-off-by: David Wu <david.wu@rock-chips.com>
2019-03-29 09:24:44 +01:00
Philipp Tomsich
a2893baa47 Revert "rockchip: Drop call to rockchip_dnl_mode_check() for now"
Due to a final resolution not coming up in time for 2019.04 and
following the consensus on the discussion, we'll keep this around
for 2019.04 after all.

This reverts commit 0d968ceb1f.
2019-03-29 09:21:13 +01:00
Tom Rini
1111ff671f Merge tag 'arc-last-minute-for-2019.04' of git://git.denx.de/u-boot-arc
This is last minute change which fixes problems in runtime on
AXS10x board caused by some changes in NAND framework and
tiny documentation improvement.

Anyways NAND flash storage was never really used on the board for various
reasons and now we decided to drop it for good.

Note this change only touches 1 ARC board so that should be safe for others.
As usual - build tested in TravisCI, see
https://travis-ci.org/abrodkin/u-boot/builds/512041342
2019-03-28 21:44:49 -04:00
Jernej Skrabec
1feed358ed sunxi: video: HDMI: Fix clock setup
Currently, HDMI driver doesn't consider minimum and maximum allowed rate
of pll3 (video PLL). It works most of the time, but not always.

Consider monitor with resolution 1920x1200, which has pixel clock rate
of 154 MHz. Current code would determine that pll3 rate has to be set to
154 MHz. However, minimum supported rate is 192 MHz. In this case video
output just won't work.

The reason why the driver is written in the way it is, is that at the
time HDMI PHY and clock configuration wasn't fully understood. But now
we have needed knowledge, so the issue can be fixed.

With this fix, clock configuration routine uses full range (1-16) for
clock divider instead of limited one (1, 2, 4, 11). It also considers
minimum and maximum allowed rate for pll3.

Fixes: 56009451d8 ("sunxi: video: Add A64/H3/H5 HDMI driver")
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
2019-03-28 23:45:41 +01:00
Alexey Brodkin
34d117b1fb hsdk: readme: Suggest getting pyelftools with pip
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Suggested-by: Yunir Salimzyanov <yunir@synopsys.com>
2019-03-28 10:50:32 +03:00
Eugeniy Paltsev
4f5e552d95 ARC: AXS10x: drop NAND support
On AXS10x boards we have non-standard NAND controller
which was never really used a lot as there're other much more
convenient [as they are standard & removable] persistent media
like SD-card and USB mass storage.

Moreover after recent changes we face with some NAND controller
runtime issues. So instead of keeping support of yet another
non-standard peripheral we're dropping its support for good.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-03-28 10:42:47 +03:00
Heinrich Schuchardt
9ba712dc84 efi_loader: define development target in README.uefi
Describe the target scope of the UEFI implementation in U-Boot.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-03-28 08:13:00 +01:00
Heinrich Schuchardt
98dc260168 efi_loader: update TODOs in doc/README.uefi
The following TODOs are closed:

- GetNextVariableName is not implemented
- event groups
- manage events in a linked list

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-03-27 22:02:30 +01:00
Heinrich Schuchardt
fbe6549aa9 MAINTAINERS: adjust git repository for EFI PAYLOAD
The EFI PAYLOAD will use git://git.denx.de/u-boot-efi.git in future.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-03-27 21:56:06 +01:00
Heinrich Schuchardt
17394f9a66 efi_loader: TODO for the EFI file protocol
We currently only support EFI_FILE_PROTOCOL_REVISION while
UEFI specs 2.4 - 2.7 prescribe EFI_FILE_PROTOCOL_REVISION2.
Add a todo.

Add missing constants for the EFI file protocol revision.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-03-27 21:52:11 +01:00
Heinrich Schuchardt
d0826507e2 efi_selftest: avoid double free in dp utilities test
Avoid duplicate FreePool() in unit test for the device patch utilities
protocol.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-03-27 06:32:27 +01:00
Tom Rini
7f21ced0d2 Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- configs: Stratix10: Remove CONFIG_USE_TINY_PRINTF
2019-03-26 23:19:31 -04:00
Tom Rini
d32519ac8a Merge branch 'master' of git://git.denx.de/u-boot-sh
- Various fixes for bugs found by u-boot test.py
2019-03-26 23:19:11 -04:00
Tom Rini
2b9b9cdd5f Merge branch '2019-03-25-master-imports'
- Convert various SPI related options to Kconfig
2019-03-26 23:17:21 -04:00
Patrick Delaunay
abe66b1b5d Convert CONFIG_ENV_SPI_* to Kconfig
This converts the following to Kconfig:
  CONFIG_ENV_SPI_BUS
  CONFIG_ENV_SPI_CS
  CONFIG_ENV_SPI_MAX_HZ
  CONFIG_ENV_SPI_MODE

Most of time these value are not needed, CONFIG_SF_DEFAULT
with same value is used, so I introduced CONFIG_USE_ENV_SPI_*
to force the associated value for the environment.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-03-25 17:36:59 -04:00
Patrick Delaunay
c95e632de4 Convert CONFIG_DEFAULT_SPI_* to Kconfig
This converts the following to Kconfig:
   CONFIG_DEFAULT_SPI_BUS
   CONFIG_DEFAULT_SPI_MODE

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-03-25 17:36:53 -04:00
Patrick Delaunay
14453fbfad Convert CONFIG_SF_DEFAULT_* to Kconfig
This converts the following to Kconfig:
  CONFIG_SF_DEFAULT_BUS
  CONFIG_SF_DEFAULT_CS
  CONFIG_SF_DEFAULT_MODE
  CONFIG_SF_DEFAULT_SPEED

I use moveconfig script and then manual check on generated u-boot.cfg
to solve the remaining issue.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-03-25 17:36:53 -04:00
Patrick Delaunay
9309aad084 tqma6s_wru4_mmc: manage board_spi_cs_gpio correctly
Define the function board_spi_cs_gpio only when needed,
only called in drivers/spi/mxc_spi.c.
That avoid compilation issue for tqma6s_wru4_mmc_defconfig
when CONFIG_SF_DEFAULT_BUS and CONFIG_SF_DEFAULT_CS are not
defined (CMD_SF not defined) after migration in KConfig.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-03-25 17:35:52 -04:00
Patrick Delaunay
ac31d0d873 exynos: replace CONFIG_ENV_SPI_BASE by CONFIG_SYS_SPI_BASE
Replace CONFIG_ENV_SPI_BASE by the better CONFIG_SYS_SPI_BASE
(it is not the location for environment but the location for U-Boot)
and, as it is the only platform with use this define, remove
it from whitelist.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-03-25 17:35:52 -04:00
Patrick Delaunay
e608bebd77 controlcenterdc: move some configuration in defconfig file
Move some configurations in defconfig file
- CONFIG_CMD_I2C
- CONFIG_CMD_SPI

This allow correct dependency handling in Kconfig.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-03-25 17:35:52 -04:00
Patrick Delaunay
a1b7132157 bcm7445: move some configuration in defconfig file
Move some configurations in defconfig file
- CONFIG_DM_SPI (removed by syncing defconfigs )
- CONFIG_CMD_SF
- CONFIG_CMD_SPI
- CONFIG_CMD_SF_TEST

This allow correct dependency handling in Kconfig.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-03-25 17:35:52 -04:00
Tom Rini
e7134b9714 Merge branch '2019-03-25-master-imports'
- 3 bugfixes:
  - mmc: Align MMC_TRACE with tiny printf
  - scripts/Makefile.extrawarn: Silence more DTC warnings
  - rsa: check that pointer checksum isn't NULL before using it
2019-03-25 17:26:38 -04:00
Marek Vasut
c453fe3a05 mmc: tmio: Clamp SD_SECCNT to 16bit values on 16bit IP
On 16bit variants of the TMIO SD IP, the SECCNT register can only be
programmed to 16bit values, while on the 32bit and 64bit variants it
can be programmed to 32bit values. The SECCNT register indicates the
maximum number of blocks in a continuous transfer. Hence, limit the
maximum continuous transfer block count to 65535 blocks on 16bit
variants of the TMIO IP and to BIT(32)-1 blocks on 32bit and 64bit
variants.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-03-25 20:26:53 +01:00
Marek Vasut
f4eaa56a52 mmc: sh_mmcif: Set default MMCIF clock rate
Set MMCIF clock rate to 97.5 MHz, which is the default according
to Gen2 datasheet.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
2019-03-25 20:26:53 +01:00
Marek Vasut
3cb2849c76 clk: renesas: Add support for setting MMCIF clock divider on Gen2
Add code for configuring the MMC0CKCR/MMC1CKCR on Gen2 platforms.
This allows the MMCIF driver to set higher clock rate if desired.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-25 20:26:53 +01:00
Marek Vasut
4b135d5464 clk: renesas: Fix swapped div and mul in debug output on Gen2
The $div and $mul values were swapped in the debug output,
fix this.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-25 20:26:53 +01:00
Marek Vasut
45b01b462f clk: renesas: Fix SDH clock divider decoding on Gen2
The gen2_clk_get_sdh_div() function is supposed to look up the
$val value read out of the SDCKCR register in the supplied table
and return the matching divider value. The current implementation
was matching the value from SDCKCR on the divider value in the
table, which is wrong. Fix this and rework the function a bit
to make it more readable.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-25 20:26:53 +01:00
Marek Vasut
c49d0ac38a ARM: dts: rmobile: Increase off-on delay on the SD Vcc regulator
An ADATA 16GB Industrial MLC card has so much capacitance on the Vcc
pin that the usual toggling of regulator to power the card off and on
is insufficient. When the card is calibrated into UHS SDR104 mode, it
will remain in that mode across the power cycle and subsequent attempt
to communicate with the card will fail.

The test with this card is to insert it into an SDHI slot and perform
"mmc dev 0 ; mmc dev 0", where the second "mmc dev 0" will fail.

Fix this problem by increasing the off-on delay from 0 to 20 mS.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2019-03-25 20:26:53 +01:00
Ley Foon Tan
3d0cc01d10 configs: Stratix10: Remove CONFIG_USE_TINY_PRINTF
Use full printf instead of tiny printf in SPL.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-03-25 20:26:45 +01:00
Marek Vasut
7d5ccb1ae7 mmc: Align MMC_TRACE with tiny printf
The tiny printf implementation only supports %x format specifier,
it does not support %X . Since it makes little difference whether
the debug output prints hex numbers in capitals or not, change it
to %x and make the MMC_TRACE output work with tiny printf too.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
2019-03-25 11:44:12 -04:00
Tom Rini
00717b00a5 scripts/Makefile.extrawarn: Silence more DTC warnings
While our "extrawarns" logic has gotten out of sync with upstream
Kbuild, for now lets start by bringing in the latest set of DTC_FLAGS
from the Linux Kernel 5.0 to match their behavior in silencing warnings
from dtc.

Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-03-25 11:44:12 -04:00
Philippe Reynes
b02f2e79c6 rsa: check that pointer checksum isn't NULL before using it
The pointer checksum were used before checking that it
isn't NULL. We move the code that use it after the check.

Reported-by: Coverity (CID: 185835)
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-03-25 11:44:12 -04:00
Tom Rini
cfb3e102c4 Merge branch '2019-03-22-master-imports'
- Don't attempt to write to ext4 volumes with the metadata_csum feature
  we don't support
- Correct how we build dtb files.
- Fix regression on SPL_FIT with FIT_IMAGE_TINY
- Minor TI platform fixes
2019-03-22 19:09:58 -04:00
Sébastien Szymanski
2e7365518a fs: ext4: do not write on filesystem with metadata_csum feature
U-Boot doesn't support metadata_csum feature. Writing to filesystem with
metadata_csum feature makes the filesystem corrupted and unbootable by
Linux:

[    2.527495] EXT4-fs (mmcblk0p2): ext4_check_descriptors: Checksum for group 0 failed (52188!=0)
[    2.537421] EXT4-fs (mmcblk0p2): ext4_check_descriptors: Checksum for group 1 failed (5262!=0)
...
[    2.653308] EXT4-fs (mmcblk0p2): ext4_check_descriptors: Checksum for group 14 failed (42611!=0)
[    2.662179] EXT4-fs (mmcblk0p2): ext4_check_descriptors: Checksum for group 15 failed (21527!=0)
[    2.687920] JBD2: journal checksum error
[    2.691982] EXT4-fs (mmcblk0p2): error loading journal
[    2.698292] VFS: Cannot open root device "mmcblk0p2" or unknown-block(179,2): error -74

Don't write to filesystem with meatadata_csum feature to not corrupt the
filesystem.

Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
2019-03-22 12:15:24 -04:00
Andrew F. Davis
50580a0e70 board: ti: Move fastboot functions out of TI_SECURE_DEVICE ifdef
When these were moved from mach-omap2 to board files they got placed
inside TI_SECURE_DEVICE ifdef block, they are not secure only, move
them up and out.

Fixes: 413b90777f ("ti: fastboot: Move weak overrides to board files")
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2019-03-22 12:15:22 -04:00
Stefan Roese
2253d648f1 pci: Add comment to mention difference in DEVFN usage in U-Boot vs Linux
This patch adds a comment to the header with the PCI_foo macros related
to DEVFN to explain the difference in U-Boot vs Linux.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-03-22 12:15:20 -04:00
Eugeniu Rosca
e63bf1b13b common: image-android-dt: Fix out-of-bounds access
Currently, 'dtimg' allows users to check indexes equal to
dt_entry_count [1]. Forbid that [2].

[1] Behavior w/o the patch:

=> ext2load mmc 0:1 0x48000000 dtb.img
105695 bytes read in 5 ms (20.2 MiB/s)

=> dtimg dump 0x48000000
dt_table_header:
               magic = d7b7ab1e
          total_size = 105695
         header_size = 32
       dt_entry_size = 32
      dt_entry_count = 2
   dt_entries_offset = 32
           page_size = 4096
             version = 0
dt_table_entry[0]:
             dt_size = 105599
           dt_offset = 96
                  id = 0b779520
                 rev = 00000000
           custom[0] = 00000000
           custom[1] = 00000000
           custom[2] = 00000000
           custom[3] = 00000000
           (FDT)size = 105599
     (FDT)compatible = shimafuji,kingfisher
dt_table_entry[1]:
             dt_size = 105599
           dt_offset = 96
                  id = 0b779530
                 rev = 00000000
           custom[0] = 00000000
           custom[1] = 00000000
           custom[2] = 00000000
           custom[3] = 00000000
           (FDT)size = 105599
     (FDT)compatible = shimafuji,kingfisher

=> dtimg size 0x48000000 0 z; print z
z=19c7f
=> dtimg size 0x48000000 1 z; print z
z=19c7f
=> dtimg size 0x48000000 2 z; print z
z=d00dfeed
=> dtimg size 0x48000000 3 z
Error: index > dt_entry_count (3 > 2)

[2] Behavior with the patch:

=> dtimg size 0x48000000 0 z; print z
z=19c7f
=> dtimg size 0x48000000 1 z; print z
z=19c7f
=> dtimg size 0x48000000 2 z
Error: index >= dt_entry_count (2 >= 2)

Fixes: c044733457 ("common: Add support for Android DT image")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
2019-03-22 12:15:18 -04:00
Faiz Abbas
72987d38f6 configs: am335x_evm: Add CONFIG_BLK
With DM_MMC and DM_USB enabled, enable CONFIG_BLK.

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
2019-03-22 12:15:17 -04:00
Masahiro Yamada
a3444bd09a Revert "Ensure device tree DTS is compiled"
This reverts commit 27cb7300ff.

I am not sure if I correctly understood the log of commit 27cb7300ff
("Ensure device tree DTS is compiled"), but the code-diff looks like
it was trying to solve the missed re-compilation when .dts was modified.

Recently, commit 2737dfe096 ("kbuild: make arch-dtbs target PHONY")
fixed the issue in a more correct and more complete way.

Anyway, since the former commit, we see a clumsy log like this:

  make[2]: 'arch/sandbox/dts/sandbox.dtb' is up to date

Another problem is, it created multiple paths to descend into
arch/*/dts/, causing a race in parallel building.

So, let's revert it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-03-22 12:15:15 -04:00
Masahiro Yamada
344db3f330 mips: add missing dtb-y to arch/mips/dts/Makefile
Since commit 27cb7300ff ("Ensure device tree DTS is compiled"),
build succeeds irrespective of the correctness of Makefile.

In fact, you can compile any defconfig without adding any entry in
arch/*/dts/Makefile.

I am going to revert that commit, so device tree must be explicitly
listed in Makefile.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2019-03-22 12:15:12 -04:00
Masahiro Yamada
680207a1c5 powerpc: fix arch/powerpc/dts/Makefile
Since commit 27cb7300ff ("Ensure device tree DTS is compiled"),
build succeeds irrespective of the correctness of Makefile.

I am going to revert that commit, so wrong code must be fixed.

CONFIG_MCR3000 is not defined anywhere. CONFIG_TARGET_MCR3000 is the
correct one.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2019-03-22 12:15:10 -04:00
Masahiro Yamada
89c2b5c020 ARM: fix arch/arm/dts/Makefile
Since commit 27cb7300ff ("Ensure device tree DTS is compiled"),
build succeeds irrespective of the correctness of Makefile.

In fact, you can compile any defconfig without adding any entry in
arch/*/dts/Makefile.

As a result, a lot of wrong code have been merged unnoticed.

I am going to revert that commit, and lots of hidden issues have
come to light:

[1] Typos

  armada-3720-uDPU.dts, sun8i-a83t-tbs-a711.dts

  use the extension ".dts" instead of ".dtb"

[2] DTB is associated to undefined CONFIG option

  For example, mx6sllevk_defconfig defines CONFIG_MX6SLL, but
  associates its device tree to CONFIG_MX6SL, which is undefined.

[3] Lots of entries are missing

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
[trini: add imx6ul pico dtbs]
Signed-off-by: Tom Rini <trini@konsulko.com>
2019-03-22 12:15:09 -04:00
Abel Vesa
cabde449b9 tools: fit_image: Add the loadable property to configs
When running mkimage with "-f auto", the loadable property
needs to be set in order to allow SPL FIT support to boot.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
2019-03-22 12:15:07 -04:00
Abel Vesa
cf8dcc5d02 common: spl_fit: Default to IH_OS_U_BOOT if FIT_IMAGE_TINY enabled
If FIT_IMAGE_TINY is enabled, spl_fit_image_get_os returns -ENOTSUPP.
In this case, we should default to IH_OS_U_BOOT not to IH_OS_INVALID.

Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
2019-03-22 12:15:05 -04:00
Alexander Graf
ef331e3685 armv8: Disable exception vectors in SPL by default
Commit 1416e2d225 ("armv8: make SPL exception vectors optional") had a
typo in it which effectively disabled exception handling in SPL code always.

Since nobody complained, I guess we may as well disable exception handling
in SPL always by default.

So fix the bug to make the config option effective, but disable exception
handling in SPL by default. This gets us to the same functionality as before
by default, but with much less code included in the binary.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2019-03-22 12:15:03 -04:00
Marek Vasut
7a77836996 Makefile: Do not pass -E to mkimage when SPL has full fitImage support
When the SPL has full fitImage support, do not generate fitImage with
external data. The full fitImage code assumes the entire fitImage is
loaded in RAM, and the SPL uses fdt_totalsize() to determine the size
of the whole fitImage, which can not work with external data.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
2019-03-22 09:03:25 -04:00
Heinrich Schuchardt
9eebaba2a8 cmd: set CONFIG_SYS_HELP_CMD_WIDTH = 10
CONFIG_SYS_HELP_CMD_WIDTH is used to format the output of help without any
arguments.

CONFIG_SYS_HELP_CMD_WIDTH = 8 is too narrow to fit all our commands.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-03-22 08:35:50 -04:00
Faiz Abbas
08b1165ca4 configs: dra7xx_evm: Remove ENV_IS_IN_FAT
With U-boot supporting environment in multiple places, enable only
ENV_IS_IN_EMMC

Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2019-03-22 08:35:50 -04:00
Keerthy
6dad56d733 arm: lib: bootm: Push the Starting kernel print to the end
Push the Starting kernel print to the end just before the
dm_remove_devices call.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-03-22 08:35:50 -04:00
Tom Rini
7b80644e27 Merge branch 'master' of git://git.denx.de/u-boot-socfpga
- ARM: socfpga: Build sfp image only for Gen5 and Arria10 devices
2019-03-21 13:11:06 -04:00
Tom Rini
b94b19e729 Merge tag 'efi-2019-04-rc5' of git://git.denx.de/u-boot-efi
Pull request for UEFI system for v2019.04-rc5

A bunch of small fixes. The major ones being

- avoid illegal memory access in efi_allocate_pool() on 32 bit systems
- avoid endless loop in HII protocol
2019-03-21 13:07:42 -04:00
Tom Rini
3d7891d3f3 Merge branch 'master' of git://git.denx.de/u-boot-i2c
- i2c: i2c_cdns: Fix below warnings with checker tool
2019-03-21 13:04:42 -04:00
Siva Durga Prasad Paladugu
9d59d6fff6 i2c: i2c_cdns: Fix below warnings with checker tool
This patch fixes below warnings found with checker tool.
The variable len in i2c_msg struct is of unsigned type
and it is received as recv_count which is unsigned type
but it is checked with < 0 which is always false, hence
removed it.
The local variable curr_recv_count is declared as signed
type and compared aginst unsigned recv_count which is
incorrect. This is fixed by declaring it as unsigned type.

drivers/i2c/i2c-cdns.c: In function ‘cdns_i2c_read_data’:
drivers/i2c/i2c-cdns.c:317:18: warning: comparison of
unsigned expression < 0 is always false [-Wtype-limits]
  if ((recv_count < 0))
                  ^
drivers/i2c/i2c-cdns.c:340:24: warning: comparison of
integer expressions of different signedness:
‘u32’ {aka ‘unsigned int’} and ‘int’ [-Wsign-compare]
  updatetx = recv_count > curr_recv_count;
                        ^
drivers/i2c/i2c-cdns.c:361:39: warning: comparison of
integer expressions of different signedness:
‘u32’ {aka ‘unsigned int’} and ‘int’ [-Wsign-compare]
    while (readl(&regs->transfer_size) !=

Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2019-03-21 08:21:43 +01:00
Dalon Westergreen
e3ada91e49 ARM: socfpga: Build sfp image only for Gen5 and Arria10 devices
The sfp file is only valid for Gen5 (Cyclone5 & Arria5) and Arria10
devices.  The file should only be built for these devices.

Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
2019-03-21 03:31:01 +01:00
Heinrich Schuchardt
d0bd87612f efi_selftest: fix test_hii_string_get_string()
The check testing the string result of get_string() returned the wrong
result. The result was ignored.

Use efi_st_strcmp_16_8() for the string comparison.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-03-20 18:16:53 +01:00
Heinrich Schuchardt
1646e0928c efi_loader: superfluous conversion in efi_file_open()
printf("%ls", ..) expects u16 * as argument to print. There is not need for
a conversion to wchar_t *.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-03-20 18:16:53 +01:00
Heinrich Schuchardt
d5974af7f7 efi_loader: remove superfluous check in efi_setup_loaded_image()
It does not make any sense to check if a pointer is NULL if we have
dereferenced it before.

Reported-by: Coverity (CID 185827)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-03-20 18:16:53 +01:00
Heinrich Schuchardt
1fd7a47641 efi_loader: memory leak in efi_dump_single_var()
A misplaced return statement lead to a memory leak in
efi_dump_single_var().

Reported-by: Coverity (CID 185829)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-03-20 18:16:53 +01:00
Heinrich Schuchardt
e7dae584b0 efi_loader: missing return in efi_get_next_variable_name()
Add a missing return statement in efi_get_next_variable_name().

Reported-by: Coverity (CID 185834)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-03-20 18:16:53 +01:00
Heinrich Schuchardt
bd3b7478d1 efi_loader: endless loop in add_strings_package()
Avoid an endless loop in add_strings_package().

Suggested-by: Takahiro Akashi <takahiro.akashi@linaro.org>
Reported-by: Coverity (CID 185833)
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-03-20 18:16:53 +01:00
Heinrich Schuchardt
306b16718e efi_loader: correct parameter size in efi_allocate_pool
efi_allocate_pages() expects a (uint64_t *) pointer to pass the address of
the assigned memory. If we pass the address of a pointer here, an illegal
memory access occurs on 32bit systems.

Fixes: 282a06cbca ("efi_loader: Expose U-Boot addresses in memory map
for sandbox")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2019-03-20 18:16:53 +01:00
Tom Rini
a00d15757d Merge git://git.denx.de/u-boot-marvell
- Enable network interface on clearfog_gt_8k (Baruch)
- Fix dreamplug boot by adding an spi0 alias to the DT (Chris)
- Fix / enhance Marvell ddr3 setup / parameters (Chris)
- Change CONFIG_SYS_MALLOC_F_LEN to 0x2000 on db-88f6820-amc (Chris)
- Enable SPL_FLASH_BAR on db-88f6820-amc (Chris)
- Use correct pcie controller name in Armada-38x dts files (Chris)
- Disable d-cache on Kirkwood platforms as currently needed (Chris)
- Add a more descriptive comment to pci_mvebu.c (Stefan)
- Update Marvell maintainers entry (Stefan)
2019-03-19 19:58:48 -04:00
Tom Rini
810ae23fbc Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2019-03-19 07:13:23 -04:00
Tom Rini
7eddda4537 Merge branch 'master' of git://git.denx.de/u-boot-usb
- Fastboot fixes
2019-03-19 07:13:03 -04:00
Chris Packham
599f7aa541 ARM: kirkwood: disable dcache for Kirkwood boards
Prior to commit 93b283d49f ("ARM: CPU: arm926ejs: Consolidate cache
routines to common file") the kirkwood boards didn't have and dcache
support. The network and usb drivers rely on this. Set
CONFIG_SYS_DCACHE_OFF in the Kirkwood specific config.h.

Reported-by: Leigh Brown <leigh@solinno.co.uk>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Chris Packham
825dd50f59 ARM: mvebu: use correct name for pcie controller
When armada-385.dtsi was sync'd from Linux the name of the node
describing the pcie controller was changed from pcie-controller to pcie.
Some of the boards that include armada-385.dtsi were missed in the
update retaining the old name. This updates the affected boards.

Reported-by: Влад Мао <vlaomao@gmail.com>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Chris Packham
3a2117d4fd ARM: mvebu: db-88f6820-amc: enable SPI_FLASH_BAR
This board uses Micron N25Q256A SPI flash. Enable SPI_FLASH_BAR to allow
us to access the whole chip.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Chris Packham
94425efee1 ARM: mvebu: set CONFIG_SYS_MALLOC_F_LEN to 0x2000
Set CONFIG_SYS_MALLOC_F_LEN to match the rest of the mvebu boards. The
default of 0x400 is not enough when booting from SPI.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Chris Packham
247c80d6b8 mv_ddr: ddr3: only use active chip-selects when tuning ODT
Inactive chip-selects will give invalid values for read_sample so don't
consider them when trying to determine the overall min/max read sample.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

[https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/18]
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Chris Packham
08dcbc9823 mv_ddr: ddr3: fix tRAS timimg parameter
Based on the JEDEC standard JESD79-3F. The tRAS timings should include
the highest speed bins at a given frequency. This is similar to commit
683c67b ("mv_ddr: ddr3: fix tfaw timimg parameter") where the wrong
comparison was used in the initial implementation.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>

[https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell/pull/15]
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Chris Packham
5860532264 ARM: kirkwood: add spi0 alias for dreamplug
The conversion to DM_SPI managed to break accessing the environment on
dreamplug. This is because the environment code relies on being to able
to select the SPI device based on the sequence number. Add an alias so
that the spi0 bus gets sequence number 0.

Reported-by: Leigh Brown <leigh@solinno.co.uk>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Leigh Brown <leigh@solinno.co.uk>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Stefan Roese
1579faf52b MAINTAINERS: Update u-boot-marvell entry
This patch does the following changes to the u-boot-marvell maintainers
entry:

- Add Armada-7k/8k to the list
- Remove Prafulla and Luka since they have been silent on the list for
  a long time. Please speak up, if you would like to continue or better
  start maintaining.
- Add multiple Marvell / MVEBU related driver directories and files

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Luka Perkov <luka.perkov@sartura.hr>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Baruch Siach
09d39748c9 configs/clearfog_gt_8k: add network interface support
Enable the mvpp2 network driver for the Armada 8K SoC.

Enable the Marvell PHY driver for the on-board 1512 PHY.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Stefan Roese
0df62e8da8 pci: pci_mvebu: Add comment about missing of_n_addr_cells() call
This patch adds a comment to explain the use of the hardcoded value for
the number of address cells in mvebu_get_tgt_attr(). This should help to
rework this function, once CONFIG_OF_LIVE is enabled for MVEBU in
general.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
2019-03-19 09:22:05 +01:00
Simon Goldschmidt
92a47459bb arm: socfpga: make SPL_TEXT_BASE overridable
To boot from fpga on socfpga gen5, we need to set CONFIG_SPL_TEXT_BASE to
0xC0000000 (hps2fpgaslaves base address).

Since converting CONFIG_SPL_TEXT_BASE to Kconfig hasn't been successful so
far, let's make this value overridable in socfpga_common.h, so that we can
have different board configs override this in socfpga_common.h.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2019-03-16 13:30:09 +01:00
Ley Foon Tan
ff0005b56a ARM: dts: socfpga: Add missing altr,sysmgr-syscon for EMAC
Syscon register is required in dts to select correct
PHY interface.

Fix error below:

Net:   Failed to get syscon: -2

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2019-03-16 13:30:03 +01:00
Neil Armstrong
f402d268e8 fastboot: common: fix default fastboot_boot on 64-bit
When booting on a 64-bit system, the boot_addr_start buffer is not
large enough to contain a 64-bit number, thus leading to a crash
even if fastboot_buf_addr is valid, only the high part of the address
will be printed to boot_addr_start :

fastboot with fastboot_buf_addr = 0x0000000006000000:
  downloading of 92239872 bytes finished
  Booting kernel at 0x00000000...

  "Synchronous Abort" handler, esr 0x96000004
  elr: 00000000010561f4 lr : 0000000001056fac (reloc)
  <snip>
  x28: 000000007df2d38f x29: 000000007df2d1b0

  Resetting CPU ...

With this fix, boot_addr_start can have the full 64-bit address passed
to bootm.

Fixes: f73a7df984 ("net: fastboot: Merge AOSP UDP fastboot")
Cc: Simon Glass <sjg@chromium.org>
Cc: Alex Kiernan <alex.kiernan@gmail.com>
Cc: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2019-03-16 13:29:43 +01:00
Jean-Jacques Hiblot
e81d9de531 usb: udc-uclass: Fixed problem when no alias is defined in DT
commit 801f1fa442 "dm: usb: udc: Use SEQ_ALIAS to index the USB gadget
ports" changed the way the udevice if found. It uses the alias to find
a udevice for a given USB port number. In the commit log it was stated
that if no alias is provided, the bind order will be used instead. However
it doesn't work. Fixing this by adding a call to uclass_get_device() if
uclass_get_device_by_seq() fails.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Tested-by: Vignesh R <vigneshr@ti.com>
2019-03-16 13:29:43 +01:00
Sean Nyekjaer
731785df0b cmd: fastboot: handle watchdog while waiting for fastboot commands.
Watchdog is not handled while waiting for fastboot commands.

Tested on a i.MX6 ULL EVK board.

Signed-off-by: Sean Nyekjaer <sean@geanix.com>
2019-03-16 13:29:43 +01:00
Soeren Moch
4b387deb78 board: tbs2910: Fix default environment
Especially fix usb keyboard support. Other changes are only for
beautification.

Signed-off-by: Soeren Moch <smoch@web.de>
2019-03-14 20:19:26 +01:00
771 changed files with 1687 additions and 1332 deletions

View File

@@ -163,13 +163,16 @@ matrix:
- name: "buildman arm11 arm7 arm920t arm946es"
env:
- BUILDMAN="arm11 arm7 arm920t arm946es"
- name: "buildman arm926ejs (non-NXP,siemens,atmel,kirkwood,spear)"
- name: "buildman arm926ejs (non-NXP,siemens,at91,kirkwood,spear)"
env:
- JOB="arm926ejs"
BUILDMAN="arm926ejs -x freescale,siemens,atmel,kirkwood,spear,omap"
- name: "buildman atmel"
BUILDMAN="arm926ejs -x freescale,siemens,at91,kirkwood,spear,omap"
- name: "buildman at91 (non arm v7)"
env:
- BUILDMAN="atmel"
- BUILDMAN="at91 -x armv7"
- name: "buildman at91 (non arm926ejs)"
env:
- BUILDMAN="at91 -x arm926ejs"
- name: "buildman boundary engicam toradex"
env:
- BUILDMAN="boundary engicam toradex"
@@ -226,7 +229,7 @@ matrix:
- BUILDMAN="sun50i"
- name: "buildman catch-all ARM"
env:
- BUILDMAN="arm -x arm11,arm7,arm9,aarch64,atmel,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,pxa,rockchip,toradex,socfpga,k2,xilinx"
- BUILDMAN="arm -x arm11,arm7,arm9,aarch64,at91,freescale,kirkwood,mvebu,siemens,tegra,uniphier,mx,samsung,sunxi,am33xx,omap,pxa,rockchip,toradex,socfpga,k2,xilinx"
- name: "buildman sandbox x86"
env:
- BUILDMAN="sandbox x86"

View File

@@ -226,7 +226,8 @@ config BUILD_ROM
config BUILD_TARGET
string "Build target special images"
default "u-boot-with-spl.sfp" if ARCH_SOCFPGA
default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_ARRIA10
default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_GEN5
default "u-boot-spl.kwb" if ARCH_MVEBU && SPL
default "u-boot-elf.srec" if RCAR_GEN3
default "u-boot.itb" if SPL_LOAD_FIT && ARCH_SUNXI

View File

@@ -161,16 +161,19 @@ S: Maintained
F: arch/arm/cpu/armv8/hisilicon
F: arch/arm/include/asm/arch-hi6220/
ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X ARMADA-37XX
M: Prafulla Wadaskar <prafulla@marvell.com>
M: Luka Perkov <luka.perkov@sartura.hr>
ARM MARVELL KIRKWOOD ARMADA-XP ARMADA-38X ARMADA-37XX ARMADA-7K/8K
M: Stefan Roese <sr@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-marvell.git
F: arch/arm/mach-kirkwood/
F: arch/arm/mach-mvebu/
F: drivers/ata/ahci_mvebu.c
F: drivers/phy/marvell/
F: drivers/ddr/marvell/
F: drivers/gpio/mvebu_gpio.c
F: drivers/spi/kirkwood_spi.c
F: drivers/pci/pci_mvebu.c
F: drivers/pci/pcie_dw_mvebu.c
F: drivers/watchdog/orion_wdt.c
ARM MARVELL PXA
M: Marek Vasut <marex@denx.de>
@@ -436,6 +439,11 @@ DFU
M: Lukasz Majewski <lukma@denx.de>
S: Maintained
T: git git://git.denx.de/u-boot-dfu.git
F: cmd/dfu.c
F: cmd/usb_*.c
F: common/dfu.c
F: common/update.c
F: common/usb_storage.c
F: drivers/dfu/
F: drivers/usb/gadget/
@@ -451,7 +459,7 @@ EFI PAYLOAD
M: Heinrich Schuchardt <xypron.glpk@gmx.de>
R: Alexander Graf <agraf@csgraf.de>
S: Maintained
T: git git://github.com/agraf/u-boot.git
T: git git://git.denx.de/u-boot-efi.git
F: doc/README.uefi
F: doc/README.iscsi
F: Documentation/efi.rst

View File

@@ -3,7 +3,7 @@
VERSION = 2019
PATCHLEVEL = 04
SUBLEVEL =
EXTRAVERSION = -rc4
EXTRAVERSION =
NAME =
# *DOCUMENTATION*
@@ -291,6 +291,9 @@ DARWIN_MINOR_VERSION = $(shell sw_vers -productVersion | cut -f 2 -d '.')
os_x_before = $(shell if [ $(DARWIN_MAJOR_VERSION) -le $(1) -a \
$(DARWIN_MINOR_VERSION) -le $(2) ] ; then echo "$(3)"; else echo "$(4)"; fi ;)
os_x_after = $(shell if [ $(DARWIN_MAJOR_VERSION) -ge $(1) -a \
$(DARWIN_MINOR_VERSION) -ge $(2) ] ; then echo "$(3)"; else echo "$(4)"; fi ;)
# Snow Leopards build environment has no longer restrictions as described above
HOSTCC = $(call os_x_before, 10, 5, "cc", "gcc")
HOSTCFLAGS += $(call os_x_before, 10, 4, "-traditional-cpp")
@@ -300,6 +303,10 @@ HOSTLDFLAGS += $(call os_x_before, 10, 5, "-multiply_defined suppress")
# in some host tools which is a problem then ... so disable ASLR for these
# tools
HOSTLDFLAGS += $(call os_x_before, 10, 7, "", "-Xlinker -no_pie")
# macOS Mojave (10.14.X)
# Undefined symbols for architecture x86_64: "_PyArg_ParseTuple"
HOSTLDFLAGS += $(call os_x_after, 10, 14, "-lpython -dynamclib", "")
endif
# Decide whether to build built-in, modular, or both.
@@ -893,7 +900,7 @@ cmd_mkimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -d $< $@ \
>$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT))
quiet_cmd_mkfitimage = MKIMAGE $@
cmd_mkfitimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -f $(U_BOOT_ITS) -E -p $(CONFIG_FIT_EXTERNAL_OFFSET) $@\
cmd_mkfitimage = $(objtree)/tools/mkimage $(MKIMAGEFLAGS_$(@F)) -f $(U_BOOT_ITS) -p $(CONFIG_FIT_EXTERNAL_OFFSET) $@\
>$(MKIMAGEOUTPUT) $(if $(KBUILD_VERBOSE:0=), && cat $(MKIMAGEOUTPUT))
quiet_cmd_cat = CAT $@
@@ -1200,6 +1207,12 @@ u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl u-boot-ivt.img: \
$(call if_changed,mkimage)
$(BOARD_SIZE_CHECK)
ifeq ($(CONFIG_SPL_LOAD_FIT_FULL),y)
MKIMAGEFLAGS_u-boot.itb =
else
MKIMAGEFLAGS_u-boot.itb = -E
endif
u-boot.itb: u-boot-nodtb.bin dts/dt.dtb $(U_BOOT_ITS) FORCE
$(call if_changed,mkfitimage)
$(BOARD_SIZE_CHECK)

15
README
View File

@@ -2130,21 +2130,6 @@ The following options need to be configured:
this is instead controlled by the value of
/config/load-environment.
- Serial Flash support
Usage requires an initial 'sf probe' to define the serial
flash parameters, followed by read/write/erase/update
commands.
The following defaults may be provided by the platform
to handle the common case when only a single serial
flash is present on the system.
CONFIG_SF_DEFAULT_BUS Bus identifier
CONFIG_SF_DEFAULT_CS Chip-select
CONFIG_SF_DEFAULT_MODE (see include/spi.h)
CONFIG_SF_DEFAULT_SPEED in Hz
- TFTP Fixed UDP Port:
CONFIG_TFTP_PORT

View File

@@ -857,7 +857,6 @@ config ARCH_SUNXI
select DM_ETH
select DM_GPIO
select DM_KEYBOARD
select DM_MMC if MMC
select DM_SERIAL
select DM_USB if DISTRO_DEFAULTS
select OF_BOARD_SETUP

View File

@@ -3,7 +3,7 @@ if ARM64
config ARMV8_SPL_EXCEPTION_VECTORS
bool "Install crash dump exception vectors"
depends on SPL
default y
default n
help
The default exception vector table is only used for the crash
dump, but still takes quite a lot of space in the image size.

View File

@@ -88,7 +88,7 @@ pie_fixup_done:
bl reset_sctrl
#endif
#if defined(CONFIG_ARMV8__SPL_EXCEPTION_VECTORS) || !defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_ARMV8_SPL_EXCEPTION_VECTORS) || !defined(CONFIG_SPL_BUILD)
.macro set_vbar, regname, reg
msr \regname, \reg
.endm
@@ -354,7 +354,7 @@ ENDPROC(smp_kick_all_cpus)
/*-----------------------------------------------------------------------*/
ENTRY(c_runtime_cpu_setup)
#if defined(CONFIG_ARMV8__SPL_EXCEPTION_VECTORS) || !defined(CONFIG_SPL_BUILD)
#if defined(CONFIG_ARMV8_SPL_EXCEPTION_VECTORS) || !defined(CONFIG_SPL_BUILD)
/* Relocate vBAR */
adr x0, vectors
switch_el x1, 3f, 2f, 1f

View File

@@ -16,6 +16,8 @@ dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \
dtb-$(CONFIG_TARGET_HIKEY) += hi6220-hikey.dtb
dtb-$(CONFIG_TARGET_POPLAR) += hi3798cv200-poplar.dtb
dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
exynos5250-snow.dtb \
exynos5250-spring.dtb \
@@ -25,10 +27,44 @@ dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \
exynos5800-peach-pi.dtb \
exynos5422-odroidxu3.dtb
dtb-$(CONFIG_EXYNOS7420) += exynos7420-espresso7420.dtb
dtb-$(CONFIG_ARCH_DAVINCI) += \
da850-evm.dtb \
da850-lcdk.dtb
dtb-$(CONFIG_KIRKWOOD) += \
kirkwood-atl-sbx81lifkw.dtb \
kirkwood-atl-sbx81lifxcat.dtb \
kirkwood-blackarmor-nas220.dtb \
kirkwood-d2net.dtb \
kirkwood-dns325.dtb \
kirkwood-dockstar.dtb \
kirkwood-dreamplug.dtb \
kirkwood-ds109.dtb \
kirkwood-goflexnet.dtb \
kirkwood-guruplug-server-plus.dtb \
kirkwood-ib62x0.dtb \
kirkwood-iconnect.dtb \
kirkwood-is2.dtb \
kirkwood-km_kirkwood.dtb \
kirkwood-lsxhl.dtb \
kirkwood-lschlv2.dtb \
kirkwood-net2big.dtb \
kirkwood-ns2.dtb \
kirkwood-ns2lite.dtb \
kirkwood-ns2max.dtb \
kirkwood-ns2mini.dtb \
kirkwood-pogo_e02.dtb \
kirkwood-sheevaplug.dtb
dtb-$(CONFIG_ARCH_OWL) += \
bubblegum_96.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3036-sdk.dtb \
rk3128-evb.dtb \
rk3188-radxarock.dtb \
rk3229-evb.dtb \
rk3288-evb.dtb \
rk3288-fennec.dtb \
rk3288-firefly.dtb \
@@ -50,6 +86,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3368-px5-evb.dtb \
rk3399-evb.dtb \
rk3399-firefly.dtb \
rk3399-gru-bob.dtb \
rk3399-puma-ddr1333.dtb \
rk3399-puma-ddr1600.dtb \
rk3399-puma-ddr1866.dtb \
@@ -96,12 +133,13 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-3720-db.dtb \
armada-3720-espressobin.dtb \
armada-3720-turris-mox.dtb \
armada-3720-uDPU.dts \
armada-3720-uDPU.dtb \
armada-375-db.dtb \
armada-388-clearfog.dtb \
armada-388-gp.dtb \
armada-388-helios4.dtb \
armada-385-amc.dtb \
armada-385-turris-omnia.dtb \
armada-7040-db.dtb \
armada-7040-db-nand.dtb \
armada-8040-db.dtb \
@@ -140,6 +178,7 @@ dtb-$(CONFIG_ARCH_UNIPHIER_SLD8) += \
uniphier-sld8-ref.dtb
dtb-$(CONFIG_ARCH_ZYNQ) += \
bitmain-antminer-s9.dtb \
zynq-cc108.dtb \
zynq-cse-nand.dtb \
zynq-cse-nor.dtb \
@@ -156,6 +195,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
zynq-zc706.dtb \
zynq-zc770-xm010.dtb \
zynq-zc770-xm011.dtb \
zynq-zc770-xm011-x16.dtb \
zynq-zc770-xm012.dtb \
zynq-zc770-xm013.dtb \
zynq-zed.dtb \
@@ -192,7 +232,14 @@ dtb-$(CONFIG_ARCH_VERSAL) += \
versal-mini-emmc1.dtb
dtb-$(CONFIG_ARCH_ZYNQMP_R5) += \
zynqmp-r5.dtb
dtb-$(CONFIG_AM33XX) += am335x-boneblack.dtb am335x-bone.dtb \
dtb-$(CONFIG_AM33XX) += \
am335x-baltos.dtb \
am335x-bone.dtb \
am335x-boneblack.dtb \
am335x-brppt1-mmc.dtb \
am335x-brppt1-nand.dtb \
am335x-brppt1-spi.dtb \
am335x-brxre1.dtb \
am335x-draco.dtb \
am335x-evm.dtb \
am335x-evmsk.dtb \
@@ -209,6 +256,7 @@ dtb-$(CONFIG_AM43XX) += am437x-gp-evm.dtb am437x-sk-evm.dtb \
am43x-epos-evm.dtb \
am437x-idk-evm.dtb \
am4372-generic.dtb
dtb-$(CONFIG_TARGET_AM3517_EVM) += am3517-evm.dtb
dtb-$(CONFIG_TI816X) += dm8168-evm.dtb
dtb-$(CONFIG_THUNDERX) += thunderx-88xx.dtb
@@ -355,6 +403,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-olinuxino-lime2.dtb \
sun7i-a20-olinuxino-lime2-emmc.dtb \
sun7i-a20-olinuxino-micro.dtb \
sun7i-a20-olinuxino-micro-emmc.dtb \
sun7i-a20-orangepi.dtb \
sun7i-a20-orangepi-mini.dtb \
sun7i-a20-pcduino3.dtb \
@@ -383,7 +432,7 @@ dtb-$(CONFIG_MACH_SUN8I_A83T) += \
sun8i-a83t-allwinner-h8homlet-v2.dtb \
sun8i-a83t-bananapi-m3.dtb \
sun8i-a83t-cubietruck-plus.dtb \
sun8i-a83t-tbs-a711.dts
sun8i-a83t-tbs-a711.dtb
dtb-$(CONFIG_MACH_SUN8I_H3) += \
sun8i-h2-plus-bananapi-m2-zero.dtb \
sun8i-h2-plus-libretech-all-h3-cc.dtb \
@@ -408,6 +457,7 @@ dtb-$(CONFIG_MACH_SUN8I_R40) += \
dtb-$(CONFIG_MACH_SUN8I_V3S) += \
sun8i-v3s-licheepi-zero.dtb
dtb-$(CONFIG_MACH_SUN50I_H5) += \
sun50i-h5-bananapi-m2-plus.dtb \
sun50i-h5-emlid-neutis-n5-devboard.dtb \
sun50i-h5-libretech-all-h3-cc.dtb \
sun50i-h5-nanopi-neo2.dtb \
@@ -426,6 +476,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \
sun50i-a64-nanopi-a64.dtb \
sun50i-a64-olinuxino.dtb \
sun50i-a64-orangepi-win.dtb \
sun50i-a64-pine64-lts.dtb \
sun50i-a64-pine64-plus.dtb \
sun50i-a64-pine64.dtb \
sun50i-a64-pinebook.dtb \
@@ -441,7 +492,12 @@ dtb-$(CONFIG_VF610) += vf500-colibri.dtb \
pcm052.dtb \
bk4r1.dtb
dtb-$(CONFIG_MX53) += imx53-cx9020.dtb
dtb-$(CONFIG_MX53) += imx53-cx9020.dtb \
imx53-kp.dtb
dtb-$(CONFIG_MX6Q) += \
imx6q-display5.dtb \
imx6q-logicpd.dtb
dtb-$(CONFIG_MX6QDL) += \
imx6dl-icore.dtb \
@@ -452,7 +508,6 @@ dtb-$(CONFIG_MX6QDL) += \
imx6q-icore.dtb \
imx6q-icore-mipi.dtb \
imx6q-icore-rqs.dtb \
imx6q-logicpd.dtb \
imx6q-sabreauto.dtb \
imx6q-sabresd.dtb \
imx6dl-sabreauto.dtb \
@@ -462,7 +517,7 @@ dtb-$(CONFIG_MX6QDL) += \
dtb-$(CONFIG_MX6SL) += imx6sl-evk.dtb
dtb-$(CONFIG_MX6SL) += imx6sll-evk.dtb
dtb-$(CONFIG_MX6SLL) += imx6sll-evk.dtb
dtb-$(CONFIG_MX6SX) += \
imx6sx-sabreauto.dtb \
@@ -477,12 +532,19 @@ dtb-$(CONFIG_MX6UL) += \
imx6ul-9x9-evk.dtb \
imx6ul-9x9-evk.dtb \
imx6ul-liteboard.dtb \
imx6ul-phycore-segin.dtb
imx6ul-phycore-segin.dtb \
imx6ul-pico-hobbit.dtb \
imx6ul-pico-pi.dtb
dtb-$(CONFIG_MX6ULL) += imx6ull-14x14-evk.dtb
dtb-$(CONFIG_MX6ULL) += \
imx6ull-14x14-evk.dtb \
imx6ull-colibri.dtb \
dtb-$(CONFIG_MX7) += imx7d-sdb.dtb \
imx7d-sdb-qspi.dtb
imx7d-sdb-qspi.dtb \
imx7-colibri-emmc.dtb \
imx7-colibri-rawnand.dtb \
imx7s-warp.dtb
dtb-$(CONFIG_ARCH_MX7ULP) += imx7ulp-evk.dtb
@@ -490,6 +552,16 @@ dtb-$(CONFIG_ARCH_IMX8) += fsl-imx8qxp-mek.dtb
dtb-$(CONFIG_ARCH_IMX8M) += fsl-imx8mq-evk.dtb
dtb-$(CONFIG_RCAR_GEN2) += \
r8a7790-lager-u-boot.dtb \
r8a7790-stout-u-boot.dtb \
r8a7791-koelsch-u-boot.dtb \
r8a7791-porter-u-boot.dtb \
r8a7792-blanche-u-boot.dtb \
r8a7793-gose-u-boot.dtb \
r8a7794-alt-u-boot.dtb \
r8a7794-silk-u-boot.dtb
dtb-$(CONFIG_RCAR_GEN3) += \
r8a7795-h3ulcb-u-boot.dtb \
r8a7795-salvator-x-u-boot.dtb \
@@ -509,8 +581,12 @@ dtb-$(CONFIG_SOC_KEYSTONE) += keystone-k2hk-evm.dtb \
dtb-$(CONFIG_TARGET_AT91SAM9261EK) += at91sam9261ek.dtb
dtb-$(CONFIG_TARGET_PM9261) += at91sam9261ek.dtb
dtb-$(CONFIG_TARGET_PM9263) += at91sam9263ek.dtb
dtb-$(CONFIG_TARGET_MEESC) += at91sam9263ek.dtb
dtb-$(CONFIG_TARGET_AT91SAM9263EK) += at91sam9263ek.dtb
dtb-$(CONFIG_TARGET_AT91SAM9RLEK) += at91sam9rlek.dtb
@@ -531,9 +607,15 @@ dtb-$(CONFIG_TARGET_AT91SAM9X5EK) += \
dtb-$(CONFIG_TARGET_AT91SAM9N12EK) += at91sam9n12ek.dtb
dtb-$(CONFIG_TARGET_ETHERNUT5) += ethernut5.dtb
dtb-$(CONFIG_TARGET_USB_A9263) += usb_a9263.dtb
dtb-$(CONFIG_TARGET_OMAP3_LOGIC) += \
logicpd-torpedo-37xx-devkit.dtb \
logicpd-som-lv-37xx-devkit.dtb
logicpd-som-lv-35xx-devkit.dtb \
logicpd-som-lv-37xx-devkit.dtb \
logicpd-torpedo-35xx-devkit.dtb \
logicpd-torpedo-37xx-devkit.dtb
dtb-$(CONFIG_TARGET_OMAP3_EVM) += \
omap3-evm-37xx.dtb \
@@ -582,9 +664,16 @@ dtb-$(CONFIG_ARCH_BCM283X) += \
bcm2835-rpi-b-plus.dtb \
bcm2835-rpi-b-rev2.dtb \
bcm2835-rpi-b.dtb \
bcm2835-rpi-zero-w.dtb \
bcm2836-rpi-2-b.dtb \
bcm2837-rpi-3-b.dtb
dtb-$(CONFIG_ARCH_BCM63158) += \
bcm963158.dtb
dtb-$(CONFIG_ARCH_BCM6858) += \
bcm968580xref.dtb
dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb
dtb-$(CONFIG_ARCH_STI) += stih410-b2260.dtb

View File

@@ -133,7 +133,7 @@
};
};
pcie-controller {
pcie {
status = "okay";
pcie@1,0 {
/* Port 0, Lane 0 */

View File

@@ -96,7 +96,7 @@
};
};
pcie-controller {
pcie {
status = "okay";
pcie@1,0 {

View File

@@ -124,7 +124,7 @@
};
};
pcie-controller {
pcie {
status = "okay";
/*
* The two PCIe units are accessible through

View File

@@ -234,7 +234,7 @@
};
};
pcie-controller {
pcie {
status = "okay";
/*
* One PCIe units is accessible through

View File

@@ -243,7 +243,7 @@
};
};
pcie-controller {
pcie {
status = "okay";
/*
* The two PCIe units are accessible through

View File

@@ -224,6 +224,7 @@
status = "okay";
phy-reset-gpios = <&pca9557_a 4 GPIO_ACTIVE_LOW>;
phy-reset-duration = <10>;
phy-reset-post-delay = <150>;
mdio {
#address-cells = <1>;

View File

@@ -23,7 +23,7 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_eth>;
phy-mode = "rmii";
phy-reset-gpios = <&gpio7 6 0>;
phy-reset-gpios = <&gpio7 6 GPIO_ACTIVE_LOW>;
status = "okay";
};

View File

@@ -18,6 +18,10 @@
stdout-path = &uart0;
};
aliases {
spi0 = &spi0;
};
ocp@f1000000 {
pinctrl: pin-controller@10000 {
pmx_led_bluetooth: pmx-led-bluetooth {

View File

@@ -8,6 +8,11 @@
#include "r8a7794-alt.dts"
#include "r8a7794-u-boot.dtsi"
&i2c7 {
status = "okay";
clock-frequency = <100000>;
};
&scif2 {
u-boot,dm-pre-reloc;
};

View File

@@ -19,6 +19,10 @@
};
};
&vcc_sdhi0 {
u-boot,off-on-delay-us = <20000>;
};
&sdhi2_pins {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
power-source = <1800>;

View File

@@ -8,6 +8,14 @@
#include "r8a7795-salvator-x.dts"
#include "r8a7795-u-boot.dtsi"
&vcc_sdhi0 {
u-boot,off-on-delay-us = <20000>;
};
&vcc_sdhi3 {
u-boot,off-on-delay-us = <20000>;
};
&sdhi2_pins {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
power-source = <1800>;

View File

@@ -19,6 +19,10 @@
};
};
&vcc_sdhi0 {
u-boot,off-on-delay-us = <20000>;
};
&sdhi2_pins {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
power-source = <1800>;

View File

@@ -8,6 +8,14 @@
#include "r8a7796-salvator-x.dts"
#include "r8a7796-u-boot.dtsi"
&vcc_sdhi0 {
u-boot,off-on-delay-us = <20000>;
};
&vcc_sdhi3 {
u-boot,off-on-delay-us = <20000>;
};
&sdhi2_pins {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
power-source = <1800>;

View File

@@ -8,6 +8,14 @@
#include "r8a77965-salvator-x.dts"
#include "r8a77965-u-boot.dtsi"
&vcc_sdhi0 {
u-boot,off-on-delay-us = <20000>;
};
&vcc_sdhi3 {
u-boot,off-on-delay-us = <20000>;
};
&sdhi2_pins {
groups = "sdhi2_data8", "sdhi2_ctrl", "sdhi2_ds";
power-source = <1800>;

View File

@@ -36,6 +36,7 @@
gpio = <&gpio5 17 GPIO_ACTIVE_HIGH>;
enable-active-high;
u-boot,off-on-delay-us = <20000>;
};
vccq_sdhi0: regulator-vccq-sdhi0 {
@@ -60,6 +61,7 @@
gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
enable-active-high;
u-boot,off-on-delay-us = <20000>;
};
vccq_sdhi1: regulator-vccq-sdhi1 {

View File

@@ -95,6 +95,7 @@
mac-address = [00 00 00 00 00 00];
resets = <&rst EMAC0_RESET>, <&rst EMAC0_OCP_RESET>;
reset-names = "stmmaceth";
altr,sysmgr-syscon = <&sysmgr 0x44 0>;
status = "disabled";
};
@@ -106,6 +107,7 @@
mac-address = [00 00 00 00 00 00];
resets = <&rst EMAC1_RESET>, <&rst EMAC1_OCP_RESET>;
reset-names = "stmmaceth";
altr,sysmgr-syscon = <&sysmgr 0x48 0>;
status = "disabled";
};
@@ -117,6 +119,7 @@
mac-address = [00 00 00 00 00 00];
resets = <&rst EMAC2_RESET>, <&rst EMAC2_OCP_RESET>;
reset-names = "stmmaceth";
altr,sysmgr-syscon = <&sysmgr 0x4c 0>;
status = "disabled";
};

View File

@@ -88,8 +88,6 @@ __weak void board_quiesce_devices(void)
*/
static void announce_and_cleanup(int fake)
{
printf("\nStarting kernel ...%s\n\n", fake ?
"(fake run for tracing)" : "");
bootstage_mark_name(BOOTSTAGE_ID_BOOTM_HANDOFF, "start_kernel");
#ifdef CONFIG_BOOTSTAGE_FDT
bootstage_fdt_add_report();
@@ -104,6 +102,8 @@ static void announce_and_cleanup(int fake)
board_quiesce_devices();
printf("\nStarting kernel ...%s\n\n", fake ?
"(fake run for tracing)" : "");
/*
* Call remove function of all devices with a removal flag set.
* This may be useful for last-stage operations, like cancelling

View File

@@ -107,7 +107,7 @@ static void exynos_spi_copy(unsigned int uboot_size, unsigned int uboot_addr)
{
int upto, todo;
int i, timeout = 100;
struct exynos_spi *regs = (struct exynos_spi *)CONFIG_ENV_SPI_BASE;
struct exynos_spi *regs = (struct exynos_spi *)CONFIG_SYS_SPI_BASE;
set_spi_clk(PERIPH_ID_SPI1, 50000000); /* set spi clock to 50Mhz */
/* set the spi1 GPIO */

View File

@@ -26,6 +26,12 @@
#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 for kernel */
/*
* Disable the dcache. Currently the network driver (mvgbe.c) and USB
* EHCI driver (ehci-marvell.c) and possibly others rely on the data
* cache being disabled.
*/
#define CONFIG_SYS_DCACHE_OFF
/*
* By default kwbimage.cfg from board specific folder is used
@@ -54,21 +60,6 @@
#define NAND_ALLOW_ERASE_ALL 1
#endif
/*
* SPI Flash configuration
*/
#ifdef CONFIG_CMD_SF
#ifndef CONFIG_ENV_SPI_BUS
# define CONFIG_ENV_SPI_BUS 0
#endif
#ifndef CONFIG_ENV_SPI_CS
# define CONFIG_ENV_SPI_CS 0
#endif
#ifndef CONFIG_ENV_SPI_MAX_HZ
# define CONFIG_ENV_SPI_MAX_HZ 50000000
#endif
#endif
/*
* Ethernet Driver configuration
*/

View File

@@ -45,21 +45,6 @@
#define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE
/*
* SPI Flash configuration
*/
#ifdef CONFIG_CMD_SF
#ifndef CONFIG_ENV_SPI_BUS
# define CONFIG_ENV_SPI_BUS 0
#endif
#ifndef CONFIG_ENV_SPI_CS
# define CONFIG_ENV_SPI_CS 0
#endif
#ifndef CONFIG_ENV_SPI_MAX_HZ
# define CONFIG_ENV_SPI_MAX_HZ 50000000
#endif
#endif
/* Needed for SPI NOR booting in SPL */
#define CONFIG_DM_SEQ_ALIAS 1

View File

@@ -61,13 +61,7 @@ int setup_boot_mode(void)
void *reg = (void *)CONFIG_ROCKCHIP_BOOT_MODE_REG;
int boot_mode = readl(reg);
/*
* This should be handled using a driver-tree property and a suitable
* driver which can read the appropriate settings. As it is, this
* breaks chromebook_minnie.\
*
* rockchip_dnl_mode_check();
*/
rockchip_dnl_mode_check();
boot_mode = readl(reg);
debug("%s: boot mode 0x%08x\n", __func__, boot_mode);

View File

@@ -154,6 +154,7 @@ config MACH_SUN4I
bool "sun4i (Allwinner A10)"
select CPU_V7A
select ARM_CORTEX_CPU_IS_UP
select DM_MMC if MMC
select DM_SCSI if SCSI
select PHY_SUN4I_USB
select DRAM_SUN4I
@@ -164,6 +165,7 @@ config MACH_SUN5I
bool "sun5i (Allwinner A13)"
select CPU_V7A
select ARM_CORTEX_CPU_IS_UP
select DM_MMC if MMC
select DRAM_SUN4I
select PHY_SUN4I_USB
select SUNXI_GEN_SUN4I
@@ -176,6 +178,7 @@ config MACH_SUN6I
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
select DM_MMC if MMC
select DRAM_SUN6I
select PHY_SUN4I_USB
select SUN6I_P2WI
@@ -202,6 +205,7 @@ config MACH_SUN8I_A23
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
select DM_MMC if MMC
select DRAM_SUN8I_A23
select PHY_SUN4I_USB
select SUNXI_GEN_SUN6I
@@ -215,6 +219,7 @@ config MACH_SUN8I_A33
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
select DM_MMC if MMC
select DRAM_SUN8I_A33
select PHY_SUN4I_USB
select SUNXI_GEN_SUN6I
@@ -225,6 +230,7 @@ config MACH_SUN8I_A33
config MACH_SUN8I_A83T
bool "sun8i (Allwinner A83T)"
select CPU_V7A
select DM_MMC if MMC
select DRAM_SUN8I_A83T
select PHY_SUN4I_USB
select SUNXI_GEN_SUN6I
@@ -240,6 +246,7 @@ config MACH_SUN8I_H3
select ARCH_SUPPORT_PSCI
select MACH_SUNXI_H3_H5
select ARMV7_BOOT_SEC_DEFAULT if OLD_SUNXI_KERNEL_COMPAT
select DM_MMC if MMC
config MACH_SUN8I_R40
bool "sun8i (Allwinner R40)"
@@ -258,6 +265,7 @@ config MACH_SUN8I_V3S
select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select ARCH_SUPPORT_PSCI
select DM_MMC if MMC
select SUNXI_GEN_SUN6I
select SUNXI_DRAM_DW
select SUNXI_DRAM_DW_16BIT
@@ -272,11 +280,13 @@ config MACH_SUN9I
select SUNXI_GEN_SUN6I
select SUN8I_RSB
select SUPPORT_SPL
select DM_MMC if MMC
config MACH_SUN50I
bool "sun50i (Allwinner A64)"
select ARM64
select DM_I2C
select DM_MMC if MMC
select PHY_SUN4I_USB
select SUN6I_PRCM
select SUNXI_DE2
@@ -293,6 +303,7 @@ config MACH_SUN50I_H5
bool "sun50i (Allwinner H5)"
select ARM64
select MACH_SUNXI_H3_H5
select DM_MMC if MMC
select FIT
select SPL_LOAD_FIT
@@ -300,6 +311,7 @@ config MACH_SUN50I_H6
bool "sun50i (Allwinner H6)"
select ARM64
select SUPPORT_SPL
select DM_MMC if MMC
select FIT
select SPL_LOAD_FIT
select DRAM_SUN50I_H6

View File

@@ -1,5 +1,8 @@
# SPDX-License-Identifier: GPL-2.0+
dtb-$(CONFIG_ARCH_MT7620) += \
gardena-smart-gateway-mt7688.dtb \
linkit-smart-7688.dtb
dtb-$(CONFIG_TARGET_AP121) += ap121.dtb
dtb-$(CONFIG_TARGET_AP143) += ap143.dtb
dtb-$(CONFIG_TARGET_BOSTON) += img,boston.dtb
@@ -17,6 +20,8 @@ dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb
dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f@st1704.dtb
dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb
dtb-$(CONFIG_TARGET_JZ4780_CI20) += ci20.dtb
dtb-$(CONFIG_SOC_BMIPS_BCM6358) += sfr,nb4-ser.dtb
dtb-$(CONFIG_SOC_BMIPS_BCM6838) += brcm,bcm968380gerg.dtb
dtb-$(CONFIG_SOC_LUTON) += luton_pcb090.dtb luton_pcb091.dtb
dtb-$(CONFIG_SOC_OCELOT) += ocelot_pcb120.dtb ocelot_pcb123.dtb
dtb-$(CONFIG_SOC_JR2) += jr2_pcb110.dtb jr2_pcb111.dtb serval2_pcb112.dtb

View File

@@ -70,7 +70,7 @@ int print_cpuinfo(void)
}
#ifdef CONFIG_WATCHDOG
static struct udevice *watchdog_dev;
static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL;
/* Called by macro WATCHDOG_RESET */
void watchdog_reset(void)

View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0+
dtb-$(CONFIG_TARGET_T2080QDS) += t2080qds.dtb
dtb-$(CONFIG_MCR3000) += mcr3000.dtb
dtb-$(CONFIG_TARGET_MCR3000) += mcr3000.dtb
targets += $(dtb-y)

View File

@@ -15,19 +15,6 @@
#include <asm/io.h>
#ifndef CONFIG_SF_DEFAULT_SPEED
# define CONFIG_SF_DEFAULT_SPEED 1000000
#endif
#ifndef CONFIG_SF_DEFAULT_MODE
# define CONFIG_SF_DEFAULT_MODE SPI_MODE0
#endif
#ifndef CONFIG_SF_DEFAULT_CS
# define CONFIG_SF_DEFAULT_CS 0
#endif
#ifndef CONFIG_SF_DEFAULT_BUS
# define CONFIG_SF_DEFAULT_BUS 0
#endif
#define MAX_SERIAL_SIZE 15
#define MAX_HWADDR_SIZE 17

View File

@@ -120,7 +120,7 @@ int board_fix_fdt(void *blob)
#endif
#ifdef CONFIG_WDT_ARMADA_37XX
static struct udevice *watchdog_dev;
static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL;
void watchdog_reset(void)
{

View File

@@ -365,7 +365,7 @@ static bool disable_mcu_watchdog(void)
#endif
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT_ORION)
static struct udevice *watchdog_dev = NULL;
static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL;
#endif
int board_init(void)

View File

@@ -1,29 +1,30 @@
U-Boot for the NXP i.MX8MQ EVK board
Quick Start
====================
===========
- Build the ARM Trusted firmware binary
- Get ddr and hdmi fimware
- Build U-Boot
- Boot
Get and Build the ARM Trusted firmware
====================
======================================
Note: srctree is U-Boot source directory
Get ATF from: https://source.codeaurora.org/external/imx/imx-atf
branch: imx_4.14.62_1.0.0_beta
$ make PLAT=imx8mq bl31
$ cp build/imx8mq/release/bl31.bin $(srctree)
Get the ddr and hdmi firmware
====================
Note: srctree is U-Boot source directory
=============================
$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-7.9.bin
$ chmod +x firmware-imx-7.9.bin
$ ./firmware-imx-7.9.bin
$ cp firmware-imx-7.9/firmware/hdmi/cadence/signed_hdmi_imx8m.bin $(srctree)
$ cp firmware-imx-7.9/firmware/ddr/synopsys/lpddr4*.bin $(srctee)
$ cp firmware-imx-7.9/firmware/ddr/synopsys/lpddr4*.bin $(srctree)
Build U-Boot
====================
============
$ export CROSS_COMPILE=aarch64-poky-linux-
$ make imx8mq_evk_defconfig
$ make flash.bin
@@ -32,5 +33,5 @@ Burn the flash.bin to MicroSD card offset 33KB
$sudo dd if=flash.bin of=/dev/sd[x] bs=1024 seek=33
Boot
====================
====
Set Boot switch SW801: 1100 and Bmode: 10 to boot from Micro SD.

View File

@@ -1,5 +1,5 @@
RPI BOARD
M: Alexander Graf <agraf@suse.de>
M: Matthias Brugger <mbrugger@suse.com>
S: Maintained
F: board/raspberrypi/rpi/
F: include/configs/rpi.h

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@@ -9,13 +9,4 @@ config SYS_VENDOR
config SYS_CONFIG_NAME
default "alt"
config R8A7794_ETHERNET_B
bool "Use ethernet B function"
depends on TARGET_ALT
default n
help
ALT board can use default ethernet and etnernet B function.
This config set pin function of ethenet B. You also needt to change
DIP switch of board in order to use this function.
endif

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@@ -28,7 +28,6 @@
DECLARE_GLOBAL_DATA_PTR;
#define CLK2MHZ(clk) (clk / 1000 / 1000)
void s_init(void)
{
struct rcar_rwdt *rwdt = (struct rcar_rwdt *)RWDT_BASE;
@@ -93,7 +92,7 @@ int dram_init_banksize(void)
/* KSZ8041RNLI */
#define PHY_CONTROL1 0x1E
#define PHY_LED_MODE 0xC0000
#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{
@@ -108,7 +107,7 @@ int board_phy_config(struct phy_device *phydev)
void reset_cpu(ulong addr)
{
struct udevice *dev;
const u8 pmic_bus = 1;
const u8 pmic_bus = 7;
const u8 pmic_addr = 0x58;
u8 data;
int ret;

View File

@@ -98,7 +98,7 @@ int dram_init_banksize(void)
/* KSZ8041RNLI */
#define PHY_CONTROL1 0x1E
#define PHY_LED_MODE 0xC0000
#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{

View File

@@ -100,7 +100,7 @@ int dram_init_banksize(void)
/* Koelsch has KSZ8041NL/RNL */
#define PHY_CONTROL1 0x1E
#define PHY_LED_MODE 0xC0000
#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{

View File

@@ -109,7 +109,7 @@ int dram_init_banksize(void)
/* KSZ8041NL/RNL */
#define PHY_CONTROL1 0x1E
#define PHY_LED_MODE 0xC0000
#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{

View File

@@ -98,7 +98,7 @@ int dram_init_banksize(void)
/* porter has KSZ8041RNLI */
#define PHY_CONTROL1 0x1E
#define PHY_LED_MODE 0xC0000
#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{

View File

@@ -93,7 +93,7 @@ int dram_init_banksize(void)
/* porter has KSZ8041RNLI */
#define PHY_CONTROL1 0x1E
#define PHY_LED_MODE 0xC0000
#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{

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@@ -112,7 +112,7 @@ int dram_init_banksize(void)
/* Stout has KSZ8041NL/RNL */
#define PHY_CONTROL1 0x1E
#define PHY_LED_MODE 0xC0000
#define PHY_LED_MODE 0xC000
#define PHY_LED_MODE_ACK 0x4000
int board_phy_config(struct phy_device *phydev)
{

View File

@@ -3,4 +3,3 @@
# Copyright (C) 2013-2016 Synopsys, Inc. All rights reserved.
obj-y += axs10x.o
obj-$(CONFIG_CMD_NAND) += nand.o

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@@ -1,242 +0,0 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2013-2014 Synopsys, Inc. All rights reserved.
*/
#include <bouncebuf.h>
#include <common.h>
#include <malloc.h>
#include <nand.h>
#include <asm/io.h>
#include "axs10x.h"
DECLARE_GLOBAL_DATA_PTR;
#define BUS_WIDTH 8 /* AXI data bus width in bytes */
/* DMA buffer descriptor bits & masks */
#define BD_STAT_OWN (1 << 31)
#define BD_STAT_BD_FIRST (1 << 3)
#define BD_STAT_BD_LAST (1 << 2)
#define BD_SIZES_BUFFER1_MASK 0xfff
#define BD_STAT_BD_COMPLETE (BD_STAT_BD_FIRST | BD_STAT_BD_LAST)
/* Controller command flags */
#define B_WFR (1 << 19) /* 1b - Wait for ready */
#define B_LC (1 << 18) /* 1b - Last cycle */
#define B_IWC (1 << 13) /* 1b - Interrupt when complete */
/* NAND cycle types */
#define B_CT_ADDRESS (0x0 << 16) /* Address operation */
#define B_CT_COMMAND (0x1 << 16) /* Command operation */
#define B_CT_WRITE (0x2 << 16) /* Write operation */
#define B_CT_READ (0x3 << 16) /* Write operation */
enum nand_isr_t {
NAND_ISR_DATAREQUIRED = 0,
NAND_ISR_TXUNDERFLOW,
NAND_ISR_TXOVERFLOW,
NAND_ISR_DATAAVAILABLE,
NAND_ISR_RXUNDERFLOW,
NAND_ISR_RXOVERFLOW,
NAND_ISR_TXDMACOMPLETE,
NAND_ISR_RXDMACOMPLETE,
NAND_ISR_DESCRIPTORUNAVAILABLE,
NAND_ISR_CMDDONE,
NAND_ISR_CMDAVAILABLE,
NAND_ISR_CMDERROR,
NAND_ISR_DATATRANSFEROVER,
NAND_ISR_NONE
};
enum nand_regs_t {
AC_FIFO = 0, /* address and command fifo */
IDMAC_BDADDR = 0x18, /* idmac descriptor list base address */
INT_STATUS = 0x118, /* interrupt status register */
INT_CLR_STATUS = 0x120, /* interrupt clear status register */
};
struct nand_bd {
uint32_t status; /* DES0 */
uint32_t sizes; /* DES1 */
uint32_t buffer_ptr0; /* DES2 */
uint32_t buffer_ptr1; /* DES3 */
};
#define NAND_REG_WRITE(r, v) \
writel(v, (volatile void __iomem *)(CONFIG_SYS_NAND_BASE + r))
#define NAND_REG_READ(r) \
readl((const volatile void __iomem *)(CONFIG_SYS_NAND_BASE + r))
static struct nand_bd *bd; /* DMA buffer descriptors */
/**
* axs101_nand_write_buf - write buffer to chip
* @mtd: MTD device structure
* @buf: data buffer
* @len: number of bytes to write
*/
static uint32_t nand_flag_is_set(uint32_t flag)
{
uint32_t reg = NAND_REG_READ(INT_STATUS);
if (reg & (1 << NAND_ISR_CMDERROR))
return 0;
if (reg & (1 << flag)) {
NAND_REG_WRITE(INT_CLR_STATUS, 1 << flag);
return 1;
}
return 0;
}
/**
* axs101_nand_write_buf - write buffer to chip
* @mtd: MTD device structure
* @buf: data buffer
* @len: number of bytes to write
*/
static void axs101_nand_write_buf(struct mtd_info *mtd, const u_char *buf,
int len)
{
struct bounce_buffer bbstate;
bounce_buffer_start(&bbstate, (void *)buf, len, GEN_BB_READ);
/* Setup buffer descriptor */
writel(BD_STAT_OWN | BD_STAT_BD_COMPLETE, &bd->status);
writel(ALIGN(len, BUS_WIDTH) & BD_SIZES_BUFFER1_MASK, &bd->sizes);
writel(bbstate.bounce_buffer, &bd->buffer_ptr0);
writel(0, &bd->buffer_ptr1);
/* Flush modified buffer descriptor */
flush_dcache_range((unsigned long)bd,
(unsigned long)bd + sizeof(struct nand_bd));
/* Issue "write" command */
NAND_REG_WRITE(AC_FIFO, B_CT_WRITE | B_WFR | B_IWC | B_LC | (len-1));
/* Wait for NAND command and DMA to complete */
while (!nand_flag_is_set(NAND_ISR_CMDDONE))
;
while (!nand_flag_is_set(NAND_ISR_TXDMACOMPLETE))
;
bounce_buffer_stop(&bbstate);
}
/**
* axs101_nand_read_buf - read chip data into buffer
* @mtd: MTD device structure
* @buf: buffer to store data
* @len: number of bytes to read
*/
static void axs101_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
{
struct bounce_buffer bbstate;
bounce_buffer_start(&bbstate, buf, len, GEN_BB_WRITE);
/* Setup buffer descriptor */
writel(BD_STAT_OWN | BD_STAT_BD_COMPLETE, &bd->status);
writel(ALIGN(len, BUS_WIDTH) & BD_SIZES_BUFFER1_MASK, &bd->sizes);
writel(bbstate.bounce_buffer, &bd->buffer_ptr0);
writel(0, &bd->buffer_ptr1);
/* Flush modified buffer descriptor */
flush_dcache_range((unsigned long)bd,
(unsigned long)bd + sizeof(struct nand_bd));
/* Issue "read" command */
NAND_REG_WRITE(AC_FIFO, B_CT_READ | B_WFR | B_IWC | B_LC | (len - 1));
/* Wait for NAND command and DMA to complete */
while (!nand_flag_is_set(NAND_ISR_CMDDONE))
;
while (!nand_flag_is_set(NAND_ISR_RXDMACOMPLETE))
;
bounce_buffer_stop(&bbstate);
}
/**
* axs101_nand_read_byte - read one byte from the chip
* @mtd: MTD device structure
*/
static u_char axs101_nand_read_byte(struct mtd_info *mtd)
{
u8 byte;
axs101_nand_read_buf(mtd, (uchar *)&byte, sizeof(byte));
return byte;
}
/**
* axs101_nand_read_word - read one word from the chip
* @mtd: MTD device structure
*/
static u16 axs101_nand_read_word(struct mtd_info *mtd)
{
u16 word;
axs101_nand_read_buf(mtd, (uchar *)&word, sizeof(word));
return word;
}
/**
* axs101_nand_hwcontrol - NAND control functions wrapper.
* @mtd: MTD device structure
* @cmd: Command
*/
static void axs101_nand_hwcontrol(struct mtd_info *mtdinfo, int cmd,
unsigned int ctrl)
{
if (cmd == NAND_CMD_NONE)
return;
cmd = cmd & 0xff;
switch (ctrl & (NAND_ALE | NAND_CLE)) {
/* Address */
case NAND_ALE:
cmd |= B_CT_ADDRESS;
break;
/* Command */
case NAND_CLE:
cmd |= B_CT_COMMAND | B_WFR;
break;
default:
debug("%s: unknown ctrl %#x\n", __func__, ctrl);
}
NAND_REG_WRITE(AC_FIFO, cmd | B_LC);
while (!nand_flag_is_set(NAND_ISR_CMDDONE))
;
}
int board_nand_init(struct nand_chip *nand)
{
bd = (struct nand_bd *)memalign(ARCH_DMA_MINALIGN,
sizeof(struct nand_bd));
/* Set buffer descriptor address in IDMAC */
NAND_REG_WRITE(IDMAC_BDADDR, bd);
nand->ecc.mode = NAND_ECC_SOFT;
nand->cmd_ctrl = axs101_nand_hwcontrol;
nand->read_byte = axs101_nand_read_byte;
nand->read_word = axs101_nand_read_word;
nand->write_buf = axs101_nand_write_buf;
nand->read_buf = axs101_nand_read_buf;
/* MBv3 has NAND IC with 16-bit data bus */
if (gd->board_type == AXS_MB_V3)
nand->options |= NAND_BUSWIDTH_16;
return 0;
}

View File

@@ -83,10 +83,11 @@ Useful notes on bulding and using of U-Boot on ARC HS Development Kit (AKA HSDK)
HSDK board.
Note that Python3 script is used for generation of a header, thus
to get that done it's required to have Python3 with elftools installed.
On CentOS/RHEL/Fedora this could be installed with:
to get that done it's required to have Python3 with "pyelftools" installed.
"pyelftools" could be installed with help of "pip" even w/o root rights:
------------------------->8----------------------
sudo dnf install python3-pyelftools
python3 -m pip install --user pyelftools
------------------------->8----------------------
EXECUTING U-BOOT

View File

@@ -10,6 +10,7 @@
#include <asm/gpio.h>
#include <asm/mach-imx/iomux-v3.h>
#include <asm/mach-imx/boot_mode.h>
#include <fsl_esdhc.h>
#include <linux/libfdt.h>
#include <spl.h>
@@ -141,4 +142,37 @@ void board_init_f(ulong dummy)
void reset_cpu(ulong addr)
{
}
#define USDHC_PAD_CTRL (PAD_CTL_PKE | PAD_CTL_PUE | \
PAD_CTL_PUS_22K_UP | PAD_CTL_SPEED_LOW | \
PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | PAD_CTL_HYS)
static iomux_v3_cfg_t const usdhc1_pads[] = {
MX6_PAD_SD1_CLK__USDHC1_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD1_CMD__USDHC1_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD1_DATA0__USDHC1_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD1_DATA1__USDHC1_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD1_DATA2__USDHC1_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_SD1_DATA3__USDHC1_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_READY_B__USDHC1_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_CE0_B__USDHC1_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_CE1_B__USDHC1_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
MX6_PAD_NAND_CLE__USDHC1_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
};
static struct fsl_esdhc_cfg usdhc_cfg[1] = {
{USDHC1_BASE_ADDR},
};
int board_mmc_getcd(struct mmc *mmc)
{
return 1;
}
int board_mmc_init(bd_t *bis)
{
imx_iomux_v3_setup_multiple_pads(usdhc1_pads, ARRAY_SIZE(usdhc1_pads));
usdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
return fsl_esdhc_initialize(bis, &usdhc_cfg[0]);
}
#endif

View File

@@ -26,6 +26,10 @@ Connect a USB to serial adapter between the host PC and pico.
Connect a USB cable between the OTG pico port and the host PC.
Note: Some computers may be a bit strict with USB current draw and will
shut down their ports if the draw is too high. The solution for that is
to use an externally powered USB hub between the board and the host computer.
Open a terminal program such as minicom.
Copy SPL and u-boot.img to the imx_usb_loader folder.

View File

@@ -1096,6 +1096,16 @@ int board_fit_config_name_match(const char *name)
}
#endif
#if CONFIG_IS_ENABLED(FASTBOOT) && !CONFIG_IS_ENABLED(ENV_IS_NOWHERE)
int fastboot_set_reboot_flag(void)
{
printf("Setting reboot to fastboot flag ...\n");
env_set("dofastboot", "1");
env_save();
return 0;
}
#endif
#ifdef CONFIG_TI_SECURE_DEVICE
void board_fit_image_post_process(void **p_image, size_t *p_size)
{
@@ -1107,15 +1117,5 @@ void board_tee_image_process(ulong tee_image, size_t tee_size)
secure_tee_install((u32)tee_image);
}
#if CONFIG_IS_ENABLED(FASTBOOT) && !CONFIG_IS_ENABLED(ENV_IS_NOWHERE)
int fastboot_set_reboot_flag(void)
{
printf("Setting reboot to fastboot flag ...\n");
env_set("dofastboot", "1");
env_save();
return 0;
}
#endif
U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, board_tee_image_process);
#endif

View File

@@ -1092,6 +1092,16 @@ int board_fit_config_name_match(const char *name)
}
#endif
#if CONFIG_IS_ENABLED(FASTBOOT) && !CONFIG_IS_ENABLED(ENV_IS_NOWHERE)
int fastboot_set_reboot_flag(void)
{
printf("Setting reboot to fastboot flag ...\n");
env_set("dofastboot", "1");
env_save();
return 0;
}
#endif
#ifdef CONFIG_TI_SECURE_DEVICE
void board_fit_image_post_process(void **p_image, size_t *p_size)
{
@@ -1103,15 +1113,5 @@ void board_tee_image_process(ulong tee_image, size_t tee_size)
secure_tee_install((u32)tee_image);
}
#if CONFIG_IS_ENABLED(FASTBOOT) && !CONFIG_IS_ENABLED(ENV_IS_NOWHERE)
int fastboot_set_reboot_flag(void)
{
printf("Setting reboot to fastboot flag ...\n");
env_set("dofastboot", "1");
env_save();
return 0;
}
#endif
U_BOOT_FIT_LOADABLE_HANDLER(IH_TYPE_TEE, board_tee_image_process);
#endif

View File

@@ -155,11 +155,13 @@ __weak void tqma6_iomuxc_spi(void)
ARRAY_SIZE(tqma6_ecspi1_pads));
}
#if defined(CONFIG_SF_DEFAULT_BUS) && defined(CONFIG_SF_DEFAULT_CS)
int board_spi_cs_gpio(unsigned bus, unsigned cs)
{
return ((bus == CONFIG_SF_DEFAULT_BUS) &&
(cs == CONFIG_SF_DEFAULT_CS)) ? TQMA6_SF_CS_GPIO : -1;
}
#endif
static struct i2c_pads_info tqma6_i2c3_pads = {
/* I2C3: on board LM75, M24C64, */

View File

@@ -25,7 +25,7 @@
DECLARE_GLOBAL_DATA_PTR;
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
static struct udevice *watchdog_dev;
static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL;
#endif /* !CONFIG_SPL_BUILD && CONFIG_WDT */
ulong ram_base;

View File

@@ -19,17 +19,12 @@
DECLARE_GLOBAL_DATA_PTR;
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
static struct udevice *watchdog_dev;
static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL;
#endif
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_BOARD_EARLY_INIT_F)
int board_early_init_f(void)
{
# if defined(CONFIG_WDT)
/* bss is not cleared at time when watchdog_reset() is called */
watchdog_dev = NULL;
# endif
return 0;
}
#endif

View File

@@ -25,7 +25,7 @@
DECLARE_GLOBAL_DATA_PTR;
#if !defined(CONFIG_SPL_BUILD) && defined(CONFIG_WDT)
static struct udevice *watchdog_dev;
static struct udevice *watchdog_dev __attribute__((section(".data"))) = NULL;
#endif
#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ZYNQMPPL) && \
@@ -322,11 +322,6 @@ int board_early_init_f(void)
ret = psu_init();
#endif
#if defined(CONFIG_WDT) && !defined(CONFIG_SPL_BUILD)
/* bss is not cleared at time when watchdog_reset() is called */
watchdog_dev = NULL;
#endif
return ret;
}

View File

@@ -1040,10 +1040,20 @@ config CMD_SF_TEST
everything is working properly.
config CMD_SPI
bool "sspi"
bool "sspi - Command to access spi device"
help
SPI utility command.
config DEFAULT_SPI_BUS
int "default spi bus used by sspi command"
depends on CMD_SPI
default 0
config DEFAULT_SPI_MODE
hex "default spi mode used by sspi command (see include/spi.h)"
depends on CMD_SPI
default 0
config CMD_TSI148
bool "tsi148 - Command to access tsi148 device"
help

View File

@@ -13,6 +13,7 @@
#include <fastboot.h>
#include <net.h>
#include <usb.h>
#include <watchdog.h>
static int do_fastboot_udp(int argc, char *const argv[],
uintptr_t buf_addr, size_t buf_size)
@@ -74,6 +75,7 @@ static int do_fastboot_usb(int argc, char *const argv[],
break;
if (ctrlc())
break;
WATCHDOG_RESET();
usb_gadget_handle_interrupts(controller_index);
}

View File

@@ -80,7 +80,6 @@ static void efi_dump_single_var(u16 *name, efi_guid_t *guid)
printf(", DataSize = 0x%zx\n", size);
print_hex_dump(" ", DUMP_PREFIX_OFFSET, 16, 1, data, size, true);
return;
out:
free(data);
}

View File

@@ -22,13 +22,6 @@
# define MAX_SPI_BYTES 32 /* Maximum number of bytes we can handle */
#endif
#ifndef CONFIG_DEFAULT_SPI_BUS
# define CONFIG_DEFAULT_SPI_BUS 0
#endif
#ifndef CONFIG_DEFAULT_SPI_MODE
# define CONFIG_DEFAULT_SPI_MODE SPI_MODE_0
#endif
/*
* Values from last command.
*/

View File

@@ -53,8 +53,8 @@ bool android_dt_get_fdt_by_index(ulong hdr_addr, u32 index, ulong *addr,
entry_size = fdt32_to_cpu(hdr->dt_entry_size);
unmap_sysmem(hdr);
if (index > entry_count) {
printf("Error: index > dt_entry_count (%u > %u)\n", index,
if (index >= entry_count) {
printf("Error: index >= dt_entry_count (%u >= %u)\n", index,
entry_count);
return false;
}

View File

@@ -491,6 +491,10 @@ int spl_load_simple_fit(struct spl_image_info *spl_image,
if (!spl_fit_image_get_os(fit, node, &os_type))
debug("Loadable is %s\n", genimg_get_os_name(os_type));
#if CONFIG_IS_ENABLED(FIT_IMAGE_TINY)
else
os_type = IH_OS_U_BOOT;
#endif
if (os_type == IH_OS_U_BOOT) {
spl_fit_append_fdt(&image_info, info, sector,

View File

@@ -41,6 +41,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y

View File

@@ -30,6 +30,8 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y

View File

@@ -29,6 +29,8 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y

View File

@@ -41,6 +41,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y

View File

@@ -30,6 +30,8 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y

View File

@@ -30,6 +30,8 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y

View File

@@ -26,6 +26,8 @@ CONFIG_ENV_IS_IN_REMOTE=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y

View File

@@ -29,6 +29,8 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHY_GIGE=y

View File

@@ -32,6 +32,8 @@ CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_MII=y

View File

@@ -31,6 +31,8 @@ CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_MII=y

View File

@@ -27,6 +27,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_MII=y

View File

@@ -27,6 +27,8 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_FSL_CAAM=y
# CONFIG_MMC is not set
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_MII=y

View File

@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y

View File

@@ -39,6 +39,8 @@ CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y

View File

@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y

View File

@@ -39,6 +39,8 @@ CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y

View File

@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y

View File

@@ -34,6 +34,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y

View File

@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y

View File

@@ -34,6 +34,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y

View File

@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y

View File

@@ -34,6 +34,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y

View File

@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y

View File

@@ -34,6 +34,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y

View File

@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y

View File

@@ -34,6 +34,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y

View File

@@ -35,6 +35,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y

View File

@@ -34,6 +34,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_FLASH_CFI_MTD=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y

View File

@@ -40,6 +40,8 @@ CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_NAND=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y

View File

@@ -27,6 +27,8 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y

View File

@@ -28,6 +28,8 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y

View File

@@ -27,6 +27,8 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y

View File

@@ -26,6 +26,8 @@ CONFIG_FLASH_CFI_DRIVER=y
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
CONFIG_SYS_FLASH_CFI=y
CONFIG_SPI_FLASH=y
CONFIG_SF_DEFAULT_MODE=0
CONFIG_SF_DEFAULT_SPEED=10000000
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_PHY_MARVELL=y

View File

@@ -15,6 +15,8 @@ CONFIG_CMD_CACHE=y
CONFIG_CMD_DATE=y
CONFIG_CMD_JFFS2=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_ENV_SPI_CS=y
CONFIG_ENV_SPI_CS=2
# CONFIG_NET is not set
CONFIG_MTD_NOR_FLASH=y
CONFIG_FLASH_CFI_DRIVER=y

View File

@@ -20,6 +20,8 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_ENV_SPI_CS=y
CONFIG_ENV_SPI_CS=1
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_MII=y

View File

@@ -20,6 +20,8 @@ CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_CACHE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_ENV_SPI_CS=y
CONFIG_ENV_SPI_CS=1
CONFIG_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_MII=y

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