Adam Ford reports that this change breaks booting on da850-evm and
Bartosz Golaszewski agrees that with the impending release we should
revert the change for now. With that noted:
This reverts commit 21a4d80a71.
Cc: Bartosz Golaszewski <brgl@bgdev.pl>
Tested-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
On K3 devices there are 2 conditions where R5F can deadlock:
1.When software is performing series of store operations to
cacheable write back/write allocate memory region and later
on software execute barrier operation (DSB or DMB). R5F may
hang at the barrier instruction.
2.When software is performing a mix of load and store operations
within a tight loop and store operations are all writing to
cacheable write back/write allocates memory regions, R5F may
hang at one of the load instruction.
To avoid the above two conditions disable linefill optimization
inside Cortex R5F which will make R5F to only issue up to 2 cache
line fills at any point of time.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Update the ddr settings to use the DDR reg config tool rev 0.2.0.
This reduces the aging count(in DDRSS_CTL_274_DATA reg) to 15 in-order
to avoid DSS underflow errors.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Kevin Scholz <k-scholz@ti.com>
The build failure was originally reported on arm64-musl
target at https://bugs.gentoo.org/703132. Here is the amd64-musl
variant:
```
$ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-only_defconfig -j$(nproc)
$ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-all -j$(nproc)
...
include/u-boot/crc.h:37:44: error: unknown type name 'uint'; did you mean 'int'?
37 | void crc16_ccitt_wd_buf(const uint8_t *in, uint len,
| ^~~~
| int
```
Note: 'uint' is not defined there.
On glibc 'uint' comes from <sys/types.h> and happens to work on most .c files.
The change imports 'uint' declaration from '<compiler.h>'.
Bug: https://bugs.gentoo.org/703132
Signed-off-by: Sergei Trofimovich <slyfox@gentoo.org>
The build failure was originally reported on arm64-musl
target at https://bugs.gentoo.org/703132. Here is the amd64-musl
variant:
```
$ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-only_defconfig -j$(nproc)
$ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-all -j$(nproc)
...
In file included from tools/env/../../env/flags.c:7,
from tools/env/env_flags.c:1:
include/env.h:159:1: error: unknown type name 'ulong'; did you mean 'long'?
159 | ulong env_get_ulong(const char *name, int base, ulong default_val);
| ^~~~~
| long
```
Note: 'ulong' is not defined there.
On glibc 'ulong' comes from <sys/types.h>:
```c
/* Old compatibility names for C types. */
typedef unsigned long int ulong;
```
On musl it comes from <sys/types.h> as well but from under different guards:
```c
typedef unsigned long u_long, ulong;
```
The change inlines 'ulong' define similar to 'uint' define.
Bug: https://bugs.gentoo.org/703132
Signed-off-by: Sergei Trofimovich <slyfox@gentoo.org>
The scripts/Makefile.lib generates an assembler file (*.S) to wrap the
font data for each file of type ttf defined in Kconfig.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
- Fix latest mainline kernel for rk3308
- Update rk3288-evb config to suport OP-TEE
- Fix for firefly-px30 DEBUG_UART channel and make it standalone
- Script make_fit_atf add python3 support
- Fix rk3328 timer with correct COUNTER_FREQUENCY
- Fix rk3328 ATF support with enable spl-fifo-mode
My address at Linaro doesn't exist anymore, so people
keep getting mail delivery error responses. Map this address
to the actual one.
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
get_env() was originally written to strip() the output of printenv to
isolate the test from any whitespace changes in printenv's output.
However, this throws away any whitespace in the variable value, which can
cause issues when test code expects to see that whitespace. In fact,
printenv never adds any whitespace at all, so there's no need to strip.
The strip causes a practical problem for test_env_echo_exists() if
state_test_env.get_existent_var() happens to choose a U-Boot variable that
contains trailing whitespace. This is true for variable boot_targets.
With Python 2, get_existent_var() never returned boot_targets so this
issue never caused a practical problem.
With Python 3, get_existent_var does sometimes return boot_targets, no
doubt due to Python 3's different dict hash key order implementation,
about 0.5-2% of the time, so this test appears intermittent. With the
strip removed, this intermittency is solved, since the test passes for all
possible U-Boot variables.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
As described in doc/README.asn1 document the tools/asn1_compiler is used
to "generate bytecode as a C file (*.asn1.[ch]) from *.asn1 file".
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Add the tool to the ignore list to prevent being marked as unversioned.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This code does not really need to use #ifdef. We can use if() instead and
gain build coverage without impacting code size.
Change the #ifdefs to use IS_ENABLED(), etc., instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code does not really need to use #ifdef. We can use if() instead and
gain build coverage without impacting code size.
Change the #ifdefs to use CONFIG_IS_ENABLED() instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code does not really need to use #ifdef. We can use if() instead and
gain build coverage without impacting code size.
Change the #ifdefs to use IS_ENABLED() instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code does not really need to use #ifdef. We can use if() instead and
gain build coverage without impacting code size.
Change the #ifdefs to use IS_ENABLED() instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Most x86 boards that use video make use of 32bpp graphics. Enable this by
default. This fixes missing graphics output on some x86 boards.
Also remove the unnecessary 'default n' while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Enable the ATF in SPL and adjust the SPL STACK/HEAD at the same time to
support ATF entry at 0x40000.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The arch timer needs COUNTER_FREQUENCY to get correct counter, add it to
make the timer works correct.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The omap3_beagle NAND ECC scheme was changed in 4b37928d35 for unknown
reasons, leading to uncorrectible ecc errors. This commit changes it
back to what it was before.
Signed-off-by: Patrik Dahlström <risca@dalakolonin.se>
The board_boot_order() function currenly assumes that the boot source
is MMC/eMMC, but this isn't true for the NAND devices.
This patch cleans up board_boot_order() to check for NAND, SD, ESD,
MMC or EMMC. Anything beyond these are not supported, so it will
default back to the serial downloader if any of those devices are not
available.
Fixes: 9fb50c68da ("ARM: imx6q_logic: Fix MMC2 booting")
Signed-off-by: Adam Ford <aford173@gmail.com>
This fixes commit <91435cd40d30> "ARM: i.MX6: exclude the ARM errata
from i.MX6 UP system"
for nitrogen6x. The above commit removed the errata for the board
since MX6Q/MXDL/MX6S is selected via CONFIG_SYS_EXTRA_OPTIONS
This restores the errata configs.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The Rockchip SPI controller's length register only supports 16-bits,
yielding a maximum length of 64KiB (the CTRLR1 register holds "length -
1"). Trying to transfer more than that (e.g., with a large SPI flash
read) will cause the driver to hang.
Now, it seems that while theoretically we should be able to program
CTRLR1 with 0xffff, and get a 64KiB transfer, but that also seems to
cause the core to choke, so stick with a maximum of 64K - 1 bytes --
i.e., 0xffff.
Note, that the size is further divided into 'minus 1' while writing
into CTRLR1.
This change fixed two different read issues,
1. sf read failure when with > 0x10000
2. Boot from SPI flash failed during spi_flash_read call in
common/spl/spl_spi.c
Observed and Tested in
- Rockpro64 with Gigadevice flash
- ROC-RK3399-PC with Winbond flash
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Static checker warns 'ret' variable may be used uninitialized in
spi_nor_erase() and spi_nor_write() in case of zero length requests.
Fix these warnings by checking for zero length requests and returning
early.
Reported-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
IMX based platforms can have the DCD table located on different
addresses due to differences in their memory maps (ie iMX7ULP).
This information is required by the user to sign the images for secure
boot so continue making it accessible via mkimage.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
Following the README instructions leads to a non-booting
U-Boot:
U-Boot SPL 2020.01-rc3-00070-g9a0cbae22a (Nov 25 2019 - 13:08:24 -0300)
PMIC: PFUZE100 ID=0x10
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Trying to boot from MMC2
(It hangs here)
Use the "imx_4.19.35_1.0.0" ATF branch instead, which
fixes such problem and allow the boot to complete again.
Suggested-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Passing earlycon string in the command line may be
useful during bring up, but not after such phase.
Remove the earlycon string to align with the other i.MX SoCs
command lines.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Currently inside ddr_init() there is a mix of printf() and debug()
level messages.
Since this type of information is useful for debug purposes,
convert all of them to debug level for consistency.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
U-Boot binary has grown in such a way that it goes beyond the reserved
area for the environment variables.
Running "saveenv" followed by a "reset" causes U-Boot to hang because
of this overlap.
Fix this problem by increasing the CONFIG_ENV_OFFSET size.
Also, in order to prevent this same problem to happen in the future,
use CONFIG_BOARD_SIZE_LIMIT, which will detect the overlap in build-time.
CONFIG_BOARD_SIZE_LIMIT does not accept math expressions, so declare
CONFIG_ENV_OFFSET with its direct value instead.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
After the DM conversion the boot SD card is now device 3.
Adjust it so that we can boot the kernel again.
While at it avoid a hardcoded mmc dev inside the finduuid script.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Currently the following hang is observed when booting a imx6sx-sdb
board:
U-Boot 2020.01-rc5-00004-g643366bcd5 (Dec 19 2019 - 14:56:23 -0300)
CPU: Freescale i.MX6SX rev1.0 996 MHz (running at 792 MHz)
CPU: Extended Commercial temperature grade (-20C to 105C) at 32C
Reset cause: POR
Model: Freescale i.MX6 SoloX SDB RevB Board
Board: MX6SX SABRE SDB revA
DRAM: 1 GiB
initcall sequence bffd8514 failed at call 87804cc0 (err=-19)
### ERROR ### Please RESET the board ###
When pmic_get() is used with DM the first parameter must be
the complete node name plus the unit address.
Fix the pmic_get() parameter to fix the boot regression.
Tested on a imx6sx-sdb and imx6q-sabresd boards.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Not all CONFIG_FSL_ESDHC defines were properly replaced with
CONFIG_FSL_ESDHC_IMX, which broke U-boot proper booting on
Colibri iMX6 SoMs.
U-boot is stuck after this message:
Commercial temperature grade DDR3 timings, 64bit bus width.
Trying to boot from MMC1
Fixes: e37ac717d7("Convert to use fsl_esdhc_imx for i.MX platforms")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
The defconfig file for ROC-CC-RK3308 is roc-cc-rk3308_defconfig.
Fixes: 7f08bfb74f ("doc: rockchip: Add documentation for rk3308 based
boards")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When compile the curren mainline linux kernel(Linux 5.5-rc3)
with defconfig, the final Image is 29M, it's much
larger than Linux 5.4.
On the current u-boot side on rk3308, the gap between
kernel and fdt is 25M, the fdt will overwrite kernel
Image, so move ftd to a higher memory to give 34M
gab for them.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
SPL_ROCKCHIP_COMMON_BOARD, an almost identical option, has a title but
this one doesn't for some reason. Add a description to make the menu
easier to read.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Firefly Core-PX30-JD4 use UART2M1 while PX30 evb using UART2M0, the U-Boot
proper will use the dts setting to do the IOMUX init, and a separate dts
is needed for px30-firefly.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The Macro has update without update the defconfig, update the defconfig
to make Mcaro correct.
Fixes: ec4fafdf1f ("rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to...")
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
On a distribution with no python2 installed and no
python->python3 symlink the script will fail to execute.
Specify python3 explicitly as it's already a requirement
to build u-boot.
Signed-off-by: Jack Mitchell <ml@embed.me.uk>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
As per "Table 26-7. SATA PHY Subsystem Low-Level Programming Sequence"
in TRM [1] we need to turn on SATA_PHY_TX before SATA_PHY_RX.
[1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdf
Signed-off-by: Roger Quadros <rogerq@ti.com>
For increased DPLL stability use the settings recommended in
the TRM [1] for PHY_RX registers for SATA and USB.
For SATA we need to use spread spectrum settings even
though we don't have spread spectrum enabled. The
suggested non-spread spectrum settings don't work.
[1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdf
Signed-off-by: Roger Quadros <rogerq@ti.com>
Introduce a mode property in the driver data so that
we don't have to keep using "of_device_is_compatible()"
throughtout the driver.
No functional change.
Signed-off-by: Roger Quadros <rogerq@ti.com>
The AM572x Technical Reference Manual, SPRUHZ6H,
Revised November 2016 [1], shows recommended settings for the
SATA DPLL in Table 26-8. DPLL CLKDCOLDO Recommended Settings.
Use those settings in the driver. The TRM does not show
a value for 20MHz SYS_CLK so we use something close to the
26MHz setting.
[1] - http://www.ti.com/lit/ug/spruhz6h/spruhz6h.pdf
Signed-off-by: Roger Quadros <rogerq@ti.com>
Upstream kernel and rockchip kernel has default enable PSCI which needs
OPTEE in trust word, enable OPTEE support for evb by default and SPL_FIT
option to pack OPTEE with U-Boot proper.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Update the SPL_STACK_R_MALLOC_SIMPLE_LEN which also including space for
STACK and the size may not enough when loding FIT image in SPL.
If the size is not enough, you can see log like this when loding FIT:
U-Boot TPL 2020.01-rc3-00082-g4b19b89ca4-dirty (Dec 05 2019 - 11:52:53)
Trying to boot from BOOTROM
Returning to boot ROM...
U-Boot SPL 2020.01-rc3-00082-g4b19b89ca4-dirty (Dec 05 2019 - 11:52:53 +0800)
Trying to boot from MMC2
And if enable the DEBUG for everyting in SPL, the log will hang at dwmmc
sending CMD16 for 'uboot' loadables binary because this step need a
large stack cost(about 0x2d00).
External data: dst=8400000, offset=72638, size=b3580
Image OS is Trusted Execution Environment
board_fit_config_name_match: rk3288-evb
Selecting config 'rk3288-evb'loadables: 'uboot'
blk_find_device: if_type=6, devnum=1: dwmmc@ff0c0000.blk, 6, 0
blk_find_device: if_type=6, devnum=1: dwmmc@ff0f0000.blk, 6, 1
Sending CMD16
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Instead of hardcode the base address, we can get them from the build
output, eg. get the SYS_TEXT_BASE from .config and get optee base from
DRAM_BASE.
We can use this script for SoCs with DRAM base not from 0x60000000(rk3229
and many other 32bit Rockchip SoCs), eg. rk3288 DRAM base is 0.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
DWC3 support phy interfaces like 8/16-bit UTMI+. phy interface
initialization code would handle them properly along with UNKNOWN
type by default if none of the user/board doesn't need to use the
phy interfaces at all.
The current code is masking the 8/16-bit UTMI+ interface bits globally
which indeed effect the UNKNOWN cases, therefore it effects the platforms
which are not using phy interfaces at all.
So, handle the phy masking bits accordingly on respective interface
type cases.
Fixes: 6b7ebff001 ("usb: dwc3: Add phy interface for dwc3_uboot")
Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Since, commit 62f9b65447 ("common: Move older CPU functions to their own header")
cache ops functions are declared in a separate header. Include the same
to avoid build warnings.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
In the case where one deletes an already-non-existing variable, or sets
a variable to the value it already has, there is no point in writing the
environment back, thus reducing wear on the underlying storage
device.
In the case of redundant environments, if the two environments
differ (e.g. because one is corrupt), make sure that any call of
fw_setenv causes the two to become synchronized, even if the fw_setenv
call does not change anything in the good copy.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Passing 0 to PHY connect used to trigger a MDIO scan due to a bug fixed in
the meantime. It's unclear if bcm-sf2 wants to connect to PHY @ addr 0 or
is scanning the bus, passing -1 here should keep it functional either way.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Cc: Jiandong Zheng <jdzheng@broadcom.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
struct sunxi_prcm_reg is naturally packed. There is no need to define it as
packed. Defining it as packed leads to compilation errors with GCC 9.2.1:
CC arch/arm/lib/reloc_arm_efi.o
arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’:
:qarch/arm/cpu/armv7/sunxi/psci.c:163:21: error: taking address of packed
member of ‘struct sunxi_prcm_reg’ may result in an unaligned pointer value
[-Werror=address-of-packed-member]
163 | sunxi_power_switch(&prcm->cpu_pwr_clamp[cpu], &prcm->cpu_pwroff,
| ^~~~~~~~~~~~~~~~~~~~~~~~~
Remove __packed attribute from struct sunxi_prcm_reg.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Orangepi Zero Plus 2 is an open-source single-board computer, available
in two Allwinner SOC variants, H3 and H5. We add support for H3 variant
here, as the H5 is already supported.
H3 Orangepi Zero Plus 2 has:
- Quad-core Cortex-A7
- 512MB DDR3
- microSD slot and 8GB eMMC
- Debug TTL UART
- HDMI
- Wifi + BT
- OTG + power supply
Sync dts from linux v5.2 commit:
"ARM: dts: sunxi: h3/h5: Remove stale pinctrl-names entry"
(sha1: 75f9a058838be9880afd75c4cb14e1bf4fe34a0b)
Commit:
"ARM: dts: sun8i: h3: Refactor the pinctrl node names"
(sha1: a4dc791974e568a15f7f37131729b1a6912f4811)
has been avoided as it breaks U-Boot build.
Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Compiling with GCC 9.2.1 leads to build errors:
arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’:
arch/arm/cpu/armv7/sunxi/psci.c:144:21: error: taking address of packed
member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer
value [-Werror=address-of-packed-member]
144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff,
| ^~~~~~~~~~~~~~~~~~~~~~~
arch/arm/cpu/armv7/sunxi/psci.c:144:46: error: taking address of packed
member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer
value [-Werror=address-of-packed-member]
144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff,
| ^~~~~~~~~~~~~~~~~~~~
Use memcpy() and void* pointers to resolve the problem caused by packing
the struct sunxi_cpucfg_reg.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
This patch is only a temporarily workaround for crash introduced by
commit ac9cd4805c ("bootstage: Correct relocation algorithm").
The crash occurs because the bootstage struct is not correctly aligned
when BOOTSTAGE feature is activated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
Activate by default the command CLS (clear screen);
this command used in pxe or sysboot command (DISTRO support)
when the "menu background" keyword is present.
This patch avoid the warning "Unknown command 'cls'"
with extlinux.conf:
# Generic Distro Configuration file generated by OpenEmbedded
menu title Select the boot mode
MENU BACKGROUND /splash.bmp
TIMEOUT 20
DEFAULT stm32mp157c-ev1-emmc
LABEL stm32mp157c-ev1-emmc
KERNEL /uImage
FDT /stm32mp157c-ev1.dtb
APPEND root=/dev/mmcblk1p4 rootwait rw console=ttySTM0,115200
...
Retrieving file: /mmc0_stm32mp157c-ev1_extlinux/extlinux.conf
614 bytes read in 36 ms (16.6 KiB/s)
Retrieving file: /splash.bmp
46180 bytes read in 40 ms (1.1 MiB/s)
Unknown command 'cls' - try 'help'
Select the boot mode
1: stm32mp157c-ev1-sdcard
...
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
With commit 37db55b7e9 ("linux/types.h: fix typo unchar") we have a
duplicate typedef for uchar. As linux/types.h is included in common.h we
don't need another typedef for uchar there.
Fixes: 37db55b7e9 ("linux/types.h: fix typo unchar")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Describe that a signature node can be added to a binary device tree using
the mkimage tool.
Provide an example device tree node.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Commit 656d8da9d2 (doc: Remove duplicated documentation directory) got
rid of most of Documentation/. But there's still an obviously useless
.gitignore left behind.
Also, there's a copy of the linux kernel's net/ethernet.txt binding
imported from v5.0, while the existing one in doc/ is from 4.0-rc1. So
replace the latter by the former, and making Documentation/ finally
empty.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
commit 3b3e8a37d3
("arm: dts: am335x: sync cpsw/mdio/phy with latest linux - drop phy_id")
did sync with recent linux kernel and replaced therefore the 'phy_id'
property with a phy-handle pointing to the mdio.
This is OK for linux, but introduces trouble with the already running
vxWorks on this target.
So this commit here re-inerts the phy_id property beside the phy-handle
property to be compatible with both.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
i2c bugfixes for 2020.01
- i2c: i2c_cdns: fix write timeout on fifo boundary
fixes timout issue when writting number of bytes is multiple
of the FIFO depth.
- First set of u-boot-atmel fixes for 2020.01 cycle:
This set includes a small fix for gpio bank names, one for removing
unused headers (also touches some other boards), and a fix for the QSPI
env read on one of the boards.
The rpi_4_32b_defconfig states that only one DRAM bank is present. This
leads to a wrong configuration of the available DRAM. Fix this by
setting the DRAM bank config accordingly.
Fixes: 193279d784 ("RPI: Add defconfigs for rpi4 (32/64)")
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Up to now we only update the DRAM banks when we are define
CONFIG_BCM2711. But our one binary approach uses a config that supports
BCM2837 and BCM2711. As a result we only see one gibibyte of RAM on
Raspberry Pi 4, even if it has more RAM.
Fix this by calling dram_init_banksize.
Fixes: 5694090670 ("ARM: defconfig: add unified config for RPi3 and RPi4")
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
To update the dram bank information from device-tree we use
fdtdec_decode_ram_size() which expectes the the size-cells and
address-cells to be defined in the memory node. For normal system RAM
these values are defined in the root node. When the values differ from
the default values defined in the spec, we can end up with wrong RAM
bank information.
Switch to the "standard" way to update the RAM bank information to
avoid this.
Fixes: 9de5b89e4c ("rpi4: enable dram bank initialization")
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
This fixes an issue that would cause I2C writes to timeout when the
number of bytes is a multiple of the FIFO depth (i.e. 16 bytes).
Within the transfer loop, after writing the data register with a new
byte to transfer, if the transfer size equals the FIFO depth, the loop
pauses until the INTERRUPT_COMP bit asserts to indicate data has been
sent. This same check is performed after the loop as well to ensure data
has been transferred prior to returning.
In the case where the amount of data to be written is a multiple of the
FIFO depth, the transfer loop would wait for the INTERRUPT_COMP bit to
assert after writing the final byte, and then wait for this bit to
assert once more. However, since the transfer has finished at this
point, no new data has been written to the data register, and hence
INTERRUPT_COMP will never assert.
Fix this by only waiting for INTERRUPT_COMP in the transfer loop if
there's still data to be written.
Signed-off-by: Michael Auchter <michael.auchter@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- fix crash and board reset when drawing RLE8 bitmaps
bigger than the framebuffer resolution
- reduce dead code in video and console uclass routines
(tested on mx53cx9020, sama5d2_xplained, stm32mp157c-ev1,
stm32f746-disco, stm32f769-disco and wandboard)
In the initial SPI flash setup, the default bus mode being used was 3,
which is incorrect, causing a CRC error when the ENV was being read from
QSPI. Setting the default bus mode to 0 which is the correct mode.
Signed-off-by: Swapna Gurumani <swapna.gurumani@microchip.com>
- Increase stack size to avoid a stack overflow during distro boot.
- Add hifive-unleashed-a00.dts for SIFIVE FU540.
- Add OF_SEPARATE support for SIFIVE FU540.
- Add SPL support for Andes AX25 AE350.
- Improve U-Boot SPL / OpenSBI smp boot flow for RISC-V.
At the start, OpenSBI relocates itself to its link address. If the link
address ranges of U-Boot SPL and OpenSBI overlap, the relocation can
lead to code corruption if a hart is still running U-Boot SPL during
relocation. To avoid this problem, the main hart is specified as the
preferred boot hart to perform the relocation. This fixes the code
corruption problems based on the assumption that since the main hart
schedules the secondary harts to enter OpenSBI, it will be the last to
enter OpenSBI. However it was reported that this assumption is not
always correct.
To make sure the assumption always holds true, wait for all secondary
harts to acknowledge the call-function request before entering OpenSBI
on the main hart.
Reported-by: Rick Chen <rick@andestech.com>
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Add a wait option to smp_call_function() to wait for the secondary harts
to acknowledge the call-function request. The request is considered to
be acknowledged once each secondary hart has cleared the corresponding
IPI.
As part of the call-function request, the secondary harts invalidate the
instruction cache after clearing the IPI. This adds a delay between
acknowledgment (clear IPI) and fulfillment (call function) of the
request. We want to use the acknowledgment to be able to judge when the
request has been completed. Remove the delay by clearing the IPI after
cache invalidation and just before calling the function from the
request.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Add the function riscv_get_ipi() for reading the pending status of IPIs.
The supported controllers are Andes' Platform Level Interrupt Controller
(PLIC), the Supervisor Binary Interface (SBI), and SiFive's Core Local
Interruptor (CLINT).
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
OpenSBI uses a relocation lottery to determine the hart to relocate
OpenSBI to its link address. In the U-Boot SPL boot flow, the main hart
schedules the secondary harts to enter OpenSBI before doing so itself.
One of the secondary harts will therefore always be the winner of the
relocation lottery. This is problematic if the link address ranges of
OpenSBI and U-Boot SPL overlap. OpenSBI will be relocated and therefore
overwrite U-Boot SPL while some harts may still run it, leading to code
corruption.
Avoid this problem by specifying the main hart as the preferred boot
hart to perform the OpenSBI relocation. The main hart will be the last
hart to enter OpenSBI, relocation can therefore occur safely.
The boot hart field was added to version 2 of the OpenSBI FW_DYNAMIC
info structure. The header file include/opensbi.h is synchronized with
include/sbi/fw_dynamic.h from the OpenSBI project to update the info
structure. The header file is recent as of commit
7a13beb21326 ("firmware: Add preferred boot HART field in struct
fw_dynamic_info").
Reported-by: Rick Chen <rick@andestech.com>
Suggested-by: Anup Patel <Anup.Patel@wdc.com>
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
For RV64, it will use sd instruction to clear t0
register, and the increament will be 8 bytes. So
if the difference between__bss_strat and __bss_end
was not 8 bytes aligned, the clear bss loop will
overflow and acks like system hang.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
The mcache_ctl csr only can be manipulated in M mode.
Add SPL_RISCV_MMODE for U-Boot SPL to control cache
operation.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
Fix two wrong settings of andes plic driver as below:
1. Fix wrong pending register base definition.
2. Declaring the en variable in enable_ipi() as unsigned int instead of
int can help to fix wrong plic enabling setting in RV64.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
To get memory size from device tree instead of
get_ram_size(). This can avoid memory access fault
in U-Boot proper after PMP configurations in OpenSBI.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
This patch provides four configurations which can support U-Boot SPL
to boot from RAM or FLASH and then boot FIT image including OpenSBI
FW_DYNAMIC firmware and U-Boot proper images from RAM or MMC boot devices.
With ae350_rv[32|64]_spl_defconfigs:
U-Boot SPL will be loaded by gdb or FSBL and runs in RAM in machine mode
and then load FIT image from RAM device on AE350.
With ae350_rv[32|64]_spl_xip_defconfigs:
U-Boot SPL can be burned into SPI flash and run in flash in machine mode
and then load FIT image from SPI flash or MMC device on AE350.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
The U-Boot SPL will boot in M mode and load the FIT image which
include OpenSBI and U-Boot proper images. After loading progress,
it will jump to OpenSBI first and then U-Boot proper which will
run in S mode.
Also remove V5L2_CACHE due to U-Boot SPL code size consideration.
Without this concern, it can be enable manually for performance.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
This would help to make the necessary changes in drivers and device trees
in U-Boot tree itself. This feature would also be helpful to not pass
dtb during opensbi builds.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Rick Chen <rick@andestech.com>
Sync the hifive-unleashed-a00 dts from Linux with
below commit details:
commit <2993c9b04e616df0848b655d7202a707a70fc876> ("riscv: dts: HiFive
Unleashed: add default chosen/stdout-path")
Idea is to periodically sync the dts from Linux instead of
tweaking internal changes one after another, so better not
add any intermediate changes in between. This would help to
maintain the dts files easy and meaningful since we are
reusing device tree files from Linux.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
This fixes a problem, where booting Linux using distro boot will
sometimes lead to an invalid instruction exception on the main hart. The
secondary harts are not affected and boot Linux successfully. The root
cause of this problem is a stack overflow on the main hart.
With distro boot, the current default stack size of 8KiB on RISC-V is
not sufficient and will cause a stack overflow. The stacks are allocated
sequentially. In the case of a stack overflow the stack of the main hart
can reach into that of another hart and be corrupted.
The stack overflow previously did not cause any problems, because only
stack frames, which are not used anymore since the hart enters Linux,
were corrupted. Starting with GCC 9, the stack usage has decreased. Now,
only the most recent stack frame overflows into the stack of a secondary
hart and is corrupted. The illegal instruction exception is caused by
the secondary hart overwriting the return address in the stack frame of
the main hart with an address that does not include valid code.
Increase the default stack size of each hart to 16KiB to avoid this
problem.
Reported-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Tested-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Rick Chen <rick@andestech.com>
The commit 1b42ab3eda ("ARM: DRA7: Fixup DSPEVE, IVA and GPU clock
frequencies based on OPP") added the core logic to update the kernel
device-tree blob to adjust the DSP, IVA and GPU DPLL clocks based on
a one-time OPP choice selected in U-Boot for most of the DRA7xx/AM57xx
family of SoCs.
The DSPs on DRA76xP/DRA77xP SoCs (DRA76x ACD package SoCs) though
provide a higher performance and can run at a higher clock frequency
of 850 MHz at OPP_HIGH instead of 750 MHz. Fix up the logic to use the
correct clock rates on these SoCs. Note that this higher clock rate is
not applicable to other Jacinto 6 Plus SoCs (DRA75xP/DRA74xP SoCs or
AM574x SoCs) that follow the ABZ package.
Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
On NixOS, cross compiled kernels have long suffixes that cause them to
exceed the current maximum path length. The PXE/TFTP max path length is
used for extlinux.conf support as well, which is where this problem
usually manifest's itself.
Signed-off-by: Ben Wolsieffer <benwolsieffer@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Enable configs related to DMA and Ethernet so as to support networking at
U-Boot prompt
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Add DT nodes related to DMA and CPSW to -u-boot.dtsi to get networking
up on J721e EVM.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Get flow ID information for RX DMA channel using dma_get_cfg() interface
instead of reading from DT. This is required in order to avoid DT update
whenever there is change in the range of flow ID allocated to the host.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Implement dma_get_cfg() interface to pass flow id information for DMA
clients to use. This is needed because on K3 SoCs, CPSW (ethernet) and
UDMA (DMA provider) support "flows" within a given RX DMA channel. This
allows different network packets to be segregated while using same RX
DMA channel. In order for basic ethernet to work, CPSW slave must be
aware of the flow ID allocated for the RX channel by the DMA driver.
This interface allows CPSW to query flow ID from DMA provider and
configure it in CPSW HW.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Sometimes, there would be a need to exchange data between DMA provider
and DMA client which are very specific to DMA driver of the SoC/platform
and are not generic enough to be put into struct dma. Therefore, introduce
dma_get_cfg() interface to get DMA provider specific data from client
device. Clients can use unique configuration ID flags to get different
configuration data from DMA driver.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
This bus is used to access internal SoC PHYs. These PHYs are configured
by the ENETC driver directly, but it's useful to have command line access
to this MDIO to debug the system especially when using new external PHYs.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
On some boards MDIO may get stuck if it detects echo on the line. This is
a know hardware issue, there is a board fix for it. In case we're running
on a board that doesn't have the fix, we don't want to loop here forever
and freeze U-Boot.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This reduces the time needed to establish a link as we don't reset the link
each time the interface is used. Our Link capabilities do not change at
run-time so there is no need to re-apply PHY configuration each time.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The original code enabled link speeds up to 1Gbps, but the interface can
go up to 2.5G, enable that speed to in PHY AN mask.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The function connects an ethernet device to a PHY using DT information.
This API is only available for eth devices with an associated device tree
node.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Renamed dm_mdio_phy_connect arguments dev to mdiodev and addr to phyaddr
for a bit more clarity and consistency with the following patches.
Also use NULL instead of 0 on error return path.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Commit b618b37076 ("net: Convert CONFIG_TFTP_BLOCKSIZE to Kconfig")
accidentally set the default *option* TFTP block size to 512 bytes, even
though the comment in the code says that this is a terrible choice. Most
boards didn't define the symbol before, so they got the default block size
of 1468 bytes before, but now use 512 bytes, which is also the fallback.
This leads to both abysmal performance and a lot of hashes printed
on the screen (one character for every 5K), which is both annoying and
slow over serial links.
Set the default block size in Kconfig back to the value it had before.
This improves TFTP performance from 2.8 MB/s to 6.9 MB/s on a Pine64.
Fixes: b618b37076 ("net: Convert CONFIG_TFTP_BLOCKSIZE to Kconfig")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
A couple of optional properties have been introduced for Aquantia PHY
allowing the driver to set up wiring related configuration points that
are otherwise driven by firmware.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
It defines that PHY nodes must be children on MDIO bus nodes and defines
the only required property in U-Boot, reg. This property along with the
example provided are copied over from Linux.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
In some cases the link on the system interface of the aquantia PHY comes up
after the link on line interface. The link state loop only checks the line
side, which may result in first packet sent being lost.
Use aquantia_link_is_up instead, which checks both system and line side on
gen 2/3 PHYs to avoid losing the 1st packet.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Aquantia PHYs have a SMBus interface mostly used for debug. The addresses
on this interface are normally set up by PHY firmware, but depending on the
board they may end up not being unique. Add an optional DT property used
to change SMBus address if needed.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
MDI pins up to the RJ45 connector may be reversed on the board and the
default PHY configuration applied by firmware may or may not match that.
Add an optional DT property to configure MDI reversal for this case.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
If PHY is not ready for data by the time _config is called, reconfigure the
PHY system interface to use the proper protocol based on phydev->interface,
just in case the defaults set by PHY firmware don't match current
configuration.
Signed-off-by: Florin Laurentiu Chiculita <florinlaurentiu.chiculita@nxp.com>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Uses the data field in phy_driver structure to identify the PHY generation.
This is useful for custom configuration as non-generic PHY registers are
not 100% compatible between generations.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The PHY supports XFI and USXGMII, the notable difference being that USX AN
is enabled for USXGMII. Legacy code uses XGMII for any 10G proto and
detects whether USX AN should be enabled or not using a PHY status
register. Keep that functionality too, so we don't break existing drivers.
Signed-off-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This is useful to carry custom information between the driver structure
associated with a specific HW and the driver code.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Drivers currently use XGMII for XFI and USXGMII and, where needed, use
other information to identify the actual protocol on the board. With these
two defined drivers can now rely on DT phy-mode property.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
On mv88E6071 the 'EDet' field offset, width and sense control
bits are different, adjust the driver to init the PHY control
register as needed. This fixes not working link detection and
tftp transfers.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
On 88E6071 chip the port status register bit field offsets
for duplex and link bits differ. Extend the driver to use
88E6071 specific offset values. The width of bit fields for
speed status differ, too. Adapt for proper port speed
detection on 88E6071.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Extend the driver to init switch register offsets from variables
instead of compile time macros and enable detection of 88E6071 and
compatible devices. Ethernet transfer (e.g. tftp) does not work yet,
so enable the registration of the 'indirect mii' bus for easier PHY
register access by 'mii' command.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The KSZ8081 PHY has a factory test mode which is set at the de-assertion
of the reset line based on the RXER (KSZ8081RNA/RND) or TXC
(KSZ8081MNX/RNB) pin. If a pull-down is missing, or if the pin has a
pull-up, the factory test mode should be cleared by manually writing a 0
(according to the datasheet).
Create another ksz8081_config function to handle this case.
Suggested-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
device_probe() may fail in which case the seq_id will be -1. Don't
display these devices during startup. While this is only a cosmetic
change, the return value of eth_initialize() will also change to the
actual number of available devices. The return value is only used in
spl_net to decide whether there are any devices to boot from. So
returning only available devices is also more correct in that case.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Aquantia quad-phys may take longer to initialize. This commit adds
a polling mechanism for a global alarm bit that tells if phy init
sequence is completed.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This allows passing arbitrary addresses through macb_miiphy_read and
macb_miiphy_write, therefore enabling the mii command to access
all mdio bus devices instead of only the defined phy.
Signed-off-by: Josef Holzmayr <holzmayr@rsi-elektrotechnik.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
To support accessing arbitrary addresses the mii/mdio bus it is
necessary that the macb_mdio_read and macb_mdio_write functions
do not implicitly use the address of the connected phy.
The function signature is extended according to the Linux kernel
equivalent.
Signed-off-by: Josef Holzmayr <holzmayr@rsi-elektrotechnik.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
I've noticed that in most cases when genphy_update_link() is called, the
ethernet driver (mt7628-eth in this case) fails with the first ethernet
packets. Resulting in a timeout of the first tftp command. Increasing
the delay in the link check look from 1 to 50 ms and moving it below the
BMSR register read fixes this issue, resulting in a stable ethernet
traffic, even after initial link autonogotiation.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* Add Kconfig help describing the purpose of each command.
* Add CONFIG_CMD_MDIO so it could be selected individually, as
it doesn't depend on the mii command.
* Add Kconfig imply to mii to automatically select the mdio
command.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This version of the RTL-8168 chip can be found on some add-in cards sold
by CSL-Computer GmbH & Co. KG. The chip isn't special in any way, but it
needs to have the ChipCmd register programmed after the DMA descriptors
have been set up, so make sure that happens by adding an entry to the
chip information table.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This commit ports mvpp2 to use the recently introduced Marvell MDIO
(MVMDIO) driver. It removes direct interaction with the SMI & XSMI
busses. This commit is based in part on earlier work by
Ken Ma <make@marvell.com> in Marvell's own downstream repo:
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/c81dc39.
The above refrenced work was based on an MVMDIO implementation that
never made it into U-Boot. With this patch the mvpp2 driver switches
to use the new MVMDIO driver that is based on a more universal
mdio-uclass implementation.
Signed-off-by: Nevo Hed <nhed+github@starry.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
If the phy doesn't match with any existing u-boot drivers, the phy
framework will connect it to the generic one which uid ==
0xffffffff. In this case, act as if the phy wouldn't be declared in
dts. Otherwise, in case of 3310 (for which the driver doesn't exist)
the link is marked as always down. Removing phy entry from dts in case
of 3310 is not a good option because it is required for the
phy_fw_down procedure.
This patch fixes the issue with the link always down on MCBIN board.
nhed: added NULL deref test.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Tested-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Nevo Hed <nhed+github@starry.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Issue:
- Network stuck if autonegotion fails.
Issue root cause:
- When autonegotiation fails during port open procedure, the packet
processor configuration does not finish and open procedure exits
with error.
- However, this doesn't prevent u-boot network framework from
calling send and receive procedures.
- Using transmit and receive functions of misconfigured packet
processor will cause traffic to get stuck.
Fix:
- Continue packet processor configuration even if autonegotiation
fails. Only error message is triggered in this case.
- Exit transmit and receive functions if there is no PHY link
indication.
- U-boot network framework now calls open procedure again during next
transmit initiation.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Tested-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The AM654 SoC doesn't allow to disabling RGMII TX internal delay in CPSW2G
MAC. Hence, change CPSW2G interface mode to "rgmii-rxid" - RGMII with
internal RX delay provided by the PHY, the MAC will add an TX delay in this
case.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Refactor SGMII configuration to group all settings together and reduce
number of MDIO transactions.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Based on commit 27708eb5481b ("net: phy: dp83867: IO impedance is not
dependent on RGMII delay") of mainline linux kernel.
The driver would only set the IO impedance value when RGMII internal delays
were enabled. There is no reason for this. Move the IO impedance block
out of the RGMII delay block.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Based on commit c11669a2757e ("net: phy: dp83867: Rework delay rgmii delay
handling") of mainline linux kernel.
The current code is assuming the reset default of the delay control
register was to have delay disabled. This is what the datasheet shows as
the register's initial value. However, that's not actually true: the
default is controlled by the PHY's pin strapping.
This patch:
- insures the other direction's delay is disabled If the interface mode is
selected as RX or TX delay only
- validates the delay values and fail if they are not in range
- checks if the board is strapped to have a delay and is configured to use
"rgmii" mode and warning is generated that "rgmii-id" should have been
used.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Based on commit 13c83cf8af0d ("net: phy: dp83867: Add ability to disable
output clock") of mainline linux kernel.
Generally, the output clock pin is only used for testing and only serves as
a source of RF noise after this. It could be used to daisy-chain PHYs, but
this is uncommon. Since the PHY can disable the output, make doing so an
option. I do this by adding another enumeration to the allowed values of
ti,clk-output-sel.
The code was not using the value DP83867_CLK_O_SEL_REF_CLK as one might
expect: to select the REF_CLK as the output. Rather it meant "keep clock
output setting as is", which, depending on PHY strapping, might not be
outputting REF_CLK.
Change this so DP83867_CLK_O_SEL_REF_CLK means enable REF_CLK output.
Omitting the property will leave the setting as is (which was the previous
behavior in this case).
Out of range values were silently converted into DP83867_CLK_O_SEL_REF_CLK.
Change this so they generate an error.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Based on commit 980066e6d964 ("dt-bindings: phy: dp83867: Add documentation
for disabling clock output") of mainline linux kernel.
The clock output is generally only used for testing and development and not
used to daisy-chain PHYs. It's just a source of RF noise afterward.
Add a mux value for "off". I've added it as another enumeration to the
output property. In the actual PHY, the mux and the output enable are
independently controllable. However, it doesn't seem useful to be able
to describe the mux setting when the output is disabled.
Document that PHY's default setting will be left as is if the property
is omitted.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The driver ti.c is actually driver for TI DP83867x PHYs, so rename it
accordingly.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
During testing of qemu-riscv32 with a 2GiB memory configuration,
tftp always fails with a error message:
Load address: 0x84000000
Loading: #
TFTP error: trying to overwrite reserved memory...
It turns out the result of 'tftp_load_addr + tftp_load_size' just
overflows (0x100000000) and the test logic in store_block() fails.
Fix this by adjusting the end address to ULONG_MAX when overflow
is detected.
Fixes: a156c47e39 ("tftp: prevent overwriting reserved memory")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
sandbox_defconfig does not compile using GCC 9.2.1:
net/net.c: In function ‘net_process_received_packet’:
net/net.c:1288:23: error: taking address of packed member of ‘struct
ip_udp_hdr’ may result in an unaligned pointer value
[-Werror=address-of-packed-member]
1288 | sumptr = (ushort *)&(ip->udp_src);
| ^~~~~~~~~~~~~~
Avoid the error by using a u8 pointer instead of an u16 pointer and
in-lining ntohs().
Simplify the checksumming of the last message byte.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Fix 'mask' calculation in phy_connect() for phy addr '0'.
'mask' is getting set to '0xffffffff' for phy addr '0'
in phy_connect() whereas expected value is '0'.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reported-by: tetsu-aoki via github
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
While we have networking use cases within SPL we do not support loading
files via NFS at this point in time. Disable calling nfs_start() so
that the NFS related code can be garbage collected at link time.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Even if not communicating over the network in U-Boot, code may be manipulating
and storing IP or MAC addresses to pass to Linux, etc.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Part of the env cleanup moved this out of the environment code and into
the net code. However, this helper is sometimes needed even when the net
stack isn't included.
Move the helper to lib/net_utils.c like it's similarly-purposed
string_to_ip(). Also rename the moved function to similar naming.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reported-by: Ondrej Jirman <megous@megous.com>
In GCC 9 support for the Armv5 and Armv5E architectures (which have no
known implementations) has been removed, cf.
https://gcc.gnu.org/gcc-9/changes.html
Commit 16540d07fd ("arm: fix -march for ARM11") changed the value of the
compiler flag from -march=armv5 and -march=armv5t into -march=armv6 for
ARM11.
The values prior to this patch were:
arch-$(CONFIG_CPU_ARM1136) =-march=armv5
arch-$(CONFIG_CPU_ARM1176) =-march=armv5t
The change lead to a regression with the Raspberry Pi Zero W not booting
anymore.
Use -march=armv5t both for ARM1136 and ARM1176.
Fixes: 16540d07fd ("arm: fix -march for ARM11")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Joris Offouga <offougajoris@gmail.com>
unsigned char should be called uchar and not unchar.
This fixes a build error in lib/crypto/x509_cert_parser.c.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Fixes for 2020.01
-----------------
- imx8qxp_mek: increase buffer sizes and args number
- Fixes for imx7ulp
- imx8mm: Fix the first root clock in imx8mm_ahb_sels[]
- colibri_imx7: reserve DDR memory for Cortex-M4
- vining2000: fixes and convert to ethernet DM
- imx8m: fix rom version check to unbreak some B0 chips
- tbs2910: Disable VxWorks image booting support
Recently the version check was improved to be able to determine that
we're running on SoC revision 2.1. A check for B0 was tightened so
that it now must equal 0x20 instead of being bigger than 0x20. On
some B0 chips the value returned is 0x1020 instead of 0x20. This
means even though it's B0, the check will fail and code relying on
the correct chip revision will make wrong decisions. There is no
documentation of those bits, but it seems that NXP always uses a
byte to encode the revision. Thus remove the upper bits to fix the
regression.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
You can directly specify the label as the operand for ljmp.
This commit saves 4-byte code.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed the gas warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This file defines 'a32' and 'o32' macros to avoid magic numbers
of operand/address-size prefixing.
GAS supports 'data32' and 'addr32' for that purpose.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
- Allow for the sysboot command, which is used to parse extlinux.conf
files to be used without PXE support. There is no functional change
here aside from fixing distro boot in a few cases where we actually
lacked the ability to parse the extlinux.conf file
- Add the x509/pkcs7 parsers from Linux, a pre-requisite to EFI Secure
Boot support.
With the change to make tools/version.h a file we need to make sure that
the output directory exists first otherwise we will get a build failure.
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Fixes: 4d90f6cd98 ("tools: Avoid creating symbolic links for tools/version.h")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This test will exercise asn1 compiler as well as asn1 decoder functions
via various parsers.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Imported from linux kernel v5.3:
pkcs7.asn1 without changes
pkcs7.h with changes marked as __UBOOT__
pkcs7_parser.h without changes
pkcs7_parser.c with changes marked as __UBOOT__
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Imported from linux kernel v5.3:
x509.asn1 without changes
x509_akid.asn1 without changes
x509_parser.h without changes
x509_cert_parser.c with changes marked as __UBOOT__
x509_public_key.c with changes marked as __UBOOT__
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Imported from linux kernel v5.3:
rsapubkey.asn1 without changes
rsa.h without changes
rsa_helper.c with changes marked as __UBOOT__
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Imported from linux kernel v5.3:
asymmetric-type.h with changes marked as __UBOOT__
asymmetric_type.c with changes marked as __UBOOT__
public_key.h with changes marked as __UBOOT__
public_key.c with changes marked as __UBOOT__
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Imported from linux kernel v5.3:
build_OID_registry without changes
oid_registry.h without changes
oid_registry.c with changes marked as __UBOOT__
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Imported from linux kernel v5.3:
asn1.h without changes
asn1_ber_bytecode.h without changes
asn1_decoder.h without changes
asn1_compiler.c without changes
This host command will be used to create a ASN1 parser, for example,
for pkcs7 messages or x509 certificates. More specifically, it will
generate *byte code* which will be interpreted by asn1 decoder library.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Adding "printk.h" will help improve portability from linux kernel
code (in my case, lib/asn1_decoder.c and others) where printf and
pr_* variant functions are used.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
This function will be used in lib/crypto/x509_cert_parser.c, which
will also be imported from linux code in a later commit.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
In the next commit, rtc_mktime(), for compatibility with linux, will be
implemented using rtc_mktime(), which is no longer drivers/rtc specific.
So move this file under lib/.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
linux_compat.c is the best place for kmemdup(), which is currenly used
only in ubifs.c, but will also be used when other kernel files
(in my case, lib/crypto/x509_cert_parser.c and pkcs7_parser.c) will be
imported. So just move it.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Extract all sysboot command related code from pxe.c to new sysboot.c
Update Kconfig to insure that DISTRO_DEFAULT select new CMD_SYSBOOT
command.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
As sysboot and pxe commands are sharing piece of code, migrate this
common code into a new file pxe_utils.c to prepare sysboot command
code extraction from pxe.c
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Many boards do not use all selected framebuffer depth
configurations, for such boards there is some unused
code in video and console uclass routines. Make depth
specific code optional to avoid dead code and slightly
reduce binary size. Also make ANSI code optional for
the same reason. When i.e. using only VIDEO_BPP16 the
code size shrinks (below values when using gcc-7.3.0):
$ ./tools/buildman/buildman -b video-wip -sS wandboard
...
01: Merge git://git.denx.de/u-boot-sh
02: video: add guards around 16bpp/32bbp code
03: video: make BPP and ANSI configs optional
arm: (for 1/1 boards) all -776.0 bss -8.0 text -768.0
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Many boards use only single depth configuration, for such boards
there is some unused code in video and console uclass routines.
Add guards to avoid dead code.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
- rockchip pwm driver update to support all the SoCs
- RK3308 GMAC and pinctrl support
- More UART interface support on PX30 and pmugrf reg fix
- Fixup on misc for eth_addr/serial#
- Other updates on variant SoCs
Due to the (seemingly bogus) assumption of a default
CONFIG_SYS_UBOOT_START value we will revert this change for now and
evaluate it again for the next release along with changes to
CONFIG_SYS_UBOOT_START.
This reverts commit d3e97b53c1.
Signed-off-by: Tom Rini <trini@konsulko.com>
The default value of CONFIG_SYS_CBSIZE is too small when we need
to input long commands or when using long kernel command line.
The default value of CONFIG_SYS_MAXARGS is too small to add a long
command line, and the kernel might not boot as intended without the
complete bootargs. Increase argument buffer sizes and the number of
arguments.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The 24MHz oscillator clock is referenced by "clock-osc-24m" and not
"osc_24m".
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The board has both VDD_SOC_IN and VDD_ARM_IN rails connected to the same
PMIC rail, align the LDO voltages to avoid leaking inside the MX6SX SoC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
Ever since the conversion to DM PCI, the board was missing the PCIe DT
nodes, hence the PCI did not really work. Fill in the DT nodes and add
missing PCIe device reset.
Moreover, bring the PCIe power domain up before booting Linux. This is
mandatory to keep old broken vendor kernels working, as they do not do
so and depend on the bootloader to bring the power domain up.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
The fitImage support was enabled in the downstream U-Boot port and the
kernel images on the device are fitImage, yet this functionality is not
enabled in mainline U-Boot. Enable it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
Convert the board to ethernet DM support. Adjust board file accordingly,
as the board_eth_init() contains custom clock configuration required for
this board to work. Furthermore, enable FEC1 clock to make FEC1 work as
well.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
Enable DRAM calibration in SPL to improve behavior of the board
in edge conditions of the thermal envelope of the board and make
it even more stable.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
In preparation for use of DDR DRAM fine-tuning upon boot,
convert the board to SPL framework instead of using DCD
tables to bring up DRAM and pinmux.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
Make the PMU LDO configuration interface available to board code,
so that board code can reconfigure the internal LDOs of the SoC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Eric Nelson <eric@nelint.com>
i.MX 7's Cortex-M4 core can run from DDR and uses DDR memory for
the rpmsg communication. Both use cases need a fixed location of
memory reserved. For the rpmsg use case the reserved area needs
to be in sync with the kernel's hardcoded vring descriptor location.
Use the linux,usable-memory property to carve out 1MB of memory
in case the M4 core is running. Also make sure that the i.MX 7
specific rpmsg driver does not get loaded in case we do not carve
out memory.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
U-Boot binary has grown in such a way that it goes beyond the reserved
area for the environment variables.
Running "saveenv" followed by a "reset" causes U-Boot to hang because
of this overlap.
Fix this problem by increasing the CONFIG_ENV_OFFSET size.
Also, in order to prevent this same problem in the future, use
CONFIG_BOARD_SIZE_LIMIT, which will detect the overlap in build-time.
CONFIG_BOARD_SIZE_LIMIT does not accept math expressions, so declare
CONFIG_ENV_OFFSET with its direct value instead.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Pierre-Jean Texier <pjtexier@koncepto.io>
Tested-by: Pierre-Jean Texier <pjtexier@koncepto.io>
Acked-by: Joris Offouga <offougajoris@gmail.com>
Tested-by: Joris Offouga <offougajoris@gmail.com>
The NoC registers on i.MX6QP needs to be configured, otherwise some
usecases in the kernel behave incorrectly, such as rotation and resize.
Currently the NoC registers are not configured in the kernel, so
configure them in U-Boot like it is done in the NXP U-Boot tree.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Sync the mx7ulp device tree related files with the one from
NXP U-Boot vendor tree (imx_v2019.04_4.19.35_1.0.0).
The mainline support for i.MX7ULP is very premature at this stage.
We should probably re-sync with mainline Linux dts when it gets
in better shape, but for now sync with the U-Boot vendor code.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
The LDOVL definitions is common to all the modes, not only RUN mode,
so in order to avoid confusion, remove the _RUN notation from the PMC1
LDOVL definitions.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Introduce the CONFIG_LDO_ENABLED_MODE option so that i.MX7ULP boards
designed to operate with LDO enabled mode can work with 0.95V at LDO
output in RUN mode as per the datasheet.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
As per the i.MX7ULP datasheet, it can boot in LDO enabled mode
or LDO bypass mode.
Print the LDO mode status in the U-Boot log for convenience.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
In case the BMP size is bigger than the frame buffer, don't use
the BMP's width and height in video_display_rle8_bitmap, but the
one's checked in video_bmp_display() as parameters to
video_display_rle8_bitmap().
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
CC: Yannick Fertré <yannick.fertre@st.com>
Convert panel_picture_delta and axis_alignment from unsigned long
to long to insure to store correctly the difference between
panel_size and picture_size in case the panel_size is smaller
than picture_size.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
CC: Yannick Fertré <yannick.fertre@st.com>
[agust: change axis_alignment to long]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Recent versions of the Linux kernel with many options enabled have
grown large enough to overwrite the beginning of the initrd. For
example, the kernel I use on my Rock64 and RockPro64 is 34.1 MiB,
while only 31.5 MiB are available between kernel_addr_r and
ramdisk_addr_r.
This patch moves ramdisk_addr_r up by 32 MiB on the RK3328 and RK3399,
allowing for much larger kernels.
Signed-off-by: Ben Wolsieffer <benwolsieffer@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
An iomux register contains 8 pins, each of which is represented
by 2 bits, but the register offset is 0x8.
For example, GRF_GPIO0A_IOMUX offset is 0x0, but GRF_GPIO0B_IOMUX
offset is 0x8, the offset 0x4 is reserved.
So add a type IOMUX_8WIDTH_2BIT to calculate offset.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This PWM driver can be used to support pwm functions
for on all Rockchip Socs.
The previous chips than RK3288 did not support polarity,
and register layout was different from the RK3288 PWM.
The RK3288 keep the current functions.
RK3328 and the chips after it, which can support hardware lock,
configure duty, period and polarity at next same period, to
prevent the intermediate temporary state.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rk3308 only support RMII mode, and if it is output clock
mode, better to use ref_clk pin with drive strength 12ma.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add the glue code to allow the rk3308 variant of the Rockchip gmac
to provide network functionality.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This is a core board named Core-PX30-JD4 with a mainboard from Firefly,
name it as firefly-px30 for now.
This board can re-use the dts of PX30, the only difference is the UART IO,
the firefly use UART2 M1 while evb use UART2 M0.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
serial# is one of the vendor properties and thus protected from being
overwritten if already set. If env_set is called anyway this result in
some nasty warnings, so check for presence before trying that.
In the same direction check for the presence of cpuid# and compare it
to the actual hardware and emit a warning if they don't match.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip_setup_macaddr() runs from an initcall, so returning an error
code will make that initcall fail thus breaking the boot process.
And if an ethernet address is already set this is definitly not a
cause for that, so just return success in that case.
Fixes: 0482538499 ("rockchip: rk3399: derive ethaddr from cpuid");
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Some generic PX30 SoMs found in the wild use UART3 as their debug output
instead of UART2 (used for MMC) and UART5.
Make it possible to use UART3 as early debug output, with the associated
clock and pinmux configuration. Two sets of output pins are supported (M0/M1).
Future users should also note that the pinmux default in the dts is to use
the M1 pins while the Kconfig option takes M0 as a default.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
UART3 also has two sets of pins that can be selected.
Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
We need load some parts of ATF to sram, but rockchip
dwmmc controllers can't do dma to non-ddr addresses
space, so set the mmc controller into fifo mode in spl.
And show my best respect to Heiko's work for this solution.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
After commit d8765e2422 ("Enable building of u-boot.itb
on Rockchip platform"), u-boot.itb will automatically
generated by "make all" command, manually command
"make u-boot.itb" is no longer needed.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
SPL has limited available resources, and the performance between
ARM and Thumb isn't that significant.
This patch builds using Thumb instruction set to reduce the code
size by nearly 6K.
Original:
text data bss dec hex filename
26526 4004 1376 31906 7ca2 spl/u-boot-spl
Thumb:
text data bss dec hex filename
20232 4004 1376 25612 640c spl/u-boot-spl
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
The da850-evm doesn't have the boot pins configured in a way
to make MMC/SD booting an option, and MMC/SD support is not
enabled in SPL. Therefore, there is no need to support raw mode
mmc/sd support in SPL.
This patch disables CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
Signed-off-by: Adam Ford <aford173@gmail.com>
At the moment entry_point is set to image_get_load(header) that sets it
to "load address" instead of "entry point", assuming entry_point is
equal to load_addr, but it's not true. Then load_addr is set to
"entry_point - header_size", but this is wrong too since load_addr is
not an entry point.
So use image_get_ep() for entry_point assignment and image_get_load()
for load_addr assignment.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
# This is actually a resent patch of
# [1] https://lists.denx.de/pipermail/u-boot/2019-May/369170.html
Two test cases are added under test_fs_ext:
test case 10: for root directory
test case 11: for non-root directory
Those will verify a behavior fixed by the commits related to
root directory
("fs: fat: allocate a new cluster for root directory of fat32" and
"fs: fat: flush a directory cluster properly"), and focus on
handling long-file-name directory entries under a directory.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Unlink test for FAT file system seems to fail at test_unlink2.
(When I added this test, I haven't seen any errors though.)
for example,
===8<===
fs_obj_unlink = ['fat', '/home/akashi/tmp/uboot_sandbox_test/128MB.fat32.img']
def test_unlink2(self, u_boot_console, fs_obj_unlink):
"""
Test Case 2 - delete many files
"""
fs_type,fs_img = fs_obj_unlink
with u_boot_console.log.section('Test Case 2 - unlink (many)'):
output = u_boot_console.run_command('host bind 0 %s' % fs_img)
for i in range(0, 20):
output = u_boot_console.run_command_list([
'%srm host 0:0 dir2/0123456789abcdef%02x' % (fs_type, i),
'%sls host 0:0 dir2/0123456789abcdef%02x' % (fs_type, i)])
assert('' == ''.join(output))
output = u_boot_console.run_command(
'%sls host 0:0 dir2' % fs_type)
> assert('0 file(s), 2 dir(s)' in output)
E AssertionError: assert '0 file(s), 2 dir(s)' in ' ./\r\r\n ../\r\r\n 0 0123456789abcdef11\r\r\n\r\r\n1 file(s), 2 dir(s)'
test/py/tests/test_fs/test_unlink.py:52: AssertionError
===>8===
This can happen when fat_itr_next() wrongly detects an already-
deleted directory entry.
File deletion, which was added in the commit f8240ce95d ("fs: fat:
support unlink"), is implemented by marking its entry for a short name
with DELETED_FLAG, but related entry slots for a long file name are kept
unmodified. (So entries will never be actually deleted from media.)
To handle this case correctly, an additional check for a directory slot
will be needed in fat_itr_next().
In addition, I added extra comments about long file name and short file
name format in FAT file system. Although they are not directly related
to the issue, I hope it will be helpful for better understandings
in general.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
The mmc CID value is one of the input parameters used to provision the
RPMB key. The trusted execution environment expects this value to be
specified in big endian format.
Before this fix, on little endian systems, the value returned by the
linux kernel mmc driver differed from the one returned by u-boot.
This meant that if linux provisioned the RPMB key, u-boot would not
have access to the partition (and the other way around).
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
The command cp fails on sandbox because the address is used
directly. To fix this issue, we call the function map_sysmem
to translate the address.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
The command iminfo fails on sandbox because the address
is used directly. To fix this issue, we call the function
map_sysmem to translate the address.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This define indicates if DM_GPIO shall be supported in SPL. This allows
proper operation of DM converted GPIO drivers in SPL, which use
boards.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
PCI devices may be disabled in the device tree. Devices which are probed
by the device tree handle the "status" property and are skipped if
disabled. Devices which are probed by the PCI enumeration don't check
that property. Fix it.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Alex Marginean <alexandru.marginean@nxp.com>
Tested-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Move MTD-related lines out of the root Makefile. Put them in their
respective directories. Enclose some of these new lines to skip them
when building the SPL. MTD core files and some MTD device drivers are
compiled in a mtd.o object and included in the final object only if
MTD support is required (there are two different symbols for that, one
for U-Boot and one for the SPL).
Now that all defconfigs have been fixed, we can stop the logic where
enabling a command selects the core files to compile. This logic is
broken since selecting a symbol with a 'depends on' will not enforce
this secondary dependency.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Defconfigs have been fixed, now we can add proper dependencies in
Kconfig. SPI FLASH is still not dependent on MTD (deeper rework needed).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
The 'sf' command is not supposed to rely on the MTD stack, but both
'sf' and 'nand' commands use helpers located in mtd_uboot.c. Despite
their location, these functions do not depend at all on the MTD
stack.
This file (drivers/mtd/mtd_uboot.c) is only compiled if CONFIG_MTD is
selected, which is inconsistent with the current situation. Solve this
by moving these three functions (which are only used by the above two
commands) out of mtd_uboot.c and put them in a C file only compiled
with cmd/sf.c and cmd/nand.c.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
[trini: Don't export get_part function now]
Signed-off-by: Tom Rini <trini@konsulko.com>
It is already the case that all defconfigs with SPI_FLASH_MTD also
declare using MTD, but let's make this consistent and enforce it in
Kconfig. Most of the time SPI_FLASH_MTD is used in conjunction with
UBI, which already depends on MTD.
Suggested-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
CONFIG_DFU_NAND needs the raw NAND core being compiled.
Also fix the colibri_vf defconfig to reflect this dependency.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Because of the include's game, when some files are compiled for a SPI
NAND device, no warning appears. But when it is for a raw NAND device,
GCC complains. Fix these warning by including <common.h>.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Enabling TFABOOT configuration will compile-in a call to nand_read in
the boot sequence. Handle the situation by also selecting officially
the raw NAND core in this case.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
There is no flash on this board, there is no reason to define MTD
environment variables nor UBI. Drop them from the configuration file.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Wolfgang Grandegger <wg@aries-embedded.de>
While the right Kconfig entries were selected, because of the missing
CMD_NAND symbol the raw NAND core was never compiled. Remove it from
the defconfigs otherwise the build will fail.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
[trini: Also do this on bcm11130_nand]
Signed-off-by: Tom Rini <trini@konsulko.com>
Due to previous Makefile organization, the raw NAND subdirectory was
not compiled in if CMD_NAND was not enabled. Because the Denali driver
does not compile with these boards (undefined environment offset),
remove the dependency within the defconfig over the controller driver
(was ignored anyway in the past).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
MTD support must be enabled when using mtdparts. Indeed, functions
like get_mtd_info(), get_mtd_device() and put_mtd_device() are in
drivers/mtd/mtd_uboot.c and are built only with CONFIG_MTD.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
In some files, options of CMD_NAND are selected but not the command
itself. Fix this inconsistency.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Both symbols must be enabled when there is a raw NAND driver
selected. Also enable them when CONFIG_CMD_NAND is selected to avoid
breaking things when we'll further rework the MTD dependency
description.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
[trini: Rebase and migrate a few more boards here]
Signed-off-by: Tom Rini <trini@konsulko.com>
CONFIG_MTD must be reserved for the MTD core. Like any other
subsystem, prefix the symbol by DM when it comes to DM support.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
[trini: Add Kconfig files]
Signed-off-by: Tom Rini <trini@konsulko.com>
I detected the following error in sandbox with Clang on Travis CI:
+cmd/efidebug.c:703:15: error: result of comparison of constant
9223372036854775822 with expression of type 'int' is always false
[-Werror,-Wtautological-constant-out-of-range-compare]
+ else if (ret == EFI_NOT_FOUND)
+ ~~~ ^ ~~~~~~~~~~~~~
Simply changing a type of 'ret' to efi_status_t will fix this error.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This adds a general board file based on MT8518 SoCs from MediaTek.
Apart from the generic parts (cpu) we add some low level init codes
and initialize the early clocks.
This commit is adding the basic boot support for the MT8518 eMMC board.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
[trini: Migrate env location to defconfig, set ENV_IS_IN_MMC]
Signeed-off-by: Tom Rini <trini@konsulko.com>
Add support for MediaTek MT8518 SoC. This include the file
that will initialize the SoC after boot and its device tree.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
Add null pointer check to take care of out of memory errors.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
spl ymodem driver always assumes that 1 BUF_SIZE is read in one stream.
This might not be true when image is not padded to BUF_SIZE and the last
sector that gets loaded will be < BUF_SIZE. Drop this assumption and use
the actual size that is loaded.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The MMC boot is currently broken on omapl138-lcdk after enabling the
driver model in SPL. The main problem is the driver's bind callback not
being called after probe in SPL (even with the DM_FLAG_PRE_RELOC flag
specified).
While a proper fix is still being worked on, this hacky changeset at
least fixes the MMC boot on this platform by calling mmc_bind()
manually from probe().
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
We don't have full device-tree support in SPL yet - add an appropriate
U_BOOT_DEVICE() to the board file.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
struct mmc_config & struct mmc don't need to be exported over platform
data, but can instead be private in the driver.
Remove struct davinci_mmc_plat.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
The DM family of DaVinci SoCs is no longer supported. Drop the
irrelevant code from the driver.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Currently the omapl138_lcdk has SKIP_LOWLEVEL_INIT set.
The README states there is a variation of this for the ARM926EJ-S
which allows the board to just skip the call to lowlevel_init()
and do the normal CP15 init which enables the instruction cache.
On the da850evm, this was shown to improve startup time.
This patch switches SKIP_LOWLEVEL_INIT to SKIP_LOWLEVEL_INIT_ONLY
thus, enabling the cache.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
In order to further prepare for full device tree support in SPL,
this patch enables both SPL_DM_SEQ_ALIAS and SPL_OF_TRANSLATE.
Both of these are already enabled in U-Boot, so SPL will have
the same functionality
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Driver model requires a malloc pool to allocate memory before
relocations to operate serial and some other devices. This patch
increases the pool size to 2K.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
In preparation to use full device tree support, SPL can separate
BSS from text region.
This patch enables SPL_SEPARATE_BSS.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
pxe command parses the init ramfs address(through initrd lable in
pxe config file), but is not passing it to bootm command as argument
as bootm_argc count is not increased.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit:
d409c96216
causes build failure with ICACHE enabled. This is due to missing
invalidate_icache_all() stub. Let's add empty invalidate_icache_all() in
the case where ICACHE is not enabled.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
The bcm283x has grown in files, which was not reflected in the
MAINTAINERS file. Fix this by adding the missing entries.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
When we do not have CONFIG_BLK (or SPL/TPL) enabled there are very few
cases where we need the blk_legacy code linked in. To catch these, build
when we have CONFIG_HAVE_BLOCK_DEVICE set. In addition, we only need
cmd/blk_common.o to be linked in when we have CONFIG_HAVE_BLOCK_DEVICE
set, so make use of that directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
The array 'mtd_table' is unused in the code. Remove this as gcc doesn't
always discard unused global variables.
Signed-off-by: Tom Rini <trini@konsulko.com>
The content of pci_rom.c is only used in a few cases. Only build and
link in these cases to avoid a global variable as gcc doesn't always
discard those when they are unused.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_CORTINA_FW_IN_MMC
CONFIG_SYS_CORTINA_FW_IN_NAND
CONFIG_SYS_CORTINA_FW_IN_NOR
CONFIG_SYS_CORTINA_FW_IN_REMOTE
CONFIG_SYS_CORTINA_FW_IN_SPIFLASH
Signed-off-by: Tom Rini <trini@konsulko.com>
Enhance do_bootm_vxworks() to support Linux compatible standard DTB
for ARM and PPC, when the least significant bit of flags in VxWorks
bootargs is set. Otherwise it falls back to the existing bootm flow
which is now legacy.
Signed-off-by: Lihua Zhao <lihua.zhao@windriver.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
There are currently no known users of this functionality on this
platform, disable it to prepare for additional VxWorks functionality
that would cause this platform to fail to link.
Cc: Soeren Moch <smoch@web.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Soeren Moch <smoch@web.de>
This file is generated in the root during Rockchip builds and so should
be cleaned up.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Currently, we have two places where we list files that should always be
cleaned if they exist. One, the CLEAN_FILES variable, is from the Linux
build system and is the proper place to list files.
The other, a set of extra arguments passed in the xargs template used to
remove files with certain extensions, was introduced by 8f06f0cee3
("Makefile: clean image.map") and is clearly wrong: by extending the
xargs template, we attempt to remove the files once for each batch of
arguments that xargs produces and we reduce the number of files from
stdin that xargs can include in each of its rm commands.
To fix this, put all hardcoded files into CLEAN_FILES.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
All of the clean targets (clean, dist-clean, mrproper) are run without
loading a configuration. That means that any conditional modification of
CLEAN_FILES will either always apply or never apply and so shouldn't be
in a conditional in the first place.
Since CLEAN_FILES is allowed to list nonexistent files, just add
everything to it unconditionally to fix the issue.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
27084c03d3 ("spl: Allow tiny printf() to be controlled in SPL and
TPL") split this option in two for TPL and SPL, but didn't change the
Kconfig names, making them hard to set quickly.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
There are currently no known users of this functionality on this
platform, disable it to prepare for additional VxWorks functionality
that would cause this platform to fail to link.
Cc: Soeren Moch <smoch@web.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Soeren Moch <smoch@web.de>
Make the at91_gpio driver set sensible GPIO bank names in the platform
data. This makes the 'gpio status' command a lot more useful.
Signed-off-by: James Byrne <james.byrne@origamienergy.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
Several boards still unnecessarily included micrel.h but no longer
require it since the switch to Device Tree configuration.
Signed-off-by: James Byrne <james.byrne@origamienergy.com>
These functions do not use driver model but are still used. Move them to a
new eeprom.h header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function can be dropped when all boards use driver model for PCI. For
now, move it into init.h with a comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
A number of board function belong in init.h with the others. Move them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Move this function into init.h which seems to be designed for this sort
of thing. Also update the header to declare struct global_data so that it
can be included without global_data.h being needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function is not defined by any boards so the feature is not used.
Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Move these functions into the command.h header file which is a better fit.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Move these two functions into the irq_funcs.h header file. Also move
interrupt_handler_t as this is used by the irq_install_handler() function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These functions do not use driver model but are fairly widely used in
U-Boot. But it is not clear that they will use driver model anytime soon,
so we don't want to label them as 'legacy'.
Move them to a new irq_func.h header file. Avoid the name 'irq.h' since it
is widely used in U-Boot already.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These are used by only one arch and only within a single file. Drop the
declarations from the common file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.
Move them over.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These functions belong in cpu_func.h since they do not use driver model.
Move them over. Don't bother adding comments since these functions should
be deleted.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function belongs in time.h so move it over and add a comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function belongs in time.h so move it over and update the comment
style.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function has a similar name to the common wait_ticks(). It is only
used in one place and seems small enough to drop.
Inline it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function belongs in time.h so move it over and add a comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These functions belong in time.h so move them over and add comments.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add a header file to house the lz4 compression function. Add a comment
while we are here, since it not even clear from the name what the function
actuall does.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Move this function header to serial.h since this function is clearly
related to serial. The function itself stays in console.c since we don't
have a single serial file. DM and non-DM each has a separate file so we
would have to either create a new common serial file, or repeat the
function in both serial.c and serial-uclass.c, neither of which seem
worthwhile.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The function declarations in serial.h are not in sync with what is
currently used in usbtty. Fix this by updating the header and including
it, to help catch future such problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
At present this function sits in its own file but it does not really
justify it. There are similar string functions in vsprintf.h, so move it
there. Also add the missing function comment.
Use the vsprintf.h include file explicitly where needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These don't need to be in common.h so move them out into a new header.
Also add some missing comments.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
It is not good practice to write code in a header file. If it is included
multiple times then the code can cause duplicate functions.
Move the bootcount_store() and bootcount_load() functions into SPL.
Note: bootcount is a bit strange in that it uses driver model but does not
define proper drivers. This should be fixed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Drop inclusion of crc.h in common.h and use the correct header directly
instead.
With this we can drop the conflicting definition in fw_env.h and rely on
the crc.h header, which is already included.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Some of these have a space before the bracket. Drop it to fix the style.
Add some missing function comments while here.
Note that u32 and u8 cannot be used here since crc.h is included on the
host side.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
We have an existing U-Boot header for the one function that this defines.
Use that instead of the linux/ one. Move over the nice comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Create a new rand.h header file and move functions into it, to reduce
the size of common.h
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
There are a few whitespace problems with this code. Tidy them up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This is only used by a few files so it should not be in the common header.
Move it out.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These should be moved to driver model, but in the meantime, move them
out of the common header to help reduce its size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
With commit f0921f5098 ("fdt: Sync up to the latest libfdt"),
SiFive Unleashed board does not boot any more. This was due to
the U-Boot local changes commit 77d7fff8ce ("fdt: Fix handling
of paths with options in them") to libfdt/fdt_ro.c was dropped
during the libfdt upgrade.
>From the history [1] it was mentioned that the U-Boot changes
commit 77d7fff8ce ("fdt: Fix handling of paths with options in
them") was rejected by libfdt upstream, hence we need find another
way to fix the things.
This commit uses another method, by updating serial_check_stdout()
directly to handle the situation of "stdout-path" with ":options".
A simpler way is to change the logic in fdtdec_get_chosen_node()
to do similar thing, but I feel that not every property in chosen
node may have the option in them, hence it would make more sense
to do the special handling in serial_check_stdout() directly.
[1]: http://patchwork.ozlabs.org/patch/462756/
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The deadline for migration to CONFIG_DM is v2020.01. The VCT
baords would need an almost complete rewrite of all drivers to
support driver model.
Unless someone has access to the hardware and volunteers to do the migration,
the board should be scheduled for removal.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
Since at least some of the drivers relevant to LS1028A are now following
DM, it's useful to have dm command enabled by default.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
- Solve warning for stih410-b2260
- Device tree alignment on v5.4-rc4 for all stm32 boards
- Correct the eMMC pin configuration on stm32mp157c-ev1
- Add DFU and SPI-NAND support for stm32mp1 board
Instead of using single fixed value for the calibration offset,
add tables which dynamically adjust this per calibration code
from the SCC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Retain the tap number from last calibration in private data. This
will be later used for SCC error checking after each command.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
The clock.h was to define mxc_get_clock() providing clock value
to fsl_esdhc driver. Since fsl_esdhc driver is using global data
gd->arch.sdhc_clk directly now, we can remove this file.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Although layerscape platforms reuse mxc_get_clock() of i.MX platforms,
eSDHC clock getting do not have to use it. It uses global data
gd->arch.sdhc_clk directly in fsl_esdhc driver. Even there are more
than one eSDHC controllers on SoC, they use same reference clock.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The board_mmc_init() defined in board files is actually
doing same thing with the cpu_mmc_init() defined in
arch/arm/cpu/armv7/ls102xa/cpu.c. So drop it.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This patch is to get clock directly from global data.
- Remove uclass clk api method. This was what i.MX platforms were
using, while QorIQ platforms weren't.
- Get clock only from global data, dropping mxc_get_clock().
QorIQ eSDHC controllers on one silicon use same reference clock.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This adds pfe stop command before boot linux kernel
to fix a problem that ethernet won't be workable
after enter linux. Because there is a h/w limitation
in LS1012A PFE, to re-initialize PFE it has to be
safe shutdown, these steps are done through PFE stop.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Fix the kernel offset of qspi_bootcmd scripts, followed
the qoriq_memory_layout definition.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
LS1028A QDS board supports multiple combinations of SerDes protocols and
multiple add-on cards with Ethernet PHYs. Some of them require specific
configuration in Linux DT, and the plan is to use DT overlays for them.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add some environment variables to facilitate the auto boot.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This patch adds the support of the spi nand device in mtdparts command
and in dfu_alt_info.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Generate automatically dfu_alt_info for the supported device.
The simple command "dfu 0" allows to start the dfu stack on usb 0
for the supported devices:
- dfu mtd for nand0
- dfu mtd for nor0
- dfu mmc for SDCard
- dfu mmc for eMMC
- dfu ram for images in DDR
The DUF alternate use the "part", "partubi" and "mmcpart" options
to select the correct MTD or GPT partition or the eMMC hw boot partition.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Update the sdmmc2 node for eMMC support on eval board stm32mp157c-ev1.
- update slew-rate for pin configuration
- update "vqmmc-supply"
- remove "st,sig-dir"
- add mandatory "pinctrl-names"
- add "mmc-ddr-3_3v"
This patch solve the eMMC detection issue for command "mmc dev 1".
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Device tree and binding alignment with kernel v5.3
and converted to SPDX.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This patch allows to fix the following compilation warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Enable the support of function keys on the USB keyboard. This is necessary
to test the USB keyboard driver.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Allow the unit test to pass full 8 byte scan code sequences to the USB
keyboard emulation driver and to parse multi-byte escape sequences.
The following features are not yet tested:
* LED status
* caps-lock
* num-lock
* numerical pad keys
The following features are not yet implemented by the USB keyboard
driver and therefore not tested:
* modifiers for non-alpha-numeric keys, e.g. <SHIFT><TAB> and <ALT><F4>
* some special keys, e.g. <PRINT>
* some modifiers, e.g. <ALT> and <META>
* alternative keyboard layouts
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Move constant USB_KBD_BOOT_REPORT_SIZE. This allows us to reuse it.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Provide support for F1-F12, Insert, Delete, Home, End, Page Up, Page Down.
As this leads to a size increase provide a customizing setting
CONFIG_USB_KEYBOARD_FN_KEYS.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Avoid duplicate translation of arrow key codes.
Reduce code size by avoiding strings and eliminating
usb_kbd_put_sequence().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
usb_kbd_buffer is defined as u8[]. So let usb_kbd_put_queue() use u8 as
type of the parameter for the new byte.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On Gen5, when the FPGA is loaded and there was some prior interaction
between the HPS and the FPGA via bridges (e.g. Linux was running and
using some of the IPs in the FPGA) followed by warm reset, it has been
observed that there might be outstanding unfinished transactions. This
leads to an obscure misbehavior of the bridge.
When the bridge is enabled again in U-Boot and there are outstanding
transactions, a read from within the bridge address range would return
a result of the previous read instead. Example:
=> bridge enable ; md 0xff200000 1
ff200000: 1234abcd
=> bridge enable ; md 0xff200010 1
ff200010: 5678dcba <------- this is in fact a value which is stored in
a memory at 0xff200000
=> bridge enable ; md 0xff200000 1
ff200000: 90effe09 <------- this is in fact a value which is stored in
a memory at 0xff200010
and so it continues. Issuing a write does lock the system up completely.
This patch opens the FPGA bridges in 'bridge enable' command, the tears
them down again, and then opens them again. This allows these outstanding
transactions to complete and makes this misbehavior go away.
However, it is not entirely clear whether this is the correct solution.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Commit ec3dcea744 ("video: mxsfb: Configure the clock after eLCDIF reset")
causes boot regression on imx7d-pico/imx7d-sdb boards, so revert it
until a better solution is prepared.
This reverts commit ec3dcea744.
Reported-by: Joris Offouga <offougajoris@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Provide a defconfig which allows us to boot Raspberrry Pi 4
and Raspberry Pi 3 Model B/B+
Instead of using the embedded DTB as done in RPi3 we use the
devicetree provided by the firmware.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
For bcm283x based on arm64 we also have to change the mm_region.
Add assign this in mach_cpu_init() so we can create now one binary
for RPi3 and RPi4.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
As part of the effort to create one binary for several bcm83x SoCs
we read the IO base address from device-tree.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
We move the per SOC define BCM283x_BASE to a global variable.
This is a first step to provide a single binary for several bcm283x
SoCs.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The fw_dtb_pointer was defined in the assembly code, which makes him
live in section .text_rest
Put that's not necessary, we can push the variable in the .data section.
This will prevent relocation errors like:
board/raspberrypi/rpi/rpi.c:317:(.text.board_get_usable_ram_top+0x8):
relocation truncated to fit: R_AARCH64_LDST64_ABS_LO12_NC against symbol
`fw_dtb_pointer' defined in .text section in board/raspberrypi/rpi/built-in.o
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
U-Boot support on Raspberry Pi 4 relies on the device-tree
provided by the firmware. The blob does not contain the
U-Boot specific pre-loc-rel properties. The result is, that
the U-Boot banner is not printed.
We fix this by setting the DM_FLAG_PRE_RELOC flag in the driver,
if we rely on a device-tree provided by the firmware.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Rename the file bcm283x-uboot.dtsi so that it get
automatically include through the scripts/Makefile.lib
using $(CONFIG_SYS_SOC))-u-boot.dtsi
Without this uarts and pincontroller miss the property dm-pre-reloc
and the first call to bcm283x_mu_serial_ofdata_to_platdata() fails
as the pins are not set correctly.
As a result the U-Boot banner isn't shown on boot.
Before commmit
143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state")
we included bcm283x-uboot.dtsi directly in the device-tree file.
Which got deleted by the metioned commit.
This is a much robuster solution.
Reported-by: Tom Rini <trini@konsulko.com>
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Tom Rini <trini@konsulko.com> [RPi 3, 32b and 64b modes]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
In commmit
143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state")
we deleted the label for the node soc from bcm283x.dtsi
As we don't need to add the property dm-pre-reloc to the soc node,
we can delete it from bcm283x-uboot.dtsi
Tested-by: Tom Rini <trini@konsulko.com> [RPi 3, 32b and 64b modes]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The Raspberry Pi 4 upstream kernel device tree instroduces
a new compatible for the pinctroller. Add this to the driver
so that we can boot with the upstream kernel DT.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
- Clean vid/pid in Kconfig and add fastboot for rk3399
- add 'u-boot, spl-fifo-mode' for mmc
- Use FIT generator for rk3229 optee and rk3368 ATF
- fan53555: add support for Silergy SYR82X and SYR83X
In GCC 9 support for the Armv5 and Armv5E architectures (which have no
known implementations) has been removed, cf.
https://gcc.gnu.org/gcc-9/changes.html
ARM11 is an armv6 implementation. So change the architecture flag for the
compiler to armv6 for ARM11.
Suggested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Now that we have buildman telling genboards.cfg to use an output
directory we need to ensure that it exists.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Fixes: bc750bca12 ("tools: buildman: Honor output directory when generating boards.cfg")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add __pycache__ to ignored files and extend the rule for _libfdt to also
include generated shared objects (e.g. _libfdt.cpython-37m-x86_64-linux-gnu.so).
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
With the move to using Python 3 for real, we encounter two different
issues. First, the file include/video_font_data.h includes at least one
UTF-16 character. Given that it does not include any CONFIG symbols it
is easiest to just ignore this file. Next, we encounter similar
problems with some dts/dtsi files that come from Linux. In this case
it's easiest to simply ignore all dts/dtsi files as there will not be
CONFIG symbols for us to migrate in them.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
As part of loading trustedfirmware, the SPL is required to place portions
of code into the socs sram but the mmc controllers can only do dma
transfers into the regular memory, not sram.
The results of this are not directly visible in u-boot itself, but
manifest as security-relate cpu aborts during boot of for example Linux.
There were a number of attempts to solve this elegantly but so far
discussion is still ongoing, so to make the board at least boot correctly
put both mmc controllers into fifo-mode, which also circumvents the
issue for now.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Rockchips dwmmc controllers can't do dma to non-ddr addresses,
like for example the soc-internal sram but during boot parts of
TrustedFirmware need to be placed there from the read FIT image.
So add handling for a u-boot,spl-fifo-mode to not put the mmc
controllers into fifo mode for all time.
The regular fifo-mode property still takes precedent and only
if not set do we check for the spl-specific property.
Suggested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Setup dwc3_device structure for non-dm gadgets, which is used
in rk3399 platforms.
dwc3_device would have basic regbase, dr_mode, high speed
and 16-bit UTMI+ etc.
Cc: Marek Vasut <marex@denx.de>
Tested-by: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Fix to use CONFIG_USB_DWC3_GADGET instead of CONFIG_USB_DWC3)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The 'debug' and 'printf' functions were previously added to the list of
logFunctions in commit 0cab42110d ("checkpatch.pl: Add 'debug' to
the list of logFunctions") and commit 397bfd4642 ("checkpatch.pl:
Add 'printf' to logFunctions") but these additions were lost when newer
versions of checkpatch were pulled in from the upstream Linux
kernel version.
This restores them so that you don't end up in a situation where
checkpatch will give a warning for "quoted string split across lines"
which you cannot fix without getting a warning for "line over 80
characters" instead.
Signed-off-by: James Byrne <james.byrne@origamienergy.com>
remove from NXP arm32 all layerscape boards and
build them instead in already existing layerscape
jobs (which now not only build aarch64 boards)
Signed-off-by: Heiko Schocher <hs@denx.de>
move orangepi builds into a new job, and exclude
orangepi builds from sunxi and rockchip jobs.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
U-Boot has two different variants of dwc3 initializations,
- with dm variant gadget, so the respective dm driver would
call the dwc3_init in core.
- with non-dm variant gadget, so the usage board file would
call dwc3_uboot_init in core.
The driver probe would handle all respective gadget properties
including phy interface via phy_type property and then trigger
dwc3_init for dm-variant gadgets.
So, to support the phy interface for non-dm variant gadgets,
the better option is dwc3_uboot_init since there is no
dedicated controller for non-dm variant gadgets.
This patch support for adding phy interface like 8/16-bit UTMI+
code for dwc3_uboot.
This change used Linux phy.h enum list, to make proper code
compatibility.
Cc: Marek Vasut <marex@denx.de>
Tested-by: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Technically the default mmc device for fastboot would
use eMMC if the board support for it.
Rockchip platform access device 0 for eMMC so, use the
same device number for rk3328.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Select CONFIG_FASTBOOT_FLASH, CONFIG_FASTBOOT_FLASH_MMC_DEV
for rockchip SoC plaforms in fastboot Kconfig file instead
of defined it in board defconfig.
This eventually drop the explicit configs defined in
supporting board defconfig files.
Tested-by: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip support differnet or common gadget product number
between Rockchip SoCs like,
0x310a - rk3036
0x320a - rk3229, rk3288
0x330a - rk3328
So, select them on Kconfig based on platform specific
config defined.
This eventually drop the explicit configs defined in
supporting board defconfig files.
Tested-by: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Gadget vendor number, 0x2207 is common across all platfroms
supported in Rockchip SoC.
So, select the same number globally, if ARCH_ROCKCHIP.
This eventually drop the explicit configs defined in supported
board defconfig files.
Tested-by: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Select the gadget manufacturer as 'Rockchip' for
all rockchip platform SoC's.
This eventually drop the explicit defined added
on supported board defconfig files.
Tested-by: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
fan53555_regulator_set_value() passes its own dev to pmic_clrsetbits()
instead of its parent (pmic). As result u-boot crashes when you try to
set voltage on fan53555 regulator
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
That's not correct and it breaks SMBUS-style reads and and writes for
some chips (e.g. SYR82X/SYR83X).
Stop bit should be sent only after the last message.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
SYR82X and SYR83X are almost identical to FAN53555, the only difference
is different die ID and revision, voltage ranges and steps.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
For all the Rockchip SoCs with SPL_LOAD_FIT enable, we need to build
u-boot.itb with U-Boot proper and ATF/OPTEE.
All the Rockchip boards with SPL_LOAD_FIT now supports FIT generator to
get ATF/OPTEE binary path from environment and pass the build even if no
ATF/OPTEE binary exist, so we can enable this feature for the rockchip
platform.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The RK3368 lion board ATF can use bl31.elf like RK3399 and get the FIT
source with generic FIT generator script at:
arch/arm/mach-rockchip/make_fit_atf.py
And then we can use 'BL31' environment to get the path of bl31.elf
instead of copy it into U-Boot folder.
CC: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Use generator script so that we can use environment for TEE source.
$TEE for tee.bin, and if file not exist, the script can report a warning,
and meke the build success without a error.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Some of the ARM11 boards have tight limits on the size of U-Boots. Hence
use EFI_LOADER=n as default on ARM11.
Set EFI_LOADER=y for the Raspberry Pi and Raspberry Pi Zero as these boards
have sufficient storage on the SD card.
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The HPS EMAC0 drive strength is changed to 4mA because the initial 8mA
drive strength has caused CE test to fail. This requires changes on the
pad skew for EMAC0 PHY driver. Based on several measurements done, Tx
clock does not require the extra 0.96ns delay which was needed in
Arria10.
Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Since upgrading to gcc9, warnings are issued:
"taking address of packed member of ‘...’ may result in an unaligned
pointer value"
Fix this by converting dwc2_fifo_read to use unaligned access since packed
structures may be on an unaligned address, depending on USB hardware.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Since upgrading to gcc9, warnings are issued:
"taking address of packed member of ‘...’ may result in an unaligned
pointer value"
Fix this by converting two functions to use unaligned access since packed
structures may be on an unaligned address, depending on USB hardware.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
- In ARMv8 NXP Layerscape platforms we also need to make use of
CONFIG_SYS_RELOC_GD_ENV_ADDR now, do so.
- On ENV_IS_IN_REMOTE, CONFIG_ENV_OFFSET is never used, drop the define
to 0.
- Add Kconfig entry for ENV_ADDR.
- Make ENV_ADDR / ENV_OFFSET depend on the env locations that use it.
- Add ENV_xxx_REDUND options that depend on their primary option and
SYS_REDUNDAND_ENVIRONMENT
- On a number of PowerPC platforms, use SPL_ENV_ADDR not CONFIG_ENV_ADDR
for the pre-main-U-Boot environment location.
- On ENV_IS_IN_SPI_FLASH, check not for CONFIG_ENV_ADDR being set but
rather it being non-zero, as it will now be zero by default.
- Rework the env_offset absolute in env/embedded.o to not use
CONFIG_ENV_OFFSET as it was the only use of ENV_OFFSET within
ENV_IS_IN_FLASH.
- Migrate all platforms.
Cc: Wolfgang Denk <wd@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: uboot-stm32@st-md-mailman.stormreply.com
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
We can only configure and set the environment in SPL when we have a
particular environment location set that is not "nowhere" like it is in
SECURE_BOOT designs. Update the code to reflect that.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
These functions can only be built and used when we have
ENV_IS_IN_SPI_FLASH, use that as a guard.
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
We have CONFIG_ENV_SIZE_IS_REDUND but don't really use it. We have one
board where we can simply multiple CONFIG_ENV_SIZE by two for the same
result. The other place where we could but were not previously using
this is for where env_internal.h checks for if we should set
ENV_IS_EMBEDDED. This seems like the most likely use, historically, of
the variable, but it was not used. Add logic to check for this now.
Cc: Wolfgang Denk <wd@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The board file has a build time check to ensure that we do not have the
redundant environment overwriting the factory data. However, using the
symbol CONFIG_ENV_SIZE_REDUND isn't strictly needed as that is always
the same as CONFIG_ENV_SIZE. Use CONFIG_ENV_SIZE instead so that we can
later drop CONFIG_ENV_SIZE_REDUND.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The default mtdparts value grew a trailing zero during the Kconfig
conversion. This is because the mtdparts value in the header file
had a \0 at the end, which got misconverted into plain 0 instead of
being dropped.
Signed-off-by: Marek Vasut <marex@denx.de>
Fixes: 43ede0bca7 ("Kconfig: Migrate MTDIDS_DEFAULT / MTDPARTS_DEFAULT")
Reviewed-by: Tom Rini <trini@konsulko.com>
To use this DM timer on socfpga as system tick, it needs to take itself
out of reset.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
The file arch/arm/mach-socfpga/include/mach/misc.h used the same include
guard as the global include/misc.h.
Fix this by giving the arch file an arch prefix.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Make the function pointer struct const, as it does not need to be
writable. This doesn't really change anything other than moving this
variable to a different section. No functional change.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Commit 2a51e16bd5 ("configs: Make USE_TINY_PRINTF depend on SPL||TPL and be default")
enable USE_TINY_PRINTF by default, disable it for Stratix10.
Resync with savedefconfig.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Add #address-cells and #size-cells to memory node to fix incorrect memory
size decoding in recent Uboot version.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Today in initr_reloc_global_data() we use some non-obvious tests to
determine if we need to relocate the env_addr within gd or not. In
order to facilitate migration of other symbols to Kconfig we need to
introduce a new symbol for this particular use case.
Cc: Wolfgang Denk <wd@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
We only need to build and link input.o when we have any of
CONFIG_KEYBOARD, CONFIG_DM_KEYBOARD (and SPL/TPL variants) or
CONFIG_TEGRA_KEYBOARD set.
Signed-off-by: Tom Rini <trini@konsulko.com>
Pull request for UEFI sub-system for efi-2020-01-rc4
Fix errors due to unaligned memory access:
* disable UEFI except for ARMv8, ARMv7, ARM11
* enable unaligned access support on ARM11
Remove an unused function.
xhci.h has now been moved to include/usb/ directory. Therefore, update the
path in the Cadence USB drivers.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
With an implementation for allow_unaligned() available for arm1136 and
arm1176 UEFI can be supported on these architectures.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The UEFI spec mandates that unaligned memory access should be enabled if
supported by the CPU architecture.
This patch implements the function unaligned_access() to set the enable
unaligned data support flag and to clear the aligned flag in the system
control register (SCTLR). It is called when UEFI related commands like
bootefi are invoked.
Reported-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Tested-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Tested-by: Guillaume Gardet <Guillaume.Gardet@arm.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
fatload USB was reported to fail on the Sheevaplug. Debugging showed that
this was caused by an incorrect unaligned write to memory in
path_to_uefi().
UEFI on ARM requires that unaligned memory access is enabled.
* ARMv5 does not support unaligned access at all.
* ARMv6 supports unaligned access when we clear the A flag and set the
U flag.
* On ARMv7 unaligned access is possible when clearing the aligned flag,
which we do in function allow_unaligned() (arch/arm/cpu/armv7/sctlr.S).
For none of the other cpus in arch/arm/cpu/ we have implemented a
similar function.
* ARMv8 allows unaligned access.
Let EFI_LOADER on ARM depend on SYS_CPU=armv7 or SYS_CPU=armv8.
Once we have implemented allow_unaligned() for other ARM CPUs we can add
these to Kconfig.
Reported-by: Gray Remlin <gryrmln@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add DM support for Silicon(SIL3131 / SIL3132 / SIL3124) sata driver as
few of the PowerPC platforms such as P series based boards need to
use SATA_SIL with DM,
Also fix below warning while PowerPC P series boards compilation,
===================== WARNING ======================"
This board does use CONFIG_LIBATA but has CONFIG_AHCI not"
enabled. Please update the storage controller driver to use"
CONFIG_AHCI before the v2019.07 release."
Failure to update by the deadline may result in board removal."
See doc/driver-model/MIGRATION.txt for more info."
===================================================="
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add DM support for Freescale PowerPC sata driver used for PowerPC T series
SoCs,
CONFIG_BLK needs to be enabled on these platforms. It adds the SATA
controller as AHCI device, which is strictly speaking not correct,
as the controller is not AHCI compatible, But the U-Boot AHCI uclass
interface enables the usage of this DM driver,
Also fix below warning while PowerPC T series boards compilation,
===================== WARNING ======================"
This board does use CONFIG_LIBATA but has CONFIG_AHCI not"
enabled. Please update the storage controller driver to use"
CONFIG_AHCI before the v2019.07 release."
Failure to update by the deadline may result in board removal."
See doc/driver-model/MIGRATION.txt for more info."
===================================================="
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
- fix i.MX6ULL evk black screen observed while reboot stress tests
- remove "synopsys,dw-mipi-dsi" compatible to reduce the device tree
differences between Linux and U-Boot for stm32mp1 platform
- Add support for rockchip SoC: PX30, RK3308
- Add and migrate to use common dram driver: PX30, RK3328, RK3399
- Add rk3399 board Tinker-s support
- Board config update for Rock960, Rockpro64
Support tinker-s board. The board is equivalent of tinker board
except of emmc.
TODO:
- support of usb current burst when the board is powered from pc
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
dmc is used to initialize the memory controller. It's needed by
u-boot. Move it in the specific section
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
We shouldn't force which allocator the SPL uses, since there's no
platform requirement for one over the other: in fact, we currently allow
selection of the TPL allocator but not the SPL one!
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The common SPL removed SoC-specific code for RK3399's SPL and in the
process caused the previously-unconditional DRAM initialization in
board_init_f() to only happen when compiling a configuration that does not
support TPL, meaning DRAM never gets initialized if TPL is supported but
disabled.
Fix this by omitting the DRAM init in SPL only when we are configured to
also build a TPL. This fixes custom configurations that have disabled
TPL, and it should also unbreak the "ficus-rk3399", "rock960-rk3399",
and "chromebook_bob" defconfigs, although since I don't have any of
those devices I can't confirm they're broken now.
Fixes: b7abef2ecb ("rockchip: rk3399: Migrate to use common spl board file")
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The common SPL code reordered the DRAM initialization before
rockchip_stimer_init(), which as far as I can tell causes the RK3399 to
lock up completely.
Fix this issue in the common code by putting the DRAM init back after
timer init. I have only tested this on the RK3399, but it wouldn't make
any sense for the timer init to require DRAM be set up on any system.
Fixes: b7abef2ecb ("rockchip: rk3399: Migrate to use common spl board file")
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
ROC-RK3308-CC is a rk3308 based board designed by
Firelfy, with eMMC and 256MB DDR3 and RTL8188 Wifi
on board.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add dts file for ROC-RK3308-CC from firefly.
Sync form linux rockchip for v5.5-armsoc/dts64:
"arm64: dts: rockchip: Add devicetree for board roc-rk3308-cc"
(sha1: 4403e1237be3af0977aa23ef399e3496316317a0)
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Usage:
(1) tools/mkimage -n rk3308 -T rksd -d tpl/u-boot-tpl.bin idbloader.img
(2) cat spl/u-boot-spl.bin >> idbloader.img
(3) upgrade_tool wl 0x40 idbloader.img
Note:
When use ddr binary from rkbin as tpl, use it replace u-boot-tpl.bin in(1)
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3308 is a quad Cortex A35 based SOC with rich audio
interfaces(I2S/PCM/TDM/PDM/SPDIF/VAD/HDMI ARC), which
designed for intelligent voice interaction and audio
input/output processing.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Common PLL setup function, compatible with different SOC.
Mainly for the subsequent new SOC use.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
We should set the init value when vdd_log is enabled, or else the
vdd_log output voltage may not in soc required range.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We should set the init value when vdd_log is enabled, or else the
vdd_log output voltage may not in soc required range.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We should set the init value when vdd_log is enabled, or else the
vdd_log output voltage may not in soc required range.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add vdd_log node according to rock960 schematic V13.
This patch affect two boards:
- Rock960 Model A
- Ficus
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
The u-boot specific pieces in the dts files should be in u-boot.dtsi
not the main files, this allows easier sync with upstream. The
rk3399.dtsi has a mix of both so move them all for consistency.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Fix with missing pmugrf)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
rockpro64 needs to setup I/O domains in order for USB to work in u-boot.
Since we currently don't have a driver to do that, split it into its own
board file and initialize I/O domains here.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
CONFIG_IS_ENABLED() needs the config name like used in Kconfig, so
without the leading CONFIG_. The clock drivers all wrongly check for
CONFIG_RESET_ROCKCHIP, fix that
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip_reset_bind() already does the needed init for the reset
registers, only referenced the wrong cru structure.
So we can get rid of the open-coded reset init and just fix
the correct cru reference.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rk3399 VD_CENTER voltage domain is not subject to dynamic voltage
scaling. So the regulator reset voltage of 0.9V is used on this board.
Let u-boot initialize the center voltage to 0.95V as it is done for the
VD_LOGIC domain. This avoids instability and occasional linux kernel
Opses on this board.
Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The most important change for u-boot is the fix for the vdd-log pwm
voltage regulator to avoid overvoltage for the VD_LOGIC power domain.
Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
roc-rk3399-pc_defconfig is committed in below
commit <8a681f4c5aa15db51ad0209734859c9fe7c29cfd> ("rockchip: rk3399:
Add ROC-RK3399-PC support")
which doesn't follow the existing defconfigs on rk3399.
So, rename as followed with other rk3399 defconfigs.
Cc: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Few important regulator power rails fixes are available in
linux-next, so sync them same.
Here is the last commit details:
commit <9f7f9b610e1b7d2dc86c543ab0dfcf781bd42326> ("arm64: dts:
rockchip: Fix roc-rk3399-pc regulator input rails")
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The px30 evb is an evaluation board for the px30 together with a dsi-
connected display. This adds board and config files for it.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Newer Rockchip socs use a different ip block to handle one-time-
programmable memory, so depending on what got enabled get the cpuid
from either source.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Right now enabling SPL_FRAMEWORK will also enable it for the TPL in all
cases, making the TPL bigger. There may be cases where the TPL is really
size constrained due to its underlying ram size.
Therefore introduce a new TPL_FRAMEWORK option and make the relevant
conditionals check for both. The default is set to "y if SPL_FRAMEWORK"
to mimic the previous behaviour where the TPL would always get the
SPL framework if it was enabled in SPL.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There are some code different with rockchip vendor code which may lead
to different bugs, including:
1) Fix setting error about LPDDR3 dram size ODT.
2) Set phy io speed to 0x2.
3) Fix setting error about phy_pad_fdbk_drive.
4) Fix setting error about PI_WDQLVL_VREF_EN
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The io setting are updated after some bugfix in different rk3399 boards,
sync the code from vendor.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Update lpddr timing in lpddr4-400 and lpddr4-800 file from rockchip
vendor code;
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add capacity detect for rk3399 so that the driver able to detect the
capacity automatically.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
For there are some structures and functions are common for all rockchip SoCs,
migrate to use the common code so that we can clean up reduandent codes.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
RK3328 has a similar controller and phy with PX30, so we can use the
common driver for it and remove the duplicate codes.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add the sdram driver for PX30 to support ddr3, ddr4, lpddr2 and lpddr3.
For TPL_BUILD, the driver implement full dram init and without DM
support due to the limit of internal SRAM size.
For SPL and U-Boot proper, it's a simple driver with dm for get
dram_info like other SoCs.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The noc register bit definition may be the same for different SoC while
the offset of the register may be different, add the struction
definition as common code.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This sdram_phy_px30.c is based on PX30 SoC, the functions are common
for phy, other SoCs with similar hardware could re-use it.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This sdram_pctl_px30.c is based on PX30 SoC, the functions are common
for controller, other SoCs with similar hardware could re-use it.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The debug info for dram is main about the capacity related info which is
very important the board init, so set this default enable.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
There are some function like os_reg setting, capacity detect functions,
can be used as common code for different Rockchip SoCs, add a
sdram_common.c for all these functions.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We are using sys_reg2 and sys_reg3 as ddr cap info, sync the variable
name to what we real use to avoid confuse people.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Since we have new DRAM type and to support different DRAM size in different
CS, we need more bits, so introduce sys_reg3 to record the info.
Note that the info in sys_reg3 is extension to sys_reg2 and the info in
sys_reg2 is the same as before. We define the DRAM_INFO with sys_reg3 as
VERSION2.
All the ENC macro are moved to sdram_common.h since the sdram.c only
need to do the info decode.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The sdram.h suppose to be helper file for sdram.c which including dram
size decode and some u-boot related dram init interface, and all
structure and function for dram driver move to sdram_common.h
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
rename sdram_common.c in arch/arm/mach-rockchip to sdram.c;
so that we can use the file name sdram_common.c in dram driver for
better understand the code;
clean the related file who has use the header file at the same time.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The header file sdram.h is used for rk3288 and similar SoCs, rename it
to make it more understandable.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
According to discussion in the Linux PCI list [1], the dma-ranges should
be continuous and describe the entire inbound window which the controller
can address and not take into account the possible DRAM holes.
Temporarily disable this code which updates the dma-ranges until this
meaning is sorted out.
[1] PCI: rcar: Do not abort on too many inbound dma-ranges
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Pull request for UEFI sub-system for efi-2020-01-rc3
The following changes for the UEFI subsystem are provided:
* allow building UEFI binaries on the sandbox
* enable access to file systems without partition tables
* correctly check the return value of efi_dp_from_file()
fixes: 8ab452d587
When compiling list of cover letter cc addresses, using null as a
separater, then encoding to utf-8 results in lots of "\x00" as
separators. patman then doesnt understand that when it comes to
repoting the list to send-email.
Fix this by not encoding to utf-8, as done for the other patch files.
Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Compiling arch/sandbox/cpu/os.c results in an error
../arch/sandbox/cpu/os.c: In function ‘os_find_text_base’:
../arch/sandbox/cpu/os.c:823:12: error: cast to pointer from
integer of different size [-Werror=int-to-pointer-cast]
823 | base = (void *)addr;
| ^
cc1: all warnings being treated as errors
The size of void* differs from that of unsigned long long on 32bit
systems.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
OP-TEE can get supplied with a devicetree and will then insert
its firmware node and reserved-memory sections into it.
As this devicetree often is not the one supplied to a later
loaded kernel, a previous commit added functionality to transfer
these nodes onto that new devicetree.
To make sure this functionality stays intact, also add a test
for the transfer functionality.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The loading convention for optee or any other tee on arm64 is as bl32
parameter to the trusted-firmware. So TF-A gets invoked with the TEE as
bl32 and main u-boot as bl33. Once it has done its startup TF-A jumps
into the bl32 for the TEE startup, returns to TF-A and then jumps to bl33.
All of them get passed a devicetree as parameter and all components often
get loaded from a FIT image.
OP-TEE will create additional nodes in that devicetree namely a firmware
node and possibly multiple reserved-memory nodes.
While this devicetree is used in main u-boot, in most cases it won't be
the one passed to the actual kernel. Instead most boot commands will load
a new devicetree from somewhere like mass storage of the network, so if
that happens u-boot should transfer the optee nodes to that new devicetree.
To make that happen introduce optee_copy_fdt_nodes() called from the dt
setup function in image-fdt which after checking for the optee presence
in the u-boot dt will make sure a optee node is present in the kernel dt
and transfer any reserved-memory regions it can find.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
The phandlep pointer returning the phandle to the caller is optional
and if it is not set when calling fdtdec_add_reserved_memory() it is
highly likely that the caller is not interested in a phandle to the
created reserved-memory area and really just wants that area added.
So just don't create a phandle in that case.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The change adding fdtdec_add_reserved_memory() already protected the added
phandle against the phandlep being NULL - making the phandlep var optional.
But in the early code checking for an already existing carveout this check
was not done and thus the phandle assignment could run into trouble,
so add a check there as well, which makes the function still return
successfully if a matching region is found, even though no-one wants to
work with the phandle.
Fixes: c9222a08b3 ("fdtdec: Implement fdtdec_add_reserved_memory()")
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Remove the pinctrl_decode_pin_config() API, because this
function is unused and not compatible with livetree
(it uses fdtdec_get_bool instead of ofnode API).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable gpio0 in SPL to allow the sdhci driver read the SD card-detect
signal.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
As mentioned in doc/README.arm-relocation gd->bd is not available in
dram_init() so we shouldn't attempt to access it.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
As we can build relocation code for the sandbox now we should enable the
unit tests that had to be disabled up to now.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On the sandbox the UEFI binaries must match the host architectures.
Adjust the Makefiles. Provide the PE/COFF header and relocation files.
Allow building helloworld.efi on the sandbox.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On the sandbox we should mark the stack area as EFI runtime memory like we
do on any other architecture.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently, a whole disk without any partitions is not associated
with EFI_SIMPLE_FILE_SYSTEM_PROTOCOL. So even if it houses some
file system, there is a chance that we may not be able to access
it, particularly, when accesses are to be attempted after searching
that protocol against a device handle.
With this patch, EFI_SIMPLE_FILE_SYSTEM_PROTOCOL is installed
to such a disk if part_get_info() shows there is no partition
table installed on it.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Only if no partition table exists, check for a file system on disk level.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Correctly check the return value of efi_dp_from_file().
If we can determine device path for the file, should not depend on the
device path for the device being requested.
Provide a function description for efi_dp_from_name().
Reported-by: Coverity CID 273159, CID 273158
Fixes: 08c51fff30 ("efi_loader: device_path: check against file path length")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
- Migrate the symbol CONFIG_SYS_REDUNDAND_ENVIRONMENT to Kconfig. This
is size neutral outside of two platforms with latent bugs being fixed
now and they no longer have "ENV_IS_NOWHERE" set along with their
intended location.
Move this symbol to Kconfig. As part of this we can drop a UBI-specific
symbol that was a stop-gap for not having this particular symbol in
Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
This board is setting CONFIG_ENV_IS_IN_SPI_FLASH in the header rather
than defconfig, fix.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board is setting CONFIG_ENV_IS_IN_MMC in the header rather than
defconfig, fix.
Cc: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove the compatible "synopsys,dw-mipi-dsi" added in U-Boot
(it don't exist in Linux kernel binding); it is only used
to bind the generic synopsys UCLASS_DSI_HOST "dw_mipi_dsi" to
the driver "stm32-display-dsi" UCLASS_VIDEO_BRIDGE
This binding is done in Linux kernel drivers without compatible
(dw_mipi_dsi_bind() is called in bind of driver, for example in
drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c).
This patch does the same in U-Boot driver, the STM32 driver
calls during its bind the function device_bind_driver_to_node
to bind the generic driver "dw_mipi_dsi" at the same address.
This patch reduces the device tree differences
between Linux kernel and U-Boot for stm32mp1 platform.
Tested with v2020.01-rc1 on STM32MP157C-EV1 and STM32MP157C-DK2.
The dependency of driver is clearer and the probe order is guaranteed.
STM32MP> dm tree
Class Index Probed Driver Name
-----------------------------------------------------------
root 0 [ + ] root_driver root_driver
sysreset 0 [ ] syscon_reboot |-- reboot
simple_bus 0 [ + ] generic_simple_bus |-- soc
serial 0 [ + ] serial_stm32 | |-- serial@40010000
...
video_brid 0 [ + ] stm32-display-dsi | |-- dsi@5a000000
dsi_host 0 [ + ] dw_mipi_dsi | | |-- dsihost
panel 0 [ + ] rm68200_panel | | `-- panel-dsi@0
...
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Running stress reboot test on a i.MX6ULL evk board with a
custom LCD can lead to splash screen failure (black screen).
After comparing the eLCDIF initialization with the Linux kernel
driver, it was noticed that the eLCDIF reset is the first operation
that needs to be done.
So do like the eLCDIF Linux driver and move the eLCDIF clock
frequency configuration after the eLCDIF reset and just prior to
setting the RUN bit.
With this change applied, no more black screen issues has been
found during overnight reboot stress tests.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
With recent update in u-boot gitattributes all files are treated as regular
text files. This creates problems with special files and repo always
shows uncommitted files like below.
Your branch is up-to-date with 'origin/master'.
Changes not staged for commit:
(use "git add <file>..." to update what will be committed)
(use "git checkout -- <file>..." to discard changes in working directory)
modified: tools/logos/compulab.bmp
modified: tools/logos/denx-comp.bmp
modified: tools/logos/toradex.bmp
To fix above problem special files bmp/ttf files are treated as binary
files in the gitattributes.
Signed-off-by: Vignesh Rajendran <vignesh.rajendran@in.bosch.com>
Signed-off-by: Veeraiyan Chidambaram <veeraiyan.chidambaram@in.bosch.com>
The generated idbloader.img file that rockchip uses should
be not included in git status report
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
A recent change adjusted the symbol calculation to work on x86 but broke
it for Tegra. In fact this is because they have different needs.
On x86 devices the code is linked to a ROM address and the end-at-4gb
property is used for the image. In this case there is no need to add the
base address of the image, since the base address is already built into
the offset and image-pos properties.
On other devices we must add the base address since the offsets start at
zero.
In addition the base address is currently added to the 'offset' and 'size'
values. It should in fact only be added to 'image-pos', since 'offset' is
relative to its parent and 'size' is not actually an address. This code
should have been adjusted when support for 'image-pos' and 'size' was
added, but it was not.
To correct these problems:
- move the code that handles adding the base address to section.py, which
can check the end-at-4gb property and which property
(offset/size/image-pos) is being read
- add the base address only when needed (only for image-pos and not if the
image uses end-at-4gb)
- add a note to the documentation
- add a separate test to cover x86 behaviour
Fixes: 15c981cc (binman: Correct symbol calculation with non-zero image base)
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
- Add support for rockchip pmic rk805,rk809, rk816, rk817
- Add rk3399 board Leez support
- Fix bug in rk3328 ram driver
- Adapt SPL to support ATF bl31 with entry at 0x40000
- Fix the u8 type comparision with '-1'.
- Fix checkpatch warning for multi blank line and review signature.
This patch enable TPL support for firefly-rk3288 board, which works ths
same way with other RK3288 board like Tinker, evb.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Without the prefix, "same-as-spl" in `u-boot,spl-boot-order` will not work
as expected. When board_boot_order() `spl-boot-order.c` meets
"same-as-spl", it gets the conf by looking the boot_devices table by boot
source, and parse the node by the conf with:
node = fdt_path_offset(blob, conf);
which will failed without the "/" indicating the path.
Currently only entries of boot_devices in rk3399 have the "/" prefix.
Therefore add the missing ones in other boards.
Signed-off-by: Levin Du <djw@t-chip.com.cn>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Since we move the ATF bl31 entry for 64bit CPUs to 0x40000, we need to
limit the SPL size in 0x40000(start from 0) so that we don't need to do
the relocate for ATF loading.
Note that there will be separate BSS, STACK and MALLOC heap, so the size
0x40000(256KB) should be enough for SPL text.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Use the same SPL_STACK_R_ADDR in Kconfig instead of each board config;
default to 0x4000000(64MB) instead of 0x80000(512KB) for this address
can support all the SoCs including those may have only 64MB memory, and
also reserve enough space for atf, kernel(in falcon mode) loading.
After the ATF entry move to 0x40000, the stack from 0x80000 may be override
when loading ATF bl31.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We use to reserve IRAM to avoid the SPL text overlap with ATF M0 code,
and when we introduce the TPL, the SPL space is in DRAM, we reserve
space to avoid SPL text overlap with ATF bl31.
Now we decide to move ATF entry point to 0x40000 instead of 0x1000,
so that the SPL can have 0x4000 as code size and no need to reserve
space or relocate before loading ATF.
The mainline ATF has update since:
0aad563c rockchip: Update BL31_BASE to 0x40000
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We use to reserve IRAM to avoid the SPL text overlap with ATF M0 code,
and when we introduce the TPL, the SPL space is in DRAM, we reserve
space to avoid SPL text overlap with ATF bl31.
Now we decide to move ATF entry point to 0x40000 instead of 0x1000,
so that the SPL can have 0x4000 as code size and no need to reserve
space or relocate before loading ATF.
The mainline ATF has update since:
0aad563c rockchip: Update BL31_BASE to 0x40000
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We use to reserve IRAM to avoid the SPL text overlap with ATF M0 code,
and when we introduce the TPL, the SPL space is in DRAM, we reserve
space to avoid SPL text overlap with ATF bl31.
Now we decide to move ATF entry point to 0x40000 instead of 0x1000,
so that the SPL can have 0x4000 as code size and no need to reserve
space or relocate before loading ATF.
The mainline ATF has update since:
0aad563c rockchip: Update BL31_BASE to 0x40000
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Trusted-Firmware can also initialize a secure payload to use as a trusted
execution environment. In general for the arm64 case this is provided as
separate image and uboot is supposed to also place it in a predetermined
location in memory and add the necessary parameters to the ATF boot params.
So add the possibility to get this tee payload from the provided FIT image
and setup things as necessary.
Tested on a Rockchip PX30 with mainline TF-A, mainline OP-Tee (with pending
PX30 support) and mainline 5.4-rc1 Linux kernel.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
A trusted execution environment should also get loaded as loadable from
a fit image, so add the possibility to present a tee.elf to make_fit_atf.py
that then gets included as additional loadable into the generated its.
For ease of integration the additional loadable is created as atf_(x+1)
after all others to re-use core generation loops.
Tested against the combinations of 1-part-atf and multi-part-atf each
time with and without a tee binary present.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Fix a typo that caused incorrect values to be loaded into the DRAM
controller's deskew registers.
Signed-off-by: Simon South <simon@simonsouth.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Fix a pair of tests in phy_dll_bypass_set() that used incorrect units
for the DDR frequency, causing the DRAM controller to be misconfigured
in most cases.
Signed-off-by: Simon South <simon@simonsouth.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rk3328 can use same-as-spl option so next loaders are loaded from the same
medium.
Add the boot order in the rock64 dts otherwise booting from sdcard
will result in u-boot looking into the eMMC.
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add a call to rk3328_configure_cpu() during initialization to set the
CPU-clock frequency.
Signed-off-by: Simon South <simon@simonsouth.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Specification
- Rockchip RK3399
- LPDDR4
- TF sd scard slot
- eMMC
- M.2 B-Key for 4G LTE
- AP6256 for WiFi + BT
- Gigabit ethernet
- HDMI out
- 40 pin header
- USB 2.0 x 2
- USB 3.0 x 1
- USB 3.0 Type-C x 1
- TYPE-C Power supply
Commit details of rk3399-leez-p710.dts sync from linus tree for Linux 5.4-rc1:
"arm64: dts: rockchip: Add dts for Leez RK3399 P710 SBC"
(sha1: fc702ed49a8668a17343811ee28214d845bfc5e6)
Signed-off-by: Andy Yan <andyshrk@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The RK809 is a Power Management IC (PMIC) for multimedia
and handheld devices. They contains the following components:
- Regulators(5*BUCKs, 9*LDOs, 2*SWITCHes)
- RTC
- Clocking
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The RK817 is a Power Management IC (PMIC) for multimedia
and handheld devices. They contains the following components:
- Regulators(4*BUCKs, 1* BOOST, 9*LDOs, 1*SWITCH)
- RTC
- Clocking
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The RK805 are a Power Management IC (PMIC) for multimedia
and handheld devices. They contains the following components:
- Regulators(4*BUCKs, 3*LDOs)
- RTC
- Clocking
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The RK816 is a Power Management IC (PMIC) for multimedia
and handheld devices. They contains the following components:
- Regulators(4*BUCKs, 1*BOOST, 6*LDOs, 1*SWITCH)
- RTC
- Clocking
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In order to adapt the following pmics, make the interface more compatible.
Support buck and ldo suspend voltage setting and getting.
Supprot buck and ldo suspend enable/disable setting and getting.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This script was only used on the MX1ADS board (and possibly other MX1
platforms) to program the flash. As we no longer have any boards for
that SoC, remove this tool.
Fixes: e570aca947 ("mx1ads: remove board support")
Signed-off-by: Tom Rini <trini@konsulko.com>
Due to the commit 4b0bcfa7c4 ("Kconfig: Migrate CONFIG_BOOTM_* options")
BOOTEFI and BOOTEFI_HELLO_COMPILE (and other BOOTEFI configs) are
displayed in a long distance. This will make it difficult for us to
understand that those configurations are closely related.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Rename the CONFIG_SECURE_BOOT name to CONFIG_NXP_ESBC to avoid
conflicts with UEFI secure boot.
Signed-off-by: Udit Agarwal <udit.agarwal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Add the SPI_FLASH_BAR for the ESPI controller of FSL, this entry
is missed by
commit 6d82517836 ("configs: Don't use SPI_FLASH_BAR as default")
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
While getting the 'subarg' of 'hwconfig' env variable in
config_core_prefetch(), if no hwconfig variable is defined,
below warning is received:
WARNING: Calling __hwconfig without a buffer and
before environment is ready
Fix this by checking 'hwconfig' env variable.
If not found return without further processing.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Tested-by: Michael Walle <michael@walle.cc>
Add the missing RGMII PHY modes in which case the MAC has configure its
RGMII settings. The only difference between these modes is the RX and
TX delay configuration. A user might choose any RGMII mode in the device
tree.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The saved ofnode is used by some PHY drivers to access the device tree
node of the PHY.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The fsl-layerscape already occupies board_late_init(), therefore it is
not possible for a board to have its own board_late_init(). Introduce
fsl_board_late_init() which can be implemented in the board specific
code.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The clocks are not dependent on the target but only on the SoC.
Therefore, convert the CONFIG_TARGET_x macros to the corresponding
CONFIG_ARCH_x. This will allow other targets to automatically use the
common code. Otherwise every new target would have to add itself to the
"#if defined(CONFIG_TARGET_x) || .." macros.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Erratum A-050382 states that the eDMA ICID programmed in the eDMA_AMQR
register in DCFG is not correctly forwarded to the SMMU.
The workaround consists in programming the eDMA ICID in the eDMA_AMQR
register in DCFG to 40.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
If SEC FW support is not enabled (ARMV8_SEC_FIRMWARE_SUPPORT=n), below
compilation error appears
arch/arm/include/asm/arch-fsl-layerscape/fsl_icid.h:169:4: error:
'CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT' undeclared here (not in a function)
Fix it by wrapping with CONFIG_IS_ENABLED().
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geanta <horia.geanta@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
If the secure world reset handlers are used (via CONFIG_PSCI_RESET),
then do not use the layerscape-specific implementation.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
This allows the use of PSCI calls to trusted firmware to
initiate reset and poweroff events with CONFIG_PSCI_RESET and
CONFIG_ARM_PSCI_FW. This is desirable, for example, if the target
board has implemented a custom reset or poweroff procedure in EL3.
Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
In ls_pcie_ep_enable_cfg(), as part of EP setup,config ready bit
of pci controller is set, so that RC can read the config space of EP.
While setting the config ready bit, LTSSM_EN bit in same register was
also inadvertently getting cleared. This restarts the link training
between RC and EP.
Update code to just set the desired CFG_READY bit (bit 0),
while leaving the other bits unchanged.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
The SPL FIT will only have one DTB, so remove support for multi-DTB. This
also removes an early access to EEPROM used to select the DTB that is not
valid in SPL at the point at which it is accessed, that always returns
false for GP devices and causes a firewall expection on HS.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
There is an option to enable the board detection for TI platforms.
If this is option is not set, there is no reason to set the EEPROM
bus address or chip address.
This patch makes both EEPROM_BUS_ADDRESS and EEPROM_CHIP_ADDRESS
depend on TI_I2C_BOARD_DETECT.
Signed-off-by: Adam Ford <aford173@gmail.com>
The SPL is too tight, and it cannot start any longer. To
help reduce the size of SPL, we need to remove some non-critical
features.
This patch removes SPL_GPIO_SUPPORT to free up some operating space.
Signed-off-by: Adam Ford <aford173@gmail.com>
The only GPIO bank needed in SPL is GPIO4 and the SPL space is tight.
This patch removes the all but GPIO4 from the spl device tree to
reduce the SPL footprint.
Signed-off-by: Adam Ford <aford173@gmail.com>
The SPL is too tight, and it cannot start any longer. To
help reduce the size of SPL, we need to remove some non-critical
features.
This reverts commit 66063a7c13.
Signed-off-by: Adam Ford <aford173@gmail.com>
The only GPIO bank needed in SPL is GPIO4 and the SPL space is tight.
This patch removes the all but GPIO4 from the spl device tree to
reduce the SPL footprint.
Signed-off-by: Adam Ford <aford173@gmail.com>
The PMIC enables power to the MMC card by default, but depending
on the state it was left when restarted, it's possible the MMC
may be powered down.
This patch patch explicitly tells the twl4030 to power the MMC.
Signed-off-by: Adam Ford <aford173@gmail.com>
TPS62363 is used to control the MPU_VDD voltage, so enable the driver
for this.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Add VTM node for voltage and thermal management. For u-boot, this is needed
for supporting AVS class 0, as the efuse values for the OPPs are stored
under the VTM.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Link the vdd-supplies for the voltage domains under the VTM node. Also,
enable the node under SPL. This will enable the AVS class 0 support on
am65x-evm board.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
MPU voltage on AM65x-evm is controlled via the TPS62363 chip attached
to i2c0 bus. Add device node for this so that it can be controlled via
a regulator driver.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Add VTM node for voltage and thermal management. For u-boot, this is needed
for supporting AVS class 0, as the efuse values for the OPPs are stored
under the VTM.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
j721e SoCs have different OPP tables. Add support for the same.
Note: DM Still has lot of voltages TBD hence the correct
values need to be programmed once they are published.
Signed-off-by: Keerthy <j-keerthy@ti.com>
TPS6236x is a family of step down DC-DC converters optimized for battery
powered portable applications for a small solution size. Add a regulator
driver for supporting these devices.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Adaptive Voltage Scaling is a technology used in TI SoCs to optimize
the operating voltage based on characterization data written to efuse
during production. Add a driver to support this feature for K3 line of
SoCs, initially for AM65x.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
That option is currently not used by any defconfig and could not be set
anymore since it became mandatory to used Kconfig when introducing new
options with U-Boot v2016.11 or commit eed921d923 ("Kconfig: Add a
whitelist of ad-hoc CONFIG options") and commit 371244cb19 ("Makefile:
Give a build error if ad-hoc CONFIG options are added").
It was also not considered when fixing build warnings in
commit 39ac34473f ("cmd_mtdparts: use 64 bits for flash size,
partition size & offset") and could probably not be compiled anyway
after commit dfe64e2c89 ("mtd: resync with Linux-3.7.1"), which
renamed some members of struct mtd_info … so it was probably broken
since then, which was U-Boot v2013.07-rc1.
However it still seems to work, see example output below:
U-Boot 2019.10-00035-g06a9b259ca-dirty (Oct 30 2019 - 14:03:44 +0100)
CPU: SAMA5D27 1G bits DDR2 SDRAM
Crystal frequency: 24 MHz
CPU clock : 492 MHz
Master clock : 164 MHz
Model: ***
DRAM: 128 MiB
NAND: 256 MiB
Loading Environment from NAND... OK
In: serial@f8020000
Out: serial@f8020000
Err: serial@f8020000
Net: eth0: ethernet@f8008000
Hit keys 'tt' to stop autoboot (3 seconds).
U-Boot> mtdparts
device nand0 <atmel_nand>, # parts = 8
#: name size net size offset mask_flags
0: bootstrap 0x00040000 0x00040000 0x00000000 1
1: uboot 0x000c0000 0x000c0000 0x00040000 1
2: env1 0x00040000 0x00040000 0x00100000 0
3: env2 0x00040000 0x00040000 0x00140000 0
4: fpga_led 0x00040000 0x00040000 0x00180000 1
5: reserved 0x00040000 0x00040000 0x001c0000 1
6: rootfs_rec 0x03200000 0x03200000 0x00200000 1
7: filesystem 0x0cc00000 0x0cb80000 (!) 0x03400000 0
active partition: nand0,0 - (bootstrap) 0x00040000 @ 0x00000000
defaults:
mtdids : nand0=atmel_nand
mtdparts: mtdparts=atmel_nand:256k(bootstrap)ro,768k(uboot)ro,256k(env1),256k(env2),256k(fpga_led)ro,256k(reserved)ro,50M(rootfs_rec)ro,-(filesystem)
Signed-off-by: Alexander Dahl <ada@thorsis.com>
This declaration is not used anywhere in the whole tree. There is a
function 'mtd_id_parse()' which was renamed from 'id_parse()' in
commit 68d7d65100 ("Separate mtdparts command from jffs2"), but that
function is not used (anymore?) in cmd nand and build is fine without
that declaration, so it's probably just safe to remove.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
As part of disabling caches MMU as well gets disabled. But MMU is not
available on all armv7 cores like R5F. So disable MMU only if it is
available.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
'make tests' on a 32bit ARM system leads to
In file included from ../common/cli_hush.c:79:
../include/malloc.h:364:7: error: conflicting types for ‘memset’
void* memset(void*, int, size_t);
^~~~~~
In file included from ../include/compiler.h:126,
from ../include/env.h:12,
from ../common/cli_hush.c:78:
../include/linux/string.h:103:15:
note: previous declaration of ‘memset’ was here
extern void * memset(void *,int,__kernel_size_t);
^~~~~~
In file included from ../common/cli_hush.c:79:
../include/malloc.h:365:7: error: conflicting types for ‘memcpy’
void* memcpy(void*, const void*, size_t);
^~~~~~
In file included from ../include/compiler.h:126,
from ../include/env.h:12,
from ../common/cli_hush.c:78:
../include/linux/string.h:106:15:
note: previous declaration of ‘memcpy’ was here
extern void * memcpy(void *,const void *,__kernel_size_t);
^~~~~~
According to the U-Boot coding style guide common.h should be the first
include.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When full malloc is enabled and SYS_MALLOC_F is also enabled, the simple
pre-reloc heap is used before relocation. In this case, calloc() uses
the MALLOC_ZERO macro to zero out the allocated memory. However, since
this macro is specially crafted for the dlmalloc implementation, it
does not always work for simple malloc.
For example, when allocating 16 bytes via simple malloc, only the first
12 bytes get zeroed out. The last 4 bytes will remain untouched.
This is a problem for DM drivers that are allocated before relocation:
memory allocated via 'platdata_auto_alloc_size' might not be set to
zero, resulting in bogus behaviour.
To fix this, use 'memset' instead of 'MALLOC_ZERO' to zero out memory
that compes from simple malloc.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
As SPL_SPI_FLASH_SUPPORT cannot work without SPL_SPI_SUPPORT, fix
dependencies to prevent enabling SPI flash support without basic SPI
support.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
The default implementation of ERR_PTR/PTR_ERR maps errno values at the
and of the address range (e.g. -EINVAL/-22 gets 0xFFFFFFEA).
For socfpga gen5 SPL, this doesn't really work, as the heap is nearly
at the end of the 32 bit address range.
This patch adjusts the ERR_PTR_OFFSET to map errno values into the range
of the Boot ROM, which should not be used for valid pointers.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
This patch changes ERR_PTR/PTR_ERR to use CONFIG_ERR_PTR_OFFSET to map
errno values into a pointer region that cannot contain valid pointers.
IS_ERR and IS_ERR_OR_NULL have to be converted to use PTR_ERR, too,
for this to work.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Some U-Boot pointers have redundant information, so we can use a scheme
where we can return either an error code or a pointer with the same
return value. The default implementation just casts the pointer to a
number, however, this may fail on platforms where the end of the address
range is used for valid pointers (e.g. 0xffffff00 is a valid heap pointer
in socfpga SPL). For such platforms, this value provides an upper range
of those error pointer values - up to 'MAX_ERRNO' bytes below this value
must be unused/invalid addresses.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Provide optimized memcpy_{from,to}io() and memset_io(). This is required
when moving large amount of data to and from IO regions such as IP
registers or accessing memory mapped flashes.
Code is borrowed from Linux Kernel v5.4.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
API_dev_write(va_list ap) is currently lacking the write support
to storage devices because, historically, those devices did not
implement block_write()
The solution has been tested by loading and booting a (patched)
GRUB instance in a QEMU vexpress-a9 environment. The disk write
operations were triggered with GRUB's save_env command.
Signed-off-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Now that we have again fixed the problems that building with clang
exposes, enable these tests on Azure and GitLab-CI as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
When using the OVERRIDE variable we need to pass -O to buildman as well
to use the "override" option to buildman.
Fixed: e9500f49ea ("travis: Use buildman for building with clang")
Signed-off-by: Tom Rini <trini@konsulko.com>
Newer versions of LLVM-7 will provide an unused function warning over
console_doenv() in the case of SYS_CONSOLE_IS_IN_ENV not being enabled
as can be the case in SPL. Add guards around this function.
Signed-off-by: Tom Rini <trini@konsulko.com>
Add a new bcdDevice entry for Cadence USB gadget controller similar to
other controller and add gadget_is_cdns3() macro as well.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add driver to handle TI specific wrapper for Cadence USB3 controller
present on J721e SoC. Based on Linux driver for the same.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Implement udc_set_speed() callback to limit Controller's speed to
high-speed/full-speed when working with gadgets that are high-speed or
full-speed only
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add support for USB3 host and gadget driver. This is a direct sync of
Linux kernel Cadence USB stack that from v5.4-rc1 release.
Driver has been modified so that it compiles without errors against
U-Boot code base.
Features not required for U-Boot such as scatter-gather DMA and OTG
interrupt handling has been dropped.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
[jjhiblot@ti.com: Add PHY support]
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This patch was copied from kernel commit: 67fdfda4a99ed.
Sometimes, the gadget driver we want to run has max_speed lower than
what the UDC supports. In such situations, UDC might want to make sure
we don't try to connect on speeds not supported by the gadget
driver because that will just fail.
So here introduce a new optional ->udc_set_speed() method which can be
implemented by interested UDC drivers to achieve this purpose.
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add match_ep() op to usb_gadget_ops similar to Linux kernel which is
useful in finding a suitable ep match for the function driver. This will
avoid adding more gadget_is_xxx() handling code to usb_ep_autoconfig().
Also sync usb_ep_caps struct thats is usually used in the match_ep()
callback by the gadget controller driver
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Import for_each_set_bit() and associated macros and functions from
Linux. This is useful in parsing interrupt registers and take action on
each bit that is set.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
imx targets are defined in arch/arm/mach-imx/Makefile.
Some of them are dependent on targets defined in main
Makefile. For the Makefile in arch/arm/mach-imx this
targets must be finished before the imx targets are
build, if not you get for example the error:
make -f /home/hs/abb/mainlining/u-boot/scripts/Makefile.build obj=arch/arm/mach-imx u-boot-dtb.imx
make[2]: *** No rule to make target 'u-boot-fit-dtb.bin', needed by 'u-boot-dtb.imx'. Stop.
make[1]: *** [/home/hs/abb/mainlining/u-boot/Makefile:1123: u-boot-dtb.imx] Error 2
make[1]: *** Waiting for unfinished jobs....
make[1]: Leaving directory '/work/hs/compile/u-boot/aristainetos2_defconfig'
make: *** [Makefile:148: sub-make] Error 2
compile failed
In above case of CONFIG_MULTI_DTB_FIT is defined, the
u-boot-dtb.imx is dependent on the u-boot-fit-dtb.bin
which may is not build yet ...
I could reproduce this error on a travis build also if
I build an out-of-tree build on a local machine with a
build directory on a "slow" slow storage device. If
building the same source target with a build dir on a
fast storage device, the build works.
I found no solution to tell the arch/arm/mach-imx/Makefile
to find the targets in main Makefile, if there is a way
this would be the better fix.
I solved it by adding a IMX_DEPS var, which holds a list
of main u-boot targets, which must be finished, before
calling imx targets and fixed the build for imx
targets which enabled CONFIG_MULTI_DTB_FIT.
I think it is just luck, that imx targets with
CONFIG_OF_SEPARATE enabled build, because the
u-boot-dtb.imx target depends on u-boot-dtb.bin
which gets build early enough before starting with
u-boot-dtb.imx. May this targets should be fixed too.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
add DM PCI support on the socrates board.
use PCIE_FSL now.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
add socrates device tree from linux:
commit 71ae5fc87c34 ("Merge tag 'linux-kselftest-5.2-rc1' of
git://git.kernel.org/pub/scm/linux/kernel/git/shuah/linux-kselftest")
and added SPDX license identifier.
Did not fix checkpatch warnings:
arch/powerpc/dts/socrates.dts:235: check: Please don't use multiple blank lines
arch/powerpc/dts/socrates.dts:238: error: code indent should use tabs where possible
Also, add me as board maintainer.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
add DM based PCI Configuration space access support for
MPC85xx PCI Bridge. This driver is based on
arch/powerpc/cpu/mpc85xx/pci.c
In the old driver there is a fix for a hw issue on the
TARGET_MPC8555CDS and TARGET_MPC8541CDS boards. As I
have no such hardware I did not port this part.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
With python3 we're now tripping over a long-standing problem with how we
add to the buildman file with some toolchains. We cannot have multiple
toolchain-alias sections as that leads to a parse error.
Signed-off-by: Tom Rini <trini@konsulko.com>
Update to latest libfdt and pylibfdt, with added size control
Update binman, dtoc, patman, buildman to Python 3
Update move_config, rkmux, microcode_tool to Python 3
Add more clks for fec_mxc according to Linux Kernel 5.4.0-rc1
drivers/net/ethernet/freescale/fec_main.c.
Since i.MX8MQ not support CLK_CCF, so add a check to restrict
the code only effect when CONFIG_IMX8M and CONFIG_CLK_CCF both defined.
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When CONFIG_$(SPL_)CLK not defined, the clock controller device
not exist, so to avoid boot failure for platform not have
CONFIG_$(SPL_)CLK, add a check.
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Tested-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add i.MX8MM ccf driver support.
Modifed from Linux Kernel 5.3.0-rc1, drop some entries
that not used in U-Boot and adapt to U-Boot CCF style.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Lukasz Majewski <lukma@denx.de>
The IVT offset is changed on i.MX8MN. Use ROM_VERSION to pass the
v1 or v2 to mkimage.
v1 is for iMX8MQ and iMX8MM
v2 is for iMX8M Nano (iMX8MN)
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX8MN support loading images with rom api, so we implement
reuse board_return_to_bootrom to let ROM loading images.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX8MN has similar architecture with i.MX8MM, so it could reuse
the clock code of i.MX8MM, but i.MX8MN has different CCM root
configurations, so need a separate root entry.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The power domain tree is not accepted by Linux Kernel upstream.
only a single pd node is used currently, as following:
pd: imx8qx-pd {
compatible = "fsl,imx8qm-scu-pd", "fsl,scu-pd";
#power-domain-cells = <1>;
};
So to migrate to use upstream linux dts, we also need a driver
to support this.
This patch is to support the new method, compared with legacy power
domain tree, it will be simpiler, because each device will
has resource id as power domain index, it will be directly passed
to scfw, and no need to let power domain build that tree. If multiple
power domain is needed, it is the dts node should has correctly power
domains entry added and sequence correct.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The current i.MX8 power domain driver is based on i.MX vendor
power domain tree which will retire later.
The Linux upstream use a single pd node for power domain driver,
and U-Boot will adopt that. When U-Boot i.MX8 dts synced with
Linux Kernel upstream and related driver ready, the legacy
driver will be removed.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
clk and pinctrl will be get(probed) during each device probe,
we don't need to probe them in scu driver. Only need to bind the sub-nodes
(clk and iomuxc) of MU node with their drivers.
So drop the code to probe the clk/pinctrl, and this patch will make it
easy to add more subnodes.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
lpuart0 is the uart used by SPL and U-Boot proper, and DM_SERIAL
is enabled. Since uclass power domain is also enabled, to make
lpuart work properly, need add u-boot,dm-spl for lpuart power domain
and its parent.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
lpuart0 is the uart used by SPL and U-Boot proper, and DM_SERIAL
is enabled. Since uclass power domain is also enabled, to make
lpuart work properly, need add u-boot,dm-spl for lpuart power domain
and its parent.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
with u-boot,dm-spl added for imx8qm-pm node, and SPL_SIMPLE_BUS enabled,
the bind and probe code in board file could be removed.
Also we need to enlarge SYS_MALLOC_F_LEN to avoid calloc fail.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
To enable HS400(ES) and UHS for imx8m platforms, update the driver data
to share with imx8qm esdhc_soc_data.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
During mmc initialization, there are several calls to mmc_set_clock
and mmc_set_ios. When mmc_power_off, the mmc->clock will be set,
but the imx driver will use 400KHz. So the following calls
to mmc_set_ios will set the clock several times which is redundant
in fsl_esdhc_imx driver. So let's simplify to remove redundant
clock settings.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The QorIQ eSDHC on all platforms supports checking write protect
state through register bit. So check it always.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
The fsl_esdhc_init() was actually to get configuration of mmc_config.
So rename it to fsl_esdhc_get_cfg_common() and make it common for both
DM_MMC and non-DM_MMC.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
This patch is to clean up bus width setting code.
- For DM_MMC, remove getting "bus-width" from device tree.
This has been done in mmc_of_parse().
- For non-DM_MMC, move bus width configuration from fsl_esdhc_init()
to fsl_esdhc_initialize() which is non-DM_MMC specific.
And fix up bus width configuration to support only 1-bit, 4-bit,
or 8-bit. Keep using 8-bit if it's not set because many platforms
use driver without providing max bus width.
- Remove bus_width member from fsl_esdhc_priv structure.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Voltage validation should be done by CMD8. Current comparison between
mmc_cfg voltages and host voltage capabilities is meaningless.
So drop current comparison and let voltage validation is through CMD8.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Controller initialization is not needed in fsl_esdhc_init().
It will be done in esdhc_init() for non-DM_MMC, and in
esdhc_init_common() in probe for DM_MMC.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Update this tool to use Python 3 to meet the 2020 deadline.
Unfortunately this introduces a test failure due to a problem in pylibfdt
on Python 3. I will investigate.
Signed-off-by: Simon Glass <sjg@chromium.org>
When preparing to possible expand or contract an entry we reset the size
to the original value from the binman device-tree definition, which is
often None.
This causes binman to forget the original size of the entry. Remember this
so that it can be used when needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function should use a void * type, not char *. This causes an error:
TypeError: in method 'fdt_property_stub', argument 3 of type 'char const *'
Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present patman test fail in some environments which don't use utf-8
as the default file encoding. Add this explicitly.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present all the 'command' methods return bytes. Most of the time we
actually want strings, so change this. We still need to keep the internal
representation as bytes since otherwise unicode strings might break over
a read() boundary (e.g. 4KB), causing errors. But we can convert the end
result to strings.
Add a 'binary' parameter to cover the few cases where bytes are needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Bring over the fdt from this commit:
430419c (origin/master) tests: fix some python warnings
adding in the 'assumptions' series designed to reduce code size.
Signed-off-by: Simon Glass <sjg@chromium.org>
This board appears to be very near its size limit and cannot accept the
new checking code in libfdt. Disable this code so this the board can
continue to build.
Signed-off-by: Simon Glass <sjg@chromium.org>
For better or worse libfdt recent grew a lot of code that checks the
validity of the device tree in great detail. When using unsigned or
unverified data this makes things safer, but it does add to code size.
Add some controls to select the trade-off between safety and code size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Unfortunately libfdt needs this value now, which is present in the
stdint.h header. That file is just a placeholder in U-Boot and these sorts
of constants appear in the linux/kernel.h header instead.
To keep libfdt happy, add INT32_MAX too.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Conver TI CPSW driver to use dev/ofnode api.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
[trini: Add <dm/ofnode.h> to provide the prototype to ofnode]
Signed-off-by: Tom Rini <trini@konsulko.com>
- Add support for Intel FSP-S and FSP-T in binman
- Correct priority selection for image loaders for SPL
- Add a size check for TPL
- Various small SPL/TPL bug fixes and changes
- SPI: Add support for memory-mapped flash
We have once again reached a point where this board does not build in
some cases with supported toolchains due to reaching a size constraint.
To regain some space, disable support for Plan 9 / RTEMS images with the
bootm command.
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Add subcommand for add writing BCB only, where we provide appropriate
offsets for firmware1 and firmware2 and size.
Example of usage:
> nandbcb bcbonly 0x00180000 0x00080000 0x00200000
Writing 1024 bytes to 0x0: randomizing
OK
Writing 1024 bytes to 0x20000: randomizing
OK
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
On i.MX7 in a sake of reducing the disturbances caused by a neighboring
cells in the FCB page in the NAND chip, a randomizer is enabled when
reading the FCB page by ROM bootloader.
Add API for setting BCH to specific layout (and restoring it back) used by
ROM bootloader to be able to burn it in a proper way to NAND using
nandbcb command.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Anti Sullin <anti.sullin@artecdesign.ee>
Tested-by: Max Krummenacher <max.krummenacher@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
We have once again reached a point where this board does not build in
some cases with supported toolchains due to reaching a size constraint.
To regain some space, disable support for Plan 9 / RTEMS images with the
bootm command.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
This commit adds support for the brppt2 board. The board is based on the
i.mx6 dual-lite SoC.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Borrow ID reading code from Ye Li (NXP U-Boot, commit ID 5b443e3e2617)
but drop imx-mkimage commit ID reading since we now use in tree mkimage.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Need to pass total 5 arguments for SIP HAB call on i.MX8MQ,
so update the interface to add new argument.
Signed-off-by: Ye Li <ye.li@nxp.com>
[agust: fixed imx8m-power-domain build]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Add function and new command "auth_cntr" for secure boot support.
When booting with life cycle set to OEM closed, we need to use
this function to authenticate the OS container and load kernel & FDT
from OS container to their destination.
Also add image authentication call when loading container images.
Users can set CONFIG_AHAB_BOOT=y to enable the feature. It is not
set at default.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable bd71837 pmic for i.MX8MM EVK board, need to set voltage for
DRAM and linux suspend voltage requirement.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
We are going to add i2c pmic support before dram could be used.
So we need enable clk driver earlier, so use spl_early_init
and move clock controller probe eariler to board_init_f.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
It will be easy to separate SD/EMMC when booting in SPL stage, then
no need to bother which device is BOOT_DEVICE_MMC1/2.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add init_nand_clk to enable gpmi nand clock. Since i.MX8MQ not use CCF,
so we still use legacy mode to configure the clock.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The i.MX8MQ B1 uses OCOTP_HW_OCOTP_READ_FUSE_DATA register for chip id.
It returns a magic number 0xff0055aa. update get_cpu_rev to support it,
and enable ocotp clock to access ocotp.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Migrate to DM_VIDEO, update the device tree and remove code that is no
longer necessary.
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
This updates the i.MX8MQ device trees and, necessarily, also the
i.MX8MQ clock bindings. These are taken verbatim from from the
Linux kernel version v5.4-rc2, which three small changes which
were already part of the previous device tree:
* Keep the PSCI reserved memory range
* Keep the alias for ethernet, so that the MAC address can be set
* Keep the modified #include for the IOMUXC pins
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Acked-by: Peng Fan <peng.fan@nxp.com>
This commit adds falcon boot support (by also copying args necessary for
booting) to the SPL NOR memory driver.
After this change it is possible to use the falcon boot in the same way
as on NAND memories. The necessary configs (i.e. CONFIG_CMD_SPL_NOR_OFS)
are now defined in Kconfig.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
The mccmon6 has been used a "mixed" approach between SPL and
U-Boot proper sources.
This commit decoupes SPL and u-boot proper, which allows clear
distinction between those two code bases and facilitates
conversion to DM/DTS on this particular board.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit converts mccmon6's u-boot proper (in a single commit to avoid
build breaks) to use solely DM/DTS.
The DTS description of the mccmon6 has been ported from Linux kernel
(v4.20, SHA1: 8fe28cb58bcb235034b64cbbb7550a8a43fd88be)
Signed-off-by: Lukasz Majewski <lukma@denx.de>
In order for 'bmode emmc' to work, the eMMC needs to be initialized in the
SPL. This change initializes the eMMC as BOOT_DEVICE_MMC1 (index=0).
Signed-off-by: Claudius Heine <ch@denx.de>
The board_boot_modes contained the wrong values for the emmc entry.
The eMMC here is connected over a 8-bit bus.
This change allows to use the 'bmode emmc' command to boot from emmc.
Signed-off-by: Claudius Heine <ch@denx.de>
The expire_now function was previously setting the watchdog timeout to
minimum and waiting for the watchdog to expire. However, this watchdog
also has bits to trigger immediate reset. Use those instead, like the
Linux imx2_wdt driver does.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
The Linux imx2_wdt driver uses a fsl,ext-reset-output boolean in the
device tree to specify whether the board design should use the external
reset instead of the internal reset. Use this boolean to determine which
mode to use rather than using external reset unconditionally.
For the legacy non-DM mode, the external reset is always used in order
to maintain the previous behavior.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Add u-boot,dm-pre-reloc properties for uart pinmux configuration
nodes, which enables UART as early as possible (before relocation).
Without this we miss almost the half of output (U-boot version,
CPU defails, Reset cause, DRAM details etc.).
Fixes: cd69e8ef9b ("colibri-imx6ull: migrate pinctrl and regulators to dtb/dm")
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Introduce imx6ull-colibri-u-boot.dtsi for u-boot specific properties to
keep original imx6ull-colibri.dts in sync with Linux.
Move all contents of imx6ull-colibri.dts to imx6ull-colibri.dtsi +
additionally fix checkpatch warnings.
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
According to IMX28CEC rev. 4, 10/2018, Table 15. Recommended Operating
Conditions, page 16, the VDDD should be set to 1.55V when the CPU is
operating at 454MHz. This is the case in U-Boot, hence increase the
VDDD voltage. This fixes instability when performing TFTP transfers.
Increase the brownout threshold to 1.4V. The documentation recommends
1.45V setting for the brownout, however, this triggers failure during
power block init, so keep the brownout slightly lower.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
imx6_is_bmode_from_gpr9 always returns false, because
IMX6_SRC_GPR10_BMODE is 1<<28 and gets casted to u8 on return.
This moves the function body into imx6_src_get_boot_mode, since that is the
only one using it and it is on the same abstraction level (accessing
registers directly).
Signed-off-by: Claudius Heine <ch@denx.de>
After the following commit:
commit 772b55723b ("imx: Introduce CONFIG_SPL_FORCE_MMC_BOOT to force MMC
boot on falcon mode")
it is possible to set the CONFIG_SPL_FORCE_MMC_BOOT flag, which allows
using MMC device as boot device regardless of the device used by Boot ROM
(FBL) as the first boot medium.
Display5 board needs this flag set to allow falcon boot from eMMC device.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Now AM65x CPSW2G driver will disable MAC TX internal delay for PHY
interface mode "rgmii-rxid" which is incorrect. Hence, fix it by keeping
default value (enabled) for MAC TX internal delay when "rgmii-rxid"
interface mode is selected.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Now TI CPSW driver will disable MAC TX internal delay for PHY interface
mode "rgmii-rxid" which is incorrect.
Hence, fix it by keeping default value (enabled) for MAC TX internal delay
when "rgmii-rxid" interface mode is selected.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
This patch adds support for standard Ethernet "max-speed" DT property to
allow PHY link speed limitation.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
According to TRMs the 10Mbps link speed is supported in RGMII only when
CPSW2G MAC SL is configured for External Control ("in band") mode
CPSW_SL_MACCTRL.EXT_EN(18) = 1.
Hence update cpsw_slave_update_link() to follow documentation.
[1] https://patchwork.kernel.org/patch/10285239/
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Introduce disable_ipu_clock(). This is done in preparation for
configuring the NoC registers on i.MX6QP in SPL.
Afer the NoC registers are set the IPU clocks can be disabled.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The code can be made simpler by using setbits_le32(), so switch
to it.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
We already a message indicating that U-Boot is about to jump to SPL, so
make this one a debug() to reduce code size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We don't need to do this and it is done (in more detail) in U-Boot proper.
Drop this to save code space.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present we call spl_init() before identifying the CPU. This is not a
good idea - e.g. if bootstage is enabled then it will try to set up the
timer which works better if the CPU is identified.
Put explicit code at each entry pointer to identify the CPU.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
For TPL we only need to set up the features and identify the CPU to a
basic level. Add a function to handle that.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
In TPL we try to minimise code size so do not include the PCI subsystem.
We can use fixed BARs and drivers can directly program the devices that
they need.
However we do need to bind the devices on the PCI bus and without PCI this
does not ordinarily happen. As a work-around, define a fake PCI bus which
does this binding, but no other PCI operations. This is a convenient way
to ensure that we can use the same device tree for TPL, SPL and U-Boot
proper:
TPL - CONFIG_TPL_PCI is not set (no auto-config, fake PCI bus)
SPL - CONFIG_SPL_PCI is set (no auto-config but with real PCI bus)
U-Boot - CONFIG_PCI is set (full auto-config after relocation)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The x86 power unit handles power management. Support initing this device
which is modelled as a new type of system controller since there are no
operations needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the value of the timer base is used to determine whether the
timer has been set up or not. It is true that the timer is essentially
never exactly 0 when it is read. However 'time 0' may indicate the time
that the machine was reset so it is useful to be able to denote that.
Update the code to use a separate flag instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This function can be called before the timer is set up. Make sure that the
init function is called so that it works correctly.
This is needed so that bootstage can work correctly in TPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We have the ability to enforce a maximum size for SPL but not yet for TPL.
Add a new option for this.
Document the size check macro while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a note about the driver name in the of-platdata documentation since
the naming must follow the compatible string.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
On x86 platforms the SPI flash can be mapped into memory so that the
contents can be read with normal memory accesses.
Add a new SPI method to find the location of the SPI flash in memory. This
differs from the existing device-tree "memory-map" mechanism in that the
location can be discovered at run-time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the name of the image comes first in the linker-list symbol
used. This means that the name of the function sets the sort order, which
is not the intention.
Update it to put the boot-device type first, then the priority. This
produces the expected behaviour.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This entry is used to hold an Intel FSP-T (Firmware Support Package
Temp-RAM init) binary. Add support for this in binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This entry is used to hold an Intel FSP-S (Firmware Support Package
Silicon init) binary. Add support for this in binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present binman adds the image base address to the symbol value before
it writes it to the binary. This is not correct since the symbol value
itself (e.g. image position) has no relationship to the image base.
Fix this and update the tests to cover this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With the __packed attribute sandbox_defconfig cannot be compiled with GCC
9.2.1:
fs/cbfs/cbfs.c: In function ‘file_cbfs_fill_cache’:
fs/cbfs/cbfs.c:164:16: error: taking address of packed member of
‘struct cbfs_cachenode’ may result in an unaligned pointer value
[-Werror=address-of-packed-member]
164 | cache_tail = &new_node->next;
| ^~~~~~~~~~~~~~~
struct cbfs_cachenode is only an internal structure. So let's rearrange the
fields such that the structure is naturally packed and remove the __packed
attribute.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
ARC fixes for v2020.01-rc2
The main change is move to DM_MMC of yet 2 another ARC boards:
AXS101 & IoTDK.
Among that we improve handling of stock-formatted SD-cards of high volume
on EM SDP as well as introduction of reset driver for HSDK which is required
for prepser reinitialization of some peripherals like USB etc.
Similar to 90d3d78a1c ("gitlab-ci: Prepend to PATH rather than replace
it") we need to prepend the PATH with our additional binaries and not
replace the value fully as doing so breaks virtualenv.
Signed-off-by: Tom Rini <trini@konsulko.com>
Back in the day on early board samples built-in Digilent JTAG probe
was not functional so we used externally attached Ashling Opella-XD
probe. But now with production units everything works as expected and
so we anybody may enjoy readily avaialble built-in JTAG probe so
we specify Digilent oprion on MDB's command line example.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Some especially large SD-cards come from stock formatted with
larger FAT cluster size so to accommodate those we just increase
what we expect to have here in U-Boot given we have a plenty of
space on EM SDP (16 MiB).
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Pull request for UEFI sub-system for efi-2020-01-rc2
Provide a better user interface for setting UEFI variables.
Bug fixes:
- ext4 file system not discovered on UEFI block device
- 'make tests' build error on 32bit systems
Similar to the rework for GitLab-CI and Travis-CI, rework the Azure
Pipeline to use python3 and requirements.txt to install the necessary
modules.
Signed-off-by: Tom Rini <trini@konsulko.com>
Add optional parameter to 'avb verify' sub-command, so that user is able
to specify which slot to use, in case when user's partitions are
slotted. If that parameter is omitted, the behavior of 'avb verify' will
be the same as before, so user API is content.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Acked-by: Igor Opaniuk <igor.opaniuk@gmail.com>
After updating libavb to most recent version from AOSP/master, two new
warnings appear:
Warning #1:
lib/libavb/avb_cmdline.c: In function 'avb_append_options':
lib/libavb/avb_cmdline.c:365:15: warning: 'dm_verity_mode' may be
used uninitialized in this function
[-Wmaybe-uninitialized]
new_ret = avb_replace(
^~~~~~~~~~~~
slot_data->cmdline, "$(ANDROID_VERITY_MODE)", dm_verity_mode);
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
lib/libavb/avb_cmdline.c:374:8: warning: 'verity_mode' may be used
uninitialized in this function
[-Wmaybe-uninitialized]
if (!cmdline_append_option(
^~~~~~~~~~~~~~~~~~~~~~
slot_data, "androidboot.veritymode", verity_mode)) {
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Warning #2:
lib/libavb/avb_slot_verify.c: In function 'avb_slot_verify':
lib/libavb/avb_slot_verify.c:1349:23: warning: 'ret' may be used
uninitialized in this function
[-Wmaybe-uninitialized]
AvbSlotVerifyResult ret;
^~~
Fix those by providing default return values to affected functions.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Update libavb to commit 5fbb42a189aa in AOSP/master, because new version
has support for super partition [1], which we need for implementing
Android dynamic partitions. All changes from previous patches for libavb
in U-Boot are accounted for in this commit:
- commit ecc6f6bea6 ("libavb: Handle wrong hashtree_error_mode in
avb_append_options()")
- commit 897a1d947e ("libavb: Update SPDX tag style")
- commit d8f9d2af96 ("avb2.0: add Android Verified Boot 2.0 library")
Tested on X15:
## Android Verified Boot 2.0 version 1.1.0
read_is_device_unlocked not supported yet
read_rollback_index not supported yet
read_is_device_unlocked not supported yet
Verification passed successfully
AVB verification OK.
Unit test passes:
$ ./test/py/test.py --bd sandbox --build -k test_avb
test/py/tests/test_android/test_avb.py ss..s.
[1] 49936b4c01
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Eugeniu Rosca <rosca.eugeniu@gmail.com>
Acked-by: Igor Opaniuk <igor.opaniuk@gmail.com>
When running the following command
mkimage -f auto -A arm -O linux -T kernel -C none -a 0x8000 -e 0x8000 \
-d zImage -b zynq-microzed.dtb -i initramfs.cpio image.ub
the type of fdt subimage is the same as of the main kernel image and
the architecture of the initramfs image is not set. Such an image is
refused by U-Boot when booting. This commits sets the mentioned
attributes, allowing to use the "-f auto" mode in this case instead of
writing full .its file.
Following is the diff of mkimage output without and with this commit:
FIT description: Kernel Image image with one or more FDT blobs
Created: Thu Sep 12 23:23:16 2019
Image 0 (kernel-1)
Description:
Created: Thu Sep 12 23:23:16 2019
Type: Kernel Image
Compression: uncompressed
Data Size: 4192744 Bytes = 4094.48 KiB = 4.00 MiB
Architecture: ARM
OS: Linux
Load Address: 0x00008000
Entry Point: 0x00008000
Image 1 (fdt-1)
Description: zynq-microzed
Created: Thu Sep 12 23:23:16 2019
- Type: Kernel Image
+ Type: Flat Device Tree
Compression: uncompressed
Data Size: 9398 Bytes = 9.18 KiB = 0.01 MiB
Architecture: ARM
- OS: Unknown OS
- Load Address: unavailable
- Entry Point: unavailable
Image 2 (ramdisk-1)
Description: unavailable
Created: Thu Sep 12 23:23:16 2019
Type: RAMDisk Image
Compression: Unknown Compression
Data Size: 760672 Bytes = 742.84 KiB = 0.73 MiB
- Architecture: Unknown Architecture
+ Architecture: ARM
OS: Linux
Load Address: unavailable
Entry Point: unavailable
Default Configuration: 'conf-1'
Configuration 0 (conf-1)
Description: zynq-microzed
Kernel: kernel-1
Init Ramdisk: ramdisk-1
FDT: fdt-1
Loadables: kernel-1
Signed-off-by: Michal Sojka <michal.sojka@cvut.cz>
For some controllers PHYs can be optional. Handling NULL pointers without
crashing nor failing, makes it easy to handle optional PHYs.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
malloc_cache_aligned() might return zero, so fix potential NULL pointer
access if __GFP_ZERO flag is set.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Add a simple implementation of this function, to allow logging to be
enabled in the SPL or TPL for systems that rely on the tiny printf()
implementation.
To keep the code size small,
- The function is built only when logging is enabled, as it
(currently) is not needed otherwise; and
- Like the existing implementation of snprintf(), its buffer-size
parameter is ignored.
Signed-off-by: Simon South <simon@simonsouth.net>
In cmd/regulator.c an error occurs with GCC 9.2.1 if CONFIG_ERRNO_STR is
not defined:
cmd/regulator.c: In function ‘failure’:
cmd/regulator.c:20:2: error: ‘%s’ directive argument is null
[-Werror=format-overflow=]
20 | printf("Error: %d (%s)\n", ret, errno_str(ret));
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
In function ‘constraint’,
inlined from ‘constraint’ at cmd/regulator.c:111:12:
cmd/regulator.c:115:3: error: ‘%s’ directive argument is null
[-Werror=format-overflow=]
115 | printf(" %s (err: %d)\n", errno_str(val), val);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
errno_str() should return a valid string instead of NULL if
CONFIG_ERRNO_STR is not defined.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Macro ERRNO_MSG() ignores the error number but we should still use the same
constants as in include/linux/errno.h.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This choice is not about SPL for which we have a separate choice.
Fixes: 95f4bbd581 ("lib: fdt: Allow LZO and GZIP DT compression in U-Boot")
Cc: Marek Vasut <marek.vasut+renesas@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
The signature 0x55 0xAA in bytes 510 and 511 of the first sector can either
indicate a DOS partition table of the first sector of a FAT file system.
The current code tries to check if the partition table is valid by looking
at the boot indicator of the partition entries. But first of all it does
not count from 0 to 3 but only from 0 to 2. And second it misses to
increment the pointer for the partition entry.
If it is a FAT file system can be discovered by looking for the text 'FAT'
at offset 0x36 or 'FAT32' at offset 0x52. In a DOS PBR there are no
partition entries, so those bytes are undefined. Don't require the byte at
offset 0x1BE to differ from 0x00 and 0x80.
With the patch the logic is changed as follows:
If the partition table has either an invalid boot flag for any partition or
has no partition at all, check if the first sector is a DOS PBR by looking
at the FAT* signature.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide a unit test for errno_str(). Test that known and unknown error
numbers are handled correctly.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
If errno_str() is called with an unsupported error number, do not return a
random pointer but a reasonable text.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Make sure that the PCI busses are enumerated before trying to
find a NVMe device.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Change the stack-allocated buffer for the identification command
to explicitly allocate page-aligned buffers. Even though the spec
seems to allow having admin queue commands on non page-aligned
buffers, it seems to not be possible on my i.MX8MQ board with a
a Silicon Power P34A80. Since all of the NVMe drivers I have seen
always do admin commands on a page-aligned buffer, which does work
on my system, it makes sense for us to do that as well.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It's possible that the data cache for the buffer still holds data
to be flushed to memory, since the buffer was probably used as stack
before. Thus we need to make sure to flush it also on reads, since
it's possible that the cache is automatically flused to memory after
the NVMe DMA transfer happened, thus overwriting the NVMe transfer's
data. Also add a missing dcache flush for the prp list.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Update from upstream.
Just minor changes like checking that the author has also done a sign-off.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Profiling the EHCI driver shows a significant performance problem in
ehci_submit_async(). Specifically, this function keeps enabling and
disabling async schedule back and forth for every single transaction.
However, enabling/disabling the async schedule does not take effect
immediatelly, but instead may take up to 1 mS (8 uFrames) to complete.
This impacts USB storage significantly, esp. since the recent reduction
of maximum transfer size to support more USB storage devices. This in
turn results in sharp increase in the number of ehci_submit_async()
calls. Since one USB storage BBB transfer does three such calls and
the maximum transfer size is 120 kiB, the overhead is 6 mS per 120 kiB,
which is unacceptable.
However, this overhead can be removed simply by keeping the async
schedule running. Specifically, the first transfer starts the async
schedule and then each and every subsequent transfer only adds a new
QH into that schedule, waits until the QH is completed and does NOT
disable the async schedule. The async schedule is stopped only by
shutting down the controller, which must happen before moving out
of U-Boot, otherwise the controller will corrupt memory.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Clear the USB_READY flag in the storage driver only in case there
is an error, otherwise usb_stor_BBB_transport() waits 5 mS before
doing anything every single time.
This is because the USB_READY flag is only ever set in
usb_test_unit_ready(), which is called only upon storage device
probe, not between each and every request. However, the device
cannot move out of USB_READY state once it was initialized.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Due to constant influx of more and more weird and broken USB sticks,
do as Linux does in commit 779b457f66e10de3471479373463b27fd308dc85
usb: storage: scsiglue: further describe our 240 sector limit
Just so we have some sort of documentation as to why
we limit our Mass Storage transfers to 240 sectors,
let's update the comment to make clearer that
devices were found that would choke with larger
transfers.
While at that, also make sure to clarify that other
operating systems have similar, albeit different,
limits on mass storage transfers.
And reduce the maximum transfer length of USB storage to 120 kiB.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Add weak callback to allow board specific behavior
- flush
- initiated
This patch prepare usage of DFU back end for communication with
STM32CubeProgrammer on stm32mp1 platform with stm32prog command.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add a virtual DFU backend to allow board specific read and write
(for OTP update for example).
Acked-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add the support of MTD partition for the MTD backend.
The expected dfu_alt_info for one alternate on the mtd device :
<name> part <part_id>
<name> partubi <part_id>
"partubi" also erase up to the end of the partition after write operation.
For example: dfu_alt_info = "spl part 1;u-boot part 2; UBI partubi 3"
U-Boot> dfu 0 mtd nand0
Acked-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add DFU backend for MTD device: allow to read
and write on all MTD device (NAND, SPI-NOR,
SPI-NAND,...)
For example :
> set dfu_alt_info "nand_raw raw 0x0 0x100000"
> dfu 0 mtd nand0
This MTD backend provides the same level than dfu nand
backend for NAND and dfu sf backend for SPI-NOR;
So it can replace booth of them but it also
add support of spi-nand.
> set dfu_alt_info "nand_raw raw 0x0 0x100000"
> dfu 0 mtd spi-nand0
The backend code is based on the "mtd" command
introduced by commit 5db66b3aee ("cmd: mtd:
add 'mtd' command")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch allows the DFU backend to indicate that that it can't
provide no more data to fill the DFU buffer, by setting b_left =0
without error, even if the size of received data is lower of the
expected total size indicated by get_medium_size.
For USB DFU stack point of view, it is acceptable:
the read length < requested size in DFU_UPLOAD and the
transaction is stopped.
That avoid infinite loop issue in dfu_read_buffer_fill because the
size for the DFU read is limited by get_medium_size = r_left
and the DFU stack expects that read is allowed up to this size.
This issue never occurs for current flash device (where chunk are
always completely read, and b_left will be never 0) but it is useful for
virtual partition when the backend only know the max size of this
alternate, the real size of the data are only known in the read
treatment.
PS: for file access on mmc, EOF is never reached as
dfu_get_medium_size_mmc returns the exact size of the file.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add support of DFU for several interface/device
with one command.
The format for "dfu_alt_info" in this case is :
- <interface> <dev>'='alternate list (';' separated)
- each interface is separated by '&'
The previous behavior is always supported.
One example for NOR (bootloaders) + NAND (rootfs in UBI):
U-Boot> env set dfu_alt_info \
"sf 0:0:10000000:0=spl part 0 1;u-boot part 0 2; \
u-boot-env part 0 3&nand 0=UBI partubi 0,3"
U-Boot> dfu 0 list
DFU alt settings list:
dev: SF alt: 0 name: spl layout: RAW_ADDR
dev: SF alt: 1 name: ssbl layout: RAW_ADDR
dev: SF alt: 2 name: u-boot-env layout: RAW_ADDR
dev: NAND alt: 3 name: UBI layout: RAW_ADDR
U-Boot> dfu 0
$> dfu-util -l
Found DFU: [0483:5720] ver=9999, devnum=96, cfg=1,\
intf=0, alt=3, name="UBI", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=96, cfg=1,\
intf=0, alt=2, name="u-boot-env", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=96, cfg=1,\
intf=0, alt=1, name="u-boot", serial="002700333338511934383330"
Found DFU: [0483:5720] ver=9999, devnum=96, cfg=1,\
intf=0, alt=0, name="spl", serial="002700333338511934383330"
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Copy the partition support from NAND backend to SF,
support part and partubi option.
In case of ubi partition, erase the rest of the
partition as it is mandatory for UBI.
The added code is under compilation flag CONFIG_DFU_SF_PART
activated by default.
for example:
U-Boot> env set dfu_alt_info "spl part 0 1;\
u-boot part 0 2;u-boot-env part 0 3;UBI partubi 0 4"
U-Boot> dfu 0 sf 0:0:10000000:0
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Calling cache flush on invalid buffer, even with zero length might cause
an exception on certain platforms.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Add possibility to define a part of partition as a separate DFU entity.
This allows to have more than one items on the given partition.
The real use case for this option is TM2 board. It can use u-boot stored
as Linux kernel on the defined partition (as RAW data) and load the real
kernel from the same partition, but stored under the certain offset.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
'THOR' download command requires DFU infrastructure to properly flash
board images. It can be used without enabling DFU command, so add such
dependency to Kconfig.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
This is needed to make Windows THOR flash tool happy, because it
starts sending data only when interrupt packet is received on the 3rd
endpoint.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
In combination with multiple partitions in NAND, this printf() ends up
being more noise than helpful. Change it to debug() instead.
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Acked-by: Lukasz Majewski <lukma@denx.de>
Some boards don't populate clk/reset entries as these are are optional
as per binding documentation. Therefore, don't fail driver probe if
clk/reset entries are absent in DT.
This fixes fastboot failures seen due to enabling of CONFIG_CLK on AM57xx
Fixes: e8e683d33b ("board: ti: am57xx-idk: Configure the CDCE913 clock synthesizer")
Reported-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Some configurations (i.e. sandbox) result in unused
splash_display_banner() and we get build errors like:
common/splash.c:148:20: error: unused function 'splash_display_banner' [-Werror,-Wunused-function]
static inline void splash_display_banner(void) { }
Drop empty inline function and add guards around the call.
Fixes: d2a8271c88 ("splash: fix splash banner output")
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reported-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
As initially this feature was implemented as a negative CONFIG and
later it was redesigned to be positive the help text should be
updated to reflect this change.
This commit updates the help text to match the current implementation.
Signed-off-by: Walter Lozano <wlozano@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When we have an excess size growth, fix the "limit" printf call to pass
in just the limit variable rather than the string bytes to the format
character.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
_gpio_direction_output function currently calls gpio_set_value
with the wrong gpio number. gpio_set_value in the uclass driver
expects a different gpio number and the _gpio_direction_output
is currently providing the number specific to the bank.
Hence fix it by calling the _gpio_set_value function instead.
Reported-by: Faiz Abbas <faiz_abbas@ti.com>
Fixes: 8e51c0f254 ("dm: gpio: Add DM compatibility to GPIO driver for Davinci")
Signed-off-by: Keerthy <j-keerthy@ti.com>
We have two further uses of raw string usage in the test/py codebase
that are used under CI. The first of which is under the bind test and
is a direct update. The second of which is to strip VT100 codes from
the match buffer. While switching this to a raw string is also a direct
update, the comment it notes that problems were encountered on Ubuntu
14.04 (and whatever Python 2 version that was) that required slight
tweaks to the regex. Replace that now that we're saying Python 3.5 is
the minimum.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>
As things stand today, we have tools that CI requires where "python"
must be "python2". We need to use a virtualenv and pip in order to
ensure that our pytest tests can be run. Rework things slightly so
that:
- On Travis-CI, we install python-pyelftools for the platforms that
require pyelftools to be installed.
- On GitLab-CI, we move to a newer base image that includes python3-pip
and continue to use a virtualenv per job that needs it, for the
correct set of packages.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>
To be more closely aligned with Python community best practices, we need
to better document our usage of pip and make use of a requirements.txt
file that shows the versions of the tools that we are using. This will
aide in ensuring reproducibility of our tests as well.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>
Now that we have moved to being based on pytest for python3 we need to
make our test.py wrapper more robust in terms of only calling python3
rather than possibly finding and using python2. To do this, change from
execvp()'ing pytest to invoking the package itself via python. In the
event that pytest is unavailable we still get a user-friendly error:
pkg_resources.DistributionNotFound: The 'pytest' distribution was not found and is required by the application
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>
The check_output function from the subprocess Python module by default
returns data as encoded bytes and leaves decoding to the application.
Given our uses of the call, it makes the most sense to immediately
decode the results.
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>
- In python 3 you must use raw strings for regex as other forms are
deprecated and would require further changes to the pattern here.
In one case this lets us have a simpler match pattern.
- As strings are now Unicode our complex tests (Euro symbol,
SHIFT+ALT+FN 5) we need to declare that as a bytes string and then
decode it for use.
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>
In the case of some unit tests we are working with providing a fake
flash device that we have written some text strings in to. In this case
we want to tell Python to encode things to bytes for us.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>
- Modern pytest is more visible in telling us about parameters that we
had not described, so describe a few more.
- ConfigParser.readfp(...) is now configparser.read_file(...)
- As part of the "strings vs bytes" conversions in Python 3, we use the
default encoding/decoding of utf-8 but in some places tell Python to
replace problematic conversions rather than throw a fatal error.
- Fix a typo noticed while doing the above ("tot he" -> "to the").
- As suggested by Stephen, re-alphabetize the import list
- Per Heinrich, replace how we write contents in test_fit.py
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>
Use the 2to3 tool to perform numerous automatic conversions from Python
2 syntax to Python 3. Also fix whitespace problems that Python 3
catches that Python 2 did not.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>
Fix the following spit from pytest:
u-boot/test/py/conftest.py:438: RemovedInPytest4Warning: MarkInfo objects are deprecated as they contain merged marks which are hard to deal with correctly.
Please use node.get_closest_marker(name) or node.iter_markers(name).
Docs: https://docs.pytest.org/en/latest/mark.html#updating-code
for board in mark.args:
In both cases, the later suggestion is applicable.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Igor Opaniuk <igor.opaniuk@gmail.com>
[trini: Update for current file with a few more cases, un-pin pytest in CI]
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
We inconsistently note multiple dependencies today in our tests,
sometimes with a single line that declares multiple and sometimes
multiple single lines. Current pytest seems to fail on the single line
format so change to multiple declarations.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Tested-by: Simon Glass <sjg@chromium.org> [on sandbox]
Signed-off-by: Tom Rini <trini@konsulko.com>
Currently we set the entire PATH rather than prepend the new paths that
we need to have searched. This however breaks parts of the "virtualenv"
that was have set up and need to use as that also will be modifying
PATH. To fix this, prepend our new locations instead.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
In a number of our stanzas we had multi-line commands that were one
space short of alignment, correct this.
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
- Add I2C clocks for i.MX6Q CCF driver
- Fix check in clk_set_default_parents()
- Managed API to get clock from device tree
- Fixes for core clock code (including sandbox regression tests)
'make tests' on an 32bit ARM system leads to
In file included from ../lib/efi_loader/efi_variable.c:9:
../include/malloc.h:364:7: error: conflicting types for ‘memset’
void* memset(void*, int, size_t);
^~~~~~
In file included from ../include/compiler.h:126,
from ../include/env.h:12,
from ../lib/efi_loader/efi_variable.c:8:
../include/linux/string.h:103:15:
note: previous declaration of ‘memset’ was here
extern void * memset(void *,int,__kernel_size_t);
^~~~~~
In file included from ../lib/efi_loader/efi_variable.c:9:
../include/malloc.h:365:7: error: conflicting types for ‘memcpy’
void* memcpy(void*, const void*, size_t);
^~~~~~
In file included from ../include/compiler.h:126,
from ../include/env.h:12,
from ../lib/efi_loader/efi_variable.c:8:
../include/linux/string.h:106:15:
note: previous declaration of ‘memcpy’ was here
extern void * memcpy(void *,const void *,__kernel_size_t);
^~~~~~
Use common.h as first include as recommended by the U-Boot coding style
guide.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
With this patch, when setting UEFI variable with "env set -e" command,
we will be able to
- specify vendor guid with "-guid guid",
- specify variable attributes, BOOTSERVICE_ACCESS, RUNTIME_ACCESS,
respectively with "-bs" and "-rt",
- append a value instead of overwriting with "-a",
- use memory as variable's value instead of explicit values given
at the command line with "-i address,size"
If guid is not explicitly given, default value will be used.
Meanwhile, "env print -e," will be modified so that it will NOT dump
a variable's value if '-n' is specified.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This expands current Azure Pipelines Windows host tools build
testing to cover all the CI testing in gitlab and travis CI.
Note for some unknown reason, the 'container' cannot be used for
any jobs that have buildman, for buildman does not exit properly
and hangs the job forever. As a workaround, we manually call
docker to run the image to perform the CI tasks.
A complete run on Azure Pipelines takes about 2 hours and 10
minutes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present some boards generate kwbimage.cfg in the source tree
during the build. This breaks buildman testing on some systems
where the source tree is read-only. Update makefile rules to
generate it in the build tree instead.
Note some other boards have the kwbimage.cfg file written in
advance, hence we need check if the file exists in the build
tree first, otherwise we fall back to one in the source tree.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the 'Make' function, the codes tries to create a directory
if current stage is 'build'. But the directory isn't used at
all anywhere.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
buildman always generates boards.cfg in the U-Boot source tree.
When '-o' is given, we should generate boards.cfg to the given
output directory.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
On i.MX8, when booting from eMMC boot partition, the whole flash.bin
is stored in boot partition, however SPL switches to user partition
during the init of mmc driver:
spl_mmc_load() -> mmc_init()
Then it tries to load the container image in
spl_mmc_get_uboot_raw_sector(), but here it reads the data from user
partition and the header is not recognized as a valid header.
So we move spl_mmc_get_uboot_raw_sector after eMMC partition switch
to address this issue.
Anyway put spl_mmc_get_uboot_raw_sector before eMMC partition switch
is not correct, so let's move it after eMMC partition switch.
Reported-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
A previous patch below adding DDR mode support was actually for i.MX
platforms. Now i.MX eSDHC driver is fsl_esdhc_imx.c. For QorIQ eSDHC,
it uses different process for DDR mode, and hasn't been supported.
Let's drop DDR support code for i.MX in fsl_esdhc driver.
0e1bf61 mmc: fsl_esdhc: Add support for DDR mode
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
U-boot prefers DM_MMC + BLK for MMC. Now eSDHC driver has already
support it, so let's force to use it.
- Drop non-BLK support for DM_MMC introduced by below patch.
66fa035 mmc: fsl_esdhc: fix probe issue without CONFIG_BLK enabled
- Support only DM_MMC + BLK (assuming BLK is always enabled for DM_MMC).
- Use DM_MMC instead of BLK for conditional compile.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
When building U-Boot host tools for Windows from Microsoft Azure
Pipelines, the following errors were seen:
HOSTCC tools/mkenvimage.o
In file included from tools/mkenvimage.c:25:
./tools/version.h:1:1: error: expected identifier or ‘(’ before ‘.’ token
1 | ../include/version.h
| ^
tools/mkenvimage.c: In function ‘main’:
tools/mkenvimage.c:117:4: warning: implicit declaration of function ‘usage’ [-Wimplicit-function-declaration]
117 | usage(prg);
| ^~~~~
tools/mkenvimage.c:120:35: error: ‘PLAIN_VERSION’ undeclared (first use in this function)
120 | printf("%s version %s\n", prg, PLAIN_VERSION);
| ^~~~~~~~~~~~~
tools/mkenvimage.c:120:35: note: each undeclared identifier is reported only once for each function it appears in
make[2]: *** [scripts/Makefile.host:114: tools/mkenvimage.o] Error 1
It turns out tools/version.h is a symbolic link and with Windows
default settings it is unsupported hence the actual content of
tools/version.h is not what file include/version.h has, but the
the linked file path, which breaks the build.
To fix this, remove the symbolic links for tools/version.h. Instead
we perform a copy from include/version.h during the build.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
When building U-Boot host tools for Windows from Microsoft Azure
Pipelines, we see tons of weird warnings and errors emitted from
every Kconfig files:
Kconfig:6:warning: ignoring unsupported character ''
Kconfig:6:warning: ignoring unsupported character ''
Kconfig:8:warning: ignoring unsupported character ''
Kconfig:9:warning: ignoring unsupported character ''
Kconfig:10:warning: ignoring unsupported character ''
Kconfig:10:warning: ignoring unsupported character ''
Kconfig:13:warning: ignoring unsupported character ''
arch/Kconfig:1:warning: ignoring unsupported character ''
arch/Kconfig:2:warning: ignoring unsupported character ''
arch/Kconfig:2:warning: ignoring unsupported character ''
arch/Kconfig:4:warning: ignoring unsupported character ''
...
After several rounds of experiments, it turns out this is caused
by line endings. Historically, Linux and macOS used linefeed (LF)
characters while Windows used a carriage return plus a linefeed
(CRLF). When Azure Pipelines checks out the U-Boot repo, Git tries
to compensate for the difference by automatically making lines end
in CRLF in the working directory on Windows, which confuses the
Kconfig file parsing logic.
Fortunately Git provides a way for repos to tell Git not to do such
automatical line endings conversion via .gitattributes file below:
* text eol=lf
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This adds a reST document for how to build U-Boot host tools,
including information for both Linux and Windows.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
'struct ustat' uses linux-specific typedefs to declare its memebers:
__kernel_daddr_t and __kernel_ino_t. It is currently not used by any
U-Boot codes, but when we build U-Boot tools for other platform like
Windows, this becomes a problem.
Let's surround it with __linux__.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
__swab32() is a Linux specific macro defined in linux/swab.h. Let's
use the compiler equivalent builtin function __builtin_bswap32() for
better portability.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
__leXX has Linux kernel specific __attribute__((bitwise)) which is
not portable. Use corresponding uintXX_t instead.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Use log() insted of debug() for uclass_find_device_by_seq function,
since this print is very much and we can filter it out with log()
interface.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Move #define to top of file as per docs:
Signed-off-by: Simon Glass <sjg@chromium.org>
There is a contributor in Linux kernel with a comma in their name, which
confuses patman and results in invalid to- or cc- addresses on some
patches. To avoid this, let's use \0 as a separator when generating cc
file.
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It is possible to enable bootstage in TPL. TPL can stash the info for SPL.
But at present this information is then lost because SPL does not read
from the stash.
Add support for SPL not being the first phase to enable bootstage.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present bootstage in TPL and SPL use the same ID so it is not possible
to see the timing of each. Separate out the IDs and use the correct one
depending on which phase we are at.
Example output:
Timer summary in microseconds (14 records):
Mark Elapsed Stage
0 0 reset
224,787 224,787 TPL
282,248 57,461 end TPL
341,067 58,819 SPL
925,436 584,369 end SPL
931,710 6,274 board_init_f
1,035,482 103,772 board_init_r
1,387,852 352,370 main_loop
1,387,911 59 id=175
Accumulated time:
196 dm_r
8,300 dm_spl
14,139 dm_f
229,121 fsp-m
262,992 fsp-s
Signed-off-by: Simon Glass <sjg@chromium.org>
At present bootstage relocation assumes that it is possible to point back
to memory available before relocation, so it does not relocate the
strings. However this is not the case on some platforms, such as x86 which
uses the cache as RAM and loses access to this when the cache is enabled.
Move the relocation step to before U-Boot relocates, expand the allocated
region to include space for the strings and relocate the strings at the
same time as the bootstage records.
This ensures that bootstage data can remain accessible from TPL through
SPL to U-Boot before/after relocation.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there is a single shared address for bootstage data in both
TPL and SPL. If SPL unstashs TPL bootstage info and then stashes it again
to pass it to U-Boot, the new stash overwrites the strings of the old
stash.
Fix this by duplicating the strings into the malloc() region. This should
be a small code. Fix the header-file order at the same time.
This problem doesn't happen at the next stage (SPL->U-Boot) since U-Boot
relocates the boostage data.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current code searches for empty records but these not existing with
bootstage now. This used to be needed when bootstage records were stored
in a spare array.
Drop the unnecessary code and fix a code-style nit at the same time.
Signed-off-by: Simon Glass <sjg@chromium.org>
When stashing bootstage info, store the next ID so that it can be used
when the stash is restored. This avoids the ID starting at zero and
potentially overwriting existing entries.
Signed-off-by: Simon Glass <sjg@chromium.org>
Make sure that the bloblist starts on an aligned boundary. This protects
against one of the early allocating causing the alignment to be lost.
Signed-off-by: Simon Glass <sjg@chromium.org>
With a bit of code reordering we can support %p using the existing code
for ulong.
Move the %p code up and adjust the logic accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function is used in the bootstage report which may be trigged in TPL
or TPL. Add a very basic implication of this function so that it builds.
There is no attempt to get the formatting right, since this would add too
much code size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Stefan Roese <sr@denx.de>
The ctype array is brought into the image, adding 256 bytes, when it is
unlikely to be needed. The extra code for %p is only present when DEBUG
is defined, so let's drop ctype as well unless DEBUG is defined.
Signed-off-by: Simon Glass <sjg@chromium.org>
The test did reads after writes but didn't check the value.
It probably was because the sandbox didn't implement the writeX/readX
functions.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Updated to use sandbox_set_enable_memio():
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
This function assumes that the 'val' parameter has no masked bits set.
This is not defined by the function prototype though. Fix the function to
mask the value and update the documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
This function needs a prototype so that tests can use it. Add one.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This function writes to its address so the address should not be declared
as const. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Quite a few tests use addresses or hex values for comparisons. Add hex
output for test failures, e.g.:
0x55ca22fa == reg: Expected 0x55ca22fa (1439310586),
got 0x55ea22fb (1441407739)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
- bmips: add BCRM NAND support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs
- bmips: various small fixes
- mtmips: add new drivers for clock, reset-controller and pinctrl
- mtmips: add support for high speed UART
- mtmips: update/enhance drivers for SPI and ethernet
- mtmips: add support for MMC
Add the address spaces for the R5F cores in MCU domain to the ranges
property of the cbass_mcu interconnect node so that the addresses
within the R5F nodes can be translated properly by the relevant OF
address API.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
In SPL, DDR should be made available by the end of board_init_f()
so that apis in board_init_r() can use ddr. Adding support for
triggering DDR initialization from board_init_f().
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Use the 3733MTs DDR configuration that is auto generated from
DDR_Regconfig tool.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Kevin Scholz <k-scholz@ti.com>
The J721E DDR subsystem comprises DDR controller, DDR PHY and wrapper
logic to integrate these blocks in the device. The DDR subsystem is
used to provide an interface to external SDRAM devices which can be
utilized for storing program or data. Introduce support for the
DDR controller and DDR phy within the DDR subsystem.
Signed-off-by: Kevin Scholz <k-scholz@ti.com
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Added the following registers to the DDR configuration:
- ACIOCR0,
- ACIOCR3,
- V2H_CTL_REG,
- DX8SLxDQSCTL.
Modified enable_dqs_pd and disable_dqs_pd to only touch the associated
bit fields for pullup and pulldown registers (to preserve slew rate and
other bits in that same register). Also update the dts files in the same
patch to maintain git bisectability.
Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Added training support for LPDDR4 and DDR3L DDRs. Also added/changed
some register configuration to support all 3 DDR types
Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The current configuration of DDR on AM654 base board is for 1600MTs but
the file name is specified as k3-am654-base-board-ddr4-1600MHz.dtsi.
Since 1600MHz is misleading, rename it to
k3-am654-base-board-ddr4-1600MTs.dtsi
Signed-off-by: James Doublesin <doublesin@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
U-Boot cleans and invalidate L1 and L2 caches before jumping to Linux
by set/way in cleanup_before_linux(). Additionally there is a custom
hook provided to clean and invalidate L3 cache.
Unfortunately on K3 devices(having a coherent architecture), there is no
easy way to quickly clean all the cache lines for L3. The entire address
range needs to be cleaned and invalidated by Virtual Address. This can
be implemented using the L3 custom hook but it take lot of time to clean
the entire address range. In the interest of boot time this might not be
a viable solution.
The best hit is to make sure the loaded Linux image is flushed so that
the entire image is written to DDR from L3. When Linux starts running with
caches disabled the full image is available from DDR.
Reported-by: Andrew F. Davis <afd@ti.com>
Reported-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Once the arch specific boot_prepare_linux completes, boards wants to
have a custom preparation for linux. Add support for a custom
board_prep_linux.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Expand SPL_MULTI_DTB_FIT to accommodate usb peripheral nodes being
added to support SPL_DFU bootmode.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Add usb peripheral and usb phy nodes in spl to enable SPL_DFU bootmode.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Second set of u-boot-atmel features and fixes for 2020.01 cycle
This feature set includes Eugen's work on a new tiny flexcom driver and
eeprom mac retrieval for the sam9x60-ek board.
Some configs are selected in Kconfig and is no longer needed in the
defconfig files. Some configs (power domain, ram) are never used.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Some drivers (clk, pinctrl, reset, ...) are necessary for reset of the
system, they should be always selected.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds default eth pinctrl for all boards.
There are two pinctrl nodes used for two scenarios:
ephy_iot_mode - for IOT boards which have only one port (PHY0)
ephy_router_mode - For routers which have more than one ports
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds a dts property cd-active-high for builtin-cd mode to make
it configurable instead of using hardcoded active-low.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds default p0led status and phy0 link polling for all boards.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch add support for mt7628-eth to isolate LAN/WAN ports mainly to
prevent LAN devices from getting IP address from WAN.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
When received a packet with an invalid length recorded in rx descriptor,
we should free this rx descriptor to allow us to continue to receive
following packets.
Without doing so, u-boot will stuck in a dead loop trying to process this
invalid rx descriptor.
This patch adds a call to mt7628_eth_free_pkt() after received an invalid
packet length.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The mt7628 has an embedded ethernet switch (5 phy ports + 1 cpu port).
Although in IOT mode only port0 is usable, the phy0 is still connected
to the switch, not the ethernet gmac directly.
This patch rewrites it and makes it optional. It can be turned on by adding
mediatek,poll-link-phy = <?> explicitly into the eth node. By default the
driver is switch mode with all 5 phy ports working without link detection.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch removes hardcoded gpio settings as they have been replaced by
pinctrl in dts, and also replaces regmap-based phy reset with a more
generic reset controller.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds slew rate calibration for mt76x8-usb-phy, removes code
which belongs to mt7620, and gets rid of using syscon and regmap by using
clock driver and reset controller.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds pinctrl support for mt7628, with a file for common pinmux
functions and a file for mt7628 which has additional support for pinconf.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Currently this driver uses a different way to implement the spi xfer,
by modifying some fields of two registers, which is incompatible with the
MTK's original SDK linux driver. This will cause the flash data being
damaged by the SDK driver.
This patch lets the mt7621_spi_set_cs() restore the original register
fields after cs deactivated.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The mt7621 spi controller supports continuous generic half-duplex spi
transaction. There is no need to cache xfer data at all.
To achieve this goal, the OPADDR register must be used as the first data
to be sent. And follows the eight generic DIDO registers. But one thing
different between OPADDR and DIDO registers is OPADDR has a reversed byte
order.
With this patch, any amount of data can be read/written in a single xfer
function call.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch lets the spi driver to use clock provided by the clk driver
since the new clk-mt7628 driver provides accurate sys clock frequency.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds a clock driver for MediaTek MT7628/7688 SoC.
It provides clock gate control as well as getting clock frequency for
CPU/SYS/XTAL and some peripherals.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
All three UARTs of mt7628 are actually MediaTek's high-speed UARTs which
support baudrate up to 921600.
The high-speed UART is compatible with ns16550 when baudrate <= 115200.
Add compatible string to dtsi file so u-boot can use it when serial_mtk
driver is built in.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The UART of MT7628 has fixed 40MHz input clock so there is no need to put
clock-frequency in every dts files. Just put it into the common dtsi file.
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
This patch adds non-DM version for mtk hsuart driver and makes it
compatible with ns16550a driver in configuration.
This is needed in SPL with CONFIG_SPL_DM disabled for reducing size.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The current brcmnand driver is based on 4.18 linux kernel which uses
mtd_set_ooblayout to set ecc layout. But nand base code in u-boot is from
old kernel which does not use this new API and expect nand_chip.ecc.layout
structure to be set. This cause nand_scan_tail function running into a bug
check if the device has a different oob size than the default ones.
This patch ports the brcmstb_choose_ecc_layout function from kernel 4.6.7
that supports the ecc layout struture and replaces the mtd_set_ooblayout
method
Signed-off-by: William Zhang <william.zhang@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
This adds support for BCM6368, BCM6328, BCM6362 and BCM63268 SoCs.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
If configuration is set to skip low level init, automatic
probe of L2 cache size is not performed and the size is set to 0.
Flushing or invalidating the L2 cache will fail in this case.
Add a static configuration (SYS_DCACHE_LINE_SIZE) with default set to 0.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
The Allwinner H6 SoC has a register to set the PIO banks' voltage. When
it mismatches the real voltage supplied to the VCC to the PIO supply,
the PIO will work improperly.
The PIO controller also has a register that contains the status of each
VCC rail of the PIO supplies, and it has the same definition with the
configuration register. so we can just copy the content of this register
to the configuration register at startup, to ensure the configuration is
correct at startup stage.
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
[jagan: s/__maybe__unused/__maybe_unused]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Sync Kernel DTS for Allwinner H6 boards.
Drop /omit-if-no-ref/ keyword as it's not supported by U-boot.
commit <d45331b00ddb> Linux 5.3-rc4
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Acked-by: Maxime Ripard <mripard@kernel.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
clock_sun6i.c is used for sun6i, sun8i and sun50i SoC families.
PLL1 clock sets the default system clock, defined as:
sun6i: 1008000000
sun8i: 1008000000
sun50i: 816000000
With the current calculation, m = 2 and k = 3. Solving for n,
this results 28. Solving back:
(24MHz * 28 * 3) / 2 = 1008MHz
However if the requested clock is 816, n is 22.66 rounded
to 22, which results:
(24MHz * 28 * 3) / 2 = 792MHz
Changing k to 4 satisfies both system clocks:
(24E6 * 21 * 4) / 2 = 1008MHz
(24E6 * 17 * 4) / 2 = 816MHz
Signed-off-by: Stefan Mavrodiev <stefan@olimex.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
A64 OLinuXino board from Olimex has three variants with onboard eMMC:
A64-OLinuXino-1Ge16GW, A64-OLinuXino-1Ge4GW and A64-OLinuXino-2Ge8G-IND. In
addition, there are two variants without eMMC. One without eMMC and one with SPI
flash. This suggests the need for separate device tree for the three eMMC
variants.
The Linux kernel upstream has chosen to create and use a separate device tree
for the eMMC variants instead of adding eMMC support existing device tree. These
changes to Linux kernel are queued for Linux 5.4.
commit <02bb66b347ff8115f53948f86b884e008ba385b9> ("arm64: dts:
allwinner: a64: Add A64 OlinuXino board (with eMMC)")
This patch has been tested on A64-OLinuXino-1Ge16GW and is based on Linux
device-tree and a64-olinuxino_defconfig.
Signed-off-by: Sunil Mohan Adapa <sunil@medhas.org>
[jagan: updated linux-next commit details]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Half DQ configuration seems to be very rare for H6 based boards/STBs,
but exists nevertheless. Currently the only known product which needs
this support is Tanix TX6 mini.
This commit adds support for half DQ configuration. Code was tested
for regressions on other configurations (OrangePi 3 1 GiB/LPDDR3, Tanix
TX6 4 GiB/DDR3) and none were found.
Thanks to Icenowy Zheng for help with this code.
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: thomas graichen <thomas.graichen@gmail.com>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Add an entry for the Adesto AT25SL321 SPI NOR chip.
This SPI NOR chip is found in the Embedded Artist i.MX7ULP COM board.
Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Most boards currently use SPI_FLASH_MTD only in U-Boot proper, not in
SPL. They often rely on hacks in the board header files to include
this option conditionally. To be able to fix this, we previously
introduced a separate option SPL_SPI_FLASH_MTD.
Therefore we can now adjust the Makefile and change the code in
sf_probe.c and sf_internal.h to use CONFIG_IS_ENABLED(SPI_FLASH_MTD).
We also need to move all occurences of CONFIG_SPI_FLASH_MTD from the
header files to the according defconfigs. The affected boards are
socfpga, aristainetos, cm_fx6, display5, ventana, rcar-gen2, dh_imx6
and da850evm.
We do this all in one patch to guarantee bisectibility.
This change was tested with buildman to make sure it does not
introduce any regressions by comparing the resulting binary sizes.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
n25q* and mt25q* (both 256Mb and 512Mb) flashes support Flag status
register that indicates various errors that may be encountered during
erase/write operations. Therefore add USE_FSR flag wherever missing.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
mt25q* flashes support stateless 4 byte addressing opcodes. Add entries
for the same. These flashes have bit 6 set in 5th byte of READ ID
response when compared to n25q* variants.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Tested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
U-Boot uses CONFIG_SPI_FLASH_USE_4K_SECTORS to enable 4K small sector
support. Use that instead of MTD_SPI_NOR_USE_4K_SECTORS.
Reported-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Use dev_err() when reporting reason for erase/write failures so that
users can be made aware of the reason for failure.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
To allow SPI_FLASH_MTD being enabled separately in SPL we add a new
option. The only user currently is the stm32mp15_basic board.
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Acked-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
SoPine has winbond SPI-FLASH, so enable the same in defconfig
and add aliases for spi0 in -u-boot.dtsi
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
SPI is available in Allwinner A64 SoC, so enable it
globally in Kconfig.
- CONFIG_SPI
- CONFIG_DM_SPI
- CONFIG_DM_SPI_FLASH
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
SPI_SUNXI driver is fully dm-aware and the Allwinner
architecture kconfig would have logic to enable the
DM_SPI. So, select default spi sunxi driver for
sunxi architecture.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
DM_SPI_FLASH should require spi flash interface code for dm
version, so imply SPI_FLASH core by default if any board
enabled DM_SPI_FLASH.
This overcome the explicit enablement of CONFIG_SPI_FLASH on
respective boards when DM_SPI_FLASH being used.
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
If DM_SPI_FLASH enabled that means it is using sf command
for flash interface to access.
SPI_FLASH can be used via sf command and board/driver
functions to call spi flash ops, so mark it default only
for DM_SPI_FLASH.
This would prevent explicit adding of CONFIG_CMD_SF when
DM_SPI_FLASH being enabled.
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
We need distinguish the following two situations in various SPI APIs:
- given chip select num is invalid
- given chip select num is valid, but no device is attached
Currently -ENODEV is returned for both cases.
For the first case, it's more reasonable to return -EINVAL instead of
-ENODEV for invalid chip select numbers.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # SoPine
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
If an SPI controller driver does not implement ops->cs_info, that
probably means any chip select number could be valid, hence let's
return 0 for spi_cs_info().
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Jagan Teki <jagan@amarulasolutions.com> # SoPine
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
1) CONFIG_SPI_FLASH is not just a legacy code, but it has common
core code which handle both dm and non-dm spi flash code. So
fix the info text to make it clear globally.
2) Since it's flash core it shouldn't depends on legacy SPI,
so remove the 'depends on SPI'
Cc: Vignesh R <vigneshr@ti.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
The ULP has two USB controllers. These two controllers have similar NC
registers layout as i.MX7D. But OTG0 uses UTMI PHY simliar as i.MX6, not
the integrated PHY on i.MX7D. The OTG1 needs off-chip HSIC PHY or ULPI PHY
to work.
This patch only supports OTG0 with UTMI PHY.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
This fixes the issues with calculation of controller indexes in
ehci_usb_bind() for iMX7, as USB controllers on iMX7 SoCs aren't
placed next to each other, and their addresses incremented by 0x10000.
Example of USB nodes for iMX7S/D:
usbotg1: usb@30b10000 {
compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
reg = <0x30b10000 0x200>;
^^^^^^^^^^
....
usbotg2: usb@30b20000 {
compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
reg = <0x30b20000 0x200>;
^^^^^^^^^^
....
usbh: usb@30b30000 {
compatible = "fsl,imx7d-usb", "fsl,imx27-usb";
reg = <0x30b30000 0x200>;
^^^^^^^^^^
....
Which was leading to usb enumeration issues:
Colibri iMX7 # usb start
starting USB...
Bus usb@30b10000: USB EHCI 1.00
Bus usb@30b20000: probe failed, error -22
scanning bus usb@30b10000 for devices... 1 USB Device(s) found
scanning usb for storage devices... 0 Storage Device(s) found
Fixes: 501547cec1("usb: ehci-mx6: Fix bus enumeration for DM case")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
All platforms which are using MANUAL_RELOC are jumping back to origin
location when repeatable command is called. The reason is that cmd_rep link
is not updated properly. Issue can be reproduced by rewriting origin
U-Boot location through (for example) file download by tftp command.
Fixes: 80a48dd47e ("common: command: Rework the 'cmd is repeatable' logic")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Record two bootstages and add "Starting kernel" message to have standard
handoff message between U-Boot and OS.
Also use debug() instead of #ifdef DEBUG to clean the code.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no need to show FDT message in regular flow that's why switch it
to debug level.
Fixes: 0905046050 ("microblaze: Switch to generic bootm implementation")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add support for System Controller available on e-a2197-00 base board.
System is very similar to p-a2197-00 board.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
board_early_init_f added by commit e6cc3b25d7
("arm: zynq: Wire watchdog internals") is no longer needed that's why
remove it also with Kconfig enabling.
Fixes: ccd063e981 ("watchdog: Move watchdog_dev to data section (BSS may not be cleared)")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch removes 4K sector size support for Zynq mini qspi configuration
in favour of fast erase speed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch removes 4K sector size support for ZynqMP mini qspi
configuration in favour of fast erase speed.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There are use cases where lpd watchdog can be configured for APU use. By
design this IP should be listed in zynqmp.dtsi to make sure that node is
properly enabled by DTG.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add dt clock header which can be included by dtses. And also use zynqmp-clk
compatible string.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch increases SYS_MALLOC_F_LEN as the versal clock
driver needs to be probed before relocation itself inorder
to get required clocks before relocation.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds usb host and device mode support for Xilinx
Versal virtual platform. By default USB host functionality
is enabled. To use in usb device mode, set dr_mode property
in DT to peripheral.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable device tree overlay to build all dtbs for Versal with -@ flag to
enable applying overlays.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ina226 hwmon driver is deprecated and it is recommended to use new iio
based driver. The patch is enabling iio-hwmon driver to export
functionality from IIO to hwmon interface to be able to use lm-sensors
package.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Label property is adding capability to distiguish chips from each other
when iio framework is used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ina226 hwmon driver is deprecated and it is recommended to use new iio
based driver. The patch is enabling iio-hwmon driver to export
functionality from IIO to hwmon interface to be able to use lm-sensors
package.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add gpio phy reset via I2C expander TCA6416 on board ZCU102.
A warning call trace is observer in probe when this reset is called
from context that can sleep. Keep this commented until that is
resolved in phylib.
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The DP83867 strap control workaround is already present in Linux kernel
mainline binding. All these Xilinx boards require this quirk.
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ina226 hwmon driver is deprecated and it is recommended to use new iio
based driver. The patch is enabling iio-hwmon driver to export
functionality from IIO to hwmon interface to be able to use lm-sensors
package.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Label property is adding capability to distiguish chips from each other
when iio framework is used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ina226 hwmon driver is deprecated and it is recommended to use new iio
based driver. The patch is enabling iio-hwmon driver to export
functionality from IIO to hwmon interface to be able to use lm-sensors
package.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Label property is adding capability to distiguish chips from each other
when iio framework is used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ina226 hwmon driver is deprecated and it is recommended to use new iio
based driver. The patch is enabling iio-hwmon driver to export
functionality from IIO to hwmon interface to be able to use lm-sensors
package.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Currently zcu102 Rev1.0 board includes RevA sdhci dt node which has
no-1-8-v property. Since Rev1.0 has level shifters delete this
property to enable support for 1.8v.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Mainline has done this switch and there is no reason not to switch it too.
Mainline U-Boot patch which has done that switch:
"dts: switch spi-flash to jedec, spi-nor compatible"
(sha1: ffd4c7c2ec)
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Label property is adding capability to distiguish chips from each other
when iio framework is used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ina226 hwmon driver is deprecated and it is recommended to use new iio
based driver. The patch is enabling iio-hwmon driver to export
functionality from IIO to hwmon interface to be able to use lm-sensors
package.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Added tps53679 compatible string to tps53681. They are both compatible to
each other and tps53679 has Linux driver already.
Signed-off-by: Nishant Mittal <nishant.mittal@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Label property is adding capability to distiguish chips from each other
when iio framework is used.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ina226 hwmon driver is deprecated and it is recommended to use new iio
based driver. The patch is enabling iio-hwmon driver to export
functionality from IIO to hwmon interface to be able to use lm-sensors
package.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Ethernet phys based on devicetree specification should be using
ethernet-phy@ node name instead of pure phy@.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ZynqMP based System controller is present on Versal boards. This patch is
aligning names with Versal to follow the spec.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
DT binding was reviewed in Linux by commit b0b41af12a1b
("dt-bindings: memory: Add pl353 smc controller devicetree binding
information") that's why this fragment can be also added to U-Boot
repository.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The commit 4b0bcfa7c4 ("Kconfig: Migrate CONFIG_BOOTM_* options")
moved BOOTM_ options to Kconfig that's why align zynq defconfig with it.
Disabling NETBSD was done by commit d6f48ea5ce
("ARM: zynq: Do not enable NETBSD support by default").
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Enable GPIO command for Xilinx Versal platform. Driver is updated that's
why it can be used directly. Driver is enabled by default through Kconfig.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fix error debug messages to be more accurate and aligned with debug message
style in the whole file.
And do not initialize ret variable because it is initialized later on and
it is just additional step.
Fixes: 1327d1678b ("firmware: zynqmp: Add zynqmp-power support")
Reported-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Remove macros which use PM_SIP_SVC offset and convert invoke_smc() to
xilinx_pm_request() which do calculation with PM_SIP_SVC already.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
versal_pm_request() and invoke_smc() are almost the same. Only one
difference is that versal_pm_request is adding PM_SIP_SVC offset to api_id.
The patch is moving platform implementation to firmware driver code for
synchronization.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
enable driver model for i2c, eeprom for mac retrieval from eeprom i2c memory,
and microchip_flexcom driver.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
The Microchip Flexcom is just a wrapper which embeds a SPI controller,
an I2C controller and an USART.
Only one function can be used at a time and is chosen at boot time according
to the device tree.
The bindings are kept as in Linux.
The driver registers to MISC_UCLASS.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Those platform use the DWC2 controller for the gadget support and the
DWC3 for host-only operations.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
As the PHY driver now handles the transitions of USB power domain, we
must add this information in the node of each PHY.
Also, the phy are expected in the "phys" property, not "usb-phys".
Also add the aliases for the USB ports on boards with more than a single
port.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
KEYSTONE_USB_PHY is now required for proper USB operations.
XHCI_DWC3 can be disabled as the xhci-dwc3 is not used anymore
USB_DWC3_GADGET can also be removed, it is now selected automatically.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
There is no proper power domain support for the keystone platforms.
However we need to turn off the USB domains before jumping to linux or it
fail to boot (observed with k2e and k2l platforms).
This can be done in the PHY driver as it is dedicated only to the keystone
platforms and matches the required on/off sequence.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
The mode selection for the DWC3 is kind of obsolete. The driver does not
have to be host only or gadget only. This choice is confusing.
All the remaining callers of dwc3_uboot_init() explicitly set dr_mode
before calling the function, so none rely on a default behavior.
Remove the choice menu and keep only the USB_DWC3_GADGET option. Enable it
by default if USB_GADGET and USB_DWC3 are enabled.
It must be disabled for the evb-rk3328 as it uses DWC2 for the gadget and
DWC3 for the host.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Add a new function that read quirk and configuration information from the
DT. The goal is to allow platforms using their own version of DWC3 driver
to migrate to the generic DWC3 driver.
The function is adapted from the function dwc3_get_properties() in the
linux dwc3 driver introduced in commit c5ac6116db35d.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
There is no need to fail if the maximum speed is not specified.
If the speed is not specified, do the same as linux and assume super speed.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Currently the host driver used by dwc3-generic is "xhci-dwc3". This is
a functional driver but it doesn't use the dwc3 core and, in particular,
it lacks some bits that may be important.
For example on the k2 platforms, it is important that the phy are properly
suspended when the USB is not used anymore. The dwc3 core also has a
partial support for quirks.
The new driver can be used as a drop-in replacement for "xhci-dwc3".
In terms of implementation, it may seem strange that 2 private structures
dwc3_generic_host_priv and dwc3_generic_priv) are used. The reason for this
is simply that the xhci layer expects a struct xhci_ctrl at the beginning
of the private data and it seemed wasteful to include it also for the
peripheral case.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
No one is actually implementing those functions.
We could remove calls to these altogether, but it does not really hurt to
keep the empty inlined version at the moment and it satisfies a symmetry
with the gadget mode.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
The xhci.h header file is currently located under drivers/usb/xhci
Move it to the include/usb folder to make it available to drivers that
are not under drivers/usb/xhci
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
This allow the phy to enter idle and then suspend.
the K2 platforms require the PHY to be suspended before the USB domain
clock can be turned off.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Define CONFIG_SYS_MAX_FLASH_BANKS_DETECT so that number of flash banks
are automatically detected by CFI flash driver
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
J721e SoM as a 64MB HyperFlash on board. Add pinmux and DT node for the
same.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add DT node for HyperBus Memory Controller in the FSS. On J721e, its not
possible to use OSPI0 and HBMC simultaneously as they are muxed within
the Flash Subsystem hence disable HBMC by default as keep OSPI enabled.
Bootloader will fixup DT when it detects HyperFlash instead of OSPI.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
AM654/J721e has HyperBus Memory Controller that supports HyperFlash and
HyperRAM devices. It provides a memory mapped interface to interact with
these devices. Add a driver to support the same.
Driver calibrates the controller, setups up for MMIO access and probes
HyperFlash child node.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Make use of CONFIG_SYS_MONITOR_BASE only when available to avoid build
error when CONFIG_SYS_MONITOR_BASE is not defined.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add environment variables to boot kernel from a filesystem contained in
the 2nd UFS LUN. The user can boot from a ufs filesystem just by
entering the following commands.
=> setenv boot ufs
=> boot
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Add Support for commands to initialize and configure UFS devices.
TODO: Add Support for commands to resize and reconfigure LUNs
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Add Support for UFS Host Controller Interface (UFSHCI) for communicating
with Universal Flash Storage (UFS) devices. The steps to initialize the
host controller interface are the following:
- Initiate the Host Controller Initialization process by writing to the
Host controller enable register.
- Configure the Host Controller base address registers by allocating a
host memory space and related data structures.
- Unipro link startup procedure
- Check for connected device
- Configure UFS host controller to process requests
Also register this host controller as a SCSI host controller.
Taken from Linux Kernel v5.2 (drivers/scsi/ufs/ufshcd.c) and ported to
U-boot.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Some SCSI devices like UFS use DMA for executing scsi commands and hence
need to know the direction of transfer of the dma. Add a dma_dir element
to the command structure to facilitate this.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
The UFS SCSI device LUNs are observed to return failure the first time a
unit ready inquiry is sent and pass on the second try. Send this
inquiry 3 times to make sure device is ready.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Add max_bytes_per_req to scsi_platdata to enable the host driver to limit
the number of bytes that can be read/written per request.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
With no non-DM driver using scsi_read()/_write() APIs, remove
the legacy implementations.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
[trini: Reorder slightly and mark scsi_read/write behind BLK test to
avoid warnings]
Signed-off-by: Tom Rini <trini@konsulko.com>
Make sure that the clock self-assignment works by having a clock of
clk-sbox be configured automatically when clk-sbox is probed.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
This fixes the case where assigned-clocks is used to define a clock
defaults inside this same clock's node. This is used sometimes to setup a
default parents and/or rate for a clock.
example:
muxed_clock: muxed_clock {
clocks = <&clk_provider 0>, <&clk_provider 1>;
#clock-cells = <0>;
assigned-clocks = <&muxed_clock>;
assigned-clock-parents = <&clk_provider 1>;
};
It doesn't work in u-boot because the assigned-clocks are setup *before*
the clock is probed. (clk_set_parent() will likely crash or fail if called
before the device probe function)
Making it work by handling "assigned-clocks" in 2 steps: first before the
clk device is probed, and then after the clk device is probed.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Add a few more clocks the clk_sandbox clock provider and get them using
the managed API.
Make sure they are released when the device is removed.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Add devm_clk_get(), devm_clk_get_optional() to get clocks from the
device-tree. The clocks is automatically released and the data structure
freed when the device is unbound.
Also add devm_clk_put() to release the clock and free the data structure
manually.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
This change adds support for I2C clock modeled in CCF. This code intention
is to only enable those clocks in the I2C driver with default settings.
For that reason the "busy" versions of clocks reuse the generic approach
and would need to be updated when one wants to adjust the I2C clock
frequency in U-Boot.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
According to the documentation in clk.h, clk_set_parent() return the new
rate of the clock or a negative error code.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Select the correct USB product id used by the download gadget
for ST stm32mp1 boards.
The board stm32mp1 select the correct product id, as defined in
http://www.linux-usb.org/usb.ids for the STMicroelectronics
vendor id = 0x0483 (CONFIG_USB_GADGET_VENDOR_NUM):
- dfu = 0xdf11 : STM Device in DFU mode
it is the value used by ROM code and reused for stm32prog
command
- fasboot = 0x0afb : Android Fastboot device
- others = 0x5720 (CONFIG_USB_GADGET_PRODUCT_NUM)
Mass Storage Device
it is used for UMS command / usb_dnl_ums
This patch avoid conflict when the same USB VID/PID is used for
ums, fastboot or dfu command (two different protocols associated
to the same PID).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
Network support was never added on this board, disable
CONFIG_NET flag to avoid following warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
Network support was never added on this board, disable
CONFIG_NET flag to avoid following warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
Network support was never added on this board, disable
CONFIG_NET flag to avoid following warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
Network support was never added on this board, disable
CONFIG_NET flag to avoid following warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
Network support was never added on this board, disable
CONFIG_NET flag to avoid following warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
Correct the name of the define used CONFIG_IS_ENABLED which is
not aligned with Kconfig name: CONFIG_$(SPL_)PINCONF_RECURSIVE.
The recursive calls is conditional only for UCLASS_PINCONFIG
"pinconfig" driver.
It is always needed to call pinctrl_post_bind for UCLASS_PINCTRL
"pinctrl", the test CONFIG_IS_ENABLED(PINCONF_RECURSIVE) need to
be removed for this driver.
This correct a regression introduced because the same patch is
applied twice times in u-boot-dm branch:
- commit e878b53a79 ("dm: pinctrl: introduce PINCONF_RECURSIVE
option")
- commit c20851b3d8 ("dm: pinctrl: introduce PINCONF_RECURSIVE
option")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
To allow OCRAM to be used as wakeup source in
deep sleep, do not power it down.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
The patch adds an errata ID A-008646 for workaround
to provide more information by errata ID.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
LX2160A/LX2120A/LX2080A SVR value should be
0x873600/0x873620/0x873602
Previous values were valid only if CAN fuse is blown.
Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
ls1028a has 4 personalities: ls1028a, ls1027a, ls1017a and ls1018a.
Both ls1027a and ls1017a personalities are lower functionality version
which doesn't support the multimedia subsystems, like LCD, GPU.
To disable multimedia feature on non-multimedia version,
set the status property to disabled in dts nodes.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
This configuration enables picking the environment from flash before
DDR init.
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Program register bit of SCFG_SNPCNFGCR_USBxRDSNP and
SCFG_SNPCNFGCR_USBxWRSNP(x = 1, 2, 3) to drive USBx read/write
snoop signal on LS1043A and LS1046A.
Signed-off-by: Ran Wang <ran.wang_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add LS1027A, LS1018A and LS1017A personalities support to
LS1028A SoC family.
LS1028A is the prime personality of LS1028A SoC family.
LS1027A is a lower funtionality version of QorIQ LS1028A
which does not support the multimedia subsystems, such as LCD
controller, GPU, and eDP PHY.
The QorIQ LS1018A and LS1017A SoCs are single 64-bit Arm A72
core, low power versions of the QorIQ LS1028A and LS1027A
SoCs respectively.
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Loading U-Boot on i.MX8QXP MEK board is broken since recent changes
in spl_mmc:
U-Boot SPL 2019.10-00162-gff5bd397e4 (Oct 18 2019 - 15:50:45 +0200)
Normal Boot
WDT: Not found!
Trying to boot from MMC2_2
Load image from MMC/SD 0x46400
spl: mmc partition switch failed
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
The newly added CONFIG_SYS_MMCSD_RAW_MODE_EMMC_BOOT_PARTITION option
is selected automatically and overrides the EXT_CSC_PART_CONFIG
configurations with default value, always selecting the eMMC boot
partition 1. Boards which place U-Boot image in other partitions
became not bootable.
Fix this by making the eMMC HW boot partition selection optional.
Fixes: 17241ea054 (spl: mmc: Add option to set eMMC HW boot partition)
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Pull request for UEFI sub-system for efi-2020-01-rc1 (2)
Install the simple file protocol only if there is a file system on the
partition.
Enable CONFIG_CMD_NVEDIT_EFI on QEMU.
- document alternative libretech-cc installation methods, including upstream TF-A and opensource tools
- add HDMI/CVBS display support for Amlogic G12A SoCs and SEI510 board
- add support for Amlogic A311D based Khadas VIM3
- add support for Amlogic S905X3 based SEI610 board, targeting Android support like SEI510
Add separate config file to handle the different eMMC size on
the sei610 board.
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Move android generic config and boot sequence in meson64_android header
and fix size of userdata to use all eMMC on SEI510.
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add support for the customer board SEI610 manufactured by SEI Robotics
with the following specifications:
- Amlogic S905X3 ARM Cortex-A55 quad-core SoC
- 2GB DDR4 SDRAM
- 10/100 Ethernet (Internal PHY)
- 1 x USB 3.0 Host
- 1 x USB Type-C DRD
- 1 x FTDI USB Serial Debug Interface
- eMMC
- SDcard
- Infrared receiver
- SDIO WiFi Module
Like it's SEI510 counterpart, the boot flow is designed to boot
Android AOSP built for the Yukawa Android device.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Rename meson-g12a-u-boot.dtsi into meson-g12-common-u-boot.dtsi to
match the new DT architecture and add meson-sm1-sei610-u-boot.dtsi
to handle the U-Boot specific DT for graphics.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The GX VPU Power Domain driver has been replaced by the Everything-Else
Power Domain driver for G12A and SM1.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Based on the 54ecb8f7028c ("Linux 5.4-rc1") Everything-Else power domain
driver for Amlogic SoCs.
This driver handles the VPU Power domain and other domains from the
Everything-Else part of the SM1 and G12A SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The SM1 clock controller is almost identical to the G12A and
so far the differences don't matter.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Values imported from Linux driver, but in correct numeric order.
Khadas VIM3 prints: Amlogic Meson G12B (A311D) Revision 29:b (10:2)
Cc: Christian Hewitt <christianshewitt@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Write SoC instead of Soc. The Linux driver is not affected.
Fixes: f41d723b9f ("ARM: meson: display Amlogic SoC Information")
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
In Linux meson-g12-common.dtsi was introduced as well as new g12b nodes
and headers, as dependencies of new meson-g12b-a311d-khadas-vim3.dts.
Copied from da0c9ea146cb ("Linux 5.4-rc2")
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add the necessary config options to support BMP display over HDMI,
and add a preboot command to load the BMP file from a predefined
eMMC partition.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Like the meson-gx support, add the U-Boot specific bits in DT
to support graphics on G12A SoCs.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
If VIDEO_MESON is enabled, we need to setup the fdt for the framebuffer.
Call meson_vpu_rsv_fb() which reserves the framebuffer memory region for
EFI, and sets up simple-framebuffer nodes if simplefb support is
enabled.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Finally add the Amlogic G12A SoC compatible for the VPU driver.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Synchronize the Amlogic Meson Video driver back with the latest
DRM misc tree, adding G12A platform support, from the latest commit:
528a25d040bc ("drm: meson: use match data to detect vpu compatibility")
The sync includes the following changes from Linux adapted to U-Boot:
- Add support for VIC alternate timings
- Switch PLL to 5.94GHz base for 297Mhz pixel clock
- Add registers for G12A SoC
- Add G12A Support for VPP setup
- Add G12A Support for VIU setup
- Add G12A support for OSD1 Plane
- Add G12A support for plane handling in CRTC driver
- Add G12A support for CVBS Encoder
- Add G12A Video Clock setup
- Add G12A support for the DW-HDMI Glue
- fix G12A HDMI PLL settings for 4K60 1000/1001 variations
- fix primary plane disabling
- fix G12A primary plane disabling
- mask value when writing bits relaxed
- crtc: drv: vpp: viu: venc: use proper macros instead of magic constants
- global clean-up
- add macro used to enable HDMI PLL
- venc: set the correct macrovision max amplitude value
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Remove getting and enabling the node power domain since it's now handled
by the dm core directly.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Add necessary clock support to set up clock for the VPU and
HDMI support.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Add Amlogic G12A support for the gx-pwrc driver, aligned on the
Linux v5.2 driver.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
As already documented in this README, several binaries must be
glued together in order to boot the device.
Extend the documentation to cover the prebuilt binaries
(saving you the hassle of installing ancient cross-compilers),
and also mention the open source replacements for the encryption
tool (which is especially useful if you want to avoid requiring
32-bit x86 binaries in your build system).
Signed-off-by: Daniel Drake <drake@endlessm.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The released Linux boot image header in v5.3 is different from the
one present in U-Boot. Align the header with the new version. The
changes in Linux are backward compatible. Previous U-Boot releases
with older header will continue to work as well. As v5.3 kernel is
the first one to support image header, there is no compatibility
issue between new U-Boot (with this patch) and older kernel.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Rick Chen <rick@andestech.com>
This patch adds a DM based driver model for gpio controller present in
FU540-C000 SoC on HiFive Unleashed A00 board. This SoC has one GPIO
bank and 16 GPIO lines in total, out of which GPIO0 to GPIO9 and
GPIO15 are routed to the J1 header on the board.
This implementation is ported from linux based gpio driver submitted
for review by Wesley W. Terpstra <wesley@sifive.com> and/or Atish Patra
<atish.patra@wdc.com> (many thanks !!). The linux driver can be referred
here [1]
[1]: https://lkml.org/lkml/2018/10/9/1103
Signed-off-by: Sagar Shrikant Kadam <sagar.kadam@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To reduce the default image size CONFIG_CMD_NVEDIT_EFI was disabled by
default. Re-enable it on the QEMU platforms supporting the UEFI sub-system.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In the current implementation, EFI_SIMPLEFILE_SYSTEM_PROTOCOL is always
installed to all the partitions even if some of them may house no file
system.
With this patch, that protocol will be installed only if any file system
exists.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This function is a variant of fs_get_type_name() and returns a filesystem
type with which the current device is associated.
We don't want to export fs_type variable directly because we have to take
care of it consistently within fs.c.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
fs_ls(), fs_mkdir() and fs_unlink() sets fs_type to FS_TYPE_ANY
explicitly, but it is redundant as they call fs_close().
So just remove those lines.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
fs_close() closes the connection to a file system which opened with
either fs_set_blk_dev() or fs_set_dev_with_part(). Many file system
functions implicitly call fs_close(), e.g. fs_closedir(), fs_exist(),
fs_ln(), fs_ls(), fs_mkdir(), fs_read(), fs_size(), fs_write()
and fs_unlink().
So just export it.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
device_path strcuture has 2 bytes of "length" field, and so
file path length should not exceed this limit, 65535.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
ubi enhancements for 2020.01
- provide a way for skipping crc checks ported from linux, and add an
U-Boot command to set this flag on already installed systems.
- fix redundand environment management
binman enhancements:
- Dropping some test Elf files and building them from source instead
- Refactoring of x86 16-bit entries
- Support for SPL symbols within sections
- Handle the 'notes' sections and hidden symbols in recent binutils
- Improved error reporting with a tool fails
libfdt and documentation fixes
vboot required-key test
driver model power-domain controls
patman Message-Id enhancement
- Split travis jobs again so we don't have failures due to excessive
build times.
- Android image updates
- cscope bugfix, update ARM maintainers entry, drop H2200 platform.
Split the ARMv7 and AArch64 platforms into separate jobs, to avoid them
taking too long to build overall. Also rename them from "Xilinx" to
"Zynq*" to reflect slightly better what is being built and to pull in a
few more board matches.
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Split the 32bit and 64bit platforms into separate jobs, to avoid them
taking too long to build overall.
Cc: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
- Split "tqc" and "technexion" out into their own jobs and exclude
them from the catch-all jobs
- Clarify the job labels a little more.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Stefano Babic <sbabic@denx.de>
cscope complains that it can't find files that appears to be symbolic links
cscope: cannot find file tools/binman/test/u_boot_binman_syms_bad.c
cscope: cannot find file tools/version.h
`find -L` tests properties, but name, and cscope can't cope with symbolic
links (a lot of bugs in upstream were simple closed as kinda invalid).
To work around the problem, exclude symbolic links from the cscope.files.
Note, it's done in two pass to speed up the process (`-exec realpath ...`
approach is not portable and introduces a 3x delay).
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
We check (with a #if defined()) the config ENV_UBI_VOLUME_REDUND
to know if there is a redundant env. But this config is a string
and is always defined with env is in ubi, so we always consider
that a redundand env is used.
To fix this issue, I've added a hidden flag ENV_UBI_IS_VOLUME_REDUND
that is true when ENV_UBI_VOLUME_REDUND is not "". Then, I check
this flag in the code, instead of the string ENV_UBI_VOLUME_REDUND.
hs: fixed typo s/condider/consider
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
U-Boot now supports the "skip_check" flag to optionally skip the CRC
check at open time. Currently its only possible to set this bit upon
UBI volume creation. But it might be very useful to also set this bit
on already installed systems (e.g. field upgrade) to make also use of
the boot-time decrease on those systems.
This patch now adds a new "ubi" command "ubi skipcheck" to set or clear
this bit in the UBI volume header:
=> ubi skipcheck rootfs0 on
Setting skip_check on volume rootfs0
BTW: This saves approx. 10 seconds Linux bootup time on a MT7688 based
target with 128MiB of SPI NAND.
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Quentin Schulz <quentin.schulz@bootlin.com>
Cc: Boris Brezillon <boris.brezillon@collabora.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Andreas Dannenberg <dannenberg@ti.com>
It might be interesting, if "skip_check" is set or not, so lets print
this flag in ubi_dump_vol_info() as well.
hs: fix typo in commit message
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Quentin Schulz <quentin.schulz@bootlin.com>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Some users of static UBI volumes implement their own integrity check,
thus making the volume CRC check done at open time useless. For
instance, this is the case when one use the ubiblock + dm-verity +
squashfs combination, where dm-verity already checks integrity of the
block device but this time at the block granularity instead of verifying
the whole volume.
Skipping this test drastically improves the boot-time.
Adapted to U-Boot by Stefan Roese.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Quentin Schulz <quentin.schulz@bootlin.com>
Cc: Boris Brezillon <boris.brezillon@bootlin.com>
At present the 'Index' column of 'dm tree' assumes there is
two digits, this patch increase it to 3 digits.
It also aligns output of 'dm uclass', assuming the same 3 digits index.
The boards with CONFIG_PINCTRL_FULL activated have one pinconfig
by pin configuration, so they can have more than 100 devices
pinconfig (for example with stm32mp157c-ev1 board we have
106 pinconfig node).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the Linux pinctrl binding, the pin configuration nodes don't need to
be direct children of the pin controller device (may be grandchildren for
example). This behavior is managed with the pinconfig u-class which
recursively bind all the sub-node of the pin controller.
But for some binding (when pin configuration is only children of pin
controller) that is not necessary. U-Boot can save memory and reduce
the number of pinconf instance when this feature is deactivated
(for arch stm32mp for example for SPL).
This patch allows to control this feature with a new option
CONFIG_PINCONF_RECURSIVE when it is possible for each individual
pin controller device.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Fixed CONFIG_IF_ENABLED() condition, added __maybe_unused:
Signed-off-by: Simon Glass <sjg@chromium.org>
The power domain associated with a device is enabled when probing,
but currently the domain remains enabled when the device is removed.
Some boards started to disable power domains for selected devices
via custom board_quiesce_devices(), but it doesn't work in many
cases, i. e. because devices still can be accessed later in
.remove() callback on behalf of dm_remove_devices_flags().
Utilize the DM core to power off the device power domain, but add a
device flag to be able to selectively let the power domain enabled
after device removal. This might be required for devices that must
remain enabled when booting OS, i. e. serial console for debug
output, etc.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add dev_power_domain_off() api to disable all the power-domains
corresponding to a device
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable DM_FLAG_DEFAULT_PD_CTRL_OFF for arm64 remote core so that
pd can be enabled after loading the image.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In some remoteproc cases, enabling the power domain of the core will
start running the core. In such cases image should be loaded before
enabling the power domain. But the current DM framework enables the
power-domain by default during probe. This is causing the remotecore
to start and crash as there is no valid image loaded.
In order to avoid this introduce a DM flag that doesn't allow for
enabling/disabling the power-domain by DM framework.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When DEVRES is not set, devm_kmalloc_array() is spelled
devm_kmaloc_array() (with one 'l' only).
Fixing it so that the name is the same with and without DEVRES.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
As per the centithread on ksummit-discuss [1], there are folks who
feel that if a Change-Id is present in a developer's local commit that
said Change-Id could be interesting to include in upstream posts.
Specifically if two commits are posted with the same Change-Id there's
a reasonable chance that they are either the same commit or a newer
version of the same commit. Specifically this is because that's how
gerrit has trained people to work.
There is much angst about Change-Id in upstream Linux, but one thing
that seems safe and non-controversial is to include the Change-Id as
part of the string of crud that makes up a Message-Id.
Let's give that a try.
In theory (if there is enough adoption) this could help a tool more
reliably find various versions of a commit. This actually might work
pretty well for U-Boot where (I believe) quite a number of developers
use patman, so there could be critical mass (assuming that enough of
these people also use a git hook that adds Change-Id to their
commits). I was able to find this git hook by searching for "gerrit
change id git hook" in my favorite search engine.
In theory one could imagine something like this could be integrated
into other tools, possibly even git-send-email. Getting it into
patman seems like a sane first step, though.
NOTE: this patch is being posted using a patman containing this patch,
so you should be able to see the Message-Id of this patch and see that
it contains my local Change-Id, which ends in 2b9 if you want to
check.
[1] https://lists.linuxfoundation.org/pipermail/ksummit-discuss/2019-August/006739.html
Signed-off-by: Douglas Anderson <dianders@chromium.org>
The aes command used to segfault when accessing memory in sandbox.
The pointer accesses should be mapped.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Currently, if image verification with a required key fails, rsa_verify()
code tries to find another key to verify the FIT image. This however, is
not the intended behavior as the documentation says that required keys
"must be verified for the image / configuration to be considered valid".
This patch fixes the issue by making rsa_verify() return immediately if
the verification of a required key fails.
Signed-off-by: Daniele Alessandrelli <daniele.alessandrelli@gmail.com>
This commit add a test in the vboot test to check that
when a required key is asked, only FIT signed with this
key is used/accepted by u-boot.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Skip not associated gpio phandle let register the other gpios on a group.
We need anyway to send out a warning to the user to fix their uboot-board.dtsi.
Thhe handle id can be found inside the decompiled dtb
dtc -I dtb -O dts -o devicetree.dts spl/u-boot-spl.dtb
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When multiple power domains attached to a device, need power on
them all, so use dev_power_domain_on to do that.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add this new API to power on multiple domains attached
to a device.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Changed to static inline and added a condition into C file:
Signed-off-by: Simon Glass <sjg@chromium.org>
When CONFIG_OF_PRIOR_STAGE is enabled, this workaround was needed
before device_bind_common assigned request numbers sequentially in the
absence of aliases.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
For CONFIG_OF_PRIOR_STAGE, in the absence of a device tree alias for a
given device, use the next request number for that type of device.
This allows aliases to be used when they're available, while still
allowing unaliased devices to be probed.
Signed-off-by: Thomas Fitzsimmons <fitzsim@fitzsim.org>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
The reset function sets the pin to 0 then 1 but if the pin is marked
ACTIVE_LOW in the DT it gets inverted and leaves the TPM in reset.
Let the gpio driver take care of the reset polarity.
Signed-off-by: Kayla Theil <kayla.theil@mixed-mode.de>
Default address cells value on the livetree access function
returns the wrong value. Fix this so that the value returned
corresponds to the device tree specification.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The commit "libfdt: fdt_address_cells() and fdt_size_cells()" introduced
a bug as it consolidated code between the helpers for getting
be 0, and is frequently found so in practice for /cpus. IEEE1275 only
requires implementations to handle 1..4 for #address-cells, although one
could make a case for #address-cells == #size-cells == 0 being used to
represent a bridge with a single port.
While we're there, it's not totally obvious that the existing implicit
cast of a u32 to int will give the correct results according to strict C,
although it does work in practice. Straighten that up to cast only after
we've made our range checks.
This is based on upstream commit:
b8d6eca ("libfdt: Allow #size-cells of 0")
but misses the test cases,as we don't implement them in U-Boot.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
According to the device tree specification, the default value for
was not present.
This patch also makes fdt_address_cells() and fdt_size_cells() conform
to the behaviour documented in libfdt.h. The defaults are only returned
if fdt_getprop() returns -FDT_ERR_NOTFOUND, otherwise the actual error
is returned.
This is based on upstream commit:
aa7254d ("libfdt: return correct value if #size-cells property is not present")
but misses the test case part, as we don't implement them in U-Boot.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Add internal fdt_cells() to avoid copy and paste. Fix typo in
fdt_size_cells() documentation comment.
This is based in upstream commit:
c12b2b0 ("libfdt: fdt_address_cells() and fdt_size_cells()")
but misses the test cases, as we don't implement them in U-Boot.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
When I tried to run some new efi tests with pytest, efi_smbios_register()
triggered a segmentation fault. Here is the location where it happened:
efi_init_obj_list()
efi_smbios_register()
write_smbios_table()
smbios_write_type4()
smbios_write_type4_dm()
where dev_get_parent_platdata() should return a pointer to struct
cpu_platdata, but it is actually NULL because any cpu device on
sandbox is attached to "root_driver."
With this patch, this issue will be fixed by moving all the definitions
of cpus under "cpus" node so that they have a "cpu_bus" parent.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In the Linux pinctrl binding, the pin configuration nodes don't need to
be direct children of the pin controller device (may be grandchildren for
example). This behavior is managed with the pinconfig u-class which
recursively bind all the sub-node of the pin controller.
But for some binding (when pin configuration is only children of pin
controller) that is not necessary. U-Boot can save memory and reduce
the number of pinconf instance when this feature is deactivated
(for arch stm32mp for example for SPL).
This patch allows to control this feature with a new option
CONFIG_PINCONF_RECURSIVE when it is possible for each individual
pin controller device.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present the symbol information is written to binaries just before
binman exits. This is fine for entries within sections since the section
contents is calculated when it is needed, so the updated symbol values are
included in the image that is written.
However some binaries are inside entries which have already generated
their contents and do not notice that the entries have changed (e.g. Intel
IFWI).
Move the symbol writing earlier to cope with this.
Signed-off-by: Simon Glass <sjg@chromium.org>
The Intel IFWI (Integrated Firmware Image) is effectively a section with
other entries inside it. Support writing symbol information into entries
within it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for the ProcessContents() method in this entry so that it is
possible to support entries which change after initial creation.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this class reads its entries in the constructor. This is not
how things should be done now. Update it.
Signed-off-by: Simon Glass <sjg@chromium.org>
The Intel FSP supports initialising memory early during boot using a binary
blob called 'fspm'. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to access the size of an image in SPL, with
something like:
binman_sym_declare(unsigned long, u_boot_any, size);
...
ulong u_boot_size = binman_sym(ulong, u_boot_any, size);
Add support for this and update the tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present these are large enough to hold 20 bytes of symbol data. Add
four more bytes so we can add another test.
Unfortunately at present this involves changing a few test files to make
room. We could adjust the test files to not specify sizes for entries.
Then we could make the tests check the actual sizes. But for now, leave it
as it is, since the effort is minor.
Signed-off-by: Simon Glass <sjg@chromium.org>
Entries which include a section and need to obtain its contents call
GetData(), as with any other entry. But the current implementation of this
method in entry_Section requires the size of the section to be known. If
it is unknown, an error is produced, since size is None:
TypeError: can't multiply sequence by non-int of type 'NoneType'
There is no need to know the size in advance since the code can be
adjusted to build up the section piece by piece, instead of patching each
entry into an existing bytearray.
Update the code to handle this and add a test.
Signed-off-by: Simon Glass <sjg@chromium.org>
Two of the test files somehow were not converted to three digits. Fix
them, using the next available numbers.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we only support symbols inside binaries which are at the top
level of an image. This restrictions seems unreasonable since more complex
images may want to group binaries within different sections.
Relax the restriction, adding a new _SetupTplElf() helper function.
Also fix a typo in the comment for testTpl().
Signed-off-by: Simon Glass <sjg@chromium.org>
We use the Makefile for all ELF test files now, so drop all the code that
checks whether to get the test file from the Makefile or from the git
repo.
Also add a comment to the Makefile indicating that it is run from binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
Remove this file from git and instead build it using the Makefile.
With this change a few things need to be adjusted:
1. The 'notes' section no-longer appears at the start of the ELF file
(before the code), so update testSymbols to adjust the offsets.
2. The dynamic linker is disabled to avoid errors like:
"Not enough room for program headers, try linking with -N"
3. The interpreter note is moved to the end of the image, so that the
binman symbols appear first.
Signed-off-by: Simon Glass <sjg@chromium.org>
Remove this file from git and instead build it using the Makefile.
Update tools.GetInputFilename() to support reading files from an absolute
path, so that we can read the Elf test files easily. Also make sure that
the temp directory is report in ELF tests as this was commented out.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the ELF test files are checked into the U-Boot tree. This is
covenient since the files never change and can be used on non-x86
platforms. However it is not good practice to check in binaries and in
this case it does not seem essential.
Update the binman test-file Makefile to support having source in a
different directory. Adjust binman to run it to build bss_data, as a
start. We can add other files as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this command silently fails if something goes wrong. Use the
tools.Run() function instead, since it reports errors.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this entry does not work correctly when a FIT image is used as
the input. It updates the FIT instead of the output image. The test passed
because the FIT image happened to have the right data already.
Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
A Firmware Image Table (FIT) is a data structure defined by Intel which
contains information about various things needed by the SoC, such as
microcode.
Add support for this entry as well as the pointer to it. The contents of
FIT are fixed at present. Future work is needed to support adding
microcode, etc.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present these two sections of code are linked together into a single
2KB chunk in a single file. Some Intel SoCs like to have a FIT (Firmware
Interface Table) in the ROM and the pointer for this needs to go at
0xffffffc0 which is in the middle of these two sections.
Make use of the new 'reset' entry and change the existing 16-bit entry to
include just the 16-bit data.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present binman has a single entry type for the 16-bit code code needed
to start up an x86 processor. This entry is intended to include both the
reset vector itself as well as the code to move to 32-bit mode.
However this is not very flexible since in some cases other data needs to
be included at the top of the SPI flash, in between these two pieces. For
example Intel requires that a FIT (Firmware Image Table) pointer be placed
0x40 bytes before the end of the ROM.
To deal with this, add a new reset entry for just the reset vector. A
subsequent change will adjust the existing 'start16' entry.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the Intel IFWI entry uses 'replace' without the 'ifwi-' prefix.
This is a fairly generic name which might conflict with the main Entry
base class at some point, if more features are added. Add a prefix.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some versions of binutils generate hidden symbols which are currently not
parsed by binman. Correct this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Recent versions of binutils add a '.note.gnu.property' into the ELF file.
This is not required and interferes with the expected output. Drop it.
Also fix testMakeElf() to use a different file for input and output.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if libfdt is not available binman can't do anything much.
Improve the situation a little.
Ideally there should be a test to cover this, but I'm not quite sure how
to fake this.
Signed-off-by: Simon Glass <sjg@chromium.org>
(fixed up missing ReadChildData() enty test)
It is more common to use the name 'cls' for the class object of a class
method, to distinguish it from normal methods, which use 'self' Update the
binman tests accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present tools are not expected to fail. If they do an exception is
raised but there is no detail about what went wrong. This makes it hard
to debug if something does actually go wrong.
Fix this by outputting both stderr and stdout on failure.
Signed-off-by: Simon Glass <sjg@chromium.org>
In new versions of Android Boot Image next fields are added to the
header (and corresponding payloads are added to the image itself):
- v1: Recovery DTBO
- v2: DTB
Account for these new fields in next functions:
1. android_image_get_end(): as v1 and v2 have new payloads in the
image, the calculation of image end address should be extended
correspondingly; this is used e.g. by "bootm" command when booting
the kernel from Android Boot Image
2. android_print_contents(): new fields values in v1 and v2 should be
printed; the result of this function can be seen e.g. in "iminfo"
command
This commit doesn't add the means for working with new payloads in v1
and v2 images (it will be done in further commits), it only updates
existing functions w.r.t. changes in boot image v1/v2.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
As android_image.h uses types like u32, we need to include corresponding
headers in place. Otherwise the user will be forced to include those in
C file, or next build error can occur:
include/android_image.h:32:5: error: unknown type name 'u32'
u32 kernel_size; /* size in bytes */
Include required headers for data types used. While at it, remove
typedef struct, which is prohibited by kernel coding style, and fix the
comment.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
u-boot-imx-20191014
-------------------
Travis: https://travis-ci.org/sbabic/u-boot-imx/builds/597498628
- logicpd pinmux
- i.MX7ULP: imx_ddr_size
- fixes Toradex i.MX6/i.MX7
- pico-imx7d
- tpc70 converted to DM
- New Board: meerkat96
- add HAB version command
- i.MX8 :
imx8: Jump from alias to OCRAM address at SPL init
imx8qm/qxp: Set SPL TEXT base to OCRAM base
- Add sdhci driver for Broadcom iProc platform
- Add a driver callback for power-cycle for mmc
- Implement host_power_cycle callback for stm32_sdmmc2
- spl: dm_mmc: Initialize only the required mmc device
THe RVT data includes a major and minor version in its header
parameter. Add a new command to print this out.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Use imx_ddr_size() to retrieve the total DDR size instead
of passing a hardcoded memory size.
imx_ddr_size() calculates the memory size based on the actual
MMDC registers values and is useful to detect misconfigurations,
so switch to this more robust approach.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
i.MX7ULP uses the same MMDC controller IP as found on i.MX53
and i.MX6, so build mmdc_size.c for i.MX7ULP as well.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
The original imx_ddr_size() implementation had some
issues reported by checkpatch like this:
CHECK: Prefer kernel type 'u32' over 'uint32_t'
#127: FILE: arch/arm/mach-imx/mmdc_size.c:16:
+ uint32_t ctl;
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
#151: FILE: arch/arm/mach-imx/mmdc_size.c:40:
+ unsigned ctl = readl(&mem->ctl);
Fix all of them.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Place imx_ddr_size() into a separate file.
The motivation for doing this is to be able to easily reuse
imx_ddr_size() on i.MX7ULP.
Currently imx_ddr_size() is inside arch/arm/mach-imx/cpu.c, which
is not built for i.MX7ULP.
Changing the logic to allow building cpu.c for i.MX7UP would
require adding several ifdef's, leading to a not a very elegant
solution.
To allow better reuse, just place imx_ddr_size() into a common
mmdc_size.c file.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
The new class dsi host allows the management of the bridge DPI to DSI.
This bridge is embedded in the chipset mp1 (come from synopsys company).
Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
The new class dsi host allows the management of the bridge DPI to DSI.
This bridge is embedded in the chipset mp1 (come from synopsys company).
Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
Support for Raydium RM68200 720p dsi 2dl video mode panel.
This rm68200 panel driver is based on the Linux Kernel driver from
drivers/gpu/drm/panel/panel-raydium-rm68200.c.
Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
Add a Synopsys Designware MIPI DSI host bridge driver, based on the
Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
Display Serial Interface (DSI) host can usefully be modelled
as their own uclass.
DSI defines a serial bus and a communication protocol
between the host and the device (panel, bridge).
Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
This also enables mtd configs which are required by nandbcb command.
This command would be used to configure boot control block(BCB) while
writing spl image on nand device.
Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
Implementation of pmic_get() uses uclass_find_device_by_name(), which
behaviour was changed in 4213609cc7
("drivers: core: use strcmp when find device by name"). Now we have to
supply full node name with unit address.
Fixes boot issue:
U-Boot 2019.07-00788-g0ef6e69a1e-dirty (Jul 19 2019 - 15:27:02 +0300)
CPU: Freescale i.MX7D rev1.3 1000 MHz (running at 792 MHz)
CPU: Extended Commercial temperature grade (-20C to 105C) at 41C
Reset cause: POR
DRAM: 512 MiB
initcall sequence 9ffd3a4c failed at call 87803c61 (err=-19)
ERROR Please RESET the board
Fixes: 4213609cc7("drivers: core: use strcmp when find device by name")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
When building a FIT image for SPL to load also take into account the
configured external offset. This allows the SPL to load the u-boot FIT
image correctly when configuring SECURE_BOOT on i.mx6 is enabled
(with CONFIG_FIT_EXTERNAL_OFFSET=0x3000).
Note this doesn't allow secure booting; but it does allow an unsigned
SPL/u-boot with secure boot support eanbled to boot on open device.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Modify the SPL TEXT base from OCRAM alias to OCRAM base 0x100000, so
we can use full OCRAM not limit to 96KB
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
When running SPL on iMX8, the A core starts at address 0
which is a alias to OCRAM 0x100000.
The alias only map first 96KB of OCRAM, so this require the
SPL size can't beyond 96KB. But when using SPL DM, the size increase
significantly and may exceed 96KB.
So to fix the problem, we will change SPL linker address to OCRAM
address 0x100000. And then jump to the absolute address not the PC relative
address for entering OCRAM.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
This patch updates envs responsible for using USB pendrive as a
SWUpdate based tool for recovery and update.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This patch converts the TPC70 to use driver model and device tree
description in both SPL and u-boot proper.
Notable changes (DM/DTS conversion):
- PINCTRL{_IMX6}
- DM_I2C
- enable 'regulator' and 'pmic' commands
- DM_MMC and BLK (USDHC)
- DM_ETH
- DM WDT (including SYSRESET)
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit adds new file - imx6q-kp-u-boot.dtsi with a set of u-boot
specific properties for imx6q KP device.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The TPC70 can boot from SD card (debug/development) and eMMC (production).
The board_boot_order() function provides a run time check for the device
from which one wants to boot (it is selected by GPIO pins setup).
Moreover, a fallback to SD card is provided if the detection is not
possible or working properly.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
With the OCRAM expanded to 256KB and the SPL_PINCTRL enabled with
-u-boot.dtsi entries to include the pinmuxing in SPL, the manual
code setting up the pinmux can go away.
This patch removes the legacy pinmuxing code from the board file.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
With the 256KB of OCRAM available to SPL now, there should be
enough room to enable the pinmuxing in SPL from the device tree.
This patch enables SPL_PINCTRL et al and adds the serial and
usdhc pin mux references to the -u-boot.dtsi file so the pins can be
configured from the device tree.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Since this board config only supports, the i.MX6D/i.MX6Q configurations,
256K of on-chip RAM is available which increases the space available
to SPL to help further reduce board code and further enable device tree
functions.
This patch enables 256K of RAM.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
So we can get rid of legacy pci config code.
PCI_PNP is not required for this board, remove it to reduce the size of the
u-boot binary.
DM_PCI does not start the host controller automatically anymore. Do so
in preboot instead.
Signed-off-by: Soeren Moch <smoch@web.de>
Both the distro boot configuration as well as the general pxe support
standardized on fdtfile as the variable to hold the dtb filename.
Adjust to follow that such that e.g. "pxe boot" will just work.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Mipi_display.c contains a set of dsi helpers.
This file is a copy of file drm_mipi_dsi.c (linux kernel).
Signed-off-by: Yannick Fertré <yannick.fertre@st.com>
We don't need to pull in anything from the MIPS job so exclude that from
the new bcm job and make it clear it's building only ARM.
Signed-off-by: Tom Rini <trini@konsulko.com>
When hitting an invalid FAT cluster while reading a file always print an
error message and return an error code.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
At this point, all drivers that do not use CONFIG_BLK are past their
migration deadlines, so remove this config as it's no longer helpful and
hinders enhancing block drivers.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
This define indicates if DM_SPI shall be supported in SPL. This allows
proper operation of DM converted SPI drivers in SPL, which use
#if !CONFIG_IS_ENABLED(DM_SPI) to also support not yet DM/DTS converted
boards.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
If an exception occurs in a loaded image and the relocation offset is
unknown, it is helpful to know the instructions pointed to by the
program counter. This patch adds the missing output.
A possible output is:
Code: 910c4021 aa1303e0 f9400662 d63f0040 (e7f7defb)
The parentheses indicate the instruction causing the exception.
The output can be disassembled using scripts/decodecode:
echo 'Code: 90000360 9100b800 94002782 17ffff8f (e7f7defb)' | \
ARCH=arm64 scripts/decodecode
Code: 90000360 9100b800 94002782 17ffff8f (e7f7defb)
All code
========
0: 90000360 adrp x0, 0x6c000
4: 9100b800 add x0, x0, #0x2e
8: 94002782 bl 0x9e10
c: 17ffff8f b 0xfffffffffffffe48
10:* e7f7defb .inst 0xe7f7defb ; undefined <-- trapping instruction
Code starting with the faulting instruction
===========================================
0: e7f7defb .inst 0xe7f7defb ; undefined
We already have implemented the same for armv7.
For testing command 'exception undefined' can be used.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
readb is unconditionally defined earlier in io.h, so there's no point
checking whether it's undefined.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
No ARM board seems to define __mem_pci - and if it did, one would get tons of
./arch/arm/include/asm/io.h:307:0: warning: "readl" redefined
warnings, because readl and friends are unconditionally defined
earlier in io.h. Moreover, the redefinitions lack the memory barriers
that the first definitions have. So I'm guessing this is practically
dead code.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
This change allows setting pre-defined eMMC boot partition for SPL eMMC
booting. It is necessary in the case when one wants to boot (through falcon
boot) from eMMC after loading SPL from other memory (like SPI-NOR).
Signed-off-by: Mans Rullgard <mans@mansr.com>
[lukma: Edit the commit message]
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Andreas Dannenberg <dannenberg@ti.com>
This fixes a wrongly indented block of code.
Signed-off-by: Mans Rullgard <mans@mansr.com>
[lukma: Make the commit message more verbose]
Signed-off-by: Lukasz Majewski <lukma@denx.de>
If there is any failure during IOdelay recalibration sequence, IOs are
not guaranteed to behave as expected. So hang on any failure during the
sequence.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
When an error is reported in __recalibrate_iodelay_start(), de-isolation
of IO doesn't happen. Because of this, undefined behaviour is observed
on many peripherals without any error. So make sure io is out of isolation
at the end of iodelay recalibration.
Reported-by: Richard Woodruff <r-woodruff2@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Currently "bootcmd" does not work as intended but instead prints MMC usage
information and goes directly to "nandboot".
Follow what the commit 669681104d ("configs: Fix usage of mmc rescan")
does for other boards prior to support for TechNexion TAO3530 SoM was
added.
Signed-off-by: Jarkko Nikula <jarkko.nikula@bitmer.com>
spl_dm_init is failing as usb to be probed with the following error:
"omap_dwc3@483c0000: ret=-2"
Enable usb to make spl boot on am43xx devices
Reported-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Main uart0 is used as debug console by both R5SPL and A72 bootloader and
Linux. So mark it as shared device so that power-domain request is
successful by both cores.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
AM335x-ICE boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to avoid any problems.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
AM43xx-IDK boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to avoid any problems.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
AM57xx-IDK boards contain the CDCE913 clock synthesizer, and their
reset crystal capacitance load value of 10pF is wrong leading into
lost packets in certain networking tests. Add DT data for this
device, and probe it from the board file to program the crystal
capacitance load value to 0pF to avoid any problems.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Add support for CDCE913/925/937/949 family of devices. These are modular
PLL-based low cost, high performance, programmable clock synthesizers,
multipliers and dividers. They generate up to 9 output clocks from a
single input frequency. The initial version of the driver does not
support programming of the PLLs, and thus they run in the bypass mode
only. The code is loosely based on the linux kernel cdce9xx driver.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Print the board name and ver along with the DT Model.
While at it print the ver for all the detected daughter cards.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Power-domain is enabled by default in device_probe. am654 mmc driver
is enabling power-domain again in probe. As the second call is
redundant, drop power_domain_on from probe.
Tested-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
When running 'run_fit' the FIT file should have been loaded at
'addr_fit', although at this point they should be the same
use this variable instead of 'loadaddr'.
Signed-off-by: Andrew F. Davis <afd@ti.com>
- add BOARD_LATE_INIT function calls in board.c
- add swi_status detection in board.c
- mux: add guardian interfaces to single pinmux structure
- am33xx, kconfig: add BOARD_LATE_INIT for GUARDIAN board
Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
If the ECC is enabled over the entire memory region, we need to ensure
the printf/put calls do not modify the stack after ECC is disabled.
Moved the printf/put statements after ECC is enabled.
Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Before the priming begins, we need to disable RMW (Read Modify Write)
and disable ECC verification for read accesses. By default, the EMIF
tool enables RMW and read accesses in the EMIF_ECC_CTRL_REG.
Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
If ECC is enabled, we need to ensure interleaving is disabled for higher
address space.
Signed-off-by: Krunal Bhargav <k-bhargav@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
ecc_address_range registers contains the start address and end address
of the DDR address space. But the ddr cmd driver is assuming the register
contains the start address and size of the DDR address space. Because
of this some valid ecc addresses are errored out as invalid address.
Fix this calculation.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
ecc_address_range registers contains the start address and end address
of the DDR address space. But the ddr driver is assuming the register
contains the start address and size of the DDR address space. Because
of this the ecc enabling is failing for the 2nd range of ecc addresses.
Fix this calculation.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Regulator should not be enabled at probe time if regulator-boot-on
property is not in the dt node.
"enable-active-high" property is only used to indicate the GPIO
polarity.
See kernel documentation :
- Documentation/devicetree/bindings/regulator/fixed-regulator.yaml
- Documentation/devicetree/bindings/regulator/gpio-regulator.yaml
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
In 32bits mode upper bits need to be set to 0, otherwise controller will
try to DMA into not existing memory and stops with error.
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Oleksandr Rybalko <ray@ddteam.net>
This adds a document for tphy which supports physical layer
functionality for a number of controllers on MediaTek SoCs,
such as, USB2.0, USB3.0, PCIe, and SATA.
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
The driver provides PHY for USB2, USB3.0, PCIe and SATA, and now
we just enable PCIe. As for the other functionalities will be
added gradually in upcoming days.
This is adapted from the Linux version.
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
This commit add a generic function board_init_f that
only initialize some device (for example serial). It
avoid to define a board function only to launch the
serial configuration.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
The Broadcom ARM implementations do not yet have a clock framework so
one can use a fixed clock as the root clock of the hsspi block. The
fixed clock does not have an "enable" routine, since it's always
enabled. So when we hit this issue, getting an ENOSYS return, do not
bail but continue initialization.
Similarly the block might already have been out of reset, say, when
we are booting from a SPI device. So if the reset signal is not configured
in the device tree, do not bail out and instead skip deasserting the reset.
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Make the driver compatible with both big and little endian SOCs.
Replace big-endian calls with their raw equivalents, expect for
writing the command to FIFO. That still has to be in big-endian
format.
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
wait_for_bit_le32 and wait_for_bit_le16 use the raw I/O functions
which would default to big-endian on BE systems. Create the generic
equivalents to use the native endianness.
Signed-off-by: Kursad Oney <kursad.oney@broadcom.com>
Reviewed-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
The A72 U-Boot code loads and boots a number of remote processors
including the C71x DSP, both the C66_0 and C66_1 DSPs, and the various
Main R5FSS Cores. In order to view the code loaded by the U-Boot by
remote cores, U-Boot should configure the memory region with right
memory attributes. Right now U-Boot carves out a memory region which
is not sufficient for all the images to be loaded. So, increase this
carve out region by 256MB.
Signed-off-by: Kedar Chitnis <kedarc@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The A53 U-Boot code can load and boot the MCU domain R5F cores (either a
single core in LockStep mode or 2 cores in Split mode) to achieve various
early system functionalities. Change the memory attributes for the DDR
regions used by the remote processors so that the cores can see and
execute the proper code loaded by U-Boot.
These regions are currently limited to 0xa0000000 to 0xa2100000 as per
the DDR carveouts assigned for these R5F cores in the overall DDR memory
map.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The A53 U-boot can support early booting of the MCU R5F remote processor(s)
from U-boot prompt to achieve various system usecases before booting the
Linux kernel. Update the default BOOTCOMMAND to provide an automatic and
easier way to start the MCU R5F cores through added environment variables.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Enable the R5F remoteproc driver for the AM65x GP EVM so that the
MCU domain R5F cores can be booted from A53 U-boot.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The A72 U-boot can support early booting of any of the R5F or C66x
or C71x remote processors from U-boot prompt to achieve various system
usecases before booting the Linux kernel. Update the default BOOTCOMMAND
to provide an automatic and easier way to start various remote processors
through added environment variables.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Add support to boot the MCU domain R5F Core0 remoteproc at U-boot prompt
on the AM65x EVM boards by using the 'boot_rprocs' and other env variables
defined in the common environment file k3_rproc.h, and updating the
'DEFAULT_RPROCS' macro.
The default configuration is to use the MCU R5F in Split mode, so both
the R5F Core0 and Core1 are started before loading and booting the Linux
kernel using the following firmware:
MCU R5FSS0 Core0 (Split) : 0 /lib/firmware/am65x-mcu-r5f0_0-fw
MCU R5FSS0 Core1 (Split) : 1 /lib/firmware/am65x-mcu-r5f0_1-fw
The MCU R5FSS was initially running the R5 SPL in LockStep mode with ATCM
disabled, and is actually shutdown to enable it to be reconfigured and
booted by either A53 U-Boot or Linux kernel in remoteproc mode and using
ATCM.
The MCU R5FSS would need to be reconfigured for Lockstep mode through
DT if a fault-tolerant/safety application were to be run on the cluster
with the DEFAULT_RPROCS macro updated to remove the Core1 firmware.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add support to boot some remoteprocs at U-boot prompt on the J721E EVM
boards by using the 'boot_rprocs' and other env variables defined in the
common environment file k3_rproc.h, and updating the 'DEFAULT_RPROCS'
macro.
The list of R5F cores to be started before loading and booting the Linux
kernel are as follows, and in this order:
Main R5FSS0 (Split) Core1 : 3 /lib/firmware/j7-main-r5f0_1-fw
Main R5FSS1 (LockStep) : 4 /lib/firmware/j7-main-r5f1_0-fw
The MCU R5FSS0 and Main R5FSS1 are currently in LockStep mode, so the
equivalent Core1 rprocs (rproc #1 and #5) are not included. The Main
R5FSS0 Core0 (rproc #2) is already started by R5 SPL, so is not included
in the list either.
The DSP cores are started in the following order before loading and
booting the Linux kernel:
C66_0: 6 /lib/firmware/j7-c66_0-fw
C66_1: 7 /lib/firmware/j7-c66_1-fw
C71_0: 8 /lib/firmware/j7-c71_0-fw
The order of the rprocs to boot can be changed at runtime if desired by
overwriting the 'rproc_fw_binaries' environment variable at U-boot prompt.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add a new file include/environment/ti/k3_rproc.h that defines
common environment variables useful for booting various remote
processors from U-Boot. This file is expected to be included in
the board config files with the EXTRA_ENV_RPROC_SETTINGS added
to CONFIG_EXTRA_ENV_SETTINGS and DEFAULT_RPROCS macro overwritten
to include the actual list of processors to be booted.
The 'boot_rprocs' variable just needs to be added to the board's
bootcmd to automatically boot the processors, and runtime control
can be achieved through the 'dorprocboot' variable.
The variables are currently defined to use MMC as the boot media,
and can be expanded in the future to include other boot media.
The immediate usage is intended for K3 J721E SoCs.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
The AM65x SoCs has a single dual-core Arm Cortex-R5F processor
subsystem/cluster (MCU_R5FSS0) within the MCU domain. This cluster
can be configured at boot time to be either run in a LockStep mode
or in an Asymmetric Multi Processing (AMP) fashion in Split-mode.
This subsystem has 64 KB each Tightly-Coupled Memory (TCM) internal
memories for each core split between two banks - ATCM and BTCM
(further interleaved into two banks). There are some IP integration
differences from standard Arm R5 clusters such as the absence of
an ACP port, presence of an additional TI-specific Region Address
Translater (RAT) module for translating 32-bit CPU addresses into
larger system bus addresses etc.
Add the DT node for the MCU domain R5F cluster/subsystem, the two
R5 cores are added as child nodes to the main cluster/subsystem node.
The cluster is configured to run in Split-mode by default, with the
ATCMs enabled to allow the R5 cores to execute code from DDR with
boot-strapping code from ATCM. The inter-processor communication
between the main A72 cores and these processors is achieved through
shared memory and Mailboxes.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The J721E SoCs have a single TMS320C71x DSP Subsystem in the MAIN
voltage domain containing the next-generation C711 CPU core. The
subsystem has 32 KB of L1D configurable SRAM/Cache and 512 KB of
L2 configurable SRAM/Cache. This subsystem has a CMMU but is not
used currently. The inter-processor communication between the main
A72 cores and the C711 processor is achieved through shared memory
and a Mailbox. Add the DT node for this DSP processor sub-system
in the common k3-j721e-main.dtsi file.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The J721E SoCs have two TMS320C66x DSP Core Subsystems (C66x CorePacs)
in the MAIN voltage domain, each with a C66x Fixed/Floating-Point DSP
Core, and 32 KB of L1P & L1D configurable SRAMs/Cache and an additional
288 KB of L2 configurable SRAM/Cache. These subsystems do not have
an MMU but contain a Region Address Translator (RAT) sub-module for
translating 32-bit processor addresses into larger bus addresses.
The inter-processor communication between the main A72 cores and
these processors is achieved through shared memory and Mailboxes.
Add the DT nodes for these DSP processor sub-systems in the common
k3-j721e-main.dtsi file.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The J721E SoCs have 3 dual-core Arm Cortex-R5F processor (R5FSS)
subsystems/clusters. One R5F cluster (MCU_R5FSS0) is present within
the MCU domain, and the remaining two clusters are present in the
MAIN domain (MAIN_R5FSS0 & MAIN_R5FSS1). Each of these can be
configured at boot time to be either run in a LockStep mode or in
an Asymmetric Multi Processing (AMP) fashion in Split-mode. These
subsystems have 64 KB each Tightly-Coupled Memory (TCM) internal
memories for each core split between two banks - ATCM and BTCM
(further interleaved into two banks). There are some IP integration
differences from standard Arm R5 clusters such as the absence of
an ACP port, presence of an additional TI-specific Region Address
Translater (RAT) module for translating 32-bit CPU addresses into
larger system bus addresses etc.
Add the DT nodes for these two MAIN domain R5F cluster/subsystems,
the two R5 cores are each added as child nodes to the corresponding
main cluster node. Configure SS0 in split mode an SS1 in lockstep mode,
with the ATCMs enabled to allow the R5 cores to execute code from DDR
with boot-strapping code from ATCM.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The J721E SoCs have 3 dual-core Arm Cortex-R5F processor (R5FSS)
subsystems/clusters. One R5F cluster (MCU_R5FSS0) is present within
the MCU domain, and the remaining two clusters are present in the
MAIN domain (MAIN_R5FSS0 & MAIN_R5FSS1). Each of these can be
configured at boot time to be either run in a LockStep mode or in
an Asymmetric Multi Processing (AMP) fashion in Split-mode. These
subsystems have 64 KB each Tightly-Coupled Memory (TCM) internal
memories for each core split between two banks - ATCM and BTCM
(further interleaved into two banks). There are some IP integration
differences from standard Arm R5 clusters such as the absence of
an ACP port, presence of an additional TI-specific Region Address
Translater (RAT) module for translating 32-bit CPU addresses into
larger system bus addresses etc.
Add the DT node for the MCU domain R5F cluster/subsystem, the two
R5 cores are added as child nodes to the main cluster/subsystem node.
The cluster is configured to run in LockStep mode by default, with the
ATCMs enabled to allow the R5 cores to execute code from DDR with
boot-strapping code from ATCM. The inter-processor communication
between the main A72 cores and these processors is achieved through
shared memory and Mailboxes.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Certain SoCs with K3 architecture have integrated a C66 Corepac DSP
subsystem and an advanced C71 DSPs. Introduce a remoteproc driver
that that does take care of loading an elf to any of the specified
DSPs and start it.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Some Texas Instruments K3 family of SoCs have one of more Digital Signal
Processor (DSP) subsystems that are comprised of either a TMS320C66x
CorePac and/or a next-generation TMS320C71x CorePac processor subsystem.
Add the device tree bindings document for the C66x DSP devices on these
SoCs. The added example illustrates the DT nodes for the first C66x DSP
device present on the K3 J721E family of SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
SoCs with K3 architecture have an integrated Arm Cortex-R5F subsystem
that is comprised of dual-core Arm Cortex-R5F processor cores. This R5
subsytem can be configured at boot time to be either run in a LockStep
mode or in an Asymmetric Multi Processing (AMP) fashion in Split-mode.
This subsystem has each Tightly-Coupled Memory (TCM) internal memories
for each core split between two banks - TCMA and TCMB.
Add a remoteproc driver to support this subsystem to be able to load
and boot the R5 cores primarily in LockStep mode or split mode.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
The Texas Instruments K3 family of SoCs have one of more dual-core
Arm Cortex R5F processor subsystems/clusters (R5FSS). Add the device
tree bindings document for these R5F subsystem devices. These R5F
processors do not have an MMU, and so require fixed memory carveout
regions matching the firmware image addresses. The nodes require more
than one memory region, with the first memory region used for DMA
allocations at runtime. The remaining memory regions are reserved
and are used for the loading and running of the R5F remote processors.
The added example illustrates the DT nodes for the single R5FSS device
present on K3 AM65x family of SoCs.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Power domain for the remote cores needs to be handled in a right
sequence as mandated by the spec. Introduce tisci helper apis
that can control power-domains of remote cores. TISCI clients
can use this api and control the remote cores power domain instead
of hooking it to power-domain layer.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Introduce rproc_elf_get_boot_addr() that returns the entry point of
the elf file. This api auto detects the 64/32 bit elf file and returns
the boot addr accordingly.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Introduce a common remoteproc elf loader and checker functions that
automatically detects the 64 bit elf file or 32 bit elf file and
loads/checks the sections accordingly.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Fabien Dessenne <fabien.dessenne@st.com>
The current rproc-elf-loader supports loading of only 32 bit elf files.
Introduce support for loading of 64 bit elf files in rproc-elf-loader.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Fabien Dessenne <fabien.dessenne@st.com>
rproc_elf32_load_image() rely on user to send a valid address for elf loading.
Instead do a sanity check on the address passed by user. This will help
all rproc elf users to not call sanity_check explicitly before calling
elf_loading.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Fabien Dessenne <fabien.dessenne@st.com>
Introduce a new parameter "size" that accepts size of the region to
remoteproc ops callback device_to_virt(). This can enforce more checks
on the region that device_to_virt() is dealing with.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Fabien Dessenne <fabien.dessenne@st.com>
Reviewed-by: Fabien Dessenne <fabien.dessenne@st.com>
am65x ROM support booting over UART. And U-Boot built for am65x EVM
supports UART boot as well. Add the UART boot procedure into the README
also providing a corresponding example command sequence for execution
on a host PC.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Activate early console functionality on AM654x devices to allow for an
alternate serial port to be used to support UART-based boot. This is so
that System Firmware (SYSFW) can get loaded over the serial port prior
to the main console being brought up and made available.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Although we currently use the MAIN_UART0 for R5 SPL console output there
are cases where we require access to the MCU_UART0 as well for example in
case of UART-based Y-Modem boot. To support these scenarios add related
DTS definitions to be able to use that UART early on.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
In order to allow booting TI K3 family SoCs via Y-Modem add support for
loading System Firmware by tapping into the associated SPL core loader
function.
In this context also make sure a console is available and if not go
ahead and activate the early console feature which allows bringing up
an alternate full console before the main console is activated. Such
an alternate console is typically setup in a way that the associated
UART can be fully initialized prior to SYSFW services being available.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Implement an early console functionality in SPL that can be used before
the main console is being brought up. This helps in situations where the
main console is dependent on System Firmware (SYSFW) being up and running,
which is usually not the case during the very early stages of boot. Using
this early console functionality will allow for an alternate serial port
to be used to support things like UART-based boot and early diagnostic
messages until the main console is ready to get activated.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Expose SPL's Y-Modem core loader function via the common SPL header
file so it can be re-used for purposes other than loading U-Boot itself.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
During FIT reading through ymodem_read_fit() the function
xyzModem_stream_read() is being used which returns zero once the end
of a stream has been reached. This could lead to an premature exit from
ymodem_read_fit() with certain-sized FIT images reporting that zero
bytes overall were read. Such a premature exit would then result in an
-EIO failure being triggered within the spl_load_simple_fit() caller
function and ultimately lead to a boot failure.
Fix this logic by simply aborting the stream read loops and continuing
with the regular code flow which ultimately would lead to returning
the number of bytes to be read ('size') as expected by the callers of
ymodem_read_fit().
Fixes: fa715193c0 ("spl: Add an option to load a FIT containing U-Boot from UART")
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
The doc currently uses sandbox_defconfig as examples of enabling
debug/verbose output of binman. However during a sandbox build it
does not call binman at all. Change it to qemu-x86_defconfig.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
At present this produces a 16-byte file. It is intended to start 16 bytes
before the end of ROM and pads with zeroes to readh the end.
But binman sometimes wants to add an image-header at the very end of ROM.
Furthermore binman automatically pads the data if it is finishes early.
Drop the padding in resetvec and let binman handle it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Many of the Kconfig options do not apply to FSP2. Update them to use the
FSP_VERSION1 condition instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Move the code to determine the size of a cache record into a function so
we can use it elsewhere in this file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The write functions do actually change the contents of memory so it is not
correct to use 'const'. Remove it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a field to the PCI emulator per-device data which records which device
is being emulated. This is useful when the emulator needs to check the
device for something.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/master to get it applied cleanly]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present when these fail to boot there is no message, just a hang. Add a
panic so it is obvious that something when wrong.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
For the correct power cycle sequence with stm32_sdmmc2, the write of the
power cycle value in PWRCTL field of SDMMC_POWER register is now done in
stm32_sdmmc2_host_power_cycle() and no more in stm32_sdmmc2_pwrcycle().
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Some MMC peripherals require specific power cycle sequence, where some
registers need to be written between the regulator is turned off and then
back on. This is the case for the MMC IP embedded in STM32MP1 SoC.
In STM32MP157 reference manual [1], the power cycle sequence is:
1. Reset the SDMMC with the RCC.SDMMCxRST register bit. This will reset
the SDMMC to the reset state and the CPSM and DPSM to the Idle state.
2. Disable the Vcc power to the card.
3. Set the SDMMC in power-cycle state. This will make that the
SDMMC_D[7:0], SDMMC_CMD and SDMMC_CK are driven low, to prevent the card
from being supplied through the signal lines.
4. After minimum 1ms enable the Vcc power to the card.
5. After the power ramp period set the SDMMC to the power-off state for
minimum 1ms. The SDMMC_D[7:0], SDMMC_CMD and SDMMC_CK are set to
drive “1”.
6. After the 1ms delay set the SDMMC to power-on state in which the
SDMMC_CK clock will be enabled.
7. After 74 SDMMC_CK cycles the first command can be sent to the card.
The step 3. cannot be handled by the current framework implementation.
A new callback (host_power_cycle) is created, and called in
mmc_power_cycle(), after mmc_power_off().
The incorrect power cycle sequence has shown some boot failures on
STM32MP1 with some SD-cards, especially on cold boots when the input
frequency is low (<= 25MHz).
Those failures are no more seen with this correct power cycle sequence.
[1] https://www.st.com/resource/en/reference_manual/DM00327659.pdf
Signed-off-by: Yann Gautier <yann.gautier@st.com>
In SPL, all the available mmc devices gets initialized during boot.
This might not work in cases where clocks are not available for
certain mmc devices(other than boot device) and the support for
enabling device might not be ready.
Texas Instruments' K3 J721E device having a central system controller
(dmsc) is one such example falling in this category. Below is the
sequence for the failing scenario:
- ROM comes up in SD mode and loads SPL by just initialing SD card.
- SPL loads dmsc firmware from SD Card.
Since ROM has enabled SD, SPL need not enable the SD, just need
to re initialize the card. But SPL is trying to initialize other MMC
instances which are in disabled state. Since dmsc firmware is not yet
available, devices cannot be enabled. So in SPL, initialize only the
mmc device that is needed.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Build the keystone 3 platforms with the keystone 2 platforms, in order
to get back more room in the "catch-all" build jobs.
Signed-off-by: Tom Rini <trini@konsulko.com>
As both "catch-all" ARM jobs are nearing their time limit, move all of
the bcm SoC boards into a single job.
Signed-off-by: Tom Rini <trini@konsulko.com>
- Rename existing FSP code to fsp1
- Add fsp2 directory in preparation to support FSP 2.0
- Various x86 platform codes update
- Various bug fixes and updates in dm core, sandbox and spl
First set of u-boot-atmel features and fixes for 2020.01 cycle
The feature set includes support for two new boards from Microchip AT91:
The sama5d27_wlsom1_ek , an evaluation kit which includes the SAMA5D2
SOC packaged in a 256 MB LPDDR2 SIP, on a SOM including wireless, which
is placed on evaluation kit with sd-card, ethernet, LCD, Camera sensor,
QSPI, etc
The sam9x60ek, an evaluation kit for the new SoC based on ARM926j , the
SAM9X60 . The evaluation kit includes NAND flash, QSPI, Ethernet, Audio,
Camera sensor connector, etc.
The full support for sam9x60ek will come at a later time. There are
still missing bits regarding the clock support and power management
controller.
Pull request for UEFI sub-system for efi-2020-01-rc1
The major corrections in this pull request are:
Fixes for the SetVariable() boot service.
Device path node for NVMe drives.
Disable CONFIG_CMD_NVEDIT by default.
- Python3 conversion of genboardscfg.py
- Resync Kconfiglib.py
- Switch to running CI on Ubuntu "bionic" to facilitate Python 3.6 being
the minimum we use and test.
In order to run all filesystem tests we need to have newer ext4 tools,
move up to Ubuntu 18.04 'bionic' for our base. We need to change
slightly how we invoke the provided grub-mkimage. This will also make
future python3 work easier.
Signed-off-by: Tom Rini <trini@konsulko.com>
When running as another user we might not be able to use '..' for
certain directories and this is the default for buildman. Specify an
output directory instead.
Signed-off-by: Tom Rini <trini@konsulko.com>
We may not always be able to write to the default output directory so
have a temporary directory for our output be created.
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Stephen Warren <swarren@wwwdotorg.org>
Suggested-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
With the reverting of a previous change to spl_boot_device,
this board needs a new solution to determining if we're booting
from MMC1 or MMC2.
This patch creates board_boot_order function which overrides the
standard, and returns not only MMC1, or MMC2, but also can fall
back to NAND or the serial downloader should other boot options
fail.
Signed-off-by: Adam Ford <aford173@gmail.com>
Apologies to everyone whose board I broke by attempting to return
MMC1 or MMC2. I misunderstood how the MMC indexing worked.
This reverts commit 14d319b185.
Signed-off-by: Adam Ford <aford173@gmail.com>
With upcoming patches u-boot.kwb gets too large.
Save 3740 bytes in u-boot.kwb by disabling Unicode support in the UEFI
sub-system.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
CONFIG_SECURE_BOOT is too generic and forbids to use it for cross
architecture purposes. If Secure Boot is required for imx, this means to
enable and use the HAB processor in the soc.
Signed-off-by: Stefano Babic <sbabic@denx.de>
For NXP SoCs we have to set pinmux configuration ASAP (ideally
before relocation) to get serial console working. Without this we miss
almost the half of output (U-boot version, CPU defails, Reset cause,
DRAM details etc.).
To achieve this we need to force appropriate pinctrl drivers to get
probed before relocation.
Fixes: cd69e8ef9b ("colibri-imx6ull: migrate pinctrl and regulators to dtb/dm")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
1. Commit 3a7c45f6a7 ("simple-bus: add DM_FLAG_PRE_RELOC flag to
simple-bus driver") causes some i.MX boards that were converted
to DM, such as warp7, to fail to boot.
As explained by Lukas Auer:
"With the patch, U-Boot probes the drivers for devices under simple-bus
device tree nodes in the pre-relocation device model. The default value
of CONFIG_SYS_MALLOC_F_LEN (0x4000) leaves U-Boot with not enough memory to
do this, causing it to hang."
Fix this problem by providing a convenient default value for
CONFIG_SYS_MALLOC_F_LEN.
2. CONFIG_SPL_TEXT_BASE was moved to Kconfig, so added in defconfig
"configs: move CONFIG_SPL_TEXT_BASE to Kconfig"
(sha1: f89d6133ee)
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
In order to call preloader_console_init from board_init_f when
DM_SERIAL is enabled, it neesd to call spl_early_init() to get early access
to DM and device tree.
This patch calls spl_early_init just before preloader_console_init()
and enables DM_SERIAL and SPL_DM_SERIAL.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Per the workflow found in crt0.S, we don't need to clear BSS in
board_init_f nor do we need to call board_init_r since that will be
done for us from main when we return from board_init_f.
This patch removes the unneeded function calls from board_init_f.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Add instructions on how to boot mx6ul_14x14_evk_defconfig target
using the Serial Download Protocol.
Add examples from uuu and imx_usb_loader tools.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
On, i.MX8MQ, the PLL config must be done when ddrmix
isolation is released. So move the dram pll init after
iso config done. For other i.MX8M SOC, either init pll
before or after isolation is ok.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Refine the ddr init driver to make it more reusable for different
DDR type(LPDDR4, DDR4 & DDR3L). So we can reduce some redundant
code.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Update the ddrc Qos setting for B1 to align with B0's setting.
Correct the initial clock for dram_pll. This setting will be
overwrite before ddr phy training. Although there is no impact
on the dram init, we still need to correct it to eliminate
confusion.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Tested-by: Robby Cai <robby.cai@nxp.com>
Since the parameter of dram_pll_init is changed, update to use new.
Also remove non-existed header file.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The write data size can be overwritten by writing to the IDATSZ
field of IPCR register. Since the driver always updates the IDATSZ
in page program operation. Set the LUT data size to 0 to align
the codes with iMX.
Signed-off-by: Ye Li <ye.li@nxp.com>
On latest iMX platforms like iMX7D/iMX6UL/iMX8MQ, the QSPI controller
is updated to have TDH field in FLSHCR register. According to reference
manual, this TDH must be set to 1 when DDR_EN is set. Otherwise, the TX
DDR delay logic won't be enabled.
Another issue in DDR mode is the MCR register will be overwritten in
every read/write/erase operation. This causes DDR_EN been cleared while
TDH=1, then no clk2x output for TX data shift and all operations will
fail.
Signed-off-by: Ye Li <ye.li@nxp.com>
board early initialize fec ethernet controller pinmux
only when FEC is enabled
Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
boot order was added to handle both SD and eMMC. But commit
14d319b1 introduced to handle both eMMC and SD globally.
Signed-off-by: Parthiban Nallathambi <pn@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
After u-boot.cnt is padded to flash.bin automatically by script,
no need to burn the image mannually, so drop the step.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
To avoid hardcoded offset when adding u-boot.cnt to flash.bin, we use
flexible offset which is calculated based on the size of the container
image generated int the first stage. And pad u-boot.cnt at 1KB
alignment.
So add code to get the offset when SPL loading u-boot.cnt.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Import i.MX8MM pin func from Linux Kernel,
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Import i.MX8MM dtsi from Linux Kernel,
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Because we need to get cpu freq in print_cpuinfo at very early stage,
so we need to make sure the ccm be probed.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When DM_MMC enabled, the USDHC index in U-Boot is the USDHC port.
To directly return devno, we could avoid add board specific code.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Introduce clk implementation for i.MX8MM, including pll configuration,
ccm configuration. Mostly will be done clk dm driver,
but such as DRAM part, we still use non clk dm driver, because we
have limited sram.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX8MQ and i.MX8MM use different analog pll design, but they
share same ccm design.
Add clock_imx8mq.h for i.MX8MQ
keep common part in clock.h
Signed-off-by: Peng Fan <peng.fan@nxp.com>
To i.MX8MM SCTR clock is disabled by ROM, so before timer init
need to enable it.
To i.MX8MQ, it does not hurt the clock is enabled again.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Set trustzone region 0 to allow both non-secure and secure access
when trust zone is enabled. We found USB controller fails to access
DDR if the default region 0 is secure access only.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When running with OPTEE, the MMU table in u-boot does not remove the OPTEE
memory from its settings. So ARM speculative prefetch in u-boot may access
that OPTEE memory. Due to trust zone is enabled by OPTEE and that memory
is set to secure access, then the speculative prefetch will fail and cause
various memory issue in u-boot.
The fail address register and int_status register in trustzone has logged
that speculative access from u-boot.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX8MM has similar architecture with i.MX8MQ, but it has totally
different PLL design and register layout change.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
There is no HDMI on i.MX8MM, so we need to remove HDMI entry, then
we could not reuse imximage.cfg, so create a new one.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
With CONFIG_SPL_OF_CONTROL, the device tree will be padded to
end of the u-boot-spl-nodtb.bin, however we also put
the ddr firmware file to this location, so need to adapt
the code with SPL OF and align to 4 bytes to ease copy firmware.
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The loader for the DDR firmware in drivers/ddr/imx/imx8m/helper.c uses a
4-byte-aligned address to load the firmware. In cases where OF is
enabled in SPL the dtb will be appended to the SPL binary and can result
in a binary that is not aligned correctly. If OF is not enabled in SPL,
`_end` is already aligned correctly, but this patch does not hurt.
To ensure the correct alignment we use dd to create a temporary file
u-boot-spl-pad.bin with the correct padding.
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Fix the FIT image metadata for i.MX8 to result in the intended boot
order (SPL -> ATF -> U-Boot).
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Use BUILD_TARGET to automatically build "u-boot-with-spl.imx" on MX6
targets with SPL.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Similar to "spl_sd.cfg", this patch introduces "spl_qspi.cfg" so that
all i.MX6 based boards can use it, when they use SPL and QSPI boot
mode.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
This patch adds the missing boot mode detection for QSPI boot on
i.MX6UL/ULL. Without it, booting with SPL from QSPI NOR does not work.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Stefano Babic <sbabic@denx.de>
Since recent splash changes common code for splashscreen logo
should be used instead of adding duplicated code under board
directories. mx6ul_9x9_evk and mx6ul_14x14_evk configurations
used old board specific logo code and do not link, fix them.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
The default CSF_SIZE defined in Kconfig is too high and SPL cannot
fit into the OCRAM in certain cases.
The CSF cannot achieve 0x2000 length when using RSA 4K key which is
the largest key size supported by HABv4.
According to AN12056 "Encrypted Boot on HABv4 and CAAM Enabled Devices"
it's recommended to pad CSF binary to 0x2000 and append DEK blob to
deploy encrypted boot images.
As the maximum DEK blob size is 0x58 we can reduce CSF_SIZE to 0x2060
which should cover both CSF and DEK blob length.
Update default_image.c and image.c to align with this change and avoid
a U-Boot proper authentication failure in HAB closed devices:
Authenticate image from DDR location 0x877fffc0...
bad magic magic=0x32 length=0x6131 version=0x38
bad length magic=0x32 length=0x6131 version=0x38
bad version magic=0x32 length=0x6131 version=0x38
spl: ERROR: image authentication fail
Fixes: 96d27fb218 (Revert "habv4: tools: Avoid hardcoded CSF size for SPL targets")
Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Add support for the reset controller that's used on the i.MX7D
and i.MX8MQ. This will be needed to be able to assert the PCIe
reset pins. Bindings taken from Linux, driver implementation
mostly taken from Linux and adjusted to U-Boot infrastructure.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Add support for the power domain controller that's used on the
i.MX8MQ. This will be needed to be able to power on the PCIe
controller. Bindings taken from Linux, driver implementation
taken from the i.MX8 power domain controller and adjusted for
the i.MX8M SoC.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
doc/README.mxs no longer exists. It has been renamed doc/imx/common/mxs.txt,
so fix the mx28evk README accordingly.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
After this patch the mxs_gpio.c DM/DTS driver can be used at early SPL to
read states of gpio pins (and for example alter the boot flow).
It was necessary to adjust its name to 'fsl_imx_2{38}_gpio' to match
requirements for SPL_OF_PLATDATA usage.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This change replaces printf() with debug() for the notification about
commands timeouts.
This is done on purpose (also other drivers use such approach - dw_mmc.c,
mvebu_mmc.c), as the mmc core code (mmc.c) uses timeouts to assess if one
is using sd card or eMMC device.
In such situation timeout is a some kind of a "normal" behavior and there
shall not be any output to the console.
There is no impact on boot time for boards using this driver (even in SPL)
when two extra timeouts are returned (no SD card present, only eMMC
available).
Boot time tested with grabserial:
sudo grabserial -b 115200 -d /dev/ttyUSB1 -e 30 -t -m "^U-Boot SPL*"
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This patch converts the mxsmmc driver to support DM/DTS.
Moreover, it is also possible to use it in early SPL with
SPL_OF_PLATDATA enabled.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
After this patch the mxs_spi.c DM/DTS driver can be used at early SPL to
read payload from SPI-NOR memories.
It was necessary to adjust its name to 'fsl_imx_2{38}_spi' to match
requirements for SPL_OF_PLATDATA usage.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Without this change the DM/DTS version of mxs_spi driver doesn't reset the
SPI IP block in probe.
As a result this driver (when used solely on U-Boot proper) relies on reset
performed by mxs spi driver in SPL.
In the use case where eMMC is used in SPL as a boot primary device, the
mxs_reset_block() is not called at all and DM/DTS aware SPI driver in
U-Boot proper is malfunctioning.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This change initializes proper member of struct driver -
platdata_auto_alloc_size instead of priv_auto_alloc_size, which is setup
twice.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
After this change it is possible to use imx28-<board>-u-boot.dtsi with
the imx28-u-boot.dtsi explicitly included without breaking setup from
imx28-<board>.dts file.
The problem is that the imx28.dtsi included in a wrong place overrides the
changes made in imx28-<board>.dts. As a result some devices are "disabled"
in the final DTB.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This change tries to fix the following problem:
- The board boots (to be more precise - ROM loads SPL) from a slow SPI-NOR
memory.
As a result the spl_boot_device() will return SPI-NOR as a boot device
(which is correct).
- The problem is that in 'falcon boot' the eMMC is used as a boot medium to
load kernel from its partition.
Calling spl_boot_device() will break things as it returns SPI-NOR device.
To fix this issue the new CONFIG_SPL_FORCE_MMC_BOOT Kconfig flag is
introduced to handle this special use case. By default it is not defined,
so there is no change in the legacy code flow.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The get_board_id() function was using the old gpio_* compatibility layer
to read HW and SW ID numbers encoded on the PCB board.
After this change the new dm_gpio* API is used for this purpose.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
After this change the display5's emergency gpio use dm_gpio* functions
instead of legacy ones (gpio*) to read its state.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit updates the display5_factory_defconfig file after the switch
to DM/DTS for this board.
Moreover, the VID and PID for SPL running SDP gadget have been updated to
allow seamless work with 'uuu' utility from NXP (the imx_usb doesn't work
properly after embedding the u-boot proper into fitImage - problem with IVT
embedding in FIT).
Example to use 'uuu' session:
cat << EOF > display5_recovery.lst
uuu_version 1.2.135
SDP: boot -f /srv/tftp/SPL
SDPU: write -f /srv/tftp/u-boot-dtb.img -addr 0x10000000
SDPU: jump -addr 0x10000000
SDPU: done
EOF
sudo ./uuu/uuu display5_recovery.lst
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The common.c file content can be safely moved to spl.c file after
performing the DM/DTS conversion for the U-Boot proper.
It contains the non DM/DTS setup code, which now is only used by SPL.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit enables support for CONFIG_WDT in the U-Boot proper. Moreover,
the SYSRESET_WATCHDOG driver is used to support 'reset' command.
As SPL is not yet ready for DM conversion, the CONFIG_HW_WATCHDOG is
enabled for it. This allows the legacy SPL code to work properly.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The DM/DTS support for SPI is disabled on purpose for SPL, as it is not
supported as of time of this conversion.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
After this commit the display5 device would use I2C driver supporting
driver model (DM_I2C).
The 'i2c' and 'eeprom' commands now use DM I2C drivers and initialize
on-bus devices according to device tree description.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This change fixes issue with building display5 "factory" U-Boot variant
when the display5 board gains DM/DTS support.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This code uses HW difference on the USB_RESET pin (added PULL UP resistor
on the L333 rev) to distinguish between two BK4 HW revisions.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Add Falcon mode support, which allows the SPL to load and
jump to the Linux kernel directly, without the need of loading
U-Boot proper.
CONFIG_SPL_OS_BOOT=y needs to be passed in the defconfig
in order to use Falcon mode.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
We should use a common script to allow booting the U-Boot console as
fallback so we ended using a 'default_boot' and 'base_boot'
environment scripts to accomplish that.
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Allow enable_ipu_clock() to be built for SPL code. This is done
in preparation for configuring the NoC registers on i.MX6QP in SPL.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
U-Boot binary has grown in such a way that it goes beyond the reserved
area for the environment variables.
Running "saveenv" causes U-Boot to hang because of this overlap.
Fix this problem by increasing the CONFIG_ENV_OFFSET size.
Also, in order to prevent this same problem in the future, use
CONFIG_BOARD_SIZE_LIMIT, which will detect the overlap in build-time.
CONFIG_BOARD_SIZE_LIMIT does not accept math expressions, so declare
CONFIG_ENV_OFFSET with its direct value instead.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Default value is too high and it covers the worst case. SPL for
imx6dl_mamoj becomes too big and cannot fit into the OCRAM, but CSF size
can be reduced.
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Jagan Teki <jagan@amarulasolutions.com>
CC: Breno Lima <breno.lima@nxp.com>
This syncs all baseboard specific defconfig using the
pico-imx7d_defconfig as base. It changes:
- pico-dwarf-imx7d_defconfig
- pico-hobbit-imx7d_defconfig
- pico-nymph-imx7d_defconfig
- pico-pi-imx7d_defconfig
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Remove CONFIG_SPL_DRIVERS_MISC_SUPPORT since it is already defined
in include/configs/mx6_common.h for SPL builds. When this option
is in defconfig, we get build warnings (or errors when building
with -Werror).
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Add the TechNexion's logo from their internal U-Boot tree.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
When CONFIG_SPL_OS_BOOT is selected, it is still convenient to be able
to escape from Falcon mode and boot to U-Boot proper.
Add a mechanism that allows booting in U-Boot proper when the
key 'c' is entered on console at boot time.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Improve the README by adding instructions on how to boot using
Falcon mode, which allows the SPL to load the kernel directly,
without using U-Boot proper.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
This add the boot menu option for the NYMPH baseboard as well as a
specific config file for users which wish to use it as a pre-defined
board.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
This add the boot menu option for the DWARF baseboard as well as a
specific config file for users which wish to use it as a pre-defined
board.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Update pico-hobbit-imx7d_defconfig using pico-imx7d_defconfig as base
to fix device tree file generation. With this all pico-imx7d are
creating u-boot-dtb.img files.
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
When CONFIG_SPL_OS_BOOT is selected, it is still convenient to be able
to escape from Falcon mode and boot to U-Boot proper.
Add a mechanism that allows booting in U-Boot proper when the
key 'c' is entered on console at boot time.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Sync the Falcon mode instructions with the ones fro pico-imx7d.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Add support for the VXT VL050-8048NT-C01 panel connected through
the 24 bit parallel LCDIF interface.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
U-Boot binary has grown in such a way that it goes beyond the reserved
area for the environment variables.
Running "saveenv" causes U-Boot to hang because of this overlap.
Fix this problem by increasing the CONFIG_ENV_OFFSET size.
Also, in order to prevent this same problem in the future, use
CONFIG_BOARD_SIZE_LIMIT, which will detect the overlap in build-time.
CONFIG_BOARD_SIZE_LIMIT does not accept math expressions, so declare
CONFIG_ENV_OFFSET with its direct value instead.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Fabio Berton <fabio.berton@ossystems.com.br>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
This add the boot menu option for the DWARF baseboard as well as a
specific config file for users which wish to use it as a pre-defined
board.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Currently it's not possible to authenticate the U-Boot proper of
mx6ul_14x14_evk_defconfig target:
Authenticate image from DDR location 0x877fffc0...
bad magic magic=0x0 length=0x00 version=0x3
bad length magic=0x0 length=0x00 version=0x3
bad version magic=0x0 length=0x00 version=0x3
spl: ERROR: image authentication fail
Commit 0633e13478 ("imx: hab: Increase CSF_SIZE for i.MX6 and
i.MX7 devices") has increased CSF_SIZE to avoid a possible issue
when booting encrypted boot images.
Commit d21bd69b6e ("tools: mkimage: add firmware-ivt image type
for HAB verification") is hardcoding the CSF and IVT sizes, the
new CSF size is not being considered and u-boot-ivt.img fails to
boot.
Avoid hardcoded CSF and IVT size to fix this issue.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Add sc_pm_is_partition_started to check whether a partition
has been started. This will be used to detect M4 partition booted up or
not, then we could choose which dtb to use. If M4 is up, we need
use dtb, such as imx8qm-mek-rpmsg.dtb.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add OP-TEE device tree node for Linux according to args passed from ATF.
If ATF has been built with OP-TEE running, boot_pointer[1] will indicate
that.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
On i.MX8QM, sid is programmable, so we could program sid according the
value encoded in device tree.
This patch support legacy bindings which are still being used by XEN
and new bindings used by Linux Kernel.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Enable CONFIG_OF_SYSTEM_SETUP to let U-Boot could disable
device tree nodes that could not be used by Linux.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When resource is not assigned to non-secure Linux, if linux continue
to use the node, linux may crash or hang. So need to set the node
status to disabled for not owned resources.
The resource id is in the power-domains property in device tree,
so parse the power-domains property to get the resource id and
use scfw api to check whether it is owned by current partition.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since SCU MU driver has been bound in dm_init, so we don't need to
bind it again. Just replace by using uclass function to probe it.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Because FIT could not be used for AHAB secure boot on i.MX8,
so switch to use container image that could let SPL verify
ATF and U-Boot with AHAB.
Enable HUSH_PARSER in defconfig to make run netboot could work.
Note: The AHAB related code has not been added.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Because FIT could not be used for AHAB secure boot on i.MX8,
so switch to use container image that could let SPL verify
ATF and U-Boot with AHAB.
Note: The AHAB related code has not been added.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
To support SPL loading container file, add a new Makefile target,
and introduce a new Kconfig file to source the cfg file which
will be parsed by mkimage.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add parsing i.MX8 Container file support, this is to let
SPL could load images in a container file to destination address.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The first stage of flash.bin is larger than 584 * 512, so when
writting u-boot.itb, some data will be override. Enlarge the
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR to fix boot.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The changes were added by following patch:
commit <9002e735e717> ("imx: mx6sabresd: fix boot hang with video")
commit <f45ec8fcfb86> ("imx6: dts: add 'u-boot, dm-pre-reloc' to soc and ipu nodes")
Let's move the U-Boot specific change to imx6qdl-u-boot.dtsi
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since commit 6e1f4d2652 ("arm: imx-common: add SECURE_BOOT option
to Kconfig") the SECURE_BOOT option is selected through Kconfig.
Cleanup comments in code to align with this change.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
In case CONFIG_SECURE_BOOT is enabled we need to limit the SPL size to
avoid a possible HAB failure event:
--------- HAB Event 1 -----------------
event data:
0xdb 0x00 0x14 0x42 0x33 0x22 0x33 0x00
0x00 0x00 0x00 0x0f 0x00 0x90 0x70 0x00
0x00 0x01 0x10 0x00
STS = HAB_FAILURE (0x33)
RSN = HAB_INV_ADDRESS (0x22)
CTX = HAB_CTX_TARGET (0x33)
ENG = HAB_ENG_ANY (0x00)
As explained in Commit 23612534fe ("spl: imx6: Provide a SPL_SIZE_LIMIT
default") the i.MX6 SPL size limit is 68KB.
The ROM code is copying the image size defined in boot data to its
respective load address, in case we exceed the OCRAM free region a
HAB invalid address failure event is generated.
The maximum CSF size is defined in CONFIG_CSF_SIZE, reduce SPL size
limit based on this configuration.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Move CONFIG_CSF_SIZE to Kconfig and define default value as 0x4000.
mx8mqevk requires 0x2000 add this configuration in imx8mq_evk_defconfig
file.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Currently the SPL binary is 67 kB, which leaves only 1 kB of free
internal RAM space.
The following options can be safely removed to save some precious
SPL space:
- CONFIG_SPL_FS_EXT4: u-boot-dtb.img is stored in raw sector via dd
command (at offset 69 kB)
- CONFIG_SPL_I2C_SUPPORT: I2C is not used during SPL
- CONFIG_SPL_OS_BOOT: no need to make Falcon mode supported
by default
After this change the SPL binary size gets down to 51 kB.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
On i.MX7ULP B0, there is change in NIC clock dividers architecture.
On A0, the NIC1 BUS and EXT dividers were in a chain with NIC1 DIV, but
on B0 they are parallel with NIC1 DIV. So now the dividers are independent.
This patch modifies the scg_nic_get_rate function according to this change.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
The normal target frequency for ULP A7 core is 500Mhz, but now ROM
set the core frequency to 413Mhz. So change it to 500Mhz in u-boot.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The GPU uses APLL PFD2 as its clock parent (483.84Mhz) with divider
set to 1. This frequecy is out of ULP A0 spec. The MAX rate for GPU
is 350Mhz. So we simply configure the APLL PFD2 to 345.6Mhz (FRAC=28)
to workaround the problem. The correct fix should let GPU handle the
clock rate in kernel.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The num/denom is a float value, but in the calculation it is convert
to integer 0, and cause the result wrong.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Wrong I2c driver configuration name is used in codes, so I2c driver is
not built. Correct it.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since many drivers need this CONFIG_MX7ULP to distiguish the settings
for i.MX7ULP only. Add this entry to cpu's kconfig.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The offset for FRAC and the mask for PCD are not correct.
If we set FRAC, we can't get the right frequency. Fix them
to correct value.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
On i.MX7ULP, value zero is reserved in SCG1 RCCR register,
so the val should be decreased by 1 to get the correct clock
source index.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The board will reboot if A7 core enter mem mode by rtc, then M4 core
enter VLLS mode after the RTC alarm expired. Enable the dumb PMIC mode
to fix this issue.
Since i.MX7ULP B0 moves the SNVS LP into M4 domain, A core can't access
it. So check the CPU rev and not apply the settings for B0.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Since the SD3.0 kernel driver needs M4 image support, this causes
problem for usb boot booting into kernel. To decouple the relationship,
we modify the FDT file in u-boot to disable SD3.0.
So the kernel won't depend on M4 image.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add CONFIG_DM_GPIO to all defconfigs whose board is
nitrogen6x.
mx6qsabrelite_defconfig
nitrogen6dl2g_defconfig
nitrogen6dl_defconfig
nitrogen6q2g_defconfig
nitrogen6q_defconfig
nitrogen6s1g_defconfig
This is in preparation for adding CONFIG_DM_SPI.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
This prevents messages like
gpio@20a0000: get_value: error: gpio GPIO2_2 not reserved
when CONFIG_DM_GPIO is enabled.
Also, when CONFIG_DM_GPIO is enabled, checkboard is too
early to use gpio_get_value, so read it directly on failure.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Add DM_MMC to all defconfigs whose board is
nitrogen6x.
mx6qsabrelite_defconfig
nitrogen6dl2g_defconfig
nitrogen6dl_defconfig
nitrogen6q2g_defconfig
nitrogen6q_defconfig
nitrogen6s1g_defconfig
This commit is adding multiple configs, but
seems to be the minimum change to not lose features
and still compile fine.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Previously the SPL size on all iMX6 platforms was restricted to 68KB
because the OCRAM size on iMX6SL/DL parts is only 128KB. However, the
other iMX6 variants have 256KB of OCRAM. Add an option
CONFIG_MX6_OCRAM_256KB which allows using the full size on boards which
don't need to support the SL/DL variants. This allows for an SPL size of
196KB, which makes it much easier to use configurations such as SPL with
driver model and FDT control.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Tested-by: Adam Ford <aford173@gmail.com> #imx6q_logic
There is no need to use HAB for FIT signature validation when
SPL_FIT_SIGNATURE is also enabled, as that will be validated via the
normal U-Boot signed FIT image flow.
This allows having SPL validated by HAB and the payloads to follow
being validated with FIT signatures only.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Toradex Apalis iMX6 modules are available in the iMX6D and iMX6Q
variants, which are quite similar and already managed via only one
dtb in u-boot (imx6-apalis.dtb). Select MX6Q via Kconfig by default in
order to automatically enable the HAS_CAAM and MX6_SMP features.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
Commit e37ac717d7 ("Convert to use fsl_esdhc_imx for i.MX platforms")
converted FSL_ESDHC to FSL_ESDHC_IMX, but the config check for
apalis_imx6 wasn't updated accordantly.
Signed-off-by: Ricardo Salveti <ricardo@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
The gpio command currently uses equal bank names "GPIO0_"
for all existing gpio banks, i. e.:
U-Boot# gpio status -a
Bank GPIO0_:
GPIO0_0: input: 0 [ ]
GPIO0_1: input: 0 [ ]
...
Bank GPIO0_:
GPIO0_0: input: 0 [ ]
GPIO0_1: input: 0 [ ]
...
So the command is broken, it is not possible to address
a desired bank. Add gpio aliases to fix this.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
i.MX7 and i.MX8M use mxc uart driver, so let's make the SoC could
use MXC_UART kconfig.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Add missed break for HDMI entry.
And moving FIT parsing earlier, because it does not have parameter,
it will not runs into CFG_REG_SIZE.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
fdtdec_get_addr_size could not parse addr/size correctly is
using address-cells 2 and size-cells 2 on an ARM32 SoC.
So switch to use devfdt_get_addr_size_index.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
To support DM_VIDEO,
Add display node for lcdif
Drop board iomuxc settings.
Enable DM_VIDEO
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
When booting SPL on the board, met boot failure:
"
Trying to boot from MMC2
MMC Device 1 not found
spl: could not find mmc device 1. error: -19
SPL: failed to boot from all boot devices
"
Let's register the two mmc controllers in SPL stage to
avoid boot failure.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Add i.MX6ULZ board support. the i.MX6ULZ is SW compatible
with i.MX6ULL. so most code of i.MX6ULL can be reused
by i.MX6ULZ.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Import kernel dts for i.MX6ULZ from
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Sync kernel dts for i.MX6ULL from
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Sync kernel dts for i.MX6UL from
commit <0a8ad0ffa4d8> ("Merge tag 'for-linus-5.3-ofs1' of git://git.kernel.org/pub/scm/linux/kernel/git/hubcap/linux")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
A large number of changes have happened upstream since our last sync
which was to 375506d. The reason to do the upgrade at this point is for
improved Python 3 support.
As part of this upgrade we need to update moveconfig.py and
genboardscfg.py the current API. This is:
- Change "kconfiglib.Config" calls to "kconfiglib.Kconfig"
- Change get_symbol() calls to syms.get().
- Change get_value() to str_value.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Convert this tool to requiring Python 3. The bulk of this is done with
the 2to3 tool In addition, we need to use the '//' operator to have our
division result return an int rather than a float and ensure that we use
UTF-8 when reading/writing files.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Add virtual defconfig for Zynq architecture using of_board dtb.
This defconfig should become generic config for all Zynq boards.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add virtual defconfig for ZynqMP architecture using of_board dtb.
This defconfig should become generic config for all ZynqMP boards.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Modify the configuration naming to be generic to xilinx rather than
specific to Versal. The offset value is different for Zynq and ZynqMP
to avoid overlapping with FSBL.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
With new mailbox driver PMUFW configuration object can be loaded via the
same interface and there is no need to have pmu_ipc.c completely.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
U-Boot running in EL3 can't use SMC that's why there is a need to talk to
PMUFW directly via mailbox. The same logic is applied to all functions
which need to talk to PMUFW that's why move this logic to separate function
to avoid code duplication.
Also SMC request ID can be composed from PM_SIP_SVC offset that's why
ZYNQMP_SIP_SVC_GET_API_VERSION macro can be removed completely.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Probe ZynqMP firmware driver on the board initialization phase and
ensure that firmware is in place to continue execution. The probing is
done on board_init so it can be used for both SPL and U-Boot proper.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
New firmware header to place firmware specific macro and function
declarations. The patch also moves the macros defining PM operations as
well as some helper macros.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Implements the function to get PMU Firmware version using the mailbox
driver or smc call based on if running SPL or not. Additionally gets
version as part of the ZynqMP Firmware driver probing
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
zynqmp-power driver for ZynqMP to handle the communication with the PMU
firmware. Firmware driver just probes subnodes and power driver handles
communication with PMU using the IPI mailbox driver.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ZynqMP mailbox driver implementing IPI communication with PMU. This would
allow U-Boot SPL to communicate with PMUFW to request privileged
operations.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The following patch allows the mailbox node in DT to host subnodes with
mailbox definitions. If the client phandle to the mailbox is not the
mailbox driver node, just checks parents as well.
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There were several changes in past in this file without removing headers
(watchdog cleanup, soft reset, etc). That's why remove additional useless
headers.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Setup initrd_high and fdt_high to be placed in lowmem space for kernel to
be able to reach it. Values are setup at run time to ensure that the same
setting can be used on different memory setup. Do this setting only when
variables are not
Similar run time detection was done for Zynqmp and Versal.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The whole cache code needs to be redesign to read information about cache
from DT instead of macro selection. Enable caches by default because
systems have caches on by default for Linux.
Also enable CMD_CACHE to be able to disable cache if there is any issue.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is no reason to use private code for standard bootm command.
Current implementation is also broken and don't support image relocation
properly. Switching to generic bootm implementation is fixing these issues.
cmdline and bdt bootm subcommands are returning -1 because they are not
implemented.
Similar change was done long time ago by for example commit 2bb5b63879
("MIPS: bootm: rework and fix broken bootm code")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch_lmb_reserve() protects U-Boot relocated code with stack not to be used
for image relocation.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Microblaze as Arm is using multiple memory banks which are read from DT
that's why there is a need to initialized LMB based on bd->bi_dram[].
Without this fix memory base/size is all the time 0 and image relocation is
not possible.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
All boards are using the same prompt that's why add it as default value to
Kconfig to simplify defconfigs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
All boards are using the same prompt that's why add it as default value to
Kconfig to simplify defconfigs.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
CONFIG_SYS_BOOT_RAMDISK_HIGH is already defined in
arch/arm/include/asm/config.h:10:#define CONFIG_SYS_BOOT_RAMDISK_HIGH
that's why there is no reason to define it again in board file.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Similar SCs but different wiring.
- dc_i2c is connected to X-PRC cards that's why label is required to have
an option to hook up some devices.
- Exactly identify i2c devices on x-prc boards.
In case of missing i2c connection devices won't be accessible.
- USB 0 should be device mode with super speed.
- USB 1 should be host mode.
- Fix i2c mux reset pin entry - commented, not verified.
- Fix i2c1 eeprom compatible string - it is an ST 128Kbit device.
Need to use atmel fallback.
- Fix si570 I2C slave address and add corresponding part numbers.
- Enable AMS for system monitoring.
- phy reset property should be commented because it will throw a
warning dump when called from context that can sleep.
No support for phys property (zynqmp phy driver) with SGMII.
Add is-internal-pcspma property required by uboot.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
This patch assings the phynode pointer to the phydev node as it is needed
later in the corresponding phy driver to read phy properties from DT.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch fixes zynq_gpio_direction() to call driver specific
zynq_gpio_set_value function rather than top level gpio_set_value.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The PSCI_RESET and EXPERT are not needed for mini configurations so remove
them to save space.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds default offset & sector size values for environment
variables to save in qspi/ospi flash for versal.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Phy setup should be done before dwc3 soft core reset as it is done
in linux & this fixes unreliable detection of usb cable on host side.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Devicetree bindings are already specified in Linux kernel documentation.
Instead of maintaining same dt bindings in U-Boot doc specify path to dt
bindings in Linux kernel & documenting specific changes that are in U-Boot.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
The zynq_sdhci drivers depends on DM_MMC in Kconfig so no need to check for
DM_MMC in the driver so this patch removes it.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Change has been done across the whole tree only zynqmp-mini-qspi hasn't
been fixed.
Origin changed done by commit ffd4c7c2ec
("dts: switch spi-flash to jedec, spi-nor compatible")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds support for gmiitorgmii converter.
This converter sits between the MAC and the external phy
MAC <==> GMII2RGMII <==> RGMII_PHY.
The ethernet driver probes this bridge and this bridge driver
probes real phy driver and invokes the real phy functionalities
as requested. This bridge just needs to be configured based on
real phy negotiated speed and duplex.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
All platforms have been moved to distro boot that's why remove the rest of
configurations to have unified boot flow.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Follow conventions and used {} around variables.
Fixes: 90e97ab31e ("arm: zynq: Define distro boot commnads for qspi, nand and nor")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There are two typos in this command that's why it couldn't work properly.
This bootmode is almost unused from the beggining on this SoC.
Fixes: 90e97ab31e ("arm: zynq: Define distro boot commnads for qspi, nand and nor")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Xilinx Zynq SoC has two sdhci controllers but boot is only possible from
the first one. That's why there is a need to specify controller number.
mmc1 is supposed to be secondary boot device and should be also listed in
distribution boot.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch define init routine for generic phy driver and registers it
using phy_register as this generic phy driver also needs to be relocated
incase of manual reloc.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add zu48dr and zu49dr to the list of zynqmp devices. The zu48dr and zu49dr
are the new RFSoC silicons with id values of 0x7b and 0x7e.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch reduces the console buffer size from 2048 to 1024, thus fixes
OCM overwriting issue.
Differences are in bss section as is shown from output:
xilinx_versal_mini: all -2056 bss -2048 text -8
u-boot: add: 0/0, grow: 0/-3 bytes: 0/-2056 (-2056)
function old new delta
cli_simple_run_command 340 332 -8
static.lastcommand 2049 1025 -1024
console_buffer 2049 1025 -1024
Better would be to use PPU RAM but this change is also aligned with changes
done in ZynqMP mini configurations.
Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ZynqMP and Versal is using 2k that's why aligned all platform together to
be able to use the same scripts.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Increase init ram size by 4K such that more stack space will be available
during initialization as the present stackspace is not sufficient if DEBUG
option is enabled and causes system hang. Increasing init ram size provides
sufficient stack space during init even if DEBUG enabled and solves the
hang issue.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This option is disable in Xilinx tree for quite a long time that's why
let's disable it in mainline. If there is anybody who requires this options
then it should be moved to Kconfig first and should be removed from this
config.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch removes check for Versal platform
in gem driver as it now supports clock setting
through clock framework.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds clock driver support for Versal platform. The clock driver
queries and performs clock operations using PLM firmware by communicating
with it using SMC calls.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds new jtag distro boot command to look for bootscript file in
DDR and execute it first incase of jtag bootmode.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch updates scriptaddr value to 512MB as having it at 32MB has high
chance of script corruption incase of bigger kernel.
Be aware that 512MB is used for SPL malloc area that's why images should be
loaded after SPL (the best after u-boot relocation).
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
With the current boot script offset address in qspi is being overlaped
by BOOT.BIN as it is over 90MB with fpga included. So moving the script
offset address to end of flash after "bootenv" mtd partition. Here we
are considering qspi flash size >= 128Mbytes on versal and left
512Kbytes space to save boot.scr script.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds new dfu usb distro boot command to look for bootscript
from dfu-util and runs it.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
This patch adds new jtag distro boot command to look for bootscript file
in DDR and execute it first incase of jtag bootmode.
This patch also updates scriptaddr to 512MB as there is high of script
corruption incase of bigger kernel image.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add simple ZynqMP firmware drive to populate child nodes under
zynqmp_firmware DT node.
Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch provides an option to enable/disable OCM and TCM memory into MMU
table with corresponding memory attributes.
The same change was done for ZynqMP by commit 189bec47ab
("arm64: zynqmp: Provide a Kconfig option to define OCM and TCM in MMU")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Code reads DT and setup MMU table based on memory node. This will ensure
that only DT needs to be changed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch is setting up the initrd_high to as high as possible by leaving
max stack size for u-boot so that bigger rootfs can also be loaded by
u-boot for booting kernel.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch is setting up the initrd_high to as high as possible by leaving
max stack size for u-boot so that bigger rootfs can also be loaded by
u-boot for booting kernel.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds PL bitstream load support for Versal platform. The PL
bitstream is loaded by making an SMC to ATF which in turn communicates
with platform firmware which configures and loads PL bitstream on to PL.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Define board_late_init which performs bootmode detection
and prepares corresponding distro boot commaand sequence.
Also disable it for mini platforms because simply there is no need to have
it enabled.
But also disable it for virtual platform because Qemu is not modelling this
register space that's why travis testing would fail. This configuration
should be reverted when mainline Qemu is updated.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This node is used by qspi driver for supporting qspi boot mode in SPL.
Similar changes have beeen done by commit a9022b017a
("ARM64: zynqmp: Add u-boot,dm-pre-reloc to clk nodes")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds sdboot command script for reference.
This can be converetd into uboot script using mkimage and
use for booting.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Thsi patch adds qspiboot command script for reference.
This can be converetd into uboot script using mkimage and
use for booting.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Define default address via Kconfig. There is no need to change this address
for most of the boards but it is also possible. This one line save a lot of
lines in defconfigs that's why make sense to do it.
The similar change has been done by commit 9340d8fe8b
("sunxi: move CONFIG_SPL_TEXT_BASE from *_defconfig to Kconfig")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Boot from QSPI nor flash.
The at91bootstrap, u-boot, u-boot env redundant, u-boot env,
device tree and kernel will reside in the QSPI nor flash.
The rootfs will reside in the NAND flash.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
The sam9x60 qspi controller uses 2 clocks, one for the peripheral register
access, the other for the qspi core and phy. Both are mandatory.
Enable the qspi node together with the SST26VF064B qspi nor flash
memory. Booting from the QSPI NOR flash is now possible.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
- EBI Chip Select Register is now in SFR,
- the pins are set to default values,
- timings are matching MT29F4G08BABWP's nand flash requirements.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
sama5's SFR has at offset 0x04 the DDR Configuration Register,
while sam9x60's SFR contains the EBI Chip Select Register. Add
a union to reconcile both boards.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
The Special Function Registers (SFR) are present in sam9x5 and
sam9x60 too, rename sama5_sfr to at91_sfr.h.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
add sam9x60ek_mmc_defconfig and for now only supports booting from
sdcard.
Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[nicolas.ferre@microchip.com: split patch, add Ethernet controller,
phy and tools]
[claudiu.beznea@microchip.com: add CONFIG_OF_LIBFDT_OVERLAY]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
[tudor.ambarus@microchip.com: Fix number of DRAM banks:
One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Add new board SAM9X60-EK using the ARM926 SAM9X60 SoC.
Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
[tudor.ambarus@microchip.com:
- fix number of DRAM banks:
One DDR2-SDRAM (W972GG6KB 2 Gbit = 16 Mbit x 16 x 8 banks]
- drop SPL related macros
- drop memtest macros
- drop CONFIG_SPI_BOOT, CONFIG_SYS_USE_DATAFLASH related macros
- drop inclusion of asm/arch/at91sam9_smc.h]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Add Ethernet controller to dtsi file and enable it on sam9x60ek
platform connected with rmii.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
add device tree files for sam9x60ek board with below changes.
- Add initial device nodes (pmc, pinctrl, sdhc, dbgu & pit)
- Add the reg property for the pinctrl node.
- Add the "u-boot,dm-pre-reloc" property to determine which nodes
are used by the board_init_f stage.
Signed-off-by: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
[prasanthi.chellakumar@microchip.com: fix style/whitespace issues]
Signed-off-by: Prasanthi Chellakumar <prasanthi.chellakumar@microchip.com>
[nicolas.ferre@microchip.com:
- fix gclk,
- fix pio/pinctrl controller definition and allow to have more
than only PIOA for this SoC,
- removing pinctrl address]
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[claudiu.beznea@microchip.com:
- use SAM9X60's compatible for pinctrl
- add drive strength and slew rate options for SDMMC0 pins.]
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
[tudor.ambarus@microchip.com:
- u-boot,dm-pre-reloc property in dedicated file,
- fix pit len, starts from 0xFFFFFE40 and it is of len 0x10]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Fixes redefinition of CONFIG_SYS_SPI_U_BOOT_OFFS
This is now a Kconfig
Fixes: e40a9ba6d2d5 ("board: atmel: sama5d2_wlsom1_ek: add qspi support and qspi boot config")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
This board has an external oscillator as MCK that does not need driving.
Bypass the driving for the main oscillator in SPL.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Remove 2017 from being printed at boot video console.
This is outdated.
To avoid this situation, remove the year completely.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add node for hlcld for u-boot logo display at boot.
This is compatible with the Precision Design Associates (PDA) TM5000 screen.
Timings are compatible with simple panel from Linux, panel name is
pda_91_00156_a0
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add support for qspi memory on board. Created boot support for QSPI
for both u-boot proper and SPL.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
qspi1 does not have an alias/seq number. This is required for
SPL default SF bus booting for the boards that have this SoC
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add a function in SFR implementation that will open the DDR input
buffers.
This can be called at DRAM initialization time.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Add support for the SAMA5D27-WLSOM1-EK. It's based on the Microchip
WireLess SoM which contains the SAMa5D27 LPDDR2 2Gbits SiP.
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
[eugen.hristev@microchip.com]: added u-boot specific dtsi and ported to 2019.10
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
With FSP2 we use MTRRs in U-Boot proper even though the 32-bit init
happens in TPL. Enable this, using a variable to try to make the
conditions more palatable.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We don't need this driver very early in boot and it adds code size. Drop
it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Normally U-Boot handles MTRRs through an add/commit process which
overwrites all MTRRs. But in very early boot it is not desirable to clear
the existing MTRRs since they may be in use and it can cause a hang.
Add a new mtrr_set_next_var() function which sets up the next available
MTRR to the required region.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: pass 'type' to set_var_mtrr() in mtrr_set_next_var()]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Move the code that actually sets up the MTRR into another function so it
can be used elsewhere in the file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present these uclasses assumes that they are used with a device tree.
Update them to support of-platdata as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The code in swapcase can be used by other sandbox drivers. Move it into a
common place to allow this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove inclusion of <asm/test.h> in pci_sandbox.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This function ise effectively replaced by ofnode_read_pci_addr() which
works with flat tree. Delete it to avoid code duplication.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a few more CPU functions that are common on Intel CPUs. Also add
attribution for the code source.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add missing MSR_IA32_MISC_ENABLE write back in cpu_set_eist();
fix 2 typos in cpu_get_burst_mode_state() comments]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Some MSR registers are defined twice in different parts of the file. Move
them together and remove the duplicates. Also drop some thermal defines
which are not used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These functions are the same on modern Intel CPUs, so use common code to
set them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: return false instead of 0 in cpu_ivybridge_config_tdp_levels();
fix 'muiltiplier' and 'desgn' typos]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Modern Intel CPUs use a standard bus clock value of 100MHz, so put this in
a common file and tidy up the copies.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This code appears in a few places, so move it to a common file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This parameter is needed by the PCI driver-mode interface but is always
NULL on x86. There are a number of calls to this function so it makes
sense to minimise the parameters.
Adjust the x86 function to omit the first parameter, and introduce stub
functions to handle the conversion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present this hedaer is only available on x86. To allow sandbox to use
it for testing, move it to a common location.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
U-Boot has two distinct phases: before and after relocation. These are
commonly referred to as F (running from Flash) and R (Relocated and
running from RAM). Some drivers want to do different things in these
phases so update the SPL phase function to return a different value for
each.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is currently a decimal value which is not as convenient or
meaningful. Also U-Boot tends to use hex everywhere.
Convert this option to hex and add a comment for the size_check macro.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct the typo in the commit title]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present there is only one control for this and it is used for both SPL
and TPL. But SPL might have a lot more space than TPL so the extra cost of
a full printf() might be acceptable.
Split the option into two, providing separate SPL and TPL controls. The
TPL setting defaults to the same as SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present this is defined in Kconfig but there is a separate one in the
CONFIG whitelist. It looks like these are duplicates.
Rename the non-Kconfig one and remove it from the whitelist.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the 'iod' command differs from 'md' in that it only shows a
single value. It is useful to see a dump of multiple values, particularly
when x86 peripherals contain register sets accessible via I/O ports.
Enhance the command to match md.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct multi-line comment format style]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
If a log statement includes a variable and logging is disabled, this can
generate warnings about unused variables. Add a bit more complexity to the
macros to avoid this for the common case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The image-header currently sets it offset assuming that skip-at-start is
zero. This does not work on x86 where offsets end at 4GB. Add in this
value so that the offset is correct.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
Some x86 sections have special offsets which currently result in empty
data being returned from the 'extract' command. Fix this by taking account
of the skip-at-start property.
Add a little more debugging while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
At present this function is not present in the Entry base class so it is
hard to find the documentation for it. Move the docs from the section
class and expand it a little.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the verbose flag only works for the 'build' command. This is
not intended, nor is it useful. Update the code to support the verbose
flag and make use of a command exception handler.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
When this UART is used early in boot (before PCI is set up) it is
convenient to store the PCI BDF of the UART so that it can be manually
configured. This is useful when it is used as a debug UART, for example.
Add a new field to hold this information, so that drivers can simply use
the existing platform data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present PCI address transaction is not supported so drivers must
manually read the correct BAR after reading the device tree info. The
ns16550 has a suitable implementation, so move this code into the core
DM support.
Note that there is no live-tree equivalent at present.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct the unclear comments in test.dts]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present this fails silently which can be confusing since some devices
on the PCI bus may not work correctly. Show a message in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add a '\n' in the PCI autoconfig fail message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
If PCI auto-config runs out of memory, show a few more details to help
diagnose the problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: change %x to %llx to avoid build warnings on some platforms]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Fix these spelling errors the header file and documentation.
Fix a small typo in the PCI documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present U-Boot runs autoconfig in SPL but this is best left to U-Boot
proper. For TPL and SPL we can normally used fixed BARs and save code size
and time.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Update the debugging info a little to show the result of trying to bind
a PCI device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present PCI emulation devices are not probed before use, since they
used to be children of the device that used them, and children cannot be
probed before their parents.
Now that PCI emulation devices are attached to the root node, we can
simply probe them, and avoid using the internal function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Sandbox pci works using emulation drivers which are currently children of
the pci device:
pci-controller {
pci@1f,0 {
compatible = "pci-generic";
reg = <0xf800 0 0 0 0>;
emul@1f,0 {
compatible = "sandbox,swap-case";
};
};
};
In this case the emulation device is attached to pci device on address
f800 (device 1f, function 0) and provides the swap-case functionality.
However this is not ideal, since every device on a PCI bus has a child
device. This is only really the case for sandbox, but we want to avoid
special-case code for sandbox.
Worse, child devices cannot be probed before their parents. This forces
us to use 'find' rather than 'get' to obtain the emulator device. In fact
the emulator devices are never probed. There is code in
sandbox_pci_emul_post_probe() which tries to track when emulators are
active, but at present this does not work.
A better approach seems to be to add a separate node elsewhere in the
device tree, an 'emulation parent'. This could be given a bogus address
(such as -1) to hide the emulators away from the 'pci' command, but it
seems better to keep it at the root node to avoid such hacks.
Then we can use a phandle to point from the device to the correct
emulator, and only on sandbox. The code to find an emulator does not
interfere with normal pci operation.
Add a new UCLASS_PCI_EMUL_PARENT uclass which allows finding an emulator
given a bus, and finding a bus given an emulator. Update the existing
device trees and the code for finding an emulator.
This brings PCI emulators more into line with I2C.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix 3 typos in the commit message;
encode bus number in the labels of swap_case_emul nodes;
mention commit 4345998ae9 in sandbox_pci_get_emul()]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present these functions are stubbed out. For more comprehensive testing
with PCI devices it is useful to be able to fully emulate I/O access. Add
simple implementations for these.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: change to use 'const void *' in sandbox_write();
cast 'addr' in read/write macros in arch/sandbox/include/asm/io.h;
remove the unnecessary cast in readq/writeq in nvme.h]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Increase the memory space so we can support the p2sb bus which needs
multiples of 1MB.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
U-Boot already supports using -D to indicate that it should use the normal
device tree. It is sometimes useful to run with the test device tree, e.g.
when running a test. Add a -T option for this along with some
documentation.
It can be used like this:
/tmp/b/sandbox/u-boot -T -c "ut dm pci_busdev"
(this will use /tmp/b/sandbox/arch/sandbox/dts/test.dtb as the DT)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
This function is useful in PCI emulators. More it into the header file to
avoid duplicating it in other drivers.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This method is not used anymore since the bus/device/function of PCI
devices can be obtained from their (parent's per-child) platform data.
Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some functions and a struct should be marked static since they are not
used outside this file. Update them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These functions are available on x86 but not sandbox. They are useful
shortcuts and clarify the code, so add them to sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Rename this ID to SANDBOX_PCI_SWAP_CASE_EMUL_ID since it is more
descriptive and allows us to add new PCI emulators without any conflict or
confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present running sandbox with valgrind produces some warnings due to the
MMC emulator not filling in all the expected fields. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: use sizeof() instead of hardcoded 16]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
At present address translation does not work since there is no ranges
property in the spmi nodes. Add empty ranges properties and a little more
logging so that this shows the error:
/tmp/b/sandbox/u-boot -d /tmp/b/sandbox/arch/sandbox/dts/test.dtb \
-c "ut dm spmi_access_peripheral" -L7 -v
...
pm8916_gpio_probe() bad address: returning err=-22
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
This should perhaps be a period.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add the ending period and reword the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
We have a 'safe' version of this function but sometimes it is not needed.
Add a normal version too and update a few places that can use it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This function returns -ENODEV when there is no device. This is
inconsistent with other functions, such as uclass_find_next_device(),
which returns 0.
Update it and tidy up the incorrect '-1' values in the comments.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
At present this function is never called when of-platdata is enabled since
we never have a device tree. However, this function is responsible for
copying over the of-platdata, so we must call it. Otherwise the probe()
method would have to be used.
Correct this and fix the sandbox serial driver to not read from the device
tree and try to write to what is read-only platdata on some platforms.
Fixes: 396e343b3d (dm: core: Allow binding a device from a live tree)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present tests that are marked as only for livetree fail when executed
on sandbox_flattree. They cannot actually be executed, but we should not
resport them as 'not found', since this causes errors. Instead, they
should be silently skipped.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present when multiple 'ut dm' commands are executed, all but the first
is run with a flat tree, even if live tree is enabled. This is because the
live tree node pointer is set to NULL and never restored.
This does not affect normal test running, which just runs all the test in
one go, but can be confusing when several individual tests are run during
the same U-Boot run.
Correct this by restoring the pointer.
Fixes: c166c47ba3 (dm: test: Add support for running tests with livetree)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Sometimes devices don't appear and it can be confusing. Add a few notes to
help with this situation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix 2 issues in the doc and include the doc in the index.rst]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Two functions in this file return early for no good reason. Adjust the
code to match the standard DM style of returning 0 at the end of the
function on success.
Oddly enough this save 12 bytes of code size on ARM.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The pr_debug() functions do not response to setting the log level and in
fact have their own separate log level. Use U-Boot logging instead.
Perhaps we should make these options redirect to log_debug(), etc.?
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This MSR number is used on most modern Intel processors, so drop the
confusing NHM prefix (which might mean Nehalem).
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: drop MSR_IVT_TURBO_RATIO_LIMIT as no code uses it]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Add some new MTRRs used by Apollolake as well as a mask for the MTRR
type.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The full start-up sequence (TPL->SPL->U-Boot) can be a bit confusing since
each phase has its own 'start' file. Add comments to explain this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present we assume that CAR (Cache-as-RAM) is used if HOBs (Hand-off
blocks) are not, since HOBs typically indicate that an FSP is in use, and
FSPs handle the CAR init.
However this is a bit indirect, and for FSP2 machines which use their own
CAR implementation (such as apollolake) but use the FSP for other
functions, the logic is wrong.
To fix this, add a dedicated Kconfig option to indicate when CAR is used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix a typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
The useable RAM is calculated when the RAM is inited. Save this value so
that it can be easily used in U-Boot proper.
Also save a pointer to the hob list so that it is accessible (before
relocation only) in U-Boot proper. This avoids having to scan it in SPL,
for everything U-Boot proper might need later.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: guard handoff_arch_save() with IS_ENABLED(CONFIG_USE_HOB)]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
When TPL is running, broadwell needs to do different init from SPL. There
is no need for this code to be in the generic x86 SPL file, so move it to
arch_cpu_init().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This image loader works on systems where the flash is directly mapped to
the last part of the 32-bit address space. On recent Intel systems (such
as apollolake) this is not the case.
Reduce the priority of this loader so that another one can override it.
While we are here, rename the loader to BOOT_DEVICE_SPI_MMAP since
BOOT_DEVICE_BOARD is not very descriptive.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the standard hang() function when booting fails since this implements
the defined U-Boot behaviour for this situation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the x86 pre-DM equivalent of pci_bus_clrset_config32() does not
exist. Add it to simplify PCI init code on x86.
Also add the missing functions to this header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
It is useful in SPL and TPL to access symbols from binman, such as the
position and size of an entry in the ROM. Collect these symbols together
in the SPL binaries.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add cpu_intel_get_info() to find out the CPU info on modern Intel CPUs.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add parameter and return value descriptions]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
With FSP2 the non-volatile storage used by the FSP to init memory can be
split into a fixed piece (determined at compile time) and a variable piece
(determined at run time). Add support for reading the latter.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present these two functions are defined in efi_loader.h but only if
CONFIG_EFI_LOADER is enabled. But these are functions that are useful to
other code, such as that which deals with Intel Handoff Blocks (HOBs).
Move these to the top of the function.
Possibly ascii2unicode() should not be an inline function, since this
might impact code size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some of this file can be shared between FSP1 and FSP2. Move it into a
shared file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Some of this file can be shared between FSP1 and FSP2. Move it into a
shared file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Most of the DRAM functionality can be shared between FSP1 and FSP2. Move
it into a shared file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: rebase the patch against u-boot-x86/next to get it applied cleanly]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
The comments in the FSP code use a different style from the rest of the
x86 code. I am not sure it this is intentional.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix 2 comment style issues]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Update a few #ifdefs to if() to improve build coverage.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: recover the codes that got wrongly deleted in dram_init()]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Many support functions are common between FSP1 and FSP2. Add a new header
to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove forward declarations in fsp_support.h]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Given these exported function an fsp_ prefix since they are declared in an
fsp.h header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
At present this driver is always included in SPL and TPL, if U-Boot proper
enables it. Update the Makefile to provide full control using the existing
Kconfig options.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: make the Kconfig help text a little bit clearer]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
U-Boot is built in three phases: TPL, SPL and U-Boot proper. Sometimes
it is necessary to use different init code depending on the phase. For
example, TPL might do very basic CPU init, SPL might do a little more
and U-Boot proper might bring the CPU up to full speed and enable all
cores.
Add a function which allows easy determination of the current phase being
built.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present the bloblist is set up in spl_common_init() which can be called
from spl_early_init(), i.e. before SDRAM is ready. This prevents the
bloblist from being located in SDRAM, which is useful on some platforms
where SRAM is inaccessible after U-Boot relocates (e.g. x86 CAR region).
It doesn't serve much purpose to have the bloblist available early, since
very little is known about the platform then, and the handoff info is
written when SPL is about to jump to U-Boot.
Move the code to board_init_r() to avoid any restrictions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present there is an arch-specific area in the SPL handoff area intended
for use by arch-specific code, but there is no explicit call to fill in
this data. Add a hook for this.
Also use the hook to remove the sandbox-specific test code from
write_spl_handoff().
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present these options can be enabled when bloblist is not enabled for
SPL or TPL. This is incorrect as SPL handoff requires bloblist. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We don't have a console in SPL so it doesn't make sense to check for
Ctrl-C when printing a memory dump. Skip this so that print_buffer() can
be used in SPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present this driver uses the wrong condition for including the code and
drivers in SPL/TPL. Update it so that the code is only included if
DM_SERIAL is enabled for SPL/TPL.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present spi_flash is defined to be spi_nor which is confusing since it
is not possible to find the 'spi_flash' by normal text search. Add a
comment to help with this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Support a new BINMAN_VERBOSE option to the build, to allow passing the
-v flag to binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Pass in the toolpath in case binman needs to use tools compiled in the
U-Boot tools/ directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This include file is only used for FSP v1. Avoid including it from
fdt_support.h so we can use the latter with FSP v2.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
This header file is the same for FSP v1 and v2, although there may be
some additions to come. Move it into the generic fsp directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
This header file is the same for FSP v1 and v2. Move it into the general
fsp directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: move rename of fsp_infoheader.h from previous patch to this one]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This header file is the same for FSP v1 and v2. Move it into the general
fsp directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove inclusion of fsp_hob.h in fsp_support.h]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This header file is the same for FSP v1 and v2. Move it into the general
fsp directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
This header file is the same for FSP v1 and v2. Move it into the general
fsp directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
This header file is different for each version of FSP. Move it into the
fsp_arch.h header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
At present fsp_support.h includes fsp_vpd.h which is an FPSv1 concept
(VPD means Vital Product Data). For FSPv2 only UPD (Updatable Product
Data) is used.
To avoid mangling header files, put these two includes in a separate
header which we can adjust as necessary for FSPv2.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
This header file is the same for FSP v1 and v2. Move it into the general
fsp directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove forward declarations in fsp_support.h]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Since there is now a new version of the FSP and it is incompatible with
the existing version, move the code into an fsp1 directory. This will
allow us to put FSP v2 code into an fsp2 directory.
Add a Kconfig which defines which version is in use.
Some of the code in this new fsp1/ directory is generic across both FSPv1
and FSPv2. Future patches will address this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
The commit
642b80d256 ("net: designware: drop compatible altr, socfpga-stmmac")
breaks designware ethernet for all ARC boards. It removes
"altr, socfpga-stmmac" compatible from "drivers/net/designware.c"
without changing compatible in the boards which use it.
Fix that by adding "snps,arc-dwmac-3.70a" compatible string to
"drivers/net/designware.c" and using it in ARC boards device tree.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
With the patch below applied, host_block_dev structure was switched
to be placed in platdata rather than priv. The command "host info"
must be aligned with this change. Otherwise, we will see "Segmentation
Fault."
Fixes: 8f994c860d ("sandbox: blk: Switch to use platdata_auto_alloc_size for the driver data")
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
These boards don't have a watchdog enabled in SPL, so make sure
CONFIG_SPL_WDT is not enabled.
Fixes: commit 6874cb7220 ("watchdog: Split WDT from SPL_WDT")
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
The growth of the UEFI sub-system leads to build failures for systems with
strict limits on the U-Boot image size.
CMD_NVEDIT_EFI supports displaying and editing of UEFI variables. The
setting is not needed for booting. Disabling it by default reduces the
size of the U-Boot image by 2 KiB.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This allows our EFI API to create a device path node for NVMe
devices. It adds the necessary device path struct, uses the
nvme namespace accessor to retrieve the id and eui64, and also
provides support for the device path text protocol.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This adds a function which can be used by e.g. EFI to retrieve
the namespace identifier and EUI64. For that it adds the EUI64
to its driver internal namespace structure and copies the EUI64
during namespace identification.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
A wrong function name is referred to in a comment of do_env_set_efi().
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This reverts commit 0797f7f0b7.
Tegra specific solution is not required any more as efi core has been
made aware of ram_top with the following commit:
7b78d6438a efi_loader: Reserve unaccessible memory
Signed-off-by: Mian Yousaf Kaukab <ykaukab@suse.de>
The UEFI spec has this sentence:
"Variables that have runtime access but that are not nonvolatile are
read-only data variables once ExitBootServices() is performed."
At least EDK2 therefore treats variable PlatformLangCodes only as read-only
at runtime. Nowhere do we make this variable read-only in U-Boot.
Do not use variable PlatformLangCodes for testing if the read only
attribute of variables is observed before ExitBootServices().
Fixes: 5a24239c95 ("efi_loader: selftest: enable APPEND_WRITE tests")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Errors should not only be announced as text but should also result in
EFI_ST_FAILURE being returned.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Appending to a non-existent variable must result in an error of type
EFI_NOT_FOUND.
Fixes: 09c76b79a9db ("efi_loader: SetVariable() deleting variables")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
- Assorted TI platform fixes
- Revert the change that broke environment flag validation
- Assorted typo fixes
- Assorted Kconfig dependency fixes
- Other minor bug fixes
This reverts commit 7d4776545b. The
changes here break environment validation and furthermore do not seem to
be required.
Signed-off-by: Tom Rini <trini@konsulko.com>
The SPL device tree is missing the entires for gpio1, uart1, usdhc1 and
usdhc2. This creates the missing imx6q-logicpd-u-boot.dtsi file
which will enable these functions so SPL can properly setup UART, detect
microSD card, and startup.
Fixes: 8f4691e31a ("ARM: imx6q_logic: With SPL_OF_CONTROL enabled,
remove MMC init")
Signed-off-by: Adam Ford <aford173@gmail.com>
Existing debug output is mixed with the function name:
initcall_run_list() initcall: 25263initcall_run_list() (relocated to 425263)
Turn it to:
initcall_run_list() initcall: 25263 (relocated to 425263)
Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
At this point we are using part number sub-command to retrieve UUID
of the partition using it's name.
e.g.:
part number mmc $mmcdev system_a system_a_index
part uuid mmc $mmcdev:${system_a_index} system_a_uuid
Since 'part uuid' sub-command expects partition index in hex format and
'part number' returns decimal value, 'part uuid' command will provide
wrong UUID or fail.
Fixes: be683756f6 ("cmd: part: Add 'number' sub-command")
Cc: Dirk Behme <dirk.behme@de.bosch.com>
Reported-by: Pontus Fuchs <pontus.fuchs@se.bosch.com>
Signed-off-by: Roman Stratiienko <roman.stratiienko@globallogic.com>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
To accommodate the growth of u-boot, we need to shift the location of the
secure monitor. Moving it 64kB further.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
On HS devices the access to TRNG is restricted on the non-secure
ARM side, disable the node in DT to prevent firewall violations.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
This updates MAINTAINERS and git-mailrc to add me as maintainer for
socfpga.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
*.pyc files contain compiled Python bytecode. 'make mrproper' should remove
them.
Removing *.pyc files helps for instance sometimes when running into an
error "binman: Unknown entry type 'blob' in node '/binman/blob'".
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The memory allocated to store the FIT image containing SYSFW and board
configuration data is statically defined to the largest size expected.
This was 269000 bytes but now needs to be grown to 276000 to make room
for the signatures attached to the board configuration data on High
Security devices.
Signed-off-by: Andrew F. Davis <afd@ti.com>
At present this code passes an fdt_addr_t pointer as a u64 pointer which
is not safe, since sizeof(fdt_addr_t) may be 4, e.g. with sandbox. Correct
this to avoid a stack corruption problem.
Fixes: e679d03b08 (core: ofnode: Add ofnode_get_addr_size_index)
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: correct one typo in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This reads the low cell of the PCI address from the wrong cell. Fix it.
Also fix the function that this code came from.
Fixes: 9e51204527 (dm: core: Add operations on device tree references)
Fixes: 4ea5243a3a (fdt: fix fdtdec_get_pci_addr() for CONFIG_PHYS_64BIT)
Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is reincarnation of the U-Boot
commit 3469bf4274
Author: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Date: Wed Jan 10 19:40:15 2018 +0200
x86: zImage: Propagate acpi_rsdp_addr to kernel via boot parameters
after upstream got eventually the Linux kernel
commit e6e094e053af75cbc164e950814d3d084fb1e698
Author: Juergen Gross <jgross@suse.com>
Date: Tue Nov 20 08:25:29 2018 +0100
x86/acpi, x86/boot: Take RSDP address from boot params if available
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When booting through the efi stub, the memory map get's created by
reading the dram bank information. Depending on the version of the RPi4
this information changes. Read the device tree to initialize the dram
bank data structure. This way the kernel is able to access the whole
range of available memory.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
First set of u-boot-atmel fixes for 2019.10 cycle:
This includes only tiny cleanups on env changes related to 2019.10 new
features: removal of duplicate env settings (otherwise there may be
warnings in building..) and a small fix for flashes on Gardena smart
gateway (requires nand bad block tables).
'commit a9221f3ebd ("at91, omap2plus: configs: migrate CONFIG_ENV_ to defconfigs")'
migrated CONFIG_ENV_ macros to defconfigs but did not remove the
identical redefinition of these macros in include/configs/.
Since the duplicated macros have the same value as the ones in defconfigs,
no "redefined" warnings were raised. Remove duplicated macros for all
sama5 and sam9x5ek boards.
While verifying that the removal of the macros from include/configs did
not change the same macros in defconfigs, overwrite the old defconfig by
saving them with the output from "make arch=ARM savedefconfig". This
resulted in the movement of some macros in the defconfig files.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
This patch enables the BBT in NAND on the AT91SAM based GARDENA smart
Gateway. This is especially important, since the Linux driver also
enables this option and uses the BBT table pages. Without setting this
option, U-Boot will try to re-use these pages again (e.g. UBI).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Tom Rini <trini@konsulko.com>
This patch restores commit c49d0ac38a ("ARM: dts: rmobile: Increase off-on
delay on the SD Vcc regulator"), which was accidentally dropped during DT
resync in commit 317d13ac63 ("ARM: dts: rmobile: Synchronize Gen3 DTs with
Linux 5.0").
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Fixes: 317d13ac63 ("ARM: dts: rmobile: Synchronize Gen3 DTs with Linux 5.0")
The commit 619f002db8 ("rockchip: make_fit_atf.py: fix loadables property
set error") fixed the double-loading of the primary atf-image, but didn't
take into account that there may be rare atf images with only that main
section present.
Right now this will result in a broken its due to the loadables section not
getting closed correctly, so fix that by adapting the guards around the loop.
The guards now protect against 0 segments when the bl31 binary doesn't
contain any section and 1 segment when only a core atf section is present.
Fixes: 619f002db8 ("rockchip: make_fit_atf.py: fix loadables property set error")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Originally the cpuid var the value gets read into was defined as
u8 cpuid[RK3399_CPUID_LEN];
hence the sizeof(cpuid) would return the correct the correct number
of array elements.
With the move to a separate function cpuid becomes a pointer and
sizeof(cpuid) hence returns the pointer size - 8 in the arm64 case.
We do have the actual id length available as function param so use
it for actual amount of bytes to read.
Fixes: 0482538499 ("rockchip: rk3399: derive ethaddr from cpuid")
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
This commit add envtools suppport to CI to verify if there
is no build issues.
Signed-off-by: Pierre-Jean Texier <pjtexier@koncepto.io>
Acked-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Since commit af95f20 ("env: Create a new file for environment functions"),
a new header file exists.
So, this commit add a missing header file.
Fixes:
include/env.h:158:1: error: unknown type name ‘ulong’; did you mean ‘long’?
ulong env_get_ulong(const char *name, int base, ulong default_val);
^~~~~
long
include/env.h:158:49: error: unknown type name ‘ulong’; did you mean ‘long’?
ulong env_get_ulong(const char *name, int base, ulong default_val);
Signed-off-by: Pierre-Jean Texier <pjtexier@koncepto.io>
Tested-by: Joris Offouga <offougajoris@gmail.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Since commit d3716dd ("env: Rename the redundancy flags"), the
definitions of ENV_REDUND_OBSOLETE & ENV_REDUND_ACTIVE was moved
to env.h.
Fixes:
tools/env/fw_env.c:122:22: error: ‘ENV_REDUND_ACTIVE’ redeclared as different kind of symbol
static unsigned char ENV_REDUND_ACTIVE = 1;
^~~~~~~~~~~~~~~~~
In file included from tools/env/fw_env.c:13:
include/env.h:63:2: note: previous definition of ‘ENV_REDUND_ACTIVE’ was here
ENV_REDUND_ACTIVE = 1,
^~~~~~~~~~~~~~~~~
tools/env/fw_env.c:127:22: error: ‘ENV_REDUND_OBSOLETE’ redeclared as different kind of symbol
static unsigned char ENV_REDUND_OBSOLETE;
^~~~~~~~~~~~~~~~~~~
In file included from tools/env/fw_env.c:13:
include/env.h:62:2: note: previous definition of ‘ENV_REDUND_OBSOLETE’ was here
ENV_REDUND_OBSOLETE = 0,
Signed-off-by: Pierre-Jean Texier <pjtexier@koncepto.io>
Tested-by: Joris Offouga <offougajoris@gmail.com>
Tested-by: Heiko Schocher <hs@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
APPEND_WRITE with data length zero is allowable according to the UEFI
specification.
The EDK2 interpretation of no access attributes is attributes = 0. As
the UEFI specification is vague in this respect let's stick to EDK2 here.
Fixes: commit 6d2f27c5fd ("efi_loader: variable: support APPEND_WRITE")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We always have to return via EFI_EXIT() from EFIAPI functions.
Coverity reported an unreachable line and a resource leak.
Fixes: commit 6d2f27c5fd ("efi_loader: variable: support APPEND_WRITE")
Reported-by: Coverity Scan CID 253575, CID 184095
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Remove outdated TODO for efi_stri_coll(). efi_stri_coll() is already using
the Unicode capitalization table.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Pull request for UEFI sub-system for v2019.10-rc4 (5)
This patch set fixes errors in the UEFI sub-system and adds a function to
compare u16 strings which is prerequisite for further patches.
Currently we may end up with an LCD clock divider that differs from
the HDMI PHY clock divider if we can't exactly match the pixel clock.
Fix this by using DIV_ROUND_UP to calculate the divider. This works
since the PLL is chosen such that the resulting pixel clock is
never higher than the requested pixel clock.
Fixes: 1feed358ed ("sunxi: video: HDMI: Fix clock setup")
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Old splash code in cfb_console driver displayed U-Boot version
string by default. Restore this behaviour for DM_VIDEO enabled
configurations.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reported-by: Fabio Estevam <festevam@gmail.com>
Define "splashimage" variable in the default environment
and enable BMP code. Also configure white on black for
video console.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
After mxc_ipuv3 DM_VIDEO conversion showing splash image
doesn't work. Fix this. Also enable white on black console
configuration as it used to be with cfb_console driver.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reported-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
After mxc_ipuv3 DM_VIDEO conversion showing splash image
doesn't work. Fix this. Also enable white on black console
configuration as it used to be with cfb_console driver.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
After mxc_ipuv3 DM_VIDEO conversion board configs with enabled
CONFIG_VIDEO_LOGO do not show splash screen (previosly drawing
splash screen worked via cfb_console driver with CONFIG_VIDEO_LOGO
enabled). Use splash_source library for loading splash images
when CONFIG_SPLASH_SOURCE is selected, otherwise prepare built-in
video logo for drawing.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
New seven test cases for u16_str<n>cmp() are added under Unicode unit test,
which should be executed by "ut unicode" command.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
u16 version of strcmp(): u16_strncmp() works like u16_strcmp() but only
at most n characters (in u16) are compared.
This function will be used in my UEFI secure boot patch.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Now that APPEND_WRITE is supported,
the result check for the only existing test case should be changed to
'todo' to 'error', while two more test cases are added.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
If EFI_VARIABLE_APPEND_WRITE is specified in attributes at
efi_set_variable(), specified data will be appended to the variable's
original value. Attributes other than APPEND_WRITE should not be
modified.
With this patch, APPEND_WRITE test in 'variables' selftest will pass.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
DisconnectController() should never return EFI_NOT_FOUND.
If EFI_DRIVER_BINDING_PROTOCOL.Stop() fails, return EFI_DEVICE_ERROR.
If the driver handle does not expose the EFI_DRIVER_BINDING_PROTOCOL
return EFI_INVALID_PARAMETER.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sandbox's "host" devices are currently described as UCLASS_ROOT udevice
with DEV_IF_HOST block device. As the current implementation of
efi_device_path doesn't support such a type, any "host" device
on sandbox cannot be seen as a distinct object.
For example,
=> host bind 0 /foo/disk.img
=> efi devices
Scanning disk host0...
Found 1 disks
Device Device Path
================ ====================
0000000015c19970 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
0000000015c19d70 /VenHw(e61d73b9-a384-4acc-aeab-82e828f3628b)
=> efi dh
Handle Protocols
================ ====================
0000000015c19970 Device Path, Device Path To Text, Device Path Utilities, Unicode Collation 2, HII String, HII Database, HII Config Routing
0000000015c19ba0 Driver Binding
0000000015c19c10 Simple Text Output
0000000015c19c80 Simple Text Input, Simple Text Input Ex
0000000015c19d70 Block IO, Device Path, Simple File System
As you can see here, efi_root (0x0000000015c19970) and host0 device
(0x0000000015c19d70) have the same representation of device path.
This is not only inconvenient, but also confusing since two different
efi objects are associated with the same device path and
efi_dp_find_obj() will possibly return a wrong result.
Solution:
Each "host" device should be given an additional device path node
of "vendor device path" to make it distinguishable.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
- Coding style corrections in some RTC drivers.
- Small doc updates.
- Regression fix in part_test_dos()
- Regression fix on TI OMAP WDTs.
- Document deadline for CONFIG_DM migration.
- Switch Travis-CI to "xenial" release.
For many sub-systems we already require the driver model to be used. Yet
there is still a handful of boards that do not have CONFIG_DM enabled.
We should make CONFIG_DM compulsory with release v2020.01
Conversion dates for CONFIG_DM_SPL and CONFIG_DM_TPL are yet to be defined.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
AM335X based beaglebone black target gets reset by DM converted watchdog
if booted from emmc around 60sec. Fixed this by moving driver's private struct
variable initialization at different places in the driver to driver's probe.
Tested on Beaglebone Black.
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Fixes: 7659ea32 ("watchdog: omap_wdt: Convert watchdog driver to use DT and DM")
Reported-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Acked-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
The README.scrapyard file has been inconsistently updated. While well
intentioned, bad data is worse than no data, and in this case a pointer
to use the history that git provides. Remove the current content and
the script that would update it from time to time as well.
Signed-off-by: Tom Rini <trini@konsulko.com>
The blk_dread() following the mbr allocation reads one block from the
device. This will lead to overflow if block size is greater than the
size of legacy_mbr. Fix this by allocating at least one block size.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Acked-by: Alexey Brodkin <abrodkin@synopsys.com>
The of-plat.rst file till this change has been using
This is at best misleading as SPL_OF_PLATDATA is always defined when we
want to use this SPL tinification feature (also in U-Boot proper).
As a result the OF_PLATDATA SPL specific code is also compiled in when
U-Boot proper is build.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
We need a new STACK in SDRAM instead of SRAM so that the EMMC controller
can work properly. The EMMC/SD controller's master is not able to access
SRAM area, it can only access DRAM area.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
SPL_TEXT_BASE is 0x0 by default, based on the kconfig
definition move in below commit.
"configs: move CONFIG_SPL_TEXT_BASE to Kconfig"
(sha1: f89d6133ee)
So, don't define it explicitly.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tinker board needs to mux all the sdmmc gpio and
activate the regulator connected to bank 7. Remove
all the bank that are not in use and mark them as dm,spl
so-that it would initialize at SPL.
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
SPL sets up SDRAM while in its board_init_f()
function, it is possible for the stack to move
there before board_init_r() is reached.
So it is required to reserve the stack for SDRAM,
with a proper location and size otherwise any
operations during SPL handoff would leads to failure.
On, this particular context tinker-rk3288 SPL is
failing to launch U-Boot proper on SDRAM due to
lack of stack.
U-Boot SPL 2019.10-rc3-00297-g5ba8b12543 (Sep 12 2019 - 08:50:36 +0530)
Trying to boot from MMC1
spl: mmc init failed with error: -110
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
So, enable SPL_STACK_R_ADDR and it's related-config
items for SDRAM, SPL stack to setup properly.
Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
SPL_TEXT_BASE is 0x0 by default, based on the kconfig
definition move in below commit.
"configs: move CONFIG_SPL_TEXT_BASE to Kconfig"
(sha1: f89d6133ee)
So, don't define it explicitly.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
Few of the rk3288 boards like tinker, vyasa are using
TPL, SPL bootchain so the dram initialization must needed
during TPL stage. So add proper ifconstruct to satisfy
both TPL, SPL and SPL-only bootchain boards.
This eventually fixing TPL to SPL handoff, otherwise missing
dram initilaztion at TPL stage would leads to SPL hang.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
The initial Vyasa-rk3288 TPL implementation is to reuse the
SPL_TEXT_BASE for TPL and SPL as 0x0 and 0xff704000 respectively.
But the below commit implements the reverse way of using TEXT_BASE's
like 0xff704000 for TPL and 0x0 for SPL and which indeed update
the SPL_TEXT_BASE for vyasa-rk3288 board.
"rockchip: Kconfig: enable TPL support for rk3328"
(sha1: 3f47db0275)
So, fix by dropping the legacy SPL_TEXT_BASE and it will
reassign 0x0 by default based on Kconfig definition.
Reported-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
ROCKCHIP_BROM_HELPER is selected as if TPL/SPL ROCKCHIP_BACK_TO_BROM
has been defined, so drop the explicit enablement for vyasa board.
This change is supposed to missed during config move to
other locations, and missed to drop the same.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang<kever.yang@rock-chips.com>
This enables reading the cpuid from e-fuse, and deriving a static
MAC address from it. Without this, the ethernet interface on the
rockpro64 can't be used to boot.
Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Commit c4e8862308 (mtd: spi: Switch to new SPI NOR framework)
performs switch from previous 'spi_flash' infrastructure without
proper testing/investigations which results in a regressions for
SST26 flash series.
Enable protection ops for SST26 flash series which were
previously enabled by
Commit 3d4fed87a5 (mtd: sf: Add support of sst26wf* flash ICs
protection ops)
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Commit c4e8862308 (mtd: spi: Switch to new SPI NOR framework)
performs switch from previous 'spi_flash' infrastructure without
proper testing/investigations which results in a regressions for
SST26 flash series.
Add missing SST26* flash IC protection ops which were introduced
previously by
Commit 3d4fed87a5 (mtd: sf: Add support of sst26wf* flash ICs
protection ops)
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
spi_write_then_read, will manage to do the respective
spi_xfer based on the tx_buf, rx_buf so drop the
legacy spi_flash_read/write/cm code.
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Add support for SPI synchronous write followed by read,
this is common interface call from spi-nor to spi drivers.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
MXS_SPI driver now partially converted into driver-model,
so unmark the DEPRECATED option for the same.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
[jagan: update the commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
In case spi_get_bus_and_cs callback is used, spi bus is first probed
then slave devices are probed. To avoid a data abort in soft_spi probe
function, we need to check that (slave != NULL).
If slave is NULL, cs_flags and clk_flags will be initialized with
respectively GPIOD_ACTIVE_LOW and 0.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The prescaler value computation can yield wrong result if given 0x1f at
the beginning: the value is computed to be 0x20, but the maximum value
the register can hold 0x1f, so the actual stored value in this case is
0, which is obviously wrong.
Set the upper bound of the value to 0x1f with the min macro.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Add missing PCI range for translating DRAM to bus addresses.
This fixes e.g. PCI NIC interface and allows network to work
in QEMU.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Since binutils 2.30 , the resulting U-Boot binary was incorrectly linked
against address 0 instead of text base, fix it.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
HS devices use the FIT post processing step to authenticate boot images.
Set the configured boot command to load FIT by default.
Signed-off-by: Andrew F. Davis <afd@ti.com>
API get_ti_sci_handle() is relying on the device-tree node name
to be "dmsc" for probing the ti_sci device. But with the introduction
of debug messages for dmsc, the node name changed to dmsc@44083000.
Because of this ti_sci is never probed cause a boot failure. Instead
of relying on device-tree node name, use the first available firmware
node for probing ti_sci.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The da8xx GPIO driver is available with DM_GPIO support. This
patch enables the CMD_GPIO, CMD_DM, and DM_GPIO and DA8XX_GPIO.
Signed-off-by: Adam Ford <aford173@gmail.com>
The USB was just recently enabled, so it is unlikely anyone is
using it in SPL, so this patch removes it from SPL to further
reduce the SPL code size.
Signed-off-by: Adam Ford <aford173@gmail.com>
The header it littered with #ifdefs and #defines and that appear
to be legacy associations to the older da850-evm and in some cases
obsolete with either Kconfig or DM migrations. This patch removes
these legacy references.
Signed-off-by: Adam Ford <aford173@gmail.com>
Enable driver model for USB, MMC, SPI and SPI_FLASH. Also enable BLK.
This will remove the following compile warnings:
===================== WARNING ======================
This board does not use CONFIG_DM_MMC. Please update
the board to use CONFIG_DM_MMC before the v2019.04 release.
====================================================
===================== WARNING ======================
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
====================================================
===================== WARNING ======================
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.
====================================================
Target was compile tested, build was clean.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Add device tree from Linux for driver model conversion
and enable OF_CONTROL. This will remove the following compile
warning:
==================================================
Device Tree Source is not correctly specified.
Please define 'CONFIG_DEFAULT_DEVICE_TREE'
or build with 'DEVICE_TREE=<device_tree>' argument
===================================================
Target was compile tested, build was clean.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
In case dma_ring_reset_quirk is not set the k3_ringacc_ring_reset_dma will
just exit without ring reset. Fix it, by adding ring reset call in case
dma_ring_reset_quirk is not.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Pull request for UEFI sub-system for v2019.10-rc4 (4)
Fixes for the EFI_FILE_PROTOCOL:
* correctly iterate over directories
* correct Unicode conversion of file names
* parameter checks
In SerDes protocol 0x13BB, lane C was erroneously assigned
to PCIE1, this is now updated to PCIE2
Fixes: 36f50b7523 ("armv8: ls1028a: Add other serdes
protocal support")
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The correct config entry is CONFIG_PCIE_LAYERSCAPE and this
typo results in skipping the fixup of Linux PCIe DT nodes.
Also enable the fixup when Layerscape Gen4 controller driver
is enabled.
Fixes: 4da0e52c9d (armv8: fsl-layerscape: fix config dependency
for layerscape pci code)
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add SerDes1 protocol 14 in the list of supported protocols.
This configuration enables one high-speed 100G port and PCIe x4.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The code that generates the compatible property concatenates the
ethernet phy id and clause-compatible information without
separating them with a comma, resulting into no ethernet phy driver
getting loaded by Linux kernel.
Suffix phy_id_compatible_str with comma to fix this
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
lx2160a rev1 and rev2 SoC has different pcie controller.
The pcie controller device tree node fields "compatible"
and registers names needs to be updated accordingly
This change in device tree is handled as part of
fdt fixups. These changes would only be applied
if the soc revision is not rev1.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
By default, i2c input clock is programmed at
platform clk / 2 in u-boot, but this is not
correct for all the platforms,
Update I2C clock divider's default values as per
SoC (LS1012A, LS1028A, LX2160A and LS1088A).
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The SP805-WDT module on LS1028A requires configuration of PMU's
PCTBENR register to enable watchdog counter decrement and reset
signal generation. The watchdog clock needs to be enabled first.
Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add the device-tree structure describing the MUX in board dts.
QDS board has an on-board RGMII PHY and 4 slots for extension cards.
All these can be accessed over MDIO through a MDIO MUX controlled
over I2C.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
During boot, u-boot reads MC, DPL, DPC firmware from SD card
and copies to DDR. Update DDR addresses to which these firmwares
are copied as per memory map of these firmwares on SD-card
so that isolation between the regions of various firmwares
is maintained to avoid geting overwritten.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Add eMMC hs200 mode for ls1028a, ls1012a, lx2160a.
This increases eMMC performance.
Tuning procedure is currently not supported.
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
NXP fsl_esdhc controller supports two reference clocks:
platform clock and peripheral clock
Peripheral clock can provide higher clock frequency
which is required to be used for tuning of SD UHS mode
and eMMC HS200/HS400 modes.
Peripheral clock is enabled by default by defining config
option FSL_ESDHC_USE_PERIPHERAL_CLK if eMMC HS200/HS400 modes
are supported.
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
- add idbloader.img target for rockchip tpl+spl;
- usb ehci/ohci: go on process if clock driver don't have clk_enable();
- remove clk_enable() for rockchip clock drivers;
- add boot order for rockpro64
We do not support volume label changes. No parameter checks are needed
here.
When the info for as file is changed the buffer must always contain a file
name.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Many Rockchip platforms require the same u-boot deploy procedure
when TPL and SPL both enabled.
The following examples are taken from doc/README.rockchip
and board/theobroma-systems/lion_rk3368/README:
RK3288:
./tools/mkimage -n rk3288 -T rksd -d ./tpl/u-boot-tpl.bin out
cat ./spl/u-boot-spl-dtb.bin >> out
sudo dd if=out of=/dev/mmcblk0 seek=64
RK3328:
./tools/mkimage -n rk3328 -T rksd -d ./tpl/u-boot-tpl.bin idbloader.img
cat ./spl/u-boot-spl.bin >> idbloader.img
sudo dd if=idbloader.img of=/dev/mmcblk0 seek=64
RK3368:
./tools/mkimage -n rk3368 -T rksd -d tpl/u-boot-tpl.bin spl-3368.img
cat spl/u-boot-spl-dtb.bin >> spl-3368.img
dd if=spl-3368.img of=/dev/sdb seek=64
RK3399:
./tools/mkimage -n rk3399 -T rksd -d ./tpl/u-boot-tpl-dtb.bin out
cat ./spl/u-boot-spl-dtb.bin >> out
sudo dd if=out of=/dev/sdc seek=64
Here, we introduce generic idbloader.img target
which is the TPL image followed by the SPL binary.
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Use obj-$(config) instead of #ifdef $config to make the code looks
clean, and move the misc_init for U-Boot proper only.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The rk3188/Makefile already depends on !TPL_BUILD, so no need to add
this again in parent Makefile, remove it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
There is no real driver for clk enable/disable now, and we actually
don't need it now, remove it so that not waste CPU cycles and code size.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Some clock driver do not have a clk_enable() call back, and we should not
treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
do not return fail if ret value is '-ENOSYS'
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Some clock driver do not have a clk_enable() call back, and we should not
treat this as fail in ehci probe like other modules, eg. clk_enabl_bulk()
do not return fail if ret value is '-ENOSYS'
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
commit 65c1f9820c8f79f "usb: Add nonblock argument to submit_int_msg"
breaks the musb_hcd driver.
Fixing it by adding the missing argument
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
An USB 1.1 keyboard connected to dwc2 through a high-speed hub does not
report status until it changes. With this patch you can enable keyboard
by pressing a key while USB devices are probed. Without a keypress no
state is reported and the probe times out. We don't want to wait for a
keypress or timeout while polling for keypresses so implement an int_msg
nonblock variant that exits early on error.
Signed-off-by: Michal Suchanek <msuchanek@suse.de>
- Tangier ACPI table fixes
- Support getting high memory size on QEMU x86
- Show UEFI images involved in crash for x86
- EFI loader conventional memory map fix
- Add support for dis_u2_susphy_quirk in the xhci-dwc3 driver to fix boot when
a device is plugged only in the OTG capable port for libretech-ac and libretech-cc
Intel iDMA 32-bit controller has 17 bits for the maximum block size value.
Due to nature of the binary number representation the maximum value is
2^17 - 1. The original code misses the latter part in equation.
Fixes: 5e99fde34a ("x86: tangier: Populate CSRT for shared DMA controller")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Per PCI firmware specification the ACPI has to reserve the memory
which is defined as PCI ECAM.
Fixes: 39665beed6 ("x86: tangier: Enable ACPI support for Intel Tangier")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
GCC 9.2 starts complaining about possible pointer misalignment of
pointers to the unpacked (alignment=4) structures in the packed
(alignment=1) ones:
CC arch/x86/cpu/tangier/acpi.o
arch/x86/cpu/tangier/acpi.c: In function ‘acpi_create_fadt’:
arch/x86/cpu/tangier/acpi.c:22:37: warning: taking address of packed
member of ‘struct acpi_fadt’ may result in an unaligned pointer value
[-Waddress-of-packed-member]
22 | struct acpi_table_header *header = &(fadt->header);
CC arch/x86/lib/acpi_table.o
arch/x86/lib/acpi_table.c: In function ‘acpi_create_spcr’:
arch/x86/lib/acpi_table.c:366:37: warning: taking address of packed
member of ‘struct acpi_spcr’ may result in an unaligned pointer value
[-Waddress-of-packed-member]
366 | struct acpi_table_header *header = &(spcr->header);
Fix the potential issues by annotating embedded structures with
__packed even though they are packed naturally.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add GCC version number in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This quirk is necessary for the Amlogic GXL SoCs otherwise the
Port 2 PHY doesn't get out of suspend and U-Boot resets the board after:
XHCI timeout on event type 33... cannot recover.
BUG: failure at drivers/usb/host/xhci-ring.c:474/xhci_wait_for_event()!
BUG!
This quirk is also handled in the dwc3 core code, but until the
xhci-dwc3 driver uses the dwc3 core, the quirk must be handled here
to fix USB support on the Amlogic libretech-cc and libretech-ac board
when a device is only plugged in the OTG port.
Cc: Yuri Frolov <crashing.kernel@gmail.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Fixes: dc9cdf859e ("usb: dwc3: Add DWC3 controller driver support")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use efi_add_conventional_memory_map() to configure EFI conventional memory
properly with ram_top value. This will give 32-bit mode U-Boot proper
conventional memory regions even if e820 has an entry which is greater than
32-bit address space.
Signed-off-by: Aiden Park <aiden.park@intel.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
[bmeng: fixed some typos in the commit message]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
If a crash occurs, show the loaded UEFI images to facilitate analysis.
This is an example output:
=> bootefi 0x1000000
Found 0 disks
Hello world of bugs!
Invalid Opcode (Undefined Opcode)
EIP: 0010:[<06ceb06e>] EFLAGS: 00010206
Original EIP :[<fec9906e>]
EAX: 00000000 EBX: 06cec000 ECX: 00000fd0 EDX: 00000001
ESI: 06ced18a EDI: 07d0fe10 EBP: 07fe27a0 ESP: 07d0fde0
DS: 0018 ES: 0018 FS: 0020 GS: 0018 SS: 0018
CR0: 00000033 CR2: 00000000 CR3: 00000000 CR4: 00000000
DR0: 00000000 DR1: 00000000 DR2: 00000000 DR3: 00000000
DR6: ffff0ff0 DR7: 00000400
Stack:
0x07d0fde8 : 0x00000000
0x07d0fde4 : 0x06ced040
--->0x07d0fde0 : 0x07fe27a0
0x07d0fddc : 0x00010206
0x07d0fdd8 : 0x00000010
0x07d0fdd4 : 0x06ceb06e
UEFI image [0x06cea000:0x06cf0fff] pc=0x106e '/bug-i386.efi'
### ERROR ### Please RESET the board ###
With the additional information provided by this patch we know that the
problem occurred 0x106e after the load address of bug-i386.efi.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Now that we are able to get the size of high memory from QEMU,
report its memory range as usable ram.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Aiden Park <aiden.park@intel.com>
At present only size of memory that is below 4GiB is retrieved from
QEMU. Add a function that gets size of memory that is above 4GiB.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Aiden Park <aiden.park@intel.com>
This extracts getting memory size logic in dram_init() to a separate
routine qemu_get_low_memory_size(). No functional changes.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Aiden Park <aiden.park@intel.com>
Every x86 platform provides board_get_usable_ram_top(), hence there
is no need to provide a weak version board_get_usable_ram_top(), not
to mention there is another weak version board_get_usable_ram_top()
in common/board_f.c.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Aiden Park <aiden.park@intel.com>
Using ACPI predefined macros, such as Zero or One, will reduce a binary
size of resulting ACPI tables.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: manually fixed the conflicts when applying]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
While the original patch to fix a regression in distro boot for mmc on
these platforms had the correct syntax, I broke the change while
applying. Add back in the missing "=" here so that the syntax is
correct.
Reported-by: Andre Heider <a.heider@gmail.com>
Fixes: 27e0f3bcf0 ("arm: ti: Fix regression in distro boot for mmc")
Signed-off-by: Tom Rini <trini@konsulko.com>
Check the parameters of EFI_FILE_PROTOCOL.GetInfo() to avoid possible NULL
dereference.
Check the buffer size for EFI_FILE_SYSTEM_INFO.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We cannot determine the volume name in U-Boot. Instead of providing a dummy
volume name in case of EFI_FILE_SYSTEM_INFO and EFI_UNSUPPORTED in case of
EFI_FILE_SYSTEM_VOLUME_LABEL consistently return an empty string.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The UEFI specification requires to implement version 2 of the
EFI_FILE_PROTOCOL. Provide the missing functions as stubs.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The file size has to be determined in multiple places. Factor out a common
function.
If on entry into EFI_FILE_PROTOCOL.Read() the current position is beyond
the end of the file, return EFI_DEVICE_ERROR.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
EFI_FILE_PROTOCOL.Read() is used both to read files and directories.
When reaching the end of a directory we always have to return buffer size
zero irrespective of the incoming buffer size. (The described scenario for
a Shim quirk cannot arise because every directory has at least '.' and '..'
as entries.)
Even when the buffer_size is too small multiple times we have to keep a
reference to our last read directory entry.
When we return to the start of the directory via SetPosition() we must
remove the reference to a previously kept directory entry.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
ascii2unicode() can only convert characters 0x00-0x7f from UTF-8 to UTF-16.
Use utf8_utf16_strcpy() instead.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Check the parameters passed to Write():
* cannot write to directories (UEFI SCT 2017, 5.7.3.5.15)
* cannot write to file opened read only (UEFI SCT 2017, 5.7.3.5.16)
Add missing comments.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
- fix mailbox status register used for polling
- fix bcm2835_sdhost to wait long enough for a transfer to complete
- increase kernel image size from 8 MB to 64 MB on arm64
- add support for RPi4
- add prefixes for raspberry pi related stuff to git-mailrc
Define the memory map for the BCM2711 based on the dt configuration
available in the Raspberry Pi kernel fork.
Signed-off-by: Andrei Gherzan <andrei@balena.io>
[mb: BCM2838 -> BCM2711]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The bcm2711 has two emmc controllers. The difference is the clocks
they use. Add support for the second emmc controller.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Andrei Gherzan <andrei@balena.io>
This clock has a different mbox ID so have this included in the relevant
header file.
Signed-off-by: Andrei Gherzan <andrei@balena.io>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The Raspebrry Pi 4 uses the new revision code scheme as documented by
the foundation. This change adds an entry for this board as well.
Signed-off-by: Andrei Gherzan <andrei@balena.io>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Define two target configs for Raspberry Pi 4 (32 and 64bit) and the
corresponding BCM2838* configs.
Be aware of the current limitation in firmware which requires an
explicit configuration to force the arm in 64bit mode when the
respective target is used.
Signed-off-by: Andrei Gherzan <andrei@balena.io>
[mb: rename BCM2838 -> BCM2711]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Devices of bcm283x have different base address, depending if they are on
bcm2835 or bcm2836/7. Use BCM283x_BASE depending on the SoC you want to
build and only add the offset in the header files.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Andrei Gherzan <andrei@balena.io>
This defines a minimum defconfig for each of the two Raspberry Pi 4
variants. One notable difference is that we don't have a embedded dt for
this board given that the fw supplies us with one which we can reuse.
Furthermore, the ram size is not queryable through mbox interface as the
maximum reported size is 1G. The fw patches the dt with the right
memory configuration and uboot uses it as it is. We avoid u-boot
touching this configuration by making sure CONFIG_ARCH_FIXUP_FDT_MEMORY
is deactivated.
Signed-off-by: Andrei Gherzan <andrei@balena.io>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
On AArch64, kernel images are not self-decompressing and easily exceed
the 8MB limit.
Signed-off-by: Laurent Bonnans <laurent.bonnans@here.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Function bcm_2835_wait_transfer_complete() is not waiting long enough.
The previous code was claiming to wait for ~1 seconds, but as it depends
on register reads it's time actually varies.
Some cards require wait times of up to ~56 ms to perform
the command 'saveenv' on an EXT4 partition.
Re-implement the loop exit condition to use get_timer() which allows
to specify the wait time in more reliable manner. Set the maximum wait
time to the originally intended 1 second.
Signed-off by: Raul Benet <raul.benet_at_kaptivo.com>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Before we can send a message to the mailbox we have to check that there
is space to do so. Therefore we poll the status register. But up to now
the wrong status register, the one of mailbox 0, was checked. Fix this
by polling the status regiser of mailbox 1.
Signed-off-by: Fabian Vogt <fvogt@suse.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
[mb: rename registers and update commit message]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Pull request for UEFI sub-system for v2019.10-rc4 (3)
This includes the patches from
Pull request for UEFI sub-system for v2019.10-rc4 (2)
Fix UEFI specification compliance issues in the simple network protocol:
* Correctly set and reset the interrupt status.
* Support filling the header in the Transmit() service.
* Correct the checking and setting of the network state.
* Implement the MCastIPtoMAC() service.
* Adjust the simple network protocol unit test.
Fix UEFI specification compliance issues in the protocol.
Fix UEFI specification compliance issues in the simple text output protocol:
* Avoid out of bounds cursor position.
* Do not set illegal screen mode.
Fix UEFI specification compliance issues in the block IO protocol:
* Check parameters.
* Return correct status code if buffer is unaligned.
Refactor initialization of EFI memory in preparation of support for
> 3GB memory on x86.
The sdhci capabilities registers can be incorrect. The
sdhci-caps-mask and sdhci-caps dt properties specify which bits of
the registers are incorrect and what their values should be. This
patch makes the sdhci driver use those properties to correct the caps.
Also use "dev_read_u64_default" instead of "dev_read_u32_array" for
caps mask.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
We cannot do anything in EFI_BLOCK_IO_PROTOCOL.Reset() but this does not
justify to return an error.
Let EFI_BLOCK_IO_PROTOCOL.Reset() return EFI_SUCCESS.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
EFI_PRINT() offers indention of debug messages. Adjust the debug messages
of the BLOCK_IO_PROTOCOL.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Check parameters of ReadBlocks() and WriteBlocks().
If the buffer size is not a multiple of the block size, we have to return
EFI_BAD_BUFFER_SIZE.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
EFI_SIMPLE_TEXT_OUTPUT_PROTOCOL.SetMode() should return EFI_UNDEFINED if a
screen mode is not available.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Alexander Graf <agraf@csgraf.de>
When backspacing in column 0 do no set the column index to ULONG_MAX.
Ensure that the row number is not set to ULONG_MAX even if the row count is
advertised as 0.
Ignore control characters other the 0x08, 0x0a, 0x0d when updating the
column.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Correct the name of the partition size component in struct
efi_device_path_cdrom_path.
Render entry, start, and size when converting a CD-ROM device path node to
text.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Vendor device paths may contain data. When converting vendor device paths
to text this binary data has to be rendered.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Adding a conventional memory region to the memory map may require ram_top
limitation and it can be also commonly used. Extract adding a conventional
memory to the memory map in a separate routine for generic use.
Signed-off-by: Aiden Park <aiden.park@intel.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Implement the MCastIPtoMAC service of the simple network protocol.
It converts an multicast IPv4 (or IPv6) address to a multicast Ethernet
address.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The network should start in status EfiSimpleNetworkStopped.
Add and correct status checks in the simple network protocol.
Correct the unit test:
* Shutdown() and Stop() during setup if needed
* invoke Shutdown() before Stop() when tearing down
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Fill the media header in EFI_SIMPLE_NETWORK.Transmit().
Check that the buffer size is large enough for the header.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Check that when the WaitForPacket event occurs
EFI_SIMPLE_NETWORK_RECEIVE_INTERRUPT is set.
Check the return value of Receive().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
GetStatus() must clear the interrupt status.
Transmit() should set the TX interrupt.
Receive() should clear the RX interrupt.
Initialize() and Start() should clear the interrupt status.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Enable CONFIG_CMD_BOOTEFI_SELFTEST for the QEMU RISC-V boards.
Travis CI QEMU testing has been enabled for qemu-riscv64_defconfig. With
this patch we will test the UEFI sub-system on the board.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The mmc_spi driver's priv is not available in its bind phase(). Use
platdata instead.
Fixes: 05e35d4297 ("mmc: mmc_spi: Re-write driver using DM framework")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
There are two cases not been considered:
- use uint for timeout, it will overflow when size bigger than 512KB for
it *8*1000 at the beginning, but we may use size up to 32MB; The
'timeout' will overflow if size bigger than 51.2MB after this fix, which
should be enough for U-Boot;
- The timeout is using clock speed for data rate, but the device may not
have such high speed, eg. clock is 52MHz while the device write speed may
be less than 10MB/s, and we may use up to 150MHz clock.
Fix them in this patch, the max timeout is about 6500 when size is 32MB
after fix.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add nodes for the Aspeed SD controllers with their necessary properties.
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Enable the MMC subsystem and the Aspeed SD controller. Also enable the
use of the device tree for probing the controller.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
It's quite hard to figure out time units for various function that have
timeout parameters. This leads to possible errors when one forgets to
convert ms to us, for example. Let's rename those parameters
correspondingly to 'timeout_us' and 'timeout_ms' to prevent such issues
further.
While at it, add time units info as comments to struct mmc fields.
This commit doesn't change the behavior, only renames parameters names.
Buildman should report no changes at all.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
mmc_wait_dat0() expects timeout argument to be in usec units. But some
overlying functions operate on timeout in msec units. Convert timeout
from msec to usec when passing it to mmc_wait_dat0().
This fixes 'avb' commands on BeagleBoard X15, because next chain was
failing:
get_partition() -> mmc_switch_part() -> __mmc_switch() ->
mmc_wait_dat0()
when passing incorrect timeout from __mmc_switch() to mmc_wait_dat0().
Fixes: bb98b8c5c0 ("mmc: During a switch, poll on dat0 if available and check the final status")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Eugeniu Rosca <rosca.eugeniu@gmail.com>
Tested-by: Eugeniu Rosca <rosca.eugeniu@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
When look through the code, I found this bare metal
drives is not used, so remove it.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With GCC 9.2.1 net/nfs.c leads to multiple errors of type
address-of-packed-member.
net/nfs.c: In function ‘rpc_req’:
net/nfs.c:199:18: error: taking address of packed member of
‘struct rpc_t’ may result in an unaligned pointer value
[-Werror=address-of-packed-member]
199 | p = (uint32_t *)&(rpc_pkt.u.call.data);
| ^~~~~~~~~~~~~~~~~~~~~~
net/nfs.c: In function ‘nfs_readlink_reply’:
net/nfs.c:631:46: error: taking address of packed member of
‘struct rpc_t’ may result in an unaligned pointer value
[-Werror=address-of-packed-member]
631 | nfs3_get_attributes_offset(rpc_pkt.u.reply.data);
| ~~~~~~~~~~~~~~~^~~~~
LD drivers/block/built-in.o
net/nfs.c: In function ‘nfs_read_reply’:
net/nfs.c:692:46: error: taking address of packed member of
‘struct rpc_t’ may result in an unaligned pointer value
[-Werror=address-of-packed-member]
692 | nfs3_get_attributes_offset(rpc_pkt.u.reply.data);
| ~~~~~~~~~~~~~~~^~~~~
struct rpc_t is only used as local variable. It is naturally packed. So
there is no need for the attribute packed.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
rpc_pkt.u.call.data is an array of uint32_t. There is no need to convert
it to uint32_t *.
memcpy() expects void * as it 1st and 2nd argument. There is no point in
converting pointers to char * before passing them to memcpy().
In ntohl(data[1]) != 0 calling ntohl() is superfluous. If the value is
zero, does not depend on the byte order.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Some environment variables are relevant for networking. For these
U_BOOT_ENV_CALLBACKs have been defined. When the corresponding environment
variable is updated the callback updates the state of the network
sub-system.
In the UEFI subsystem we can use the network even if CONFIG_CMD_NET is not
defined.
Let the usage of the U_BOOT_ENV_CALLBACKs depend on CONFIG_NET and not on
CONFIG_CMD_NET.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This patch adds a check to nfs_handler to fix buffer overflow for CVE-2019-14197,
CVE-2019-14200, CVE-2019-14201, CVE-2019-14202, CVE-2019-14203 and CVE-2019-14204.
Signed-off-by: Cheng Liu <liucheng32@huawei.com>
Reported-by: Fermín Serna <fermin@semmle.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The net_random_ethaddr() tries to get some entropy from different
startup times of a board. The seed is initialized with get_timer() which
has only a granularity of milliseconds. We can do better if we use
get_ticks() which returns the raw timer ticks. Using this we have a
higher chance of getting different values at startup.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
With commit c6d07bf440 ("net/macb: increase RX buffer size for GEM")
ethernet support does not work any more with d-cache enabled on the
AT91SAM. The reason is, that MACB_RX_BUFFER_SIZE was changed from 4096
to 128 but this change was not refected in the rx_buffer flush and
invalidate functions, as these also use this macro.
This patch now fixes this by calculating the rx buffer size correctly
again in those functions. With this change, ethernet works again
reliably on my AT91SAM board.
Signed-off-by: Stefan Roese <sr@denx.de>
Fixes: c6d07bf440 ("net/macb: increase RX buffer size for GEM")
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The same compatible = "altr,socfpga-stmmac" appears in both
drivers/net/designware.c and drivers/net/dwmac_socfgpa.c,
creating ambiguity in which driver will be bound.
For Intel/Altera SoC devices, dwmac_socfpga.c is the correct driver.
So drop the compatible string from designware.c.
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This reverts commit 1b0c9914cc.
Commit 1b0c9914cc ("net: macb: Fixed reading MII_LPA register")
causes 100Mbps does not work any more with SiFive FU540 GEM on the
HiFive Unleashed board. Revert it.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The driver model has been supported for network drivers since 2015. It is
time to convert the remaining boards. Set July 2020 as a timeline.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
It was missing in the original submission and not having it in place causes
issues with probing of PCI devices.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Align the board and driver prototype for board_interface_eth_init
to avoid execution issue (the interface_type parameter is defined
as int or phy_interface_t).
To have a generic weak function (it should be reused by other driver)
I change the prototype to use directly udevice.
This prototype is added in netdev.h to allow compilation check
and avoid warning when compiling with W=1 on file
board/st/stm32mp1/stm32mp1.c
warning: no previous prototype for 'board_interface_eth_init'\
[-Wmissing-prototypes]
int board_interface_eth_init(int interface_type, ....
^~~~~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Do not use random value from stack as return value of pfe_phy_write().
Indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
SANDBOX_PHY_REG_CNT is not an allowable index for the array
u16 reg[SANDBOX_PHY_REG_CNT].
Identified by cppcheck.
Fixes: b47edf8069 ("test: dm_mdio: add a 2nd register to the emulated PHY")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
mvpp2 already has support for setting MAC addresses but this
functionality was not exposed to the ethernet core. This commit exposes
this functionality so that MAC address assignments stored in U-Boot's
environment are correctly applied before Linux boots.
Signed-off-by: Matt Pelland <mpelland@starry.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Implicitly Marvell MDIO driver uses DT node names for devices, but in this
case that is not unique. Set MDIO device names for master/slave to
cpm/cps.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This patch adds a separate driver for the MDIO interface of the
Marvell Ethernet controllers based on driver model. There are two
reasons to have a separate driver rather than including it inside
the MAC driver itself:
*) The MDIO interface is shared by all Ethernet ports, so a driver
must guarantee non-concurrent accesses to this MDIO interface. The
most logical way is to have a separate driver that handles this
single MDIO interface, used by all Ethernet ports.
*) The MDIO interface is the same between the existing mv643xx_eth
driver and the new mvneta/mvpp2 driver. Even though it is for now
only used by the mvneta/mvpp2 driver, it will in the future be
used by the mv643xx_eth driver as well.
This driver supports SMI IEEE for 802.3 Clause 22 and XSMI for IEEE
802.3 Clause 45.
This patch also adds device tree binding for marvell MDIO driver.
Signed-off-by: Ken Ma <make@marvell.com>
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Adds a binding document for mdio. A notable deviation from corresponding
Linux binding is the introduction of device-name optional property, which
can be used to name MDIO buses. Two reset optional properties described
by Linux binding are also not present as they don't seem to be used in
U-Boot at this time.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Use the optional property device-name to name the MDIO bus. This works
around limitations with using the DT node name on devices such as
Armada-8040, which integrates two cp100 cores, both featuring MDIOs at the
same relative offsets and with the same DT node names.
The concept was originally proposed by Marvell as a custom property called
mdio-name specific to Marvell driver. This patch uses the more generic
property device-name and moves this into MDIO class code so other can use
it as well.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add support for capturing ethernet packets and storing
them in memory in PCAP(2.4) format, later to be analyzed by
any PCAP viewer software (IE. Wireshark)
This feature greatly assist debugging network issues such
as detecting dropped packets, packet corruption etc.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Tested-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Create drivers/net/fsl-mc/Kconfig and move fsl-mc specific configs
from arch/arm/cpu/armv8/fsl-layerscape/Kconfig to this new Kconfig
Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This driver is used for MDIO muxes driven over I2C. This is currently
used on Freescale LS1028A QDS board, on which the physical MDIO MUX is
controlled by an on-board FPGA which in turn is configured through I2C.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
These are some very late changes mostly required to get 64-bit
division working on ARC boards.
For that we had to import missing parts of libgcc and add compiler
flags to EMSDP which otherwise used very simple profile for compliation.
And while at it another fix for EM SDP initialization is inluded as well.
Even though EM SDP is FPGA-based board and different FPGA
images (known as .bit-files) are awailable for the board still
there's a common subset of options we may rely on for all configs.
These are:
* Normalizer
* Swap instructions
* Simple multiplier
* Barrel-shifter
* Floating-point unit
* Shorter instructions (code density)
This among other improvements allows to compile code with
64-bit divisions, see [1].
[1] https://patchwork.ozlabs.org/patch/1156541/
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Cc: Kever Yang <kever.yang@rock-chips.com>
If the "Page Mode" is not enabled on the device,
read operations from PSRAM may result in incorrect data.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
- Skip unavailable hart in the get_count().
- fu540 set serial env from otp.
- fu540 add mmc0 as a boot target device.
- Update fix_rela_dyn and add absolute reloc addend.
- Andestech PLIC driver will skip unavailable hart.
- Support Andestech V5L2 cache driver.
When L2 node exists inside cpus node, uclass_get_device
can not parse L2 node successfully. So move it outside
from cpus node.
Also add tag-ram-ctl and data-ram-ctl attributes for
v5l2 cache controller driver. This can adjust timing
by requirement from dtb to improve performance.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Flush and disable L2 cache in dcache_disable()
which will be called in cleanup_before_linux()
before jump to linux.
The sequence will be preferred as below:
L1 flush -> L1 disable -> L2 flush -> L2 disable
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a v5l2 cache controller driver that is usually found on
Andes RISC-V ae350 platform. It will parse the cache settings
from the dtb.
In this version tag and data ram control timing can be adjusted
by the requirement from the dtb.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Initialize plic driver by ofnode_for_each_subnode() instead
of cpu_get_count().
This way can support to skip some harts which maybe marked as
unavailable, but the cpu node exists indeed.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The addend is now added for RELOC_TYPE relocs. Also, changed the loop
structure so that all the R_RISCV_RELATIVE relocs are not required to
be at the beginning of the list.
Signed-off-by: Marcus Comstedt <marcus@mc.pp.se>
Cc: Rick Chen <rick@andestech.com>
Previously the handling of R_RISCV_32 and R_RISCV_64 would simply
insert the value of the symbol and ignore any addend. However, there
exist relocs where the addend is non-zero:
0000000080250900 R_RISCV_64 efi_runtime_services+0x0000000000000068
0000000080250910 R_RISCV_64 efi_runtime_services+0x0000000000000038
0000000080250920 R_RISCV_64 efi_runtime_services+0x0000000000000018
0000000080250930 R_RISCV_64 efi_runtime_services+0x0000000000000020
0000000080250980 R_RISCV_64 efi_runtime_services+0x0000000000000048
0000000080250990 R_RISCV_64 efi_runtime_services+0x0000000000000050
00000000802509a0 R_RISCV_64 efi_runtime_services+0x0000000000000058
0000000080250940 R_RISCV_64 systab+0x0000000000000030
0000000080250950 R_RISCV_64 systab+0x0000000000000040
0000000080250960 R_RISCV_64 systab+0x0000000000000050
0000000080250970 R_RISCV_64 systab+0x0000000000000060
In these cases the addend needs to be added to the symbol value to get
the correct value for the reloc.
Signed-off-by: Marcus Comstedt <marcus@mc.pp.se>
Cc: Rick Chen <rick@andestech.com>
Add DT entry for the DM PCI driver, update board configs
and drop ad-hoc board init code for the PCI bus. Instead,
let the DM PCI driver initialize and operate the hardware.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Enable OF control for SH4 R2Dplus board. This is necessary, because
the PCI uclass is designed in a way that makes it depend on DT and
disallows instanciating devices without DT (e.g. with platdata).
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Enable driver model support for SH4 R2Dplus board. Thus far, no
drivers are bound via the DM. The PCI drivers have yet to be
converted to DM_PCI.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
If the OF_SEPARATE is enabled, the DT is appended past the _end symbol.
The current code however clears BSS very early, which overwrites the DT
blob with zeroes. Moreover, the early code relocates U-Boot into RAM to
the correct location, but does not relocate the DT.
This patch adds code to relocate the DT and avoids clearing BSS too
early, thus addressing both problems with OF_SEPARATE on SH.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Some of the DM functions depend on OF_CONTROL, which is incorrect.
DM and DT are orthogonal. Add macro guards around such functions to
avoid compiling them in when DM is enabled, while OF_CONTROL is not.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
When CONFIG_CLK enabled, use CLK UCLASS for clk related settings.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
hs: removed hunk in mxc_i2c_probe() as not longer in code
I wanted this to be compatible with mkenvimage, including the ability
to embed newlines in variables by escaping them. But I failed to check
that it works more than once.
Fixes: f3d8f7dd73 (Allow providing default environment from file)
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Enable CONFIG_DM_USB to remove compile warning for
am43xx based targets:
===================== WARNING ======================
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
TI AM65x platforms (evm and HS) generate an SPL image
'tispl.bin*' and there is no rule for cleanup.
Added entry for cleanup in clean target.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
eMMC device has multiple hw partitions both address from zero. However the
mmc driver lacks block cache invalidation for switch hwpart. This causes a
problem that data of current hw partition is cached before switching to
another hw partition. And the following read operation of the latter hw
partition will get wrong data when reading from the addresses that have
been cached previously.
To solve this problem, invalidate block cache after a successful
mmc_switch_part() operation.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Felix Brack <fb@ltec.ch>
This reverts commit 0ebe112d09.
Most block devices have only one hwpart. Multiple hwparts only found used
by eMMC devices in u-boot. The mmc driver do blk_dselect_hwpart() at the
beginning of mmc_bread() which causes block cache being invalidated too
frequently and makes block cache useless.
So it's not a good idea to put blkcache_invalidate() in the common
functions. It should be called inside mmc_select_hwpart().
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Felix Brack <fb@ltec.ch>
The current code in reserve_noncached() has two issues:
1) The first update of gd->start_addr_sp always rounds down to a section
start. However, the equivalent calculation in cache.c:noncached_init()
always first rounds up to a section start, then subtracts a section size.
These two calculations differ if the initial value is already rounded to
section alignment.
2) The second update of gd->start_addr_sp subtracts exactly
CONFIG_SYS_NONCACHED_MEMORY, whereas the equivalent calculation in
cache.c:noncached_init() rounds the noncached size up to section
alignment before subtracting it. The two calculations differ if the
noncached region size is not a multiple of the MMU section size.
In practice, one/both of those issues causes a practical problem on
Jetson TX1; U-Boot triggers a synchronous abort during initialization,
likely due to overlapping use of some memory region.
This change fixes both these issues by duplicating the exact calculations
from noncached_init() into reserve_noncached().
However, this fix assumes that gd->start_addr_sp on entry to
reserve_noncached() exactly matches mem_malloc_start on entry to
noncached_init(). I haven't traced the code to see whether it absolutely
guarantees this in all (or indeed any!) cases. Consequently, I added some
comments in the hope that this condition will continue to be true.
Fixes: 5f7adb5b1c ("board_f: reserve noncached space below malloc area")
Cc: Vikas Manocha <vikas.manocha@st.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Pull request for UEFI sub-system for v2019.10-rc4
Enable the unit test for UEFI runtime service Exit() on x86_64.
Use as standalone UEFI binary for testing the handling of exceptions.
To fully demonstrate crash outputs for UEFI images provide a standalone
UEFI application that tries to invoke an illegal opcode.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
MPC8548 integrated a PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 1.0a, and this
patch is to add DT node for the PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
P5040 integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
P4080 integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
P3041 integrated 4 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
P2041 integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Compile the legacy PCIe initialization routines for P2041RDB,
P3041, P4080, P5020 and P5040 DS boards only when DM_PCI is
not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
P2020 integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 1.0a, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
P1020 integrated 2 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 1.0a, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Compile the legacy PCIe initialization routines for P1020,
P1021, P1024, P1025 and P2020 RDB boards only when DM_PCI
is not enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
T104x integrated 4 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Remove the macro CONFIG_ARCH_T1040 from the T102xRDB.h and
the PCIE4 related macros, as there are only 3 PCIe controllers
on T102x SoCs.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
T102x integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
T4240 integrated 4 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 3.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
The PCIe controller register address in CCSR is different
on various platforms, the current code erroneously use
the hardcoded address (0xffe240000) and stride (0x10000)
to calculate the controller's index.
Fix it by adding the related info to the driver data
structure.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
The Class Code fixup method was changed from PCIe block
revision 3.0, the current fixup is only valid for the
revision 3.0 and the later ones.
So add the Class Code fixup for the block revision < 3.0.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
This can avoid build error:
The macro in brackets of the IS_ENABLED(CONFIG_FOO) is only
defined on the platforms that select the CONFIG_FOO, while
it's not defined on platforms that do not select the
CONFIG_FOO.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
The G12B clock controller is almost identical to the G12A and
so far the differences don't matter. Adding the G12B compatible
makes USB work on the Odroid-N2.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Support of device tree model for T2080RDB, T4240RDB, T1024RDB,
T1042D4RDB, P1020RDB, P2020RDB, P2041RDB, P3041DS, P4080DS, P5040DS and
MPC8548CDS. Also support of i2c dm model.
i2c bugfixes for 2019.10
- misc: i2c_eeprom: verify that the chip is functional at probe()
- i2c: mxc_i2c: Remove i2c_idle_bus from probe
- i2c-mux-gpio: Fix GPIO request flag issue
Add example of its files to generate FIT to start kernel
on ev1 or dk2 board with
- only kernel and dtb = fit_copro_kernel_dtb.its
- kernel, M4 copro firmware and dtb = it_copro_kernel_dtb.its
Add extlinux example to manage config in generated FIT.
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Implements copro image loading with FIT.
Once image is loaded with remoteproc,
the M4 coprocessor is automatically started.
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Define new image type for coprocessor images.
It is used in FIT to identify the files loaded
with remoteproc command (elf or bin).
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The RCC driver have no operation so the new NOP uclass
is more appropriate. It only used as parent for clock and reset driver.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Update management of misc_read, which now return length of data
after the commit 8729b1ae2c ("misc: Update read() and write()
methods to return bytes xfered")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Update management of misc_read in sysconf_init, which now return
length of data after the commit 8729b1ae2c ("misc: Update read()
and write() methods to return bytes xfered")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Update the stm32mp1 baord after the commit 8729b1ae2c
("misc: Update read() and write() methods to return bytes xfered")
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Use MISC u-class to export the NVM register (starting at 0xF8 offset)
and avoid specific API.
- SHADOW have offset < 0.
- NVM have register > 0
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Since the commit 8729b1ae2c ("misc: Update read() and
write() methods to return bytes xfered"); The misc bsec driver
need to be adapted to reflect the number of transferred bytes.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Use existing gd structure to store frequency information
which can be used in drivers or arch without new request.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add pattern for infinite test_read and test_write, that
allow to change the pattern to test without recompilation;
default pattern is 0xA5A5AA55.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reduce verbosity of the infinite tests to avoid CubeMX issue.
test and display loop by 1024*1024 accesses: read or write.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
If user choose to test memory size is 1GByte (0x40000000),
memory address would overflow in test "Random" and
test "FrequencySelectivePattern".
Thus the system would hangs up when running DDR test.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Bossen WU <bossen.wu@st.com>
The "serial_stm32.h" is only used by drivers/serial/serial_stm32.c
and it is the file ./drivers/serial/serial_stm32.h
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add management of Bit 1 of USART_ISR = FE: Framing error
This bit is set by hardware when a de-synchronization, excessive noise
or a break character is detected. It is cleared by software, writing 1
to the FECF bit in the USART_ICR register (for stm32 after f4).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Due to kernel DT alignment, pwr-supply is renamed to vdd-supply
and is a subnode of pwr-regulators.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
As for Audio codec IC, HDMI IC is not "IO safe".
HDMI regulators (v3v3 and v1v2) must be enabled to allow
I2C1 bus usage. HDMI IC must be under reset during power up
and keep HDMI and AUDIO devices in reset while they are not
used in U-Boot to keep them in low power mode
(each device can be kept in reset independently keeping their
power supplies ON until kernel).
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add the boot for NOR, SPL load U-Boot.img at offset
CONFIG_SYS_SPI_U_BOOT_OFFS = 0x80000.
It is the start address of mtd partition ssbl in nor.
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This allows to display splashcreen without waiting
an extra delay of 2 seconds due to default value of bootdelay.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add altbootcmad as it is used for
- bootcountlimit
- in mach-stm32mp/cpu.c for BOOT_RECOVERY mode
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Backlight of panel raydium RM68200 is controlled by a simple gpio,
thus we activate the support for the needed driver.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add imply for FDT overlay that can be usefuill for kernel device tree
management but it is not mandatory (can be removed to gain space)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
for the moment basic and trusted configuration must
start CPU in Supervisor mode and not in Hypervisor
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Depending on backup register value, we maintain the debug unit
powered-on for debugging purpose.
Only BUCK1 is required for powering the debug unit, so revert
the setting for all the other power lanes, except BUCK3 that
has to be always on.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Avoid U-Boot auto-boot interruption for line break detection
on console when the RX line connected to STLINK is floating
(-IO error in getc cause by framing error and testc return 1)
Same workaround is applied on all the STMicroelectonics board.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
The pre-relocation probe is needed to reserve video frame buffer
in video_reserve() for all the board;
LDTC must be tagged prereloc in SOC U-Boot dtsi file.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add node in DT and avoid error to search UCLASS_SYSRESET in
board_f.c::print_resetinfo() and lost 1.6s in U-Boot
for the trusted boot chain.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch adds independent watchdog support for stm32mp157c
in SPL.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Update DDR configuration with the latest update:
- Change DQSGE to 1 for DDR3, to cure missing DQS preamble.
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Alignment with kernel driver.
According to the following tab (coming from STMFX datasheet), updates
have to done in stmfx_pinctrl_conf_set function:
-"type" has to be set when "bias" is configured as "pull-up or pull-down"
-PIN_CONFIG_DRIVE_PUSH_PULL should only be used when gpio is configured as
output. There is so no need to check direction.
DIR | TYPE | PUPD | MFX GPIO configuration
----|------|------|---------------------------------------------------
1 | 1 | 1 | OUTPUT open drain with internal pull-up resistor
----|------|------|---------------------------------------------------
1 | 1 | 0 | OUTPUT open drain with internal pull-down resistor
----|------|------|---------------------------------------------------
1 | 0 | 0/1 | OUTPUT push pull no pull
----|------|------|---------------------------------------------------
0 | 1 | 1 | INPUT with internal pull-up resistor
----|------|------|---------------------------------------------------
0 | 1 | 0 | INPUT with internal pull-down resistor
----|------|------|---------------------------------------------------
0 | 0 | 1 | INPUT floating
----|------|------|---------------------------------------------------
0 | 0 | 0 | analog (GPIO not used, default setting)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
STM32 RTC manages only 2 digits for YEAR
(Year tens and units in BCD format in RTC_DR register).
With this patch, RTC driver assumes that tm->tm_years is between
2000 and 2099; tm->tm_year - 2000 have only 2 digit
(0 > and <= 99).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
host->mmc, host->mmc->dev and host->mmc->priv must be set
before calling sdhci_setup_cfg() to avoid hang during mmc
initialization.
Thanks to commit 3d296365e4
("mmc: sdhci: Add support for sdhci-caps-mask") which put
this issue into evidence.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Increase SDMMC_BUSYD0END_TIMEOUT_US from 1s to 2s to
avoid timeout error during blocks erase on some sdcard
Issue seen on Kingston 16GB :
Device: STM32 SDMMC2
Manufacturer ID: 27
OEM: 5048
Name: SD16G
Bus Speed: 50000000
Mode: SD High Speed (50MHz)
card capabilities: widths [4, 1] modes [SD Legacy, SD High Speed (50MHz)]
host capabilities: widths [4, 1] modes [MMC legacy, SD Legacy, MMC High Speed (26MHz), SD High Speed (50MHz), MMC High Speed (52MHz)]
Rd Block Len: 512
SD version 3.0
High Capacity: Yes
Capacity: 14.5 GiB
Bus Width: 4-bit
Erase Group Size: 512 Bytes
Issue reproduced with following command:
STM32MP> mmc erase 0 100000
MMC erase: dev # 0, block # 0, count 1048576 ... mmc erase failed
16384 blocks erased: ERROR
By setting SDMMC_BUSYD0END_TIMEOUT_US at 2 seconds and by adding
time measurement in stm32_sdmmc2_end_cmd() as shown below:
+start = get_timer(0);
/* Polling status register */
ret = readl_poll_timeout(priv->base + SDMMC_STA,
status, status & mask,
SDMMC_BUSYD0END_TIMEOUT_US);
+printf("time = %ld ms\n", get_timer(start));
We get the following trace:
STM32MP> mmc erase 0 100000
MMC erase: dev # 0, block # 0, count 1048576 ...
time = 17 ms
time = 1 ms
time = 1025 ms
time = 54 ms
time = 56 ms
time = 1021 ms
time = 57 ms
time = 56 ms
time = 1020 ms
time = 53 ms
time = 57 ms
time = 1021 ms
time = 53 ms
time = 57 ms
time = 1313 ms
time = 54 ms
time = 56 ms
time = 1026 ms
time = 54 ms
time = 56 ms
time = 1036 ms
time = 54 ms
time = 56 ms
time = 1028 ms
time = 53 ms
time = 56 ms
time = 1027 ms
time = 54 ms
time = 56 ms
time = 1024 ms
time = 54 ms
time = 56 ms
time = 1020 ms
time = 54 ms
time = 57 ms
time = 1023 ms
time = 54 ms
time = 56 ms
time = 1033 ms
time = 53 ms
time = 57 ms
....
time = 53 ms
time = 57 ms
time = 1021 ms
time = 56 ms
time = 56 ms
time = 1026 ms
time = 54 ms
time = 56 ms
1048576 blocks erased: OK
We see that 1 second timeout is not enough, we also see one measurement
up to 1313 ms. Set the timeout to 2 second to keep a security margin.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Read a single byte from EEPROM to verify that it is actually there.
This is equivalent to Linux kernel commit 00f0ea70d2b8 ("eeprom: at24:
check if the chip is functional in probe()").
Cc: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
hs: fixed style check prefer kernel type 'u8' over 'uint8_t'
i2c_idle_bus is already used in i2c_init_transfer. So before each transfer
if the bus is not ready, the i2c_idle_bus will be used to force idle.
It is unnecessary to call it again in probe.
We found a issue when enabling i2c mux with the mxc_i2c. The mxc_i2c is probed
after mux probing. However, at this moment the mux is still in idle state not
select any port. So if we call i2c_idle_bus in probe, it will fail and cause
mxc_i2c probe failed.
Signed-off-by: Ye Li <ye.li@nxp.com>
When requesting GPIO, the GPIOD_IS_OUT is missed in flag, so the GPIO
is set the input mode not output and cause mux not work.
Signed-off-by: Ye Li <ye.li@nxp.com>
Add device tree for MPC8548CDS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add CONFIG_RESET_VECTOR_ADDRESS definition with the default value
in u-boot.dtsi to fix the build error below. In the configuration
header file of some MPC85xx boards, there is not the definition
of CONFIG_RESET_VECTOR_ADDRESS, while CONFIG_SYS_MPC85XX_NO_RESETVEC
is also not defined. In this case, it will lack of definition of
CONFIG_RESET_VECTOR_ADDRESS in u-boot.dtsi, and the address
0xfffffffc will be used as the boot page by default.
Error log:
DTC arch/powerpc/dts/mpc8548cds.dtb
DTC arch/powerpc/dts/mpc8548cds_36b.dtb
Error: arch/powerpc/dts/u-boot.dtsi:28.15-16 syntax error
FATAL ERROR: Unable to parse input tree
Error: arch/powerpc/dts/u-boot.dtsi:28.15-16 syntax error
FATAL ERROR: Unable to parse input tree
scripts/Makefile.lib:308: recipe for target
'arch/powerpc/dts/mpc8548cds.dtb' failed
make[2]: *** [arch/powerpc/dts/mpc8548cds.dtb] Error 1
make[2]: *** Waiting for unfinished jobs....
scripts/Makefile.lib:308: recipe for target
'arch/powerpc/dts/mpc8548cds_36b.dtb' failed
make[2]: *** [arch/powerpc/dts/mpc8548cds_36b.dtb] Error 1
dts/Makefile:38: recipe for target 'arch-dtbs' failed
make[1]: *** [arch-dtbs] Error 2
Makefile:1038: recipe for target 'dts/dt.dtb' failed
make: *** [dts/dt.dtb] Error 2
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add device tree for P5040DS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add device tree for P4080DS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add device tree for P3041DS board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add device tree for P1041RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add device tree for P1020RDB boards and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add device tree for P1020RDB boards and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add device tree for T1042D4RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add device tree for T1024RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add device tree for T4240RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add device tree for T2080RDB board and enable CONFIG_OF_CONTROL
so that device tree can be compiled.
Update board README for device tree usage.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
include/video_logo.h once was created via the tool easylogo and than used
in cpu/mpc8xx/video.c to display Tux. video_logo.h has been replaced by
include/linux_logo.h and is not needed anymore.
Delete the include and the tool,
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Found accidentally in omap3_logic, CONFIG_USB_EHCI_OMAP adds some
code size to SPL, so this patch disables it on the am3517-evm to
reduce the code a bit since it's tight for space.
Signed-off-by: Adam Ford <aford173@gmail.com>
The SPI and NAND variants enable DM_GPIO, so this patch enables
DM_GPIO for the NOR / XIP version of the da850-evm.
Signed-off-by: Adam Ford <aford173@gmail.com>
The NAND configuration has had the ethernet missing, so this patch
enables the on-board ethernet interface.
Signed-off-by: Adam Ford <aford173@gmail.com>
Several options are presenting themselves on a various boards
where the options are clearly not used. (ie, SPL/TPL options
when SPL or TPL are not defined)
This patch is not attempting to be a complete list of items, but
more like low hanging fruit. In some instances, I wasn't sure
of DM was required, so I simply made them SPL or TPL.
This patch attempts to reduce some of the menuconfig noise
by defining dependencies so they don't appear when not used.
Signed-off-by: Adam Ford <aford173@gmail.com>
The current Makefile always use u-boot.bin to generate
PBL boot image (u-boot.pbl), this patch changes it to
use u-boot-with-dtb.bin to support device tree when
CONFIG_OF_SEPARATE is enabled.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
To address the following warning message:
===================== WARNING ======================
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
CONFIG_DM_USB is enabled, this resulted in SPL build errors:
drivers/built-in.o: In function 'xhci_dwc3_probe':
u-boot/drivers/usb/host/xhci-dwc3.c:155: undefined reference to 'usb_get_dr_mode'
scripts/Makefile.spl:404: recipe for target 'spl/u-boot-spl' failed
make[1]: *** [spl/u-boot-spl] Error 1
Makefile:1721: recipe for target 'spl/u-boot-spl' failed
make: *** [spl/u-boot-spl] Error 2
Enabling usb common library and usb ethernet drivers in SPL
does the job. Target was compile tested, build was clean.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
When large writes take place I saw a Samsung EVO 970+ return a status
value of 0x13, PRP Offset Invalid. I tracked this down to the
improper handling of PRP entries. The blocks the PRP entries are
placed in cannot cross a page boundary and thus should be allocated
on page boundaries. This is how the Linux kernel driver works.
With this patch, the PRP pool is allocated on a page boundary and
other than the very first allocation, the pool size is a multiple of
the page size. Each page can hold (4096 / 8) - 1 entries since the
last entry must point to the next page in the pool.
Signed-off-by: Aaron Williams <awilliams@marvell.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The command "pci bar" and "pci region" display the address and size in
16 characters including "0x", so the command can only display
14 hexadecimal digits if the number of digits in the address and size is
less than 14.
ID Base Size Width Type
----------------------------------------------------------
0 0x00000020000000 0x00000000100000 64 MEM Prefetchable
1 0xffff000080000000 0x00000000100000 64 MEM Prefetchable
The 64-bit address and size should be displayed in 18(= 16+2) digits,
so this patch adjusts them.
Cc: Yehuda Yitschak <yehuday@marvell.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some of the USB code is still being built into SPL even when the
SPL menu options have it explicitly disabled for SPL. Unit there is
a better solution, This patch undefines CONFIG_USB_EHCI_OMAP when
building SPL which reduces the code and lets the board boot again.
Fixes: 25e4ff45b1 ("ARM: omap3_logic: Enable OMAP EHCI support
for SOM-LV Boards")
Signed-off-by: Adam Ford <aford173@gmail.com>
The assigned value NULL is overwritten before being used. Remove the
assignment.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
File was found on specified location. Info about file was read,
but then immediately destroyed using 'free' call. As a result
file size was set to 0, hence fat process didn't read any data.
Premature 'free' call removed. Resources are freed right before
function return. File is read correctly.
Signed-off-by: Martin Vystrcil <martin.vystrcil@m-linux.cz>
The scsi_scan_dev() is looping over the number of uc_plat->max_id.
The number of actual ports a AHCI controller has can be greater than
max_id. Update uc_plat->max_id to make SCSI scan all detected ports.
Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
When the pinmux configuration was added, it was accidentally placed into
the omap3_pmx_wkup node when it should have been placed into the
omap3_pmx_core. This error was accidentally propagated to U-Boot by
me when I blindly copied the device tree from Linux.
This patch moves the i2c2_pins and i2c3_pins to the correct node
which should eliminate i2c bus errors and timeouts due to the fact
the bootloader uses the save device tree that no longer properly
assigns these pins.
Signed-off-by: Adam Ford <aford173@gmail.com>
Noncached area at present is being initialized to random space after malloc
area. It works in most the cases as it goes to stack area & stack is not
overwriting it being far from it.
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
When devnum was changed to a local variable in distro_bootcmd we ran
into a problem on TI platforms (confirmed on Beaglebone) as we had been
using 'setenv devnum' there as well and it needs to match the other
usage.
Fixes: 13dd6665ed ("distro: not taint environment variables if possible")
[trini: Review other platforms, re-word commit message]
Signed-off-by: Tom Rini <trini@konsulko.com>
When 'make qemu-riscv64_defconfig', there is a build warning:
board/emulation/qemu-riscv/Kconfig:24:
warning: config symbol defined without type
Fix it by specifying the config symbol type to 'hex'.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
The available defconfigs for RISC-V QEMU have changed. We now have
configurations to compile U-Boot to run in supervisor mode and for
U-Boot SPL. Update the QEMU RISC-V documentation to reflect these
changes.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Add two new configurations (qemu-riscv{32,64}_spl_defconfig) with SPL
enabled for RISC-V QEMU. QEMU does not require SPL to run U-Boot. The
configurations are meant to help the development of SPL on RISC-V.
The configurations enable RAM as the only SPL boot device. Images must
be loaded at address 0x80200000. In the default boot flow, U-Boot SPL
starts in machine mode, loads the OpenSBI FW_DYNAMIC firmware and U-Boot
proper from the supplied FIT image, and starts OpenSBI. U-Boot proper is
then started in supervisor mode by OpenSBI.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Now that we have a generic FIT generator script for RISC-V, set it as
the default. To also build the FIT image by default, set the default
build target to "u-boot.itb" if CONFIG_SPL_LOAD_FIT is enabled.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Add a generic FIT generator script for RISC-V to generate images
containing U-Boot, OpenSBI FW_DYNAMIC firmware, and optionally one or
more device trees. The location of the OpenSBI firmware binary can be
specified with the OPENSBI environment variable. By default, it is
assumed to be "fw_dynamic.bin", located in the U-Boot top-level. Device
trees are passed as arguments to the generator script. A separate
configuration entry is created for each device tree.
The load addresses of U-Boot and OpenSBI are parsed from the U-Boot
configuration. They can be overwritten with the UBOOT_LOAD_ADDR and
OPENSBI_LOAD_ADDR environment variables.
The script is based on the i.MX (arch/arm/mach-imx/mkimage_fit_atf.sh)
and Allwinner sunxi (board/sunxi/mksunxi_fit_atf.sh) FIT generator
scripts.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
To support relocation of the stack and global data on RISC-V, the
secondary harts must be notified of the change using IPIs. We can reuse
the hart relocation code for this purpose. It uses global data to store
the new stack pointer and global data pointer for the secondary harts.
This means that we cannot update the global data pointer of the main
hart in spl_relocate_stack_gd(), because the secondary harts have not
yet been relocated at this point. It is updated after the secondary
harts have been notified.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
U-Boot SPL on the generic RISC-V CPU supports two boot flows, directly
jumping to the image and via OpenSBI firmware. In the first case, both
U-Boot SPL and proper must be compiled to run in the same privilege
mode. Using OpenSBI firmware, U-Boot SPL must be compiled for machine
mode and U-Boot proper for supervisor mode.
To be able to use SPL, boards have to provide a supported SPL boot
device.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
RISC-V OpenSBI is an open-source implementation of the RISC-V Supervisor
Binary Interface (SBI) specification. It is required by Linux and U-Boot
running in supervisor mode. This patch adds support for booting via the
OpenSBI FW_DYNAMIC firmware. It supports OpenSBI version 0.4 and higher.
In this configuration, U-Boot SPL starts in machine mode. After loading
OpenSBI and U-Boot proper, it will start OpenSBI. All necessary
parameters are generated by U-Boot SPL and are passed to OpenSBI. U-Boot
proper is started in supervisor mode by OpenSBI. Support for OpenSBI is
enabled with CONFIG_SPL_OPENSBI. An additional configuration entry,
CONFIG_SPL_OPENSBI_LOAD_ADDR, is used to specify the load address of the
OpenSBI firmware binary. It is not used directly in U-Boot and instead
is intended to make the value available to scripts such as FIT
configuration generators.
The header file include/opensbi.h is based on header files from the
OpenSBI project. They are recent, as of commit bae54f764570 ("firmware:
Add fw_dynamic firmware").
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
U-Boot SPL can be run in a different privilege mode from U-Boot proper.
Add new configuration entries for SPL to allow the run mode to be
configured independently of U-Boot proper.
Extend all uses of the CONFIG_RISCV_SMODE and CONFIG_RISCV_MMODE
configuration symbols to also cover the SPL equivalents. Ensure that
files compatible with only one privilege mode are not included in builds
targeting an incompatible privilege mode.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
As part of the SPL FIT boot flow, the device tree is appended to U-Boot
proper. The device tree is used to record information on the loadables
to make them available to the SPL framework and U-Boot proper. Depending
on the U-Boot device tree provider, the FIT image might not include a
device tree. Information on the loadables is missing in this case.
When booting via firmware bundled with the FIT image, U-Boot SPL loads
the firmware binary and U-Boot proper before starting the firmware. The
firmware, in turn, is responsible for starting U-Boot proper.
Information on the memory location of the U-Boot proper loadable must be
available to the SPL framework so that it can be passed to the firmware
binary. To support this use case when no device tree is found in the FIT
image, fall back to the U-Boot device tree in this situation.
At the same time, update the comment to remove the note that the
destination address must be aligned to ARCH_DMA_MINALIGN. Alignment is
only required as an intermediate step when reading external data. This
is automatically handled by spl_fit_append_fdt(). After reading the
external data, it is copied to the specified address, which does not
have to be aligned to ARCH_DMA_MINALIGN.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
When building a U-Boot FIT image, the device trees specified by the
board are unconditionally built for inclusion in the FIT image. However,
not all device tree providers, such as CONFIG_OF_PRIOR_STAGE, require a
device tree to be built and bundled with the U-Boot binary. They rely on
other mechanisms to provide the device tree to U-Boot. Compilation on
boards with these device tree providers fails, because they do not
specify a device tree.
Change the makefile rules to conditionally build the device trees if
CONFIG_OF_SEPARATE, CONFIG_OF_EMBED, or CONFIG_OF_HOSTFILE is selected
as device tree provider.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
The current preprocessor logic prevents CONFIG_OF_PRIOR_STAGE from being
used in U-Boot SPL. Change the logic to also make it available in U-Boot
SPL.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
This converts the following to Kconfig:
CONFIG_SYS_SPI_U_BOOT_OFFS
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
[trini: Expose this for SPL_SPI_SUNXI for now]
Signed-off-by: Tom Rini <trini@konsulko.com>
Exact two boards are referencing CONFIG_SYS_SPI_U_BOOT_OFFS to another
define, we replace this manually with the value for having a clean run
of moveconfig.py afterwards.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
some boards have common headers for several individual build-targets
where CONFIG_SYS_SPI_U_BOOT_OFFS is defined even it is not needed (only
needed if CONFIG_SPL_SPI_LOAD is defined also). Take this define here
under '#ifdef CONFIG_SPL_SPI_LOAD' for having a clean run of
moveconfig.py
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Some boards have coded this offset with formula or bitshifts in their
board-config. Manually convert these things into hex-values to be able
using moveconfig.py afterwards.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Convert CONFIG_SYS_NAND_USE_FLASH_BBT to Kconfig, update defconfigs,
headers and whitelist.
Please note that this symbol already was used in Kconfig
(imply in CONFIG_NAND_ATMEL) which did not work, since this symbol was
not available in Kconfig. This changes now with this patch and all
boards with CONFIG_NAND_ATMEL will have BBT enabled. Which is what
I also need on my GARDENA AT91SAM based board.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Cc: Gregory CLEMENT <gregory.clement@bootlin.com>
[trini: Rework such that the configs are unchanged to start with]
Signed-off-by: Tom Rini <trini@konsulko.com>
- remove rk3288 fennec board
- remove SPL raw image support for Rockchip SoCs
- add common misc_init_r() for ethaddr from cpuid
- enable USB HOST support for rk3328
- unify code for finding a valid gpt in part driver
This converts the following to Kconfig:
CONFIG_FSL_USDHC
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Add IMX8M, TARGET_S32V234EVB to FSL_USDHC list]
Signed-off-by: Tom Rini <trini@konsulko.com>
Several options are presenting themselves on a various boards
where the options are clearly not used. (ie, arm64 options on
arm9, or SPL/TPL options when SPL or TPL are not defined)
This patch is not attempting to be a complete list of items, but
more like low hanging fruit.
This patch attempts to reduce some of the menuconfig noise
by defining dependencies so they don't appear when not used.
Signed-off-by: Adam Ford <aford173@gmail.com>
Some ChromeOS devices (atleast veyron speedy) have the first 8MiB of
the eMMC write protected and equipped with a dummy 'IGNOREME' GPT
header - instead of spewing error messages about it, just silently
try the backup GPT.
Note: this does not touch the gpt cmd writing/verifying functions,
those will still complain.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Generate a MAC address based on the cpuid available in the efuse
block: Use the first 6 byte of the cpuid's SHA256 hash and set the
locally administered bits. Also ensure that the multicast bit is
cleared.
The MAC address is only generated and set if there is no ethaddr
present in the saved environment.
This is based off of Klaus Goger's work in 8adc9d
Signed-off-by: Rohan Garg <rohan.garg@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
According to rock64 schemetic, both VCC_HOST1_5V and VCC_HOST_5V are
controlled by USB20_HOST_DRV(GPIO0A2), fix it so that we can get correct
power supply for USB HOST ports.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We need to store all the ram related cap/map info back to register
for each channel after all the init has been done in case some of register
was reset during the process.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Enable USB host support on GR Peach board.
To use USB host on GR Peach, it might be necessary to solder JP3 header
onto the board first and then short it. Shorting JP3 is mandatory to let
the U5 regulator to supply VBUS to the CN3 USB port.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Add DM regulator support for toggling VBUS, this is useful on boards
which control the VBUS e.g. through GPIO.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Convert the R8A66597 USB driver to DM and add support for DT probing.
Drop support for legacy non-DM and non-DT probing, since there are no
platform using that.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
While the USB controller can work both in LE and BE modes, there is
no user for the BE mode, so drop it. If there ever is a user for it,
it can be easily re-added back.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Replace in{bwl}()/out{bwl}() IO accessors with read{bwl}()/write{bwl}(),
to make the driver compile both on SH and ARM.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
No other platforms use this r8a66597 controller but RZ/A1,
make RZ/A1 support the default and drop all the other SoC
support to remove ifdeffery.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Chris Brandt <chris.brandt@renesas.com>
Add ICID setup for the platform devices contained on this chip: usb,
sata, sdhc, sec. The ICID macros for SEC needed to be adapted because
the format of the registers is different.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
The current implementation assumes that the registers holding the ICIDs
are universally big endian. That's no longer the case on newer
platforms so update the code to take into account the endianness of
each register.
Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Horia Geantă <horia.geanta@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
By default, i2c input clock is platform clk / 2, but some of the
platform of i2c clock divider does not meet this kind of circumstance,
so alone to set default values for these platforms.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
BRDCFG4[USBOSC] and BRDCFG5[SPR] register field of Qixis device is used
to control SPI and other IP signal routing.
USBOSC:
0= SPI_CLK used as external USB REFCLK input driven with 24.000 MHz.
SPI devices are unusable in this mode.
1= SPI_CLK used as SPI clock.
SPI devices are usable in this mode. USB block is clocked from
internal sources
SPR[3:2]:
SPI_CS / SDHC_DAT4:7 Routing (schematic net CFG_SPI_ROUTE[3:2]):
00= SDHC/eMMC 8-bit
01= SD Card Rev 2.0/3.0
10= SPI on-board memory
11= TDM Riser / SPI off-board connector.
The default value is 00 if an SDCard/eMMC card is selected as the boot
device.
SPR[1:0]:
SPI_SIN/SOUT/SCK Routing (schematic net CFG_SPI_ROUTE[1:0]):
00= SDHC Sync loop
01= TDM Riser / SPI off-board connector.
10= SPI on-board memory.
11= SPI off-board connector.
By default, the SPI feature is not available, so we need to configure
the above register fields to select the route to the SPI feature.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Defines CONFIG_ENV_ADDR for QSPI Boot which specifies the start
address of the flash sector containing the environment. It fixes
the issue that bootcmd is always set as default at bootup.
Signed-off-by: Alison Wang <alison.wang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Flexcan in LX2160ARDB is controlled by FPGA register boardcfg4
bit 5. enable this bit so that flexcan is enabled in LX2160ARDB.
Signed-off-by: Pankaj Bansal <pankaj.bansal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Enable related configs on all ls1088aqds boards to support pcf2127
rtc DM function.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add the pcf2127-rtc node under the i2c0->i2c-mux@77->i2c@3 for ls1088aqds boards.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
This patch adds some slave nodes to support the i2c dm on the device
side under the i2c0 controller.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
One ls1088a, there are four I2C controllers. So add all I2C node
for ls1088a in device tree.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls1088a.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM
I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch
solves the problem that the i2c-related api of the ls1088a platform
does not support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Enable related configs on all ls2088aqds boards to support ds3231
rtc DM function.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add the ds3232-rtc node under the i2c0->i2c-mux@77->i2c@0 for ls2088aqds
boards.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add an implementation of the rtc_enable_32khz_output() that uses the
driver model i2c APIs.
Also put code related to rtc_enable_32khz_output
under CONFIG_RTC_ENABLE_32KHZ_OUTPUT.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add some slave nodes to support the i2c dm on the device side under the i2c0.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
One ls2088a, there are four I2C controllers. So add I2C nodes in dts
for ls2088a.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls2080a.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM
I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch
solves the problem that the i2c-related api of the ls2088a platform
does not support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Since i2c uses dm mode, i2c controller will be initialized when reading
and writing devices on i2c bus. So there is no need for the original
non-dm mode i2c early initialization function call, this patch removed
the definition of CONFIG_SYS_I2C_EARLY_INIT.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls1028a.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM
I2C API when DM_I2C is used.When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch
solves the problem that the i2c-related api of the ls1028a platform
does not support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Enable related configs on all lx2160ardb boards to support pcf2127
rtc DM feature.
Also remove SYS_I2C_MXC_I2Cx, where x is from 1 to 8 from
Kconfig.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Add the pcf2127-rtc node under the i2c0->i2c-mux@77->i2c@3 in dts for
lx2160aqds boards.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Lx2160ardb need to use i2c0 before relocation, so we also need to set
u-boot, dm-pre-reloc to initialize node before relocation.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
In lx2160a soc, there are eight i2c controllers, this patch adds i2c
nodes for lx2160a, and the gpio2 nodes on which the i2c4 controller
depends.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
As no gpio.h is defined for this architecture, to avoid
compilation failure, do not include <asm/arch/gpio.h> for
arch ls2160a.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
I2C dm mode enablemenet causes below compilation errors:
In file included from include/config.h:8:0,
from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
# error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
^~~~~
In file included from include/config.h:8:0,
from include/common.h:20:
include/config_fallbacks.h:51:4: error: #error "Cannot define
CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
# error "Cannot define CONFIG_SYS_I2C when CONFIG_DM_I2C is used"
^~~~~
board/freescale/lx2160a/lx2160a.c: In function 'board_early_init_f':
board/freescale/lx2160a/lx2160a.c:108:2: warning: implicit declaration
of function 'i2c_early_init_f'; did you mean 'arch_early_init_r'?
[-Wimplicit-function-declaration]
i2c_early_init_f();
^~~~~~~~~~~~~~~~
arch_early_init_r
drivers/i2c/mxc_i2c.c: In function 'mxc_i2c_probe':
drivers/i2c/mxc_i2c.c:824:8: warning: implicit declaration of function
'enable_i2c_clk';
did you mean 'enable_irq_wake'? [-Wimplicit-function-declaration]
ret = enable_i2c_clk(1, bus->seq);
^~~~~~~~~~~~~~
enable_irq_wake
So fix these compilation errors.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
DM_I2C_COMPAT is a compatibility layer that allows using the non-DM I2C
API when DM_I2C is used. When DM_I2C_COMPAT is not enabled for
compilation, a compilation error will be generated. This patch solves
the problem that the i2c-related api of the lx2160a platform does not
support dm.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Move CONFIG_FSL_QSPI from header file to defconfigs,
consequently unset imply config(CONFIG_SPI_FLASH_BAR) which
is not valid for LS series.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Select BOARD_LATE_INIT for ls1028ardb and ls1028aqds targets
so that late init work can be done.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
This driver needs modification to work with new soc,
like ls1028, since bitmap of RCFG is changed to
RESV[7:5] LIVE[4] WDEN[3] RESV[2:1] GO[0]
000 1 0 00 0
Also the RCW location is moved to only dutcfg0.
RESV[7:4] RCWSRC[3:0]
1111 configurable
Following commands are functional now
qixis_reset
qixis_reset sd
qixis_reset qspi
qixis_reset emmc
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
MC firmware need to be aligned to 512M, so minimum 512MB DDR is reserved.
But MC support to work with 128MB or 256MB DDR memory also, in this
case, rest of the memory is not usable.
So reporting this extra memory to Linux through dtb memory fixup.
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Since we added clk enable_count and prograte clk child enabling
operation to clk parent, so add a new function sandbox_clk_enable_count
to get enable_count for test usage.
And add test code to get the enable_count after we enable/disable
the device clk.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
On i.MX8MM, thinking such as clk path
OSC->PLL->PLL GATE->CCM ROOT->CCGR GATE->Device
Only enabling CCGR GATE is not enough, we also need to enable PLL GATE
to make sure the clk path work. So when enabling CCGR GATE,
we could prograte to enabling PLL GATE to make life easier.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
As what Linux Kernel 5.3.0 provides when enable/disable clk,
there is an enable_count in clk_core_disable/enable. Introduce
enable_count to track the clk enable/disable count when
clk_enable/disable for CCF. And Initialize enable_count to 0 when
register the clk.
And clk tree dump with enable_count will be supported, it will
be easy for us to check the clk status with enable_count
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Based on discussion with Stephen Warren there was recommendation to list
both memory and random command dependencies just in case that dependency is
not properly handled by Kconfig.
Fixes: a09c1f7e1c ("test/py: Fix MMC/SD block write test dependency")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Building easylogo with `HOST_TOOLS_ALL=y make tools` results in a build
warning due to a possible buffer overrun:
tools/easylogo/easylogo.c:453:4: note: ‘sprintf’ output between 7 and
262 bytes into a destination of size 256
sprintf (str, "%s, 0x%02x", app, *dataptr++);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Truncate the output to fit into the destination buffer.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Looking at the contents of file .mailmap it seems that some editors assumed
that translation is done by entering multiple lines into the file and the
last one replaces the others. This is not how it works. The translation
occurs according to entries in single lines as described in the
git-check-mailmap man-page.
Add a description of the file format.
Add an entry for Alexander Graf as his old email address is not valid
anymore.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The earlier commit....
commit a5a5d997b4 ("spl: Allow performing BSS init early before board_init_f()")
...introduced the ability to use BSS from SPL's board_init_f() as it may
be required in certain exceptional use cases so go ahead and update the
README to reflect this change. Note that as highlighted with the changes
the use of the associated CONFIG option is generally not recommended.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Based on discussion with Stephen Warren there was recommendation to list
both memory and random command dependencies just in case that dependency is
not properly handled by Kconfig.
Fixes: a09c1f7e1c ("test/py: Fix MMC/SD block write test dependency")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Building easylogo with `HOST_TOOLS_ALL=y make tools` results in a build
warning due to a possible buffer overrun:
tools/easylogo/easylogo.c:453:4: note: ‘sprintf’ output between 7 and
262 bytes into a destination of size 256
sprintf (str, "%s, 0x%02x", app, *dataptr++);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Truncate the output to fit into the destination buffer.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Looking at the contents of file .mailmap it seems that some editors assumed
that translation is done by entering multiple lines into the file and the
last one replaces the others. This is not how it works. The translation
occurs according to entries in single lines as described in the
git-check-mailmap man-page.
Add a description of the file format.
Add an entry for Alexander Graf as his old email address is not valid
anymore.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The earlier commit....
commit a5a5d997b4 ("spl: Allow performing BSS init early before board_init_f()")
...introduced the ability to use BSS from SPL's board_init_f() as it may
be required in certain exceptional use cases so go ahead and update the
README to reflect this change. Note that as highlighted with the changes
the use of the associated CONFIG option is generally not recommended.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
With DM_MMC enabled, enable CONFIG_BLK to remove this
compile warning for am43xx based targets:
===================== WARNING ======================
This board does not use CONFIG_DM_MMC. Please update
the board to use CONFIG_DM_MMC before the v2019.04 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
Targets were compile tested, build was clean.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
TI HS platforms generate *dtb_HS binary blobs and there is no
rule for cleanup. Added entry for cleanup in clean-files target.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
The commit 1b42ab3eda ("ARM: DRA7: Fixup DSPEVE, IVA and GPU clock
frequencies based on OPP") updates the kernel device-tree blob to adjust
the DSP, IVA and GPU DPLL clocks based on a one-time OPP choice selected
in U-Boot. All these DPLL clocks are children of the cm_core_aon clocks
DT node.
The hierarchy of this clocks DT node has changed in newer Linux kernels
starting from v5.0, and this results in a failure in ft_fixup_clocks()
function to update the clock rates on these newer kernels. Fix this by
updating the lookup logic to look through both the newer and older
DT hierarchy paths for the cm_core_aon clocks node.
Signed-off-by: Suman Anna <s-anna@ti.com>
The Kconfig file calls to ti/common/Kconfig twice which makes
several of the menu items repeat themselves. In an effort to
clean this up, this patch removes the second call which eliminates
the duplicate menu items.
Signed-off-by: Adam Ford <aford173@gmail.com>
Now that SPL supports DM_SERIAL and the direct NOR boot supports
DM_SERIAL, the check to see if DM_SERIAL is defined can go away,
because all da850evm variants now support DM_SERIAL. This patch
simply removes some dead precompiler defines.
Signed-off-by: Adam Ford <aford173@gmail.com>
With SPL now supporting DM_SPI, the need for compiler directives
and hard-coded addresses is obsolete. This patch removes some
dead legacy code defining the SPI base address
Signed-off-by: Adam Ford <aford173@gmail.com>
Sorry for the noise, but there appears to be a regression with older
hardware. Since it broke the direct_nor boot option, it should be
reverted until a better solution is available.
This reverts commit 51cd1e2373.
Like we did with 'fit_loadaddr' to 'addr_fit', the variable
'fit_bootfile' contains a name and so should be prefixed with
name_. Make this change here.
Signed-off-by: Andrew F. Davis <afd@ti.com>
This is the first part of a larger effort I would like to propose to
unify and simplify the default set of environment variables.
When many early environment variables were named there were fewer images
being loaded, usually just a kernel. At this time names like 'loadaddr'
would suffice. Now we have more images and many more commands that act on
them, often re-using the same variable for several different uses. The
contents of a variable are also not immediately known causing one to have
to look up a chain of variables to understand what a command is actually
doing. I suggest the following.
To start, all variables containing names should be prefixed with name_
and addresses with addr_. This is like how K2 already does things and
allows for simple universal commands like:
get_fdt_nfs=nfs ${addr_fdt} /boot/${name_fdt}
Which is very clear on what is intended here and would work across all
board that using the this naming convention.
We can do this one variable at a time, start here with addr_fit.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Acked-by: Andreas Dannenberg <dannenberg@ti.com>
The variable 'name_overlays' serves the same purpose. Remove
'overlay_files' and use 'name_overlays' everywhere.
Signed-off-by: Andrew F. Davis <afd@ti.com>
The full path has changed in the recent kernels so that it is
not possible to load them. Aliases "ethernet0" and "ethernet1"
are still present in both legacy and new kernels.
Also, fix error messages to correspond to the taken actions.
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
- Add ROC-RK3399-PC board support
- Move CONFIG_SPI_FLASH_GIGADEVICE and CONFIG_CMD_USB_MASS_STORAGE to
Kconfig
- using SYSRESET_POWER_OFF for poweroff
(Note that patch for rk8xx pmic is droped for it can not pass Travis
build)
- fix ofnode_get_name() assert
This is a generic implementation. Add CONFIG_SYSRESET_CMD_POWEROFF
to signal when we need it. Enable it from the STPMIC1 config and in
sandbox.
The config flag is transitionary, that is it can be removed after all
poweroff implementations use sysreset, and just have CMD_POWEROFF depend
on sysreset.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
It seems that SYSRESET_POWER_OFF was added recently, and all previous code
used SYSRESET_POWER for poweroff. SYSRESET_POWER is supposed to be a
PMIC-level power cycle, not a poweroff.
(Comment by Simon Glass)
SYSRESET_POWER means to do a power reset (removing and reinstating all power)
SYSRESET_POWER_OFF means to turn the device off and leave it off
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
(Update comment to help understand the patch)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Updates jerry, mickey, minnie and speedy defconfigs to:
- fit the SPL in 32k
- boot from SPI (only)
- remove gadget support (these have no OTG port)
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Rebase on top of tree)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This affects RK3036, RK322X and RK3288 - the defconfig changes done by
moveconfig.py for the veyrons were left out on purpose because they dont
have an OTG port, and will get their config updated in the next commit.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
In some case with LIVE DT, some node always not valid, or not have
a valid name, eg. blk driver add by mmc.
Return fail instead of Assert for this kind of ofnode, and this
help with assert happen from time to time when of_live is enabled
and DEBUG is enabled.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
With the removal of the x86 specific GD flags, there are no arch-
specific GD flags any more. Let's remove the comment about reserving the
upper 16 bits for arch-specific flags in the common header. This gives
us more flexibility with the usage of the GD flags.
As a matter of fact, we are already using more than 16 bits for common
GD flags (with the addition of GD_FLG_WDT_READY).
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch removes the x86 architecture specific GD flags
(GD_FLG_COLD_BOOT & GD_FLG_WARM_BOOT), as they are not used. Only
GD_FLG_COLD_BOOT is referenced in coreboot.c but assigned in start16.S.
But the coreboot target does not use start16.S at all and boots directly
from the 32-bit start code.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Rename some camel-case variables to match U-Boot style.
Camel case is not generally allowed in U-Boot. Rename this variable to fit
in with the style.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Sometimes an image has multiple CBFS. The current CBFS API is limited to
handling only one at time. Also it keeps track of the CBFS internally in
BSS, which does not work before relocation, for example.
Add a few new functions to overcome these limitations.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Move the result variable into the struct also, so that it can be used when
BSS is not available. Add a function to read it.
Note that all functions sill use the BSS version of the data.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
At present there are a number of static variables in BSS. This cannot work
with SPL, at least until BSS is available in board_init_r().
Move the variables into a struct, so it is possible to malloc() it and use
it before BSS is available.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
At present this file has a function at the top, above declarations. This
is normally avoided, so fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Add a new Kconfig option to enable CBFS in SPL. This can be useful when
the memory-init code is in CBFS.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Avoid a warning when building the 'make htmldocs' target:
doc/board/intel/slimbootloader.rst:90: WARNING: Title underline too short.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Use DISTRO_BOOTENV to decouple BOOTENV from CONFIG_DISTRO_DEFAULTS.
Reported-by: Heinrich Schuchardt <xypron.debian@gmx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Pull request for UEFI sub-system for v2019.10-rc3
This pull request provides corrections for the SetVirtualAddress runtime
service and avoids possible calls to NULL by consumers of the
EFI_PXE_BASE_CODE_PROTOCOL.
Commit 7f95104d91 ("efi_loader: detach runtime in ExitBootServices()")
added a call to efi_runtime_detach() to ExitBootServices() but did not
remove the call in SetVirtualAddressMap().
Remove the superfluous function call.
Correct a comment referring to efi_runtime_detach().
Fixes: 7f95104d91 ("efi_loader: detach runtime in ExitBootServices()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Check the parameters DescriptorSize and DescriptiorVersion of
SetVirtualAddressMap() as prescribed by the UEFI specification.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
U-Boot implements the EFI_PXE_BASE_CODE_PROTOCOL because GRUB uses the mode
information for booting via PXE. All function pointers in the protocol were
NULL up to now which will cause immediate crashes when the services of the
protocol are called.
Create function stubs for all services of the protocol returning
EFI_UNSUPPORTED.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The socfpga gen5 SPL manually zeroed bss in board_init_f(). Now that the
DDR driver does not use bss any more, bss is not used before board_init_r()
and we can remove this hack.
bss is normally zeroed by crt0.S, but after board_init_f(), before
board_init_r(). socfpga just had this double-zeroing because it invalidly
used bss in board_init_f() already (during DDR initialization).
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Bring cyclone5 / arria5 / arria10 in line with convention and use
u-boot.img as CONFIG_SPL_FS_LOAD_PAYLOAD_NAME.
Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
All ELF fields whose values are inspected by the code are converted to
CPU byteorder first. Values which are copied verbatim (relocation
fixups) are not swapped to CPU byteorder and back as it is not needed.
Signed-off-by: Marcus Comstedt <marcus@mc.pp.se>
Cc: Rick Chen <rick@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
We should explicitly load DTB from TFTP server or MMC/SD card
for Linux booting. This will allow us:
1. To use different Linux DTB for SiFive Unleashed board with
expansion board connected.
2. Avoid re-flashing OpenSBI firmware whenever board connections
change.
This patch updates reference bootlog in SiFive FU540 README
as-per above.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
We should prefer accessing CSRs using their CSR numbers
because:
1. It compiles fine with older toolchains.
2. We can use latest CSR names in #define macro names of CSR
numbers as-per RISC-V spec.
3. We can access newly added CSRs even if toolchain does not
recognize newly added CSRs by name.
This commit is inspired from Linux kernel commit a3182c91ef4e
("RISC-V: Access CSRs using CSR numbers").
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
We do not need to split binman, buildman, dtoc and patman test suite
runs into 3 jobs. Instead, run them as a single job.
Signed-off-by: Tom Rini <trini@konsulko.com>
The way that some of the tests here are designed, they expect USER to be
set in the environment. This is not the case in the docker images, so
set a reasonable value.
Signed-off-by: Tom Rini <trini@konsulko.com>
A previous commit...
commit 2a51e16bd5 ("configs: Make USE_TINY_PRINTF depend on SPL||TPL and be default")
...causes the System Firmware version string during SPL boot to no longer
getting printed to the console as expected. To fix this issue rework the
handling of that string to only use basic printf() syntax rather than
for example disabling CONFIG_USE_TINY_PRINTF on affected devices, this
way maintaining most of the memory size benefit the initial patch brings
when it comes to SPL.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Do not fail if any of the requested subtypes are not available, but set the
number of resources to 0 and continue parsing the resource ranges.
Based on Linux kernel patch by Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Historically there have been various boot options, SPI flash,
NAND or NOR. The NOR flash is mutually exclusive with MMC, but
it isn't mutually exclusive with NAND or SPI Flash, so this patch
enables both NAND flash and SPI Flash when booting from NOR.
Signed-off-by: Adam Ford <aford173@gmail.com>
The configuration with NOR is mutually exclusive with MMC, and as
such, the filesystem commands were disabled. With the USB host
enabled, this patch enables the file system command which can
be executed on storage devices attached to the USB.
Signed-off-by: Adam Ford <aford173@gmail.com>
The current size allocated to U-Boot is 384k, but U-Boot has grown
to 436K which means that saving the environmental variables wipes
out part of the U-Boot source and the board ceases to function.
Due to the sector and erase size for the NOR part and a desire to
not have to change partition sizes often, this patch moves the
U-Boot environmental variables to an offset of 1M so saveenv
does not brick the board. This patch also sets up MTDIDS and
MTDPARTS to clearly show where U-Boot and U-Boot's environmental
variables are located.
Signed-off-by: Adam Ford <aford173@gmail.com>
A previous patch for enabling the NAND config set a flag called
CONFIG_SKIP_LOWLEVEL_INIT when it should have been called
CONFIG_SKIP_LOWLEVEL_INIT_ONLY. The affect this had was creating
a delay on startup for the NOR version which is XIP and doesn't have
SPL, so the lowlevel initialization functions need to operate.
This delay was not really noticeable at first, but the delays have been
getting longer, finally reached the point of nearly seven seconds
before the board would appear to start.
This patch sets the CONFIG_SKIP_LOWLEVEL_INIT_ONLY instead which means
"The normal CP15 init (such as enabling the instruction cache) is still
performed" per the README. It doesn't appear to have any adverse
behavior on the SPI Flash or the NAND flash boards which use SPL.
Fixes: 93f3362762 ("ARM: configs: Add da850evm_nand to boot from NAND")
Signed-off-by: Adam Ford <aford173@gmail.com>
Enable support for Intel E1000 based PCIe ethernet cards that
can be used to test PCIe RC functionality on AM65x EVM.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add needed device-tree nodes to support PCIe 0
and SERDES on AM65x SoC. The nodes are kept
disabled by default.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add a new SERDES driver for TI's AM654x SoC which configures
the SERDES only for PCIe. Support fo USB3 can be added later.
SERDES in am654x has three input clocks (left input, external
reference clock and right input) and two output clocks (left
output and right output) in addition to a PLL mux clock which
the SERDES uses for Clock Multiplier Unit (CMU refclock).
The PLL mux clock can select from one of the three input
clocks. The right output can select between left input and
external reference clock while the left output can select
between the right input and external reference clock.
The driver has support to select PLL mux and left/right output
mux as specified in device tree.
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Current dev_read_*() API lacks support to get address and size
of a "reg" property by name or index. Add support for the same.
Livetree support has been added but not tested on real hardware.
The existing unit tests testing reading address from device-tree
have been updated to test address as well as size.
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Add support for clk_is_match() which is required to
know if two clock pointers point to the same exact
physical clock.
Also add a unit test for the new API.
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Failure log for ti_sci_power_domain_on/off is as below:
"ti_sci_power_domain_on: get/set_device failed (-19)"
The above information is useless for debug without information
on what specific device access failed. So add that information as well.
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
This commit adds support for the B&R brsmarc1 SoM.
The SoM is based on TI's AM335x SoC.
Mainly vxWorks 6.9.4.x is running on the board,
doing some PLC stuff on various carrier boards.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
This patch disables DM watchdog support for SPL builds and uses
the legacy omap watchdog driver on TI AM335x chipsets.
The following build error is reported if DM watchdog support was
enabled in SPL:
CC spl/drivers/usb/gadget/rndis.o
LD spl/drivers/usb/gadget/built-in.o
LD spl/drivers/usb/musb-new/built-in.o
LD spl/drivers/built-in.o
LD spl/u-boot-spl
arm-linux-ld.bfd: u-boot-spl section .u_boot_list will not fit in region .sram
arm-linux-ld.bfd: region .sram overflowed by 440 bytes
make[1]: *** [spl/u-boot-spl] Error 1
make: *** [spl/u-boot-spl] Error 2
Adjusted WATCHDOG_RESET macro accordingly. Earlier it was pointing
to hw_watchdog_reset. Since CONFIG_WATCHDOG replaces CONFIG_HW_WATCHDOG,
now WATCHDOG_RESET macro points to watchdog_reset. This watchdog_reset
is not defined anywhere for am33xx/omap2 and needs to be defined. Fixed
this by simply calling hw_watchdog_reset in watchdog_reset.
Built and tested on AM335x device (BeagleboneBlack), compile tested for
all other AM33xx/omap2 based boards.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
[trini: Fix watchdog.h logic]
Signed-off-by: Tom Rini <trini@konsulko.com>
The non-DM version of this driver used to set BAR0 register after the
calls to pci_set_region.
I found out that for some strange reason the ath10k driver in kernel
fails to work if this is done the other way around.
I know that Linux's driver should not depend on how U-Boot does things,
but for some strange reason it does and this seems to be the simplest
solution. Fix it since it caused regressions on Omnia.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Cc: Stefan Roese <sr@denx.de>
Cc: Dirk Eibach <dirk.eibach@gdsys.cc>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: Phil Sutter <phil@nwl.cc>
Cc: VlaoMao <vlaomao@gmail.com>
Tested-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This patch adds device tree and driver model watchdog support,
converts the legacy omap watchdog driver to driver model for
TI AM335x chipsets. The following compile warning is removed:
===================== WARNING ======================
This board does not use CONFIG_WDT (DM watchdog support).
Please update the board to use CONFIG_WDT before the
v2019.10 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
CONFIG_HW_WATCHDOG is no more a default option for AM33XX devices
after DT/DM conversion, adjusted kconfig accordingly.
DM watchdog support is enabled by default in SPL. The SPL image
doesn't fit into SRAM because of size constraints and build breaks
with an overflow. For this reason DM watchdog support should be
disabled in SPL, driver code should be adjusted accordingly to serve
this purpose.
Built and tested on AM335x device (BeagleboneBlack), compile tested
for all other AM33xx based boards.
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
The SPL for the Overo board does not initialise the MMC. Hence, it
cannot load the main boot loader from the SD card susequently. This
patch moves the initialisation code for the MMC so it gets included in
the SPL.
[trini: Add missing header]
Signed-off-by: Tom Rini <trini@konsulko.com>
Disable the PSCI_RESET reboot handler to permit handling the reboot
flag and calling the PSCI handler with the flag in parameter.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add support for fastboot_set_reboot_flag() by storing the reboot
flag in the common code to be used by the custom PSCI reboot handler.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The SEI510 board is based on the Amlogic S905X2 SoC
from the Amlogic G12A SoC family.
The board has the following specifications :
- Amlogic S905X2 ARM Cortex-A53 quad-core SoC
- XGB DDR4 SDRAM
- 10/100 Ethernet (Internal PHY)
- 1 x USB 3.0 Host
- eMMC
- SDcard
- Infrared receiver
- SDIO WiFi Module
The board default behaviour is for booting Android and triggers
fastboot on recovery or reboot mode.
USB vendor ID (used by fastboot) is 0x18d1 (Google) for
default udev rules for existing android users work out of the box.
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Guillaume La Roque <glaroque@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Secure Monitor offers multiple services, like returning the
SoC unique serial number, and can provide the "reboot reason" as
set by the previous booted system.
This extends the Amlogic specific "sm" cmd with a "reboot_reason" subcommand
to print or set a specified environment variable with the reboot reason in
human readable format.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Secure Monitor offers multiple services, like returning the
SoC unique serial number, already used to generate an unique MAC
address.
This adds a new, Amlogic specific, "sm" cmd with a "serial" subcommand
to write the SoC unique serial to memory.
This "cm" command will be extended in further patches.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Import Linux 5.2-rc1 sei510 DT from 5f9e832c1370 ("Linus 5.3-rc1") for the
meson-g12a-sei510 board.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add Macronis SPI flash support - some Omnia routers are shipped with
this SPI flash chip.
Also add the memtest command to defconfig.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The mvgbe driver supports DM_ETH so switch these boards to using it.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This board is unmaintained and can be removed. This also allows us to
remove kmp204x-common.h and integrate it in kmp204x.h.
Signed-off-by: Valentin Longchamp <valentin.longchamp@ch.abb.com>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Remove the PORTL2 board and all its dependencies as it is no longer
supported by the company.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Activate the driver model for the Ethernet interface (RGMII) in the KM
Kirkwood Kconfig file. Additionally, raise the auto negotiation timeout
to eight seconds as more time is required for those boards.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Activate the driver model for the serial interface in the KM Kirkwood
Kconfig file. The associated preprocessor definitions could be removed
from the header file. However, the clock of 200 MHz needs to be declared
in the device tree.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
A typo in the km_kirkwood.h header prevented to undefine the initialization
of the Kirkwood PCIe interface.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
After moving the KM specific configurations to Kconfig, the associated
preprocessor definitions can now be removed in the headers. Moreover, the
whitelist has been adapted correspondingly.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
To execute the conversion away from board specific header files, Kconfig
menus have been implemented for all KM boards and additionally for those
having an ARM architecture.
For the moment, the preprocessor definitions stay in the headers. The
boolean types, however, needed a modification (#define CONFIG_* 1).
The default configuration files of some boards required an update in order
to not change the currently defined values of the configurations.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This file has quite a lot of general definitions and include files. Add a
note about our intent to remove more of this.
The file should ultimately include the configuration and perhaps a very
other very common things used by most U-Boot files.
Signed-off-by: Simon Glass <sjg@chromium.org>
This file contains lots of internal details about the environment. Most
code can include env.h instead, calling the functions there as needed.
Rename this file and add a comment at the top to indicate its internal
nature.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
[trini: Fixup apalis-tk1.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
This header file is now only used by files that access internal
environment features. Drop it from various places where it is not needed.
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
This declaration is only used in three files. Although it relates to
malloc() it is actually only used during malloc() init. It uses CONFIG
options including CONFIG_ENV_ADDR which are defined only in environment.h
so this header must be included anyway, for TOTAL_MALLOC_LEN to be
correct.
Nove it to environment.h to simplify the common file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
There doesn't seem to be any good reason for using __ in the arguments in
this header file. A double underscore is usually reserved for compiler
features.
Drop these and remove the unnecessary 'extern' as well.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Avoid using a typedef here which is unnecessary. Add an 'env_' prefix to
both the enum and its members to make it clear that these are related to
the environment.
Add an ENV prefix to these two flags so that it is clear what they relate
to. Also move them to env.h since they are part of the public API. Use an
enum rather than a #define to tie them together.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an ENV prefix to these two flags so that it is clear what they relate
to. Also move them to env.h since they are part of the public API. Use an
enum rather than a #define to tie them together.
Signed-off-by: Simon Glass <sjg@chromium.org>
This typedef does not need to be defined in the search.h header since it
is only used in one file (hashtable.c). Remove it from the header and
change it to a struct.
Signed-off-by: Simon Glass <sjg@chromium.org>
U-Boot is not supposed to use typedef for structs anymore. Also this name
is the same as the ENTRY() macro used in assembler files, and 'entry'
itself is widely used in U-Boot (>8k matches).
Drop the typedef and rename the struct to env_entry to reduce confusion.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
These definitions are effectively part of the 'public' API of the
environment implementation since they do not require access to any
internal variables. Move them to the env.h header.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This enum is somewhat widely used to determine if the environment is valid
or not. Move it to the common environment header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The name 'environment' is widely used in U-Boot so is not a very useful
name of a variable. Rename it to better indicate its purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Move these functions to the new header file and rename set_default_env()
to env_set_default() so that it has a consistent env_ prefix.
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
This function is not defined or used in U-Boot. Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Move this function to the new header file and rename it so it has an env_
prefix.
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
This function fits better with the network subsystem, so move it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Suggested-by: Joe Hershberger <joe.hershberger@ni.com>
Move env_set_hex() over to the new header file along with env_set_addr()
which uses it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Move envmatch() over to the new header file. Also rename it to env_match()
to better line up with other functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Move this function over to the new header file. Also rename it to have an
env_ prefix like the other functions.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
At present we have environment.h but this file includes all the
environment-related header files as well as internals such as
default_environment.
It seems desirable to have a new header to hold the commonly used
environment functions, so that most files can avoid including all of this
unnecessary stuff.
Create a new env.h header and move one function over to it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
This function relates to lcd.h and is about to become obsolete with the
driver-model conversion. Move it out of common.h
Signed-off-by: Simon Glass <sjg@chromium.org>
As part of the effort to remove things from common.h, create a new header
for the gzip functions. Move the function declarations to it and add
missing documentation.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
1. Add myself as Android A/B and AVB maintainer
2. Add Sam Protsenko as Designated reviewer for A/B
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Add MAINTAINERS entry for HI3660 SoC by adding the arch includes.
While doing so, adding myself as the co-maintainer for HISILICON
SoCs since I'm planning to maintain HI3660 SoC separately and considering
doing improvements to the existing HiSilicon SoC architecture.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This commit adds MMC driver support for HI3660 SoC reusing hi6220_dw_mmc
driver. Since HI3660 operates at different clock rate and uses fifo
mode now, let's introduce the platform data and utilize it for different
SoCs supported by this driver.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This commit adds board support for Hikey960 board from Hisilicon. This
board is one of the Consumer Edition boards of the 96Boards family
powered by Kirin960 SoC.
More information about this board can be found in 96Boards website:
https://www.96boards.org/product/hikey960/
The initial supported/tested devices include:
- Debug serial
- SD
With these support, it's good enough for loading Linux Kernel from SD.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This commit adds devicetree for Hikey960 board. Most of the contents are
copied from Linux kernel with some modifications for u-boot. To be
more precise, SD card's speed related properties are removed due to a
bug in u-boot clock implementation. Hence forcing the SD controller to
work in standard speed.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
This implements a stack usage check in SPL.
Many boards start up SPL to run code + data from one common, rather small
SRAM. To implement a sophisticated SPL binary size limit on such boards,
the stack size (as well as malloc size and global data size) must be
subtracted from this SRAM size.
However, to do that properly, the stack size first needs to be known.
This patch adds a new Kconfig option:
- SPL_SYS_REPORT_STACK_F_USAGE: memset(0xaa) the whole area of the stack
very early and check stack usage based on this constant later before the
stack is switched to DRAM
Initializing the stack and checking it is implemented in weak functions,
in case a board does not use the stack as saved in gd->start_addr_sp.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Should use CONFIG_IS_ENABLED not IS_ENABLED for CLK driver, so it will
check the CONFIG_SPL_CLK when building SPL
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This fix issue when access config from PCIe switch.
The PCIe controller need to send Type 0 config TLP if the targeting bus
matches with the secondary bus number, which is when the TLP is targeting
the immediate device on the link.
The PCIe controller send Type 1 config TLP if the targeting bus is
larger than the secondary bus, which is when the TLP is targeting the
device not immediate on the link.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Hardware return completion status non-zero when read from non exist
function in multi-function PCIe device. Return error will cause PCIe
enumeration fail.
Change it to return 0 and return value 0xffffffff when error.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
giedi and deneb are i.MX8X based and have additional data with
WLAN MAC in factoryset container. Enable building for these
boards and adapt factoryset functions to set WLAN MAC and dtb
name in environment.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
For new boards we always enable DM_I2C. Extend factoryset functions
to support EEPROM reading on these boards.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
- Enable SD slot on Intel Edison
- Populate CSRT ACPI table for shared DMA controller on Intel Tangier
- Convert Intel ICH-SPI driver to use new spi-mem ops
- Enable config_distro_bootcmd for QEMU x86
- Support U-Boot as a payload for Intel Slim Bootloader
- Avoid writing temporary asl files into the source tree which fixes the
parallel build issue occasionally seen
Support the V1.2 hardware revision with the following pin muxing
changes:
Ddc_scl_pv4 and ddc_sda_pv5 previously used as Apalis GPIO3 and GPIO4
are now used as DDC pins.
Gen2_i2c_scl_pt5 and gen2_i2c_sda_pt6 previously used as DDC pins are
now used as USB power enable signals.
Usb_vbus_en0_pn4 and usb_vbus_en1_pn5 previously used as USB power
enable signals are now used as GPIO3 and GPIO4.
Additionally a new device tree file tegra124-apalis-v1.2-eval.dtb is
loaded on V1.2 and later modules and resp. USB power enable signals
activated.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Remove video=tegrafb0:640x480-16@60 aka VESA VGA mode from vidargs in
order for the panel specification in the device tree to be used. This
causes the default to be the 10.1" LVDS display which will be available
in the Toradex webshop shortly.
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
By keeping RESET_MOCI_CTRL low we avoid explicitly releasing
RESET_MOCI#.
Please note that module hardware versions up to V1.1A will already
release RESET_MOCI# in hardware coming out of reset.
Please further note that with this change the USB hub on the Apalis
Evaluation board is kept in reset in U-Boot and therefore none of its
ports are operational in U-Boot.
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
We never really added a sensible DFU configuration for platforms
based on eMMC. Most of the things one might want to do can also be done
with UMS or fastboot, so drop the DFU configuration.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Philippe Schenker <philippe.schenker@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This is a configuration option specific to the tegra controller.
Doing it this way makes it show up directly under the tegra controller
option, indented one level, as "Disable external clock loopback".
The way it is now, it shows up at the end of the controller list, not
indented, as if it's some kind of generic MMC configuration option.
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Tom Warren <twarren@nvidia.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
For U-Boot we allow a GPIO to be specified to enable the codec. Add this
to the relevant binding files.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This file was missed when adding the sound driver to U-Boot. Bring it in
from Linux 5.0.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This file was missed when adding the sound driver to U-Boot. Bring it in
from Linux 5.0.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add slimbootloader board to run U-boot as a Slim Bootloader payload
- Add new board/intel/slimbootloader directory with minimum codes
- Add slimbootloader configuration files
- Add doc/board/intel/slimbootloader.rst
Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: add slimbootloader board MAINTAINERS file]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Slim Bootloader already calibrated TSC and provides it to U-Boot.
Therefore, U-Boot does not have to re-calibrate TSC.
Configuring tsc_base and clock_rate makes x86 tsc_timer driver bypass
TSC calibration and use the provided TSC frequency.
- Get TSC frequency from performance info hob
- Set tsc_base and clock_rate for tsc_timer driver
Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Slim Bootloader provides serial port info thru its HOB list pointer.
All these HOBs are eligible for Slim Bootloader based board only.
- Get serial port information from the serial port info HOB
- Leverage ns16550 driver with slimbootloader specific platform data
Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Slim Bootloader provides memory map info thru its HOB list pointer.
Configure memory size and relocation memory from the HOB data, and
provide e820 entries as well.
- Get memory size from the memory map info HOB
- Set available top memory lower than 4GB for U-Boot relocation
- Provide e820 entries from the memory map info HOB
Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
FSP (CONFIG_HAVE_FSP) and Slim Bootloader (CONFIG_SYS_SLIMBOOTLOADER)
consume HOB (CONFIG_USE_HOB) data from the each HOB list pointer.
Add a common HOB library in lib/hob.c and include/asm/hob.h.
Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Use existing EFI_GUID and efi_guid_t instead of struct efi_guid.
This is pre-work before making a common HOB library.
- Change 'struct efi_guid' to efi_guit_t
- Remove 'struct efi_guid'
- Define GUIDs with EFI_GUID() macro
- Use guidcmp() instead of compare_guid()
- Remove compare_guid()
Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested on MinnowMax
Tested-by: Bin Meng <bmeng.cn@gmail.com>
This slimbootloader CPU type is to enable U-Boot as a payload which
runs on top of Slim Bootloader (https://github.com/slimbootloader).
The Slim Bootloader is designed with multi-stage architecture for
the execution from reset vector to OS booting, and supports QEMU,
Apollolake, Whiskeylake and Coffeelake platforms consuming Intel
FSP (https://github.com/IntelFsp) for silicon initialization
including CAR and memory initialization.
The Slim Bootloader generates new HOB (Hand Off Block) which are
serial port info, memory map info, performance data info and so on,
and passes it to a Payload. U-Boot as a payload will use these HOB
information for basic initialization such as serial console.
As an initial commit,
- Add CONFIG_SYS_SLIMBOOTLOADER to enable slimbootloader CPU type
- Add new arch/x86/cpu/slimbootloader directory with minimum codes
- Get hob_list pointer from Slim Bootloader
Signed-off-by: Aiden Park <aiden.park@intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
With the introduction of the new spi-mem model operations changed
slightly. The new spi-mem operations make things a bit easier to
handle for ich-spi flash interface. This patch converts the ich-spi
driver by using spi-mem operations.
Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested on Intel CrownBay and MinnowMax
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fix compiler warnings when building the driver for 64-bit]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Remove a stray break which suppresses some debug messages.
Indicated by cppcheck.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Bin Meng <bmeng.cn@gmail.com>
At present the iasl tool (Intel ACPI (Advanced Configuration and Power
Interface) Source Language Compiler) is called in such a way that it uses
the source directory for its temporary files.
This means we end up with these files when building x86 boards:
board/dfi/dfi-bt700/dsdt.aml
board/dfi/dfi-bt700/dsdt.asl.tmp
Update the code to put temporary files in the target directory instead.
The iasl tool is quite confusing since it generates files with different
extensions and does not allow these to be individually specified. Add some
documentation to help with this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove dsdt.hex from 'make clean' rules and correct U-Boot spelling]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Intel Tangier has a shared DMA controller that, according to Microsoft spec,
has to be presented in CSRT table.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
ACPI has a capability to specify DMA parameters for DMA channel consumers.
To enable this for Intel Edison, describe GP DMA device in ACPI table
in order to get an ACPI handle to it in OS.
This works in conjunction with CSRT, which must be in align with DSDT.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Here is a stub function that generates an empty CSRT. If the target platform
provides acpi_fill_csrt() function, it will be used to populate the table.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With qemu-x86 starting to use config_distro_bootcmd, the pre-defined
ramboot and nfsboot commands do not work any more. This is caused by
undefined environment variable 'ramdiskaddr' that was previously set
in CONFIG_EXTRA_ENV_SETTINGS but later CONFIG_EXTRA_ENV_SETTINGS was
redefined for distro boot.
Update the x86 generic CONFIG_EXTRA_ENV_SETTINGS to consider distro
boot, and remove the one in qemu-x86.h.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Converts qemu x86 machines to boot using distro_config. The intent is to
allow u-boot in qemu to be maximally compatible with many boot methods
without having to change the config. Previously, u-boot would only boot
in a very limited set of circumstances where there was a /boot/vmlinuz
on scsi 0:3 with no ramdisk.
Signed-off-by: Joshua Watt <JPEWhacker@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: convert doc updates to reST]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Enable SD slot on Intel Edison platform.
By default firmware doesn't put device on active state. Thus,
we have to do this explicitly.
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
- Add rk3399 boards Khadas Edge/-V/-Captain
- Add fully souce code support for rk3328 including TPL/DRAM init
- Enable boot from eMMC for rk3399 rock960/ficus boards
- turn on the IO supply for dw_mmc
Commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field.
Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Vincent Tinelli <vincent.tinelli@intel.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field.
Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field.
Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Test is using random command which has own Kconfig symbol CMD_RANDOM which
already depends on CMD_MEMORY. That's why replace cmd_memory by cmd_random.
Fixes: 09da18deab ("test/py: add MMC/SD block write test")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Since commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field. Move the mmc field initialization before sdhci_setup_cfg()
call to avoid crash on mmc pointer dereference.
[this patch is based on commit 41a9fab8da ("mmc: mv_sdhci: fix
uninitialized pointer deref on probe") by Baruch Siach]
Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Cc: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Tested-by: Michal Simek <michal.simek@xilinx.com> (on zcu102/zc706)
Select SPL_HS200_SUPPORT if SPL_HS400_SUPPORT is selected as is being
done for the U-boot case.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
dfu_prepare_function() allocates N+1 descriptor header structures,
the last one being the "DFU Functional Descriptor".
dfu_unbind() handles de-allocation, but fails to free the final
one (eg. "DFU Functional Descriptor"), leading to memory leak.
Fixed by incrementing counter, as in dfu_prepare_function().
Signed-off-by: Ralph Siemsen <ralph.siemsen@linaro.org>
Registration of USB download gadget might fail for various reasons, so
add a check for g_dnl_register() funtion return value. Without this fix,
thor_init() will try to access the registered gadget structures resulting
in NULL pointer dereference issue.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
"slot-suffixes" variable was dropped in fastboot tool (in [1]). Let's
track AOSP/master and drop this variable in U-Boot as well.
[1] 42b18a518b
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
[lukma: Remove getvar_slot_suffixes() declaration]
Signed-off-by: Lukasz Majewski <lukma@denx.de>
commit 57faca19a8 ("drivers: USB: OHCI: allow compilation for 64-bit targets")
broke ohci support for the mpc85xx based socrates board,
as it removed volatile keyword from ohci_readl/writel.
Fix this so usb works again on socrates board.
Signed-off-by: Heiko Schocher <hs@denx.de>
var ohci_pci_ids is only used if DM_USB is not enabled.
So define this varaible only if
!CONFIG_IS_ENABLED(DM_USB)
Signed-off-by: Heiko Schocher <hs@denx.de>
This patch will enable the MUSB driver to support mass storage
devices connected to the OTG port in host mode.
Signed-off-by: Adam Ford <aford173@gmail.com>
With the recently added phy driver, this patch will enable the
musb driver on the da8xx to operate in host mode.
Signed-off-by: Adam Ford <aford173@gmail.com>
In preparation for supporting the musb driver, this patch
adds support for the usb phy associated with the musb driver.
Signed-off-by: Adam Ford <aford173@gmail.com>
This takes the latest changes from AOSP from the file
include/bootimg/bootimg.h from the repository:
https://android.googlesource.com/platform/system/tools/mkbootimg
and update the U-Boot version with the latest changes.
This file keeps the changes from AOSP to a minimum:
* Comments were converted from C++ to C style.
* Code inside __cplusplus #ifdef blocks were removed.
* C++11 struct extensions replaced with a single struct.
Signed-off-by: Alex Deymo <deymo@google.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
The Linux ramdisk should always be decompressed by the kernel itself,
not by U-Boot. Therefore, the 'compression' node in the FIT image should
always be set to "none" for ramdisk images, since the only point of
using that node is if you want U-Boot to do the decompression itself.
Yet some systems populate the node to the compression algorithm used by
the kernel instead. This used to be ignored, but now that we support
decompression of all image types it becomes a problem. Since ramdisks
should never be decompressed by U-Boot anyway, this patch adds a special
exception for them to avoid these issues. Still, setting the
'compression' node like that is wrong in the first place, so we still
want to print out a warning so that third-party distributions doing this
can notice and fix it.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Avoid to flush buffer when silent console is activated as the
console can be reactivate later, after relocation, when the env will
be updated with the saved one.
Solve issue (missing beginning of U-Boot trace) when:
- CONFIG_SILENT_CONSOLE is activated
- silent=1 is defined in default environment (CONFIG_EXTRA_ENV_SETTINGS)
- silent is removed in saved environment with:
> env delete silent; env save
Only functional when PRE_CONSOLE_BUFFER is activated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Update the "silent" property with the variable "silent" get from
saved environment, it solves the issue when:
- CONFIG_SILENT_CONSOLE and CONFIG_SYS_CONSOLE_IS_IN_ENV are activated
- silent is not defined in default environment
- silent is requested in saved environment with:
> env set silent 1; env save
On next reboot the console is not disabled as expected after relocation
and the environment load from flash (the callback is not called when
the INSERT is requested in the created hash table)
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
When building U-Boot with AVB enabled, compiler shows next warnings:
cmd/avb.c: In function 'do_avb_read_pvalue':
cmd/avb.c:371:18: warning: format '%ld' expects argument of type
'long int', but argument 2 has type 'size_t'
{aka 'unsigned int'} [-Wformat=]
printf("Read %ld bytes, value = %s\n", bytes_read,
~~^ ~~~~~~~~~~
%d
cmd/avb.c: In function 'do_avb_write_pvalue':
cmd/avb.c:404:19: warning: format '%ld' expects argument of type
'long int', but argument 2 has type '__kernel_size_t'
{aka 'unsigned int'} [-Wformat=]
printf("Wrote %ld bytes\n", strlen(value) + 1);
~~^ ~~~~~~~~~~~~~~~~~
%d
Fix those by using "%zu" specified.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
When having only these AVB related configs enabled:
CONFIG_AVB_VERIFY=y
CONFIG_CMD_AVB=y
CONFIG_LIBAVB=y
build fails with next errors:
common/avb_verify.c: In function 'read_persistent_value':
common/avb_verify.c:867:6: warning: implicit declaration of function
'get_open_session'
common/avb_verify.c:870:45: error: 'struct AvbOpsData' has no member
named 'tee'
common/avb_verify.c:894:7: warning: implicit declaration of function
'invoke_func'
common/avb_verify.c: In function 'write_persistent_value':
common/avb_verify.c:931:45: error: 'struct AvbOpsData' has no member
named 'tee'
Guard read_persistent_value() and write_persistent_value() functions
by checking if CONFIG_OPTEE_TA_AVB is enabled (as those are only used in
that case) to fix the build with mentioned configuration.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Fix the following Coverity warning:
CID 244086: Incorrect expression (BAD_COMPARE)
Comparing pointer "ep_bar" against NULL using anything besides == or
is likely to be incorrect.
Fixes: 914026d258 ("drivers: pci_ep: Introduce UCLASS_PCI_EP uclass")
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
This adds high speed interface subsystem - hifsys (i.e. PCIe and USB)
for MT7623 SoC and enables its reset controller.
The control block is shared with ethsys and accordingly rename the
related defines.
Tested-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
if CONFIG_AUTOBOOT_KEYED, CONFIG_AUTOBOOT_ENCRYPTION and
CONFIG_AUTOBOOT_STOP_STR_SHA256 are enabled in conjunction
with CONFIG_SHA_HW_ACCEL and CONFIG_FSL_CAAM, we get the
Error when pressing a key while waiting for bootdelay:
Error: Address arguments are not aligned
CAAM was not setup properly or it is faulty
Reason is, that used variables are not cache aligned,
so malloc this variables cache aligned.
Probably this is also a bugfix for other hw accelerators
than CAAM.
Signed-off-by: Heiko Schocher <hs@denx.de>
Provide a concise description of the assert() macro. Point out that the
tested expression is always executed, irrespective of the value of _DEBUG.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The original mtk_qspi driver has been removed. We change MT7629 to use
newly added mtk-spimem driver.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
Until now, binary TPL by Rockchip has been required for booting
procedure. Starting from this commit we may use only u-boot to boot
the device.
Note, that using binary TPL instead of U-boot TPL is still working.
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commits enables booting from eMMC when using SPL on 96Boards
Ficus board by adding SDHCI to boot order. Since the SDHCI driver
already has the reloc flag, this works straightaway. While we are at it,
let's also include the common u-boot dtsi for rk3399.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This commits enables booting from eMMC when using SPL on 96Boards
Rock960 board by adding SDHCI to boot order. Since the SDHCI driver
already has the reloc flag, this works straightaway. While we are at it,
let's also include the common u-boot dtsi for rk3399.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add devicetree support for Khadas Edge-Captain.
Khadas Captain is the carrier board for Khadas Edge.
Specification
- Rockchip RK3399
- Dual-Channel 2GB/4GB LPDDR4
- SD card slot
- Onboard 16GB/32GB/128GB eMMC
- RTL8211FD 1Gbps
- AP6356S/AP6398S WiFI/BT
- HDMI Out, DP, MIPI DSI/CSI, eDP
- USB 3.0, 2.0
- USB Type C power and data
- GPIO expansion ports
- Full 4 Lane M.2 Socket
- 16MB SPI Flash
- IR
- Programmable MCU
Commit details of rk3399-khadas-edge-*.dts sync from Linux 5.3-rc2:
"arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards"
(sha1: c2aacceedc86af87428d998e23a1aca24fd8aa2e)
Signed-off-by: Nick Xie <nick@khadas.com>
Tested-by: Chris Webb <chris@arachsys.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add devicetree support for Khadas Edge-V.
Khadas Edge-V is a Khadas VIM form factor Rockchip RK3399 board.
Specification
- Rockchip RK3399
- Dual-Channel 2GB/4GB LPDDR4
- SD card slot
- Onboard 16GB/32GB/128GB eMMC
- RTL8211FD 1Gbps
- AP6356S/AP6398S WiFI/BT
- HDMI Out, DP, MIPI DSI/CSI, eDP
- USB 3.0, 2.0
- USB Type C power and data
- GPIO expansion ports
- Full 4 Lane M.2 Socket
- 16MB SPI Flash
- IR
- Programmable MCU
Commit details of rk3399-khadas-edge-*.dts sync from Linux 5.3-rc2:
"arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards"
(sha1: c2aacceedc86af87428d998e23a1aca24fd8aa2e)
Signed-off-by: Nick Xie <nick@khadas.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add devicetree support for Khadas Edge.
Khadas Edge is an expandable Rockchip RK3399 board with goldfinger.
Specification
- Rockchip RK3399
- Dual-Channel 2GB/4GB LPDDR4
- Onboard 16GB/32GB/128GB eMMC
- RTL8211FD 1Gbps
- AP6356S/AP6398S WiFI/BT
- HDMI Out, DP
- USB 3.0, 2.0
- USB Type C power and data
- 16MB SPI Flash
- Programmable MCU
Commit details of rk3399-khadas-edge-*.dts sync from Linux 5.3-rc2:
"arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards"
(sha1: c2aacceedc86af87428d998e23a1aca24fd8aa2e)
Signed-off-by: Nick Xie <nick@khadas.com>
Tested-by: Chris Webb <chris@arachsys.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
DMA for MMCs can be enabled, since the previous patch fixes
the following issue in SPL:
Trying to boot from MMC1
spl: mmc init failed with error: -110
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
Signed-off-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This patch cleans up some coding style related issues in the mtk_wtd
driver to make this driver comply again with the U-Boot coding style
standards.
The only minimal functional change is that the timeout parameter is now
passed in (u64) instead of (unsigned int) from mtk_wdt_start() to
mtk_wdt_set_timeout(), preserving the original value.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Shannon Barber <sbarber@dataspeedinc.com>
Cc: Ryder Lee <ryder.lee@mediatek.com>
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
The BCM2835/2836 watchdog is not used in mainline U-Boot at all. This
patch removes the driver and its references (CONFIG_BCM2835_WDT)
completely.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Paolo Pisati <p.pisati@gmail.com>
Pull request for UEFI sub-system for v2019.10-rc2
With this pull request a workaround for GRUB on 32bit ARM is re-enabled
and made customizable. Without the patch booting on ARM 32bit with GRUB
prior to version 2.04 or with a cache which is not managed via CP15
fails.
Further work will be needed to achieve a UEFI compliant cache handling.
According to the UEFI spec all caches except those that cannot be
managed via CP15 should be enabled.
An implementation of the ConvertPointer() runtime service is provided.
efi_crt0 is always rebuild to avoid having to call 'make mrproper' when
switching architectures.
Mirror the qemu-riscv64 testing we do on Travis. Update to a newer
Docker image that contains riscv64-softmmu for QEMU.
Signed-off-by: Tom Rini <trini@konsulko.com>
As part of copying the logic from Travis to GitLab I kept the TOOLCHAIN
variable. However we don't use that now as the Docker container already
has all toolchains so we don't need to do any downloading. Remove this
variable.
Signed-off-by: Tom Rini <trini@konsulko.com>
Add comments for this function. Also remove the #ifdef around it so that
it can be called from 'if (IS_ENABLED(...))'.
Signed-off-by: Simon Glass <sjg@chromium.org>
Move the variable to the top of the file and adjust the code which uses it
to use if() rather than #ifdef, to make it easier to read.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since this is part of the autoboot functionality, it makes sense to name
it with an AUTOBOOT prefix. No mainline boards use it so this should be
safe, and downstream boards will need to adjust.
Since this option is just an integer value, it really needs another option
to control whether the feature is enabled or not. Add a new
CONFIG_USE_AUTOBOOT_MENUKEY for that. This fits better with how things are
done with Kconfig, avoiding the need to use a specific value to disable
the feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
This is not defined by any board. We could use CONFIG_AUTOBOOT_PROMPT
instead perhaps, but this depends on CONFIG_AUTOBOOT_KEYED which is not
used for the single-key case.
So let's just remove CONFIG_MENUPROMPT.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we have two functions named __autoboot() which do different
things. This is confusing. Fix it by using if() instead of #ifdef for
selecting the functions, and renaming them to meaningful names.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use if() instead for this option, renaming the two different
passwd_abort() functions to indicate their purpose.
Signed-off-by: Simon Glass <sjg@chromium.org>
This CONFIG option is only present if CONFIG_AUTOBOOT_ENCRYPTION is
enabled so it cannot be used in code without that #ifdef. But we want to
reduce the use of #ifdef in this file and in particular to avoid having
two different functions both named passwd_abort() but which do different
things.
In preparation for this, create an intermediate value which is set to an
empty string if there is no value for CONFIG_AUTOBOOT_STOP_STR_SHA256.
Signed-off-by: Simon Glass <sjg@chromium.org>
This converts the following to Kconfig:
CONFIG_USE_PREBOOT
CONFIG_PREBOOT
Both are together in one commit, since otherwise the former causes kconfig
to define the latter, which gives duplicate symbol errors.
Includes a manual fixup for CONFIG_PREBOOT in ids8313_defconfig since the
backslash lands in the wrong place. Similarly with socfpga_vining_fpga.
Signed-off-by: Simon Glass <sjg@chromium.org>
In order to use CONFIG_PREBOOT with Kconfig, CONFIG_USE_PREBOOT must be
defined for each board. To prepare for conversion to Kconfig, add this.
Signed-off-by: Simon Glass <sjg@chromium.org>
The function name indicates that it does something, but its entire
operation is actually condition on a CONFIG. Move the condition outside
the function so this is clearer, and use if() instead of #ifdef, like the
reset of the file.
Signed-off-by: Simon Glass <sjg@chromium.org>
- sync Amlogic G12A DT with linux 5.3-rc1
- add support for 4GiB DRAM memory
- add support for Amlogic G12B based Odroid-N2
- small duplicate logic fix for gxbb clock driver
This reverts commit 877ab2423b.
The above patch was designed to shrink code by only pin-muxing items
needed for SPL in SPL and relying on driver model or SPL to mux other
items. Unfortunately, da850evm_direct_nor doesn't use SPL so items
that were only muxed during SPL are not muxed causing the board
to no longer boot.
Signed-off-by: Adam Ford <aford173@gmail.com>
The array bounds have to be checked before accessing the array element.
Identified by cppcheck.
Fixes: 67ac6ffaee ("mtd: nand: davinci: add opportunity to write keystone U-boot image")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
With the removal of da850_am18xxevm, there is at least one
whitelisted CONFIG option that can be deleted. This patch
removes CONFIG_DA850_AM18X_EVM since it's not required any more
Signed-off-by: Adam Ford <aford173@gmail.com>
In attempts to speed up SPL and reduce size, the MDIO pin muxing
was inadvertently affected. Since the ethernet driver will setup
the pin muxing when ethernet is loaded, this patch will also
pinmux the MDIO pins at the same time. Once an DM compatible
MDIO driver is available, this can be removed.
Fixes: 877ab2423b ("ARM: davinci: da850: Manual pinmux only
when PINCTRL not available")
Signed-off-by: Adam Ford <aford173@gmail.com>
This patch adds SPI and SPI_FLASH DM support for verified boot on
TI AM335 chipsets. The following compile warning is removed:
===================== WARNING ======================
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
Built and tested on AM335x device (BeagleboneBlack).
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
This patch adds BLK and DM support for verified boot on TI AM335x
chipsets. The following compile warnings are removed:
===================== WARNING ======================
This board does not use CONFIG_DM_MMC. Please update
the board to use CONFIG_DM_MMC before the v2019.04 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
===================== WARNING ======================
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
BLK and DM_MMC are enabled by default in SPL as well, which is
making the build to break with an overflow(spl image doesn't
fit into SRAM because of size constraints).
LD spl/drivers/built-in.o
LD spl/u-boot-spl
arm-linux-ld.bfd: u-boot-spl section .u_boot_list will not fit in region .sram
arm-linux-ld.bfd: region .sram overflowed by 116 bytes
make[1]: *** [spl/u-boot-spl] Error 1
make: *** [spl/u-boot-spl] Error 2
For the above reason BLK and DM_MMC is disabled in SPL.
Built and tested on AM335x device (BeagleboneBlack).
Signed-off-by: Suniel Mahesh <sunil.m@techveda.org>
The K3 System Controller driver is used for loading and starting
the System Firmware, and is used only on R5 SPL. It need not be
enabled and built for the A72 U-Boot and SPL, so disable it from
the j721e_evm_a72 defconfig.
While at this, also remove the unneeded CONFIG_SPL_REMOTEPROC and
CONFIG_CMD_REMOTEPROC as no remoteprocs are now loaded from A72 SPL.
Signed-off-by: Suman Anna <s-anna@ti.com>
The K3 System Controller driver is used for loading and starting
the System Firmware, and is used only on R5 SPL. It need not be
enabled and built for the A53 U-Boot and SPL, so disable it from
both the GP and HS AM65x A53 defconfigs.
While at this, also remove the unneeded CONFIG_SPL_REMOTEPROC and
CONFIG_CMD_REMOTEPROC as no remoteprocs are now loaded from A53 SPL.
Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
The commit 355be915ed ("arm: dts: k3-am654: Update power-domains
property for each node") has updated the power-domain cells value
and updated power-domains property in various existing dts nodes but
missed updating the cpsw_nuss node. This results in the following
build warning, fix this.
arch/arm/dts/k3-am654-base-board.dtb: Warning (power_domains_property): /interconnect@100000/interconnect@28380000/cpsw_nuss@046000000:power-domains: property size (8) too small for cell size 2
arch/arm/dts/k3-am654-r5-base-board.dtb: Warning (power_domains_property): /interconnect@100000/interconnect@28380000/cpsw_nuss@046000000:power-domains: property size (8) too small for cell size 2
Fixes: 355be915ed ("arm: dts: k3-am654: Update power-domains property for each node")
Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
The MTDPARTS currently lists just u-boot.ais as 512k in size.
This works when loading the ais file via serial port, but if one
wanted to update just the u-boot portion, it's not really possible.
This patch splits the MTDPARTS into a 32k SPL partiion and a 480k
u-boot partition which allows u-boot.img to be burned to the u-boot
partition. The remaining partitions are left with the same sizes
and offsets to not break backwards compatibility.
Signed-off-by: Adam Ford <aford173@gmail.com>
We are going to implement DTBO partition for BeagleBoard X15 further. To
support this, 'dtimg' command must be enabled.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
It is essential to have an access to BCB area of 'misc' partition on
Android devices [1]. For BeagleBoard X15 the 'bcb' command will be
further used for reboot reason implementation and booting to recovery.
It can be also used for debugging reasons, like checking RescueParty
messages in BCB area.
[1] doc/android/bcb.txt
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
"fastboot flashall" expects "fastboot getvar product" value to be one of
values provided in android-info.txt file (in AOSP), from "require
board=" list. Before this patch, "am57xx" is returned for all AM57xx
based boards, as it's set in $board env var from SYS_BOARD in
board/ti/am57xx/Kconfig file, which is used for default implementation
of "fastboot getvar product".
In order to fix that inconsistency, let's do next:
1. In U-Boot: override fastboot.product, reusing the value from
$board_name
2. In AOSP: provide values for all AM57xx boards we can use to
device/ti/beagle_x15/board-info.txt file
This way requirements check in "fastboot flashall" will work as
expected, verifying that user tries to flash images to the board which
those images were built for.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Andrew F. Davis <afd@ti.com>
In case of Android boot, reboot reason can be written into BCB (usually
it's an area in 'misc' partition). U-Boot then can obtain that reboot
reason from BCB and handle it accordingly to achieve correct Android
boot flow, like it was suggested in [1]:
- if it's empty: perform normal Android boot from eMMC
- if it contains "bootonce-bootloader": get into fastboot mode
- if it contains "boot-recovery": perform recovery boot
The latter is not implemented yet, as it depends on some features that
are not implemented on TI platforms yet (in AOSP and in U-Boot).
[1] https://marc.info/?l=u-boot&m=152508418909737&w=2
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
First thing we check in meson_clk_set_rate_by_id() is current_rate == rate.
There is not need to check it again.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
ODROID-N2 is a single board computer manufactured by Hardkernel Co. Ltd
with the following specifications:
- Amlogic S922X ARM Cortex-A53 dual-core + Cortex-A73 quad-core SoC
- 4GB DDR4 SDRAM
- Gigabit Ethernet
- HDMI 2.1 4K/60Hz display
- 40-pin GPIO header
- 4 x USB 3.0 Host, 1 x USB OTG
- eMMC, microSD
- Infrared receiver
The board directory is W400, the name of the Amlogic Reference Design
of Amlogic G12B with Gigabit boards, which will be used for similar
boards.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
When configured with 4GiB DRAM size, only 3.8GiB is available, the
I/O beeing mapped in the last 256MiB of the first 4GiB physical memory/
First fixup the mm_region to handle the first 3.8GiB as memory and the
last 256MiB as I/O.
Then limit the real memory reported by the firmware to the available
physical space, 3.8GiB aligned with the mm_region memory zone size.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
Import HardKernel Odroid-N2 DT from Linux 5.3-rc1, commit 5f9e832c1370
("Linus 5.3-rc1") based on an Amlogic G12B S922X SoC.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
Sync the Amlogic Meson G12A DT and Bindings file with the Linux 5.3-rc1
from the commit 5f9e832c1370 ("Linus 5.3-rc1").
Also remove the meson-g12a-u-boot.dtsi and meson-g12a-u200-u-boot.dtsi,
now conflicting with the main DT content.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Mark Kettenis <kettenis@openbsd.org>
The comment about init op being NULL used to be next to the NULL check
code. Commit 8ca51e51c1 ("dm: mmc: Add a way to use driver model for
MMC operations") separated the comment from the code. Put them back
together.
Fixes: 8ca51e51c1 ("dm: mmc: Add a way to use driver model for MMC operations")
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
When reading large data in once (reading 512MiB is tested on MT7623), a
watchdog timeout is triggered due to watchdog not being fed.
This patch adds WATCHDOG_RESET() to msdc_start_data() so the watchdog will
be fed every 1024 blocks are read/written.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Since commit 3d296365e4 ("mmc: sdhci: Add support for
sdhci-caps-mask") sdhci_setup_cfg() expects a valid sdhci_host mmc
field. Move the mmc field initialization before sdhci_setup_cfg()
call to avoid crash on mmc pointer dereference.
Fixes: 3d296365e4 ("mmc: sdhci: Add support for sdhci-caps-mask")
Cc: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Add a standalone MMC block write test. This allows direct testing of MMC
access rather than relying on doing so as a side-effect of e.g. DFU or
UMS testing, which may not be enabled on all platforms.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
When support Clock Common Framework, U-Boot use dev for
clk tree information, there is no clk->parent. When
support composite clk, it contains mux/gate/divider,
but the mux/gate/divider is not binded with device.
So we could not use dev_get_uclass_priv to get the correct
clk_mux/gate/divider. So add clk_dev_binded to let
choose the correct method.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
- fix EDID mode filtering
- extend mxc_ipuv3_fb to enable backlight/display
- include fb_base in global_data for DM_VIDEO
- show frame buffer address via board info
as used to be with legacy VIDEO support
Xilinx/FPGA changes for v2019.10
fpga:
- Xilinx virtex2 cleanup
- Altera cyclon2 cleanup
zynq:
- Minor Kconfig cleanup
- Add psu_init configuration for Z-turn board
zynqmp:
- Add support for pmufw config passing to PMU
- script for psu_init conversion
- zcu1275 renaming
xilinx:
- Add support for UltraZed-EV SoM
Use efi_uintn_t where the UEFI spec uses UINTN. Use efi_uintn_t also for
the result of the division of two efi_uintn_t.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We read the address map before assigning the memory for the pages that will
be mapped to virtual addresses. So these pages will overlap with the entry
for EFI_CONVENTIONAL_MEMORY. We have to ensure that every page is described
at most once in the map.
Remove EFI_CONVENTIONAL_MEMORY from the map that we pass to
SetVirtualAddressMap().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Change the UEFI documentation to Sphinx style and integrate it into the
rest of the Sphinx generated documentation.
Remove the inaccurate TODO list in doc/uefi/uefi.rst.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
make htmldocs produces a warning:
./cmd/efidebug.c:733: WARNING: Unexpected indentation.
Correct the indentation.
Remove 'See above for details of sub-commands.' which is not helpful in the
Sphinx generated documentation.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When changing the architecture without calling 'make clean' a subsequent
make fails with
lib/efi_loader/efi_crt0.o: file not recognized: File format not recognized
Force efi_crt0.o to be always rebuild.
Reported-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
GRUB on ARM 32bit prior to version 2.04 lacks proper handling of caches.
In U-Boot v2019.04 a workaround for this was inadvertently removed.
The workaround is currently also needed for booting on systems with caches
that cannot be managed via CP15 (e.g. with an i.MX6 CPU).
Re-enable the workaround and make it customizable.
Fixes: f69d63fae2 ("efi_loader: use efi_start_image() for bootefi")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
xilinx_zynqmp_mini configuration is throwing build error:
readlink: missing operand
Try 'readlink --help' for more information.
because CONFIG_ZYNQMP_SPL_PM_CFG_OBJ_FILE is not defined at all and
Makefile pass ifneq condition. Add SPL_BUILD dependency which is also
reflected in Kconfig.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
In cmd/fpga.c the commands should return enum command_ret_t, e.g.
CMD_RET_USAGE, CMD_RET_SUCCESS, or CMD_RET_FAILURE. What they actually
do is passing a return value from different 'fpga_' functions.
Passing on a return value of -1 from a called function leads to printing
out usage text. In case of actually correct usage with correctly
specified parameters but some fail at runtime printing out that usage
text is distracting.
The reason is most 'fpga_' functions return either FPGA_SUCCESS or
FPGA_FAIL, the latter was equal to -1 which is the same value as
CMD_RET_USAGE. So just passing on FPGA_FAIL lead to printing out usage.
We should only return CMD_RET_USAGE in cases, where the user sent wrong
input. Every other case should return CMD_RET_SUCCESS or
CMD_RET_FAILURE, and not simply pass an error code.
Simply changing FPGA_FAIL from -1 to 1 gets the job done.
Suggested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Alexander Dahl <ada@thorsis.com>
As already done for the 'pre' function, a check is added to not follow a
NULL pointer, if somebody has not assigned a 'post' function.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
Nothing special, but done before further cleanup.
* spacing
* braces
* __FUNCTION__ → __func__
Suggested-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Alexander Dahl <ada@thorsis.com>
There seems to be only one place, where this is checked against:
`altera_validate()`. It should be non zero. Otherwise it is only used to
display it, so it probably does not really matter at the moment. But we
had the datasheet open anyway …
Sizes in datasheet are bit counts, display here is in bytes.
Signed-off-by: Alexander Dahl <ada@thorsis.com>
The board was added without adding a MAINTAINERS entry.
Fixes:
$ ./tools/genboardscfg.py -f
WARNING: no status info for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0'
WARNING: no maintainers for 'avnet_ultrazedev_cc_v1_0_ultrazedev_som_v1_0'
$
Reported-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This adds support for slave serial programming, in addition to the
previously supported slave SelectMAP mode. There are two ways that this
can be used:
-Using the clk and wdata callbacks in order to write image data one bit
at a time using pure bit-banging. This works, but is rather painfully
slow with typical image sizes.
-By specifying the wbulkdata callback instead, the image loading process
can be offloaded to SPI hardware. In this mode the clk and wdata
callbacks do not need to be specified. This allows the image to be
loaded much faster, taking only a few seconds with even relatively large
images.
Slave serial programming has been tested on the Kintex-7 series of
FPGAs.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Some Xilinx FPGA configuration options can result in the startup
sequence extending past the end of the FPGA bitstream. Continue applying
CCLK clock cycles for 8 cycles after DONE is asserted in order to ensure
the startup sequence is complete, as recommended by Xilinx.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This is in preparation for adding slave serial programming support,
which uses the same pre/post operations as slave SelectMAP, to avoid
duplicating code.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Add an option to allow this driver to be selected with Kconfig. As noted
in the description, this driver should also work with many newer Xilinx
FPGA families as the programming methods are essentially the same.
Also added a missing FPGA_XILINX dependency to the similar Spartan 3
driver.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Address Checkpatch warnings in virtex2 code prior to making other
changes. No functional change intended.
Signed-off-by: Robert Hancock <hancock@sedsystems.ca>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Avnet UltraZed-EV Starter Kit is composed by the UltraZed-EV SoM and the
only publicly-available compatible carrier card. The SoM is based on the EV
version of the Xilinx ZynqMP SoC+FPGA.
The psu_init_gpl.c file has been generated from the board definition files
at [0] using Vivado 2018.3 and then minimized by
tools/zynqmp_psu_init_minimize.sh. Manually removed serdes init code since
it is not mentioned in device tree and fixed a checkpatch error.
[0] 3686c9ff7d/ultrazed_7ev_cc/1.1
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This script transforms a pair of psu_init_gpl.c and .h files produced by
the Xilinx Vivado tool for ZynqMP into a smaller psu_init_gpl.c file that
is almost checkpatch compliant.
Based on a script by Michal Simek.
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fixes sparse warnings when building zynqmp defconfigs:
./board/xilinx/zynqmp/xil_io.h:12:6: warning: symbol 'Xil_Out32' was not declared. Should it be static?
./board/xilinx/zynqmp/xil_io.h:17:5: warning: symbol 'Xil_In32' was not declared. Should it be static?
./board/xilinx/zynqmp/xil_io.h:22:6: warning: symbol 'usleep' was not declared. Should it be static?
Also add __maybe_unused to usleep() since it is not used by minimized
psu_init_gpl.c files, so it would warn as "defined but not used".
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
The recently-added ZYNQMP_SPL_PM_CFG_OBJ_FILE option allows SPL to load a
PMUFW configuration object from a binary blob. However the configuration
object is produced by Xilinx proprietary tools as a C source file and no
tool exists to easily convert it to a binary blob in an embedded Linux
build system for U-Boot to use.
Add a simple Python script to do the conversion.
It is definitely not a complete C language parser, but it is enough to
parse the known patterns generated by Xilinx tools, including:
- defines
- literal integers, optionally with a 'U' suffix
- bitwise OR between them
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Optionally allow U-Boot to load a configuration object into the Power
Management Unit (PMU) firmware on Xilinx ZynqMP.
The configuration object is required by the PMU FW to enable most SoC
peripherals. So far the only way to boot using U-Boot SPL was to hard-code
the configuration object in the PMU firmware. Allow a different boot
process, where the PMU FW is equal for any ZynqMP chip and its
configuration is passed at runtime by U-Boot SPL.
All the code for Inter-processor communication with the PMU is isolated in
a new file (pmu_ipc.c). The code is inspired by the same feature as
implemented in the Xilinx First Stage Bootloader (FSBL) and Arm Trusted
Firmware:
* fb647e6b4c/lib/sw_apps/zynqmp_fsbl/src/xfsbl_misc_drivers.c (L295)
* c48d02bade/plat/xilinx/zynqmp/pm_service/pm_api_sys.c (L357)
SPL logs on the console before loading the configuration object:
U-Boot SPL 2019.07-rc1-00511-gaec224515c87 (May 15 2019 - 08:43:41 +0200)
Loading PMUFW cfg obj (2008 bytes)
EL Level: EL3
...
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Name of this platform has changed and released to customers that's why
name has also changed.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Series-to: uboot
This Kbuild option disappeared way back in 2014:
commit 75504e9592
Author: Mateusz Zalega <m.zalega@samsung.com>
Date: Wed Apr 30 13:07:48 2014 +0200
... snip ...
CONFIG_USB_CABLE_CHECK was removed.
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
When an image is signed/encrypted on K2 devices the image may get padded
to meet alignment requirements for the signature/encryption type. The
original size is appended as 4 bytes little-endian to the end of the
final image.
Normally the trailing extra bytes are ignored and so restoring the
exact original size is not important. In the case of initrd the
original size is important as the kernel uses it to look for
additional filesystem data and can do the wrong thing when the
size is not correct.
Read off the original size and report it back from the image post
processing stage.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Now that we have enabled the driver-model in SPL, we can remove the
code disabling NAND self-init in SPL from the config include for
omapl138-lcdk.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Enable CONFIG_SPL_DM and enable the driver model for serial by defining
an appropriate device in the board file for da850-lcdk.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
We're working towards enabling the driver-model in SPL for da850-lcdk.
Enable CONFIG_USE_TINY_PRINTF in defconfig to reduce SPL size.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
We're working towards enabling the driver model in SPL for da850-lcdk.
Enable SPL_SYS_MALLOC_SIMPLE in defconfig to reduce SPL size.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Enable the driver-model on da850-evm. We need to add a dummy nand node
to the device tree, as the real nand node is a sub-node of the aemif
device.
On linux the aemif driver populates all its child nodes, but we can't do
it in u-boot currently.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Tested-by: Adam Ford <aford173@gmail.com> #da850-evm
Enable the driver-model on da850-lcdk. We need to add a dummy nand node
to the device tree, as the real nand node is a sub-node of the aemif
device.
On linux the aemif driver populates all its child nodes, but we can't do
it in u-boot currently.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Extend the davinci NAND driver to support the driver model. For now this
doesn't add any device-tree parsing due to the fact that we can't access
the actual nand node on the device-tree - it's a subnode of the aemif
device and we don't have an aemif driver on davinci at the moment.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
The following warning is emited when building u-boot for da850-lcdk:
===================== WARNING ======================
This board does not use CONFIG_DM_SPI. Please update
the board before v2019.04 for no dm conversion
and v2019.07 for partially dm converted drivers.
Failure to update can lead to driver/board removal
See doc/driver-model/MIGRATION.txt for more info.
====================================================
===================== WARNING ======================
This board does not use CONFIG_DM_SPI_FLASH. Please update
the board to use CONFIG_SPI_FLASH before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
While we could fix it by selecting CONFIG_DM_SPI, there's no need to
build it at all as SPI is disabled on da850-lcdk. Remove all unneeded
options from the defconfig.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Heiko Schocher <hs@denx.de>
There are no more users of the compatibility layer for i2c. Remove the
driver and all references to it.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Heiko Schocher <hs@denx.de>
There are no more "real" users of CONFIG_DM_I2C_COMPAT and we'll soon
remove it altogether. Stop building it in sandbox mode.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Heiko Schocher <hs@denx.de>
This option is no longer used on any davinci board but still selected
in defconfigs which causes the following warning:
===================== WARNING ======================
This board uses CONFIG_DM_I2C_COMPAT. Please remove
(possibly in a subsequent patch in your series)
before sending patches to the mailing list.
====================================================
Remove all references to CONFIG_DM_I2C_COMPAT from davinci.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Acked-by: Heiko Schocher <hs@denx.de>
This board has been abandonded for a while. I do not have this hardware
and nobody has appeared to notice and/or care that it's orphaned.
Since much of this code is inserted into the da850evm code base, removing
it from support will make da850evm support easier going forward.
This patch removes the da850_am18xxevm_defconfig, README references to this
board and the reference to this board from the MAINTAINERS list.
Signed-off-by: Adam Ford <aford173@gmail.com>
Add a condition to the break in the modes lookup, without this
when the first mode is not valid, then edid_get_timing_validate()
return an error instead of checking the next modes.
Fixes: 1c1ed441b0 ("edid: add edid_get_timing_validate() variant to filter out edid modes")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
binman only accepts the -D argument early on the command-line, yet the
Makefile currently passes it near the end. This causes the build to fail
if this feature is used. Re-order the command-line to fix this.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a 'replace' command to binman to permit entries to be replaced, either
individually or all at once (using a filter).
Signed-off-by: Simon Glass <sjg@chromium.org>
This code has three distinct phases:
1. The image is loaded and the state module is set up
2. The entry is written to the image
3. The image is repacked and written back to the file
Split the code out with three separate functions, one for each phase.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present some tests leave behind output directories. This happens
because some tests call binman, which sets up an output directory, then
call it again, which sets up another output directory and leaves the
original one behind.
Fix this by using a separate temporary directory when binman is called
twice, or by manually removing the output directory.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since the state module holds references to all the device trees used by
binman, it must be updated when the device trees are updated. Add support
for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present outdir remains set ever after the output directory has been
removed. Fix this to avoid trying to access it when it is not present.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present binman cannot replace data within a CBFS since it does not
allow rewriting of the files in that CBFS. Implement this by using the
new WriteData() method to handle the case.
Add a header to compressed data so that the amount of compressed data can
be determined without reference to the size of the containing entry. This
allows the entry to be larger that the contents, without causing errors in
decompression. This is necessary to cope with a compressed device tree
being updated in such a way that it shrinks after the entry size is
already set (an obscure case). It is not used with CBFS since it has its
own metadata for this. Increase the number of passes allowed to resolve
the position of entries, to handle this case.
Add a test for this new logic.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this method assumes that the parent section does not need
to recalculate its position or adjust any metadata it may contain. But
when the entry changes size this may not be true. Also if the parent
section is more than just a container (e.g. it is a CBFS) then the
section may need to regenerate its output.
Add a new WriteChildData() method to sections and call this from the
WriteData() method, to handle this situation.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we simply extract the data directly from entries using the
image_pos information. This happens to work on current entry types, but
cannot work if the entry type encodes the data in some way. Update the
ReadData() method to provide the data by calling a new ReadChildData()
method in the parent. This allows the entry_Section class, or possibly
any other container class, to return the correct data in all cases.
Signed-off-by: Simon Glass <sjg@chromium.org>
The Intel descriptor must always appear at the start of an (x86) image,
so it is supposed to position itself there always. However there is no
explicit test for this. Add one and fix a bug introduced by the recent
change to adjust Entry to read the node in a separate call.
Signed-off-by: Simon Glass <sjg@chromium.org>
The FMAP is not intended to show the files inside a CBFS. The FMAP can be
used to locate the CBFS itself, but then the CBFS must be read to find out
what is in it.
Update the FMAP to work this way and add some debugging while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function appears to copy only the data before the struct
region and the data in the string region. It does not seem to copy the
struct region itself.
>From the arguments of this function it seems that it should support fdt
and buf being different. This patch attempts to fix this problem.
Upstream commit: c72fa77 libfdt: Copy the struct region in fdt_resize()
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes an entry may shrink after it has already been packed. In that
case we must repack the items. Of course it is always possible to just
leave the entry at its original size and waste space at the end. This is
what binman does by default, since there is the possibility of the entry
changing size every time binman calculates its contents, thus causing a
loop.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes entries shrink after packing. As a start towards supporting
this, update the _testing entry to handle the test case.
Signed-off-by: Simon Glass <sjg@chromium.org>
So far we don't allow entries to change size when repacking. But this is
not very useful since it is common for entries to change size after an
updated binary is built, etc.
Add support for this, respecting the original offset/size/alignment
constraints of the image layout. For this to work the original image
must have been created with the 'allow-repack' property.
This does not support entry types with sub-entries such as files and
CBFS, but it does support sections.
Signed-off-by: Simon Glass <sjg@chromium.org>
The positioning does not currently work correctly if at the end of an
image with no fixed size. Also if the header is in the middle of an image
it can cause a gap in the image since the header position is normally at
the image end, so entries after it are placed after the end of the image.
Fix these problems and add more tests to cover these cases.
Signed-off-by: Simon Glass <sjg@chromium.org>
Now that an Image is an Entry_section, there is no need for the separate
BuildSection() function. Drop it and add a bit of logging.
Signed-off-by: Simon Glass <sjg@chromium.org>
When reading an image in, write its fdtmap to a file in the output
directory. This is useful for debugging. Update the 'ls' command to set up
the output directory; otherwise it will fail.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present it is not possible to discover the contraints to repacking an
image (e.g. maximum section size) since this information is not preserved
from the original image description.
Add new 'orig-offset' and 'orig-size' properties to hold this. Add them to
the main device tree in the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
While it is useful and efficient to build images in a single pass from a
unified description, it is sometimes desirable to update the image later.
Add support for replace an existing file with one of the same size. This
avoids needing to repack the file. Support for more advanced updates will
come in future patches.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present EnsureCompiled() uses an file from the 'output' directory (in
the tools module) when compiling the device tree. This is fine in most
cases, allowing useful inspection of the output files from binman.
However in functional tests, _SetupDtb() creates an output directory and
immediately removes it afterwards. This serves no benefit and just
confuses things, since the 'official' output directory is supposed to be
created and destroyed in control.Binman().
Add a new parameter for the optional temporary directory to use, and use a
separate temporary directory in _SetupDtb().
Signed-off-by: Simon Glass <sjg@chromium.org>
When updating an existing image where the size of all entries remains the
same, we should not need to regenerate the fdtmap. Update the entry to
return the same fdtmap as was read from the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
We use this same combination of properties several times in tests. Add a
constant for it to avoid typos, etc.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we have an 'image' property in the entry for this purpose, but
this is not necessary and seems error-prone in the presence of
inheritance. Add a function instead. The Entry_section class overrides
this with a special version, since top-level sections are in fact images,
since Image inherits Entry_section.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the Entry constructor sets up the object and then immediately
reads its device-tree node to obtain its properties.
This breaks a convention that constructors should not do any processing.
A consequence is that we must pass all arguments to the constructor and
cannot have the node-reading proceed in a different way unless we pass
flags to that constructor. We already have a 'test' flag in a few cases,
and now need to control whether the 'orig_offset' and 'orig_size'
properties are set or not.
Adjust the code to require a separate call to ReadNode() after
construction. The Image class remains as it was.
Signed-off-by: Simon Glass <sjg@chromium.org>
Since binman supports multiple images it is useful to know which one
created the image that has been read. Then it is possible to look up that
name in the 'master' device tree (containing the description of all
images).
Add a property for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
In some cases we want to access the Entry object for a particular device
tree. This allows us to read its contents or update it. Add this
information to output_fdt_files and provide a function to read it.
Also rename output_fdt_files since its name is no-longer descriptive.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present these state functions raise an exception if they cannot find
what is requested. But in some cases the information is optional (e.g. an
fdtmap in a coming patch) so it is better to return gracefully.
Update these two functions to return None when the data cannot be found.
Signed-off-by: Simon Glass <sjg@chromium.org>
When modifying an image it is convenient to load the data from the file
into each entry so that it can be reprocessed. Add a new LoadData() method
to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
This data provides all the information about the position and size of each
entry. Store it for later use when loading an image. It can be reused as
is if the image is modified without changing offsets/sizes.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function currently fails if the root node is requested. Requesting
the root node is sometimes useful, so fix the bug.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is confusing when something goes wrong with a device tree which was
created from data rather than a file, since there is no identifying
filename. Add an option to provide this. Use the filename as the name,
where available
Signed-off-by: Simon Glass <sjg@chromium.org>
At present a Python exception is raised which does not show the node
information. Add a more helpful exception in this case.
Signed-off-by: Simon Glass <sjg@chromium.org>
Use the new logging feature to log information about progress with
packing. This is useful to see how binman is figuring things out.
Also update elf.py to use the same feature.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this excludes the device tree passed in to binman since it
is always returned first by GetAllFdts(). However, this is easy to ensure
by adding a check in that function. Change this dict to includes all
device trees, and rename it to fdt_set.
Signed-off-by: Simon Glass <sjg@chromium.org>
It makes more sense to use entry type as the key for this dictionary,
since the filename can in principle be anything. Make this change and also
rename fdt_files and add a comment to explain it better.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the FDTs are keyed by their default filename (not their actual
filename). It seems easier to key by the entry type, since this is always
the same for each FDT type.
To do this, add a new Entry method called GetFdtEtype(). This is necessary
since some entry types contain a device tree which are not the simple
three entry types 'u-boot-dtb', 'u-boot-spl' or 'u-boot-tpl'.
The code already returns a dict for GetFdt(). Update the value of that
dict to include the filename so that existing code can work.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function name conflicts with Fdt.Node.GetFdt() which has a different
purpose. Rename it to avoid confusion.
The new name suggests it is indexed by entry type rather than filename.
This will be tidied up in a future commit.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function name conflicts with Entry.GetFdts() which has a different
purpose. Rename it to avoid confusion. Also update a stale comment
relating to this function.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function returns a set of device-tree filenames. It has no
way of returning the actual device-tree object. Change it to a dictionary
so that we can add this feature in a future patch.
Also drop fdt_set since it is no-longer used.
Signed-off-by: Simon Glass <sjg@chromium.org>
Further reduce the size of the main Binman() function by moving this setup
code into its own function.
Note that the 'images' value is accessed from other modules so must be made
a global.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present tout writes directly to stdout. This is not necessary and it
prevents tests from redirecting output. Change it to use print() for the
non-progress output.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present we check the filename to see if an entry holds a device-tree
file. It is easier to use the base class designed for this purpose.
Move this method implementation into Entry_blob_dtb and update the default
one to return an empty set.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present 'dtoc -t' return a success code even if some of the tests fail.
Fix this by checking the test result and setting the exit code. This
allows 'make qcheck' to function as expected.
Signed-off-by: Simon Glass <sjg@chromium.org>
Packed structures like struct uuid are not aligned. GCC 9.1 therefore
throws an error when trying to compile gen_rand_uuid().
lib/uuid.c: In function ‘gen_rand_uuid’:
lib/uuid.c:244:2: error: converting a packed ‘struct uuid’ pointer
(alignment 1) to a ‘unsigned int’ pointer (alignment 4) may result in
an unaligned pointer value [-Werror=address-of-packed-member]
244 | unsigned int *ptr = (unsigned int *)&uuid;
| ^~~~~~~~
Generate the uuid in a properly aligned buffer.
The byte order of a random number should not matter. Do not call
cpu_to_be32() to change the byte order.
Reported-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The pumpkin board is made by Gossamer Engineering and is using
a MediaTek SoC. The board currently comes in two available version:
MT8516 SoC and MT8167 SoC.
The board provides the following IOs: eMMC, NAND, SD card, USB type-A,
Ethernet, Wi-Fi, Bluetooth, Audio (jack out, 2 PDM port, 1 analog in),
serial over USB, and an expansion header.
Additionally there is a HDMI port, DSI port, and camera port only
on the MT8167 version of the board.
The board can be powered by battery and/or via a USB Type-C port and
is using a PMIC MT6392.
The eMMC and NAND are sharing pins and cannot be used together.
This commit is adding the basic boot support for the Pumpkin MT8516
board on the eMMC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Fix the following warning when CONFIG_PINCONF=n:
drivers/pinctrl/mediatek/pinctrl-mtk-common.c:35:36:
warning: ‘mtk_drive’ defined but not used [-Wunused-const-variable=]
static const struct mtk_drive_desc mtk_drive[] = {
^~~~~~~~~
Signed-off-by: Fabien Parent <fparent@baylibre.com>
recently added gpio hog patch was "in discussion"
state with Simon Glass. This patch now adds most
of comments from Simon Glass.
Signed-off-by: Heiko Schocher <hs@denx.de>
commit 49116e6d23 ("doc: arch: Convert README.sandbox to reST")
Moves README.sandbox to doc/arch.
Replace all the existing instances to point to the right documentation
file.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Linker generated array entry is not needed when the command line is
disabled. Remove this code in that case.
This is required as the commit 80a48dd47e
breaks the linking stage when CONFIG_CMDLINE=n:
..
LDS u-boot.lds
LD u-boot
u-boot contains unexpected relocations: R_ARM_NONE
R_ARM_RELATIVE
make: *** [Makefile:1775: checkarmreloc] Error 1
Signed-off-by: Andrej Rosano <andrej.rosano@f-secure.com>
These board index.rst files are missing in previous html doc patch
series, hence it causes some build warnings. Add those files.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When generating the Sphinx documentation with command 'make htmldocs' the
U-Boot logo is displayed with a black box as a background.
Remove the black box.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This patch adds support for an optional optimization to compatible
string matching where the compatible string property from the root node
of the kernel FDT can be copied into the configuration node of the FIT
image. This is most useful when using compressed FDTs or when using FDT
overlays, where the traditional extraction of the compatible string from
the kernel FDT itself is not easily possible.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
This patch adds support for compressing non-kernel image nodes in a FIT
image (kernel nodes could already be compressed previously). This can
reduce the size of FIT images and therefore improve boot times
(especially when an image bundles many different kernel FDTs). The
images will automatically be decompressed on load.
This patch does not support extracting compatible strings from
compressed FDTs, so it's not very helpful in conjunction with
CONFIG_FIT_BEST_MATCH yet, but it can already be used in environments
that select the configuration to load explicitly.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Upcoming patches want to add decompression to use cases that are no
longer directly related to booting. It makes sense to retain a single
decompression routine, but it should no longer be in bootm.c (which is
not compiled for all configurations). This patch moves
bootm_decomp_image() to image.c and renames it to image_decomp() in
preparation of those upcoming patches.
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
[trini: Fix warning around handle_decomp_error being unused]
Signed-off-by: Tom Rini <trini@konsulko.com>
- Clean up and migrate to use common rockchip spl board file
- Clean up and migrate to use common rockchip board file
- Increase rk3288 CONFIG_SYS_BOOTM_LEN to 16MB
Use common board file for board_init() and board_late_init(),
for Rockchip SoCs have very similar process.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Use board_early_init_f() for per-board init operation and
use board_init() from common board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Use common board file for board_init() and board_late_init(),
for Rockchip SoCs have very similar process.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Handle per-board init in board_early_init_f() and use the
common board_init() for per-platform board init later.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Use common board file for board_init() and board_late_init(),
for Rockchip SoCs have very similar process.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Use common board file for board_init() and board_late_init(),
for Rockchip SoCs have very similar process.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Matwey V. Kornilov <matwey.kornilov@gmail.com>
Use common board file for board_init() and board_late_init(),
for Rockchip SoCs have very similar process.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The rk3288_detect_reset_reason() is per-SoC operation, move
it to rk3288.c, and extend the rk_board_late_init() with
rk3288_board_late_init() to make all the board works fine
as before.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The veyron_init() should go to its board file veyron.c,
and the board_early_init_f() could be the right place.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Use common board file for board_init() and board_late_init(),
for Rockchip SoCs have very similar process.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Use common board file for board_init() and board_late_init(),
for Rockchip SoCs have very similar process.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Use common board file for board_init() and board_late_init(),
for Rockchip SoCs have very similar process.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Use common board file for board_init() and board_late_init(),
for Rockchip SoCs have very similar process.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add common board file for Rockchip SoCs to avoid too much
copy-paste work for different SoCs.
This board file in charge for common board_init() and board_late_init()
in U-Boot proper.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Use "snps,dwc2" for compatible name and and common variable
names so that we can share the common code for all SoCs.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The fastboot_set_reboot_flag() update a TAG into a register
for next boot, use the common macro for the register so that
we can re-use the function for different SoCs.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
rk3399 has similar boot flow in SPL with other Rockchip SoCs,
migrate to use common spl board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add a board_early_init_f() in board_init_f() and move the board
specific init code into its own board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Move boot_devices definition into rk3399.c, so that we can
share the common code for board_spl_was_booted_from().
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
rk3368 has similar boot flow in SPL with other Rockchip SoCs,
migrate to use common spl board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
rk3328 has similar boot flow in SPL with other Rockchip SoCs,
migrate to use common spl board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add the CONFIG_ROCKCHIP_STIMER_BASE so that we can use the stimer
init function in tpl.c and spl.c
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
"u-boot,spl-boot-order" is more flexible and other rockchip SoCs
has convert to use it, migrate to use the new dts property.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We are using "u-boot,spl-boot-order" now and re-use the
definition from rk3288-u-boot.dtsi, so remove it directly here.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
rk3288 has similar boot flow in SPL with other Rockchip SoCs,
migrate to use common spl board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Only firefly-rk3288 has the dts node "u-boot,boot-led",
while CONFIG_SPL_LED is not enable, move code to firefly-rk3288
now in case someone need this code.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Update to fix warning:
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/uboot@1
has a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/optee@1
has a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /images/fdt@1
has a unit name, but no reg property
u-boot.itb.tmp: Warning (unit_address_vs_reg): Node /configurations/conf@1
has a unit name, but no reg property
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
rk322x has similar boot flow in SPL with other Rockchip SoCs,
migrate to use common spl board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
rk3188 has similar boot flow in SPL with other Rockchip SoCs,
migrate to use common spl board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
SPL bootrom support is a boot device just like mmc and etc,
use formal boot device instead of jump to bootrom directly.
Enable the Kconfig by default if ROCKCHIP_BACK_TO_BROM is enabled.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Init CPU frquency in clock driver instead of in SPL board file,
this will help for use common board file later.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The common spl board file handles board_init_f() in SPL,
and with board_early_init_f() and arch_cpu_init() callback,
other operateion after board_init_f() should go to board specific
spl_board_init().
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add support for the ddc-i2c-bus device tree property which allows
for using an external i2c master for reading the display's EDID.
Signed-off-by: Niklas Schulze <me@jns.io>
Add support for the new mode_valid() display op to filter out unsupported
display DMT timings.
This is useful when connected to 4k displays, since we only support DMT
monitors up to 1920x1080, the 4k native timings are discarded to select
supported timings.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Introduce a new display op, mode_valid() to be used with the newly
introduced edid_get_timing_validate() function, to filter supported
monitor timings if handled by the display driver.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The original edid_get_timing() function returns the first valid timing,
but on some plaforms, we could only supports a subset of the listed
monitot's navite timing.
Let's introduce a edid_get_timing_validate() adding a mode_valid callback
including a private cookie pointer.
If the callback returns false, the current timing is discared and the next
one is checked. If no valid & supported timings are found, the function
would return an error.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
in case of bmp_logo, the video_bmp driver is used for
drawing a bmp logo. This driver supports only "full"
bmp data. Adding a logo with the bmp_logo tool to
u-boot binary adds currently only real data and drops
the bmp header.
This patch adds now the full bmp data to the u-boot
binary, so video_bmp driver works with the logo embedded
into u-boot.
Fixed also some checkpatch error poping up with this
patch.
Signed-off-by: Heiko Schocher <hs@denx.de>
Provide proper display timings for lcdif node, used by mxsfb DM_VIDEO
enabled framebuffer driver.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
1. This fixes linking issues when building with DM_VIDEO enabled mxsfb
driver.
2. Provide proper defines for both VIDEO=y and DM_VIDEO=y.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Add dumb node for NXP Display Control Unit0(DCU), which permits DM_ENABLED
converted driver to be probed. Currently no display timings are provided
in this node.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Extend the driver to build with DM_VIDEO enabled. DTS files
must additionally include 'u-boot,dm-pre-reloc' property in
soc and child nodes to enable driver binding to fsl_dcu_fb device.
Currently display timings aren't obtained from DT.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Move dcu-related code to fsl_dcu_probe_common, keep in video_hw_init()
only legacy video stack (filling GraphicPanel struct etc.).
Add wrappers for all init functions, that will let to provide
struct fb_info as an additional param (needed for further moving it from
the global scope to driver private data struct in DM converted driver).
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
ttyO2 console enables legacy CONFIG_SERIAL_OMAP driver in kernel.
Nowadays it's preferred to use the generic CONFIG_SERIAL_8250_OMAP
driver, which being enabled via ttyS2 console. Both drivers are enabled
in multi_v7_defconfig and in omap2plus_defconfig, for compatibility
reasons. Let's switch to ttyS2 console, to be sure that standard 8250
serial driver is used.
Similar behavior can be also achieved by enabling
CONFIG_SERIAL_8250_OMAP_TTYO_FIXUP option in kernel, but it's better not
to rely on that, as it can be disabled or removed after transitional
period.
Right now on DRA7/AM57x platforms the 8250-omap driver is being probed
first, and omap-serial driver is only probed if the first one failed.
It can be seen from uart3 definition in arch/arm/boot/dts/dra7-l4.dtsi:
compatible = "ti,dra742-uart", "ti,omap4-uart";
So the kernel already uses 8250 driver. This change basically allows
kernel developers to throw away the omap-serial driver and associated
compatibility options. Similar discussions [1,2] have started several
years ago, so it should be safe to do that now.
[1] https://patchwork.kernel.org/patch/6198471/
[2] http://processors.wiki.ti.com/index.php/Sitara_Linux_UART_-_Switching_to_8250_Driver
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Andrew F. Davis <afd@ti.com>
[trini: Update omap5_uevm]
Signed-off-by: Tom Rini <trini@konsulko.com>
linux-mainline with multi_v7_defconfig + Android configs takes more
space than regular TI Android kernel and bootm will fail to load it.
Let's increase max kernel size up to 64 MiB to make it possible to run
such kernel.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
The DA8850-evm supports DM_I2C and boots with SPL_DM, so we can
drop some of the code which disables DM_I2C in SPL. This
patch removes some #undef's now rendered obsolete.
Signed-off-by: Adam Ford <aford173@gmail.com>
The SOM-LV and Torpedo boards are very similar, but something
happened growing SPL enough to break the Torpedo. The SOM-LV
board were not doing alias sequencing during SPL and they
continue to work while something broke the Torpedo. This
patch disables SPL_DM_SEQ_ALIAS allowing it to boot again.
Signed-off-by: Adam Ford <aford173@gmail.com>
OHCI was added with DM_USB support, so there are a few unneeded
items in the header file that can be removed. This also
unifies da850evm with NOR and NAND booting options so all have
OHCI support.
Signed-off-by: Adam Ford <aford173@gmail.com>
[trini: Migrate da850_am18xxevm]
Signed-off-by: Tom Rini <trini@konsulko.com>
This patch enables the pinmuxing to support gpio_57 for phy reset
and fixes the pinmuxing for the ECHI tranceiver. The clocks
don't appear to by fully enabled yet, so OMAP-EHCI on am3517 is
still not yet working, but we're one step closer.
Signed-off-by: Adam Ford <aford173@gmail.com>
The OMAP35 and AM/DM37 Torpedo boards do not have a USB
tranceiver connected to the USB host port, so this patch
removes it from the defconfig files.
Signed-off-by: Adam Ford <aford173@gmail.com>
The SOM-LV boards support the OMAP EHCI driver using port 2.
With the driver updated to support device tree, this patch sets
the corresponding pin muxing for the tranceiver as well as the
reset pin.
Signed-off-by: Adam Ford <aford173@gmail.com>
With both SPL and U-Boot now supporting DM, we can start removing
legacy code. This patch removes the legacy MMC initalization and
legacy I2C initialization since both are now available via DM and
device tree.
Signed-off-by: Adam Ford <aford173@gmail.com>
Like the other Logic PD OMAP35/DM37 boards, this board has device
tree enabled for U-Boot. This patch converts the board to enable
SPL_OF_CONTROL and further shrinks the device tree in SPL to limit
it to UART3 (console), MMC1, i2c1, and GPIO4 (for mmc1 CD and WP).
There appears to be a bug in minicom so users may need to
switch the minicom terminal emulation to ANSI from VT102 due
to the junk that gets pushed out of the UART on startup.
Signed-off-by: Adam Ford <aford173@gmail.com>
arch_cpu_init() initializes the pinmuxing which is called fairly
early in the start sequences, so the board_init function doesn't
need to do it again. This patch removes the call from board_init.
Signed-off-by: Adam Ford <aford173@gmail.com>
The Low Level init functions start the UART, so it doesn't need
to happen during board_init. This patch removes it from
board_init.
Signed-off-by: Adam Ford <aford173@gmail.com>
The reset line going to the ethernet controller is controlled
by a global reset controlling multiple peripherals. There
is no need to manually invoke the reset.
Signed-off-by: Adam Ford <aford173@gmail.com>
The PBIAS regulator is available on OMAP3's, and it's shared on
the AM35, so this patch enables that in U-Boot along with GPIO
based regulators.
Signed-off-by: Adam Ford <aford173@gmail.com>
Update the MMC2_HS200_MANUAL1 iodelay values to match with the latest
dra76x data manual[1].
Also this particular pinctrl-array is using spaces instead of tabs for
spacing between the values and the comments. Fix this as well.
[1] http://www.ti.com/lit/ds/symlink/dra76p.pdf
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
If UHS speed modes are enabled, a compatible SD card switches down to 1.8V
during enumeration. If after this a software reboot/crash takes place and
on-chip ROM tries to enumerate the SD card, the difference in
IO voltages (host @ 3.3V and card @ 1.8V) may end up damaging the card.
The fix for this is to have support for power cycling the card in
hardware (with a PORz/soft-reset line causing a power cycle of the card).
Because the beaglebone X15 (rev A,B and C), am57xx-evms and am57xx-idks don't
have this capability, disable voltage switching for these boards.
The major effect of this is that the maximum supported speed mode is now
high speed(50 MHz) down from SDR104(200 MHz).
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Sync with kernel dts by adding pinmuxes for mmc1 and mmc2. This fixes an
issue where mmc2 (eMMC) was coming up in HS52 mode instead of the
highest DDR52 mode.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
During a short period when the bus voltage is switched from 3.3v to 1.8v,
(to enumerate UHS mode), the mmc module is disabled and the mmc IO lines
are kept in a state according to the programmed pad mux pull type.
According to 4.2.4.2 Timing to Switch Signal Voltage in "SD Specifications
Part 1 Physical Layer Specification Version 5.00 February 22, 2016", the
host should hold CLK low for at least 5ms.
In order to keep the card line low during voltage switch, the pad mux of
mmc1_clk line should be configured to pull down.
Add a new pinctrl group for clock line without pullup to be used in boards
where mmc1_clk line is not connected to an external pullup.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Add initial defconfig support for J721e that runs on A72.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Add MAINTAINERS entry]
Signed-off-by: Tom Rini <trini@konsulko.com>
Add initial defconfig support for J721e that runs on R5.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[trini: Add MAINTAINERS file]
Signed-off-by: Tom Rini <trini@konsulko.com>
Common Processor board is the baseboard that has most of the actual connectors,
power supply etc. A SOM (System on Module) is plugged on to the common
processor board and this contains the SoC, PMIC, DDR and basic highspeed
components necessary for functionality. Add initial dt support for this
common processor board.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add pinctrl macros for J721E SoC. These macro definitions are
similar to that of AM6, but adding new definitions to avoid
any naming confusions in the soc dts files.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
The j721e 4 bit instances don't have a hard DLL and therefore don't need
any DLL related configurations. Split the compatibles into an 8 bit and a
4 bit one. Add a private flags field which can be used to check if the
DLL is present and don't register the set_ios_post callback for the 4 bit
compatible instances.
Also update the compatibles in k3-j721e-main.dtsi to avoid breaking boot
with the new compatibles.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Create a ft_board_setup() api that gets called as part of
DT fixup before jumping to kernel. In this ft_board_setup()
call fdt_fixup_msmc_ram that update msmc sram node.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The A72 U-Boot code loads and boots a number of remote processors
including the C71x DSP, both the C66_0 and C66_1 DSPs, and the various
Main R5FSS Cores. Change the memory attributes for the DDR regions used
by the remote processors so that the cores can see and execute the
proper code.
A separate table based on the current AM65x table is added for J721E SoCs,
since the number of remote processors and their DDR usage will be different
between the two SoC families.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Use the System Firmware (SYSFW) loader framework to load and start
the SYSFW as part of the J721E early initialization sequence. While
at it also initialize the MCU_UART0 pinmux as it is used by SYSFW
to print diagnostic messages.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Populate the release_resources_for_core_shutdown() api with
shutting down r5 cores so that it will by called just after
jumping to ATF.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Obtain the boot index as left behind by the device boot ROM and store
it in scratch pad SRAM for later use before it may get overwritten.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
To access various control MMR functionality the registers need to
be unlocked. Do that for all control MMR regions in the MCU and MAIN
domains. We may want to go back later and limit the unlocking that's
being done.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
J721E allows for booting from primary or backup boot media.
Both media can be chosen individually based on switch settings.
ROM looks for a valid image in primary boot media, if not found
then looks in backup boot media. In order to pass this boot media
information to boot loader, ROM stores a value at a particular
address. Add support for reading this information and determining
the boot media correctly.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
The J721E SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable lower system costs
of automotive applications such as infotainment, cluster, premium
Audio, Gateway, industrial and a range of broad market applications.
This SoC is designed around reducing the system cost by eliminating
the need of an external system MCU and is targeted towards ASIL-B/C
certification/requirements in addition to allowing complex software
and system use-cases.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, three clusters of lockstep
capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA),
C7x floating point Vector DSP, Two C66x floating point DSPs.
* 3D GPU PowerVR Rogue 8XE GE8430
* Vision Processing Accelerator (VPAC) with image signal processor and Depth
and Motion Processing Accelerator (DMPAC)
* Two Gigabit Industrial Communication Subsystems (ICSSG), each with dual
PRUs and dual RTUs
* Two CSI2.0 4L RX plus one CSI2.0 4L TX, one eDP/DP, One DSI Tx, and
up to two DPI interfaces.
* Integrated Ethernet switch supporting up to a total of 8 external ports in
addition to legacy Ethernet switch of up to 2 ports.
* System MMU (SMMU) Version 3.0 and advanced virtualisation
capabilities.
* Upto 4 PCIe-GEN3 controllers, 2 USB3.0 Dual-role device subsystems,
16 MCANs, 12 McASP, eMMC and SD, UFS, OSPI/HyperBus memory controller, QSPI,
I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals.
* Two hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
* Configurable L3 Cache and IO-coherent architecture with high data throughput
capable distributed DMA architecture under NAVSS
* Centralized System Controller for Security, Power, and Resource
Management (DMSC)
See J721E Technical Reference Manual (SPRUIL1, May 2019)
for further details: http://www.ti.com/lit/pdf/spruil1
Add base support for J721E SoC
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
k3_rproc driver is specifically meant for controlling an arm64
core using TISCI protocol. So rename the driver, Kconfig symbol,
compatible and functions accordingly.
While at it drop this remoteproc selection for a53 defconfig.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Update the k3_rproc driver to use the generic ti_sci_proc helper
apis which simplifies the driver a bit.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Texas Instruments' K3 generation SoCs has specific modules/register
spaces used for configuring the various aspects of a remote processor.
These include power, reset, boot vector and other configuration features
specific to each compute processor present on the SoC. These registers
are managed by the System Controller such as DMSC on K3 AM65x SoCs.
The Texas Instrument's System Control Interface (TI-SCI) Message Protocol
is used to communicate to the System Controller from various compute
processors to invoke specific services provided by the firmware running
on the System Controller.
Add a common processor control interface header file that can be used by
multiple remoteproc drivers. The helper functions within this header file
abstract the various TI SCI protocol ops for the remoteproc drivers, and
allow them to request the System Controller to be able to program and
manage various remote processors on the SoC. The common macros required
by the R5 remoteproc driver were also added. The remoteproc drivers are
expected to manage the life-cycle of their ti_sci_proc_dev local
structures.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
'rproc list' is currently allowed only after probing all the
available remoteproc devices. Given that 'rproc init' is updated
to probe and initialize devices individually, allow the 'rproc list'
command to print all probed devices at any point.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
'rproc init' does the probe and initialization of all the available
remoteproc devices in the system. This doesn't allow the flexibility
to initialize the remote cores needed as per use case. In order
to provide flexibility, update 'rproc init' command to accept one
more parameter with rproc id which when passed initializes only
that specific core. If no id is passed, command will initializes
all the cores which is compatible with the existing behaviour.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Update the power-domain-cells to 2 and add the permissions
to each node. Mark the following nodes accessed by r5 as shared:
- DDR node
- main uart 0
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
TISCI protocol supports for enabling the device either with exclusive
permissions for the requesting host or with sharing across the hosts.
There are certain devices which are exclusive to Linux context and
there are certain devices that are shared across different host contexts.
So add support for getting this information from DT by increasing
the power-domain cells to 2.
For keeping the DT backward compatibility intact, defaulting the
device permissions to set the exclusive flag set. In this case the
power-domain-cells is 1.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
TISCI protocol supports for enabling the device either with exclusive
permissions for the requesting host or with sharing across the hosts.
There are certain devices which are exclusive to Linux context and
there are certain devices that are shared across different host contexts.
So add support for getting this information from DT by increasing
the power-domain cells to 2.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Certain drivers want to attach private data corresponding to each
power domain. This data might be specific be to the drvier. So add
a priv entry into the power_domain structure.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Rather than simply parking the R5 core in WFE after starting up ATF
on A53 instead use SYSFW API to properly shut down the R5 CPU cores
as well as associated timer resources that were pre-allocated. This
allows software further downstream to properly and gracefully bring
the R5 cores back online if desired.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Any host while requesting for a device can request for its exclusive
access. If an exclusive permission is obtained then it is the host's
responsibility to release the device before the software entity on
the host completes its execution. Else any other host's request for
the device will be nacked. So add a command that releases all the
exclusive devices that is acquired by the current host. This should
be used with utmost care and can be called only at the end of the
execution.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Add and expose a new processor shutdown API that wraps the two TISCI
messages involved in initiating a core shutdown. The API will first
queue a message to have the DMSC wait for a certain processor boot
status to happen followed by a message to trigger the actual shutdown-
with both messages being sent without waiting or requesting for a
response. Note that the processor shutdown API call will need to be
followed up by user software placing the respective core into either
WFE or WFI mode.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Sysfw provides an option for requesting exclusive access for a
device using the flags MSG_FLAG_DEVICE_EXCLUSIVE. If this flag is
not used, the device is meant to be shared across hosts. Once a device
is requested from a host with this flag set, any request to this
device from a different host will be nacked by sysfw. Current tisci
driver enables this flag for every device requests. But this may not
be true for all the devices. So provide a separate commands in driver
for exclusive and shared device requests.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
boot_devices may defined in soc file, and used in board file,
we need to delear it in header file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The boot source from BootRom is store at a fix offset of IRAM,
update to use the common macro instead of rk3399 specific one.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip SoCs have internal sram for bootrom data area and for
sdram init program space. Introduce the base address in case
we need to use it.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The CONFIG_SYS_NS16550_MEM32 already defined in
rockchip_common.h, no need to define again in soc
level header.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The default value of CONFIG_SYS_BOOTM_LEN is 0x800000 i.e, 8MB which
causes board reset because of larger uImage size.
This was tested on rk3288 Amarula Vyasa and rk3288 Asus Tinker
boards.
Error log snippet:
Booting using the fdt blob at 0x1f00000
Loading Kernel Image ... Image too large: increase CONFIG_SYS_BOOTM_LEN
Must RESET board to recover
resetting ...
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
H3/H5 can either use the internal phy or an external one.
Before getting clock and resets for the internal phy,
test that we are using it because otherwise it break emac
when using an external phy.
Tested-on: OrangePi PC2 (H5)
Fixes: 2348453c41 (net: sun8i_emac: Add EPHY CLK and RESET support)
Signed-off-by: Emmanuel Vadot <manu@freebsd.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Now that we removed all legacy boards selecting TI_EMAC we can
completely convert the driver code to using the driver model.
This patch also updates all remaining users of davinci_emac.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Tested-by: Adam Ford <aford173@gmail.com> #am3517-evm & da850-evm
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
We typically use same set of distro images (yocto, debian, fedora, etc.)
on both QEMU RISC-V virt machine and SiFive Unleashed board.
With growing kernel and ramdisk images, we need to re-adjust default
U-Boot environment variables. The config header for QEMU RISC-V virt
machine has been already updated to handle bigger kernel and ramdisk
images hence this patch updates SiFive FU540 config header accordingly.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Tested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Instead of depending on CONFIG_SYS_LITTLE_ENDIAN, we check at runtime
whether underlying system is little-endian or big-endian. This way
we are not dependent on any U-Boot specific OR compiler specific macro
to check system endianness.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The SiFive MACB ethernet has a custom TX_CLK_SEL register to select
different TX clock for 1000mbps vs 10/100mbps.
This patch adds SiFive MACB compatible string and extends the MACB
ethernet driver to change TX clock using TX_CLK_SEL register for
SiFive MACB.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The LS1021A-TSN is a development board built by VVDN/Argonboards in
partnership with NXP.
It features the LS1021A SoC and the first-generation SJA1105T Ethernet
switch for prototyping implementations of a subset of IEEE 802.1 TSN
standards.
Supported boot media: microSD card (via SPL), QSPI flash.
Rev. A of the board uses a Spansion S25FL512S_256K serial flash, which
is 64 MB in size and has an erase sector size of 256KB (therefore,
flashing the RCW would erase part of U-Boot).
Rev. B and C of the board use a Spansion S25FL256S1 serial flash, which
is only 32 MB in size but has an erase sector size of 64KB (therefore
the RCW image can be flashed without erasing U-Boot).
To avoid the problems above, the U-Boot base address has been selected
at 0x100000 (the start of the 5th 256KB erase sector), which works for
all board revisions. Actually 0x40000 would have been enough, but
0x100000 is common for all Layerscape devices.
eTSEC3 is connecting directly to SJA1105 via an RGMII fixed-link, but
SJA1105 is currently not supported by uboot. Therefore, eTSEC3 is
disabled.
Signed-off-by: Xiaoliang Yang <xiaoliang.yang_1@nxp.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Jianchao Wang <jianchao.wang@nxp.com>
Signed-off-by: Changming Huang <jerry.huang@nxp.com>
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
[Vladimir] Code taken from https://github.com/openil/u-boot (which
itself is mostly copied from ls1021a-iot) and adapted with the following
changes:
- Add a008850 errata workaround
- Converted eTSEC, MMC to DM to avoid all build warnings
- Plugged in distro boot feature, including support for extlinux.conf
- Added defconfig for QSPI boot
- Added the board/freescale/ls1021atsn/README.rst for initial setup
- Increased CONFIG_SYS_MONITOR_LEN so that the SPL malloc pool does not
get overwritten during copying of the u-boot.bin payload from MMC to
DDR.
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Due to a typo, "run qspi_bootcmd" and "env exists secureboot" got
concatenated instead of being separated by a semicolon.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Now that we have added driver model support to the TSEC driver,
convert ls1021atwr board to use it.
This depends on previous DM series for ls1021atwr:
http://patchwork.ozlabs.org/patch/561855/
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
[Vladimir] Made the following changes:
- Added 'status = "disabled";' for all Ethernet ports in ls1021a.dtsi
- Fixed the confusion between the SGMII/TBI PCS for enet0 and enet1 -
a mistake ported over from Linux. Each SGMII PCS lies on the private
MDIO bus of the interface (and the RGMII enet2 has no SGMII PCS).
- Added CONFIG_DM_ETH to all ls1021atwr_* defconfigs
- Completely removed non-DM_ETH support from ls1021atwr
- Changed "compatible" string from "fsl,tsec-mdio" to "fsl,etsec2-mdio"
and from "fsl,tsec" to "fsl,etsec2" to match Linux
In the case of the tsec network driver, so far there has been no
mainline user of DM_ETH where the DT bindings get used.
In the case of the mdio bus, it looks like the "fsl,tsec-mdio" string
was made up for the documentation, but there is no mainline code that
parses the "compatible" property anyway.
In both cases, there are no DT blobs that contain the old strings.
So change the documentation to "fsl,etsec2" for the Ethernet ports and
"fsl,etsec2-mdio" for the MDIO buses, which are strings that Linux also
uses, at least for LS1021A. More compatible strings can be added once
other (PowerPC) SoCs are migrated to DM_ETH.
The current ls1021a.dtsi doesn't match what was documented for the MDIO
buses anyway (the "compatible" is "gianfar" currently). This will be
fixed in the next patch.
Fixes: 69a00875e3 ("doc: dt-bindings: Describe Freescale TSEC ethernet controller")
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
In tsec_init, the MAC address is retrieved from 2 different structures
depending on whether DM_ETH is enabled or not.
But since the field name is the same inside both structures, we can
conditionally define the structure of the correct type and simplify the
assignments.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This replaces debug() calls with printf() so that it is immediately
obvious from the console that something is wrong.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is a cosmetic patch that reorders variable definitions in the
inverse order of their line length, where possible.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
By convention, the eTSEC MDIO controller nodes are defined in DT at
0x2d24000 and 0x2d50000, but actually U-Boot does not touch the
interrupt portion of the register map (MDIO_IEVENTM, MDIO_IMASKM,
MDIO_EMAPM).
That leaves only the MDIO bus registers (MDIO_MIIMCFG, MDIO_MIIMCOM,
MDIO_MIIMADD, MDIO_MIIMADD, MDIO_MIIMCON, MDIO_MIIMSTAT) which start at
the 0x520 offset.
So shift the DT-defined register map by the offset of MDIO_MIIMCFG when
mapping the MDIO bus registers.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The point of this patch is to eliminate the use of the locally-defined
"reg" variable (which interferes with next patch) and simplify the
fallback to the default CONFIG_SYS_TBIPA_VALUE in case "tbi-handle" is
missing.
Signed-off-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Macb Ethernet controller requires a RX buffer of 128 bytes. It is
highly sub-optimal for Gigabit-capable GEM that is able to use
a bigger DMA buffer. Change this constant and associated macros
with data stored in the private structure.
RX DMA buffer size has to be multiple of 64 bytes as indicated in
DMA Configuration Register specification.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
DMA configuration was heavily dependent on the HW
defaults, add function to properly set the required
fields, including the new dma_burst_length.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
GEM support higher DMA burst writes/reads than the default (4).
add configuration structure with dma burst length so it could be
applied later to DMA configuration.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
macb.h provides macros for reading/setting bitfields,
in macb registers and descriptors. use that instead
of redefining them in the source file.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Few registers and bits were added by Cadence and
they were not updated in the headers.
Take the latest definitions as defined in Linux
header (5.1) that also includes some comments
about existing registers.
One register was improperly named (UR), fix that.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This driver is used for MDIO muxes driven over I2C. This is currently
used on Freescale LS1028A QDS board, on which the physical MDIO MUX is
controlled by an on-board FPGA which in turn is configured through I2C.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Using 'phy_connect' instead of 'phy_find_by_mask' and 'phy_connect_dev'
both deduplicates code and adds support for 'fixed-link'.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
SGMII 2500 as supported on NXP SoCs requires AN to be disabled, handle
this case in the enetc sgmii init code.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Ethernet interfaces using serial protocols go through the serdes block
integrated in the SoC. This is accessed over dedicated internal MDIOs
which are part of the Ethernet PCI functions. Set up serdes at _start,
along with other protocol specific port/MAC configuration.
MDIO code is shared with enetc_mdio, read/write functions are exported
from fsl_enetc_mdio for this reason.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Adds a driver for the MDIO interface currently integrated in LS1028A SoC.
This MDIO interface is shared by multiple ethernet interfaces and is
presented as a stand-alone PCI function on the SoC ECAM.
Ethernet has a functional dependency on MDIO, for simplicity there is a
single config option for both.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Adds a driver for NXP ENETC ethernet controller currently integrated in
LS1028A. ENETC is a fairly straight-forward BD ring device and interfaces
are presented as PCI EPs on the SoC ECAM.
Signed-off-by: Catalin Horghidan <catalin.horghidan@nxp.com>
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Since u-boot has added the spi-mem framework and replaced
the spi-nor framework, the mtk_qspi is no longer compatible
with the new spi-nor driver.
Remove this driver along with replacing config item
with new mtk spi-nor driver.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
[jagan: squash related changes and update commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
- Add in lzma-alone for current binman tests
- Update to Ubuntu's xenial-20190720 tag (latest).
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reduce power domain calls when CONFIG_POWER_DOMAIN is disabled.
With gcc v8.2, this change saves 104 bytes.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Right now when using clk_of_xlate_default(), clk->data
remains un-initialized because clk_get_bulk() does not
initialize memory on allocation of clock structure.
This can cause problems when data is used to match if
two clocks pointers are exactly the same underlying
clocks, for example.
Fix it by initializing clk->data to 0.
Suggested-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Sekhar Nori <nsekhar@ti.com>
The uclass_next_device() routine continues a previously started device
iteration. Change the description that is copied from
uclass_first_device().
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Simon Glass <sjg@chromium.org>
The fdt_pci_dma_ranges() cannot work on e.g. ARM, since the DT entries
endianness is not adjusted at all. Fix this.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
The comments of dev_read_name() wrongly describe "node" as its
parameter.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Per device tree spec, "status" property can have a value of "okay",
or "disabled", but not "disable".
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Without a valid ofnode, it's meaningless to call clk_set_defaults()
to process various properties.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
It is possible that a timer device has a null ofnode, hence there is
no need to further parse DT for the clock rate.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Currently, fdt_get_base_address() returns 0 if the "reg" property is
missing. Since 0 is a valid value, it is not suitable for the error
handling. Return OF_BAD_ADDR instead.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Current test coverage is likely sufficient for the logic used to place
sections in the image. However it seems useful to add a test specifically
for nested sections, since these could have some unusual interactions.
Add a new test for this and aligned sections. This test failed before the
refactor to drop the bsection.py file (Section class), but passes now.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to extract all binaries from the image, or a
subset of them. Add a new 'extract' command to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
CBFS is a bit like a section but with a custom format. Provide the list of
entries and the compression type to binman so that it can extract the data
from the CBFS, just like any other part of the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to extract entry contents from an image to see
what is inside. Add a simple function to read the contents of an entry,
decompressing it by default.
Signed-off-by: Simon Glass <sjg@chromium.org>
Binman generally operates silently but in some cases it is useful to see
what Binman is actually doing at each step. Enable some logging output
with different logging levels selectable via the -v flag.
Signed-off-by: Simon Glass <sjg@chromium.org>
When support for sections (and thus hierarchical images) was added to
binman, the decision was made to create a new Section class which could
be used by both Image and an Entry_section class. The decision between
using inheritance and composition was tricky to make, but in the end it
was decided that Image was different enough from Entry that it made sense
to put the implementation of sections in an entirely separate class. It
also has the advantage that core Image code does have to rely on an entry
class in the etype directory.
This work was mostly completed in commit:
8f1da50ccc "binman: Refactor much of the image code into 'section'
As a result of this, the Section class has its own version of things like
offset and size and these must be kept in sync with the parent
Entry_section class in some cases.
In the last year it has become apparent that the cost of keeping things in
sync is larger than expected, since more and more code wants to access
these properties.
An alternative approach, previously considered and rejected, now seems
better.
Adjust Image to be a subclass of Entry_section. Move the code from Section
(in bsection.py) to Entry_section and delete Section. Update all tests
accordingly.
This requires substantial changes to Image. Overall the changes reduce
code size by about 240 lines. While much of that is just boilerplate from
Section, there are quite a few functions in Entry_section which now do not
need to be overiden from Entry. This suggests the change is beneficial
even without further functionality being added.
A side benefit is that the properties of sections are now consistent with
other entries. This fixes a problem in testListCmd() where some properties
are missing for sections.
Unfortunately this is a very large commit since it is not feasible to do
the migration piecemeal. Given the substantial tests available and the
100% code coverage of binman, we should be able to do this safely.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is possible to read an Image, locate its FDT map and then read it into
the binman data structures. This allows full access to the entries that
were written to the image. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for locating an image's Fdt map which is used to determine
the contents and structure of the image.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to summarise all the entries in an image, e.g. to
display this to this user. Add a new ListEntries() method to Entry, and
set up a way to call it through the Image class.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to add the CBFS file information (offset, size, etc.) into
the FDT so that the layout is complete. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
The purpose of this badly named field is a bit ambiguous. Adjust the code
to use it only to store the uncompressed length of a file, leaving it set
to None if there is no compression used. This makes it easy to see if the
value in this field is relevant / useful.
Also set data_len for compressed fields, since it should be the length of
the compressed data, not the uncompressed data.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present a file with no explicit CBFS offset is placed in the next
available location but there is no way to find out where it ended up.
Update and rename the get_data() function to provide this information.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the logic skips the blob class' handling of compression, so
this is not supported with device tree entries. Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for detecting entries that change size after they have already
been packed, and re-running packing when it happens.
This removes the limitation that entry size cannot change after
PackEntries() is called.
Signed-off-by: Simon Glass <sjg@chromium.org>
We plan to support changing the size of entries after they have been
packed. For now it will always be enabled. But to aid testing of both
cases (in the event that we want to add a command-line flag, for example),
add a setting to control it.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present if this function tries to update the contents such that the
size changes, it raises an error. We plan to add the ability to change
the size of entries after packing is completed, since in some cases it is
not possible to determine the size in advance.
An example of this is with a compressed device tree, where the values
of the device tree change in SetCalculatedProperties() or
ProcessEntryContents(). While the device tree itself does not change size,
since placeholders for any new properties have already bee added by
AddMissingProperties(), we cannot predict the size of the device tree
after compression. If a value changes from 0 to 0x1234 (say), then the
compressed device tree may expand.
As a first step towards supporting this, make ProcessContentsUpdate()
return a value indicating whether the content size is OK. For now this is
always True (since otherwise binman raises an error), but later patches
will adjust this.
Signed-off-by: Simon Glass <sjg@chromium.org>
SetContents() should only be called to set the contents of an entry from
within the ObtainContents() call, since it has no guard against increasing
the size of the contents, thus triggering incorrect operation.
Change all such calls to use ProcessUpdateContents() instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This function raises an exception with its arguments around the wrong way
so the message is incorrect. Fix this as well as a few minor comment
problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present entry modules can only be accessed using Entry.Lookup() or
Entry.Create(). Most of the time this is fine, but sometimes a module
needs to provide constants or helper functions useful to other modules.
It is easier in this case to use 'import'.
Add an __init__ file to permit this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Compression is currently available only with blobs. However we want to
report the compression algorithm and uncompressed size for all entries,
so that other entry types can support compression. This will help with
the forthcoming 'list' feature which lists entries in the image.
Move the compression properties into the base class. Also fix up the docs
which had the wrong property name.
Signed-off-by: Simon Glass <sjg@chromium.org>
This class is the new way to handle arguments in Python. Convert binman
over to use it. At the same time, introduce commands so that we can
separate out the different parts of binman functionality.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to be able to quickly locate the FDT map in the image. An
easy way to do this is with a pointer at the start or end of the image.
Add an 'image header' entry, which places a magic number followed by a
pointer to the FDT map. This can be located at the start or end of the
image, or at a chosen location.
As part of this, update GetSiblingImagePos() to detect missing siblings.
Signed-off-by: Simon Glass <sjg@chromium.org>
An FDT map is an entry which holds a full description of the image
entries, in FDT format. It can be discovered using the magic string at
its start. Tools can locate and read this entry to find out what entries
are in the image and where each entry is located.
Signed-off-by: Simon Glass <sjg@chromium.org>
Quite a few tests will use a real device tree and need it updated with the
binman metadata. Add a helper function for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
The current test for the 'entry' module is a bit convoluted since it has
to import the module multiple times. It also relies on ordering, in that
test1EntryNoImportLib() must run before test2EntryImportLib() if they are
running in the same Python process.
This is unreliable since neither the ordering of tests nor the process
that they run in is defined.
Fix this by always reloading the entry in these two tests. Also add a
check that the expected value of have_importlib is obtained.
This corrects a code-coverage problem in the 'entry' module on some
systems.
Signed-off-by: Simon Glass <sjg@chromium.org>
A feature of CBFS is that it allows files to be positioned at particular
offset (as with binman in general). This is useful to support
execute-in-place (XIP) code, since this may not be relocatable.
Add a new cbfs-offset property to control this.
Signed-off-by: Simon Glass <sjg@chromium.org>
When there is lots of open space in a CBFS it is normally padded with
'empty' files so that sequentially scanning the CBFS can skip from one to
the next without a break.
Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
An Integrated Firmware Image is used to hold various binaries used for
booting with Apollolake and some later devices. Add support for this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add support for putting CBFSs (Coreboot Filesystems) in an image. This
allows binman to produce firmware images used by coreboot to boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Coreboot uses a simple flash-based filesystem called Coreboot Filesystem
(CBFS) to organise files used during boot. This allows files to be named
and their position in the flash to be set. It has special features for
dealing with x86 devices which typically memory-map their SPI flash to the
top of 32-bit address space and need a 'boot block' ending there.
Create a library to help create and read CBFS files. This includes a
writer class, a reader class and associated other helpers. Only a subset
of features are currently supported.
Signed-off-by: Simon Glass <sjg@chromium.org>
This tool has quite a few arguments and options, so put the functionality
in a function so that we call it from one place and hopefully get it
right.
Signed-off-by: Simon Glass <sjg@chromium.org>
Tools like ifwitool may not be available in the PATH, but are available in
the build. These tools may be needed by tests, so allow tests to use the
--toolpath flag.
Also use this flag with travis.
Signed-off-by: Simon Glass <sjg@chromium.org>
This patch solves the following warnings:
arch/arm/mach-stm32mp/psci.c:
warning: no previous prototype for ‘psci_set_state’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_arch_cpu_entry’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_features’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_version’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_affinity_info’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_migrate_info_type’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_cpu_on’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_cpu_off’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_system_reset’ [-Wmissing-prototypes]
warning: no previous prototype for ‘psci_system_off’ [-Wmissing-prototypes]
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Starting libvirt v5.3.0 with QEMU 4.0.0 use of PCI is automatic
and thus storage is connected via PCI, which is not visible to
U-Boot out-of-the-box.
Refactor to do "pci enum" followed by "virtio scan" to see PCI
connected storage, and allow bootloader to load kernel and
initramfs images.
Tested with Fedora/RISCV using releases: libvirt 5.4.0 & 5.5.0,
QEMU 4.0.0 and U-Boot 2019.07 RC4.
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
The rproc uclass driver can either be built with SPL_REMOTEPROC
or REMOTEPROC, but the function prototypes in remoteproc.h are
defined only when CONFIG_REMOTEPROC is defined. This can cause
build issues in SPL if CONFIG_REMOTEPROC is not selected.
Fix this by replacing the existing precompiler macro usage with
CONFIG_IS_ENABLED.
Fixes: ddf56bc7e3 ("drivers: Introduce a simplified remoteproc framework")
Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Increment conf id to avoid to have two same conf name
into one configuration description.
Signed-off-by: Mickaël Tansorier <mickael.tansorier@smile.fr>
With Sphinx documentation moving from Documentation directory
to doc directory, we missed updating .gitignore for the Sphinx
build output directory.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Support load of the U-Boot image from raw SATA disk sector. This is
equivalent to load from MMC raw sector.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
kernel-doc fails to parse function definitions like the one below
efi_status_t efi_create_event(uint32_t type, efi_uintn_t notify_tpl,
void (EFIAPI *notify_function) (
struct efi_event *event,
void *context),
void *notify_context, efi_guid_t *group,
struct efi_event **event)
{
due to the "EFIAPI" attribute preceding the function name.
cf. https://lkml.org/lkml/2018/9/3/1185
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Recent versions of sphinx will emit messages like:
doc/sphinx/kerneldoc.py:103:
RemovedInSphinx20Warning: app.warning() is now deprecated.
Use sphinx.util.logging instead.
Switch to sphinx.util.logging to make this unsightly message go away.
Alas, that interface was only added in version 1.6, so we have to add a
version check to keep things working with older sphinxes.
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Rebased for U-Boot
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add support for A/B boot process on AM57xx based boards:
1. Define 'slot_suffix' variable (using 'ab_select' command)
2. Extend 'emmc_android_boot' boot command (add commands for A/B boot
process)
'ab_select' command is used to decide which slot should be used for
booting up. A/B metadata resides in 'misc' partition.
To activate the A/B boot process, the following config options must be
set:
CONFIG_ANDROID_AB=y
CONFIG_CMD_AB_SELECT=y
For successful A/B boot, the corresponding A/B infrastructure must be
involved on Android side [1] (including mounting system as root), and
disk must be partitioned accordingly.
When A/B boot is enabled, there are some known limitations currently
exist (not related to A/B patches, need to be implemented later):
1. The 'Verified Boot' sequence is not supported
2. dev path to system partition (system_a or system_b) is passed via
'bootargs' as 'root=' argument like 'root=/dev/mmcblk1p12', but
further we'll need to rework it with respect to dm-verity
requirements [2]
In case when A/B partitions are not present in system (and A/B boot is
enabled), boot up process will be terminated and next message will be
shown:
"boot_a(b) partition not found"
[1] https://source.android.com/devices/tech/ota/ab
[2] https://source.android.com/devices/tech/ota/ab/ab_implement#kernel
Signed-off-by: Ruslan Trofymenko <ruslan.trofymenko@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Alistair Strachan <astrachan@google.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
For A/B system update support the Android boot process requires to send
'androidboot.slot_suffix' parameter as a command line argument. This
patch implementes 'ab_select' command which allows us to obtain current
slot by processing the A/B metadata.
The patch was extracted from commit [1] with one modification: the
separator for specifying the name of metadata partition was changed
from ';' to '#', because ';' is used for commands separation.
[1] https://android-review.googlesource.com/c/platform/external/u-boot/+/729880/2
Signed-off-by: Ruslan Trofymenko <ruslan.trofymenko@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Alistair Strachan <astrachan@google.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
These have been reported by Simon in [1] and fixed in [2].
However, since [1] has already been pushed to u-boot/master, the
improvements incorporated in [2] are now extracted and resubmitted.
The changes are in the area of coding style and best practices:
* s/field/fieldp/, s/size/sizep/, to convey that the variables return
an output to the caller
* s/err_1/err_read_fail/, s/err_2/err_too_small/, to be more descriptive
* Made sure 'static int do_bcb_load' appears on the same line
* Placed a `/*` on top of multi-line comment
[1] https://patchwork.ozlabs.org/patch/1104244/#2200259
[2] https://patchwork.ozlabs.org/cover/1128661/
("[v4,0/4] Add 'bcb' command to read/modify/write Android BCB")
Fixes: db7b7a05b2 ("cmd: Add 'bcb' command to read/modify/write BCB fields")
Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Quote from https://patchwork.ozlabs.org/patch/1104244/#2210814:
----------8<-----------
strncmp() is chosen for the sake of paranoid/defensive programming.
Indeed, strncmp() is not really needed when comparing a variable
with a string literal. We expect strcmp() to behave safely even if the
string variable is not NUL-terminated.
In the same scenario, Linux v5.2-rc7 uses both strcmp() and strncmp(),
but the frequency of strcmp() is higher:
$ git --version
git version 2.22.0
$ (Linux 5.2-rc7) git grep -En 'strncmp\([^"]*"[[:alnum:]]+"' | wc -l
1066
$ (Linux 5.2-rc7) git grep -En 'strcmp\([^"]*"[[:alnum:]]+"' | wc -l
1968
A quick "strcmp vs strncmp" object size test shows that strcmp()
generates smaller memory footprint (gcc-8, x86_64):
$ (U-Boot) size cmd/bcb-strncmp.o cmd/bcb-strcmp.o
text data bss dec hex filename
3373 400 2048 5821 16bd cmd/bcb-strncmp.o
3314 400 2048 5762 1682 cmd/bcb-strcmp.o
So, overall, I agree to use strcmp() whenever variables are compared
with string literals.
----------8<-----------
Fixes: db7b7a05b2 ("cmd: Add 'bcb' command to read/modify/write BCB fields")
Reported-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Fix warning V1037 reported by PVS-Studio Static Analyzer:
Two or more case-branches perform the same actions. Check lines: 49, 53
Fixes: db7b7a05b2 ("cmd: Add 'bcb' command to read/modify/write BCB fields")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
This allows to use any available compression format with Android boot image
Since not all available compression formats have a magic number we should
explicitly specify type of compression.
For this purpose using uImage format becomes very useful, as this format is
well-known by the community and mkimage tool is already available.
Usage example:
mkimage -A ARM64 -T kernel -C lzma -d Image.lzma out/kernel
At this moment only -C option is handled, but specifying -A and -T options
are recommended for compatibility reasons in the future.
Kernel that compressed with LZ4 can be already used without wrapping into
the uImage, but I recommend wrapping it into the uImage in order to avoid
situations when by some mistake legacy LZ4 is used, that is interpreted as
raw Image and causes CPU to enter Exception Handler without providing any
meaningful explanation to the user.
Signed-off-by: Roman Stratiienko <roman.stratiienko@globallogic.com>
If there is only one menu item available, prompting user to enter
choice makes little sense and just causes unnecessary boot delay. This
change makes menu_get_choice return the only one item when there is no
other choices.
Signed-off-by: Leon Yu <leoyu@nvidia.com>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Thierry Reding <treding@nvidia.com>
This sub-command serves for getting the partition index from
partition name. Also it can be used to test the existence of specified
partition.
Use case:
For example, in most CI environments this U-Boot command for automatic
testing of Linux rootfs is used:
=> setenv bootpart 1:f
where 0xf is "userdata" partition. But the number of "userdata"
partition can be changed any time, when partition table is changed.
So it would be nice to get rid of that 0xf magic number and use
partition name instead, like this:
=> part number mmc 1 userdata part_num
=> setenv bootpart 1:${part_num}
Signed-off-by: Ruslan Trofymenko <ruslan.trofymenko@linaro.org>
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Alistair Strachan <astrachan@google.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
This also merges README.N1213 contents into the new nds32.rst file.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This converts README.AX25 and README.ae350 plain text documentation
to reST format, merges them into one ax25-ae350 doc, and adds it to
Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This extracts QEMU x86 board specific information from README.x86,
converts plain text documentation to reST format and adds it to
Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This extracts coreboot board specific information from README.x86,
converts plain text documentation to reST format and adds it to
Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This extracts Google Chromebook Samus board specific information from
README.x86, converts plain text documentation to reST format and
adds it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This extracts Google Chromebook Link board specific information from
README.x86, converts plain text documentation to reST format and
adds it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This extracts Intel Galileo board specific information from
README.x86, converts plain text documentation to reST format and
adds it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This extracts Intel Edison board specific information from
README.x86, converts plain text documentation to reST format and
adds it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Andy Shevchenko <andy.shevchenko@gmail.com>
This extracts Intel Cougar Canyon 2 board specific information from
README.x86, converts plain text documentation to reST format and
adds it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This extracts Intel Cherry Hill board specific information from
README.x86, converts plain text documentation to reST format and
adds it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This extracts Intel Bay Trail based board specific information from
README.x86, converts plain text documentation to reST format and
adds them to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This extracts Intel Crown Bay board specific information from
README.x86, converts plain text documentation to reST format and
adds it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Add index.rst for board. More docs will be added later.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add index.rst for architecture specific info. More docs will be
added later.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Convert plain text documentation to reStructuredText format and add
it to Sphinx TOC tree. No essential content change.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add index.rst for driver model. More docs will be added later.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glkpk@gmx.de>
This updates the index.rst to add top-level description about
U-Boot documentation. Words are taken from Linux kernel docs
and modified for U-Boot.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently the Sphinx doc only contains API descriptions of several
U-Boot subsystems. For future extension, group these existing docs
into an API sub-directory.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Sometimes when debugging tests it is useful to keep the input and output
directories so they can be examined later. Add an option for this and
update the binman tests to support it. This affects both the test class
and the tearDown() function called after each test.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the -v flag is ignored with tests, so that (for example) -v2
does not have any effect. Update binman to pass this flag through to tests
so that they work just like running binman normally, except in a few
special cases where we are actually testing behaviour with different
levels of verbosity.
Signed-off-by: Simon Glass <sjg@chromium.org>
We currenty support using the ELF file in U-Boot proper and SPL, but not
TPL. Add this as it is useful both with sandbox and for CBFS to allow
adding TPL as a 'stage'.
Signed-off-by: Simon Glass <sjg@chromium.org>
The -D option enables debug mode, but we only need to add -D to the
command line once. Drop the duplicate code. Also drop the comment about
enabling debugging since this can be done with -D.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add utility functions to compress and decompress using lz4 and lzma
algorithms. In the latter case these use the legacy lzma support favoured
by coreboot's CBFS.
No tests are provided as these functions will be tested by the CBFS
tests in a separate patch.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present text entries use an indirect method to specify the text to use,
with a label pointing to the text itself.
Allow the text to be directly written into the node. This is more
convenient in cases where the text is constant.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function always sets both the offset and the size of
entries. But in some cases we want to set only one or the other, for
example with the forthcoming ifwi entry, where we only set the offset.
Update the function to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present having a descriptor means that there is an ME (Intel
Management Engine) entry as well. The descriptor provides the ME location
and assumes that it is present.
For some SoCs this is not true. Before providing the location of a
potentially non-existent entry, check if it is present.
Update the comment in the ME entry also.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present binman requires that the Intel descriptor has an explicit
offset. Generally this is 0 since the descriptor is at the start of the
image. Add a default to handle this, so users don't need to specify the
offset.
Signed-off-by: Simon Glass <sjg@chromium.org>
Code coverage tests fail on binman due to dist-packages being dropped from
the python path on Ubuntu 16.04. Add them in so that we can find the
elffile module, which is required by binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a function which decodes an ELF file, working out where in memory each
part of the data should be written.
Signed-off-by: Simon Glass <sjg@chromium.org>
It is useful to create an ELF file for testing purposes, with just the
right attributes used by the test. Add a function to handle this, along
with a test that it works correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
If tests are skipped we should ideally exit with an error, since there may
be a missing dependency. However at present this is not desirable since it
breaks travis tests. For now, just report the skips.
Signed-off-by: Simon Glass <sjg@chromium.org>
FD is a bit confusing so write this out in full. Also avoid splitting the
string so that people can grep for the error message more easily.
Signed-off-by: Simon Glass <sjg@chromium.org>
Sometimes tools used by binman may not be in the normal PATH search path,
such as when the tool is built by the U-Boot build itself (e.g. mkimage).
Provide a way to specify an additional search path for tools. The flag
can be used multiple times.
Update the help to describe this option.
Signed-off-by: Simon Glass <sjg@chromium.org>
If kwargs contains raise_on_error then this function generates an error
due to a duplicate argument. Fix this.
Signed-off-by: Simon Glass <sjg@chromium.org>
Some Intel SoCs from about 2016 boot using an internal microcontroller via
an 'IFWI' image. This is a special format which can hold firmware images.
In U-Boot's case it holds u-boot-tpl.bin.
Add this tool, taken from coreboot, so that we can build bootable images
on apollolake SoCs.
This tool itself has no tests. Some amount of coverage will be provided by
the binman tests that use it, so enable building the tool on sandbox.
Signed-off-by: Simon Glass <sjg@chromium.org>
Pull request for UEFI sub-system for v2019.10-rc1 (2)
* Implement the EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE event.
* Address errors of type -Werror=address-of-packed-member when building
with GCC9.1
* Fix an error when adding memory add addres 0x00000000.
* Rework some code comments for Sphinx compliance.
Backport and squash below Linux v5.2 commits:
Commit id * Summary line
da3e1c57caf93e [1] soc: renesas: r8a77970-sysc: Remove non-existent CR7 power domain
b5eb730e031aca [1] soc: renesas: r8a77970-sysc: Correct names of A2DP/A2CN power domains
3961d355dfb512 dt-bindings: power: r8a77965: Remove non-existent A3IR power domain
(*) Patch id mismatch between Linux and U-Boot commit
[1] Dropped changes in drivers/soc/renesas/r8a77970-sysc.c,
since the file doesn't exist in U-Boot.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
In spite of the summary line, U-Boot commits [1-2] seem to have
aligned the U-Boot PFC tables to Linux v5.1 rather than to v5.0, since
they also imported the Linux 5.1 commits listed in [3].
What current commit tries to accomplish is to align the Gen2 and Gen3
pinctrl tables to Linux v5.2. Importing these updates in two steps
as done before (i.e. separately for Gen2 and Gen3) is somewhat difficult
due to Linux commits like [5-6] which atomically update both Gen2/3
platforms and whose breakdown would not be easily possible.
The detailed list of Linux commits squashed into this U-Boot patch is
shown in [4]. The second column in [4] depicts the patch id mismatch
between the original Linux and the resulted U-Boot commit. The
exclamation mark means that manual conflict resolution was involved
during cherry picking Linux commit into U-Boot repository (this is
mainly caused by dropped changes in files like pfc-r8a7795-es1.c and
pfc-r8a77980.c which are missing in U-Boot).
This patch has been applied on top of v2019.07-rc4-155-g8754656680b6 and
boot-tested on:
- H3-ES2.0-Salvator-X
- M3-ES1.1-Salvator-XS
- M3N-ES1.1-ULCB
[1] 8719ca8113 ("pinctrl: renesas: Synchronize Gen3 tables with Linux 5.0")
[2] a6a743df24 ("pinctrl: renesas: Synchronize Gen2 tables with Linux 5.0")
[3] Linux 5.1 commits already contained in [1-2]:
79dbbdbeccc6784 pinctrl: sh-pfc: r8a77965: Add DRIF pins, groups and functions
729257d674bc2e6 pinctrl: sh-pfc: r8a77965: Add TMU pins, groups and functions
b9fd50488b4939c pinctrl: sh-pfc: r8a7792: Fix vin1_data18_b pin group
a4b0350047f1b10 pinctrl: sh-pfc: r8a7791: Fix scifb2_data_c pin group
fdbbd6b74c9278f pinctrl: sh-pfc: r8a77990: Add DRIF pins, groups and functions
16978e7d40f73be pinctrl: sh-pfc: r8a77990: Add TMU pins, groups and functions
86c045c2e4201e9 pinctrl: sh-pfc: r8a77965: Replace DU_DOTCLKIN2 by DU_DOTCLKIN3
b8ba194ca5f4ca2 pinctrl: sh-pfc: r8a7791: Fix VIN1 versioned groups
81c585c96b7dd47 pinctrl: sh-pfc: r8a77970: Deduplicate VIN[01] pin definitions
08b7e2112a9b19c pinctrl: sh-pfc: r8a7796: Deduplicate VIN5 pin definitions
99fdb920f5534d1 pinctrl: sh-pfc: r8a7795: Deduplicate VIN5 pin definitions
85ccae133bde425 Revert "pinctrl: sh-pfc: r8a77990: Add support for pull-up only pins"
f7d8b568e204d29 pinctrl: sh-pfc: r8a77990: GP6_9 does not have pull-down capability
5219aa33caec2f7 pinctrl: sh-pfc: r8a77995: Fix MOD_SEL bit numbering
3e3eebeacad79bd pinctrl: sh-pfc: r8a77990: Fix MOD_SEL bit numbering
7219a4b64520873 pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit2 when using RX2, TX2 and SCK2
699c7d1346fbef6 pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit3 when using TX0
[4] Linux 5.2 commits backported and squashed into this U-Boot patch
Linux commit id Linux commit summary line
9925e8795726801 pinctrl: sh-pfc: Validate pins/marks in pin groups at build time
f83f97684a737f6 pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length
5e8588c86d71e78 pinctrl: sh-pfc: Validate fixed-size field widths at build time
1c5c1101755c5ed pinctrl: sh-pfc: r8a77970: Rename IOCTRLx registers
3df892fdbfe6919 pinctrl: sh-pfc: r8a77990: Rename IOCTRLx registers
dcd24e098d8df8b pinctrl: sh-pfc: r8a7796: Move CANFD pin groups and functions
2cee6cb290ab30f pinctrl: sh-pfc: r8a77990: Move CANFD pin groups and functions
d92ee9cf8ec8d7f ! pinctrl: sh-pfc: rcar-gen3: Retain TDSELCTRL register across suspend/resume
efca8da0c5fcc7f ! pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG() macro
69f7be1c6314fb0 ! pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG_VAR() macro
19b593a1cf068ef ! pinctrl: sh-pfc: Absorb enum IDs in PINMUX_DATA_REG() macro
c481c8178420b8c pinctrl: sh-pfc: Validate enum IDs for regs with fixed-width fields
fa4d36712f20e24 ! pinctrl: sh-pfc: Validate enum IDs for regs with variable-width fields
360328c7dc15f48 pinctrl: sh-pfc: Improve PINMUX_IPSR_PHYS() documentation
943ff71281c6ce4 pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit16 when using NFALE and NFRB_N
e167d723e1a472d pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D
e87882eb9be10b2 pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and SSI_WS2
5671f8e0270ad5e ! pinctrl: sh-pfc: rcar-gen3: Remove HDMI CEC pins, groups, and functions
662dc924a05e9df ! pinctrl: sh-pfc: rcar-gen3: Remove CC5_OSCOUT pin
624a7a12cc0cc77 ! pinctrl: sh-pfc: rcar-gen3: Rename RTS{0,1,3,4}# pin function definitions
a040f3dec8eb7b1 pinctrl: sh-pfc: rcar-gen3: Rename SEL_ADG_{A,B,C} to SEL_ADG{A,B,C}
e551122cdb7fcb9 pinctrl: sh-pfc: rcar-gen3: Rename SEL_NDFC to SEL_NDF
baaa2effc684e49 pinctrl: sh-pfc: r8a77970: Fix spacing
f05603fa6aa3043 pinctrl: sh-pfc: r8a7796: Remove placeholder I2C pin data
0a042b355e60269 pinctrl: sh-pfc: r8a77965: Add I2C{0,3,5} pins, groups and functions
[5] efca8da0c5fcc7 ("pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG() macro")
[6] 69f7be1c6314fb ("pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG_VAR() macro")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Update "dma-ranges" DT property of all PCIe controllers in the system
with the up-to-date DRAM layout. This allows the PCIe controller take
full advantage of all the available DRAM.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
The fdt_pci_dma_ranges() cannot work on e.g. ARM, since the DT entries
endianness is not adjusted at all. Fix this.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
The generic code in common/spl/spl.c allows TPL/SPL banners to be
silenced by unsetting CONFIG_TPL_BANNER_PRINT or CONFIG_SPL_BANNER_PRINT
respectively. However, arch/arm/mach-rockchip/tpl.c prints this banner
unconditionally.
Fix the rockchip-specific tpl.c so that the TPL banner depends on
CONFIG_TPL_BANNER_PRINT in the same way as the generic code.
Signed-off-by: <chris@arachsys.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
If CONFIG_DEBUG_UART is set but CONFIG_TPL_SERIAL_SUPPORT is not, the
serial output should be available in SPL and full U-Boot, but not built
in TPL. However, the rockchip tpl.c instead fails to compile with
undefined references to the debug UART.
Instead, initialise the debug UART and print the TPL banner only if both
CONFIG_DEBUG_UART and CONFIG_TPL_SERIAL_SUPPORT are set.
Signed-off-by: <chris@arachsys.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
mt35xu512aba and mt35xu02g suports Single I/O and OCTAL I/O
also enable use of SPI_NOR_4B_OPCODES.
These flashes are tested on LX2160ARDB and LS1028ARDB respectively
Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com>
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
[jagan: suffix 'ba' on part name and update commit message]
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
For STM32 QSPI driver, "st,stm32-qspi" compatible string was first
introduced in U-boot. But later in kernel side, "st,stm32f469-qspi"
was used.
To simplify, align U-boot QSPI compatible string with kernel one.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
For STM32 QSPI driver, "st,stm32-qspi" compatible string was first
introduced in U-boot. But later in kernel side, "st,stm32f469-qspi"
was used.
To simplify, align U-boot QSPI compatible string with kernel one.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
This patch introduces support of Cortex-M4 remote processor for STM32
MCU and MPU families.
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
The current implementation supports only binary file load.
Add helpers to support ELF32 format (sanity check, and load).
Note that since an ELF32 image is built for the remote processor, the
load function uses the device_to_virt ops to translate the addresses.
Implement a basic translation for sandbox_testproc.
Add related tests. Test result:
=> ut dm remoteproc_elf
Test: dm_test_remoteproc_elf: remoteproc.c
Test: dm_test_remoteproc_elf: remoteproc.c (flat tree)
Failures: 0
Signed-off-by: Loic Pallardy <loic.pallardy@st.com>
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Add the following functions to translate DMA address to CPU address:
- dev_translate_dma_address()
- ofnode_translate_dma_address()
- of_translate_dma_address()
- fdt_translate_dma_address()
These functions work the same way as xxx_translate_address(), with the
difference that the translation relies on the "dma-ranges" property
instead of the "ranges" property.
Add related test. Test report:
=> ut dm fdt_translation
Test: dm_test_fdt_translation: test-fdt.c
Test: dm_test_fdt_translation: test-fdt.c (flat tree)
Failures: 0
Signed-off-by: Fabien Dessenne <fabien.dessenne@st.com>
- rk3399 lpddr4 support
- rk3399-rock960 board support improvement
- Eliminate pyelftools dependency by make_fit_atf.py
- clean up rockchip dts to use -u-boot.dtsi
- use ARM arch/generic timer instead of rk_timer
- clean up Kconfig options for board support
Pin configuration of the FPGA devicetree block should be done
after core configuration in the arria10 fpga driver. This fix
corrects the check of status, and ensures that the fpga pin mux
is configured on correct configuration of the core fpga image.
Signed-off-by: Dalon Westergreen <dalon.westergreen@intel.com>
This adds separate kconfig options for drivers/sysreset and
drivers/firmware.
Up to now, CONFIG_SPL_DRIVERS_MISC_SUPPORT added drivers/misc to SPL
build but also added drivers/firmware and drivers/sysreset at the same
time.
Since that is confusing, this patch uses CONFIG_SPL_SYSRESET for
drivers/sysreset and adds CONFIG_SPL_FIRMWARE for
drivers/firmware (and accordingly for the TPL options).
CONFIG_SPL_DRIVERS_MISC_SUPPORT stays for including drivers/misc into
the SPL build (and accordingly for TPL) since there are boards using
non-DM (non UCLASS_MISC) files from drivers/misc. Such boards don't
have CONFIG_SPL_MISC enabled, so cannot use this to include
drivers/misc into the SPL build.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
This moves sysreset support for socfgpa from ad-hoc code in mach-socfpga
to a UCLASS_SYSRESET based dm driver.
A side effect is that gen5 and a10 can now select between cold and warm
reset.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
This adds a define for the bit in rstmgr's ctrl regiser that issues
a cold reset (we had a define for the warm reset bit only) in preparation
for a proper sysrese driver.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Series changes: 2
- separate this patch to the register descriptions from the actual
sysreset driver patch
This driver uses bss from SPL board_init_f(). Change it to move all the
data from bss to a common struct allocated on the stack (64 byte).
In addition to saving 28 bytes of bss, the code even gets 264 bytes
smaller.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
This fixes 3 boards that don't use CONFIG_EXTRA_ENV_SETTINGS from
socfpga_common.h. They need to enable reset manager compatibility
mode unless all peripheral drivers in Linux support reset handling.
Fixes: commit 4b2e32efa4 ("arm: socfpga: gen5: deassert peripheral reset by default")
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reported-by: Wolfgang Grandegger <wg@aries-embedded.de>
This patch fix mmc driver abort caused by below patch:
3d296365e4 mmc: sdhci: Add support for sdhci-caps-mask
After the patch sdhci_setup_cfg() access to host->mmc->dev,
so we have to do init before make the call to the function()
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
make_fit_atf.py no longer requires pyelftools, and nothing else in the
rockchip build requires it either, so remove references to installing it
from the documentation.
Signed-off-by: Chris Webb <chris@arachsys.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
make_fit_aft.py depends on the non-standard library pyelftools to pull
out PT_LOAD segments from ELF files. However, this is as easy to do
manually, without imposing the extra dependency on users.
Structures in the ELF file are unpacked into variables named to exactly
match the ELF spec to ensure the destructuring code is reasonably
self-documenting.
Signed-off-by: Chris Webb <chris@arachsys.com>
Reviewed-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
SPL/TPL share the same secure_timer_init(), update to use
one copy source code and update to use CONFIG_ROCKCHIP_STIMER_BASE
as base address and rename to function name to rockchip_stimer_init().
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip SoCs have similar boot process, prefer to use TPL for DRAM
init and back to bootrom, and SPL as Trust ATF/U-Boot loader. TPL
common board is a basic TPL board init which can be shared for most
of SoCs to avoid copy-pase for different SoCs.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The SoC related init will move to SPL and keep TPL clean,
so that we can reuse the common TPL board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We have convert all SoC to use DM timer or ARM arch/generic
timer, we can remove this rk_timer now.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track to boot time.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track to boot time.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track the boot time.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We prefer to use ARM arch timer instead of rockchip timer, so that
we are using the same timer for SPL, U-Boot and Kernel, which will
make things simple and easy to track to boot time.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We share the same default SPL boot order for all rk3288 boards,
use dts instead of hard code in board file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The fdt interfaces are actuall depends on OF_LIBFDT instead
of OF_CONTROL, some boards may enable OF_CONTROL while disable
OF_LIBFDT.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The rk3288-firefly board have different setting for sdmmc
io, sync then from kernel mainline:
6fbc7275c7a9 Linux 5.2-rc7
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Some rk3288 boards are using raw image of u-boot.bin, and now
it's much bigger than default 200KB, update CONFIG_SYS_MONITOR_LEN
to 600KB.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add arch_cpu_init() in SPL for soc related init, and
move configure_l2ctlr() into it.
The arch_cpu_init() only need to run once, so no need
to run in TPL.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We needs SPL LIBCOMMON and LIBGENERIC for all boards,
so we can enable them by default and no need to define
in each board.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We needs SPL LIBCOMMON and LIBGENERIC for all boards,
so we can enable them by default and no need to define
in each board.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We needs SPL LIBCOMMON and LIBGENERIC for all boards,
so we can enable them by default and no need to define
in each board.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We needs SPL LIBCOMMON and LIBGENERIC for all boards,
so we can enable them by default and no need to define
in each board.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip SoCs have different ROCKCHIP_BOOT_MODE_REG value,
move it to SoC's own Kconfig, and add address for rk3128 and
rk3328 so that all SoCs have available address.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Each SoC have its config setting and its Kconfig, move
the specific setting to its own Kconfig file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Each SoC have its config setting and its Kconfig, move
the specific setting to its own Kconfig file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Each SoC have its config setting and its Kconfig, move
the specific setting to its own Kconfig file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Each SoC have its config setting and its Kconfig, move
the specific setting to its own Kconfig file.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Use LPDDR4-100 sdram timings dtsi for RockPI-4 board.
All these timings are processed during TPL stage of rock-pi-4 board,
bootchain. This make TPL would replace rockchip in house rkbin in
current bootchain.
Bootchain after and before this change:
TPL -> SPL -> U-Boot proper
rkbin -> SPL -> U-Boot proper
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Use DDR3-1866 2GB ddr timings dtsi for 1GB NanoPi Neo4 board.
Since sdram rk3399 support dynamic stride and rank detection it
can able to detect 1GB ddr eventough the timings are meant for
dual channel, 2GB size.
Bootchain after and before this change are:
TPL -> SPL -> U-Boot proper
rkbin -> SPL -> U-Boot proper
This certainly fix the second channel data training initialization
since we have dynamic rank, stride where second channel capabilities
are clear or memset to 0.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Use LPDDR4-100 sdram timings dtsi for Rockpro64 board.
All these timings are processed during TPL stage of rockpro64 board,
bootchain. This make TPL would replace rockchip in house rkbin in
current bootchain.
Bootchain after and before this change:
TPL -> SPL -> U-Boot proper
rkbin -> SPL -> U-Boot proper
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Add sdram timings for LPDDR4-100 via rk3399-sdram-lpddr4-100.dtsi file.
all timings are dumped from rkbin/bin/rk33/rk3399_ddr_800MHz_v1.20.bin
Associated LPDDR4 board -u-boot.dtsi can include this to make these
timings available during SPL or TPL stages.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Due to foot-print issues, we have LPDDR4 code can be
marked as CONFIG_RAM_RK3399_LPDDR4.
So, enable it for Rock-PI-4 board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Due to foot-print issues, we have LPDDR4 code can be
marked as CONFIG_RAM_RK3399_LPDDR4.
So, enable it for Rockpro64 board.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Unlike rest of dram type chips, LPDDR4 initialization start
with at board selected frequency (say 50MHz) and then it
switches into 400MHz and 800MHz simultaneously to make the
proper sequence work on each channel with associated training.
The lpddr4 set rate sequnce will follow by setting lpddr4
- dq out
- ca odt
- MR3
- MR12
- MR14
registers sets in sequential order.
Here is sameple log about LPDDR4-100 init sequence in Rockpro64:
Channel 0: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
Channel 1: LPDDR4, 50MHz
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
256B stride
channel 0 training pass
channel 1 training pass
change freq to 400 MHz 0, 1
channel 0 training pass
channel 1 training pass
change freq to 800 MHz 1, 0
This patch add support to this init sequence via lpddr4 set rate
by taking sdram timing parameters from 400, 800 .inc files.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Fix travis error, use one ret instead of ret[2] in set_ctrl)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
DDR set rate can be even required for lpddr4 and we
need to keep the lpddr4 code to compile only for relevant
boards which do support lpddr4.
For this requirement, and for code readability handle
data training via sdram_rk3399_ops with .set_rate and
same will update in future while supporting lpddr4 code.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
LPDDR4 initialization start with at board selected frequency
and then it switches into 400MHz and 800MHz simultaneously to
make the proper sequence work on each channel with associated
training.
So, add LPDDR4-800 timings inc file in driver area so-that
these timings will take during LPDDR4 initialization phase.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
LPDDR4 initialization start with at board selected frequency
and then it switches into 400MHz and 800MHz simultaneously to
make the proper sequence work on each channel with associated
training.
So, add LPDDR4-400 timings inc file in driver area so-that
these timings will take during LPDDR4 initialization phase.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Like data training in other sdram types, mr detection need
to taken care for lpddr4 with looped rank and associated
channel to make sure the proper configuration held.
Once the mr detection successful for active and configured
rank with channel number, the same can later reused during
actual LPDDR4 initialization.
So, add code to support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
data training can be even required for lpddr4 and we
need to keep the lpddr4 code to compile only for relevant
boards which do support lpddr4.
For this requirement, and for code readability handle
data training via sdram_rk3399_ops and same will update
in future while supporting lpddr4 code.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
data training is using chan_info as first argument with
channel number as second argument instead of that use
dram_info as first argument so-that we can get the
chan_info at data training definition.
This was the argument handling is meaningful, readable
and it would help to add similar data training for
lpddr4 in future.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
The mode_sel on lpddr4 value is depending on IO settings
of rd_vref.
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
CTL 145, 146, 159, 160 registers are used to configure
soc odt on rk3399.
These soc odt values are updated from CS0_MR22_VAL and
CS1_MR22_VAL and for lpddr4 these values ORed with
tsel_rd_select_n.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
tsel contrl clock drives are required to configure PHY
929, 939 controls drive settings.
Add support for these control clock for all dramtype
sdrams.
Thse control clock drives are configure via tsel_ckcs_select_p
and tsel_ckcs_select_n variables.
tsel_ckcs_select_n is PHY_DRV_ODT_34_3 value where as
tsel_ckcs_select_p is retrived from IO settings for lpddr4
and rest uses PHY_DRV_ODT_34_3.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Now we have IO settings available for all supported sdram
frequencies, so retrieve these IO settings and make used
for LPDDR4 ds odt configuration.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Add IO settings for dram ctl and phy.
IO settings are useful for configuring ctl, phy odt, vref,
mr5, mode select and other needed input output operations
for lpddr4 or any other dramtype sdram.
Right now, this patch added IO setting for all supported
sdram frequencies.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
The hardware for LPDDR4 with
- CLK0P/N connect to lower 16-bits
- CLK1P/N connect to higher 16-bits
and usually dfi dram clk is configured via CLK1P/N, so
disabling dfi dram clk will disable the CLK1P/N as well.
So, add patch to not to disable dfi dram clk for lpddr4,
with rank 1.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
tsel write ca_p and ca_n values need to write on PHY 544, 672
and 800 to configure ds odt.
Configure the same PHY register for lpddr4 would require a mask
value of (300 << 8).
Add support for it.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Assign desired cs_map values for lpddr4 during set memory map.
Initial cs_map values is based on the sdram parameters, so
the same will adjusted based dramtype as LPDDR4.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
PHY_898, PHY_919 would require to configure PHY LP4 boot
pll control and ca for lpddr4.
So, configure the same in pctl_cfg for LPDDR4.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
It is possible in lpddr4 dram, where both the channels would
start at same time with ZQ Cal Start. If it uses ZQ Call start
then it will use RZQ.
For example LPDDR4 366 Dual-Die, Quad-Channel Package, RZQ maybe
connect to both channel. If ZQ Cal Start at the same time,
it will use the same RZQ.
It is not a problem of using RZQ in both the channels, but can not
use at the same time.
So, to avoid this, we have an option of dram tINIT3 value for
increasing the frequency for channel 1.
This patch increase the available tINIT3 with existing running
dram frequency.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
lpddr4 has PLL bypass mode during phy initialization phase,
which does all pll configurations.
So no need to wait explicitly during pctl config.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
mode_sel assignment is based on dram type.
In phy_io_config, already have vref setting based
on the dram type, so move this mode_sel assignment
on vref setting area.
No functionality change.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Add rank_mask based on the rank number for lpddr4.
This would keep the wdql data training loop based on the
desired rank mask value instead of looping for all values.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Add rank_mask based on the rank number for lpddr4.
This would keep the ca data training loop based on the
desired rank mask value instead of looping for all values.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Supporting LPDDR4 code support in RK3399 would increases
the size of SPL/TPL.
So add kconfig entry for RK3399 LPDDR4 code so-that
the boards have LPDDR4 can enable them via defconfig.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Some dramtypes like lpddr4 initialization would required to
configure phy IO even after pctl_cfg and after set_ds_odt.
For those cases the set_ds_odt would be an initial call to
setup the phy.
To satisfy all the cases, trigger phy IO from set_ds_odt.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Add DdrMode structure with associated bit fields.
These would help to reconfigure sdram capabilities during
lpddr4 setup related configs.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Add DdrTimingC0 structure with associated bit fields.
These would help to reconfigure sdram capabilities during
lpddr4 setup related configs.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Use dram config variable name as sys_reg2 instead of sys_reg
since the final variable value is to written into a pmugrf
register named as sys_reg2.
This reflect the both variable and associated register
names are same and also help to add next sys_reg's to
add it in future.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
This would help to debug the sdram base parameters while
debugging existing chip or while supporting new sdram type.
It require explicit enablement of CONFIG_RAM_ROCKCHIP_DEBUG
for showing the debug prints.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Right now the rk3399 sdram driver assume that the board
has configured with 2 channels, so any possibility to
enable single channel on the same driver will encounter
channel #1 data training failure.
Log:
U-Boot TPL board init
sdram_init: data training failed
rk3399_dmc_init DRAM init failed -5
So, add an algorithm that can capable to compute the active
or configured rank with associated channel like
a) do rank loop to compute the active rank, with associated
channel numbers
b) then, succeed the data training only for configured channel
c) preserve the rank for given channel
d) do channel loop for setting the active channel
e) if given rank is zero or inactive on the specific channel,
clear the timings for the associated channel
f) finally, return error if number of channels is zero
Tested in NanoPI-NEO4 since it support single channel sdram
configuration.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
(add PI_READ_GATE_TRAINING for LPDDR3 to support rk3399-evb case)
Signed-off-by: Kever Yang <Kever.yang@rock-chips.com>
This patch enables DM I2C for DHCOM i.MX6 PDK2 boards and
removes non DM I2C code. The I2C EEPROM with ethaddr (MAC)
is defined in the device tree. Use UCLASS_I2C_EEPROM
to find the device by fixed hardware path and read the ethaddr.
Tested with DHCOM i.MX6dl and DHCOM i.MX6q.
Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
For a single binary approach for imx6 quad/dual/duallite/solo it
is necessary to enable CONFIG_SATA for quad/dual. On the other hand
on imx6 duallite/sole SATA is not available.
Therefore sata_remove() is skipped according to a blacklist scheme.
Adding further imx derivates is probably not recessary as they are
usually not pin-compatible and therefore a different board with its
own configuration.
Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com>
It turned out that after a reset the boot process from the spi bootflash is
disturbed by other spi slave devices connected to DHCOM SPI1, which uses the
same spi interface with a different SS line.
Therefore the pad pull ups are enabled.
Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com>
The Apalis iMX8 was missing the interactive part should a customer have
bricked his module and want to re-create the configuration block. Fix
this.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
The Colibri iMX8X target got re-named late in the cycle which we forgot
to reflect here. Furthermore, it was missing the interactive part should
a customer have bricked his module and want to re-create the
configuration block. Fix this.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
Make the interactive Wi-Fi/BT handling generic by pulling it out of the
Colibri iMX6ULL interactive part to be re-used for Apalis iMX8 and
Colibri iMX8X.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
If the module is in serial downloader mode, we do no longer read the
environment from eMMC. Therefor, the eMMC is unitialized when trying
to read the config block. Use mmc_init to initialize the selected
MMC device before using it.
Note: In case the MMC has already been initialized, the mmc_init
detects that and returns immediately.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
According to iMX6DQ RM, the minor field (low 8 bits) in DIGPROG is not
aligned on silicon revision 1.3. So update get_cpu_rev to correct the
revision.
0x00630002 Silicon revision 1.2
0x00630005 Silicon revision 1.3
0x00630006 Silicon revision 1.6
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This patch fixes not enabled uart2 (and hence serial console) on i.MX53
devices. After following commit 1d255904c3 ("ARM: dts: imx: imx53:
Synchronize iMX53 DT with Linux") from the uart2 compatible the
'fsl,imx7d-uart' has been removed (which was correct).
However, the root cause of the problem was the commit 98d62e618b ("arm:
imx: add i.MX53 Beckhoff CX9020 Embedded PC") which introduced this
compatible.
Moreover, without this patch all i.MX53 UARTs are not usable as neither
'fsl,imx53-uart' nor 'fsl,imx21-uart' are in compatible IDs in
drivers/serial/serial_mxc.c file.
The fix is to add 'fsl,imx53-uart' and 'fsl,imx21-uart' as compatibles
for the aforementioned serial driver (those are also defined in the Linux
kernel).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
This patch disables support for running EFI applications on HSC|DDC boards.
As a result - considerable size reduction (~14%) has been observed (for
for u-boot-dtb.imx 475KiB to 407KiB).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Configure fitImage for U-Boot with a device tree for imx6 quad/dual
and duallite/solo. This enables to support the imx6 derivates
quad/dual/duallite/solo with a single binary.
Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
This device tree adds support for DHCOM iMX6 duallite and solo
deriviates.
Signed-off-by: Ludwig Zenz <lzenz@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
To use the device tree definitions imx6q-dhcom-som.dtsi for all imx6 derivatives rename
it to imx6qdl-dhcom.dtsi. We omit the '-som', because it simplifies further mainlinening
of already existing device trees.
To reuse board level common stuff imx6qdl-dhcom-pdk2.dtsi is created and included by
imx6q-dhcom-pdk2.dts.
Signed-off-by Ludwig Zenz <lzenz@dh-electronics.com>
Reviewed-by: Marek Vasut <marex@denx.de>
1. Introduce androidboot wrapper for booting AOSP.
2. Add partitions_android env var for simplifying the process of
writing new gpt table from U-boot shell/fastboot.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
The gpio command currently uses equal bank names "GPIO0_"
for all existing gpio banks, i. e.:
U-Boot# gpio status -a
Bank GPIO0_:
GPIO0_0: input: 0 [ ]
GPIO0_1: output: 1 [x] dbg1.gpios
...
Bank GPIO0_:
GPIO0_0: input: 0 [ ]
GPIO0_1: input: 0 [ ]
...
So the command is broken, it is not possible to address
a desired bank. Add gpio aliases to fix this.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
imx6ul-isiot-mmc.dts was removed in uboot version v2018.03 and from then
onwards IMX6UL isiot uses imx6ul-isiot-emmc.dts for mmc, so remove
unnecessary check for mmc.
Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
We never really added a sensible DFU configuration for platforms
based on eMMC. Most of the things one might want to do can also be done
with UMS or fastboot, so drop the DFU configuration.
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Philippe Schenker <philippe.schenker@toradex.com>
Secure boot is not enabled in mx6sxsabresd imximage.cfg, add support
for it.
Signed-off-by: Breno Lima <breno.lima@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Enable CONFIG_ARMV7_BOOT_SEC_DEFAULT by default to avoid a kernel
crash when booting NXP linux kernels in non-secure world,
when job ring device allocation is done by CAAM hw accelerator driver:
caam 30900000.caam: job rings = 3, qi = 0
caam_jr 30901000.jr0: failed to flush job ring 0
caam_jr: probe of 30901000.jr0 failed with error -5
caam_jr 30902000.jr1: failed to flush job ring 1
caam_jr: probe of 30902000.jr1 failed with error -5
caam_jr 30903000.jr2: failed to flush job ring 2
caam_jr: probe of 30903000.jr2 failed with error -5
caam algorithms registered in /proc/crypto
Job Ring Device allocation for transform failed
caam 30900000.caam: caam pkc algorithms registered in /proc/crypto
Unable to handle kernel NULL pointer dereference at virtual address 00000010
pgd = c0004000
[00000010] *pgd=00000000
Internal error: Oops: 5 [#1] PREEMPT SMP ARM
Modules linked in:
CPU: 0 PID: 1 Comm: swapper/0 Tainted:
Hardware name: Freescale i.MX7 Dual (Device Tree)
task: ec0d8000 task.stack: ec0ce000
PC is at caam_sm_startup+0x3f8/0x4f4
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
The DM_FLAG_PRE_RELOC shall be set unconditionally as this driver is going
to be re-used in both early SPL and U-Boot proper's pre-reloc.
For i.MX based devices it is crucial to have available the serial console
before relocation (otherwise the board may hand).
The device definition may be provided either via device tree description or
with U_BOOT_DEVICE(mxc_serial) definition. In the latter case the device
will not bind in U-Boot proper when DM_FLAG_PRE_RELOC is not set.
The !CONFIG_IS_ENABLED(OF_CONTROL) #if check was set as a "workaround" for
DM problem described in following commit 4687919684
("serial: Remove DM_FLAG_PRE_RELOC flag in various drivers").
Let's look on this check more thoroughly - we add this flag if the board
doesn't support OF_CONTROL. This is a bit strange as the serial_mxc.c can
be used with CONFIG_DM_SERIAL but without corresponding device tree
description (OF_CONTROL). In such case the aforementioned
U_BOOT_DEVICE(mxc_serial) definition is used.
Other boards/SoCs have this flag set unconditionally for serial driver.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Add DM and DT probing support to iMX watchdog driver. This should
allow boards to move over to this driver, enable SYSRESET_WATCHDOG
to handle cpu_reset() if required.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Use CONFIG_IS_ENABLED(WDT) to permit use of WDT in SPL without DM,
while the full U-Boot can use rich DM/DT WDT driver.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Suniel Mahesh <sunil.m@techveda.org>
Before the wide DM/DTS adoption in the U-Boot proper, the display5
has been using only DM_SERIAL to provide serial console in
pre-relocation.
After moving to full DM/DTS adoption in the U-Boot proper the
U_BOOT_DEVICE definition is not needed anymore, as it has been
replaced with udevice creation from provided DTS description.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This file setups UART5 based serial to be used as pre-relocation
console in the U-Boot proper.
On purpose pinux configuration is omitted here as it has been already
done in SPL. For early pre-relocation code we only need the serial
device from DTS.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This commit ports from Linux kernel - tag: v5.1 - the device tree
description for display5 board.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Porting more DTS code from Linux kernel for display5 board required
increase of pre-relocation malloc pool size in U-Boot proper.
The early malloc memory is necessary for handling parsing and setup of
e.g. serial port device (and all its ancestors in DT tree).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
After commit 14453fbfad ("Convert CONFIG_SF_DEFAULT_* to Kconfig")
and commit abe66b1b5d ("Convert CONFIG_ENV_SPI_* to Kconfig") ,which
moved some SPI related CONFIG_* defines to Kconfig the display5 board has
become unbootable as the SPI CS check condition had wrong value.
This commit fixes this check and allows proper SPI NOR flash operation in
SPL.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit just corrects spelling of 'accessed' word in the EEPROM
comment.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Some comments are not needed anymore after Kconfig automated conversion.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
SPL on Engicam i.Core M6 boards enabled DM, so it would require some
malloc() pool before relocation in order to load U-Boot proper properly.
So, enable SPL malloc() pool of 0x2000 size similarly like what we have
used for icore mmc defconfigs.
Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
This function sets the polarity of the PWR signal which is not used on
the opos6uldev board. Remove it.
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com>
This commit updates the doc/README.falcon regarding Falcon boot on
NOR flash memories.
This code is used by MCCMON6 board - so for more details please refer to
configs/mccmon6_nor_defconfig.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This option will provide the offset in the parallel NOR flash memory to,
which the falcon boot data is stored.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit makes the CMD_SPL_NAND_OFS only visible when we use NAND
memory.
Before this change it was present when only CMD_SPL was enabled (and
would stay when board with other falcon boot medium is used).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
mccmon6 works in 10/100 MiB Ethernet environment, so disabling 1GiB support
improves robustness of the network after power up (as one don't need to
wait for autoneg).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
On i.MX7ULP B0, the DDR clock target is increased from 320Mhz to 380Mhz.
We update DDR clock relevant settings to approach the target. But since the
limitation on LCDIF pix clock for HDMI output
(refer "mx7ulp_evk: Change APLL and its PFD0 frequencies"), we set DDR
clock to 352.8Mhz (25.2Mhz * 14) by using the clock path:
APLL PFD0 -> DDR CLK -> NIC0 -> NIC1 -> LCDIF clock
To reduce the impact to entire system, the NIC0_DIV and NIC1_DIV are kept,
so the divider 14 is calculated as:
14 = (NIC0_DIV + 1) * (NIC1_DIV + 1) * (LCDIF_PCC_DIV + 1)
NIC0_DIV: 1
NIC1_DIV: 0
LCDIF_PCC_DIV: 6
APLL and APLL PFD0 settings:
PFD0 FRAC: 27
APLL MULT: 22
APLL NUM: 1
APLL DENOM: 20
This patch applies the new settings for both DCD and plugin.
There is no DDR script change on this new frequency.
Overnight memtester is passed.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Due to the APLL out glitch issue, the APLLCFG PLLS bit must
be set to select SCG1 APLL PFD for generating system clock to align
with the design.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
To support HDMI display on EVK board, the LCDIF pix clock must be
25.2Mhz. Since the its PCC divider range is from 1-8, the max rate
of LCDIF PCC source clock is 201.6Mhz. This limits the source clock
must from NIC1 bus clock or NIC1 clock, other sources from APLL PFDs
are higher than this max rate.
The NIC1 bus clock and NIC1 clock are from DDRCLK whose parent source
is APLL PFD0, so we must change the APLL PFD0 and have impact to DDRCLK,
NIC1 and NIC1 bus.
Eventually, this requests to set the APLL PFD0 frequency to 302.4Mhz
(25.2 * 12), with settings:
PFD0 FRAC: 32
APLL MULT: 22
APLL NUM: 2
APLL DENOM: 5
Signed-off-by: Ye Li <ye.li@nxp.com>
Tested-by: Fancy Fang <chen.fang@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Update LPDDR3 script with the changes below:
-Update the precharge command to CMD=01 at the DDR initialization phase
-remove unimplemented registers
Write data bit delay --refer to the DDR_TRIM bits in
IOMUXC1_DDR_SW_PAD_CTL_PAD_DDRn
Test:
One EVK board passes overnight stress test.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
For the current APLL setting, as we want the APLL PFD0 to meet DDR clock 320Mhz requirement.
We set MULT to 20, NUM to 4 and DENOM to 2, to get final 22 multiplier. But according to the RM,
the NUM should always be less than the DENOM. So our setting violates the rule.
Actually the ROM has already set the MULT to 22 and leave NUM/DENOM in default value. The calculated APLL PFD0 clock
is 318.9888Mhz, which also meet the DDR requirement.
To fix the issue, we remove the PLL settings in DCD to use default value from ROM, and only set the PFD0 FRAC.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
If no CONFIG_OPTEE_LOAD_ADDR is provided i.e. you are not loading OPTEE
into memory in u-boot, then just set the non-existent CONFIG option to
zero, elsewise stringify(CONFIG_OPTEE_LOAD_ADDR) will return
"CONFIG_OPTEE_LOAD_ADDR" - which looks weird in the u-boot environment.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
In the Mbed Linux OS bootflow OP-TEE runs before u-boot and provides a DTB
overlay at 0x83100000.
This overlay should subsequently be merged into the main DTB before handing
over to the kernel.
This patch defines fdtovaddr at 0x83100000.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
This commit enables CONFIG_OF_LIBFDT_OVERLAY a requirement to perform a
merge of an OPTEE provided DTB overlay into our main kernel DTB image.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
In order to switch on DTB overlay support in WaRP7 BL33 we first need to
switch on LIBFDT support. Do that now.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reusing the loadaddr to load the boot script breaks some of the logic we
want to have around the bootscript/FIT load addresses. Making a dedicated
bootscript address allows us to differentiate the bootscript load address
from the Linux Kernel or OPTEE load address, thus ensuring that no matter
what the load sequence the bootscript and Kernel/OPTEE binary load
addresses do not conflict.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
When obtaining the bootscript from a FIT image we need to specify the name
of the bootscript as defined inside of the FIT.
This patch makes a define that appends a "bootscr" parameter to the source
command when compiling up in FIT mode on warp7.
An environment variable is supplied to enable others to use a different
name than "bootscr" as the image name of the boot script in their FIT.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
This patch switches on FIT verification of boot.scr. After this commit your
boot.scr must be in the FIT format.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
BD71837 and BD71847 is PMIC intended for powering single-core,
dual-core, and quad-core SoC’s such as NXP-i.MX 8M. BD71847
is used for example on NXP imx8mm EVK.
Add regulator driver for ROHM BD71837 and BD71847 PMICs.
BD71837 contains 8 bucks and 7 LDOS. BD71847 is reduced
version containing 6 bucks and 6 LDOs. Voltages for DVS
bucks (1-4 on BD71837, 1 and 2 on BD71847) can be adjusted
when regulators are enabled. For other bucks and LDOs we may
have over- or undershooting if voltage is adjusted when
regulator is enabled. Thus this is prevented by default.
BD718x7 has a quirk which may leave power output disabled
after reset if enable/disable state was controlled by SW.
Thus the SW control is only allowed for BD71837 bucks
3 and 4 by default. The impact of this limitation must be
evaluated board-by board and restrictions may need to be
modified. (Linux driver get's these limitations from DT and we
may want to implement same on u-Boot driver).
Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Commit 32ce6179fb ("optee: Add lib entries for sharing OPTEE code across
ports") adds code into lib/optee but neglects to update MAINTAINERS to make
me buggable for questions and maintenance.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Suggested-by: Jens Wiklander <jens.wiklander@linaro.org>
When booting in BL33 mode i.e. with u-boot loaded by OP-TEE we get the
following print-out.
Board: WARP7 in secure mode OPTEE DRAM 0xa0000000-0xa0000000
This is incorrect the right range is 0x9e000000-0xa0000000. This patch
fixes the defines on the warp7_bl33_defconfig file to tidy up the output.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Commit c7b3a7ee53 ("optee: adjust dependencies and default values for
dram") makes the TZDRAM defines for OPTEE show up for all configs as a
side-effect. While not harmful its not what we really want.
This patch makes the following defines contingent on CONFIG_OPTEE=y
CONFIG_OPTEE_TZDRAM_BASE
CONFIG_OPTEE_TZDRAM_SIZE
Rightly, if you don't have CONFIG_OPTEE=y you don't care about the above
two defines.
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Cc: Rui Miguel Silva <rui.silva@linaro.org>
Acked-by: Rui Miguel Silva <rui.silva@linaro.org>
The code responsible for setting proper values in the MUX registers
(in the mxs_pinctrl_set_state()) has been ported from Linux kernel
- SHA1: 17bb763e7eaf tag v5.1.11 from linux-stable.
As the pinctrl node in the imx28.dtsi file has gpio pins nodes as subnodes,
it was necessary to use 'dm_scan_fdt_dev()' (as a .bind method) to also
make them 'visible' by the DM's "gpio_mxs" driver.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
This patch adds support for DM/DTS in the mxs_gpio.c driver.
Information regarding per gpio controller pin number is passed via DTS.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Those properties are U-Boot specific as the mxs gpio Linux driver (up to
version v5.1.11) is not supporting them.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The fec_mxc.c driver can be reused by i.MX28 when DM_ETH is enabled.
One only needs to add proper compatible and dependency on FEC_MXC in the
Kconfig.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
This patch copies from the Linux kernel stable (tag v5.1.11)
SHA1: 17bb763e7eaf i.MX28 related device tree files.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Since the board uses SPL_OF_CONTROL now, we don't need to
explicitly initialize the MMC driver, but we still need to
pinmux the corresponding pins. This patch removes the
initialization code and leave just the muxing behind.
Signed-off-by: Adam Ford <aford173@gmail.com>
With the spl code correctly returning either MMC1 or MMC2,
this board can not boot either from internal eMMC (MMC1) or
the uSD card on the baseboard (MMC2) using the device tree.
Signed-off-by: Adam Ford <aford173@gmail.com>
Currently, when the spl_boot_device checks the boot device, it
will only return MMC1 when it's either sd or eMMC regardless
of whether or not it's MMC1 or MMC2. This is a problem when
booting from MMC2 if MMC isn't being manually configured like in
the DM_SPL case with SPL_OF_CONTROL.
This patch will check the register and return either MMC1 or MMC2.
Signed-off-by: Adam Ford <aford173@gmail.com>
Writing/updating boot image in nand device is not
straight forward in i.MX6 platform and it requires
boot control block(BCB) to be configured.
It becomes difficult to use uboot 'nand' command to
write BCB since it requires platform specific attributes
need to be taken care of.
It is even difficult to use existing msx-nand.c driver by
incorporating BCB attributes like mxs_dma_desc does
because it requires change in mtd and nand command.
So, cmd_nandbcb implemented in arch/arm/mach-imx
BCB contains two data structures, Firmware Configuration Block(FCB)
and Discovered Bad Block Table(DBBT). FCB has nand timings,
DBBT search area, page address of firmware.
On summary, nandbcb update will
- erase the entire partition
- create BCB by creating 2 FCB/DBBT block followed by
1 FW block based on partition size and erasesize.
- fill FCB/DBBT structures
- write FW/SPL on FW1
- write FCB/DBBT in first 2 blocks
for nand boot, up on reset bootrom look for FCB structure in
first block's if FCB found the nand timings are loaded for
further reads. once FCB read done, DTTB will load and finally
firmware will be loaded which is boot image.
Refer section "NAND Boot" from doc/imx/common/imx6.txt for more usage
information.
Reviewed-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
Signed-off-by: Shyam Saini <shyam.saini@amarulasolutions.com>
This patch provides code to implement the CCF clock tree in sandbox. It
uses all the introduced primitives; some generic ones are reused, some
sandbox specific were developed.
In that way (after introducing the real CCF tree in sandbox) the recently
added to clk-uclass.c: clk_get_by_id() and clk_get_parent_rate() are tested
in their natural work environment.
Usage (sandbox_defconfig and sandbox_flattree_defconfig):
./u-boot --fdt arch/sandbox/dts/test.dtb --command "ut dm clk_ccf"
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The generic mux clock code for CCF requires reading the clock multiplexer
value from HW registers. As sandbox by design has readl() as no-op it was
necessary to provide this value in the other way.
The new field in the mux structure (accessible only when sandbox is run)
has been introduced for this purpose.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The generic divider clock code for CCF requires reading the divider value
from HW registers. As sandbox by design has readl() as no-op it was
necessary to provide this value in the other way.
The new field in the divider structure (accessible only when sandbox is
run) has been introduced for this purpose.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This patch adds the 'osc' fixed clock to facilitate the CCF testing in
the sandbox U-Boot. It is a starting point for building CCF hierarchy of
clocks.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
If the CLK_GET_RATE_NOCACHE flag is set - the clk_get_parent_rate()
provides recalculated clock value without considering the cache setting.
This may be necessary for some clocks tightly coupled with power domains
(i.e. imx8), and prevents from reading invalid cached values.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This patch brings the files from Linux kernel (linux-stable/linux-5.1.y
SHA1: 5752b50477da)to provide clocks support as it is used on the Linux
kernel with Common Clock Framework [CCF] setup.
The directory structure has been preserved. The ported code only supports
reading information from PLL, MUX, Divider, etc and enabling/disabling
the clocks USDHCx/ECSPIx depending on used bus. Moreover, it is agnostic
to the alias numbering as the information about the clock is read from the
device tree.
One needs to pay attention to the comments indicating necessary for U-Boot's
driver model changes.
If needed, the code can be extended to support the "set" part of the clock
management.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit adds the clk_get_by_id() function, which is responsible
for getting the udevice with matching clk->id. Such approach allows
re-usage of inherit DM list relationship for the same class (UCLASS_CLK).
As a result - we don't need any other external list - it is just enough
to look for UCLASS_CLK related udevices.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This commit adds the clk_get_parent_rate() function, which is responsible
for getting the rate of parent clock.
Unfortunately, u-boot's DM support for getting parent is different
(the parent relationship is in udevice) than the one in Common Clock
Framework [CCF] in Linux.
To alleviate this problem - the clk_get_parent_rate() function has been
introduced to clk-uclass.c.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This commit adds the clk_get_parent() function, which is responsible
for getting the parent's struct clock pointer.
U-Boot's DM support for getting parent is different (the parent
relationship is in udevice) than the one in Common Clock Framework [CCF]
in Linux. To obtain the pointer to struct clk of parent the
pdev->uclass_priv field is read via dev_get_clk_ptr() wrapper.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Up till now the fixed rate clock ('osc') has been added to UCLASS_CLK
without declaring struct clk. As a result it was only accessible by
iterating the udevice's uclass list.
This is a problem for clock code, which operates on pointers to struct
clk (like clk_get_rate()), not udevices.
After this change struct clk is accessible from udevice and udevice from
struct clk.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This commit extends the struct clk to provide information regarding the
flags related to this devices.
Those flags are clk device agnostic and indicate generic features
(like e.g. CLK_GET_RATE_NOCACHE - the need to always recalculate the rate).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This commit extends the struct clk to provide information regarding the
clock rate.
As a result the clock tree traversal is performed at most once, and further
reads are using the cached value.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This check requires the struct clk passed to .get_rate() to be always
cleared out as any clock with valid ID causes -EINVAL return value.
The return code of fixed clocks shall always be returned.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
There is no UCLASS_CLOCK uclass defined. Instead we do use the UCLASS_CLK.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This patch describes the design decisions considerations and taken approach
for porting in a separate documentation entry.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Macpaul have left Andestech for a while, and this mail address
macpaul@andestech.com can not received mail anymore.
It might encounter account creation problem in this switching
to gitlab about nds32 tree.
So change the nds32 maintainer as Rick Chen <rick@andestech.com>
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Due changes in DT bindings, we now embed DTB from Linux-5.3 (or
higher) in OpenSBI FW_PAYLOAD along with payload u-boot.bin. This
patch updates SiFive FU540 README to reflect the changes in build
and boot steps.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <Alistair.Francis@wdc.com>
This patch extends SiFive FU540 board support to setup ethaddr
env variable based on board serialnum read from OTP.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The GEMGXL clock driver is now directly part of Cadence MACB
ethernet driver in upstream Linux kernel. There is no separate
GEMGXL clock driver in upstream Linux kernel hence we drop
GEMGXL clock driver from U-Boot as well.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The DT bindings of SiFive clock driver in upstream Linux has
changes. As-per latest DT bindings, the clock driver takes two
parent clocks and compatible string has also changed.
This patch sync-up SiFive clock driver implementation as-per
upstream Linux so that we now use latest DT bindings.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The location and license header of DT bindings header for SiFive
clock driver has changed in upstream Linux hence this patch.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Now that SiFive clock driver is merged in upstream Linux, we
sync-up WRPLL library used by SiFive clock driver with upstream
Linux sources.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
To match SiFive clock driver with latest Linux, we factor-out PLL
library as separate module under drivers/clk/analogbits.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add stride computation for the sdram which support
single channel a
This configuration available in NanoPi NEO4 and the
same can work with existing rk3399-sdram-ddr3-1866.dtsi
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
stride value from sdram timings can be computed dynamically
based on the determined capacity for the given channel.
Right now these stride values are taken as part of sdram timings
via dtsi, but it possible to use same timings dtsi for given
frequency even though the configured board sdram do support
single channel with different size by dynamically detect the
stride value.
Example, NanoPi NEO4 do have DDR3-1866, but with single channel
and 1GB size with dynamic stride detection it is possible to
use existing rk3399-sdram-ddr3-1866.dtsi whose stride,
number of channels and capacity it support is d efferent.
So, add initial support to calculate the stride value for
2 channels sdram, which is available by default on existing
boards.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Add code to print the channel stride, this would help to
print the stride of associated channel.
Here is sample print on LPDDR4, 50MHz.
256B stride
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Add code to get the channel capacity, this would help to
print the capacity of specific channel.
Here is sample print on LPDDR4, 50MHz channel 0
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16 Size=2048MB
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Add sdram ddr info print support, this would help to
observe the sdram base parameters.
Here is sample print on LPDDR4, 50MHz channel 0
BW=32 Col=10 Bk=8 CS0 Row=15 CS1 Row=15 CS=2 Die BW=16
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Add sdram driver to handle debug across rockchip SoCs.
This would help to improve code debugging feature for
sdram drivers in rockchip family, whoever wants to
debug the driver should call these core debug code on
their respective platform sdram drivers.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Right now sdram drivers in rockchip SoC are built based
on the SoC configs which may not be an adequate solutions
while adding common or debug driver.
So, add meaningful Kconfig options start with rk3399.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Add support for pctl start for both channel 0, 1 control
and phy registers.
This would also handle pwrup_srefresh_exit init based
on the channel number.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Add pwrup_srefresh_exit to be part of dram_info so-that
the it can help to support pwrup_srefresh_exit in individual
channels while starting pctl in future.
No functionality change.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Add rank_mask based on the rank number, this would keep
the wdql data training loop based on the desired rank mask
value instead of looping for all values.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Add rank_mask based on the rank number, this would keep
the ca data training loop based on the desired rank mask
value instead of looping for all values.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Clear the PI_175 interrupts before processing actual
data training in all relevant calls.
This would help to clear interrupt from previous training.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
data trainings calls like ca, wl, rg, rl, wdql have proper
return types with -EIO and the return type missed to handle
in data_training function.
This patch, add proper return type checks along with useful
debug statement on each data training calls.
Incidentally this would help to prevent the sdram initialization
hang for single channel dram and when the code is trying to
initialize second channel with proper return type of relevant
data training call might failed.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
- CHECK: spaces preferred around that '*'
- CHECK: spaces preferred around that '/'
- CHECK: space preferred before that '|'
- WARNING: macros should not use a trailing semicolon
- CHECK: Unnecessary parentheses around 'fbdiv <= min_fbdiv'
- CHECK: Unnecessary parentheses around 'parent->id == SCLK_MAC'
- CHECK: Unnecessary parentheses around 'parent->dev == clk->dev'
- WARNING: line over 80 characters
- CHECK: Prefer kernel type 'u8' over 'uint8_t'
- Add proper macro definitions arrangements
Note: there are still line over 80 characters and other warnings but
fixing those making code look unreadable, so I kept it as it is.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
dramtype enum numbers as common across all dram controllers
in rockchip, so move the eneum values in common header.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Move common sdram structures like sdram_cap_info, sdram_base_params
into sdram_common header, this would help to reuse the same
from another controllers like px30.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Most of the ddr parameters are common in rk3399_base_params
structure and which would reuse it in another controller like
px30 in future.
So, rename the structure from rk3399_base_params into
sdram_base_params.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Group common ddr attributes like
- rank
- col
- bk
- bw
- dbw
- row_3_4
- cs0_row
- cs1_row
- ddrconfig
into a common cap_info structure for more code readability and extend
if possible based on the new features.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Rename variable name of struct rk3399_sdram_params
from sdram_params with params for more code readability.
No functionality change.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
- Add proper spaces in data training, rk3399_dmc_init, pctl_cfg
- Order include files
- Move macro after include files
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
Fix checkpatch warninigs on sdram_rk3399.c like
- Avoid CamelCase
- Unnecessary parentheses
- Alignment should match open parenthesis
- multiple blank lines
- misspelled
- spaces preferred around that '>>'
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <Kever.yang@rock-chips.com>
RK3399 use sdhci for eMMC and DW MMC for SD Card, and
spl will only try to boot from SDMMC if we don't specify
other boot device for spl-boot-order. So add sdhci and sdmmc
for spl-boot-order here.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
As the Rock960 doesn't have an onboard wired ethernet interface
it's useful to have some common USB wired ethernet devices added
to enable testing.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Remove RK3399 compatible strings as this driver is no longer
used on that SoC.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Configure USB2 PHY register based on "phy_type" property and
handle all the quirks that are relevant for Rockchip RK3399 SoCs.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add compatible string for RK3399 and enable it by default on
Rockchip platforms with USB3 support.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The "simple" OF glue layer for the Designware USB3 core enables
all refernced clocks. These need to be need to be implemented
otherwise the driver fails to probe. A dummy implementation
that simply returns success is sufficient since the RK3399 comes
out of reset with all clock gates open.
Signed-off-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The inline functions net_read_u32() and net_copy_u32() have been created to
copy unaligned u32. But this is not obvious to the compiler. GCC 9.1
introduces a check -Werror=address-of-packed-member which leads to a build
error on Travis CI:
net/bootp.c: In function ‘dhcp_send_request_packet’:
net/bootp.c:1011:27: error: taking address of packed member of
‘struct bootp_hdr’ may result in an unaligned pointer value
[-Werror=address-of-packed-member]
1011 | net_copy_u32(&bp->bp_id, &bp_offer->bp_id);
Change the type of the function parameters to void * to avoid the build
error.
Reported-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
include/net.h currently has no maintainer.
Assign include/net.h to the maintainer of the NET subsystem.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The designware eth driver registers an mdio bus during probe, but if no
PHY is found, this bus is never removed although probe failes and the
driver is shown as not probed in the dm tree.
This later leads to errors when e.g. the mii or mdio commands try to
use available mdio buses because the mdio bus is still registered but
all corresponding data structures are invalid because probe failed.
Fix this by unregistering the mdio bus on probe failure (just as it is
unregistered in the .remove callback, too).
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Calling 'mdio read ...' currently leads to a data abort when no mdio
bus is found.
To fix this, check if 'bus' is a valid pointer before accessing it.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Tested-by: Vladimir Oltean <olteanv@gmail.com>
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Adds a test using a makeshift MDIO MUX. The test is based on the existing
MDIO test. It uses the last emulated PHY register to verify MUX selection.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Adds a short bindings document describing the expected structure of a MDIO
MUX dts node. This is based on Linux binding and the example is in fact
copied from there.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Adds a class for MDIO MUXes, which control access to a series of
downstream child MDIOs.
MDIO MUX drivers are required to implement a select function used to switch
between child buses.
MUX children are registered as MDIO buses and they can be used just like
regular MDIOs.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Added a comment on the limitations of phy_find_by_mask API when scanning
MDIO buses with multiple PHYs present. Added short descriptions to the
other APIs in phy.h for consistency.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Current code fails to probe some C45 PHYs that also respond to C22 reads.
This is the case for PHYs like Aquantia AQR112, Marvell 88X2242 (as
previously posted on the u-boot list).
If the PHY ID reads all 0s just ignore it and try the next devad.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-By: Ramon Fried <rfried.dev@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
- Various FS/disk related fixes with security implications.
- Proper fix for the pci_ep test.
- Assorted bugfixes
- Some MediaTek updates.
- 'env erase' support.
barno was mistakely readed from the target structure,
resulting in undefined behavious depending on the previous memory
content. fix that.
Fixes: bb41333782 ("pci_ep: add pci endpoint sandbox driver")
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
[trini: Drop unused bar_idx]
Signed-off-by: Tom Rini <trini@konsulko.com>
Removed one of the defconfig(obsoleted) file
and unused CONFIG_MMC_SPI definition to avoid confusion
about if this board using non-DM stuff or not.
uCP1020 is completely DM free board, tested and runs well.
Signed-off-by: Oleksandr Zhadan <oleks@arcturusnetworks.com>
Signed-off-by: Michael Durrant <mdurrant@arcturusnetworks.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Some storage devices have multiple hw partitions and both address from
zero, for example eMMC.
However currently block cache invalidation only applies to block
write/erase.
This can cause a problem that data of current hw partition is cached
before switching to another hw partition. And the following read
operation of the latter hw partition will get wrong data when reading
from the addresses that have been cached previously.
To solve this problem, invalidate block cache after a successful
select_hwpart operation.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
The timer0 node has its two clocks written in reversed order. The timer0
is used as the tick timer which causes a problem that the time a delay
function used is 4 times longer.
This patch reverses these two clocks to solve this issue.
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
We don't need a full checkout of Chrome OS to build U-Boot with
Chromium OS verified boot. Update the instructions accordingly and fix a
typo which joins the output directory and defconfig.
Signed-off-by: Simon Glass <sjg@chromium.org>
This patch sets CNTVOFF of ARM CP15 timer to zero to make sure the virtual
counter is fully usable for linux kernel.
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
In ext4fs_read_file in ext4fs.c, a memset can overwrite the bounds of
the destination memory region. This patch adds a check to disallow
this.
Signed-off-by: Paul Emge <paulemge@forallsecure.com>
This patch checks for 0 in several ext4 headers and gracefully
fails instead of raising a divide-by-0 exception.
Signed-off-by: Paul Emge <paulemge@forallsecure.com>
in ext4fs_read_file, it is possible for a broken/malicious file
system to cause a memcpy of a negative number of bytes, which
overflows all memory. This patch fixes the issue by checking for
a negative length.
Signed-off-by: Paul Emge <paulemge@forallsecure.com>
ext_cache_read doesn't null cache->buf, after freeing, which results
in a later function double-freeing it. This patch fixes
ext_cache_read to call ext_cache_fini instead of free.
Signed-off-by: Paul Emge <paulemge@forallsecure.com>
part_get_info_extended and print_partition_extended can recurse infinitely
while parsing a self-referential filesystem or one with a silly number of
extended partitions. This patch adds a limit to the number of recursive
partitions.
Signed-off-by: Paul Emge <paulemge@forallsecure.com>
libvirt v.5.3.0 with QEMU 4.0.0 or above uses PCI automatically and
thus devices (network, storage, etc) are connected via PCI.
Signed-off-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
If U-Boot is loaded and started from TF-A (you need to change
SYS_TEXT_BASE to 0x60000000), it will hang up at flash initialization.
If secure mode is off (default, or -machine virt,secure=off) at qemu,
it will provide dtb with two flash memory banks:
flash@0 {
bank-width = <0x4>;
reg = <0x0 0x0 0x0 0x4000000 0x0 0x4000000 0x0 0x4000000>;
compatible = "cfi-flash";
};
If secure mode is on, on the other hand, qemu provides dtb with 1 bank:
flash@0 {
bank-width = <0x4>;
reg = <0x0 0x4000000 0x0 0x4000000>;
compatible = "cfi-flash";
};
As a result, flash_init()/flash_get_size() will eventually fail.
With this patch applied, relevant CONFIG values are modified.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently, CONFIG_TFABOOT is located in armv8/fsl-layerscape Kconfig,
but it will be also useful for other targets if some additional
configuration are necessary.
So move it to arch/arm/Kconfig.
Please note that CONFIG_TFABOOT still depends on
CONFIG_ARCH_SUPPORT_TFABOOT and so the menu won't come up
if any target doesn't need its own customization for TF-A boot.
This will maintain the compatibility.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Cc: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Cc: York Sun <york.sun@nxp.com>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Cc: Sriram Dash <sriram.dash@nxp.com>
Cc: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Cc: Peng Ma <peng.ma@nxp.com>
Cc: Yuantian Tang <andy.tang@nxp.com>
Cc: Pankit Garg <pankit.garg@nxp.com>
At the moment mkenvimage has two separate read paths: One to read from
a potential pipe, while dynamically increasing the buffer size, and a
second one using mmap(2), using the input file's size. This is
problematic for two reasons:
- The "pipe" path will be chosen if the input filename is missing or
"-". Any named, but non-regular file will use the other path, which
typically will cause mmap() to fail:
$ mkenvimage -s 256 -o out <(echo "foo=bar")
- There is no reason to have *two* ways of reading a file, since the
"pipe way" will always work, even for regular files.
Fix this (and simplify the code on the way) by always using the method
of dynamically resizing the buffer. The existing distinction between
the two cases will merely be used to use the open() syscall or not.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
It is perfectly fine for the read(2) syscall to return with less than
the requested number of bytes read (short read, see the "RETURN VALUE"
section of the man page). This typically happens with slow input
(keyboard, network) or with complex pipes.
So far mkenvimage expects the exact number of requested bytes to be
read, assuming an end-of-file condition otherwise. This wrong behaviour
can be easily shown with:
$ (echo "foo=bar"; sleep 1; echo "bar=baz") | mkenvimage -s 256 -o out -
The second line will be missing from the output.
Correct this by checking for any positive, non-zero return value.
This fixes a problem with a complex pipe in one of my scripts, where
the environment consist of two parts.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Alexander Dahl <ada@thorsis.com>
sgdisk 0.8.10.2 from AOSP doesn't support short options, failing with
errors like this:
sgdisk: invalid option -- 'U'
Test fails due to that error. Let's use long options to make the test
work with any sgdisk version.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
this adds erase environment for mmc storage
squashed fixes:
- add CONFIG_CMD_ERASEENV
- env: erase redundant offset if defined
- changes mentioned by Simon
- fix whitespaces around errmsg
Suggested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
this patch adds basic changes for adding a erase-subcommand to env
with this command the environment stored on non-volatile storage written
by saveenv can be cleared.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
squashed fixes
- start message with "Erasing"
- mark erase-function as optional
- env: separate eraseenv from saveenv
Suggested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
The autocompletion did not work if CONFIG_CMDLINE_PS_SUPPORT was enabled
because U-Boot was comparing the prompt string with CONFIG_SYS_PROMPT .
While this works if CONFIG_CMDLINE_PS_SUPPORT is disabled, this no longer
works if it's enabled because user can override the PS1 . Fix this by
checking prompt string against the current PS1 value.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Drivers need to be able to enable regulators that may be implemented as
GPIO regulators. Example: fsl_esdhc enables the vqmmc supply which is
commonly implemented as a GPIO regulator in order to switch between I/O
voltage levels.
Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
In preparation of being able to enable/disable GPIO regulators, the
code that will be shared among the two kinds to regulators is factored
out into its own source files.
Signed-off-by: Sven Schwermer <sven@svenschwermer.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
When a crash occurs in thumb mode the crash dump is incorrect. This is due
to the usage of a non-existing configuration variable CONFIG_ARM_THUMB in
the definition of macro thumb_mode(regs).
Use CONFIG_IS_ENABLED(SYS_THUMB_BUILD) to detect that the code has been
compiled for thumb mode. Remove ARM_THUMB from config_whitelist.txt.
With the patch crash dumps indicate thumb mode correctly.
On a system with thumb mode:
=> exception unaligned
data abort
pc : [<8f7a2b52>] lr : [<8f7ab1ef>]
reloc pc : [<1780cb52>] lr : [<178151ef>]
sp : 8ed8c3f8 ip : 8f7a2b4d fp : 00000002
r10: 8f7f8228 r9 : 8ed95ea8 r8 : 8ed99488
r7 : 8f7ab141 r6 : 00000000 r5 : 8ed8c3f9 r4 : 8f7f6390
r3 : 8ed9948c r2 : 00000001 r1 : 00000000 r0 : 8f7f6390
Flags: nzCv IRQs off FIQs off Mode SVC_32 (T)
Code: 8f7e 466d f105 0501 (e9d5) 6700
The Flags line has '(T)' and in the Code line the output is in u16 groups.
On a system without thumb mode:
=> exception breakpoint
prefetch abort
pc : [<7ff5a5c8>] lr : [<7ff675ec>]
reloc pc : [<0000e5c8>] lr : [<0001b5ec>]
sp : 7ee0ad80 ip : 7ff5a5cc fp : 7ff674cc
r10: 00000002 r9 : 7ef0bed8 r8 : 7ffd6214
r7 : 7ef0e080 r6 : 00000000 r5 : 7ffd4090 r4 : 00000000
r3 : 7ef0e084 r2 : 00000001 r1 : 00000000 r0 : 7ffd4090
Flags: nzCv IRQs off FIQs off Mode SVC_32
Code: e1a0500d e2855001 e1c560d0 e3a00001 (e12fff1e)
The Flags line does not show '(T)' and in the Code line the output is in
u32 groups.
Reported-by: Marek Vasut <marex@denx.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
JOURNAL is optional for EXT4 (and EXT3) filesystems, so add support for
skipping it. This fixes corrupting EXT4 volumes without JOURNAL after
using uboot's 'ext4write' command.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
The block count entry in the EXT4 filesystem disk structures uses
standard 512-bytes units for most of the typical files. The only
exception are HUGE files, which use the filesystem block size, but those
are not supported by uboot's EXT4 implementation anyway. This patch fixes
the EXT4 code to use proper unit count for inode block count. This fixes
errors reported by fsck.ext4 on disks with non-standard (i.e. 4KiB, in
case of new flash drives) PHYSICAL block size after using 'ext4write'
uboot's command.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Add an implementation of the ds3231 driver that uses the driver
model i2c APIs.
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
There are multiple other openssl engines used by HSMs that can be used to
sign FIT images instead of forcing users to use pkcs11 type of service.
Relax engine selection so that other openssl engines can be specified and
use generic key id definition formula.
Signed-off-by: Vesa Jääskeläinen <vesa.jaaskelainen@vaisala.com>
Cc: Tom Rini <trini@konsulko.com>
This brings in a small update to our Travis-CI config file and
introduces a GitLab CI file. Currently they have the same functionality
and the plan currently is to migrate away from Travis-CI.
To better allow for parallelization of the world build job split things
into 32bit ARM (687 boards), 64bit ARM (215), PowerPC (311 boards) and
everything else (167 boards).
While the 32bit ARM job is heavier than I would like, there is not a
natural split that would reduce it in half or so without requiring the
sort of hard to maintain splits we have to do in Travis CI.
Signed-off-by: Tom Rini <trini@konsulko.com>
Migrate all of the logic in our current .travis.yml file to a GitLab CI
config file. Notable changes are that this will run the jobs on runners
with the "all" tag. The timeout for a job needs to be configured higher
than normal as we no longer split building the world up into a large
number of small jobs but instead perform one big build job. We make use
of stages so that we build and run all of the QEMU + test.py tests first
in order to increase the chance that any problems will be found before
starting the final big build.
Signed-off-by: Tom Rini <trini@konsulko.com>
mt25qu512a is rebranded after its spinoff from STM, so it is
different only in term of extended jedec ID, initial JEDEC id
is same as that of n25q512a.In order to avoid any confussion
with respect to name new entry is added.
This flash is tested for Single I/O mode on LS1046FRWY although
it also support QUAD I/O.
Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
This patch adds SiFive SPI driver. The driver is 100% DM driver
and it determines input clock using clk framework.
The SiFive SPI block is found on SiFive FU540 SOC and is used to
access flash and MMC devices on SiFive Unleashed board.
This driver implementation is inspired from the Linux SiFive SPI
driver available in Linux-5.2 or higher and SiFive FSBL sources.
Signed-off-by: Bhargav Shah <bhargavshah1988@gmail.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Most DM based SPI host controller drivers use SPI_XFER_BEGIN and
SPI_XFER_END flags to enable/disable slave chip select.
This patch extends MMC SPI driver to pass SPI_XFER_BEGIN flag when
MMC command is send at start and pass SPI_XFER_END flag using a
dummy transfer (of bitlen = 0) at the end of MMC command.
Suggested-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Sagar Kadam <sagar.kadam@sifive.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
During QSPI reads, current is_controller_busy function sporadically
fails with -ETIMEDOUT due to fixed number of 5 test loops. Using
timer functions to wait 1000 us instead will fix this.
Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
When slave drivers don't set the max_read_size, the spi-mem should directly
use data.nbytes and not limit to any size. But current logic will limit to
the max_write_size.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
In order to boot u-boot in the aspeed machine we need to run at least
qemu 3059c2f5a813 (v4.0.0-1592-g3059c2f5a813), which is not in a
released tag.
This should be changed to v4.1.0 when it is released.
Signed-off-by: Joel Stanley <joel@jms.id.au>
Tests in test/py/tests/test_env.py like this fail without CONFIG_HUSH_PARSER:
=> => printenv test_env_0
## Error: "test_env_0" not defined
=> .=> setenv test_env_0
=> => echo $test_env_0
$test_env_0
=> F
We also want a mac address so the ethernet device works in qemu.
Signed-off-by: Joel Stanley <joel@jms.id.au>
The aspeed board does not have an upstream MMC driver.
As CONFIG_MMC defaults on, the board would fail to build due to the
CONFIG_DM_MMC migration:
===================== WARNING ======================
This board does not use CONFIG_DM_MMC. Please update
the board to use CONFIG_DM_MMC before the v2019.04 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
Change the defconfig to disable MMC until a driver is submitted.
Signed-off-by: Joel Stanley <joel@jms.id.au>
This will allow for downloading and applying overlays from an MMC/SD
boot media based on the overlay_files ENV variable containing a list
of overlay files.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
This will allow for downloading and applying overlays from an MMC/SD
boot media based on the overlay_files ENV variable containing a list
of overlay files.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
The TI AM654x EVM base board and the associated daughtercards have on-
board I2C-based EEPROMs containing board configuration data. Use the
board detection infrastructure introduced earlier to do the following:
1) Parse the AM654x EVM base board EEPROM and populate items like board
name and MAC addresses into the TI common EEPROM data structure
residing in SRAM scratch space
2) Check for presence of daughter card(s) by probing the associated
presence signals via an I2C-based GPIO expander. Then, if such a
card is found, parse the data such as additional Ethernet MAC
addresses from its on-board EEPROM and populate into U-Boot
accordingly
3) Dynamically create an U-Boot ENV variable called overlay_files
containing a list of daugherboard-specific DTB overlays based on
daughercards found.
This patch adds support for the AM654x base board ("AM6-COMPROCEVM")
as well as for the IDK ("AM6-IDKAPPEVM"), OLDI LCD ("OLDI-LCD1EVM")
PCIe/USB3.0 ("SER-PCIEUSBEVM"), 2 Lane PCIe/USB2.0 ("SER-PCIE2LEVM"),
and general purpuse ("AM6-GPAPPEVM") daughtercards.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
The AM654x EVM based on the TI K3 family of SoCs has an updated board
detection EEPROM structure that contains a TLV record of dedicated MAC
addresses rather than a range of MAC addresses as it was used on earlier
platforms such as DRA7. Add a basic function that allows us setting up
Ethernet MAC addresses into the U-Boot environment based on the MAC
address record contained in the common TI EEPROM structure.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
The AM654x EVM based on the TI K3 family of SoCs have an updated board
detection EEPROM structure, now comprising variable-sized TLV-type
records, containing a superset of what is already being provided on
earlier platforms such as DRA7. Add basic support for parsing the new
data structures contained on the base board into the common TI EEPROM
structure while also providing infrastructure that can be used later on
to parse data from additional EEPROMs such as the ones that are used on
daughtercards for this platform.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
The board detection scheme employed on various TI EVMs makes use of
SRAM scratch space to share data read from an on-board EEPROM between
the different bootloading stages. Map the associated definition that's
used to locate this data into the SRAM scratch space we use on AM654x.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
The malloc pool used before relocation is getting tight leading to
out of memory errors doing certain DM-related calls. Since we are
running the A53 SPL out of DDR let's just go ahead and bump its size
as used in U-Boot proper as well as SPL (via Kconfig default value)
from 8KB to 32KB.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Andrew F. Davis <afd@ti.com>
The malloc pool used before relocation is getting tight leading to
out of memory errors doing certain DM-related calls. Since we are
running the A53 SPL out of DDR let's just go ahead and bump its size
as used in U-Boot proper as well as SPL (via Kconfig default value)
from 8KB to 32KB.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Enable GPIO driver for PCA953X-compatible I2C-based I/O expander
which includes support for the TCA9554/PCA9554-type expander found
on the AM654 EVM base board.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Andrew F. Davis <afd@ti.com>
Enable GPIO driver for PCA953X-compatible I2C-based I/O expander
which includes support for the TCA9554/PCA9554-type expander found
on the AM654 EVM base board.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
The AM654 base board has a TCA9554/PCA9554-type GPIO expander on the
wkup_i2c0 bus at address 0x38 that is used to detect the presence of
daughter cards. Add a respective DTS description of this expander
to enable its use.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Enable I2C via driver model as well as the associated set of U-Boot
commands to allow us interacting with various I2C slave devices.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Andrew F. Davis <afd@ti.com>
Enable I2C via driver model as well as the associated set of U-Boot
commands to allow us interacting with various I2C slave devices.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
To enable the use of an EEPROM-based board detection scheme we need to
be able to access the I2C bus associated with the EEPROMs across all
3 stages of U-Boot: R5 SPL, A53 SPL, and A53 U-Boot (proper). So go
ahead and add/update the wkup_i2c0 peripheral module DTS definitions
and its associated pinmux node accordingly.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Only U-Boot specifc DT properties or overrides, must be in -u-boot.dtsi.
Pinctrl nodes does not belong here. Now that pinctrl nodes are in kernel
DT, there is no reason to be keep these in -u-boot.dtsi. Move them to
proper places so that it would ease copying DT entries from kernel DT.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
There is no need for to include this header here, so drop it.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
K3 devices have I2C IP that is same as OMAP2+ family. Allow driver to be
compiled for ARCH_K3.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Add instructions for flashing boot images to the eMMC with a
layout of the address where each image needs to be flashed.
Also add instructions to flash filesystem partition in user
partition and boot kernel from the rootfs.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Enable all the relevant configs that enables support for loading
sysfw via MMC.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Use the System Firmware (SYSFW) loader framework to load and start
the SYSFW as part of the AM654 early initialization sequence. While
at it also initialize the WKUP_UART0 pinmux as it is used by SYSFW
to print diagnostic messages.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Switch to using the full malloc scheme in post-relocation SPL to allow
better utilization of available memory for example by allowing memory
to get freed. Initially allocate a 16MB-sized region in DDR starting
at address 0x84000000 for this purpose.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
In order to be able to use more advanced driver functionality which often
relies on having BSS initialized during early boot prior to relocation
several things need to be in place:
1) Memory needs to be available for BSS to use. For this, we locate BSS
at the top of the MCU SRAM area, with the stack starting right below
it,
2) We need to move the initialization of BSS prior to entering
board_init_f(). We will do this with a separate commit by turning on
the respective CONFIG option.
In this commit we also clean up the assignment of the initial SP address
as part of the refactoring, taking into account the pre-decrement post-
increment nature in which the SP is used on ARM.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Introduce a framework that allows loading the System Firmware (SYSFW)
binary as well as the associated configuration data from an image tree
blob named "sysfw.itb" from an FS-based MMC boot media or from an MMC
RAW mode partition or sector.
To simplify the handling of and loading from the different boot media
we tap into the existing U-Boot SPL framework usually used for loading
U-Boot by building on an earlier commit that exposes some of that
functionality.
Note that this initial implementation only supports FS and RAW-based
eMMC/SD card boot.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The current U-Boot SPL image loader infrastructure is very powerful,
able to initialize and load from a variety of boot media however it
is strongly geared towards loading specific types of images in a very
specific way. To address the need being able to use this infrastructure
to load arbitrary image files go ahead and refactor it as follows:
- Refactor existing spl_mmc_load_image function into superset function,
accepting additional arguments such as filenames and media load offset
(same concept can also be applied toother spl_XXX_load_image functions)
- Extend the loader function to "remember" their peripheral initialization
status so that the init is only done once during the boot process,
- Extend the FIT image loading function to allow skipping the parsing/
processing of the FIT contents (so that this can be done separately
in a more customized fashion)
- Populate the SPL_LOAD_IMAGE_METHOD() list with a trampoline function,
invoking the newly refactored superset functions in a way to maintain
compatibility with the existing behavior
This refactoring initially covers MMC/SD card loading (RAW and FS-based).
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
On some platform we have sufficient memory available early on to allow
setting up and using a basic BSS prior to entering board_init_f(). Doing
so can for example be used to carry state over to board_init_r() without
having to resort to extending U-Boot's global data structure.
To support such scenarios add a Kconfig option called CONFIG_SPL_EARLY_BSS
to allow moving the initialization of BSS prior to entering board_init_f(),
if enabled. Note that using this option usually should go along with using
CONFIG_SPL_SEPARATE_BSS and configuring BSS to be located in memory
actually available prior to board_init_f().
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
We would like to use the driver even without power domains being
specified for cases such as during early boot when the required power
domains have already gotten enabled by the SoC's boot ROM and such
explicit initialization is not needed and possible.
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add Support for creating a GPT partition for the filesystem in eMMC.
The filesystem is created in the user partition (partition 0).
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Add a platform specific set_control_reg() callback to help switch to
UHS speed modes.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The HOST_CONTROL2 register is a part of SDHC v3.00 and not just specific
to arasan/zynq controllers. Add the same to sdhci.h.
Also create a common API to set UHS timings in HOST_CONTROL2.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add support in the driver for handling phy specific registers.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
With changes in the driver requiring phy related properties,
add the same for the SD card node to prevent breaking boot with
the driver update.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The am654_sdhci driver needs to switch the clock off
before disabling its phy dll and needs to re-enable
the clock before enabling the phy again.
Therefore, make the sdhci_set_clock() function accessible
in the am654_sdhci driver.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add Support for masking some bits in the capabilities
register of a host controller.
Also remove the redundant readl() into caps1.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
In device nodes with more than one entry in the reg property,
it is sometimes useful to regmap only of the entries. Add an
API regmap_init_mem_index() to facilitate this.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The host controller works perfectly well without having to add any
quirks. Remove them.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Sync the sdhci0 node from kernel. This changes the compatible that is
required to be there in the driver. Change the same for the SD card node
which is not yet supported in kernel. This also syncs the main_pmx0 node
as a side effect.
Also change the name of the driver to match the compatible in kernel.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
The device path structure is packed. So no assumption on the alignment is
possible. Copy the file name in efi_file_from_path() to assure there is no
unaligned access.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
In packed structures GUIDs are not aligned. Avoid a build error with
GCC 9.1 by using const void * as argument for guidcmp().
Reported-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When building with GCC 9.1 an error occurs:
disk/part_efi.c: In function ‘gpt_verify_partitions’:
disk/part_efi.c:737:49: error: taking address of packed member of
‘struct _gpt_entry’ may result in an unaligned pointer value
[-Werror=address-of-packed-member]
737 | gpt_convert_efi_name_to_char(efi_str, gpt_e[i].partition_name,
| ~~~~~~~~^~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
make[1]: *** [scripts/Makefile.build:279: disk/part_efi.o] Error 1
make: *** [Makefile:1594: disk] Error 2
Adjust gpt_convert_efi_name_to_char() to accept unaligned strings.
Reported-by: Ramon Fried <rfried.dev@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Change comment for struct efi_pool_allocation to match Sphinx style.
Describe all structure fields.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add missing parameter descriptions.
Remove an invalid link.
Correct the formatting of a function comment.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
scripts/kernel-doc pointed out some errors in the function comments in
efi_boottime.c.
Add missing and remove superfluous parameter descriptions.
Escape * in a function description.
Add empty lines for readability.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We currently have some inconsistent use of efi_add_memory_map()
throughout the code. In particular the return value of efi_add_memory_map()
is not interpreted the same way by various users in the codebase.
This patch does the following:
- Changes efi_add_memory_map() to return efi_status_t.
- Adds a method description to efi_add_memory_map().
- Changes efi_add_memory_map() to return EFI_SUCCESS
- Returns non-zero for error in efi_add_memory_map()
- Updates efi_allocate_pages() to new efi_add_memory_map()
- Updates efi_free_pages() to new efi_add_memory_map()
- Updates efi_carve_out_dt_rsv() to new efi_add_memory_map()
- Updates efi_add_runtime_mmio() to new efi_add_memory_map()
Fixes: 5d00995c36 ("efi_loader: Implement memory allocation and map")
Fixes: 74c16acce3 ("efi_loader: Don't allocate from memory holes")
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Alexander Graf <agraf@csgraf.de>
Signed-off-by: Bryan O'Donoghue <pure.logic@nexus-software.ie>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide a unit test for SetVirtualAddressMap() and ConvertPointer().
As ConvertPointer() is not implemented yet this will spit out some
warnings.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Implement the EVT_SIGNAL_VIRTUAL_ADDRESS_CHANGE event.
This requires allocating the event and the event list from runtime data.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
efi_set_virtual_address_map_runtime() must be of type __efi_runtime.
Fixes: ee8ebaaaae ("efi_loader: split off detaching SetVirtualAddress()")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Boot services are not available after calling ExitBootServices(). So we
should not try to close an event here.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
We should use predefined constants instead of magic numbers.
Move some constant definitions from include/pe.h to
include/asm-generic/pe.h.
Use these constants in crt0_*_efi.S.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
IMAGE_SUBSYSTEM_EFI_APPLICATION is already defined in
include/asm-generic/pe.h which is included in include/pe.h. We should
not define it twice.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
So far USB was not enabled for the Allwinner H6 boards, as the PHY
driver was not ready and the clock gates were missing. Since this is now
fixed, let's add the PHY and the OHCI/EHCI drivers to the build, for
all existing H6 boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The USB PHY used in the Allwinner H6 SoC has some pecularities (as usual),
which require a small addition to the USB PHY driver:
In this case the second PHY is PHY3, not PHY1, so we need to skip number
1 and 2 in the code. Just use the respective code from Linux for that.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
To enable USB support in U-Boot, add the required clock and reset gates
to the H6 clock driver. Once enabled, the generic EHCI/OCHI drivers will
pick them up from there automatically.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The Allwinner H6 pin controller is not really special, at least not when
it comes to normal GPIO operation.
Add the H6 compatible strings to the list of recognised strings, to make
GPIOs work for H6 boards.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Probably for no particular reason SUNXI_GPIO was still defined the "old
way", in header files only.
Introduce SUNXI_GPIO to the Kconfig file in drivers/gpio to remove
another line from our dreadful config_whitelist.txt.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Corentin Labbe <clabbe.montjoie@gmail.com> # Pine-H64
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Add some basic line delay values to be used with DDR3 DRAM chips on
some H6 TV boxes.
Taken from a register dump after boot0 initialised the DRAM.
Put them as the default delay values for DDR3 DRAM until we know better.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Add a routine to program the timing parameters for DDR3-1333 DRAM chips
connected to the H6 DRAM controller.
The values were gathered from doing back-calculations from a register
dump, trying to match them up with the official JEDEC DDDR3 spec.
If in doubt, the register dump values were taken for now, but the JEDEC
recommendation were added as a comment.
Many thanks to Jernej for contributing fixes!
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
At the moment the H6 DRAM driver only supports LPDDR3 DRAM.
Extend the driver to cover DDR3 DRAM as well.
The changes are partly motivated by looking at the ZynqMP register
documentation, partly by looking at register dumps after boot0/libdram
has initialised the controller.
Many thanks to Jernej for contributing some fixes!
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Currently the H6 DRAM driver only supports one kind of LPDDR3 DRAM.
Split the timing parameters for this LPDDR3 configuration into a
separate file, to allow selecting an alternative later at compile time
(as the sunxi-dw driver does).
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The DRAM controller manual suggests to first program the PHY
initialisation parameters to the PHY_PIR register, and then set bit 0 to
trigger the initialisation. This is also used in boot0.
Follow this recommendation by setting bit 0 in a separate step.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Using memcpy() is, however tempting, not a good idea: It depends on the
specific implementation of memcpy, also lacks barriers. In this
particular case the first registers were written using 64-bit writes,
and the last register using four separate single-byte writes.
Replace the memcpy with a proper loop using the writel() accessor.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Tested-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Macb can be used with Xilinx PCS/PMA PHY in fpga which is a 1000-baseX
phy(lpa 0x41e0). This patch adds checks for LPA_1000XFULL and
LPA_1000XHALF bits.
Signed-off-by: Radu Pirea <radu_nicolae.pirea@upb.ro>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
If macb is gem and is gigabit capable, lpa value is not read from
the right register(MII_LPA) and is read from MII_STAT1000. This patch
fixes reading of the lpa value.
Signed-off-by: Radu Pirea <radu_nicolae.pirea@upb.ro>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add new driver for the TI AM65x SoC Gigabit Ethernet Switch subsystem (CPSW
NUSS). It has two ports and provides Ethernet packet communication for the
device and can be configured as an Ethernet switch. CPSW NUSS features: the
Reduced Gigabit Media Independent Interface (RGMII), Reduced Media
Independent Interface (RMII), and the Management Data Input/Output (MDIO)
interface for physical layer device (PHY) management. The TI AM65x SoC has
integrated two-port Gigabit Ethernet Switch subsystem into device MCU
domain named MCU_CPSW0. One Ethernet port (port 1) with selectable RGMII
and RMII interfaces and an internal Communications Port Programming
Interface (CPPI) port (Host port 0).
Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX
channels and on RX channels operating by TI am654 NAVSS Unified DMA
Peripheral Root Complex (UDMA-P) controller.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Use phys_addr_t for mdio_base address to avoid build
warnings on arm64 and dra7. Cast it to uintprt_t before
assigning to regs.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This patch is to use block layer to read from mmc in cortina
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Because all MSCC SoC use the same MDIO bus, put the implementation in
one common file(mscc_miim) and make all the other MSCC network drivers to
use these functions.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Adds UCLASS_MDIO DM class supporting MDIO buses that are probed as
stand-alone devices. Useful in particular for systems that support
DM_ETH and have a stand-alone MDIO hardware block shared by multiple
Ethernet interfaces.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
When serdes configuration was written in hardware there was a delay
of 100ms to be sure that configuration was written. But the delay is not
needed because already the function serdes_write it is checking that the
operation finished.
Therefore remove the mdelay. This improves the speed of configuring the
network driver.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The code block reading the DT property for the clock output control was
before the phy's DT node pointer was set, so it could never work. Move
it after the node pointer is set.
Also store the unsigned 32-bit property into an unsigned value, not a
signed value, as the former will cause a problem if value overflows.
For instance, if one were to add 0xffffffff as a code to mean the clock
output should be turned off.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Janine Hagemann <j.hagemann@phytec.de>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
When not using DM_ETH, these PHY settings are programmed with default
values hardcoded into the driver. When using DM_ETH, they should come
from the device tree. However, if the device tree does not have the
properties, the driver will silent use -1. Which is entirely out of
range, programs nonsense into the PHY's registers, and does not work.
Change this to use the same defaults as non-DM_ETH if the device tree is
lacking the properties.
As an alternative, the kernel driver for the phy will display an error
message and fail if the device tree is lacking.
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Janine Hagemann <j.hagemann@phytec.de>
Cc: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
These are standard across gigabit phys. These mostly extend the
auto-negotiation information with gigabit fields.
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Share the code that prints out a register field with the function that
prints out the "special" fields.
There were two arrays the register dump list, one with reg number and
name, another with a pointer to the field table and the table size.
These two arrays had have each entry match what register is referred to.
Combine them into just one table. Now they can't not match and there is
just one table.
Add some missing consts to pointers to string literals.
The dump code was ignoring the regno field in the description table and
assuming register 0 was at index 0, etc. Have it use the field.
Change reg > max+1 into reg >= max, which doesn't fail if max+1 could
overflow, besides just making more sense.
Signed-off-by: Trent Piepho <tpiepho@impinj.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
- mmc spi driver model support
- drop mmc_spi command
- enhanced Strobe mmc HS400 support
- minor mmc bug/fixes and optimization
- omap hsmmc and mvbeu update
- sdhci card detect support
The Beelink X2 is an STB based on the Allwinner H3 SoC with a uSD slot,
2 USB ports( 1 * USB-2 Host, 1 USB OTG), a 10/100M ethernet port using the
SoC's integrated PHY, Wifi via an sdio wifi chip, HDMI, an IR receiver, a
dual colour LED and an optical S/PDIF connector.
Linux commit details about the sun8i-h3-beelink-x2.dts sync:
"ARM: dts: sun8i: h3: Add ethernet0 alias to Beelink X2"
(sha1: cc4bddade114b696ab27c1a77cfc7040151306da)
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
The choice of the SPL_TEXT_BASE is not really a decision that should be
specified by each board's defconfig, as this setting is actually
dictated by the SoC's memory map and the BootROM behaviour.
To make this obvious and reduce the clutter in the defconfig files,
let's specify the SoC constraints in the Kconfig stanza.
This allows us to remove these lines from the defconfig files again.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Flash system partition with fastboot will earse the partition firstly
The 600ms timeout will fail on some SD Card. Enlarge it to 5s to make
it works for most of sdcard
Cc: guoyin.chen <guoyin.chen@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Implement set_enhanced_strobe hook for fsl_esdhc_imx,
,in esdhc_set_timing and esdhc_change_pinstate, also handle HS400_ES.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
eMMC 5.1+ supports HS400 Enhances Strobe mode without the need for
tuning procedure.
The flow is as following:
- set HS_TIMIMG (Highspeed)
- Host change freq to <= 52Mhz
- set the bus width to Enhanced strobe and DDR8Bit(CMD6),
EXT_CSD[183] = 0x86 instead of 0x80
- set HS_TIMING to 0x3 (HS400)
- Host change freq to <= 200Mhz
- Host select HS400 enhanced strobe complete
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Should use CONFIG_IS_ENABLED not IS_ENABLED for clock and regulator drivers,
CONFIG_IS_ENABLED will check the CONFIG_SPL_CLK and CONFIG_SPL_DM_REGULATOR
when building SPL.
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The mmc_spi command was added to manually setup MMC over SPI bus
using command. This was required by the legacy non-DM MMC_SPI driver.
With DM based MMC_SPI driver in-place, we can now use all general
storge commands and mmc command for MMC over SPI bus hence we remove
the mmc_spi command all it's references.
Suggested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The MMC mode and width are fixed for MMC SPI host hence we skip
sd_select_mode_and_width() and mmc_select_mode_and_width() for
MMC SPI host.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Accessing the boot partition had been error prone with HS200 and HS400 and
was disabled. The driver first switched to a lesser mode and then switched
the partition access. It was mostly due to a bad handling of the switch and
has been fixed, so let's remove this 'feature'
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
The switch operation can sometimes make the bus unreliable, in that case
the send_status parameter should be false to indicate not to poll using
CMD13. If polling on dat0 is possible, we should use it to detect the end
of the operation.
At the end of the operation it is safe to use CMD13 to get the status of
the card. It is important to do so because the operation may have failed.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
The e-MMC spec allows the e-MMC to specify a timeout for the partition
switch command. It can take up to 2550 ms. There is no lower limit to this
value in the spec, but do as the the linux driver does and force it to be
at least 300ms.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Starting with rev 4.5, the eMMC can define a generic timeout for the
SWITCH command.
Following Linux Kernel code, the timeout also changed from 1000 -> 500
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Using the DAT0 line as a rdy/busy line is an alternative to reading the
status register of the card. It especially useful in situation where the
bus is not in a good shape, like when modes are switched.
This is also how the linux driver behaves.
Note of warning: As per the specification, while polling on DAT0 the CLK
must not turned off: "[...] Without a clock edge the Device (unless
previously disconnected by a deselect command (CMD7)) will force the DAT0
line down, forever. [...]"
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
mmc_send_status() is currently used to poll the card until it is ready, not
actually returning the status of the card.
Make it return the status and add another function to poll the card.
Also remove the 'extern' declaration in the mmc-private.h header to comply
with the coding standard.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
This reverts commit 318a7a576b.
The last and only user of this callback had been the omap_hsmmc driver.
It is not used anymore. Removing the callback.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
This is not required. The MMC core sends CMD0 right after the
initialization and it serves the same purpose.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
It sometimes happen that the PSTATE register does not indicate that the
bus is ready when it really is. This usually happens after a mode switch.
In that case it makes sense to reset the FSM handling the CMD and DATA
Also reset the FSMs if the STATE register cannot be cleared. This also
sometimes happens after a mode switch.
Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
This patch reads card detect properties from device tree &
added mmc capability macros in mmc.h.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Removed MMC_CAP_NONREMOVABLE, MMC_CAP_NEEDS_POLL macros from
mvebu_mmc.h to avoid redefining of these macros when compiled with
mvebu based configs.
Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
- syscon: add support for power off
- stm32mp1: add op-tee config
- stm32mp1: add specific commands: stboard and stm32key
- add stm32 mailbox driver
- solve many stm32 warnings when building with W=1
- update stm32 gpio driver
Since we have limited resources in SPL, it is the best interest
to keep the SPL as small as possible and that includes the DTB.
There are a few items in the device tree that can be removed,
because these boards don't use them.
Signed-off-by: Adam Ford <aford173@gmail.com>
add gpio-hog support. GPIO hogging is a mechanism
providing automatic GPIO request and configuration
as part of the gpio-controller's driver probe function.
for more infos see:
doc/device-tree-bindings/gpio/gpio.txt
Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Michal Simek <michal.simek@xilinx.com> (zcu102)
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
The MMC card-detect pin was incorrectly defined which was fixed.
This patch resync's the dts and removes the u-boot specific fix.
Signed-off-by: Adam Ford <aford173@gmail.com>
With a recent update to the pinctrl-single driver and the fact
that the da850evm has both DM and OF_CONTROL working in both SPL
and U-Boot, some of the manual pinmuxing can be setup to only
be activated when either the driver doesn't have DM for it, or
when CONFIG_PINMUX isn't available (only during SPL). If the
code ever shrinks enough to support PINCTRL in SPL, a lot of this
can go away. This also remove some manual pinmuxing not needed
by SPL to give SPL a little more breathing room.
Signed-off-by: Adam Ford <aford173@gmail.com>
The TI Davinci (da850/l138/am1808) use pinctrl-single,bits for
pinmuxing peripherals. This patch allosw the pinctrl-single
driver to parse the pinctrl-single,bits options and correctly
setup devices.
Signed-off-by: Adam Ford <aford173@gmail.com>
The USE_TINY_PRINTF symbol only changes things within SPL and TPL
builds, so make it depend on that support. Next, make it default as
within these cases we should rarely have need of more advanced print
formats outside of the debug context.
To do this, in a few cases we need to correct our Kconfig dependencies
as we had cases of non-SPL targets select'ing this symbol. Finally, in
the case of a few boards we really do need the full printf
functionality.
Signed-off-by: Tom Rini <trini@konsulko.com>
Add SPL_DM_REGULATOR configs for palmas/lp873x/lp87565. These were missing
and the Makefile already assumes them to be defined. Add the corresponding
SPL config options. This enables the regulator support in SPL.
Signed-off-by: Keerthy <j-keerthy@ti.com>
Add SPL_PMIC configs for palmas/lp873x/lp87565. These were missing
and the Makefile already assumes them to be defined. Add the corresponding
SPL config options. This enables the pmics in SPL.
Signed-off-by: Keerthy <j-keerthy@ti.com>
This converts LEGO MINDSTORMS EV3 to the driver model. MMC, SERIAL, SPI
and SPI_FLASH are converted.
The device tree contains only the minimal nodes required by U-Boot
since the size of U-Boot is limited to 256K on this device.
Signed-off-by: David Lechner <david@lechnology.com>
This commit addresses the following warning, when _NOT_ USB_MUSB_HOST:
[...]
CC drivers/usb/gadget/f_mass_storage.o
CC drivers/usb/musb-new/omap2430.o
CC drivers/usb/gadget/f_fastboot.o
CC env/common.o
CC env/env.o
/src/etinker/software/u-boot-master/drivers/usb/musb-new/omap2430.c: In function ‘omap2430_musb_probe’:
/src/etinker/software/u-boot-master/drivers/usb/musb-new/omap2430.c:239:6: warning: assignment to ‘int’ from ‘struct musb *’ makes integer from pointer without a cast [-Wint-conversion]
ret = musb_register(&platdata->plat,
^
LD drivers/usb/host/built-in.o
CC drivers/usb/gadget/f_sdp.o
CC fs/ext4/ext4fs.o
[...]
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
This addresses the following warning message:
===================== WARNING ======================
This board does not use CONFIG_DM_USB. Please update
the board to use CONFIG_DM_USB before the v2019.07 release.
Failure to update by the deadline may result in board removal.
See doc/driver-model/MIGRATION.txt for more info.
====================================================
As USB support for older OMAP3 SoC's improves, OMAP3 EVM can be
readily adapted. There is some additional 'gpio-hog' support
needed to fully setup USB in a similar manner to Linux.
Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
add m41t11 support in ds1307 driver. changes:
- add compatible string for m41t11
- check if RTC clock is running, if not
enable the clock
Signed-off-by: Heiko Schocher <hs@denx.de>
When MMC_TINY is enabled, support for only one MMC device
is provided. Boards that register more than one device,
will just write over mmc_static keeping only the last one
registered.
This commit prevents this, keeping only the first MMC
device created. A debug warning message is added, if nothing
else, as a hint/documentation for developers.
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
The SPL_MMC_TINY implements feature-reduced MMC support
on SPL, and as such, it's more consistent and convenient
to find it as part of the SPL configuration.
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com>
Add sub-command 'env info' to display environment information:
- env_valid : is environment valid
- env_ready : is environment imported into hash table
- env_use_default : is default environment using
This command can be optionally used for evaluation in scripts:
[-d] : evaluate whether default environment is used
[-p] : evaluate whether environment can be persisted
The result of multiple evaluations will be combined with AND.
Signed-off-by: Leo Ruan <tingquan.ruan@cn.bosch.com>
Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
[trini: Do not enable by default]
Signed-off-by: Tom Rini <trini@konsulko.com>
`if (!strncmp(dev->name, name, strlen(name)))` might find out
the wrong device, it might find out `dram_pll_ref_sel`, when name is
`dram_pll`. So use strcmp to avoid such issue.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
As compatible string "st,stm32-gpio" is no more used, .ofmatch
callback becomes useless, remove it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Since pinctrl_stm32 driver update, each gpio bank is now binded
by pinctrl driver. The compatible string "st,stm32-gpio" becomes
useless, remove it.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Update .bind callback in order to bind all pinctrl subnodes
with "gpio-controller" property to gpio_stm32 driver.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
As this driver is used on stm32f4/f7/h7 and stm32mp1
SoCs, rename it with a more generic name.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves the following warnings:
drivers/spi/stm32_spi.c: In function 'stm32_spi_write_txfifo':
drivers/spi/stm32_spi.c:116:20: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
if (priv->tx_len >= sizeof(u32) &&
^~
drivers/spi/stm32_spi.c:122:27: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
} else if (priv->tx_len >= sizeof(u16) &&
^~
drivers/spi/stm32_spi.c: In function 'stm32_spi_read_rxfifo':
drivers/spi/stm32_spi.c:150:21: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
(priv->rx_len >= sizeof(u32) || (sr & SPI_SR_RXWNE))) {
^~
drivers/spi/stm32_spi.c:156:21: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
(priv->rx_len >= sizeof(u16) ||
^~
drivers/core/simple-bus.c:15:12: warning: no previous prototype for 'simple_bus_translate' [-Wmissing-prototypes]
fdt_addr_t simple_bus_translate(struct udevice *dev, fdt_addr_t addr)
^~~~~~~~~~~~~~~~~~~~
drivers/spi/stm32_spi.c: In function 'stm32_spi_set_speed':
drivers/spi/stm32_spi.c:335:10: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
div > STM32_MBR_DIV_MAX)
^
drivers/spi/stm32_spi.c:344:19: warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]
if ((mbrdiv - 1) < 0)
^
drivers/spi/stm32_spi.c: In function 'stm32_spi_probe':
drivers/spi/stm32_spi.c:531:16: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
for (i = 0; i < ARRAY_SIZE(priv->cs_gpios); i++) {
^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves the following warnings:
cmd/pinmux.c: In function 'do_dev':
cmd/pinmux.c:26:6: warning: this statement may fall through [-Wimplicit-fallthrough=]
if (ret) {
^
cmd/pinmux.c:30:2: note: here
case 1:
^~~~
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves warnings detected by setting W=1 when building.
Warnings type detected:
- [-Wtype-limits]
- [-Wsign-compare]
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves warnings detected by setting W=1 when building.
Warnings type detected:
- [-Wsign-compare]
- [-Wtype-limits]
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves the following warnings:
warning: this statement may fall through [-Wimplicit-fallthrough=]
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves the following warnings:
warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]
if (*idx < 0)
^
drivers/pinctrl/pinctrl_stm32.c: At top level:
warning: no previous prototype for 'stm32_pinctrl_probe' [-Wmissing-prototypes]
int stm32_pinctrl_probe(struct udevice *dev)
^~~~~~~~~~~~~~~~~~~
Signed-off-by: Patrice CHOTARD <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves the following warnings:
drivers/ram/stm32mp1/stm32mp1_ram.c: In function 'stm32mp1_ddr_clk_enable':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
for (idx = 0; idx < ARRAY_SIZE(clkname); idx++) {
^
drivers/ram/stm32mp1/stm32mp1_ram.c: In function 'stm32mp1_ddr_setup':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
for (idx = 0; idx < ARRAY_SIZE(param); idx++) {
^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves the following warnings:
warning: no previous prototype for 'fuse_read' [-Wmissing-prototypes]
int fuse_read(u32 bank, u32 word, u32 *val)
^~~~~~~~~
CC cmd/sf.o
warning: no previous prototype for 'fuse_prog' [-Wmissing-prototypes]
int fuse_prog(u32 bank, u32 word, u32 val)
^~~~~~~~~
warning: no previous prototype for 'fuse_sense' [-Wmissing-prototypes]
int fuse_sense(u32 bank, u32 word, u32 *val)
^~~~~~~~~~
warning: no previous prototype for 'fuse_override' [-Wmissing-prototypes]
int fuse_override(u32 bank, u32 word, u32 val)
^~~~~~~~~~~~~
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves the following warnings:
drivers/power/regulator/stm32-vrefbuf.c: In function 'stm32_vrefbuf_set_value':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
if (uV == stm32_vrefbuf_voltages[i]) {
^~
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves the following warnings:
drivers/clk/clk_stm32mp1.c: In function 'stm32mp1_clk_get_parent':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
for (i = 0; i < ARRAY_SIZE(stm32mp1_clks); i++)
^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves the following warnings:
drivers/i2c/stm32f7_i2c.c: In function 'stm32_i2c_compute_solutions':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
if (scldel < scldel_min)
^
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
if (((sdadel >= sdadel_min) &&
^~
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
(sdadel <= sdadel_max)) &&
^~
drivers/i2c/stm32f7_i2c.c: In function 'stm32_i2c_choose_solution':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
if (clk_error < clk_error_prev) {
^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves the following warnings:
drivers/gpio/stm32_gpio.c: In function 'stm32_offset_to_index':
: comparison between signed and unsigned integer expressions [-Wsign-compare]
if (idx == offset)
^~
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves the following warnings:
drivers/adc/stm32-adc-core.c: In function 'stm32h7_adc_clk_sel':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
for (i = 0; i < ARRAY_SIZE(stm32h7_adc_ckmodes_spec); i++) {
^
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
for (i = 0; i < ARRAY_SIZE(stm32h7_adc_ckmodes_spec); i++) {
^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Fabrice Gasnier <fabrice.gasnier@st.com>
This patch solves the following warnings:
drivers/adc/stm32-adc.c: In function 'stm32_adc_chan_of_init':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
if (num_channels > adc->cfg->max_channels) {
^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Fabrice Gasnier <fabrice.gasnier@st.com>
This patch solves the following warnings:
arch/arm/mach-stm32mp/bsec.c: In function 'stm32mp_bsec_read':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
if (offset >= STM32_BSEC_OTP_OFFSET) {
^~
arch/arm/mach-stm32mp/bsec.c: In function 'stm32mp_bsec_write':
warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
if (offset >= STM32_BSEC_OTP_OFFSET) {
^~
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves warnings detected by setting W=1 when building.
Warnings type detected:
- [-Wmissing-prototypes]
- [-Wimplicit-fallthrough=]
Signed-off-by: Christophe Kerello <christophe.kerello@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves the following warnings:
drivers/serial/serial_stm32.c: In function 'stm32_serial_probe':
warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]
if (plat->clock_rate < 0) {
^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves the following warnings:
warning: no previous prototype for 'board_quiesce_devices' [-Wmissing-prototypes]
void board_quiesce_devices(void)
^~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
This patch solves the following warnings:
arch/arm/mach-stm32mp/cpu.c:378:16: warning: comparison between signed
and unsigned integer expressions [-Wsign-compare]
if (instance > ARRAY_SIZE(serial_addr))
^
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add support of Trusted boot chain with OP-TEE
- reserved 32MB at the end of the DDR for OP-TEE
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Change config not directly linked to CONFIG_DISTRO_DEFAULTS.
Allow to deactivate CONFIG_SYS_MTDPARTS_RUNTIME when
CONFIG_MTDPARTS_DEFAULT is defined in defconfig.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Adds support for SYSRESET_POWER_OFF = PMIC power off used by command
power off and introduced by commit 751fed426f ("sysreset: Add a way
to find the last reset").
The driver use SYSRESET_POWER for the PMIC-level power cycle, with restart.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Synchronize device tree with v5.2-rc4 label and
update the associated u-boot dtsi.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Pierre-Jean Texier <pjtexier@koncepto.io>
Prevent USB enumeration and avoid unnecessary delay in bootcmd_pxe
as Ethernet device is not attached to USB.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
For boot from flash, check presence of default environment to force
save env.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Pierre-Jean Texier <pjtexier@koncepto.io>
U-Boot should disable nodes in device tree if needed according
ETZPC status in ft_system_setup().
ETZPC itself use an array on addresses to do the match between the status
bits and the node.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Add "st,package" entry. Possibles values are:
-STM32MP_PKG_AA for LFBGA448 (18*18) package
-STM32MP_PKG_AB for LFBGA354 (16*16) package
-STM32MP_PKG_AC for TFBGA361 (12*12) package
-STM32MP_PKG_AD for TFBGA257 (10*10) package
see Linux commit 966d9b928f626a54a0c27c0fdae1e3dfe9bab416
for v5.2-rc1
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
U-Boot activates regulators by reading the "regulator-boot-on"
property in DT; it is requested by M4 early Boot feature.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Deactivate WATCHDOG by default in u-boot to avoid issue to boot kernel
and rootfs without the needed daemon to reload it.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Pierre-Jean Texier <pjtexier@koncepto.io>
The new type sysreset 'POWER_OFF', introduced by
commit 751fed426f ("sysreset: Add a way to find the last reset")
is only supported for "syscon-poweroff" compatible.
For details see Linux binding:
./Documentation/devicetree/bindings/power/reset/syscon-poweroff.txt
This patch removes the support of POWER_OFF for "syscon-reboot"
and keeps only the COLD reset (for command reset support)
and it introduces the compatible "syscon-poweroff"
for the POWER_OFF case.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
- Sandbox improvements including .dts refactor
- Minor tracing and PCI improvements
- Various other minor fixes
- Conversion of patman, dtoc and binman to support Python 3
- SPL SATA enhancements to allow booting from RAW SATA device
needed for Clearfog (Baruch)
- Enable SATA booting on Clearfog (Baruch)
- Misc changes to Turris Omnia (Marek)
- Enable CMD_BOOTZ and increase SYS_BOOTM_LEN on crs305-1g-4s
(Luka)
- Enable FIT support for db-xc3-24g4xg (Chris)
- Enable DM_SPI on Keymile Kirkwood board with necessary changes
for this (Pascal)
- Set 38x and 39x AVS on lower frequency (Baruch)
UniPhier SoC updates for v2019.10
- import DT updates from Linux
- add UniPhier SPI controller driver
- make U-Boot image for 64bit SoCs position independent
- tidy up various init code for next generation SoCs
- misc cleanups
The board_early_init_f() inits clock before initing pinmux. However,
the clock configuration code might need to adjust PMIC settings of a
PMIC on I2C bus (e.g. board/ti/am335x/board.c does that). If the I2C
bus pin muxing is not configured before attempting to communicate
with the PMIC, the communication will silently fail and the prcm_init()
may configure fast enough CPU clock that the default voltage provided
by the PMIC would be insufficient and the platform would become
unstable.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Cc: Tom Rini <trini@konsulko.com>
Rename:
- doc/{README.avb2 => android/avb2.txt}
- doc/{README.android-fastboot => android/fastboot.txt}
Add a new file documenting the 'bcb' command:
- doc/android/bcb.txt
The new directory structure has been reviewed by Simon in
https://patchwork.ozlabs.org/patch/1101107/#2176031 .
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
'Bootloader Control Block' (BCB) is a well established term/acronym in
the Android namespace which refers to a location in a dedicated raw
(i.e. FS-unaware) flash (e.g. eMMC) partition, usually called "misc",
which is used as media for exchanging messages between Android userspace
(particularly recovery [1]) and an Android-capable bootloader.
On higher level, this allows implementing a subset of Android Bootloader
Requirements [2], amongst which is the Android-specific bootloader
flow [3]. Regardless how the latter is implemented in U-Boot ([3] being
the most memorable example), reading/writing/dumping the BCB fields in
the development process from inside the U-Boot is a convenient feature.
Hence, make it available to the users.
Some usage examples of the new command recorded on R-Car H3ULCB-KF
('>>>' is an overlay on top of the original console output):
=> bcb
bcb - Load/set/clear/test/dump/store Android BCB fields
Usage:
bcb load <dev> <part> - load BCB from mmc <dev>:<part>
bcb set <field> <val> - set BCB <field> to <val>
bcb clear [<field>] - clear BCB <field> or all fields
bcb test <field> <op> <val> - test BCB <field> against <val>
bcb dump <field> - dump BCB <field>
bcb store - store BCB back to mmc
Legend:
<dev> - MMC device index containing the BCB partition
<part> - MMC partition index or name containing the BCB
<field> - one of {command,status,recovery,stage,reserved}
<op> - the binary operator used in 'bcb test':
'=' returns true if <val> matches the string stored in <field>
'~' returns true if <val> matches a subset of <field>'s string
<val> - string/text provided as input to bcb {set,test}
NOTE: any ':' character in <val> will be replaced by line feed
during 'bcb set' and used as separator by upper layers
=> bcb dump command
Error: Please, load BCB first!
>>> Users must specify mmc device and partition before any other call
=> bcb load 1 misc
=> bcb load 1 1
>>> The two calls are equivalent (assuming "misc" has index 1)
=> bcb dump command
00000000: 62 6f 6f 74 6f 6e 63 65 2d 73 68 65 6c 6c 00 72 bootonce-shell.r
00000010: 79 00 72 00 00 00 00 00 00 00 00 00 00 00 00 00 y.r.............
>>> The output is in binary/string format for convenience
>>> The output size matches the size of inspected BCB field
>>> (32 bytes in case of 'command')
=> bcb test command = bootonce-shell && echo true
true
=> bcb test command = bootonce-shell- && echo true
=> bcb test command = bootonce-shel && echo true
>>> The '=' operator returns 'true' on perfect match
=> bcb test command ~ bootonce-shel && echo true
true
=> bcb test command ~ bootonce-shell && echo true
true
>>> The '~' operator returns 'true' on substring match
=> bcb set command recovery
=> bcb dump command
00000000: 72 65 63 6f 76 65 72 79 00 73 68 65 6c 6c 00 72 recovery.shell.r
00000010: 79 00 72 00 00 00 00 00 00 00 00 00 00 00 00 00 y.r.............
>>> The new value is NULL-terminated and stored in the BCB field
=> bcb set recovery "msg1:msg2:msg3"
=> bcb dump recovery
00000040: 6d 73 67 31 0a 6d 73 67 32 0a 6d 73 67 33 00 00 msg1.msg2.msg3..
00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
>>> --- snip ---
>>> Every ':' is replaced by line-feed '\n' (0xA). The latter is used
>>> as separator between individual commands by Android userspace
=> bcb store
>>> Flush/store the BCB structure to MMC
[1] https://android.googlesource.com/platform/bootable/recovery
[2] https://source.android.com/devices/bootloader
[3] https://patchwork.ozlabs.org/patch/746835/
("[U-Boot,5/6] Initial support for the Android Bootloader flow")
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Perform the following updates:
- Relocate the commit id from the file to the description of U-Boot
commit. The AOSP commit is c784ce50e8c10eaf70e1f97e24e8324aef45faf5.
This is done to avoid stale references in the file itself. The
reasoning is in https://patchwork.ozlabs.org/patch/1098056/#2170209.
- Minimize the diff to AOSP, to decrease the effort of the next AOSP
backports. The background can be found in:
https://patchwork.ozlabs.org/patch/1080394/#2168454.
- Guard the static_assert() calls by #ifndef __UBOOT__ ... #endif,
to avoid compilation failures of files including the header.
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
When we have a FIT image being used by SPL by default that means the
most common case is that we'll never run into a legacy image. Disable
legacy image support by default in that case to reclaim space.
Signed-off-by: Tom Rini <trini@konsulko.com>
The name CONFIG_LEGACY_IMAGE_FORMAT reads slightly better along with
allowing us to avoid a rather nasty Kbuild/Kconfig issue down the line
with CONFIG_IS_ENABLED(IMAGE_FORMAT_LEGACY). In a few places outside of
cmd/ switch to using CONFIG_IS_ENABLED() to test what is set.
Signed-off-by: Tom Rini <trini@konsulko.com>
The TPM specification says that the EXPECT_DATA bit is not valid until
the VALID bit is set. Wait for that bit to be set. Fixes problems with
Ifineon SPI TPM.
Signed-off-by: Roman Kapl <rka@sysgo.com>
Overload the weak function board_boot_order() so that besides choosing
the main boot device, we can fallback on USB boot by returning in the
BootROM, eg. if the NOR flash is empty while it was the primary boot
medium.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The _main call is not supposed to return at all: don't link the
branch.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Implement the weak board_return_to_bootrom() function so that when
enabling the spl_bootrom.c driver, one can make use of usbboot on
spear platforms. All necessary information to return to the BootROM
are stored in the BootROM's stack. The SPL stack pointer is reset so
we save the BootROM's stack pointer into the SPL .data section.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
There is no reason to do the few spear-related initialization, in a
different procedure than 'reset'. Spare one branching and get a linear
code flow by removing this indirection.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The link register is stored in R14. ARM assembly code allows to use
the 'lr' name to reference it instead of 'r14' which is not very
meaningful. Do the substitution to ease the reading.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Quoting ARM "RealView Compilation Tools Assembler Guide v4.0":
PUSH and POP are synonyms for STMDB and LDM (or LDMIA), with
the base register sp (r13), and the adjusted address written
back to the base register.
PUSH and POP are the preferred mnemonic in these cases.
Let's follow this recommandation to ease the reading and substitute
LDMIA/STMDB operations with PUSH/POP mnemonics.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Before cleaning a bit further the spear/start.S file, apply a few
cosmetic changes: capital letters, comment indentation and small
rewriting.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
This comment describes the board state at the moment where we enter
the SPL. The description is entirely wrong; re-write it to fit the
reality.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
SPL BSS lies in SRAM and is actually initialized to 0 by the SPL in
arch/arm/lib/crt0.S:_main(), which is called by cpu_init_crit.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
It is clearly stated that board_init_f should *not* call
board_init_r. Indeed, board_init_f should return. The code will
continue through arch/arm/lib/crt0.S which will do more setup before
calling board_init_r.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add a dummy PCI endpoint for sandbox.
Supporting only a single function, it allows setting
and reading header configuration.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add Cadence PCIe endpoint driver supporting configuration
of header, bars and MSI for device.
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Introduce new UCLASS_PCI_EP class for handling PCI endpoint
devices, allowing to set various attributes of the PCI endpoint
device, such as:
* configuration space header
* BAR definitions
* outband memory mapping
* start/stop PCI link
Signed-off-by: Ramon Fried <ramon.fried@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reduce Auto Voltage Scaling VDD limit when core frequency is lower than
1600MHz. This reduces core voltage level from 1.25V to 1.15V, which
saves power.
The code is taken from Marvell's U-Boot 2013.01 revision 18.06.
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
KM Kirkwood boards now implement the driver model for its SPI flash
interface. Therefore, the old board specific claim and release functions
can be deleted. The preprocessor definition CONFIG_SYS_KW_SPI_MPP is yet
unused as well. All its appearances and dependencies are removed in the
kirkwood_spi driver, header files and finally the configuration whitelist.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The corresponding configurations are selected in the common Kconfig file.
This is easier than changing every affected board default configuration
file. The default configuration for the PORTL2 board, however, still needs
some modifications to correctly use the driver model.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
In order to migrate the SPI flash interface to the driver model, the SPI
configuration needs to be added in the KM Kirkwood device tree file.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
As the SPI NOR and NAND devices share the same hardware pins, the MPP
configuration has to be changed when claiming/releasing the bus. The
current configuration is saved when claiming and restored when releasing.
Furthermore, a general-purpose output is used to switch the chip-select
signal. This is now also implemented for the DM part of the kirkwood_spi
driver.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
The weak functions, known from the legacy code, are added to the DM part
as well. For this purpose, the release operation first needs to be
implemented. KM Kirkwood boards will overwrite those weak functions to
change the MPP configuration when claiming/releasing the bus, because the
hardware pins are shared between the SPI NOR and NAND devices.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Signed-off-by: Stefan Roese <sr@denx.de>
As preparation for the upcoming transferring of configurations from header
files to Kconfig, a common Kconfig file for all KM boards was created. For
the moment, it only sources the other three, more specific, Kconfig files.
Therefore, the architecture Kconfig files now include the common Kconfig
file. Also, the configuration selection for KM boards was moved from the
architecture Kconfig files to the board specific Kconfig files.
Signed-off-by: Pascal Linder <pascal.linder@edu.hefr.ch>
Signed-off-by: Holger Brunck <holger.brunck@ch.abb.com>
Cc: Mario Six <mario.six@gdsys.cc>
Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Stefan Roese <sr@denx.de>
This change enables CMD_BOOTZ and increases SYS_BOOTM_LEN to
make it easier to work with kernel images.
Signed-off-by: Luka Kovacic <me@lukakovacic.xyz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Rescue mode bootcmd currently only appends the "omniarescue" parameter
to the bootargs variable. We do not want the user to be able to change
rescue mode bootargs. Therefore change this so that bootcmd sets the
bootargs variable in an absolute way (adding console device information
and the omniarescue paramterer).
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
We always want to enumerate PCIe devices, because withouth this they
won't work in Linux.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
If SCSI and USB boot options are both available, try to boot from SCSI
first.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
This is not needed here since Omnia is using DM_PCI now.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The U-Boot partition is 1 MiB and environment is 64 KiB. It does not
make sense to have environment at 0xc0000 when it could be at 0xf0000
and we can have more space for U-Boot binary.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
The board code reads MAC addresses from the ATSHA204A cryptochip.
For compatibility reasons the ethernet adapters on this SOC are not
enumerated in register address order. But when Omnia was first
manufactured this was done differently.
Change setting of MAC addresses to conform to the description on the
stickers sticked on actual Omnias.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Set default value for the ethact variable to the WAN port.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Stefan Roese <sr@denx.de>
Document the main U-Boot image offset when booting from SATA disk on the
Clearfog board.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
See the offset of U-Boot in raw SATA disk to the same value as the MMC
offset. That is 0x140 sectors from the beginning of the SPL, which is
0x141 sectors from the beginning of the device (after the MBR sector).
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Add the required Kconfig and macro definitions to allow boot from SATA
on Armada 38x systems.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
SPL does not initialize mbus_dram_info. Don't change the ahci mbus
settings of the ROM. This allows the ahci to work in SPL.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Allow the code to build when FS_FAT is not enabled, and thus
spl_load_image_fat() is not provided.
A subsequent patch should add alternative raw access U-Boot main image
load method.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
The init_sata() routine is only present when DM_SCSI is not enabled.
Don't call init_sata() when DM_SCSI is enabled. The code will fall back
to scsi_scan() in this case.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
Add sensible defaults for the FAT partition selection and the main
U-Boot image file name. This allows spl_sata to build when the board
headers does not select them explicitly.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Stefan Roese <sr@denx.de>
Correct the debug output for the trace buffer size to accommodate trace
buffers exceeding 2GiB.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
There is no good reason to limit the trace buffer to 2GiB on a 64bit
system. Adjust the types of the relevant parameters.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Adds dm_pci_flr API that issues a Function Level reset on a PCI-e function,
if FLR is supported.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This test is built on top of the existing swap_case driver. It adds EA
capability structure support to swap_case and uses that to map BARs.
BAR1 works as it used to, swapping upper/lower case. BARs 2,4 map to a
couple of magic values.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Makes dm_pci_map_bar API available for integrated PCI devices that
support Enhanced Allocation instead of the original PCI BAR mechanism.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The comment now indicates that the input argument bar is a register offset,
not a BAR index.
It also mentions which BARs are supported for type 0/1 and that the
function can return 0 on error.
Signed-off-by: Alex Marginean <alexm.osslist@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Up to now we had hard coded values for the call depth up to which trace
records are created: 200 for early tracing, 15 thereafter. UEFI
applications reach a call depth of 80 or above.
Provide customizing settings for the call trace depth limit and the early
call trace depth limit. Use the old values as defaults.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
An UEFI application may change the value of the register that gd lives in.
But some of our functions like get_ticks() access this register. So we
have to set the gd register to the U-Boot value when entering a trace
point and set it back to the application value when exiting the trace
point.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Compiling with TRACE but without TRACE_EARLY results in an error
aarch64-linux-gnu-ld.bfd:
common/built-in.o:(.rodata.init_sequence_f+0x10):
undefined reference to `trace_early_init'
trace_early_init() should not be called if CONFIG_TRACE_EARLY is not
defined.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add documentation for the pre-reloc property in SPL and TPL device-tree:
- u-boot,dm-pre-proper
- u-boot,dm-pre-reloc
- u-boot,dm-spl
- u-boot,dm-tpl
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This add missing parts for previous commit 06f94461a9
("fdt: Allow indicating a node is for U-Boot proper only")
At present it is not possible to specify that a node should be used before
relocation (in U-Boot proper) without it also ending up in SPL and TPL
device trees. Add a new "u-boot,dm-pre-proper" boolean property for this.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Add a test to check the management of the U-boot relocation properties
for device tree SPL generation (fdtgrep result) and platdata:
- 'dm-pre-proper' and 'dm-tpl' not included in SPL
- 'dm-pre-reloc' and 'dm-spl' included in SPL
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Free the memory allocated to store the test FDT upon test completion to
avoid leaking the memory. We don't bother cleaning up on test failure
since the code is broken in that case and should be fixed, in which case
the leak would also go away.
Reported-by: Tom Rini <tom.rini@gmail.com>
Suggested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
By default LPUART driver with compatible string "fsl,ls1021a-lpuart"
support big-endian mode.On NXP SoC like LS1028A LPUART IP is
little-endian,Added support to Fetch LPUART IP Endianness from lpuart
device-tree node.
Signed-off-by: Vabhav Sharma <vabhav.sharma@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
In general we should avoid calling malloc() and free() repeatedly in
U-Boot lest we turn it into tianocore. In SPL this can make SPI flash
unusable since free() is often a nop and allocation space is limited.
In any case, these seems no need for malloc() since the number of bytes
is very small, perhaps less than 8.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: d13f5b254a (spi: Extend the core to ease integration of SPI
memory controllers)
Generally block devices are not enabled in TPL, but in case they are,
add a Kconfig option for the block cache. This allows the setting (default
off) to be found with CONFIG_IS_ENABLED().
Signed-off-by: Simon Glass <sjg@chromium.org>
If bootstage is enabled in TPL it lacks a record count and so does not
build. Fix this by adding a new Kconfig option.
Signed-off-by: Simon Glass <sjg@chromium.org>
This struct is not defined in this header file. Add a forward declaration
so that it can be included in any context.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Since the SPI nor conversion, 'sf probe' does not work on sandbox. Fix
this by using the expected compatible string in the flash node.
Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: cd35365762 (mtd: sf_probe: remove spi-flash compatible)
When cross-compiling, sometimes sdl-config must come from a different path
from the default. Add a way to override it, by adding SDL_CONFIG to the
environment before building U-Boot.
Signed-off-by: Simon Glass <sjg@chromium.org>
We normally want to load U-Boot from SPL, but if a board wants to do
something else, it is currently not possible since the standard loader
has the top priority. Lower it to allow other SPL_LOAD_IMAGE_METHOD()
declarations to override it.
Signed-off-by: Simon Glass <sjg@chromium.org>
It doesn't make a lot of sense to hang on sandbox when hang() is called,
since the only way out is Ctrl-C. In fact, Ctrl-C does not work if the
terminal is in raw mode, which it will be if the command-line has not been
reached yet. In that case, Ctrl-Z / kill -9 must be used, which is not
very friendly.
Avoid all of this by quiting when hang() is called.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present 'sf probe' does not work since it cannot find SPI bus 0. Add
an alias to correct this, now that we no-longer have the --spi_sf option.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present sandbox and sandbox64 have duplicated nodes. This is hard to
maintain since changes in one need to be manually added to the other.
Create a common file to solve this problem.
Signed-off-by: Simon Glass <sjg@chromium.org>
Various nodes have been added and adjusted with sandbox. Move these
changes over to sandbox64.dts to keep these in sync.
Signed-off-by: Simon Glass <sjg@chromium.org>
This script attempts to create a git commit which removes a single board.
It is quite fallible and everything it does needs checking. But it can
help speed up the process.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
We need slightly different commands to run code coverage with Python 3.
Update the RunTestCoverage() function to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
A few minor changes have been made including one new entry. Update the
documentation with:
$ binman -E >tools/binman/README.entries
Signed-off-by: Simon Glass <sjg@chromium.org>
These files are text files so should be read as such, so that
string-equality assertions work as expected.
With this binman tests work correctly on Python 2 and Python 3:
PYTHONPATH=/tmp/b/sandbox_spl/scripts/dtc/pylibfdt \
python ./tools/binman/binman -t
Change first line of binman.py to end "python3":
PYTHONPATH=~/cosarm/dtc/pylibfdt:tools/patman \
python3 ./tools/binman/binman -t
Signed-off-by: Simon Glass <sjg@chromium.org>
This code reads a binary value and then uses it as a string to look up
another value. Add conversions to make this work as expected on Python 3.
Signed-off-by: Simon Glass <sjg@chromium.org>
This needs special care to ensure that the bytes type is used for
binary data. Add conversion code to deal with strings and bytes
correctly.
Signed-off-by: Simon Glass <sjg@chromium.org>
With Python 3 we want to use the 'bytes' type instead of 'str'. Adjust the
code accordingly so that it works on both Python 2 and Python 3.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code works OK in Python 2 but Python 3 complains. Adjust it to avoid
deleting elements from a dict while iterating through it.
Signed-off-by: Simon Glass <sjg@chromium.org>
While reading files in binary mode is the norm, sometimes we want to use
text mode. Add an optional parameter to handle this.
Signed-off-by: Simon Glass <sjg@chromium.org>
The only change needed is to update get_value() to support the 'bytes'
type correctly with Python 3.
With this the dtoc unit tests pass with both Python 2 and 3:
PYTHONPATH=/tmp/b/sandbox_spl/scripts/dtc/pylibfdt python \
./tools/dtoc/dtoc -t
PYTHONPATH=~/cosarm/dtc/pylibfdt:tools/patman python3 \
./tools/dtoc/dtoc -t
Signed-off-by: Simon Glass <sjg@chromium.org>
Since we are now using the bytes type in Python 3, the conversion in
fdt32_to_cpu() is not necessary, so drop it.
Also use 'int' instead of 'long' to convert the integer value, since
'long' is not present in Python 3.
With this, test_fdt passes with both Python 2 and 3:
PYTHONPATH=/tmp/b/sandbox_spl/scripts/dtc/pylibfdt python \
./tools/dtoc/test_fdt -t
PYTHONPATH=~/cosarm/dtc/pylibfdt:tools/patman python3 \
./tools/dtoc/test_fdt -t
Signed-off-by: Simon Glass <sjg@chromium.org>
Add a simple unit test for one of the cases of this function, so that any
fault can be seen directly, rather than appearing through the failure of
another test.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this test does not check the upper 32 bits of the returned
value. Add some additional tests to cover this.
Signed-off-by: Simon Glass <sjg@chromium.org>
The .dtb files are binary so we should open them as binary files. This
allows Python 3 to use the correct 'bytes' type.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update this class to work correctly on Python 3 and to pass its unit
tests. The only required change is to deal with a difference in the
behaviour of sorting with a None value.
Signed-off-by: Simon Glass <sjg@chromium.org>
In Python 3 bytes and str are separate types. Use bytes to ensure that
the code functions correctly with Python 3.
Signed-off-by: Simon Glass <sjg@chromium.org>
The difference between the bytes and str types in Python 3 requires a
number of minor changes to this function. Update it to handle the input
data using the 'bytes' type. Create two useful helper functions which can
be used by other modules too.
Signed-off-by: Simon Glass <sjg@chromium.org>
This method does not actually use any members of the Prop class. Move it
out of the class so that it is easier to add unit tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present the order of struct field emitted by this tool depends on the
internal workings of a Python dictionary. Sort the fields to remove this
uncertainty, so that tests are deterministic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Update a few things in this tool so that they support Python 3:
- print statements
- iteritems()
- xrange()
Signed-off-by: Simon Glass <sjg@chromium.org>
Change the code so that it works on both Python 2 and Python 3. This works
by using unicode instead of latin1 for the test input, and ensuring that
the output is converted to a string rather than a unicode object on
Python 2.
Signed-off-by: Simon Glass <sjg@chromium.org>
The unicode type does not exist in Python 3 and when displaying strings
they do not have the 'u' prefix. Adjusts the settings unit tests to deal
with this difference, by converting the comparison value to a string, thus
dropping the 'u'.
Signed-off-by: Simon Glass <sjg@chromium.org>
We use sets to produce the list of To and Cc lines for a series. This does
not result in stable ordering of the recipients. Sort each list to ensure
that the output is repeatable. This is necessary for tests.
Signed-off-by: Simon Glass <sjg@chromium.org>
Create helper functions in the tools module to deal with the differences
between unicode in Python 2 (where we use the 'unicode' type) and Python 3
(where we use the 'str' type).
Signed-off-by: Simon Glass <sjg@chromium.org>
The method of multiplying a character by a number works well for creating
a repeated string in Python 2. But in Python 3 we need to use bytes()
instead, to avoid unicode problems, since 'bytes' is no-longer just an
alias of 'str'.
Create a function to handle this detail and call it from the relevant
places in binman.
Signed-off-by: Simon Glass <sjg@chromium.org>
The lz4 utility inserts binary data in its output which cannot always be
converted to unicode (nor should it be). Fix this by using the new binary
mode for program output.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present cros_subprocess and the tools library use a string to obtain
stdout from a program. This works fine on Python 2. With Python 3 we end
up with unicode errors in some cases. Fix this by providing a binary mode,
which returns the data as bytes() instead of a string.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present some files are opened in text mode despite containing binary
data. This works on Python 2 but not always on Python 3, due to unicode
problems. BC&D are not my favourite people. Adjust the affected open()
statements to use binary mode.
Signed-off-by: Simon Glass <sjg@chromium.org>
Python 3 requires this, and Python 2 allows it. Convert the code over to
ensure compatibility with Python 3.
Signed-off-by: Simon Glass <sjg@chromium.org>
Python 3 requires this, and Python 2 allows it. Convert the code over to
ensure compatibility with Python 3.
Signed-off-by: Simon Glass <sjg@chromium.org>
An unfortunate new feature in Python 3.5 causes binman to print errors for
non-existent tests, when the test filter is used. Work around this by
detecting the unwanted tests and removing them from the result.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this function uses lists and strings. This does not work so
well with Python 3, and testing against '' does not work for a bytearray.
Update the code to fix these issues.
Signed-off-by: Simon Glass <sjg@chromium.org>
The base of DRAM will be changed for the next generation SoC.
The addresses needed for booting the kernel should be shifted
according to the DRAM base.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The base of DRAM will be changed for the next generation SoC.
Set the base address to the 'dram_base' environment variable, which
will be useful for scripting.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The base of DRAM will be changed for the next generation SoC.
To support it along with existing SoCs in the single defconfig,
set 'loadaddr' at boot-time by adding the offset to the DRAM base.
CONFIG_SYS_LOAD_ADDR is still hard-coded for compilation, but the
value from environment variable 'loadaddr' should be used.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The base address of DRAM was 0x80000000 for all the ARM SoCs of this
family in the past. It will be changed to 0x20000000 for a planned new
SoC. To support multiple SoCs by the single uniphier_v8_defconfig, the
base must be run-time determined.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, mem_map is hard-coded, and it worked well until the last
SoC. For a planned new SoC, the addresses of peripherals and DRAM
will be changed. Set it up run-time.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Currently, dram_init() code relies on the fact the DRAM size
configuration exists in the SG_MEMCONF register.
This will no longer be true for a planned new SoC, which will
replace SG_MEMCONF with a different register.
Refactor the hook in a more generic way.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Until the last SoC, the register addresses have been hard-coded because
they are always constant. For a planned new SoC, the register bases
will be completely changed. I insist on supporting multiple SoCs/boards
by a single defconfig (uniphier_v8_defconfig) since duplicating similar
defconfig files is a maintenance burden. The base addresses must be
fixed-up at run-time somehow.
Previously, the board init code identified the SoC by reading out the
SG_REVISION register. This is much easier than parsing DT.
You cannot do it any more because the base address of SG will be
changed. The SG_REVISION register exists to read out the SoC ID, but
you never know its address before identifying the SoC. Oh well.
So, the possible solution is to parse the DT, and find out the node
with "*-soc-glue" compatible string. Then, sg_base is set to the value
of the "reg" property. The sc_base is set up likewise.
It is worth noting a pit-fall. Having sc_base and sg_base in the global
scope will make the life easier, but the global variables are poorly
supported before the relocation. In fact, the .bss section overwraps
with DT. Allocating them in the .bss section would break DT. So, I gave
dummy initializers to assign them in the .data section.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The SC_* macros represent the address of SysCtrl registers.
For a planned new SoC, its base address will be changed.
Turn the SC_* macros into the offset from the base address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The SG_* macros represent the address of SoC-glue registers.
For a planned new SoC, its base address will be changed.
Turn the SG_* macros into the offset from the base address.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The planned new SoC does not have SBC (System Bus Controller) block.
Make boot_is_swapped() an optional hook.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
If CONFIG_MICRO_SUPPORT_CARD is enabled, U-Boot initialize SBC
(System Bus Controller), which may not be really necessary.
Check the "socionext,uniphier-system-bus" node in DT run-time.
If and only if it is found and its "status" property is okay,
initialize the SBC block.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
If CONFIG_MICRO_SUPPORT_CARD is enabled, U-Boot tries to get access
to the devices on the support card, which may not actually exist.
Check the DT and search for the on-board devices run-time. If the
nodes are not found in DT, then disable the code.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
This file calls readl(), so needs to include <linux/io.h>.
Currently, it relies on someone else including it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Now that 64-bit SoCs of this SoC family no longer support SPL,
this Makefile can be slightly simpler.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
The .boot_device_fixup() is only called by SPL.
Now that 64-bit SoCs of this SoC family no longer support SPL,
debug-uart-ld20.c is never compiled.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
[ Linux commit aa38571246c6ac279ebebd141157297bcb959d76 ]
The memory regions specified by /memreserve/ are passed to
early_init_dt_reserve_memory_arch() with nomap=false, so it is
not suitable for reserving memory for Trusted Firmware-A etc.
Use the more robust /reserved-memory node with the no-map property
to prevent the kernel from mapping it.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
For a planned new SoC in this SoC family, the base address of the
DRAM will be changed from 0x80000000 to 0x20000000.
The PIE support will be useful to maintain multiple similar SoCs
whose DRAM addresses differ.
Now CONFIG_SYS_TEXT_BASE is not important. I just set it to 0
to ensure CONFIG_POSITION_INDEPENDENT is working.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
By default, CONFIG_SYS_INIT_SP_BSS_OFFSET was made invisible by not
giving a prompt to it.
The only way to define it is to hard-code an extra entry in SoC/board
Kconfig, like arch/arm/mach-tegra/tegra{186,210}/Kconfig.
Add a prompt to it in order to allow defconfig files to specify the
value of CONFIG_SYS_INIT_SP_BSS_OFFSET.
With this, CONFIG_SYS_INIT_SP_BSS_OFFSET would become always visible.
So, we need a new bool option to turn it off by default.
I move the 'default 524288' to the common place. This value is not too
big, but is big enough to avoid the overwrap of DT in most platforms.
If 512KB is not a suitable choice for your platform, you can change it
from your defconfig or menuconfig etc.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
First set of u-boot-atmel features and fixes for 2019.10 cycle
This includes the Atmel QSPI driver and support for the at91 boards.
This is the port of the driver from Linux, mostly done by Tudor Ambarus.
The previous pcf2127 RTC chip could not read and set the correct time.
When reading the data of internal registers, the read address was the
value of register plus 1. This is because this chip requires the host
to send a stop signal after setting the register address and before
reading the register data.
This patch sets the register address using dm_i2c_write and reads
the register data using the original dm_i2c_xfer in order to generate
a stop signal after the register address is set, and fixes the bug of
the original read and write time.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
The spi-nor flash resides on spi bus 1. Update the CONFIG_ENV_SPI_CS
and CONFIG_BOOTCOMMAND accordingly.
Based on original work by Wenyou Yang.
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
[tudor.ambarus@microchip.com: amend the commit message.]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Use the qspi memory layout defined in at91-sama5_common - it aligns
with the 8 Mbyte flash (sst26vf064b-104i/sn) available in sama5d27_som1_ek.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Use the same memory layout as we use for the NAND boot on the other boards.
QSPI flashes are present on the following boards:
sama5d2_xplained RevB: 32 Mbyte flash (mx25l3273fm2i-08g)
sama5d2_xplained RevC: 8 Mbyte flash (sst26vf064b-104i/sn)
sama5d27_som1_ek: 8 Mbyte flash (sst26vf064b-104i/sn)
sama5d2_ptc_ek: 8 Mbyte flash (sst26vf064b-104i/sn)
The 8 Mbyte limit is enough to cope with the memory layout used in the NAND
boot. rootfs exceeds the 8 Mbyte limit and will stay in eMMC in the
sama5d2_xplained case. The final scope is to use a single memory layout for
all boot medias.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com>
[tudor.ambarus@microchip.com: change memory layout, add commit message]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Fix the following:
- use "jedec,spi-nor" binding, we use jedec compatible flashes
- set bus width to 4, we use quad capable flashes
- differentiate bewteen data and clk and cs pins
- drop partions as we don't use them in u-boot.
Signed-off-by: Cyrille Pitchen <cyrille.pitchen@microchip.com>
[tudor.ambarus@microchip.com: use "jedec,spi-nor", edit commit message]
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
We have a macronix spi-nor flash on sama5d2_xplained RevB and
a sst spi-nor flash on RevC. Select the rest for testing purposes.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Backport the driver from linux v5.1-rc5 and adapt it for u-boot.
Tested on sama5d2_xplained Rev B with mx25l25635e spi-nor flash.
Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Prior to starting a new transfer, conditionally wait for bus to not
be busy.
Reinitialise controller as otherwise operation is not stable.
For reference, see linux kernel
commit 9656eeebf3f1 ("i2c: Revert i2c: xiic: Do not reset controller before every transfer")
hs: Fixed DOS line endings
added missing '\n'
Fixed git commit description style
Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
Comparison should be against the actual message length, not loop index.
len is used for stopping while loop, pos is position in message.
stop should be sent when entire message is sent, not when
len and pos meet.
hs: fixed DOS line endings
Signed-off-by: Tomas Melin <tomas.melin@vaisala.com>
Get clock rate from clock DM if CONFIG_CLK is enabled.
Otherwise, uses IC_CLK define.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Acked-by: Marek Vasut <marex@denx.de>
Before calling __dw_i2c_set_bus_speed(),
the I2C could already be set as ether enable or disable,
we should restore the original setting instead of enable i2c anyway.
This patch fix a bug happened in init function:
__dw_i2c_init(){
/* Disable i2c */
...
__dw_i2c_set_bus_speed(i2c_base, NULL, speed);
writel(slaveaddr, &i2c_base->ic_sar);
/* Enable i2c */
}
In this case, enable i2c inside __dw_i2c_set_bus_speed() function
will cause ic_sar write fail.
Signed-off-by: Jun Chen <ptchentw@gmail.com>
The motivation is to use the UBI atomic volume rename functionality to
allow double copy software updates on UBI. To that end the SPL is
configured to always load the same volume name (e.g. "u-boot"),
whereas a software updater always installs into the secondary volume
"u-boot_r". After successful installation, these two volume names are
switched.
This extension is protected by #ifdefs as it will somewhat slow down
loading of volumes by id. This is because the code needs to disable
the optimization of ignoring all volume ids which are not
to-be-loaded, since these can only be resolved after attaching.
This adds two vtbl related functions from Linux, which are taken from
the same kernel version as the current main U-Boot UBI code (Linux 4.2
64291f7db5bd8).
Signed-off-by: Hamish Guthrie <hamish.guthrie@kistler.com>
Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Kyungmin Park <kmpark@infradead.org>
Migrate the ubispl configuration for the omap3_igep00x0 and
am335x_igep003x boards to KConfig. Both boards were built with
SOURCE_DATE_EPOCH=0 and found to be equal before and after.
Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Kyungmin Park <kmpark@infradead.org>
Cc: Javier Martínez Canillas <javier@dowhile0.org>
Cc: Enric Balletbo i Serra <eballetbo@gmail.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
- drop CONFIG_ prefix from kconfig entry
- fix small compilation issue with CONFIG_UBI_SILENCE_MSG
Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Kyungmin Park <kmpark@infradead.org>
Enable the extended ENV options for AT91 and OMAP2PLUS in order to be
able to use CONFIG_ENV_UBI_* on these architectures.
As this change also makes the configs ENV_SIZE, ENV_SECT_SIZE,
ENV_OFFSET visible to AT91 and OMAP2PLUS, migrate users of these to
KConfig.
This migration was run using an extended moveconfig.py which evaluates
expressions such as "(512 << 10)". See patch ("moveconfig: expand
simple expressions").
All modified boards were built with SOURCE_DATE_EPOCH=0 before and
after the change and successfully confirmed that the identical binary
is generated (the only exception was igep00x0, which does not define
CONFIG_ENV_IS_IN_UBI in the original board header. Once that is
defined, the test passes too).
hs: rebased patch to:
68b90e57bc: "configs: tinker-rk3288 disable CONFIG_SPL_I2C_SUPPORT"
Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Eugen Hristev <eugen.hristev@microchip.com>
Cc: Tom Rini <trini@konsulko.com>
Introduce the KConfig option CONFIG_ENV_UBI_VOLUME_REDUND for defining
the name of the UBI volume used to store the redundant environment.
Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Cc: Kyungmin Park <kmpark@infradead.org>
hs: get rid of stm32mp1* build errors
Add support for expanding simple expressions and sizes such as
"(4 * 1024)", "(512 << 10)" or "(SZ_256K)".
This can help to significantly reduce the number of "suspicious"
moves, such as
'CONFIG_ENV_SIZE="(64 << 10)"' was removed by savedefconfig.
If the expansion fails, it falls back to the original string.
Signed-off-by: Markus Klotzbuecher <markus.klotzbuecher@kistler.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Heiko Schocher <hs@denx.de>
Pull request for UEFI sub-system for v2019.10-rc1
Fix a possible overflow for GUID partition tables.
For some runtime services we only have implementations valid at boottime.
So we replace them when leaving boottime. Move this from
SetVirtualAddressMap() to ExitBootServices() as SetVirtualAddressMap() is
not called by all operating systems. Adjust the Python tests accordingly.
Bump the supported UEFI specification version to 2.8.
Linux can be called with a command line parameter efi=novamap, cf.
commit 4e46c2a95621 ("efi/arm/arm64: Allow SetVirtualAddressMap() to be
omitted"). In this case SetVirtualAddressMap() is not called after
ExitBootServices().
OpenBSD 32bit does not call SetVirtualAddressMap() either.
Runtime services must be set to an implementation supported at runtime
in ExitBootServices().
Reported-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Suggested-by: Alexander Graf <agraf@csgraf.de>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
We are implementing UEFI variable RuntimeServicesSupported and set the
unimplemented runtime functions return EFI_UNSUPPORTED as described in UEFI
specification 2.8. So let's also advertise this specification version in
our system table.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Alexander Graf <agraf@csgraf.de>
The runtime services SetVirtualAddress() and ConvertPointer() become
unavailable after SetVirtualAddress(). Other runtime services become
unavailable after ExitBootServices.
Move the update of SetVirtualAddress() and ConvertPointer() to
efi_relocate_runtime_table().
Use functions with the correct signature when detaching.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Provide a unit test for the variable services at runtime.
Currently we expect EFI_UNSUPPORTED to be returned as the runtime
implementation is still missing.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Unimplemented runtime services should always return EFI_UNSUPPORTED as
described in the UEFI 2.8 spec.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Our variable services are only provided at boottime. Therefore when
leaving boottime the variable function are replaced by dummy functions
returning EFI_UNSUPPORTED. Move this patching of the runtime table to the
variable services implementation. Executed it in ExitBootServices().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The detaching of the runtime will have to move to ExitBootServices() to
encompass operating system that do not call SetVirtualAddressMap().
This patch changes the logic for the relocation of the pointers in the
runtime table such that the relocation becomes independent of the entries
in the detach list.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Some entries in the system table are set to NULL in ExitBootServices(). We
had them in the runtime detach list to avoid relocation of NULL. Let's
instead assign the pointers dynamically in efi_initialize_system_table() to
avoid the relocation entry.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Let's keep similar things together.
Move efi_query_variable_info() to lib/efi_loader/efi_variable.c
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The current short description has a typo. Let it stand out clear that we
provide unit tests.
Improve the description of the CMD_BOOTEFI_SELFTEST configuration option.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Alexander Graf <agraf@csgraf.de>
In part_get_info_efi() we use the output of print_efiname() to set
info->name[]. The size of info->name is PART_NAME_LEN = 32 but
print_efiname() returns a string with a maximum length of
PARTNAME_SZ + 1 = 37.
Use snprintf() instead of sprintf() to avoid buffer overflow.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Enable unique MAC address generation for boards usins SoCs having
a known functional and valid unique serial number.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add support for generating an unique MAC address using the SoC internal
serial number from the Secure Monitor interface.
The algorithm generates an unicast locally administered 6bytes minus 2bits
address using an crc16 of the serial for the top 16bits with the lower 2 bits
masked to setup the unicast locally administered property and a crc24 for
the lower 24bits.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Secure Monitor interface permits retrieving the SoC Serial Number,
add a function to retrieve it.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Unlike the BayLibre repos Khadas' repo defaults to using native gcc,
so specify the CROSS_COMPILE setting matching the prescribed toolchain.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The fsl_esdhc driver was for Freescale eSDHC on MPC83XX/MPC85XX
initially. The later QoriQ series PowerPC processors (which were
evolutions of MPC83XX/MPC85XX), QorIQ series ARM processors, and
i.MX series processors were using this driver for their eSDHCs too.
For the two series processors, the eSDHCs are becoming more and
more different. We should have split it into two drivers, like them
(sdhci-of-esdhc.c/sdhci-esdhc-imx.c) in linux kernel.
This patch is just to create a fsl_esdhc_imx driver which is a copy
of fsl_esdhc driver for i.MX processors. We will convert i.MX processors
to use fsl_esdhc_imx, and clean up the two drivers separately in the
future patches.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Martyn Welch <martyn.welch@collabora.com>
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