Adam Ford reports that this change breaks booting on da850-evm and
Bartosz Golaszewski agrees that with the impending release we should
revert the change for now. With that noted:
This reverts commit 21a4d80a71.
Cc: Bartosz Golaszewski <brgl@bgdev.pl>
Tested-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
On K3 devices there are 2 conditions where R5F can deadlock:
1.When software is performing series of store operations to
cacheable write back/write allocate memory region and later
on software execute barrier operation (DSB or DMB). R5F may
hang at the barrier instruction.
2.When software is performing a mix of load and store operations
within a tight loop and store operations are all writing to
cacheable write back/write allocates memory regions, R5F may
hang at one of the load instruction.
To avoid the above two conditions disable linefill optimization
inside Cortex R5F which will make R5F to only issue up to 2 cache
line fills at any point of time.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Update the ddr settings to use the DDR reg config tool rev 0.2.0.
This reduces the aging count(in DDRSS_CTL_274_DATA reg) to 15 in-order
to avoid DSS underflow errors.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Kevin Scholz <k-scholz@ti.com>
The build failure was originally reported on arm64-musl
target at https://bugs.gentoo.org/703132. Here is the amd64-musl
variant:
```
$ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-only_defconfig -j$(nproc)
$ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-all -j$(nproc)
...
include/u-boot/crc.h:37:44: error: unknown type name 'uint'; did you mean 'int'?
37 | void crc16_ccitt_wd_buf(const uint8_t *in, uint len,
| ^~~~
| int
```
Note: 'uint' is not defined there.
On glibc 'uint' comes from <sys/types.h> and happens to work on most .c files.
The change imports 'uint' declaration from '<compiler.h>'.
Bug: https://bugs.gentoo.org/703132
Signed-off-by: Sergei Trofimovich <slyfox@gentoo.org>
The build failure was originally reported on arm64-musl
target at https://bugs.gentoo.org/703132. Here is the amd64-musl
variant:
```
$ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-only_defconfig -j$(nproc)
$ LANG=C make CROSS_COMPILE=x86_64-gentoo-linux-musl- tools-all -j$(nproc)
...
In file included from tools/env/../../env/flags.c:7,
from tools/env/env_flags.c:1:
include/env.h:159:1: error: unknown type name 'ulong'; did you mean 'long'?
159 | ulong env_get_ulong(const char *name, int base, ulong default_val);
| ^~~~~
| long
```
Note: 'ulong' is not defined there.
On glibc 'ulong' comes from <sys/types.h>:
```c
/* Old compatibility names for C types. */
typedef unsigned long int ulong;
```
On musl it comes from <sys/types.h> as well but from under different guards:
```c
typedef unsigned long u_long, ulong;
```
The change inlines 'ulong' define similar to 'uint' define.
Bug: https://bugs.gentoo.org/703132
Signed-off-by: Sergei Trofimovich <slyfox@gentoo.org>
The scripts/Makefile.lib generates an assembler file (*.S) to wrap the
font data for each file of type ttf defined in Kconfig.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
- Fix latest mainline kernel for rk3308
- Update rk3288-evb config to suport OP-TEE
- Fix for firefly-px30 DEBUG_UART channel and make it standalone
- Script make_fit_atf add python3 support
- Fix rk3328 timer with correct COUNTER_FREQUENCY
- Fix rk3328 ATF support with enable spl-fifo-mode
My address at Linaro doesn't exist anymore, so people
keep getting mail delivery error responses. Map this address
to the actual one.
Signed-off-by: Igor Opaniuk <igor.opaniuk@gmail.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
get_env() was originally written to strip() the output of printenv to
isolate the test from any whitespace changes in printenv's output.
However, this throws away any whitespace in the variable value, which can
cause issues when test code expects to see that whitespace. In fact,
printenv never adds any whitespace at all, so there's no need to strip.
The strip causes a practical problem for test_env_echo_exists() if
state_test_env.get_existent_var() happens to choose a U-Boot variable that
contains trailing whitespace. This is true for variable boot_targets.
With Python 2, get_existent_var() never returned boot_targets so this
issue never caused a practical problem.
With Python 3, get_existent_var does sometimes return boot_targets, no
doubt due to Python 3's different dict hash key order implementation,
about 0.5-2% of the time, so this test appears intermittent. With the
strip removed, this intermittency is solved, since the test passes for all
possible U-Boot variables.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
As described in doc/README.asn1 document the tools/asn1_compiler is used
to "generate bytecode as a C file (*.asn1.[ch]) from *.asn1 file".
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Add the tool to the ignore list to prevent being marked as unversioned.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This code does not really need to use #ifdef. We can use if() instead and
gain build coverage without impacting code size.
Change the #ifdefs to use IS_ENABLED(), etc., instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code does not really need to use #ifdef. We can use if() instead and
gain build coverage without impacting code size.
Change the #ifdefs to use CONFIG_IS_ENABLED() instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code does not really need to use #ifdef. We can use if() instead and
gain build coverage without impacting code size.
Change the #ifdefs to use IS_ENABLED() instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
This code does not really need to use #ifdef. We can use if() instead and
gain build coverage without impacting code size.
Change the #ifdefs to use IS_ENABLED() instead.
Signed-off-by: Simon Glass <sjg@chromium.org>
Most x86 boards that use video make use of 32bpp graphics. Enable this by
default. This fixes missing graphics output on some x86 boards.
Also remove the unnecessary 'default n' while we are here.
Signed-off-by: Simon Glass <sjg@chromium.org>
Enable the ATF in SPL and adjust the SPL STACK/HEAD at the same time to
support ATF entry at 0x40000.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The arch timer needs COUNTER_FREQUENCY to get correct counter, add it to
make the timer works correct.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The omap3_beagle NAND ECC scheme was changed in 4b37928d35 for unknown
reasons, leading to uncorrectible ecc errors. This commit changes it
back to what it was before.
Signed-off-by: Patrik Dahlström <risca@dalakolonin.se>
The board_boot_order() function currenly assumes that the boot source
is MMC/eMMC, but this isn't true for the NAND devices.
This patch cleans up board_boot_order() to check for NAND, SD, ESD,
MMC or EMMC. Anything beyond these are not supported, so it will
default back to the serial downloader if any of those devices are not
available.
Fixes: 9fb50c68da ("ARM: imx6q_logic: Fix MMC2 booting")
Signed-off-by: Adam Ford <aford173@gmail.com>
This fixes commit <91435cd40d30> "ARM: i.MX6: exclude the ARM errata
from i.MX6 UP system"
for nitrogen6x. The above commit removed the errata for the board
since MX6Q/MXDL/MX6S is selected via CONFIG_SYS_EXTRA_OPTIONS
This restores the errata configs.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
The Rockchip SPI controller's length register only supports 16-bits,
yielding a maximum length of 64KiB (the CTRLR1 register holds "length -
1"). Trying to transfer more than that (e.g., with a large SPI flash
read) will cause the driver to hang.
Now, it seems that while theoretically we should be able to program
CTRLR1 with 0xffff, and get a 64KiB transfer, but that also seems to
cause the core to choke, so stick with a maximum of 64K - 1 bytes --
i.e., 0xffff.
Note, that the size is further divided into 'minus 1' while writing
into CTRLR1.
This change fixed two different read issues,
1. sf read failure when with > 0x10000
2. Boot from SPI flash failed during spi_flash_read call in
common/spl/spl_spi.c
Observed and Tested in
- Rockpro64 with Gigadevice flash
- ROC-RK3399-PC with Winbond flash
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Static checker warns 'ret' variable may be used uninitialized in
spi_nor_erase() and spi_nor_write() in case of zero length requests.
Fix these warnings by checking for zero length requests and returning
early.
Reported-by: Dan Murphy <dmurphy@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
IMX based platforms can have the DCD table located on different
addresses due to differences in their memory maps (ie iMX7ULP).
This information is required by the user to sign the images for secure
boot so continue making it accessible via mkimage.
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
Following the README instructions leads to a non-booting
U-Boot:
U-Boot SPL 2020.01-rc3-00070-g9a0cbae22a (Nov 25 2019 - 13:08:24 -0300)
PMIC: PFUZE100 ID=0x10
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Trying to boot from MMC2
(It hangs here)
Use the "imx_4.19.35_1.0.0" ATF branch instead, which
fixes such problem and allow the boot to complete again.
Suggested-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Passing earlycon string in the command line may be
useful during bring up, but not after such phase.
Remove the earlycon string to align with the other i.MX SoCs
command lines.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Currently inside ddr_init() there is a mix of printf() and debug()
level messages.
Since this type of information is useful for debug purposes,
convert all of them to debug level for consistency.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
U-Boot binary has grown in such a way that it goes beyond the reserved
area for the environment variables.
Running "saveenv" followed by a "reset" causes U-Boot to hang because
of this overlap.
Fix this problem by increasing the CONFIG_ENV_OFFSET size.
Also, in order to prevent this same problem to happen in the future,
use CONFIG_BOARD_SIZE_LIMIT, which will detect the overlap in build-time.
CONFIG_BOARD_SIZE_LIMIT does not accept math expressions, so declare
CONFIG_ENV_OFFSET with its direct value instead.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
After the DM conversion the boot SD card is now device 3.
Adjust it so that we can boot the kernel again.
While at it avoid a hardcoded mmc dev inside the finduuid script.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Currently the following hang is observed when booting a imx6sx-sdb
board:
U-Boot 2020.01-rc5-00004-g643366bcd5 (Dec 19 2019 - 14:56:23 -0300)
CPU: Freescale i.MX6SX rev1.0 996 MHz (running at 792 MHz)
CPU: Extended Commercial temperature grade (-20C to 105C) at 32C
Reset cause: POR
Model: Freescale i.MX6 SoloX SDB RevB Board
Board: MX6SX SABRE SDB revA
DRAM: 1 GiB
initcall sequence bffd8514 failed at call 87804cc0 (err=-19)
### ERROR ### Please RESET the board ###
When pmic_get() is used with DM the first parameter must be
the complete node name plus the unit address.
Fix the pmic_get() parameter to fix the boot regression.
Tested on a imx6sx-sdb and imx6q-sabresd boards.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Not all CONFIG_FSL_ESDHC defines were properly replaced with
CONFIG_FSL_ESDHC_IMX, which broke U-boot proper booting on
Colibri iMX6 SoMs.
U-boot is stuck after this message:
Commercial temperature grade DDR3 timings, 64bit bus width.
Trying to boot from MMC1
Fixes: e37ac717d7("Convert to use fsl_esdhc_imx for i.MX platforms")
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
The defconfig file for ROC-CC-RK3308 is roc-cc-rk3308_defconfig.
Fixes: 7f08bfb74f ("doc: rockchip: Add documentation for rk3308 based
boards")
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
When compile the curren mainline linux kernel(Linux 5.5-rc3)
with defconfig, the final Image is 29M, it's much
larger than Linux 5.4.
On the current u-boot side on rk3308, the gap between
kernel and fdt is 25M, the fdt will overwrite kernel
Image, so move ftd to a higher memory to give 34M
gab for them.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
SPL_ROCKCHIP_COMMON_BOARD, an almost identical option, has a title but
this one doesn't for some reason. Add a description to make the menu
easier to read.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Firefly Core-PX30-JD4 use UART2M1 while PX30 evb using UART2M0, the U-Boot
proper will use the dts setting to do the IOMUX init, and a separate dts
is needed for px30-firefly.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The Macro has update without update the defconfig, update the defconfig
to make Mcaro correct.
Fixes: ec4fafdf1f ("rockchip: px30: Rename CONFIG_DEBUG_UART2_CHANNEL to...")
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
On a distribution with no python2 installed and no
python->python3 symlink the script will fail to execute.
Specify python3 explicitly as it's already a requirement
to build u-boot.
Signed-off-by: Jack Mitchell <ml@embed.me.uk>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
As per "Table 26-7. SATA PHY Subsystem Low-Level Programming Sequence"
in TRM [1] we need to turn on SATA_PHY_TX before SATA_PHY_RX.
[1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdf
Signed-off-by: Roger Quadros <rogerq@ti.com>
For increased DPLL stability use the settings recommended in
the TRM [1] for PHY_RX registers for SATA and USB.
For SATA we need to use spread spectrum settings even
though we don't have spread spectrum enabled. The
suggested non-spread spectrum settings don't work.
[1] DRA75x, DRA74x TRM - http://www.ti.com/lit/ug/sprui30f/sprui30f.pdf
Signed-off-by: Roger Quadros <rogerq@ti.com>
Introduce a mode property in the driver data so that
we don't have to keep using "of_device_is_compatible()"
throughtout the driver.
No functional change.
Signed-off-by: Roger Quadros <rogerq@ti.com>
The AM572x Technical Reference Manual, SPRUHZ6H,
Revised November 2016 [1], shows recommended settings for the
SATA DPLL in Table 26-8. DPLL CLKDCOLDO Recommended Settings.
Use those settings in the driver. The TRM does not show
a value for 20MHz SYS_CLK so we use something close to the
26MHz setting.
[1] - http://www.ti.com/lit/ug/spruhz6h/spruhz6h.pdf
Signed-off-by: Roger Quadros <rogerq@ti.com>
Upstream kernel and rockchip kernel has default enable PSCI which needs
OPTEE in trust word, enable OPTEE support for evb by default and SPL_FIT
option to pack OPTEE with U-Boot proper.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Update the SPL_STACK_R_MALLOC_SIMPLE_LEN which also including space for
STACK and the size may not enough when loding FIT image in SPL.
If the size is not enough, you can see log like this when loding FIT:
U-Boot TPL 2020.01-rc3-00082-g4b19b89ca4-dirty (Dec 05 2019 - 11:52:53)
Trying to boot from BOOTROM
Returning to boot ROM...
U-Boot SPL 2020.01-rc3-00082-g4b19b89ca4-dirty (Dec 05 2019 - 11:52:53 +0800)
Trying to boot from MMC2
And if enable the DEBUG for everyting in SPL, the log will hang at dwmmc
sending CMD16 for 'uboot' loadables binary because this step need a
large stack cost(about 0x2d00).
External data: dst=8400000, offset=72638, size=b3580
Image OS is Trusted Execution Environment
board_fit_config_name_match: rk3288-evb
Selecting config 'rk3288-evb'loadables: 'uboot'
blk_find_device: if_type=6, devnum=1: dwmmc@ff0c0000.blk, 6, 0
blk_find_device: if_type=6, devnum=1: dwmmc@ff0f0000.blk, 6, 1
Sending CMD16
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Instead of hardcode the base address, we can get them from the build
output, eg. get the SYS_TEXT_BASE from .config and get optee base from
DRAM_BASE.
We can use this script for SoCs with DRAM base not from 0x60000000(rk3229
and many other 32bit Rockchip SoCs), eg. rk3288 DRAM base is 0.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
DWC3 support phy interfaces like 8/16-bit UTMI+. phy interface
initialization code would handle them properly along with UNKNOWN
type by default if none of the user/board doesn't need to use the
phy interfaces at all.
The current code is masking the 8/16-bit UTMI+ interface bits globally
which indeed effect the UNKNOWN cases, therefore it effects the platforms
which are not using phy interfaces at all.
So, handle the phy masking bits accordingly on respective interface
type cases.
Fixes: 6b7ebff001 ("usb: dwc3: Add phy interface for dwc3_uboot")
Reported-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Since, commit 62f9b65447 ("common: Move older CPU functions to their own header")
cache ops functions are declared in a separate header. Include the same
to avoid build warnings.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
In the case where one deletes an already-non-existing variable, or sets
a variable to the value it already has, there is no point in writing the
environment back, thus reducing wear on the underlying storage
device.
In the case of redundant environments, if the two environments
differ (e.g. because one is corrupt), make sure that any call of
fw_setenv causes the two to become synchronized, even if the fw_setenv
call does not change anything in the good copy.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Passing 0 to PHY connect used to trigger a MDIO scan due to a bug fixed in
the meantime. It's unclear if bcm-sf2 wants to connect to PHY @ addr 0 or
is scanning the bus, passing -1 here should keep it functional either way.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Cc: Jiandong Zheng <jdzheng@broadcom.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
struct sunxi_prcm_reg is naturally packed. There is no need to define it as
packed. Defining it as packed leads to compilation errors with GCC 9.2.1:
CC arch/arm/lib/reloc_arm_efi.o
arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’:
:qarch/arm/cpu/armv7/sunxi/psci.c:163:21: error: taking address of packed
member of ‘struct sunxi_prcm_reg’ may result in an unaligned pointer value
[-Werror=address-of-packed-member]
163 | sunxi_power_switch(&prcm->cpu_pwr_clamp[cpu], &prcm->cpu_pwroff,
| ^~~~~~~~~~~~~~~~~~~~~~~~~
Remove __packed attribute from struct sunxi_prcm_reg.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Orangepi Zero Plus 2 is an open-source single-board computer, available
in two Allwinner SOC variants, H3 and H5. We add support for H3 variant
here, as the H5 is already supported.
H3 Orangepi Zero Plus 2 has:
- Quad-core Cortex-A7
- 512MB DDR3
- microSD slot and 8GB eMMC
- Debug TTL UART
- HDMI
- Wifi + BT
- OTG + power supply
Sync dts from linux v5.2 commit:
"ARM: dts: sunxi: h3/h5: Remove stale pinctrl-names entry"
(sha1: 75f9a058838be9880afd75c4cb14e1bf4fe34a0b)
Commit:
"ARM: dts: sun8i: h3: Refactor the pinctrl node names"
(sha1: a4dc791974e568a15f7f37131729b1a6912f4811)
has been avoided as it breaks U-Boot build.
Signed-off-by: Diego Rondini <diego.rondini@kynetics.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
Compiling with GCC 9.2.1 leads to build errors:
arch/arm/cpu/armv7/sunxi/psci.c: In function ‘sunxi_cpu_set_power’:
arch/arm/cpu/armv7/sunxi/psci.c:144:21: error: taking address of packed
member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer
value [-Werror=address-of-packed-member]
144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff,
| ^~~~~~~~~~~~~~~~~~~~~~~
arch/arm/cpu/armv7/sunxi/psci.c:144:46: error: taking address of packed
member of ‘struct sunxi_cpucfg_reg’ may result in an unaligned pointer
value [-Werror=address-of-packed-member]
144 | sunxi_power_switch(&cpucfg->cpu1_pwr_clamp, &cpucfg->cpu1_pwroff,
| ^~~~~~~~~~~~~~~~~~~~
Use memcpy() and void* pointers to resolve the problem caused by packing
the struct sunxi_cpucfg_reg.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Jagan Teki <jagan@amarulasolutions.com>
This patch is only a temporarily workaround for crash introduced by
commit ac9cd4805c ("bootstage: Correct relocation algorithm").
The crash occurs because the bootstage struct is not correctly aligned
when BOOTSTAGE feature is activated.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
Activate by default the command CLS (clear screen);
this command used in pxe or sysboot command (DISTRO support)
when the "menu background" keyword is present.
This patch avoid the warning "Unknown command 'cls'"
with extlinux.conf:
# Generic Distro Configuration file generated by OpenEmbedded
menu title Select the boot mode
MENU BACKGROUND /splash.bmp
TIMEOUT 20
DEFAULT stm32mp157c-ev1-emmc
LABEL stm32mp157c-ev1-emmc
KERNEL /uImage
FDT /stm32mp157c-ev1.dtb
APPEND root=/dev/mmcblk1p4 rootwait rw console=ttySTM0,115200
...
Retrieving file: /mmc0_stm32mp157c-ev1_extlinux/extlinux.conf
614 bytes read in 36 ms (16.6 KiB/s)
Retrieving file: /splash.bmp
46180 bytes read in 40 ms (1.1 MiB/s)
Unknown command 'cls' - try 'help'
Select the boot mode
1: stm32mp157c-ev1-sdcard
...
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrick Delaunay <patrick.delaunay@st.com>
With commit 37db55b7e9 ("linux/types.h: fix typo unchar") we have a
duplicate typedef for uchar. As linux/types.h is included in common.h we
don't need another typedef for uchar there.
Fixes: 37db55b7e9 ("linux/types.h: fix typo unchar")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Describe that a signature node can be added to a binary device tree using
the mkimage tool.
Provide an example device tree node.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Commit 656d8da9d2 (doc: Remove duplicated documentation directory) got
rid of most of Documentation/. But there's still an obviously useless
.gitignore left behind.
Also, there's a copy of the linux kernel's net/ethernet.txt binding
imported from v5.0, while the existing one in doc/ is from 4.0-rc1. So
replace the latter by the former, and making Documentation/ finally
empty.
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
commit 3b3e8a37d3
("arm: dts: am335x: sync cpsw/mdio/phy with latest linux - drop phy_id")
did sync with recent linux kernel and replaced therefore the 'phy_id'
property with a phy-handle pointing to the mdio.
This is OK for linux, but introduces trouble with the already running
vxWorks on this target.
So this commit here re-inerts the phy_id property beside the phy-handle
property to be compatible with both.
Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
i2c bugfixes for 2020.01
- i2c: i2c_cdns: fix write timeout on fifo boundary
fixes timout issue when writting number of bytes is multiple
of the FIFO depth.
- First set of u-boot-atmel fixes for 2020.01 cycle:
This set includes a small fix for gpio bank names, one for removing
unused headers (also touches some other boards), and a fix for the QSPI
env read on one of the boards.
The rpi_4_32b_defconfig states that only one DRAM bank is present. This
leads to a wrong configuration of the available DRAM. Fix this by
setting the DRAM bank config accordingly.
Fixes: 193279d784 ("RPI: Add defconfigs for rpi4 (32/64)")
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Up to now we only update the DRAM banks when we are define
CONFIG_BCM2711. But our one binary approach uses a config that supports
BCM2837 and BCM2711. As a result we only see one gibibyte of RAM on
Raspberry Pi 4, even if it has more RAM.
Fix this by calling dram_init_banksize.
Fixes: 5694090670 ("ARM: defconfig: add unified config for RPi3 and RPi4")
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
To update the dram bank information from device-tree we use
fdtdec_decode_ram_size() which expectes the the size-cells and
address-cells to be defined in the memory node. For normal system RAM
these values are defined in the root node. When the values differ from
the default values defined in the spec, we can end up with wrong RAM
bank information.
Switch to the "standard" way to update the RAM bank information to
avoid this.
Fixes: 9de5b89e4c ("rpi4: enable dram bank initialization")
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
This fixes an issue that would cause I2C writes to timeout when the
number of bytes is a multiple of the FIFO depth (i.e. 16 bytes).
Within the transfer loop, after writing the data register with a new
byte to transfer, if the transfer size equals the FIFO depth, the loop
pauses until the INTERRUPT_COMP bit asserts to indicate data has been
sent. This same check is performed after the loop as well to ensure data
has been transferred prior to returning.
In the case where the amount of data to be written is a multiple of the
FIFO depth, the transfer loop would wait for the INTERRUPT_COMP bit to
assert after writing the final byte, and then wait for this bit to
assert once more. However, since the transfer has finished at this
point, no new data has been written to the data register, and hence
INTERRUPT_COMP will never assert.
Fix this by only waiting for INTERRUPT_COMP in the transfer loop if
there's still data to be written.
Signed-off-by: Michael Auchter <michael.auchter@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
- fix crash and board reset when drawing RLE8 bitmaps
bigger than the framebuffer resolution
- reduce dead code in video and console uclass routines
(tested on mx53cx9020, sama5d2_xplained, stm32mp157c-ev1,
stm32f746-disco, stm32f769-disco and wandboard)
In the initial SPI flash setup, the default bus mode being used was 3,
which is incorrect, causing a CRC error when the ENV was being read from
QSPI. Setting the default bus mode to 0 which is the correct mode.
Signed-off-by: Swapna Gurumani <swapna.gurumani@microchip.com>
- Increase stack size to avoid a stack overflow during distro boot.
- Add hifive-unleashed-a00.dts for SIFIVE FU540.
- Add OF_SEPARATE support for SIFIVE FU540.
- Add SPL support for Andes AX25 AE350.
- Improve U-Boot SPL / OpenSBI smp boot flow for RISC-V.
At the start, OpenSBI relocates itself to its link address. If the link
address ranges of U-Boot SPL and OpenSBI overlap, the relocation can
lead to code corruption if a hart is still running U-Boot SPL during
relocation. To avoid this problem, the main hart is specified as the
preferred boot hart to perform the relocation. This fixes the code
corruption problems based on the assumption that since the main hart
schedules the secondary harts to enter OpenSBI, it will be the last to
enter OpenSBI. However it was reported that this assumption is not
always correct.
To make sure the assumption always holds true, wait for all secondary
harts to acknowledge the call-function request before entering OpenSBI
on the main hart.
Reported-by: Rick Chen <rick@andestech.com>
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Add a wait option to smp_call_function() to wait for the secondary harts
to acknowledge the call-function request. The request is considered to
be acknowledged once each secondary hart has cleared the corresponding
IPI.
As part of the call-function request, the secondary harts invalidate the
instruction cache after clearing the IPI. This adds a delay between
acknowledgment (clear IPI) and fulfillment (call function) of the
request. We want to use the acknowledgment to be able to judge when the
request has been completed. Remove the delay by clearing the IPI after
cache invalidation and just before calling the function from the
request.
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Add the function riscv_get_ipi() for reading the pending status of IPIs.
The supported controllers are Andes' Platform Level Interrupt Controller
(PLIC), the Supervisor Binary Interface (SBI), and SiFive's Core Local
Interruptor (CLINT).
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
OpenSBI uses a relocation lottery to determine the hart to relocate
OpenSBI to its link address. In the U-Boot SPL boot flow, the main hart
schedules the secondary harts to enter OpenSBI before doing so itself.
One of the secondary harts will therefore always be the winner of the
relocation lottery. This is problematic if the link address ranges of
OpenSBI and U-Boot SPL overlap. OpenSBI will be relocated and therefore
overwrite U-Boot SPL while some harts may still run it, leading to code
corruption.
Avoid this problem by specifying the main hart as the preferred boot
hart to perform the OpenSBI relocation. The main hart will be the last
hart to enter OpenSBI, relocation can therefore occur safely.
The boot hart field was added to version 2 of the OpenSBI FW_DYNAMIC
info structure. The header file include/opensbi.h is synchronized with
include/sbi/fw_dynamic.h from the OpenSBI project to update the info
structure. The header file is recent as of commit
7a13beb21326 ("firmware: Add preferred boot HART field in struct
fw_dynamic_info").
Reported-by: Rick Chen <rick@andestech.com>
Suggested-by: Anup Patel <Anup.Patel@wdc.com>
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Rick Chen <rick@andestech.com>
Tested-by: Rick Chen <rick@andestech.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
For RV64, it will use sd instruction to clear t0
register, and the increament will be 8 bytes. So
if the difference between__bss_strat and __bss_end
was not 8 bytes aligned, the clear bss loop will
overflow and acks like system hang.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
The mcache_ctl csr only can be manipulated in M mode.
Add SPL_RISCV_MMODE for U-Boot SPL to control cache
operation.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
Fix two wrong settings of andes plic driver as below:
1. Fix wrong pending register base definition.
2. Declaring the en variable in enable_ipi() as unsigned int instead of
int can help to fix wrong plic enabling setting in RV64.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
To get memory size from device tree instead of
get_ram_size(). This can avoid memory access fault
in U-Boot proper after PMP configurations in OpenSBI.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
This patch provides four configurations which can support U-Boot SPL
to boot from RAM or FLASH and then boot FIT image including OpenSBI
FW_DYNAMIC firmware and U-Boot proper images from RAM or MMC boot devices.
With ae350_rv[32|64]_spl_defconfigs:
U-Boot SPL will be loaded by gdb or FSBL and runs in RAM in machine mode
and then load FIT image from RAM device on AE350.
With ae350_rv[32|64]_spl_xip_defconfigs:
U-Boot SPL can be burned into SPI flash and run in flash in machine mode
and then load FIT image from SPI flash or MMC device on AE350.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
The U-Boot SPL will boot in M mode and load the FIT image which
include OpenSBI and U-Boot proper images. After loading progress,
it will jump to OpenSBI first and then U-Boot proper which will
run in S mode.
Also remove V5L2_CACHE due to U-Boot SPL code size consideration.
Without this concern, it can be enable manually for performance.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: KC Lin <kclin@andestech.com>
Cc: Alan Kao <alankao@andestech.com>
This would help to make the necessary changes in drivers and device trees
in U-Boot tree itself. This feature would also be helpful to not pass
dtb during opensbi builds.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Rick Chen <rick@andestech.com>
Sync the hifive-unleashed-a00 dts from Linux with
below commit details:
commit <2993c9b04e616df0848b655d7202a707a70fc876> ("riscv: dts: HiFive
Unleashed: add default chosen/stdout-path")
Idea is to periodically sync the dts from Linux instead of
tweaking internal changes one after another, so better not
add any intermediate changes in between. This would help to
maintain the dts files easy and meaningful since we are
reusing device tree files from Linux.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
This fixes a problem, where booting Linux using distro boot will
sometimes lead to an invalid instruction exception on the main hart. The
secondary harts are not affected and boot Linux successfully. The root
cause of this problem is a stack overflow on the main hart.
With distro boot, the current default stack size of 8KiB on RISC-V is
not sufficient and will cause a stack overflow. The stacks are allocated
sequentially. In the case of a stack overflow the stack of the main hart
can reach into that of another hart and be corrupted.
The stack overflow previously did not cause any problems, because only
stack frames, which are not used anymore since the hart enters Linux,
were corrupted. Starting with GCC 9, the stack usage has decreased. Now,
only the most recent stack frame overflows into the stack of a secondary
hart and is corrupted. The illegal instruction exception is caused by
the secondary hart overwriting the return address in the stack frame of
the main hart with an address that does not include valid code.
Increase the default stack size of each hart to 16KiB to avoid this
problem.
Reported-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Tested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Tested-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Rick Chen <rick@andestech.com>
The commit 1b42ab3eda ("ARM: DRA7: Fixup DSPEVE, IVA and GPU clock
frequencies based on OPP") added the core logic to update the kernel
device-tree blob to adjust the DSP, IVA and GPU DPLL clocks based on
a one-time OPP choice selected in U-Boot for most of the DRA7xx/AM57xx
family of SoCs.
The DSPs on DRA76xP/DRA77xP SoCs (DRA76x ACD package SoCs) though
provide a higher performance and can run at a higher clock frequency
of 850 MHz at OPP_HIGH instead of 750 MHz. Fix up the logic to use the
correct clock rates on these SoCs. Note that this higher clock rate is
not applicable to other Jacinto 6 Plus SoCs (DRA75xP/DRA74xP SoCs or
AM574x SoCs) that follow the ABZ package.
Signed-off-by: Suman Anna <s-anna@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
On NixOS, cross compiled kernels have long suffixes that cause them to
exceed the current maximum path length. The PXE/TFTP max path length is
used for extlinux.conf support as well, which is where this problem
usually manifest's itself.
Signed-off-by: Ben Wolsieffer <benwolsieffer@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Enable configs related to DMA and Ethernet so as to support networking at
U-Boot prompt
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Add DT nodes related to DMA and CPSW to -u-boot.dtsi to get networking
up on J721e EVM.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Get flow ID information for RX DMA channel using dma_get_cfg() interface
instead of reading from DT. This is required in order to avoid DT update
whenever there is change in the range of flow ID allocated to the host.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Implement dma_get_cfg() interface to pass flow id information for DMA
clients to use. This is needed because on K3 SoCs, CPSW (ethernet) and
UDMA (DMA provider) support "flows" within a given RX DMA channel. This
allows different network packets to be segregated while using same RX
DMA channel. In order for basic ethernet to work, CPSW slave must be
aware of the flow ID allocated for the RX channel by the DMA driver.
This interface allows CPSW to query flow ID from DMA provider and
configure it in CPSW HW.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Sometimes, there would be a need to exchange data between DMA provider
and DMA client which are very specific to DMA driver of the SoC/platform
and are not generic enough to be put into struct dma. Therefore, introduce
dma_get_cfg() interface to get DMA provider specific data from client
device. Clients can use unique configuration ID flags to get different
configuration data from DMA driver.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
This bus is used to access internal SoC PHYs. These PHYs are configured
by the ENETC driver directly, but it's useful to have command line access
to this MDIO to debug the system especially when using new external PHYs.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
On some boards MDIO may get stuck if it detects echo on the line. This is
a know hardware issue, there is a board fix for it. In case we're running
on a board that doesn't have the fix, we don't want to loop here forever
and freeze U-Boot.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This reduces the time needed to establish a link as we don't reset the link
each time the interface is used. Our Link capabilities do not change at
run-time so there is no need to re-apply PHY configuration each time.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The original code enabled link speeds up to 1Gbps, but the interface can
go up to 2.5G, enable that speed to in PHY AN mask.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The function connects an ethernet device to a PHY using DT information.
This API is only available for eth devices with an associated device tree
node.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Renamed dm_mdio_phy_connect arguments dev to mdiodev and addr to phyaddr
for a bit more clarity and consistency with the following patches.
Also use NULL instead of 0 on error return path.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Commit b618b37076 ("net: Convert CONFIG_TFTP_BLOCKSIZE to Kconfig")
accidentally set the default *option* TFTP block size to 512 bytes, even
though the comment in the code says that this is a terrible choice. Most
boards didn't define the symbol before, so they got the default block size
of 1468 bytes before, but now use 512 bytes, which is also the fallback.
This leads to both abysmal performance and a lot of hashes printed
on the screen (one character for every 5K), which is both annoying and
slow over serial links.
Set the default block size in Kconfig back to the value it had before.
This improves TFTP performance from 2.8 MB/s to 6.9 MB/s on a Pine64.
Fixes: b618b37076 ("net: Convert CONFIG_TFTP_BLOCKSIZE to Kconfig")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
A couple of optional properties have been introduced for Aquantia PHY
allowing the driver to set up wiring related configuration points that
are otherwise driven by firmware.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
It defines that PHY nodes must be children on MDIO bus nodes and defines
the only required property in U-Boot, reg. This property along with the
example provided are copied over from Linux.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
In some cases the link on the system interface of the aquantia PHY comes up
after the link on line interface. The link state loop only checks the line
side, which may result in first packet sent being lost.
Use aquantia_link_is_up instead, which checks both system and line side on
gen 2/3 PHYs to avoid losing the 1st packet.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Aquantia PHYs have a SMBus interface mostly used for debug. The addresses
on this interface are normally set up by PHY firmware, but depending on the
board they may end up not being unique. Add an optional DT property used
to change SMBus address if needed.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
MDI pins up to the RJ45 connector may be reversed on the board and the
default PHY configuration applied by firmware may or may not match that.
Add an optional DT property to configure MDI reversal for this case.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
If PHY is not ready for data by the time _config is called, reconfigure the
PHY system interface to use the proper protocol based on phydev->interface,
just in case the defaults set by PHY firmware don't match current
configuration.
Signed-off-by: Florin Laurentiu Chiculita <florinlaurentiu.chiculita@nxp.com>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Uses the data field in phy_driver structure to identify the PHY generation.
This is useful for custom configuration as non-generic PHY registers are
not 100% compatible between generations.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The PHY supports XFI and USXGMII, the notable difference being that USX AN
is enabled for USXGMII. Legacy code uses XGMII for any 10G proto and
detects whether USX AN should be enabled or not using a PHY status
register. Keep that functionality too, so we don't break existing drivers.
Signed-off-by: Razvan Ionut Cirjan <razvanionut.cirjan@nxp.com>
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This is useful to carry custom information between the driver structure
associated with a specific HW and the driver code.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Drivers currently use XGMII for XFI and USXGMII and, where needed, use
other information to identify the actual protocol on the board. With these
two defined drivers can now rely on DT phy-mode property.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
On mv88E6071 the 'EDet' field offset, width and sense control
bits are different, adjust the driver to init the PHY control
register as needed. This fixes not working link detection and
tftp transfers.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
On 88E6071 chip the port status register bit field offsets
for duplex and link bits differ. Extend the driver to use
88E6071 specific offset values. The width of bit fields for
speed status differ, too. Adapt for proper port speed
detection on 88E6071.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
Tested-by: Chris Packham <judge.packham@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Extend the driver to init switch register offsets from variables
instead of compile time macros and enable detection of 88E6071 and
compatible devices. Ethernet transfer (e.g. tftp) does not work yet,
so enable the registration of the 'indirect mii' bus for easier PHY
register access by 'mii' command.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The KSZ8081 PHY has a factory test mode which is set at the de-assertion
of the reset line based on the RXER (KSZ8081RNA/RND) or TXC
(KSZ8081MNX/RNB) pin. If a pull-down is missing, or if the pin has a
pull-up, the factory test mode should be cleared by manually writing a 0
(according to the datasheet).
Create another ksz8081_config function to handle this case.
Suggested-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
device_probe() may fail in which case the seq_id will be -1. Don't
display these devices during startup. While this is only a cosmetic
change, the return value of eth_initialize() will also change to the
actual number of available devices. The return value is only used in
spl_net to decide whether there are any devices to boot from. So
returning only available devices is also more correct in that case.
Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Aquantia quad-phys may take longer to initialize. This commit adds
a polling mechanism for a global alarm bit that tells if phy init
sequence is completed.
Signed-off-by: Florin Chiculita <florinlaurentiu.chiculita@nxp.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This allows passing arbitrary addresses through macb_miiphy_read and
macb_miiphy_write, therefore enabling the mii command to access
all mdio bus devices instead of only the defined phy.
Signed-off-by: Josef Holzmayr <holzmayr@rsi-elektrotechnik.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
To support accessing arbitrary addresses the mii/mdio bus it is
necessary that the macb_mdio_read and macb_mdio_write functions
do not implicitly use the address of the connected phy.
The function signature is extended according to the Linux kernel
equivalent.
Signed-off-by: Josef Holzmayr <holzmayr@rsi-elektrotechnik.de>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
I've noticed that in most cases when genphy_update_link() is called, the
ethernet driver (mt7628-eth in this case) fails with the first ethernet
packets. Resulting in a timeout of the first tftp command. Increasing
the delay in the link check look from 1 to 50 ms and moving it below the
BMSR register read fixes this issue, resulting in a stable ethernet
traffic, even after initial link autonogotiation.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* Add Kconfig help describing the purpose of each command.
* Add CONFIG_CMD_MDIO so it could be selected individually, as
it doesn't depend on the mii command.
* Add Kconfig imply to mii to automatically select the mdio
command.
Signed-off-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This version of the RTL-8168 chip can be found on some add-in cards sold
by CSL-Computer GmbH & Co. KG. The chip isn't special in any way, but it
needs to have the ChipCmd register programmed after the DMA descriptors
have been set up, so make sure that happens by adding an entry to the
chip information table.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This commit ports mvpp2 to use the recently introduced Marvell MDIO
(MVMDIO) driver. It removes direct interaction with the SMI & XSMI
busses. This commit is based in part on earlier work by
Ken Ma <make@marvell.com> in Marvell's own downstream repo:
https://github.com/MarvellEmbeddedProcessors/u-boot-marvell/commit/c81dc39.
The above refrenced work was based on an MVMDIO implementation that
never made it into U-Boot. With this patch the mvpp2 driver switches
to use the new MVMDIO driver that is based on a more universal
mdio-uclass implementation.
Signed-off-by: Nevo Hed <nhed+github@starry.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
If the phy doesn't match with any existing u-boot drivers, the phy
framework will connect it to the generic one which uid ==
0xffffffff. In this case, act as if the phy wouldn't be declared in
dts. Otherwise, in case of 3310 (for which the driver doesn't exist)
the link is marked as always down. Removing phy entry from dts in case
of 3310 is not a good option because it is required for the
phy_fw_down procedure.
This patch fixes the issue with the link always down on MCBIN board.
nhed: added NULL deref test.
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Tested-by: Igal Liberman <igall@marvell.com>
Signed-off-by: Nevo Hed <nhed+github@starry.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Issue:
- Network stuck if autonegotion fails.
Issue root cause:
- When autonegotiation fails during port open procedure, the packet
processor configuration does not finish and open procedure exits
with error.
- However, this doesn't prevent u-boot network framework from
calling send and receive procedures.
- Using transmit and receive functions of misconfigured packet
processor will cause traffic to get stuck.
Fix:
- Continue packet processor configuration even if autonegotiation
fails. Only error message is triggered in this case.
- Exit transmit and receive functions if there is no PHY link
indication.
- U-boot network framework now calls open procedure again during next
transmit initiation.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Reviewed-by: Igal Liberman <igall@marvell.com>
Tested-by: Igal Liberman <igall@marvell.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The AM654 SoC doesn't allow to disabling RGMII TX internal delay in CPSW2G
MAC. Hence, change CPSW2G interface mode to "rgmii-rxid" - RGMII with
internal RX delay provided by the PHY, the MAC will add an TX delay in this
case.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Refactor SGMII configuration to group all settings together and reduce
number of MDIO transactions.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Based on commit 27708eb5481b ("net: phy: dp83867: IO impedance is not
dependent on RGMII delay") of mainline linux kernel.
The driver would only set the IO impedance value when RGMII internal delays
were enabled. There is no reason for this. Move the IO impedance block
out of the RGMII delay block.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Based on commit c11669a2757e ("net: phy: dp83867: Rework delay rgmii delay
handling") of mainline linux kernel.
The current code is assuming the reset default of the delay control
register was to have delay disabled. This is what the datasheet shows as
the register's initial value. However, that's not actually true: the
default is controlled by the PHY's pin strapping.
This patch:
- insures the other direction's delay is disabled If the interface mode is
selected as RX or TX delay only
- validates the delay values and fail if they are not in range
- checks if the board is strapped to have a delay and is configured to use
"rgmii" mode and warning is generated that "rgmii-id" should have been
used.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Based on commit 13c83cf8af0d ("net: phy: dp83867: Add ability to disable
output clock") of mainline linux kernel.
Generally, the output clock pin is only used for testing and only serves as
a source of RF noise after this. It could be used to daisy-chain PHYs, but
this is uncommon. Since the PHY can disable the output, make doing so an
option. I do this by adding another enumeration to the allowed values of
ti,clk-output-sel.
The code was not using the value DP83867_CLK_O_SEL_REF_CLK as one might
expect: to select the REF_CLK as the output. Rather it meant "keep clock
output setting as is", which, depending on PHY strapping, might not be
outputting REF_CLK.
Change this so DP83867_CLK_O_SEL_REF_CLK means enable REF_CLK output.
Omitting the property will leave the setting as is (which was the previous
behavior in this case).
Out of range values were silently converted into DP83867_CLK_O_SEL_REF_CLK.
Change this so they generate an error.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Based on commit 980066e6d964 ("dt-bindings: phy: dp83867: Add documentation
for disabling clock output") of mainline linux kernel.
The clock output is generally only used for testing and development and not
used to daisy-chain PHYs. It's just a source of RF noise afterward.
Add a mux value for "off". I've added it as another enumeration to the
output property. In the actual PHY, the mux and the output enable are
independently controllable. However, it doesn't seem useful to be able
to describe the mux setting when the output is disabled.
Document that PHY's default setting will be left as is if the property
is omitted.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The driver ti.c is actually driver for TI DP83867x PHYs, so rename it
accordingly.
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
During testing of qemu-riscv32 with a 2GiB memory configuration,
tftp always fails with a error message:
Load address: 0x84000000
Loading: #
TFTP error: trying to overwrite reserved memory...
It turns out the result of 'tftp_load_addr + tftp_load_size' just
overflows (0x100000000) and the test logic in store_block() fails.
Fix this by adjusting the end address to ULONG_MAX when overflow
is detected.
Fixes: a156c47e39 ("tftp: prevent overwriting reserved memory")
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
sandbox_defconfig does not compile using GCC 9.2.1:
net/net.c: In function ‘net_process_received_packet’:
net/net.c:1288:23: error: taking address of packed member of ‘struct
ip_udp_hdr’ may result in an unaligned pointer value
[-Werror=address-of-packed-member]
1288 | sumptr = (ushort *)&(ip->udp_src);
| ^~~~~~~~~~~~~~
Avoid the error by using a u8 pointer instead of an u16 pointer and
in-lining ntohs().
Simplify the checksumming of the last message byte.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Fix 'mask' calculation in phy_connect() for phy addr '0'.
'mask' is getting set to '0xffffffff' for phy addr '0'
in phy_connect() whereas expected value is '0'.
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
Reported-by: tetsu-aoki via github
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
While we have networking use cases within SPL we do not support loading
files via NFS at this point in time. Disable calling nfs_start() so
that the NFS related code can be garbage collected at link time.
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Even if not communicating over the network in U-Boot, code may be manipulating
and storing IP or MAC addresses to pass to Linux, etc.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Part of the env cleanup moved this out of the environment code and into
the net code. However, this helper is sometimes needed even when the net
stack isn't included.
Move the helper to lib/net_utils.c like it's similarly-purposed
string_to_ip(). Also rename the moved function to similar naming.
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Reported-by: Ondrej Jirman <megous@megous.com>
In GCC 9 support for the Armv5 and Armv5E architectures (which have no
known implementations) has been removed, cf.
https://gcc.gnu.org/gcc-9/changes.html
Commit 16540d07fd ("arm: fix -march for ARM11") changed the value of the
compiler flag from -march=armv5 and -march=armv5t into -march=armv6 for
ARM11.
The values prior to this patch were:
arch-$(CONFIG_CPU_ARM1136) =-march=armv5
arch-$(CONFIG_CPU_ARM1176) =-march=armv5t
The change lead to a regression with the Raspberry Pi Zero W not booting
anymore.
Use -march=armv5t both for ARM1136 and ARM1176.
Fixes: 16540d07fd ("arm: fix -march for ARM11")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Joris Offouga <offougajoris@gmail.com>
unsigned char should be called uchar and not unchar.
This fixes a build error in lib/crypto/x509_cert_parser.c.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Fixes for 2020.01
-----------------
- imx8qxp_mek: increase buffer sizes and args number
- Fixes for imx7ulp
- imx8mm: Fix the first root clock in imx8mm_ahb_sels[]
- colibri_imx7: reserve DDR memory for Cortex-M4
- vining2000: fixes and convert to ethernet DM
- imx8m: fix rom version check to unbreak some B0 chips
- tbs2910: Disable VxWorks image booting support
Recently the version check was improved to be able to determine that
we're running on SoC revision 2.1. A check for B0 was tightened so
that it now must equal 0x20 instead of being bigger than 0x20. On
some B0 chips the value returned is 0x1020 instead of 0x20. This
means even though it's B0, the check will fail and code relying on
the correct chip revision will make wrong decisions. There is no
documentation of those bits, but it seems that NXP always uses a
byte to encode the revision. Thus remove the upper bits to fix the
regression.
Signed-off-by: Patrick Wildt <patrick@blueri.se>
You can directly specify the label as the operand for ljmp.
This commit saves 4-byte code.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: fixed the gas warning]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
This file defines 'a32' and 'o32' macros to avoid magic numbers
of operand/address-size prefixing.
GAS supports 'data32' and 'addr32' for that purpose.
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
- Allow for the sysboot command, which is used to parse extlinux.conf
files to be used without PXE support. There is no functional change
here aside from fixing distro boot in a few cases where we actually
lacked the ability to parse the extlinux.conf file
- Add the x509/pkcs7 parsers from Linux, a pre-requisite to EFI Secure
Boot support.
With the change to make tools/version.h a file we need to make sure that
the output directory exists first otherwise we will get a build failure.
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Fixes: 4d90f6cd98 ("tools: Avoid creating symbolic links for tools/version.h")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This test will exercise asn1 compiler as well as asn1 decoder functions
via various parsers.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Imported from linux kernel v5.3:
pkcs7.asn1 without changes
pkcs7.h with changes marked as __UBOOT__
pkcs7_parser.h without changes
pkcs7_parser.c with changes marked as __UBOOT__
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Imported from linux kernel v5.3:
x509.asn1 without changes
x509_akid.asn1 without changes
x509_parser.h without changes
x509_cert_parser.c with changes marked as __UBOOT__
x509_public_key.c with changes marked as __UBOOT__
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Imported from linux kernel v5.3:
rsapubkey.asn1 without changes
rsa.h without changes
rsa_helper.c with changes marked as __UBOOT__
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Imported from linux kernel v5.3:
asymmetric-type.h with changes marked as __UBOOT__
asymmetric_type.c with changes marked as __UBOOT__
public_key.h with changes marked as __UBOOT__
public_key.c with changes marked as __UBOOT__
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Imported from linux kernel v5.3:
build_OID_registry without changes
oid_registry.h without changes
oid_registry.c with changes marked as __UBOOT__
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Imported from linux kernel v5.3:
asn1.h without changes
asn1_ber_bytecode.h without changes
asn1_decoder.h without changes
asn1_compiler.c without changes
This host command will be used to create a ASN1 parser, for example,
for pkcs7 messages or x509 certificates. More specifically, it will
generate *byte code* which will be interpreted by asn1 decoder library.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Adding "printk.h" will help improve portability from linux kernel
code (in my case, lib/asn1_decoder.c and others) where printf and
pr_* variant functions are used.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
This function will be used in lib/crypto/x509_cert_parser.c, which
will also be imported from linux code in a later commit.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
In the next commit, rtc_mktime(), for compatibility with linux, will be
implemented using rtc_mktime(), which is no longer drivers/rtc specific.
So move this file under lib/.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
linux_compat.c is the best place for kmemdup(), which is currenly used
only in ubifs.c, but will also be used when other kernel files
(in my case, lib/crypto/x509_cert_parser.c and pkcs7_parser.c) will be
imported. So just move it.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Extract all sysboot command related code from pxe.c to new sysboot.c
Update Kconfig to insure that DISTRO_DEFAULT select new CMD_SYSBOOT
command.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
As sysboot and pxe commands are sharing piece of code, migrate this
common code into a new file pxe_utils.c to prepare sysboot command
code extraction from pxe.c
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Many boards do not use all selected framebuffer depth
configurations, for such boards there is some unused
code in video and console uclass routines. Make depth
specific code optional to avoid dead code and slightly
reduce binary size. Also make ANSI code optional for
the same reason. When i.e. using only VIDEO_BPP16 the
code size shrinks (below values when using gcc-7.3.0):
$ ./tools/buildman/buildman -b video-wip -sS wandboard
...
01: Merge git://git.denx.de/u-boot-sh
02: video: add guards around 16bpp/32bbp code
03: video: make BPP and ANSI configs optional
arm: (for 1/1 boards) all -776.0 bss -8.0 text -768.0
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
Many boards use only single depth configuration, for such boards
there is some unused code in video and console uclass routines.
Add guards to avoid dead code.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Patrice Chotard <patrice.chotard@st.com>
Tested-by: Steffen Dirkwinkel <s.dirkwinkel@beckhoff.com>
- rockchip pwm driver update to support all the SoCs
- RK3308 GMAC and pinctrl support
- More UART interface support on PX30 and pmugrf reg fix
- Fixup on misc for eth_addr/serial#
- Other updates on variant SoCs
Due to the (seemingly bogus) assumption of a default
CONFIG_SYS_UBOOT_START value we will revert this change for now and
evaluate it again for the next release along with changes to
CONFIG_SYS_UBOOT_START.
This reverts commit d3e97b53c1.
Signed-off-by: Tom Rini <trini@konsulko.com>
The default value of CONFIG_SYS_CBSIZE is too small when we need
to input long commands or when using long kernel command line.
The default value of CONFIG_SYS_MAXARGS is too small to add a long
command line, and the kernel might not boot as intended without the
complete bootargs. Increase argument buffer sizes and the number of
arguments.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The 24MHz oscillator clock is referenced by "clock-osc-24m" and not
"osc_24m".
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The board has both VDD_SOC_IN and VDD_ARM_IN rails connected to the same
PMIC rail, align the LDO voltages to avoid leaking inside the MX6SX SoC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
Ever since the conversion to DM PCI, the board was missing the PCIe DT
nodes, hence the PCI did not really work. Fill in the DT nodes and add
missing PCIe device reset.
Moreover, bring the PCIe power domain up before booting Linux. This is
mandatory to keep old broken vendor kernels working, as they do not do
so and depend on the bootloader to bring the power domain up.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
The fitImage support was enabled in the downstream U-Boot port and the
kernel images on the device are fitImage, yet this functionality is not
enabled in mainline U-Boot. Enable it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
Convert the board to ethernet DM support. Adjust board file accordingly,
as the board_eth_init() contains custom clock configuration required for
this board to work. Furthermore, enable FEC1 clock to make FEC1 work as
well.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
Enable DRAM calibration in SPL to improve behavior of the board
in edge conditions of the thermal envelope of the board and make
it even more stable.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
In preparation for use of DDR DRAM fine-tuning upon boot,
convert the board to SPL framework instead of using DCD
tables to bring up DRAM and pinmux.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Silvio Fricke <silvio.fricke@softing.com>
Cc: Stefano Babic <sbabic@denx.de>
Make the PMU LDO configuration interface available to board code,
so that board code can reconfigure the internal LDOs of the SoC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Eric Nelson <eric@nelint.com>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Eric Nelson <eric@nelint.com>
i.MX 7's Cortex-M4 core can run from DDR and uses DDR memory for
the rpmsg communication. Both use cases need a fixed location of
memory reserved. For the rpmsg use case the reserved area needs
to be in sync with the kernel's hardcoded vring descriptor location.
Use the linux,usable-memory property to carve out 1MB of memory
in case the M4 core is running. Also make sure that the i.MX 7
specific rpmsg driver does not get loaded in case we do not carve
out memory.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
U-Boot binary has grown in such a way that it goes beyond the reserved
area for the environment variables.
Running "saveenv" followed by a "reset" causes U-Boot to hang because
of this overlap.
Fix this problem by increasing the CONFIG_ENV_OFFSET size.
Also, in order to prevent this same problem in the future, use
CONFIG_BOARD_SIZE_LIMIT, which will detect the overlap in build-time.
CONFIG_BOARD_SIZE_LIMIT does not accept math expressions, so declare
CONFIG_ENV_OFFSET with its direct value instead.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Acked-by: Pierre-Jean Texier <pjtexier@koncepto.io>
Tested-by: Pierre-Jean Texier <pjtexier@koncepto.io>
Acked-by: Joris Offouga <offougajoris@gmail.com>
Tested-by: Joris Offouga <offougajoris@gmail.com>
The NoC registers on i.MX6QP needs to be configured, otherwise some
usecases in the kernel behave incorrectly, such as rotation and resize.
Currently the NoC registers are not configured in the kernel, so
configure them in U-Boot like it is done in the NXP U-Boot tree.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Sync the mx7ulp device tree related files with the one from
NXP U-Boot vendor tree (imx_v2019.04_4.19.35_1.0.0).
The mainline support for i.MX7ULP is very premature at this stage.
We should probably re-sync with mainline Linux dts when it gets
in better shape, but for now sync with the U-Boot vendor code.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
The LDOVL definitions is common to all the modes, not only RUN mode,
so in order to avoid confusion, remove the _RUN notation from the PMC1
LDOVL definitions.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Introduce the CONFIG_LDO_ENABLED_MODE option so that i.MX7ULP boards
designed to operate with LDO enabled mode can work with 0.95V at LDO
output in RUN mode as per the datasheet.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
As per the i.MX7ULP datasheet, it can boot in LDO enabled mode
or LDO bypass mode.
Print the LDO mode status in the U-Boot log for convenience.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
In case the BMP size is bigger than the frame buffer, don't use
the BMP's width and height in video_display_rle8_bitmap, but the
one's checked in video_bmp_display() as parameters to
video_display_rle8_bitmap().
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
CC: Yannick Fertré <yannick.fertre@st.com>
Convert panel_picture_delta and axis_alignment from unsigned long
to long to insure to store correctly the difference between
panel_size and picture_size in case the panel_size is smaller
than picture_size.
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
CC: Yannick Fertré <yannick.fertre@st.com>
[agust: change axis_alignment to long]
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Recent versions of the Linux kernel with many options enabled have
grown large enough to overwrite the beginning of the initrd. For
example, the kernel I use on my Rock64 and RockPro64 is 34.1 MiB,
while only 31.5 MiB are available between kernel_addr_r and
ramdisk_addr_r.
This patch moves ramdisk_addr_r up by 32 MiB on the RK3328 and RK3399,
allowing for much larger kernels.
Signed-off-by: Ben Wolsieffer <benwolsieffer@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
An iomux register contains 8 pins, each of which is represented
by 2 bits, but the register offset is 0x8.
For example, GRF_GPIO0A_IOMUX offset is 0x0, but GRF_GPIO0B_IOMUX
offset is 0x8, the offset 0x4 is reserved.
So add a type IOMUX_8WIDTH_2BIT to calculate offset.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This PWM driver can be used to support pwm functions
for on all Rockchip Socs.
The previous chips than RK3288 did not support polarity,
and register layout was different from the RK3288 PWM.
The RK3288 keep the current functions.
RK3328 and the chips after it, which can support hardware lock,
configure duty, period and polarity at next same period, to
prevent the intermediate temporary state.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rk3308 only support RMII mode, and if it is output clock
mode, better to use ref_clk pin with drive strength 12ma.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add the glue code to allow the rk3308 variant of the Rockchip gmac
to provide network functionality.
Signed-off-by: David Wu <david.wu@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
This is a core board named Core-PX30-JD4 with a mainboard from Firefly,
name it as firefly-px30 for now.
This board can re-use the dts of PX30, the only difference is the UART IO,
the firefly use UART2 M1 while evb use UART2 M0.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
serial# is one of the vendor properties and thus protected from being
overwritten if already set. If env_set is called anyway this result in
some nasty warnings, so check for presence before trying that.
In the same direction check for the presence of cpuid# and compare it
to the actual hardware and emit a warning if they don't match.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip_setup_macaddr() runs from an initcall, so returning an error
code will make that initcall fail thus breaking the boot process.
And if an ethernet address is already set this is definitly not a
cause for that, so just return success in that case.
Fixes: 0482538499 ("rockchip: rk3399: derive ethaddr from cpuid");
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Some generic PX30 SoMs found in the wild use UART3 as their debug output
instead of UART2 (used for MMC) and UART5.
Make it possible to use UART3 as early debug output, with the associated
clock and pinmux configuration. Two sets of output pins are supported (M0/M1).
Future users should also note that the pinmux default in the dts is to use
the M1 pins while the Kconfig option takes M0 as a default.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
UART3 also has two sets of pins that can be selected.
Rename the config option to a common name, to allow it to be used for both
UART2 and UART3.
Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
We need load some parts of ATF to sram, but rockchip
dwmmc controllers can't do dma to non-ddr addresses
space, so set the mmc controller into fifo mode in spl.
And show my best respect to Heiko's work for this solution.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
After commit d8765e2422 ("Enable building of u-boot.itb
on Rockchip platform"), u-boot.itb will automatically
generated by "make all" command, manually command
"make u-boot.itb" is no longer needed.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
SPL has limited available resources, and the performance between
ARM and Thumb isn't that significant.
This patch builds using Thumb instruction set to reduce the code
size by nearly 6K.
Original:
text data bss dec hex filename
26526 4004 1376 31906 7ca2 spl/u-boot-spl
Thumb:
text data bss dec hex filename
20232 4004 1376 25612 640c spl/u-boot-spl
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
The da850-evm doesn't have the boot pins configured in a way
to make MMC/SD booting an option, and MMC/SD support is not
enabled in SPL. Therefore, there is no need to support raw mode
mmc/sd support in SPL.
This patch disables CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
Signed-off-by: Adam Ford <aford173@gmail.com>
At the moment entry_point is set to image_get_load(header) that sets it
to "load address" instead of "entry point", assuming entry_point is
equal to load_addr, but it's not true. Then load_addr is set to
"entry_point - header_size", but this is wrong too since load_addr is
not an entry point.
So use image_get_ep() for entry_point assignment and image_get_load()
for load_addr assignment.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
# This is actually a resent patch of
# [1] https://lists.denx.de/pipermail/u-boot/2019-May/369170.html
Two test cases are added under test_fs_ext:
test case 10: for root directory
test case 11: for non-root directory
Those will verify a behavior fixed by the commits related to
root directory
("fs: fat: allocate a new cluster for root directory of fat32" and
"fs: fat: flush a directory cluster properly"), and focus on
handling long-file-name directory entries under a directory.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Unlink test for FAT file system seems to fail at test_unlink2.
(When I added this test, I haven't seen any errors though.)
for example,
===8<===
fs_obj_unlink = ['fat', '/home/akashi/tmp/uboot_sandbox_test/128MB.fat32.img']
def test_unlink2(self, u_boot_console, fs_obj_unlink):
"""
Test Case 2 - delete many files
"""
fs_type,fs_img = fs_obj_unlink
with u_boot_console.log.section('Test Case 2 - unlink (many)'):
output = u_boot_console.run_command('host bind 0 %s' % fs_img)
for i in range(0, 20):
output = u_boot_console.run_command_list([
'%srm host 0:0 dir2/0123456789abcdef%02x' % (fs_type, i),
'%sls host 0:0 dir2/0123456789abcdef%02x' % (fs_type, i)])
assert('' == ''.join(output))
output = u_boot_console.run_command(
'%sls host 0:0 dir2' % fs_type)
> assert('0 file(s), 2 dir(s)' in output)
E AssertionError: assert '0 file(s), 2 dir(s)' in ' ./\r\r\n ../\r\r\n 0 0123456789abcdef11\r\r\n\r\r\n1 file(s), 2 dir(s)'
test/py/tests/test_fs/test_unlink.py:52: AssertionError
===>8===
This can happen when fat_itr_next() wrongly detects an already-
deleted directory entry.
File deletion, which was added in the commit f8240ce95d ("fs: fat:
support unlink"), is implemented by marking its entry for a short name
with DELETED_FLAG, but related entry slots for a long file name are kept
unmodified. (So entries will never be actually deleted from media.)
To handle this case correctly, an additional check for a directory slot
will be needed in fat_itr_next().
In addition, I added extra comments about long file name and short file
name format in FAT file system. Although they are not directly related
to the issue, I hope it will be helpful for better understandings
in general.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
The mmc CID value is one of the input parameters used to provision the
RPMB key. The trusted execution environment expects this value to be
specified in big endian format.
Before this fix, on little endian systems, the value returned by the
linux kernel mmc driver differed from the one returned by u-boot.
This meant that if linux provisioned the RPMB key, u-boot would not
have access to the partition (and the other way around).
Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
The command cp fails on sandbox because the address is used
directly. To fix this issue, we call the function map_sysmem
to translate the address.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
The command iminfo fails on sandbox because the address
is used directly. To fix this issue, we call the function
map_sysmem to translate the address.
Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
This define indicates if DM_GPIO shall be supported in SPL. This allows
proper operation of DM converted GPIO drivers in SPL, which use
boards.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
PCI devices may be disabled in the device tree. Devices which are probed
by the device tree handle the "status" property and are skipped if
disabled. Devices which are probed by the PCI enumeration don't check
that property. Fix it.
Signed-off-by: Michael Walle <michael@walle.cc>
Reviewed-by: Alex Marginean <alexandru.marginean@nxp.com>
Tested-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Move MTD-related lines out of the root Makefile. Put them in their
respective directories. Enclose some of these new lines to skip them
when building the SPL. MTD core files and some MTD device drivers are
compiled in a mtd.o object and included in the final object only if
MTD support is required (there are two different symbols for that, one
for U-Boot and one for the SPL).
Now that all defconfigs have been fixed, we can stop the logic where
enabling a command selects the core files to compile. This logic is
broken since selecting a symbol with a 'depends on' will not enforce
this secondary dependency.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Defconfigs have been fixed, now we can add proper dependencies in
Kconfig. SPI FLASH is still not dependent on MTD (deeper rework needed).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
The 'sf' command is not supposed to rely on the MTD stack, but both
'sf' and 'nand' commands use helpers located in mtd_uboot.c. Despite
their location, these functions do not depend at all on the MTD
stack.
This file (drivers/mtd/mtd_uboot.c) is only compiled if CONFIG_MTD is
selected, which is inconsistent with the current situation. Solve this
by moving these three functions (which are only used by the above two
commands) out of mtd_uboot.c and put them in a C file only compiled
with cmd/sf.c and cmd/nand.c.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
[trini: Don't export get_part function now]
Signed-off-by: Tom Rini <trini@konsulko.com>
It is already the case that all defconfigs with SPI_FLASH_MTD also
declare using MTD, but let's make this consistent and enforce it in
Kconfig. Most of the time SPI_FLASH_MTD is used in conjunction with
UBI, which already depends on MTD.
Suggested-by: Vignesh R <vigneshr@ti.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
CONFIG_DFU_NAND needs the raw NAND core being compiled.
Also fix the colibri_vf defconfig to reflect this dependency.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Because of the include's game, when some files are compiled for a SPI
NAND device, no warning appears. But when it is for a raw NAND device,
GCC complains. Fix these warning by including <common.h>.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Enabling TFABOOT configuration will compile-in a call to nand_read in
the boot sequence. Handle the situation by also selecting officially
the raw NAND core in this case.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
There is no flash on this board, there is no reason to define MTD
environment variables nor UBI. Drop them from the configuration file.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Wolfgang Grandegger <wg@aries-embedded.de>
While the right Kconfig entries were selected, because of the missing
CMD_NAND symbol the raw NAND core was never compiled. Remove it from
the defconfigs otherwise the build will fail.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
[trini: Also do this on bcm11130_nand]
Signed-off-by: Tom Rini <trini@konsulko.com>
Due to previous Makefile organization, the raw NAND subdirectory was
not compiled in if CMD_NAND was not enabled. Because the Denali driver
does not compile with these boards (undefined environment offset),
remove the dependency within the defconfig over the controller driver
(was ignored anyway in the past).
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
MTD support must be enabled when using mtdparts. Indeed, functions
like get_mtd_info(), get_mtd_device() and put_mtd_device() are in
drivers/mtd/mtd_uboot.c and are built only with CONFIG_MTD.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
In some files, options of CMD_NAND are selected but not the command
itself. Fix this inconsistency.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
Both symbols must be enabled when there is a raw NAND driver
selected. Also enable them when CONFIG_CMD_NAND is selected to avoid
breaking things when we'll further rework the MTD dependency
description.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
[trini: Rebase and migrate a few more boards here]
Signed-off-by: Tom Rini <trini@konsulko.com>
CONFIG_MTD must be reserved for the MTD core. Like any other
subsystem, prefix the symbol by DM when it comes to DM support.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Reviewed-by: Boris Brezillon <boris.brezillon@bootlin.com>
[trini: Add Kconfig files]
Signed-off-by: Tom Rini <trini@konsulko.com>
I detected the following error in sandbox with Clang on Travis CI:
+cmd/efidebug.c:703:15: error: result of comparison of constant
9223372036854775822 with expression of type 'int' is always false
[-Werror,-Wtautological-constant-out-of-range-compare]
+ else if (ret == EFI_NOT_FOUND)
+ ~~~ ^ ~~~~~~~~~~~~~
Simply changing a type of 'ret' to efi_status_t will fix this error.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
This adds a general board file based on MT8518 SoCs from MediaTek.
Apart from the generic parts (cpu) we add some low level init codes
and initialize the early clocks.
This commit is adding the basic boot support for the MT8518 eMMC board.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
[trini: Migrate env location to defconfig, set ENV_IS_IN_MMC]
Signeed-off-by: Tom Rini <trini@konsulko.com>
Add support for MediaTek MT8518 SoC. This include the file
that will initialize the SoC after boot and its device tree.
Signed-off-by: mingming lee <mingming.lee@mediatek.com>
Add null pointer check to take care of out of memory errors.
Signed-off-by: Faiz Abbas <faiz_abbas@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
spl ymodem driver always assumes that 1 BUF_SIZE is read in one stream.
This might not be true when image is not padded to BUF_SIZE and the last
sector that gets loaded will be < BUF_SIZE. Drop this assumption and use
the actual size that is loaded.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
The MMC boot is currently broken on omapl138-lcdk after enabling the
driver model in SPL. The main problem is the driver's bind callback not
being called after probe in SPL (even with the DM_FLAG_PRE_RELOC flag
specified).
While a proper fix is still being worked on, this hacky changeset at
least fixes the MMC boot on this platform by calling mmc_bind()
manually from probe().
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
We don't have full device-tree support in SPL yet - add an appropriate
U_BOOT_DEVICE() to the board file.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
struct mmc_config & struct mmc don't need to be exported over platform
data, but can instead be private in the driver.
Remove struct davinci_mmc_plat.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
The DM family of DaVinci SoCs is no longer supported. Drop the
irrelevant code from the driver.
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Currently the omapl138_lcdk has SKIP_LOWLEVEL_INIT set.
The README states there is a variation of this for the ARM926EJ-S
which allows the board to just skip the call to lowlevel_init()
and do the normal CP15 init which enables the instruction cache.
On the da850evm, this was shown to improve startup time.
This patch switches SKIP_LOWLEVEL_INIT to SKIP_LOWLEVEL_INIT_ONLY
thus, enabling the cache.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
In order to further prepare for full device tree support in SPL,
this patch enables both SPL_DM_SEQ_ALIAS and SPL_OF_TRANSLATE.
Both of these are already enabled in U-Boot, so SPL will have
the same functionality
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Driver model requires a malloc pool to allocate memory before
relocations to operate serial and some other devices. This patch
increases the pool size to 2K.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
In preparation to use full device tree support, SPL can separate
BSS from text region.
This patch enables SPL_SEPARATE_BSS.
Signed-off-by: Adam Ford <aford173@gmail.com>
Tested-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
pxe command parses the init ramfs address(through initrd lable in
pxe config file), but is not passing it to bootm command as argument
as bootm_argc count is not increased.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This commit:
d409c96216
causes build failure with ICACHE enabled. This is due to missing
invalidate_icache_all() stub. Let's add empty invalidate_icache_all() in
the case where ICACHE is not enabled.
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
The bcm283x has grown in files, which was not reflected in the
MAINTAINERS file. Fix this by adding the missing entries.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
When we do not have CONFIG_BLK (or SPL/TPL) enabled there are very few
cases where we need the blk_legacy code linked in. To catch these, build
when we have CONFIG_HAVE_BLOCK_DEVICE set. In addition, we only need
cmd/blk_common.o to be linked in when we have CONFIG_HAVE_BLOCK_DEVICE
set, so make use of that directly.
Signed-off-by: Tom Rini <trini@konsulko.com>
The array 'mtd_table' is unused in the code. Remove this as gcc doesn't
always discard unused global variables.
Signed-off-by: Tom Rini <trini@konsulko.com>
The content of pci_rom.c is only used in a few cases. Only build and
link in these cases to avoid a global variable as gcc doesn't always
discard those when they are unused.
Signed-off-by: Tom Rini <trini@konsulko.com>
This converts the following to Kconfig:
CONFIG_SYS_CORTINA_FW_IN_MMC
CONFIG_SYS_CORTINA_FW_IN_NAND
CONFIG_SYS_CORTINA_FW_IN_NOR
CONFIG_SYS_CORTINA_FW_IN_REMOTE
CONFIG_SYS_CORTINA_FW_IN_SPIFLASH
Signed-off-by: Tom Rini <trini@konsulko.com>
Enhance do_bootm_vxworks() to support Linux compatible standard DTB
for ARM and PPC, when the least significant bit of flags in VxWorks
bootargs is set. Otherwise it falls back to the existing bootm flow
which is now legacy.
Signed-off-by: Lihua Zhao <lihua.zhao@windriver.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
There are currently no known users of this functionality on this
platform, disable it to prepare for additional VxWorks functionality
that would cause this platform to fail to link.
Cc: Soeren Moch <smoch@web.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Soeren Moch <smoch@web.de>
This file is generated in the root during Rockchip builds and so should
be cleaned up.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Currently, we have two places where we list files that should always be
cleaned if they exist. One, the CLEAN_FILES variable, is from the Linux
build system and is the proper place to list files.
The other, a set of extra arguments passed in the xargs template used to
remove files with certain extensions, was introduced by 8f06f0cee3
("Makefile: clean image.map") and is clearly wrong: by extending the
xargs template, we attempt to remove the files once for each batch of
arguments that xargs produces and we reduce the number of files from
stdin that xargs can include in each of its rm commands.
To fix this, put all hardcoded files into CLEAN_FILES.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
All of the clean targets (clean, dist-clean, mrproper) are run without
loading a configuration. That means that any conditional modification of
CLEAN_FILES will either always apply or never apply and so shouldn't be
in a conditional in the first place.
Since CLEAN_FILES is allowed to list nonexistent files, just add
everything to it unconditionally to fix the issue.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
27084c03d3 ("spl: Allow tiny printf() to be controlled in SPL and
TPL") split this option in two for TPL and SPL, but didn't change the
Kconfig names, making them hard to set quickly.
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
There are currently no known users of this functionality on this
platform, disable it to prepare for additional VxWorks functionality
that would cause this platform to fail to link.
Cc: Soeren Moch <smoch@web.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Soeren Moch <smoch@web.de>
Make the at91_gpio driver set sensible GPIO bank names in the platform
data. This makes the 'gpio status' command a lot more useful.
Signed-off-by: James Byrne <james.byrne@origamienergy.com>
Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
Several boards still unnecessarily included micrel.h but no longer
require it since the switch to Device Tree configuration.
Signed-off-by: James Byrne <james.byrne@origamienergy.com>
These functions do not use driver model but are still used. Move them to a
new eeprom.h header file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function can be dropped when all boards use driver model for PCI. For
now, move it into init.h with a comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
A number of board function belong in init.h with the others. Move them.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Move this function into init.h which seems to be designed for this sort
of thing. Also update the header to declare struct global_data so that it
can be included without global_data.h being needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function is not defined by any boards so the feature is not used.
Drop it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Move these functions into the command.h header file which is a better fit.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Move these two functions into the irq_funcs.h header file. Also move
interrupt_handler_t as this is used by the irq_install_handler() function.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These functions do not use driver model but are fairly widely used in
U-Boot. But it is not clear that they will use driver model anytime soon,
so we don't want to label them as 'legacy'.
Move them to a new irq_func.h header file. Avoid the name 'irq.h' since it
is widely used in U-Boot already.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These are used by only one arch and only within a single file. Drop the
declarations from the common file.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These functions belong in cpu_func.h. Another option would be cache.h
but that code uses driver model and we have not moved these cache
functions to use driver model. Since they are CPU-related it seems
reasonable to put them here.
Move them over.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These functions belong in cpu_func.h since they do not use driver model.
Move them over. Don't bother adding comments since these functions should
be deleted.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function belongs in time.h so move it over and add a comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function belongs in time.h so move it over and update the comment
style.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function has a similar name to the common wait_ticks(). It is only
used in one place and seems small enough to drop.
Inline it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This function belongs in time.h so move it over and add a comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These functions belong in time.h so move them over and add comments.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Add a header file to house the lz4 compression function. Add a comment
while we are here, since it not even clear from the name what the function
actuall does.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Move this function header to serial.h since this function is clearly
related to serial. The function itself stays in console.c since we don't
have a single serial file. DM and non-DM each has a separate file so we
would have to either create a new common serial file, or repeat the
function in both serial.c and serial-uclass.c, neither of which seem
worthwhile.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
The function declarations in serial.h are not in sync with what is
currently used in usbtty. Fix this by updating the header and including
it, to help catch future such problems.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
At present this function sits in its own file but it does not really
justify it. There are similar string functions in vsprintf.h, so move it
there. Also add the missing function comment.
Use the vsprintf.h include file explicitly where needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These don't need to be in common.h so move them out into a new header.
Also add some missing comments.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
It is not good practice to write code in a header file. If it is included
multiple times then the code can cause duplicate functions.
Move the bootcount_store() and bootcount_load() functions into SPL.
Note: bootcount is a bit strange in that it uses driver model but does not
define proper drivers. This should be fixed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Drop inclusion of crc.h in common.h and use the correct header directly
instead.
With this we can drop the conflicting definition in fw_env.h and rely on
the crc.h header, which is already included.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Some of these have a space before the bracket. Drop it to fix the style.
Add some missing function comments while here.
Note that u32 and u8 cannot be used here since crc.h is included on the
host side.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
We have an existing U-Boot header for the one function that this defines.
Use that instead of the linux/ one. Move over the nice comment.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Create a new rand.h header file and move functions into it, to reduce
the size of common.h
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
There are a few whitespace problems with this code. Tidy them up.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
This is only used by a few files so it should not be in the common header.
Move it out.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
These should be moved to driver model, but in the meantime, move them
out of the common header to help reduce its size.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
With commit f0921f5098 ("fdt: Sync up to the latest libfdt"),
SiFive Unleashed board does not boot any more. This was due to
the U-Boot local changes commit 77d7fff8ce ("fdt: Fix handling
of paths with options in them") to libfdt/fdt_ro.c was dropped
during the libfdt upgrade.
>From the history [1] it was mentioned that the U-Boot changes
commit 77d7fff8ce ("fdt: Fix handling of paths with options in
them") was rejected by libfdt upstream, hence we need find another
way to fix the things.
This commit uses another method, by updating serial_check_stdout()
directly to handle the situation of "stdout-path" with ":options".
A simpler way is to change the logic in fdtdec_get_chosen_node()
to do similar thing, but I feel that not every property in chosen
node may have the option in them, hence it would make more sense
to do the special handling in serial_check_stdout() directly.
[1]: http://patchwork.ozlabs.org/patch/462756/
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The deadline for migration to CONFIG_DM is v2020.01. The VCT
baords would need an almost complete rewrite of all drivers to
support driver model.
Unless someone has access to the hardware and volunteers to do the migration,
the board should be scheduled for removal.
Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
Since at least some of the drivers relevant to LS1028A are now following
DM, it's useful to have dm command enabled by default.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
- Solve warning for stih410-b2260
- Device tree alignment on v5.4-rc4 for all stm32 boards
- Correct the eMMC pin configuration on stm32mp157c-ev1
- Add DFU and SPI-NAND support for stm32mp1 board
Instead of using single fixed value for the calibration offset,
add tables which dynamically adjust this per calibration code
from the SCC.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Retain the tap number from last calibration in private data. This
will be later used for SCC error checking after each command.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
The clock.h was to define mxc_get_clock() providing clock value
to fsl_esdhc driver. Since fsl_esdhc driver is using global data
gd->arch.sdhc_clk directly now, we can remove this file.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Although layerscape platforms reuse mxc_get_clock() of i.MX platforms,
eSDHC clock getting do not have to use it. It uses global data
gd->arch.sdhc_clk directly in fsl_esdhc driver. Even there are more
than one eSDHC controllers on SoC, they use same reference clock.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
The board_mmc_init() defined in board files is actually
doing same thing with the cpu_mmc_init() defined in
arch/arm/cpu/armv7/ls102xa/cpu.c. So drop it.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This patch is to get clock directly from global data.
- Remove uclass clk api method. This was what i.MX platforms were
using, while QorIQ platforms weren't.
- Get clock only from global data, dropping mxc_get_clock().
QorIQ eSDHC controllers on one silicon use same reference clock.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This adds pfe stop command before boot linux kernel
to fix a problem that ethernet won't be workable
after enter linux. Because there is a h/w limitation
in LS1012A PFE, to re-initialize PFE it has to be
safe shutdown, these steps are done through PFE stop.
Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Fix the kernel offset of qspi_bootcmd scripts, followed
the qoriq_memory_layout definition.
Signed-off-by: Wen He <wen.he_1@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
LS1028A QDS board supports multiple combinations of SerDes protocols and
multiple add-on cards with Ethernet PHYs. Some of them require specific
configuration in Linux DT, and the plan is to use DT overlays for them.
Signed-off-by: Alex Marginean <alexandru.marginean@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add some environment variables to facilitate the auto boot.
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This patch adds the support of the spi nand device in mtdparts command
and in dfu_alt_info.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Generate automatically dfu_alt_info for the supported device.
The simple command "dfu 0" allows to start the dfu stack on usb 0
for the supported devices:
- dfu mtd for nand0
- dfu mtd for nor0
- dfu mmc for SDCard
- dfu mmc for eMMC
- dfu ram for images in DDR
The DUF alternate use the "part", "partubi" and "mmcpart" options
to select the correct MTD or GPT partition or the eMMC hw boot partition.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Update the sdmmc2 node for eMMC support on eval board stm32mp157c-ev1.
- update slew-rate for pin configuration
- update "vqmmc-supply"
- remove "st,sig-dir"
- add mandatory "pinctrl-names"
- add "mmc-ddr-3_3v"
This patch solve the eMMC detection issue for command "mmc dev 1".
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Device tree and binding alignment with kernel v5.3
and converted to SPDX.
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
This patch allows to fix the following compilation warning:
===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
====================================================
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Enable the support of function keys on the USB keyboard. This is necessary
to test the USB keyboard driver.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Allow the unit test to pass full 8 byte scan code sequences to the USB
keyboard emulation driver and to parse multi-byte escape sequences.
The following features are not yet tested:
* LED status
* caps-lock
* num-lock
* numerical pad keys
The following features are not yet implemented by the USB keyboard
driver and therefore not tested:
* modifiers for non-alpha-numeric keys, e.g. <SHIFT><TAB> and <ALT><F4>
* some special keys, e.g. <PRINT>
* some modifiers, e.g. <ALT> and <META>
* alternative keyboard layouts
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Move constant USB_KBD_BOOT_REPORT_SIZE. This allows us to reuse it.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Provide support for F1-F12, Insert, Delete, Home, End, Page Up, Page Down.
As this leads to a size increase provide a customizing setting
CONFIG_USB_KEYBOARD_FN_KEYS.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Avoid duplicate translation of arrow key codes.
Reduce code size by avoiding strings and eliminating
usb_kbd_put_sequence().
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
usb_kbd_buffer is defined as u8[]. So let usb_kbd_put_queue() use u8 as
type of the parameter for the new byte.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On Gen5, when the FPGA is loaded and there was some prior interaction
between the HPS and the FPGA via bridges (e.g. Linux was running and
using some of the IPs in the FPGA) followed by warm reset, it has been
observed that there might be outstanding unfinished transactions. This
leads to an obscure misbehavior of the bridge.
When the bridge is enabled again in U-Boot and there are outstanding
transactions, a read from within the bridge address range would return
a result of the previous read instead. Example:
=> bridge enable ; md 0xff200000 1
ff200000: 1234abcd
=> bridge enable ; md 0xff200010 1
ff200010: 5678dcba <------- this is in fact a value which is stored in
a memory at 0xff200000
=> bridge enable ; md 0xff200000 1
ff200000: 90effe09 <------- this is in fact a value which is stored in
a memory at 0xff200010
and so it continues. Issuing a write does lock the system up completely.
This patch opens the FPGA bridges in 'bridge enable' command, the tears
them down again, and then opens them again. This allows these outstanding
transactions to complete and makes this misbehavior go away.
However, it is not entirely clear whether this is the correct solution.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dalon Westergreen <dwesterg@gmail.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Commit ec3dcea744 ("video: mxsfb: Configure the clock after eLCDIF reset")
causes boot regression on imx7d-pico/imx7d-sdb boards, so revert it
until a better solution is prepared.
This reverts commit ec3dcea744.
Reported-by: Joris Offouga <offougajoris@gmail.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Provide a defconfig which allows us to boot Raspberrry Pi 4
and Raspberry Pi 3 Model B/B+
Instead of using the embedded DTB as done in RPi3 we use the
devicetree provided by the firmware.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
For bcm283x based on arm64 we also have to change the mm_region.
Add assign this in mach_cpu_init() so we can create now one binary
for RPi3 and RPi4.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
As part of the effort to create one binary for several bcm83x SoCs
we read the IO base address from device-tree.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
We move the per SOC define BCM283x_BASE to a global variable.
This is a first step to provide a single binary for several bcm283x
SoCs.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The fw_dtb_pointer was defined in the assembly code, which makes him
live in section .text_rest
Put that's not necessary, we can push the variable in the .data section.
This will prevent relocation errors like:
board/raspberrypi/rpi/rpi.c:317:(.text.board_get_usable_ram_top+0x8):
relocation truncated to fit: R_AARCH64_LDST64_ABS_LO12_NC against symbol
`fw_dtb_pointer' defined in .text section in board/raspberrypi/rpi/built-in.o
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
U-Boot support on Raspberry Pi 4 relies on the device-tree
provided by the firmware. The blob does not contain the
U-Boot specific pre-loc-rel properties. The result is, that
the U-Boot banner is not printed.
We fix this by setting the DM_FLAG_PRE_RELOC flag in the driver,
if we rely on a device-tree provided by the firmware.
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
Rename the file bcm283x-uboot.dtsi so that it get
automatically include through the scripts/Makefile.lib
using $(CONFIG_SYS_SOC))-u-boot.dtsi
Without this uarts and pincontroller miss the property dm-pre-reloc
and the first call to bcm283x_mu_serial_ofdata_to_platdata() fails
as the pins are not set correctly.
As a result the U-Boot banner isn't shown on boot.
Before commmit
143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state")
we included bcm283x-uboot.dtsi directly in the device-tree file.
Which got deleted by the metioned commit.
This is a much robuster solution.
Reported-by: Tom Rini <trini@konsulko.com>
Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Tom Rini <trini@konsulko.com> [RPi 3, 32b and 64b modes]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
In commmit
143256b353 ("fdt: update bcm283x device tree sources to Linux 5.1-rc6 state")
we deleted the label for the node soc from bcm283x.dtsi
As we don't need to add the property dm-pre-reloc to the soc node,
we can delete it from bcm283x-uboot.dtsi
Tested-by: Tom Rini <trini@konsulko.com> [RPi 3, 32b and 64b modes]
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
The Raspberry Pi 4 upstream kernel device tree instroduces
a new compatible for the pinctroller. Add this to the driver
so that we can boot with the upstream kernel DT.
Signed-off-by: Matthias Brugger <mbrugger@suse.com>
- Clean vid/pid in Kconfig and add fastboot for rk3399
- add 'u-boot, spl-fifo-mode' for mmc
- Use FIT generator for rk3229 optee and rk3368 ATF
- fan53555: add support for Silergy SYR82X and SYR83X
In GCC 9 support for the Armv5 and Armv5E architectures (which have no
known implementations) has been removed, cf.
https://gcc.gnu.org/gcc-9/changes.html
ARM11 is an armv6 implementation. So change the architecture flag for the
compiler to armv6 for ARM11.
Suggested-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Now that we have buildman telling genboards.cfg to use an output
directory we need to ensure that it exists.
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Fixes: bc750bca12 ("tools: buildman: Honor output directory when generating boards.cfg")
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add __pycache__ to ignored files and extend the rule for _libfdt to also
include generated shared objects (e.g. _libfdt.cpython-37m-x86_64-linux-gnu.so).
Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
With the move to using Python 3 for real, we encounter two different
issues. First, the file include/video_font_data.h includes at least one
UTF-16 character. Given that it does not include any CONFIG symbols it
is easiest to just ignore this file. Next, we encounter similar
problems with some dts/dtsi files that come from Linux. In this case
it's easiest to simply ignore all dts/dtsi files as there will not be
CONFIG symbols for us to migrate in them.
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
As part of loading trustedfirmware, the SPL is required to place portions
of code into the socs sram but the mmc controllers can only do dma
transfers into the regular memory, not sram.
The results of this are not directly visible in u-boot itself, but
manifest as security-relate cpu aborts during boot of for example Linux.
There were a number of attempts to solve this elegantly but so far
discussion is still ongoing, so to make the board at least boot correctly
put both mmc controllers into fifo-mode, which also circumvents the
issue for now.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Rockchips dwmmc controllers can't do dma to non-ddr addresses,
like for example the soc-internal sram but during boot parts of
TrustedFirmware need to be placed there from the read FIT image.
So add handling for a u-boot,spl-fifo-mode to not put the mmc
controllers into fifo mode for all time.
The regular fifo-mode property still takes precedent and only
if not set do we check for the spl-specific property.
Suggested-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Setup dwc3_device structure for non-dm gadgets, which is used
in rk3399 platforms.
dwc3_device would have basic regbase, dr_mode, high speed
and 16-bit UTMI+ etc.
Cc: Marek Vasut <marex@denx.de>
Tested-by: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Fix to use CONFIG_USB_DWC3_GADGET instead of CONFIG_USB_DWC3)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The 'debug' and 'printf' functions were previously added to the list of
logFunctions in commit 0cab42110d ("checkpatch.pl: Add 'debug' to
the list of logFunctions") and commit 397bfd4642 ("checkpatch.pl:
Add 'printf' to logFunctions") but these additions were lost when newer
versions of checkpatch were pulled in from the upstream Linux
kernel version.
This restores them so that you don't end up in a situation where
checkpatch will give a warning for "quoted string split across lines"
which you cannot fix without getting a warning for "line over 80
characters" instead.
Signed-off-by: James Byrne <james.byrne@origamienergy.com>
remove from NXP arm32 all layerscape boards and
build them instead in already existing layerscape
jobs (which now not only build aarch64 boards)
Signed-off-by: Heiko Schocher <hs@denx.de>
move orangepi builds into a new job, and exclude
orangepi builds from sunxi and rockchip jobs.
Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
U-Boot has two different variants of dwc3 initializations,
- with dm variant gadget, so the respective dm driver would
call the dwc3_init in core.
- with non-dm variant gadget, so the usage board file would
call dwc3_uboot_init in core.
The driver probe would handle all respective gadget properties
including phy interface via phy_type property and then trigger
dwc3_init for dm-variant gadgets.
So, to support the phy interface for non-dm variant gadgets,
the better option is dwc3_uboot_init since there is no
dedicated controller for non-dm variant gadgets.
This patch support for adding phy interface like 8/16-bit UTMI+
code for dwc3_uboot.
This change used Linux phy.h enum list, to make proper code
compatibility.
Cc: Marek Vasut <marex@denx.de>
Tested-by: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Technically the default mmc device for fastboot would
use eMMC if the board support for it.
Rockchip platform access device 0 for eMMC so, use the
same device number for rk3328.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Select CONFIG_FASTBOOT_FLASH, CONFIG_FASTBOOT_FLASH_MMC_DEV
for rockchip SoC plaforms in fastboot Kconfig file instead
of defined it in board defconfig.
This eventually drop the explicit configs defined in
supporting board defconfig files.
Tested-by: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Rockchip support differnet or common gadget product number
between Rockchip SoCs like,
0x310a - rk3036
0x320a - rk3229, rk3288
0x330a - rk3328
So, select them on Kconfig based on platform specific
config defined.
This eventually drop the explicit configs defined in
supporting board defconfig files.
Tested-by: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Gadget vendor number, 0x2207 is common across all platfroms
supported in Rockchip SoC.
So, select the same number globally, if ARCH_ROCKCHIP.
This eventually drop the explicit configs defined in supported
board defconfig files.
Tested-by: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Select the gadget manufacturer as 'Rockchip' for
all rockchip platform SoC's.
This eventually drop the explicit defined added
on supported board defconfig files.
Tested-by: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
fan53555_regulator_set_value() passes its own dev to pmic_clrsetbits()
instead of its parent (pmic). As result u-boot crashes when you try to
set voltage on fan53555 regulator
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
That's not correct and it breaks SMBUS-style reads and and writes for
some chips (e.g. SYR82X/SYR83X).
Stop bit should be sent only after the last message.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
SYR82X and SYR83X are almost identical to FAN53555, the only difference
is different die ID and revision, voltage ranges and steps.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
For all the Rockchip SoCs with SPL_LOAD_FIT enable, we need to build
u-boot.itb with U-Boot proper and ATF/OPTEE.
All the Rockchip boards with SPL_LOAD_FIT now supports FIT generator to
get ATF/OPTEE binary path from environment and pass the build even if no
ATF/OPTEE binary exist, so we can enable this feature for the rockchip
platform.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The RK3368 lion board ATF can use bl31.elf like RK3399 and get the FIT
source with generic FIT generator script at:
arch/arm/mach-rockchip/make_fit_atf.py
And then we can use 'BL31' environment to get the path of bl31.elf
instead of copy it into U-Boot folder.
CC: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Use generator script so that we can use environment for TEE source.
$TEE for tee.bin, and if file not exist, the script can report a warning,
and meke the build success without a error.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Some of the ARM11 boards have tight limits on the size of U-Boots. Hence
use EFI_LOADER=n as default on ARM11.
Set EFI_LOADER=y for the Raspberry Pi and Raspberry Pi Zero as these boards
have sufficient storage on the SD card.
Suggested-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The HPS EMAC0 drive strength is changed to 4mA because the initial 8mA
drive strength has caused CE test to fail. This requires changes on the
pad skew for EMAC0 PHY driver. Based on several measurements done, Tx
clock does not require the extra 0.96ns delay which was needed in
Arria10.
Signed-off-by: Ooi, Joyce <joyce.ooi@intel.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Since upgrading to gcc9, warnings are issued:
"taking address of packed member of ‘...’ may result in an unaligned
pointer value"
Fix this by converting dwc2_fifo_read to use unaligned access since packed
structures may be on an unaligned address, depending on USB hardware.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Since upgrading to gcc9, warnings are issued:
"taking address of packed member of ‘...’ may result in an unaligned
pointer value"
Fix this by converting two functions to use unaligned access since packed
structures may be on an unaligned address, depending on USB hardware.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
- In ARMv8 NXP Layerscape platforms we also need to make use of
CONFIG_SYS_RELOC_GD_ENV_ADDR now, do so.
- On ENV_IS_IN_REMOTE, CONFIG_ENV_OFFSET is never used, drop the define
to 0.
- Add Kconfig entry for ENV_ADDR.
- Make ENV_ADDR / ENV_OFFSET depend on the env locations that use it.
- Add ENV_xxx_REDUND options that depend on their primary option and
SYS_REDUNDAND_ENVIRONMENT
- On a number of PowerPC platforms, use SPL_ENV_ADDR not CONFIG_ENV_ADDR
for the pre-main-U-Boot environment location.
- On ENV_IS_IN_SPI_FLASH, check not for CONFIG_ENV_ADDR being set but
rather it being non-zero, as it will now be zero by default.
- Rework the env_offset absolute in env/embedded.o to not use
CONFIG_ENV_OFFSET as it was the only use of ENV_OFFSET within
ENV_IS_IN_FLASH.
- Migrate all platforms.
Cc: Wolfgang Denk <wd@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: uboot-stm32@st-md-mailman.stormreply.com
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
We can only configure and set the environment in SPL when we have a
particular environment location set that is not "nowhere" like it is in
SECURE_BOOT designs. Update the code to reflect that.
Cc: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
These functions can only be built and used when we have
ENV_IS_IN_SPI_FLASH, use that as a guard.
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
We have CONFIG_ENV_SIZE_IS_REDUND but don't really use it. We have one
board where we can simply multiple CONFIG_ENV_SIZE by two for the same
result. The other place where we could but were not previously using
this is for where env_internal.h checks for if we should set
ENV_IS_EMBEDDED. This seems like the most likely use, historically, of
the variable, but it was not used. Add logic to check for this now.
Cc: Wolfgang Denk <wd@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The board file has a build time check to ensure that we do not have the
redundant environment overwriting the factory data. However, using the
symbol CONFIG_ENV_SIZE_REDUND isn't strictly needed as that is always
the same as CONFIG_ENV_SIZE. Use CONFIG_ENV_SIZE instead so that we can
later drop CONFIG_ENV_SIZE_REDUND.
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
The default mtdparts value grew a trailing zero during the Kconfig
conversion. This is because the mtdparts value in the header file
had a \0 at the end, which got misconverted into plain 0 instead of
being dropped.
Signed-off-by: Marek Vasut <marex@denx.de>
Fixes: 43ede0bca7 ("Kconfig: Migrate MTDIDS_DEFAULT / MTDPARTS_DEFAULT")
Reviewed-by: Tom Rini <trini@konsulko.com>
To use this DM timer on socfpga as system tick, it needs to take itself
out of reset.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
The file arch/arm/mach-socfpga/include/mach/misc.h used the same include
guard as the global include/misc.h.
Fix this by giving the arch file an arch prefix.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Make the function pointer struct const, as it does not need to be
writable. This doesn't really change anything other than moving this
variable to a different section. No functional change.
Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
Commit 2a51e16bd5 ("configs: Make USE_TINY_PRINTF depend on SPL||TPL and be default")
enable USE_TINY_PRINTF by default, disable it for Stratix10.
Resync with savedefconfig.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Add #address-cells and #size-cells to memory node to fix incorrect memory
size decoding in recent Uboot version.
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
Today in initr_reloc_global_data() we use some non-obvious tests to
determine if we need to relocate the env_addr within gd or not. In
order to facilitate migration of other symbols to Kconfig we need to
introduce a new symbol for this particular use case.
Cc: Wolfgang Denk <wd@denx.de>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
We only need to build and link input.o when we have any of
CONFIG_KEYBOARD, CONFIG_DM_KEYBOARD (and SPL/TPL variants) or
CONFIG_TEGRA_KEYBOARD set.
Signed-off-by: Tom Rini <trini@konsulko.com>
Pull request for UEFI sub-system for efi-2020-01-rc4
Fix errors due to unaligned memory access:
* disable UEFI except for ARMv8, ARMv7, ARM11
* enable unaligned access support on ARM11
Remove an unused function.
xhci.h has now been moved to include/usb/ directory. Therefore, update the
path in the Cadence USB drivers.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
With an implementation for allow_unaligned() available for arm1136 and
arm1176 UEFI can be supported on these architectures.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
The UEFI spec mandates that unaligned memory access should be enabled if
supported by the CPU architecture.
This patch implements the function unaligned_access() to set the enable
unaligned data support flag and to clear the aligned flag in the system
control register (SCTLR). It is called when UEFI related commands like
bootefi are invoked.
Reported-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Tested-by: Cristian Ciocaltea <cristian.ciocaltea@gmail.com>
Tested-by: Guillaume Gardet <Guillaume.Gardet@arm.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
fatload USB was reported to fail on the Sheevaplug. Debugging showed that
this was caused by an incorrect unaligned write to memory in
path_to_uefi().
UEFI on ARM requires that unaligned memory access is enabled.
* ARMv5 does not support unaligned access at all.
* ARMv6 supports unaligned access when we clear the A flag and set the
U flag.
* On ARMv7 unaligned access is possible when clearing the aligned flag,
which we do in function allow_unaligned() (arch/arm/cpu/armv7/sctlr.S).
For none of the other cpus in arch/arm/cpu/ we have implemented a
similar function.
* ARMv8 allows unaligned access.
Let EFI_LOADER on ARM depend on SYS_CPU=armv7 or SYS_CPU=armv8.
Once we have implemented allow_unaligned() for other ARM CPUs we can add
these to Kconfig.
Reported-by: Gray Remlin <gryrmln@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Add DM support for Silicon(SIL3131 / SIL3132 / SIL3124) sata driver as
few of the PowerPC platforms such as P series based boards need to
use SATA_SIL with DM,
Also fix below warning while PowerPC P series boards compilation,
===================== WARNING ======================"
This board does use CONFIG_LIBATA but has CONFIG_AHCI not"
enabled. Please update the storage controller driver to use"
CONFIG_AHCI before the v2019.07 release."
Failure to update by the deadline may result in board removal."
See doc/driver-model/MIGRATION.txt for more info."
===================================================="
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
Add DM support for Freescale PowerPC sata driver used for PowerPC T series
SoCs,
CONFIG_BLK needs to be enabled on these platforms. It adds the SATA
controller as AHCI device, which is strictly speaking not correct,
as the controller is not AHCI compatible, But the U-Boot AHCI uclass
interface enables the usage of this DM driver,
Also fix below warning while PowerPC T series boards compilation,
===================== WARNING ======================"
This board does use CONFIG_LIBATA but has CONFIG_AHCI not"
enabled. Please update the storage controller driver to use"
CONFIG_AHCI before the v2019.07 release."
Failure to update by the deadline may result in board removal."
See doc/driver-model/MIGRATION.txt for more info."
===================================================="
Signed-off-by: Peng Ma <peng.ma@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
- fix i.MX6ULL evk black screen observed while reboot stress tests
- remove "synopsys,dw-mipi-dsi" compatible to reduce the device tree
differences between Linux and U-Boot for stm32mp1 platform
- Add support for rockchip SoC: PX30, RK3308
- Add and migrate to use common dram driver: PX30, RK3328, RK3399
- Add rk3399 board Tinker-s support
- Board config update for Rock960, Rockpro64
Support tinker-s board. The board is equivalent of tinker board
except of emmc.
TODO:
- support of usb current burst when the board is powered from pc
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
dmc is used to initialize the memory controller. It's needed by
u-boot. Move it in the specific section
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
We shouldn't force which allocator the SPL uses, since there's no
platform requirement for one over the other: in fact, we currently allow
selection of the TPL allocator but not the SPL one!
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The common SPL removed SoC-specific code for RK3399's SPL and in the
process caused the previously-unconditional DRAM initialization in
board_init_f() to only happen when compiling a configuration that does not
support TPL, meaning DRAM never gets initialized if TPL is supported but
disabled.
Fix this by omitting the DRAM init in SPL only when we are configured to
also build a TPL. This fixes custom configurations that have disabled
TPL, and it should also unbreak the "ficus-rk3399", "rock960-rk3399",
and "chromebook_bob" defconfigs, although since I don't have any of
those devices I can't confirm they're broken now.
Fixes: b7abef2ecb ("rockchip: rk3399: Migrate to use common spl board file")
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The common SPL code reordered the DRAM initialization before
rockchip_stimer_init(), which as far as I can tell causes the RK3399 to
lock up completely.
Fix this issue in the common code by putting the DRAM init back after
timer init. I have only tested this on the RK3399, but it wouldn't make
any sense for the timer init to require DRAM be set up on any system.
Fixes: b7abef2ecb ("rockchip: rk3399: Migrate to use common spl board file")
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
ROC-RK3308-CC is a rk3308 based board designed by
Firelfy, with eMMC and 256MB DDR3 and RTL8188 Wifi
on board.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add dts file for ROC-RK3308-CC from firefly.
Sync form linux rockchip for v5.5-armsoc/dts64:
"arm64: dts: rockchip: Add devicetree for board roc-rk3308-cc"
(sha1: 4403e1237be3af0977aa23ef399e3496316317a0)
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Usage:
(1) tools/mkimage -n rk3308 -T rksd -d tpl/u-boot-tpl.bin idbloader.img
(2) cat spl/u-boot-spl.bin >> idbloader.img
(3) upgrade_tool wl 0x40 idbloader.img
Note:
When use ddr binary from rkbin as tpl, use it replace u-boot-tpl.bin in(1)
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
RK3308 is a quad Cortex A35 based SOC with rich audio
interfaces(I2S/PCM/TDM/PDM/SPDIF/VAD/HDMI ARC), which
designed for intelligent voice interaction and audio
input/output processing.
Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Common PLL setup function, compatible with different SOC.
Mainly for the subsequent new SOC use.
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
We should set the init value when vdd_log is enabled, or else the
vdd_log output voltage may not in soc required range.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We should set the init value when vdd_log is enabled, or else the
vdd_log output voltage may not in soc required range.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We should set the init value when vdd_log is enabled, or else the
vdd_log output voltage may not in soc required range.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add vdd_log node according to rock960 schematic V13.
This patch affect two boards:
- Rock960 Model A
- Ficus
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
The u-boot specific pieces in the dts files should be in u-boot.dtsi
not the main files, this allows easier sync with upstream. The
rk3399.dtsi has a mix of both so move them all for consistency.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
(Fix with missing pmugrf)
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
rockpro64 needs to setup I/O domains in order for USB to work in u-boot.
Since we currently don't have a driver to do that, split it into its own
board file and initialize I/O domains here.
Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
CONFIG_IS_ENABLED() needs the config name like used in Kconfig, so
without the leading CONFIG_. The clock drivers all wrongly check for
CONFIG_RESET_ROCKCHIP, fix that
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
rockchip_reset_bind() already does the needed init for the reset
registers, only referenced the wrong cru structure.
So we can get rid of the open-coded reset init and just fix
the correct cru reference.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The rk3399 VD_CENTER voltage domain is not subject to dynamic voltage
scaling. So the regulator reset voltage of 0.9V is used on this board.
Let u-boot initialize the center voltage to 0.95V as it is done for the
VD_LOGIC domain. This avoids instability and occasional linux kernel
Opses on this board.
Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The most important change for u-boot is the fix for the vdd-log pwm
voltage regulator to avoid overvoltage for the VD_LOGIC power domain.
Signed-off-by: Soeren Moch <smoch@web.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
roc-rk3399-pc_defconfig is committed in below
commit <8a681f4c5aa15db51ad0209734859c9fe7c29cfd> ("rockchip: rk3399:
Add ROC-RK3399-PC support")
which doesn't follow the existing defconfigs on rk3399.
So, rename as followed with other rk3399 defconfigs.
Cc: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Few important regulator power rails fixes are available in
linux-next, so sync them same.
Here is the last commit details:
commit <9f7f9b610e1b7d2dc86c543ab0dfcf781bd42326> ("arm64: dts:
rockchip: Fix roc-rk3399-pc regulator input rails")
Cc: Kever Yang <kever.yang@rock-chips.com>
Cc: Levin Du <djw@t-chip.com.cn>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
The px30 evb is an evaluation board for the px30 together with a dsi-
connected display. This adds board and config files for it.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Add core architecture code to support the px30 soc.
This includes a separate tpl board file due to very limited
sram size as well as a non-dm sdram driver, as this also has
to fit into the tiny sram.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Newer Rockchip socs use a different ip block to handle one-time-
programmable memory, so depending on what got enabled get the cpuid
from either source.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Right now enabling SPL_FRAMEWORK will also enable it for the TPL in all
cases, making the TPL bigger. There may be cases where the TPL is really
size constrained due to its underlying ram size.
Therefore introduce a new TPL_FRAMEWORK option and make the relevant
conditionals check for both. The default is set to "y if SPL_FRAMEWORK"
to mimic the previous behaviour where the TPL would always get the
SPL framework if it was enabled in SPL.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
There are some code different with rockchip vendor code which may lead
to different bugs, including:
1) Fix setting error about LPDDR3 dram size ODT.
2) Set phy io speed to 0x2.
3) Fix setting error about phy_pad_fdbk_drive.
4) Fix setting error about PI_WDQLVL_VREF_EN
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The io setting are updated after some bugfix in different rk3399 boards,
sync the code from vendor.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Update lpddr timing in lpddr4-400 and lpddr4-800 file from rockchip
vendor code;
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add capacity detect for rk3399 so that the driver able to detect the
capacity automatically.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
For there are some structures and functions are common for all rockchip SoCs,
migrate to use the common code so that we can clean up reduandent codes.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
RK3328 has a similar controller and phy with PX30, so we can use the
common driver for it and remove the duplicate codes.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Add the sdram driver for PX30 to support ddr3, ddr4, lpddr2 and lpddr3.
For TPL_BUILD, the driver implement full dram init and without DM
support due to the limit of internal SRAM size.
For SPL and U-Boot proper, it's a simple driver with dm for get
dram_info like other SoCs.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The noc register bit definition may be the same for different SoC while
the offset of the register may be different, add the struction
definition as common code.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This sdram_phy_px30.c is based on PX30 SoC, the functions are common
for phy, other SoCs with similar hardware could re-use it.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
This sdram_pctl_px30.c is based on PX30 SoC, the functions are common
for controller, other SoCs with similar hardware could re-use it.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The debug info for dram is main about the capacity related info which is
very important the board init, so set this default enable.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
There are some function like os_reg setting, capacity detect functions,
can be used as common code for different Rockchip SoCs, add a
sdram_common.c for all these functions.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
We are using sys_reg2 and sys_reg3 as ddr cap info, sync the variable
name to what we real use to avoid confuse people.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Since we have new DRAM type and to support different DRAM size in different
CS, we need more bits, so introduce sys_reg3 to record the info.
Note that the info in sys_reg3 is extension to sys_reg2 and the info in
sys_reg2 is the same as before. We define the DRAM_INFO with sys_reg3 as
VERSION2.
All the ENC macro are moved to sdram_common.h since the sdram.c only
need to do the info decode.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The sdram.h suppose to be helper file for sdram.c which including dram
size decode and some u-boot related dram init interface, and all
structure and function for dram driver move to sdram_common.h
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
rename sdram_common.c in arch/arm/mach-rockchip to sdram.c;
so that we can use the file name sdram_common.c in dram driver for
better understand the code;
clean the related file who has use the header file at the same time.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
The header file sdram.h is used for rk3288 and similar SoCs, rename it
to make it more understandable.
Signed-off-by: YouMin Chen <cym@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
According to discussion in the Linux PCI list [1], the dma-ranges should
be continuous and describe the entire inbound window which the controller
can address and not take into account the possible DRAM holes.
Temporarily disable this code which updates the dma-ranges until this
meaning is sorted out.
[1] PCI: rcar: Do not abort on too many inbound dma-ranges
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Pull request for UEFI sub-system for efi-2020-01-rc3
The following changes for the UEFI subsystem are provided:
* allow building UEFI binaries on the sandbox
* enable access to file systems without partition tables
* correctly check the return value of efi_dp_from_file()
fixes: 8ab452d587
When compiling list of cover letter cc addresses, using null as a
separater, then encoding to utf-8 results in lots of "\x00" as
separators. patman then doesnt understand that when it comes to
repoting the list to send-email.
Fix this by not encoding to utf-8, as done for the other patch files.
Signed-off-by: Robert Beckett <bob.beckett@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Compiling arch/sandbox/cpu/os.c results in an error
../arch/sandbox/cpu/os.c: In function ‘os_find_text_base’:
../arch/sandbox/cpu/os.c:823:12: error: cast to pointer from
integer of different size [-Werror=int-to-pointer-cast]
823 | base = (void *)addr;
| ^
cc1: all warnings being treated as errors
The size of void* differs from that of unsigned long long on 32bit
systems.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
OP-TEE can get supplied with a devicetree and will then insert
its firmware node and reserved-memory sections into it.
As this devicetree often is not the one supplied to a later
loaded kernel, a previous commit added functionality to transfer
these nodes onto that new devicetree.
To make sure this functionality stays intact, also add a test
for the transfer functionality.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The loading convention for optee or any other tee on arm64 is as bl32
parameter to the trusted-firmware. So TF-A gets invoked with the TEE as
bl32 and main u-boot as bl33. Once it has done its startup TF-A jumps
into the bl32 for the TEE startup, returns to TF-A and then jumps to bl33.
All of them get passed a devicetree as parameter and all components often
get loaded from a FIT image.
OP-TEE will create additional nodes in that devicetree namely a firmware
node and possibly multiple reserved-memory nodes.
While this devicetree is used in main u-boot, in most cases it won't be
the one passed to the actual kernel. Instead most boot commands will load
a new devicetree from somewhere like mass storage of the network, so if
that happens u-boot should transfer the optee nodes to that new devicetree.
To make that happen introduce optee_copy_fdt_nodes() called from the dt
setup function in image-fdt which after checking for the optee presence
in the u-boot dt will make sure a optee node is present in the kernel dt
and transfer any reserved-memory regions it can find.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
The phandlep pointer returning the phandle to the caller is optional
and if it is not set when calling fdtdec_add_reserved_memory() it is
highly likely that the caller is not interested in a phandle to the
created reserved-memory area and really just wants that area added.
So just don't create a phandle in that case.
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
The change adding fdtdec_add_reserved_memory() already protected the added
phandle against the phandlep being NULL - making the phandlep var optional.
But in the early code checking for an already existing carveout this check
was not done and thus the phandle assignment could run into trouble,
so add a check there as well, which makes the function still return
successfully if a matching region is found, even though no-one wants to
work with the phandle.
Fixes: c9222a08b3 ("fdtdec: Implement fdtdec_add_reserved_memory()")
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Remove the pinctrl_decode_pin_config() API, because this
function is unused and not compatible with livetree
(it uses fdtdec_get_bool instead of ofnode API).
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Enable gpio0 in SPL to allow the sdhci driver read the SD card-detect
signal.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Stefan Roese <sr@denx.de>
As mentioned in doc/README.arm-relocation gd->bd is not available in
dram_init() so we shouldn't attempt to access it.
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
As we can build relocation code for the sandbox now we should enable the
unit tests that had to be disabled up to now.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On the sandbox the UEFI binaries must match the host architectures.
Adjust the Makefiles. Provide the PE/COFF header and relocation files.
Allow building helloworld.efi on the sandbox.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
On the sandbox we should mark the stack area as EFI runtime memory like we
do on any other architecture.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Currently, a whole disk without any partitions is not associated
with EFI_SIMPLE_FILE_SYSTEM_PROTOCOL. So even if it houses some
file system, there is a chance that we may not be able to access
it, particularly, when accesses are to be attempted after searching
that protocol against a device handle.
With this patch, EFI_SIMPLE_FILE_SYSTEM_PROTOCOL is installed
to such a disk if part_get_info() shows there is no partition
table installed on it.
Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Only if no partition table exists, check for a file system on disk level.
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Correctly check the return value of efi_dp_from_file().
If we can determine device path for the file, should not depend on the
device path for the device being requested.
Provide a function description for efi_dp_from_name().
Reported-by: Coverity CID 273159, CID 273158
Fixes: 08c51fff30 ("efi_loader: device_path: check against file path length")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
- Migrate the symbol CONFIG_SYS_REDUNDAND_ENVIRONMENT to Kconfig. This
is size neutral outside of two platforms with latent bugs being fixed
now and they no longer have "ENV_IS_NOWHERE" set along with their
intended location.
Move this symbol to Kconfig. As part of this we can drop a UBI-specific
symbol that was a stop-gap for not having this particular symbol in
Kconfig.
Signed-off-by: Tom Rini <trini@konsulko.com>
This board is setting CONFIG_ENV_IS_IN_SPI_FLASH in the header rather
than defconfig, fix.
Cc: Stefano Babic <sbabic@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board is setting CONFIG_ENV_IS_IN_MMC in the header rather than
defconfig, fix.
Cc: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Remove the compatible "synopsys,dw-mipi-dsi" added in U-Boot
(it don't exist in Linux kernel binding); it is only used
to bind the generic synopsys UCLASS_DSI_HOST "dw_mipi_dsi" to
the driver "stm32-display-dsi" UCLASS_VIDEO_BRIDGE
This binding is done in Linux kernel drivers without compatible
(dw_mipi_dsi_bind() is called in bind of driver, for example in
drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c).
This patch does the same in U-Boot driver, the STM32 driver
calls during its bind the function device_bind_driver_to_node
to bind the generic driver "dw_mipi_dsi" at the same address.
This patch reduces the device tree differences
between Linux kernel and U-Boot for stm32mp1 platform.
Tested with v2020.01-rc1 on STM32MP157C-EV1 and STM32MP157C-DK2.
The dependency of driver is clearer and the probe order is guaranteed.
STM32MP> dm tree
Class Index Probed Driver Name
-----------------------------------------------------------
root 0 [ + ] root_driver root_driver
sysreset 0 [ ] syscon_reboot |-- reboot
simple_bus 0 [ + ] generic_simple_bus |-- soc
serial 0 [ + ] serial_stm32 | |-- serial@40010000
...
video_brid 0 [ + ] stm32-display-dsi | |-- dsi@5a000000
dsi_host 0 [ + ] dw_mipi_dsi | | |-- dsihost
panel 0 [ + ] rm68200_panel | | `-- panel-dsi@0
...
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Running stress reboot test on a i.MX6ULL evk board with a
custom LCD can lead to splash screen failure (black screen).
After comparing the eLCDIF initialization with the Linux kernel
driver, it was noticed that the eLCDIF reset is the first operation
that needs to be done.
So do like the eLCDIF Linux driver and move the eLCDIF clock
frequency configuration after the eLCDIF reset and just prior to
setting the RUN bit.
With this change applied, no more black screen issues has been
found during overnight reboot stress tests.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Add more clks for fec_mxc according to Linux Kernel 5.4.0-rc1
drivers/net/ethernet/freescale/fec_main.c.
Since i.MX8MQ not support CLK_CCF, so add a check to restrict
the code only effect when CONFIG_IMX8M and CONFIG_CLK_CCF both defined.
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
When CONFIG_$(SPL_)CLK not defined, the clock controller device
not exist, so to avoid boot failure for platform not have
CONFIG_$(SPL_)CLK, add a check.
Reviewed-by: Patrick Wildt <patrick@blueri.se>
Tested-by: Patrick Wildt <patrick@blueri.se>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Add i.MX8MM ccf driver support.
Modifed from Linux Kernel 5.3.0-rc1, drop some entries
that not used in U-Boot and adapt to U-Boot CCF style.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Lukasz Majewski <lukma@denx.de>
The IVT offset is changed on i.MX8MN. Use ROM_VERSION to pass the
v1 or v2 to mkimage.
v1 is for iMX8MQ and iMX8MM
v2 is for iMX8M Nano (iMX8MN)
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX8MN support loading images with rom api, so we implement
reuse board_return_to_bootrom to let ROM loading images.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
i.MX8MN has similar architecture with i.MX8MM, so it could reuse
the clock code of i.MX8MM, but i.MX8MN has different CCM root
configurations, so need a separate root entry.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The power domain tree is not accepted by Linux Kernel upstream.
only a single pd node is used currently, as following:
pd: imx8qx-pd {
compatible = "fsl,imx8qm-scu-pd", "fsl,scu-pd";
#power-domain-cells = <1>;
};
So to migrate to use upstream linux dts, we also need a driver
to support this.
This patch is to support the new method, compared with legacy power
domain tree, it will be simpiler, because each device will
has resource id as power domain index, it will be directly passed
to scfw, and no need to let power domain build that tree. If multiple
power domain is needed, it is the dts node should has correctly power
domains entry added and sequence correct.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
The current i.MX8 power domain driver is based on i.MX vendor
power domain tree which will retire later.
The Linux upstream use a single pd node for power domain driver,
and U-Boot will adopt that. When U-Boot i.MX8 dts synced with
Linux Kernel upstream and related driver ready, the legacy
driver will be removed.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
clk and pinctrl will be get(probed) during each device probe,
we don't need to probe them in scu driver. Only need to bind the sub-nodes
(clk and iomuxc) of MU node with their drivers.
So drop the code to probe the clk/pinctrl, and this patch will make it
easy to add more subnodes.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
lpuart0 is the uart used by SPL and U-Boot proper, and DM_SERIAL
is enabled. Since uclass power domain is also enabled, to make
lpuart work properly, need add u-boot,dm-spl for lpuart power domain
and its parent.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
lpuart0 is the uart used by SPL and U-Boot proper, and DM_SERIAL
is enabled. Since uclass power domain is also enabled, to make
lpuart work properly, need add u-boot,dm-spl for lpuart power domain
and its parent.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
with u-boot,dm-spl added for imx8qm-pm node, and SPL_SIMPLE_BUS enabled,
the bind and probe code in board file could be removed.
Also we need to enlarge SYS_MALLOC_F_LEN to avoid calloc fail.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2019-11-05 10:27:18 +01:00
3432 changed files with 52251 additions and 16639 deletions
Some files were not shown because too many files have changed in this diff
Show More
Reference in New Issue
Block a user
Blocking a user prevents them from interacting with repositories, such as opening or commenting on pull requests or issues. Learn more about blocking a user.
