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798 Commits

Author SHA1 Message Date
Tom Rini
dd2c676a65 Prepare v2020.07-rc1
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-28 15:55:57 -04:00
Masahiro Yamada
f34d0ad82e kbuild: SPL/TPL: generate separate asm-offsets.h for SPL and TPL
Currently generic-asm-offsets.h and asm-offsets.h are generated based
on U-Boot proper config options. The same asm-offsets headers are used
for building U-Boot SPL/TPL, which causes potential offset mismatch if
U-Boot proper has different config options from U-Boot SPL/TPL.

This commit adds:
  spl/include/generated/(generic-)asm-offsets.h
  tpl/include/generated/(generic-)asm-offsets.h

spl/include/generated/(generic-)asm-offsets.h is generated if
CONFIG_SPL=y, and included when building SPL.

tpl/include/generated/(generic-)asm-offsets.h is generated if
CONFIG_TPL=y, and included when building TPL.

They are created before Kbuild descends into SPL/TPL object directories
and builds $(obj)/dts/dt-platdata.o because $(obj)/dts/dt-platdata.c
includes a bunch of headers.

Prepend -I$(obj)/include to $(UBOOTINCLUDE) so (generic-)asm-offsets.h
is searched in {spl,tpl}/include/generated/.

Requested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-28 15:44:31 -04:00
Tom Rini
221c4d9826 Merge tag 'u-boot-amlogic-20200428' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- fix sd-emmc controller A init on G12A/G12B/SM1 SoCs
- add GXBB USB PHY driver
- enable access to SPI NOR Flash on VIM2 and VIM3/VIM3L boards
- fix USB PHYs Power-Up on on VIM3/VIM3L boards
2020-04-28 10:09:16 -04:00
Tom Rini
5266ccf957 Merge branch 'master' of git://git.denx.de/u-boot-usb
- DWC2/DWC3 improvements
- Assorted bugfixes
2020-04-28 10:08:47 -04:00
Tom Rini
b4778ae94a Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2020-04-28 10:08:20 -04:00
Tom Rini
545c747447 Merge tag 'dm-pull-27apr20' of git://git.denx.de/u-boot-dm
Move Python tools to use absolute paths
Minor buildman fixes for new features
Make libfdt code more similar to upsteam
2020-04-28 09:52:01 -04:00
Patrice Chotard
f3bc736e41 usb: host: dwc3-sti-glue: Use UCLASS_NOP instead of UCLASS_MISC
dwc3-sti-glue has been broken since MISC uclass has been
modified to scan DT sub-nodes after bind.
Fixing it by a using the no-op uclass.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2020-04-28 13:52:52 +02:00
Patrick Delaunay
245847f065 usb: host: dwc2: add trace to have clean usb start
Solve issue for the display of "usb start" command on stm32mp1
because one carriage return is missing in DWC2 probe.

Before the patch:

STM32MP> usb start
starting USB...
Bus usb-otg@49000000:    Bus usbh-ehci@5800d000:   USB EHCI 1.00

after the patch:

STM32MP> usb start
starting USB...
Bus usb-otg@49000000: USB DWC2
Bus usbh-ehci@5800d000: USB EHCI 1.00

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28 13:52:52 +02:00
Patrick Delaunay
6600438166 usb: host: dwc2: force reset assert
Assert reset before deassert in dwc2_reset;
this patch solve issues when the DWC2 registers are already
initialized with value incompatible with host mode.

Force a hardware reset of the IP reset all the DWC2 registers at
default value, the host driver start with a clean state
(Core Soft reset doen in dwc_otg_core_reset is not enought
 to reset all register).

The error can occurs in U-Boot when DWC2 device gadget driver
force device mode (called by ums or dfu command, before to execute
the usb start command).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28 13:52:52 +02:00
Patrick Delaunay
0bc632c9b1 usb: host: dwc2: add clk support
Add support for clock with driver model.

This patch don't added dependency because when CONFIG_CLK
is not activated the clk function are stubbed.

Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28 13:52:52 +02:00
Patrick Delaunay
e17a4bf198 usb: host: dwc2: add phy support
Use generic phy to initialize the PHY associated to the
DWC2 device and available in the device tree.

This patch don't added dependency because when CONFIG_PHY
is not activated, the generic PHY function are stubbed.

Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28 13:52:52 +02:00
Patrick Delaunay
6f7917472e dm: clk: add stub when CONFIG_CLK is deactivated
Add stub for functions clk_...() when CONFIG_CLK is deactivated.

This patch avoids compilation issues for driver using these API
without protection (#if CONFIG_IS_ENABLED(CLK))

For example, before this patch we have undefined reference to
`clk_disable_bulk') for code:
  clk_disable_bulk(&priv->clks);
  clk_release_bulk(&priv->clks);

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28 13:52:52 +02:00
Heinrich Schuchardt
3c425fc0ef usb: ether: avoid NULL check before free()
free() checks if its argument is NULL. Do not duplicate this check.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-28 13:52:52 +02:00
Heinrich Schuchardt
cff0144e4c usb: avoid NULL check before free
The free() function checks if the argument is NULL.
Do not duplicate this check.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-28 13:52:52 +02:00
Neil Armstrong
3dc4f83970 usb: dwc3-meson-g12a: add power-on/off of the PHYs
Power on/off the PHYs to enable power to the USB ports, fixing USB support
on Khadas VIM3/VIM3L boards.

The G12A USB complex has at least 2 USB2 PHYs, but one is muxed between the
DWC2 and DWC3 controller and the other one directly connected to the DWC3
controller. The USB3+PCIe combo PHY is muxed between the DWC3 controller
and a DW-PCIE controller.
All PHYs are optional, but it's type (usb2/usb3) and position are important
to determine it's capabilities, thus they are stored in a fixed size
array and the phy-name determines it's position, it's position determining
it's type and functionnalities.
This is why we need to loop over the array to power on all the DT provided
PHYs.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Marek Vasut <marex@denx.de>
2020-04-28 10:23:10 +02:00
Neil Armstrong
93d529a275 configs: khadas-vim3: enable support for SPI NOR flash
Enable the necessary configs to make usage of the SPI NOR Flash.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-28 10:23:10 +02:00
Neil Armstrong
5110963c4b arm: dts: meson-khadas-vim3: enable SPI NOR flash
Enable the SPI flash controller and reduce the usable eMMC data pins to 4
to permit using the on-board SPI NOR Flash.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-28 10:23:10 +02:00
Neil Armstrong
d3b37b0351 configs: khadas-vim2: enable support for SPI NOR flash
Add the necessary configs to use the SPI NOR flash.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-28 10:23:10 +02:00
Neil Armstrong
b31950743a arm: dts: meson-gxm-khadas-vim2-u-boot: enable SPI NOR flash
Activate the on-board SPI NOR Flash by enabling the SPI controller and
disabling the DS eMMC pin in the VIM2 u-boot.dtsi file.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-28 10:23:10 +02:00
Neil Armstrong
3a7d6a9c8f arm64: dts: meson: sync dt and bindings from v5.7-rc1
Sync the device tree and dt-bindings from Linux v5.7-rc1 8f3d9f354286
("Linux 5.7-rc1").

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-28 10:23:10 +02:00
Beniamino Galvani
df42f32139 phy: meson: add GXBB PHY driver
This adds support for the USB PHY found on Amlogic GXBB SoCs.

Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-28 10:23:10 +02:00
Neil Armstrong
75dcc2d484 clk: meson: g12a: add missing SD_EMMC_A controller gates
Add missing SD_EMMC_A controller gates needed for probe of the A
controller, otherwise leading to a freeze of the SoC after b3d69aa596.

Fixes: b3d69aa596 ("clk: meson: reset mmc clock on probe")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-28 10:23:10 +02:00
Tom Rini
08977f873f Merge branch '2020-04-27-master-imports'
- Assorted bugfixes.
- Documentation improvements including support for https://u-boot.readthedocs.io/
2020-04-27 17:50:43 -04:00
Tom Rini
9b20a794a7 Merge tag 'mips-pull-2020-04-27' of https://gitlab.denx.de/u-boot/custodians/u-boot-mips
- brcmnand: fix missing code path from Linux driver
- bmips: fix build error when disabling USB
- mips: add option to restore original exception vector base
- mips: fix off-by-one error when clearing gd_data
- mips: minor fixes for compatibility with generic SPL framework
- spl: refactor legacy image loading
- spl: add LZMA decompression support for legacy images
- Makefile: add target to build LZMA compressed U-Boot images
- mtmips: refactor and rewrite low-level init code
- mtmips: add and enable SPL support with LZMA
- mtmips: add support for MT7628 reference board
- mtmips: add support for VoCore/VoCore2 board
2020-04-27 17:50:35 -04:00
Tom Rini
37b0228902 Merge tag 'arc-more-fixes-for-2020.07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-arc
Here we introduce new development platfrom for ARC: HSDK 4xD.
That's pretty much the same base-board as in HSDK but with
very recent quad-core ARC HS47D in the ASIC.

Thus we try to re-use existing code as much as possible while
inevitably add some pieces needed for the new ASIC.

Also we drop selection of bounce buffers on AXS10x
as there's no use of them any longer.
2020-04-27 17:50:11 -04:00
Tom Rini
c8790bee69 Azure/GitLab: Switch over to using LLVM-10
At this point LLVM-7 is rather old.  Switch over to LLVM-10 to enable
some amount of CI coverage with newer compilers.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-27 17:49:24 -04:00
Tom Rini
98178bdcdd travis: Switch over to using LLVM-10
At this point LLVM-7 is rather old.  Switch over to LLVM-10 to enable
some amount of CI coverage with newer compilers.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-27 17:48:40 -04:00
Tom Rini
3bab3dcacd Azure/GitLab: Update to latest Docker image
This provides a newer ARC toolchain along with being based on a newer
Ubuntu bionic tag.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-27 17:18:32 -04:00
Tom Rini
7b8a43e713 travis: Update ARC toolchain to 2019.09
Per Alexey Brodkin, this is the current toolchain we should use when
building for ARC, update.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-27 16:41:11 -04:00
Patrick Delaunay
0015e6defe Makefile: copy SPL_FIT_SOURCE in build directory
Copy the .its source file selected by CONFIG_SPL_FIT_SOURCE
in builddir and in a file named "u-boot.its".

This patch avoid compilation issue when CONFIG_SPL_FIT_SOURCE is used
and KBUILD_OUTPUT is defined, in buildman for example.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
2020-04-27 14:55:29 -04:00
Patrick Delaunay
31d275b095 net: tftp: remove TFTP_MTU_BLOCKSIZE
Remove the unneeded define TFTP_MTU_BLOCKSIZE.
Since the KConfig migration done by commit b618b37076 ("net:
Convert CONFIG_TFTP_BLOCKSIZE to Kconfig"), CONFIG_TFTP_BLOCKSIZE
is always defined and can be used directly to avoid confusion
(fallback to 1468 in code is never used).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-27 14:55:29 -04:00
Patrick Delaunay
421de7fec8 net: tftp: Add help for CONFIG_TFTP_BLOCKSIZE
Add help message for the CONFIG_TFTP_BLOCKSIZE default value,
as explain in tftp.c before migration in commit b618b37076
("net: Convert CONFIG_TFTP_BLOCKSIZE to Kconfig")

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-27 14:55:29 -04:00
Arnaud Ferraris
7683b11098 fs: ext4: skip journal state if fs has metadata_csum
As u-boot doesn't support the metadata_csum feature, writing to a
filesystem with this feature enabled will fail, as expected. However,
during the process, a journal state check is performed, which could
result in:
  - a fs recovery if the fs wasn't umounted properly
  - the fs being marked dirty

Both these cases result in a superblock change, leading to a mismatch
between the superblock checksum and its contents. Therefore, Linux will
consider the filesystem heavily corrupted and will require e2fsck to be
run manually to boot.

By bypassing the journal state check, this patch ensures the superblock
won't be corrupted if the filesystem has metadata_csum feature enabled.

Signed-off-by: Arnaud Ferraris <arnaud.ferraris@collabora.com>
2020-04-27 14:55:29 -04:00
Heinrich Schuchardt
d497821ebf test: test_fs error message
For non-root users mkfs.vfat is not in the search path at least on Debian.
Hence when running 'make tests' a message indicates that file system tests
have been skipped:

SKIPPED [13] test/py/tests/test_fs/conftest.py:340: Setup failed for
filesystem: fat16

This message is not really helpful as the executed program is not
indicated. Provide a more complete message like

SKIPPED [13] test/py/tests/test_fs/conftest.py:340: Setup failed for
filesystem: fat16.
Command 'mkfs.vfat -F 16 build-sandbox/persistent-data/3GB.fat16.img'
returned non-zero exit status 127.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-27 14:55:29 -04:00
Heinrich Schuchardt
cc3860f66f lib: zlib: fix formatting, reference
Provide a valid reference for the deflate format.
Reformat the ALGORITHM and REFERENCES comments.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-27 14:55:29 -04:00
Heinrich Schuchardt
6d68735559 doc: sphinx: refresh parse-headers.pl from Linux
Copy parse-headers.pl from Linux kernel tree:

* fix the parameter description %s/--man/--usage/
* fix a documentation reference

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-27 14:55:29 -04:00
Heinrich Schuchardt
f561498935 Add .readthedocs.yml
readthedocs.org allows to automatically generate and publish the HTML
documentation for the U-Boot project.

Add a file controlling building https://u-boot.readthedocs.io/.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-27 14:55:29 -04:00
Heinrich Schuchardt
38c4f6eb74 doc: specify that xelatex is used as Latex engine
Building the pdf documentation on readthedocs.org fails with pdflatex.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-27 14:55:29 -04:00
Rasmus Villemoes
e282c422e0 tools: fw_env: use erasesize from MEMGETINFO ioctl
We have a board with several revisions. The older ones use a nor flash
with 64k erase size, while the newer have a flash with 4k sectors. The
environment size is 8k.

Currently, we have to put a column containing 0x10000 (64k) in
fw_env.config in order for it to work on the older boards. But that
ends up wasting quite a lot of time on the newer boards that could
just erase the 8k occupied by the environment - strace says the 64k
erase takes 0.405 seconds. With this patch, as expected, that's about
an 8-fold better, at 0.043 seconds.

Having different fw_env.config files for the different revisions is
highly impractical, and the correct information is already available
right at our fingertips. So use the erasesize returned by the
MEMGETINFO ioctl when the fourth and fifth columns (sector size and
#sectors, respectively) are absent or contain 0, a case where the
logic previously used to use the environment size as erase size (and
consequently computed ENVSECTORS(dev) as 1).

As I'm only testing this on a NOR flash, I'm only changing the logic
for that case, though I think it should be possible for the other
types as well.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-04-27 14:55:29 -04:00
Eugeniy Paltsev
5f2c4e0129 CMD: random: fix return code
As of today 'random' command return 1 (CMD_RET_FAILURE) in case
of successful execution and 0 (CMD_RET_SUCCESS) in case of bad
arguments. Fix that.

NOTE: we remove printing usage information from command body
so it won't print twice.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-27 14:55:29 -04:00
Mauro Condarelli
3fd0231432 mips: Add support for SoM "VoCore2".
Small patch to add support for VoCore/VoCore2 board.

VoCore is open hardware and runs OpenWrt/LEDE.
It has WIFI, USB, UART, 20+ GPIOs but is only one inch square.
It will help you to make a smart house, study embedded system
or even make the tiniest router in the world.

Details about this SoM can be found at "https://vocore.io/v2.html".

Signed-off-by: Mauro Condarelli <mc5686@mclink.it>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-27 20:30:14 +02:00
Stefan Roese
04d21a93fa mips: mt76x8: ddr_cal: Correct dqs_find_min/max implementations
The current implementations have some issues detecting the correct
values:

dqs_find_max() will return "last passing fieldval + 1" instead of
"last passing fieldval". Also it will return "maxval + 1" in the
case that all fieldvals are tested valid (without error).

dqs_find_min() will not test the "lowest" value because of using ">"
instead of ">=".

This patch now rewrites these functions to fix those issues. Also,
this patch uses the same approach of a for loop in both functions making
it easier to read and maintain.

Since the variables are integers now, we can use min()/max(), which
handles the wrap around case for fieldval=0: return (0 - 1).

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:13 +02:00
Stefan Roese
112add362b mips: mt76x8: ddr_cal: Change types from u32 to int in dqs_find_min/max
This change is made to enable comparison of integer variables, which
might be negative in the next patch. No functional change is intended
in this patch.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:13 +02:00
Stefan Roese
896449fa29 mips: mt76x8: ddr_cal: Rename dqs_test_valid() to dqs_test_error()
This function returns "-1" (true) upon error. So the function name does
not match its implementation which is confusing. This patch renames the
function to dqs_test_error() which makes the code easier to read.

Also change the return type to bool and return "true" or "false".

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:13 +02:00
Stefan Roese
e9dbd1ac82 mips: mtmips: Increase CONFIG_SPL_SYS_MALLOC_F_LEN
Since SPL now uses malloc to allocate the buffer for the compressed
image before decompression to the destination address, we need to
configure a big enough malloc space in SPL. 256k seems to be big
enough even for the GARDENA board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:13 +02:00
Weijie Gao
6bd888b63b mips: mtmips: add support for mt7628-rfb
This patch adds support for mt7628 reference board. SPL_DM and DT are not
enabled for SPL to save about 17KiB for u-boot-spl.bin.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:13 +02:00
Weijie Gao
757cbbe956 mips: mtmips: enable SPL for all boards
This patch enables SPL for all mtmips boards. And also remove defconfig
files which are intend to build ram bootable u-boot files.

SPL_DM and OF_CONTROL are enabled for both boards.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:13 +02:00
Weijie Gao
7a4b6964b5 mips: mtmips: add SPL support
This patch adds SPL support for mtmips platform. The lowlevel architecture
is split into SPL and the rest parts are built into a memory loadable
u-boot image. Optional SPL_DM and OF_CONTROL are also supported.

The increment of size is very small (< 10 KiB) if SPL_DM and OF_CONTROL are
not enabled and the memory bootable u-boot (u-boot.img) is generated
automatically so there is not need to add a separate config for it.

A lzma compressed payload (u-boot-lzma.img) is also generated and it will
be combined with u-boot-spl.bin to form the unified ROM bootable binary
u-boot-mtmips.bin.

A spl loader is added to support uncompress the payload.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:30:12 +02:00
Weijie Gao
02cd449f0b mips: mtmips: rewrite lowlevel codes of mt7628
This patch rewrites the mtmips architecture with the following changes:

1. Move MT7628 soc parts into a subfolder.
2. Lock parts of D-Cache as temporary stack.
3. Reimplement DDR initialization in C language.
4. Reimplement DDR calibration in a clear logic.
5. Add full support for auto size detection for DDR1 and DDR2.
6. Use accurate CPU clock depending on the input xtal frequency for timer
   and delay functions.

Note:

print_cpuinfo() has incompatible parts with MT7620 so it's moved into
mt7628 subfolder.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
c95c3ec025 mips: add a option to support not reserving malloc space on initial stack
The initial stack on some platforms is too small to hold a large malloc
space. This patch adds a option to allow these platforms not reserving the
malloc space on initial stack. These platforms should set the malloc base
after DRAM is usable.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
2434f58c78 mips: add an option to support initialize SRAM for initial stack
Currently CONFIG_MIPS_INIT_STACK_IN_SRAM assumes the memory space for the
initial stack can be used directly. However on some platform the SRAM needs
initialization, e.g. lock cache.

This patch adds an option to allow a new function mips_sram_init() being
called before setup_stack_gd.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
aba6e77a30 spl: spl_legacy: Add lzma decompression support for legacy image
This patch adds support for decompressing LZMA compressed u-boot payload
in legacy uImage format.

Using this patch together with u-boot-lzma.img may be useful for some
platforms as they can reduce the size and load time of u-boot payload.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-04-27 20:29:33 +02:00
Stefan Roese
f1b0f1550b spl: spl_nor: Remove unused variable 'ret' warning
With the if statement now for the legacy image handling, the compiler
now generates this compile time warning:

common/spl/spl_nor.c:27:6: warning: unused variable 'ret' [-Wunused-variable]

This patch removes this warning by changing the 'ret' variable handling.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-04-27 20:29:33 +02:00
Stefan Roese
2fc91ed3ba spl: spl_nor: Move legacy image loading into spl_legacy.c
Move the legacy image loading into spl_legacy.c. This makes it easier
to extend the legacy image handling with new features that other
SPL loaders might use (e.g. spl_spi.c etc).

No functional change intended.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-04-27 20:29:33 +02:00
Stefan Roese
5ae526b61f spl: spl_legacy: Use IS_ENABLED() to remove #ifdef
Use IS_ENABLED() instead of #ifdef CONFIG_ to remove one #ifdef.

No functional change intended.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-04-27 20:29:33 +02:00
Stefan Roese
c11081729f spl: Extract legacy image handling into separate file
This patch moves the legacy image handling into a separate file, which
will be extended with other legacy image features later.

No function change intended.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
a38f84b439 Makefile: add support to generate LZMA compressed u-boot image
This patch adds support for generating LZMA compressed u-boot image.
The compressed image can be used for SPL to reduce the size of the u-boot
binary.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
04cb39946c lib: enable lzma decompression support for SPL build
This patch enables LZMA decompression support for SPL build

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
df3bad96f3 dts: mtmips: add alternative pinmux node for uart2
This patch adds a new pinmux for UART2, which shares the pins with SPIS.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
a60c1e6d6b mips: add a mtmips-specific field to architecture-specific global data
SoCs of mtmips can use different CPU frequencies depending on the HW/SW
configurations. For example mt7628 uses 580MHz clock if the input xtal
frequency is 40MHz, and 575MHz clock if the xtal is 25MHz. Upon cold boot
the CPU uses the xtal frequency directly.

So hardcoding the timer frequency (half of the CPU frequency) in
CONFIG_SYS_MIPS_TIMER_FREQ is not a good idea for this case.

This patch adds a mtmips-specific field timer_freq to arch_global_data.
This field will be used later in mtmips-specific get_tbclk() to provide
accurate timer frequency in different boot stage.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
c366a45649 mips: mtmips: make use of sysreset-resetctrl for mt7628 soc
This patch replaces sysreset-syscon with sysreset-resetctrl for mt7628 soc.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
caf7092294 sysreset: add reset controller based reboot driver
Some chips provide their sysreset function in reset controller, which is
normally a bit written to 1 to perform the sysreset.

This patch adds a new sysreset driver to take advantage of it.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Stefan Roese
2a9d68e41f mips: spl: Flush cache before jumping to U-Boot proper
This patch adds a MIPS specific jump_to_image_no_args() implementation,
which flushes the U-Boot proper image loaded from the boot device in
SPL before jumping to it.

It has been noticed on MT76x8, that this cache flush is needed. Other
MIPS platforms might need it as well.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Weijie Gao <weijie.gao@mediatek.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
814a8916a9 mips: add an option to enable u_boot_list section for SPL loaders in u-boot-spl.lds
u_boot_list is not only used by DM, but also by some SPL image load methods
such as spl_nor.c.

This patch adds an option CONFIG_SPL_LOADER_SUPPORT in conjunction with
CONFIG_SPL_DM surrounding the u_boot_list section to make sure SPL image
loaders can be correctly built into u-boot SPL without DM enabled.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
e9511193fa mips: enable support for appending dtb to spl binary
If CONFIG_SPL_OF_CONTROL is enabled for SPL and CONFIG_OF_SEPARATE is also
enabled, the dtb will be appended to the u-boot-spl.bin.

When calling dm_init_and_scan() in SPL, fdtdec_setup() will try to locate
dtb at the end of u-boot-spl.bin, by referencing to _image_binary_end.

However _image_binary_end is currently missing in u-boot-spl.lds.
This patch adds _image_binary_end to u-boot-spl.lds to make sure linking
u-boot-spl will not fail.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
6e9281b559 mips: start.S: avoid overwriting outside gd when clearing global data in stack
When setting up initial stack, global data will also be put in the stack,
and being cleared.

The assembler instructions for clearing gd is as follows:

	move	t0, k0
1:
	PTR_S	zero, 0(t0)
	blt	t0, t1, 1b
	 PTR_ADDIU t0, PTRSIZE

t0 is the start address of gd, t1 is the end address of gd (t0 + GD_SIZE).

[PTR_ADDIU t0, PTRSIZE] is in the delay slot of [blt t0, t1, 1b], so it
will be executed before the branch operation.

However the comparison for the BLT instruction is done before executing the
delay slot. This means when the last word just before k1 is cleared, the
loop will continue to run once. This will clear an extra word at k1, which
is outside the global data.

Global data is placed at the top of the stack. If the initial stack is a
SRAM or locked cache, the area outside them may be inaccessible. A write
operation performed in this area may cause an exception.

To solve this, [PTR_ADDIU t0, PTRSIZE] should be placed before the BLT
instruction.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
79765201ca mips: mtmips: add predefined i-cache/d-cache size and linesize
Both mt7620 and mt7628 has the same cache configuration. There is no need
to use CONFIG_SYS_CACHE_SIZE_AUTO to probe it at runtime.

Add them into Kconfig to reduce some code size.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
ce7e197ea5 configs: enable CONFIG_RESTORE_EXCEPTION_VECTOR_BASE for all mtmips boards
This patch enables CONFIG_RESTORE_EXCEPTION_VECTOR_BASE for all mtmips
boards.

Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Weijie Gao
71059736b8 mips: add support to restore exception vector base before booting linux
In U-Boot the exception vector base will be moved to top of memory, to be
used to display register dump when exception occurs.

But some old linux kernel does not honor the base set in CP0_EBASE. A
modified exception vector base will cause kernel crash.

This patch adds an option to enable reset exception vector base to its
previous value, or a user configured value before booting linux kernel.

Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-27 20:29:33 +02:00
Álvaro Fernández Rojas
56ed625ba2 bmips: allow disabling usb support
Currently, if usb is disabled the following error is produced:
  CC      drivers/usb/host/ohci-hcd.o
drivers/usb/host/ohci-hcd.c: In function ‘usb_lowlevel_init’:
drivers/usb/host/ohci-hcd.c:2057:35: error: ‘CONFIG_SYS_USB_OHCI_REGS_BASE’ undeclared (first use in this function); did you mean ‘CONFIG_SYS_MONITOR_BASE’?
  gohci.regs = (struct ohci_regs *)CONFIG_SYS_USB_OHCI_REGS_BASE;
                                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
                                   CONFIG_SYS_MONITOR_BASE
drivers/usb/host/ohci-hcd.c:2057:35: note: each undeclared identifier is reported only once for each function it appears in
drivers/usb/host/ohci-hcd.c:2061:20: error: ‘CONFIG_SYS_USB_OHCI_SLOT_NAME’ undeclared (first use in this function); did you mean ‘CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS’?
  gohci.slot_name = CONFIG_SYS_USB_OHCI_SLOT_NAME;
                    ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~
                    CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
2020-04-27 20:29:33 +02:00
Álvaro Fernández Rojas
b9ec102bc4 nand: brcmnand: return without disabling clock
Linux Broadcom NAND driver only disabled clock if no childs are initialized.
This section of the code seems to have been accidentally dropped when it was
imported in U-Boot.

Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2020-04-27 20:29:33 +02:00
Tom Rini
d16d37bcd4 Merge tag 'video-for-v2020.07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-video
- simple panel 'nv140fhmn49' compatible
- rockchip eDP and LVDS drivers build fix
2020-04-27 09:41:51 -04:00
Eugeniy Paltsev
73b3c23e48 ARC: AXS10x: cleanup kconfig
As we've dropped NAND support for AXS101 and AXS103
see commit 4f5e552d95 ("ARC: AXS10x: drop NAND support")
we don't need bounce buffer anymore.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-27 15:04:42 +03:00
Eugeniy Paltsev
25998aed4d ARC: HSDK-4xD: make init status resistant to U-boot reloading
Use register intstead of static variable to store HSDK init status as
we want to avoid the situation when we reload U-boot via MDB after
previous init is done but HW reset (board reset) isn't done. So
let's store the init status in unused register - CREG_CPU_0_ENTRY
so status will survive after U-boot is reloaded via MDB.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-27 11:20:27 +03:00
Eugeniy Paltsev
3ad73b75a7 ARC: HSDK-4xD: use separate config file
HSDK-4xD has quite different environment so let's split
HSDK and HSDK-4xD configs file.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-27 11:20:27 +03:00
Eugeniy Paltsev
32ac4ee6fd ARC: HSDK-4xD: tweak memory map
For HSDK-4xD we do additional AXI bridge tweaking while doing
hsdk_init command:
 - we shrink IOC region.
 - we configure ARC HS CORE SLV1 aperture depending on
   haps_apb_location environment variable.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-27 11:20:27 +03:00
Eugeniy Paltsev
6917a9dbaf ARC: HSDK-4xD: add CSM configuration support
Add support for CSM enable/disable and CSM relocation via
hsdk_init command. We allow to relocate CSM to the beginning of
any aperture even if HW support finer granularity.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-27 11:20:27 +03:00
Eugeniy Paltsev
1d897d1a22 ARC: HSDK-4xD: add support for SLC enable/disable
Add support for SLC enable/disable via hsdk_init command.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-27 11:20:26 +03:00
Eugeniy Paltsev
d4ee5c39ba ARC: HSDK-4xD: print timer clock value
Print timer clock value in hsdk_clock print_all command.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-27 11:20:26 +03:00
Eugeniy Paltsev
da34c6b7dd ARC: HSDK-4xD: drop additional GPU clock info
HSDK-4xD has other GPU type so it consumes only GPU core clock.
Even we have additional GPU clock dividers they are not routed
to anything. So drop information about those additional clocks
in hsdk_clock print_all command.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-27 11:20:26 +03:00
Eugeniy Paltsev
b84aa4cc1d ARC: HSDK-4xD: print info about HDMI clocks
HSDK-4xD has HDMI working so let's print info about HDMI clocks.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-27 11:20:26 +03:00
Eugeniy Paltsev
e31fdd8170 ARC: HSDK-4xD: fix headerize script for HSDK-4xD compatibility
ARC HS CPU in HSDK-4xD has ARC ID = 0x54, so fix headerize script
accordingly.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-27 11:20:26 +03:00
Eugeniy Paltsev
4b4da7ff61 ARC: HSDK-4xD: use active low polarity of cpu_start pulse
Add quirk for HSDK-4xD - due to HW issues HSDK can use any pulse
polarity but HSDK-4xD require active low polarity of cpu_start pulse.

So use low polarity of cpu_start pulse for both board.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-27 11:20:26 +03:00
Eugeniy Paltsev
28db0d693f ARC: HSDK: split HSDK and HSDK-4xD DTS
Split HSDK and HSDK-4xD device tree files so they can have
different model names.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-27 11:20:26 +03:00
Eugeniy Paltsev
f0f84efe45 ARC: HSDK-4xD: add initial board support
Add initial HSDK-4xD board support.
The ARC HS4x/HS4xD Development Kit includes a multicore ARC HS4xD-based
chip that integrates a wide range of interfaces including Ethernet,
HDMI, WiFi, Bluetooth, USB, SDIO, I2C, SPI, UART, I2S, ADC, PWM and
GPIO, as well as a Think Silicon GPU.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-27 11:20:25 +03:00
Eugeniy Paltsev
1dfb2ec0d7 ARC: HSDK: CGU: add support for timer clock
Add support for additional timer clock which belongs to tunnel
domain.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-27 11:20:25 +03:00
Eugeniy Paltsev
61c151693b ARC: ARCv2: handle DSP presence in HW
In case of DSP extension presence in HW some instructions
(related to integer multiply, multiply-accumulate, and divide
operation) executes on this DSP execution unit. So their
execution will depend on dsp configuration register (DSP_CTRL)
As we want these instructions to execute the same way regardless
of DSP presence we need to set DSP_CTRL properly.

NOTE:
we do the same adjustments in Linux kernel, see in kernel tree:
commit 4827d0cf744e ("ARC: handle DSP presence in HW")

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-27 11:20:25 +03:00
Ley Foon Tan
b9d1671829 arm: socfpga: stratix10: Fix incorrect CLKMGR_S10_PERPLL_BYPASS offset
Offset value for CLKMGR_S10_PERPLL_BYPASS should be 0xb0, fix it.

Reported-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-27 09:14:52 +02:00
Ley Foon Tan
c336d7431c configs: socfpga: arria10: Enable USB support
Enable configs to support USB in Arria 10.

CONFIG_CMD_USB=y
CONFIG_USB=y
CONFIG_DM_USB=y
CONFIG_USB_DWC2=y

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-27 09:14:52 +02:00
Peter Robinson
ea16637525 video: simple_panel: add boe,nv140fhmn49 display
add "boe,nv140fhmn49" display to compatible node.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Cc: Anatolij Gustschin <agust@denx.de>
2020-04-26 23:04:49 +02:00
Peter Robinson
973e31fd47 drivers: video: rockchip: fix building eDP and LVDS drivers
The rk_edp.c and rk_lvds.c files reference rk_setreg which is declared in
hardware.h so include it so the drivers build. Adjust rk_lvds.c so
includes are in alphabetical order while updating.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
2020-04-26 22:58:50 +02:00
Heinrich Schuchardt
c1f39edc62 log: remove useless cast
There is no need to cast from (void *) before assigning to a pointer.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:25:21 -06:00
Simon Glass
b4fa94959d patman: Tidy up sys.path changes
Now that we are using absolute paths we can remove some of the sys.path
mangling that appears in the tools.

We only need to add the path to 'tools/' so that everything can find
modules relative to that directory.

The special paths for finding pylibfdt remain.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:25:21 -06:00
Simon Glass
bf776679a7 patman: Move to absolute imports
At present patman sets the python path on startup so that it can access
the libraries it needs. If we convert to use absolute imports this is not
necessary.

Move patman to use absolute imports. This requires changes in tools which
use the patman libraries (which is most of them).

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:25:21 -06:00
Simon Glass
16287933a8 binman: Move to absolute imports
At present binman sets the python path on startup so that it can access
the libraries it needs. If we convert to use absolute imports this is not
necessary.

Move binman to use absolute imports. This enables removable of the path
adjusting in Entry also.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:25:21 -06:00
Simon Glass
0ede00fdaf buildman: Move to absolute imports
At present buildman sets the python path on startup so that it can access
the libraries it needs. If we convert to use absolute imports this is not
necessary.

Move buildman to use absolute imports. Also adjust moveconfig.py too since
it uses some buildman modules and cannot work without this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:25:21 -06:00
Simon Glass
ce0dc2edfc patman: Move test running/reporting to test_util
This code is useful in other tools. Move it into a common file so it can
be shared.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:25:21 -06:00
Simon Glass
428e773011 patman: Drop the python2 code in test coverage
We don't need to run test coverage with Python 2 now. Drop the
special-case code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:25:21 -06:00
Simon Glass
76160801b0 Add a 'make tcheck' option to test tools
Running all the unit tests takes a while and is not useful when you are
just modifying the tools. Add an option to run only the tools tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:25:21 -06:00
Simon Glass
c07ab6effb binman: Rename the main module
Python does not like the module name being the same as the module
directory. To allow buildman modules to be used from other tools, rename
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:25:21 -06:00
Simon Glass
4d25fe2d95 dtoc: Rename the main module
Python does not like the module name being the same as the module
directory. To allow dtoc modules to be used from other tools, rename
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:25:21 -06:00
Simon Glass
7ec3dc57b3 buildman: Rename the main module
Python does not like the module name being the same as the module
directory. To allow buildman modules to be used from other tools, rename
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:25:21 -06:00
Simon Glass
c3a13cc333 patman: Drop Python 2 StringIO code
We can rely on Python 3 now, so drop the workaround for importing
StringIO.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:25:21 -06:00
Simon Glass
83a4518771 patman: Drop references to __future__
We don't need these now that the tools using Python 3. Drop them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:25:21 -06:00
Simon Glass
515ce965d6 rmboard: Move to Python 3
This script already works with Python 3. Make it use that by default so
that it can import the patman libraries.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:24:08 -06:00
Simon Glass
0d7a8c4033 patman: Rename the main module
Python does not like the module name being the same as the module
directory. To allow patman modules to be used from other tools, rename
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:24:08 -06:00
Simon Glass
60b285f8c3 buildman: Write output files when using -w
At present buildman does not write its own output files (err, done, the
environment) when using -w. However this is useful for when the build is
run with -s to check it.

In fact ProduceResultSummary() reads the result from those files rather
than using the 'result' info directly. So ProcessResult() does not work
with -w at present. It does not print any output.

Fix this by writing output files even when -w is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:24:08 -06:00
Simon Glass
166a98a426 buildman: Use out-env for environment output
At present the environment used by U-Boot is written to the 'env'
directory. This is fine when the output directory is not the same as the
source directory, but when it is (as with -w) it conflicts with the source
directory of the same name.

Rename 'env' to 'out-env' to fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:24:08 -06:00
Simon Glass
88daaef19f buildman: Make sure that -o is given with -w
It is a bad idea to use the default output directory ('..') with -w since
it does a build in that directory and writes various files these.

Require that -o is given to avoid this problem.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:24:08 -06:00
Simon Glass
97944d3f7d buildman: Correct operation of -A flag
This was broken when -a was removed and unfortunately there are no tests
for this. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:24:08 -06:00
Simon Glass
55a98d96bd buildman: Fix test for new 9.2 kernel
The naming is slightly different on kernel.org now. Update the regex so
that the test still passes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-26 14:24:08 -06:00
Masahiro Yamada
64045a6a17 libfdt: split fdt_region declarations out to <fdt_region.h>
fdt_region APIs are not part of libfdt. They are U-Boot extension
for the verified boot. Split the declarations related to fdt_region
out of <fdt_region.h>. This allows <linux/libfdt.h> to become a
simple wrapper file, like Linux does.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-04-26 14:24:08 -06:00
Masahiro Yamada
3e69db1223 fdt_region: move fdt_region.c to common/ from lib/libfdt/
My goal is to sync lib/libfdt/ with scripts/dtc/libfdt/, that is,
make lib/libfdt/ contain only wrapper files.

fdt_region.c was written only for U-Boot to implement the verified
boot. So, this belongs to the same group as common/fdt_support.c,
which is a collection of U-Boot own fdt helpers.

Move lib/libfdt/fdt_region.c to common/fdt_region.c . This is
necessary only when CONFIG_(SPL_TPL_)_FIT_SIGNATURE is enabled.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-04-26 14:23:55 -06:00
Masahiro Yamada
bcbdab70a2 libfdt: migrate fdt_ro.c to a wrapper of scripts/dtc/libfdt/fdt_ro.c
There is no essential difference between scripts/dtc/libfdt/fdt_ro.c
and lib/libfdt/fdt_ro.c

Migrate to a simple wrapper like the other files.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-04-26 14:23:39 -06:00
Tom Rini
d202f67db0 Merge branch '2020-04-25-master-imports'
- Assorted minor fixes
- Actions S700 SoC and Cubieboard7 support
2020-04-25 08:20:22 -04:00
Heinrich Schuchardt
691132e850 rtc: ds1374: typo Watchdog
%s/Watchdoc/Watchdog/

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-24 16:40:09 -04:00
Rasmus Villemoes
cffedec2e8 spi: mpc8xxx_spi: fix missing dev_err definition
The build currently fails with

drivers/spi/mpc8xxx_spi.c:64:3: warning: implicit declaration of function ‘dev_err’ [-Wimplicit-function-declaration]
...
drivers/spi/built-in.o: In function `mpc8xxx_spi_set_speed':
drivers/spi/mpc8xxx_spi.c:227: undefined reference to `dev_err'

Fixes: 4856cc7a97 (mpc8xxx_spi: implement real ->set_speed)
Fixes: 1a7b462dee (mpc8xxx_spi: put max_cs to use)
Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-04-24 16:40:09 -04:00
Heinrich Schuchardt
077e72c6e6 spl: fit: do not check argument of free()
The free() function checks if its argument is NULL. It is superfluous to do
the same check on the calling side.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
dd786d4c4c MAINTAINERS: add entry for cubieboard7 config
This commit adds entry for cubieboard7 config under Actions Semi
OWL family.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
5f0ec25974 doc: boards: add Cubieboard7 documentation
This adds build and flash steps for Actions S700
based Cubieboard7 board.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
99d5ac6f15 arm: add Cubieboard7 board support
The Cubieboard is a single board computer containing a
Actions S700 SoC(with 4 ARMv8 Cortex-A53 cores).

This patch adds respective defconfig alongwith .dts(copied
from Linux v5.5-rc6 with hash "b3a987b0264d").

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
d5c819b885 actions: Move defconfig options to Kconfig
This patch moves some of the config options from bubblegum_96_defconfig
to respective Kconfig files.

Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
78e4f4594d arm: add support Actions Semi S700
This patch adds basic support for Actions Semi based S700
SoC, which is driven by common owl framework.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
ea6314a797 arm: dts: actions: s700: add u-boot specific dtsi file
Devices like uart and clk are needed to be enabled before relocation.
this patch adds u-boot.dtsi file that mark these device as dm-pre-reloc.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
1050eaa082 arm: actions: add S700 SoC device tree
This patch adds .dtsi file(sync with Linux 5.5-rc6 with hash "b3a987b0264d")
and required binding for S700 SoC that is a 64-bit Quad-core ARM
Cortex-A53 cores.

It also provisions dts file to be built based on selected
platform(CONFIG_MACH_S900/S700).

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
8b520ac153 clk: actions: Add common clock driver
This patch converts S900 clock driver to something common that can
be used for other SoCs, for instance S700(few of clk registers are same).

Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
5bc4c0bccc arm: dts: actions: s900: add u-boot specific dtsi file
Devices like uart and clk are needed to be enabled before relocation.
This patch adds u-boot.dtsi file that mark these device as dm-pre-reloc.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
4939beea8e arm: dts: sync dts for Action Semi S900
Synchronize device tree bindings with v5.5-rc6 tag with commit id
"b3a987b0264d".

Also, it removes older clock binding defined for S900 along with undocumented
compatible string "actions,s900-serial" from serial driver and adapts clock
driver to cater to new bindings.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
bf66584336 serial: actions: add compatible string
This patch adds "actions,owl-uart" string to the owl uart driver. It
is also defined in Linux kernel.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
d996f35403 arm: actions: rename sysmap-s900 to sysmap-owl
Now that memory maps(for both S700 and S900 SoCs) can be managed using
a common file, rename sysmap-s900 to sysmap-owl to reflect the same.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Amit Singh Tomar
b1a6bb3b59 arm: actions: Add common framework for Actions Owl Semi SoCs
This commit adds common arch support for Actions Semi Owl
series SoCs and removes the Bubblegum96 board files.

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Amit Singh Tomar <amittomer25@gmail.com>
2020-04-24 16:40:09 -04:00
Heinrich Schuchardt
c11f0d88ba coccinelle: adjust NULL check before free()
The free() function checks if its argument is NULL. We should avoid
checking for NULL before calling free like in

    if (result->tds)
        free(result->tds);

The list of relevant functions differs between Linux and U-Boot, e.g. we
use free().

Adjust the list of relevant functions.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-24 16:40:09 -04:00
Heinrich Schuchardt
cb2a2ebd4f coccinelle: check for casting malloc output
Casting the (void *) output of memory allocation functions before
assignment like in

	sata->cmd_hdr_tbl_offset = (void *)malloc(length + align);

is useless.

Adopt the Linux kernel script
scripts/coccinelle/api/alloc/alloc_cast.cocci.

Now 'make coccicheck' generates warnings like:

./drivers/ata/fsl_sata.c:143:29-33:
WARNING: casting value returned by memory allocation function
to (void *) is useless.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-24 16:40:09 -04:00
Masahiro Yamada
b5a2046376 kbuild: cherry-pick kbuild changes from Linux
b42841b7bb62 kbuild: Get rid of KBUILD_STR
2aedcd098a94 kbuild: suppress annoying "... is up to date." message
9c8fa9bc08f6 kbuild: fix if_change and friends to consider argument order
ebf003f0cfb3 kbuild: Consolidate header generation from ASM offset information
2982c953570b kbuild: remove redundant $(wildcard ...) for cmd_files calculation
8a78756eb545 kbuild: create object directories simpler and faster
4d4b5c2e3b6e treewide: remove explicit rules for *offsets.s
01d509a48b46 kbuild: remove unimportant comments from ./Kbuild

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-04-24 16:40:09 -04:00
Masahiro Yamada
c3da3f5808 kbuild: add FORCE to dependency of $(obj)/dts/dt-platdata.o
if_changed must have FORCE as a prerequisite.

Add $(obj)/dts/dt-platdata.o to 'targets' so that the corresponding
.cmd file is included.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-04-24 16:40:09 -04:00
Ley Foon Tan
f62782fb29 cache: l2x0: Fix write to incorrect shared-override bit
The existing code write bit-0 for shared attribute override enable bit.
It should be bit-22 based on cache controller specification [1].

[1] http://infocenter.arm.com/help/topic/com.arm.doc.ddi0246f/DDI0246F_l2c310_r3p2_trm.pdf

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-24 16:40:09 -04:00
Patrick Delaunay
a3d7cb1939 README: remove references on no more used config CONFIG_SYS_RCAR_I2C*
Remove the references in README on CONFIG_SYS_RCAR_I2C_* not use
in U-Boot drivers/i2c/rcar_i2c.c, since commit a4d9aafadb ("i2c:
 rcar_i2c: Remove the driver") and commit a06a0ac36d ("i2c: rcar_i2c:
 Add DM and DT capable I2C driver")

Checked by the command: grep -r SYS_RCAR_I2C *
And these CONFIG are only defined in
arch/arm/mach-rmobile/include/mach/rcar-base.h

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24 16:40:09 -04:00
Patrick Delaunay
b5d5d90822 cosmetic: README: Fix one CONFIG name
Only replace CONFIF_ by CONFIG_

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24 16:40:09 -04:00
Simon Glass
3a905cd231 dm: mmc: Update mmc_get_mmc_dev() to use const *
This function does not modify the device to change it to use const *, so
that callers with a const udevice * can call it without a cast.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-04-24 16:40:09 -04:00
Simon Glass
f05970380e pci: Add a macro to convert BDF from linux to U-Boot
U-Boot's BDF format has its bits in the same position as the device tree
PCI definition.

Some x86 devices use linux format in their register format and it is
useful to be able to convert to U-Boot format. Add a macro for this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-24 16:40:09 -04:00
Simon Glass
2c2ca207e4 uuid: Use const char * where possible
Update the arguments of these functions so they can be called from code
which uses constant strings.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-24 16:40:09 -04:00
Simon Glass
fdc79a6b12 lib: Add a function to convert a string to upper case
Add a helper function for this operation. Update the strtoul() tests to
check upper case as well.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-24 16:40:09 -04:00
Simon Glass
4f04d54981 test: Add the beginnings of some string tests
There are quite a few string functions in U-Boot with no tests. Make a
start by adding a test for strtoul().

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-24 16:40:09 -04:00
Michal Simek
4b4858936f lib: strto: Stop detection when invalid char is used
This issue has been found when mtd partition are specified. Autodetection
code should stop when the first invalid char is found.

Here is the example of commands:
setenv mtdids nand0=memory-controller@e000e000
setenv mtdparts "mtdparts=nand0:4m(boot),4m(env),64m(kernel),96m(rootfs)"
mtd list

Before:
Zynq> mtd list
List of MTD devices:
* nand0
  - type: NAND flash
  - block size: 0x20000 bytes
  - min I/O: 0x800 bytes
  - OOB size: 64 bytes
  - OOB available: 16 bytes
  - ECC strength: 1 bits
  - ECC step size: 2048 bytes
  - bitflip threshold: 1 bits
  - 0x000000000000-0x000010000000 : "nand0"
	  - 0x000000000000-0x000000400000 : "boot"
	  - 0x000000400000-0x000000800000 : "env"
	  - 0x000000800000-0x000006c00000 : "kernel"
	  - 0x000006c00000-0x000010000000 : "rootfs"

Where it is visible that kernel partition has 100m instead of 64m

After:
Zynq> mtd list
* nand0
  - type: NAND flash
  - block size: 0x20000 bytes
  - min I/O: 0x800 bytes
  - OOB size: 64 bytes
  - OOB available: 16 bytes
  - ECC strength: 1 bits
  - ECC step size: 2048 bytes
  - bitflip threshold: 1 bits
  - 0x000000000000-0x000010000000 : "nand0"
	  - 0x000000000000-0x000000400000 : "boot"
	  - 0x000000400000-0x000000800000 : "env"
	  - 0x000000800000-0x000004800000 : "kernel"
	  - 0x000004800000-0x00000a800000 : "rootfs"

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Fixes: 0486497e2b ("lib: Improve _parse_integer_fixup_radix base 16 detection")
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Pali Rohár <pali@kernel.org>
2020-04-24 16:40:09 -04:00
Baruch Siach
593f3976be mtd: nand: pxa3xx: fix raw read when last_chunk_size == 0
Commit 6293b0361d ("mtd: nand: pxa3xx: add raw read support") added the
local data_len variable in handle_data_pio() to track read size, but
forgot to update the condition of drain_fifo() call. That happens to
work when the layout last_chunk_size != 0. But when last_chunk_size ==
0, drain_fifo() is not called to read the last chunk, which leads to
"Wait timeout!!!" error. Fix this.

Fixes: 6293b0361d ("mtd: nand: pxa3xx: add raw read support")
Cc: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-04-24 15:17:14 -04:00
Ovidiu Panait
79926e4f2f common/board_f: Make reserve_mmu generic
Introduce arch_reserve_mmu to allow for architecture-specific reserve_mmu
routines. Also, define a weak nop stub for it.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24 15:17:14 -04:00
Ovidiu Panait
6184858b85 arm: asm/cache.c: Introduce arm_reserve_mmu
As a preparation for turning reserve_mmu into an arch-specific variant,
introduce arm_reserve_mmu on ARM. It implements the default routine for
reserving memory for MMU TLB and needs to be weakly defined in order to allow
for machines to override it.

Without this decoupling, after introducing arch_reserve_mmu, there would be two
weak definitions for it, one in common/board_f.c and one in
arch/arm/lib/cache.c.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24 15:17:14 -04:00
Ovidiu Panait
586b15bce8 common/board_f: Move arm-specific reserve_mmu to arch/arm/lib/cache.c
Move the ARM-specific reserve_mmu definition from common/board_f.c
to arch/arm/lib/cache.c.

Signed-off-by: Ovidiu Panait <ovpanait@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24 15:17:14 -04:00
Tom Rini
4d131cdb67 Merge tag 'u-boot-stm32-20200424' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Solve stm32mp15 pinctrl dts issue (patch conflict in branches master and next)
- Split device tree for DHCOR Som and AV 96 board
- Update PLL4 setting in AV96 board
- Enable bootd, iminfo, imxtract on DHCOM
2020-04-24 14:07:59 -04:00
Tom Rini
f94fc11544 Revert "sunxi: Fix PHY regression on A20-OLinuXino-Lime2 and A20-Olimex-SOM-EVB"
While the change is correct, generally, it was not intended to be pushed
just yet.

This reverts commit b897306341.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-24 13:13:33 -04:00
Tom Rini
18b9c98024 Merge branch '2020-04-24-master-imports'
- Assorted minor bugfixes.
- Resync fixdep with Linux v5.7-rc1
- Numerous changes to reduce SPL in various cases including when we have
  read-only env support.
- Allow mkimage to align the header on FIT images to a specific size.
2020-04-24 13:04:38 -04:00
Tom Rini
b897306341 sunxi: Fix PHY regression on A20-OLinuXino-Lime2 and A20-Olimex-SOM-EVB
When moving the PHYLIB PHY drivers around in Kconfig we did not at the
same time perform a careful migration of the related drivers and
sub-options.  This lead to the case where previously Kconfig-enabled
driver choices were now disabled on some platforms.  Correct this by
enabling both the PHY driver and sub-option on the above referenced
platforms.

Fixes: af2cbfd6b9 ("drivers: net: Provide Kconfig menu for PHYLIB")
Fixes: 8728c97eff ("configs: Re-sync")
Reported-by: Dario <dario86@tutamail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
---
After checking back on the original commit I can see that these are the
only two platforms to have been broken in the change.
2020-04-24 12:30:45 -04:00
Marek Vasut
23d203d62e ARM: stm32: Enable bootd, iminfo, imxtract on DHCOM
Enable these standard U-Boot commands for image manipulation and for
starting the default boot command using 'boot' command in U-Boot shell.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-24 17:59:48 +02:00
Simon Glass
08140dba0f travis: Correct error checking when building boards
At present if buildman reports an error, the travis build still succeeds.

This is because the travis script does not stop when it sees errors; nor
does it automatically return the exit code. Also the current error
checking never triggers since 'ret' is not set.

Fix this by setting 'ret' correctly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reported-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2020-04-24 10:51:56 -04:00
Bin Meng
0dbd6e3698 mkimage: fit: Free buf directly in fit_extract_data()
If given ptr to free() is NULL, no operation is performed.
Hence we can just free buf directly in fit_extract_data().

Signed-off-by: Bin Meng <bin.meng@windriver.com>
2020-04-24 10:51:56 -04:00
Lihua Zhao
3fc85a782a mkimage: fit: Unmmap the memory before closing fd in fit_import_data()
Without calling munmap(), the follow-up call to open() the same file
with a flag O_TRUNC seems not to cause any issue on Linux, but it fails
on Windows with error like below:

    Can't open kernel_fdt.itb.tmp: Permission denied

Fix this by unmapping the memory before closing fd in fit_import_data().

Signed-off-by: Lihua Zhao <lihua.zhao@windriver.com>
Signed-off-by: Bin Meng <bin.meng@windriver.com>
2020-04-24 10:51:56 -04:00
Bin Meng
3b32cf096b tools: Remove the out-of-date MinGW support codes
MinGW build for U-Boot tools has been broken for years. The official
support of Windows build is now MSYS2. Remove the MinGW support codes.

Signed-off-by: Bin Meng <bin.meng@windriver.com>
2020-04-24 10:51:56 -04:00
Heinrich Schuchardt
ae2b3e8510 doc: invalid doc link in rstFlatTable.py
Remove an invalid documentation link in rstFlatTable.py. This synchronizes
the file with Linux next-20200413.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-24 10:51:56 -04:00
Joel Johnson
67b359cf03 spl: Kconfig: de-dup SPL_DM_GPIO definition
Two nearly concurrent commits (d4d65e112 and bcee8d676) added a
SPL_DM_GPIO symbol. Resolve the duplication in favor of the version
in drivers/gpio/Kconfig.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de>
2020-04-24 10:51:32 -04:00
Masahiro Yamada
308c6b0d4b fixdep: Re-sync with Linux 5.7-rc1
fixdep is a standalone host program, so we can just re-sync it with
the latest Linux in one commit.

I kept the U-Boot own code block surrounded by
/* hack for U-Boot */ ... /* U-boot hack end */.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-04-24 10:51:32 -04:00
Masahiro Yamada
9d88a0aae8 fixdep: handle CONFIG_IS_ENABLE() and friends for TPL
Since commit f1c6e1922e ("spl: dm: use CONFIG_IS_ENABLED to test for
the DM option"), CONFIG_IS_ENABLED() handles CONFIG_TPL_* options, but
fixdep still cannot because it hard-codes the "SPL_" prefix as follows:

    char tmp_buf[256] = "SPL_"; /* hack for U-Boot */

Take care of the "TPL_" prefix too.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-04-24 10:51:32 -04:00
Heinrich Schuchardt
f9f5a7e524 .mailmap: map Ruchika Gupta's mail address
Freescale mail addresses are not valid anymore.

Reported-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-24 10:51:32 -04:00
Heinrich Schuchardt
be621c11b9 dlmalloc: remove unit test support in SPL
We cannot run unit tests in SPL. So remove the unit test support.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-24 10:51:32 -04:00
Heinrich Schuchardt
f6a24a177f lib: do not provide hexdump in SPL
SPL should not be enlarged by building with CONFIG_HEXDUMP=y.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-24 10:51:32 -04:00
Heinrich Schuchardt
6441164dda common: image_sign_info helper functions in SPL
Do not build image_sign_info helper functions in SPL if not needed.

Fixes: b983cc2da0 ("lib: rsa: decouple rsa from FIT image verification")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-24 10:51:32 -04:00
Heinrich Schuchardt
4f4d526f59 lib: do not build OID registry in SPL
The OID registry is only used by crypto functions that are not built in
SPL. So we should not build it in SPL.

Fixes: a9b45e6e83 ("lib: add oid registry utility")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-24 10:51:32 -04:00
Heinrich Schuchardt
b21c08a12b tools: image-host.c: use correct output format
When building on a 32bit host the following warning occurs:

tools/image-host.c: In function ‘fit_image_read_data’:
tools/image-host.c:310:42: warning: format ‘%ld’ expects argument of type
‘long int’, but argument 3 has type ‘ssize_t’ {aka ‘int’} [-Wformat=]
   printf("Can't read all file %s (read %ld bytes, expexted %ld)\n",
                                        ~~^
                                        %d
          filename, n, sbuf.st_size);
                    ~

n is of type ssize_t so we should use %zd for printing.

Fixes: 7298e42250 ("mkimage: fit: add support to encrypt image with aes")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24 10:51:32 -04:00
Heinrich Schuchardt
0053d26bcc Makefile: ARMv7-M has no CPSR register
Compiling on ARMv7-M fails when trying to address the CPSR register which
is not available on this architecture.

Atomic functions refer to the CPSR register if compiled with
arch/arm/include/asm/proc-armv/system.h. On ARMv7-M we should hence
use arch/arm/thumb1/include/asm/proc-armv/system.h instead.

Cf. https://stackoverflow.com/questions/61097841/error-selected-processor-does-not-support-requested-special-purpose-register

Reported-by: Sicris Rey Embay <sicris.embay@gmail.com>
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-24 10:51:32 -04:00
Heinrich Schuchardt
a555557ddc qemu: don't allow to select 32- and 64-bit
TARGET_QEMU_ARM_64BIT and TARGET_QEMU_ARM_32BIT should be mutually
exclusive.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-24 10:51:32 -04:00
Peter Collingbourne
ec8eef5e71 fvp: Add support for loading Android boot images via semihosting
FVP now loads an Android boot image named boot.img if available,
otherwise it falls back to the existing code path.

Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2020-04-24 10:10:01 -04:00
Kever Yang
ebfe611be9 mkimage: fit_image: Add option to make fit header align
The image is usually stored in block device like emmc, SD card, make the
offset of image data aligned to block(512 byte) can avoid data copy
during boot process.
eg. SPL boot from FIT image with external data:
- SPL read the first block of FIT image, and then parse the header;
- SPL read image data separately;
- The first image offset is the base_offset which is the header size;
- The second image offset is just after the first image;
- If the offset of imge does not aligned, SPL will do memcpy;
The header size is a ramdon number, which is very possible not aligned, so
add '-B size'to specify the align size in hex for better performance.

example usage:
  ./tools/mkimage -E -f u-boot.its -B 0x200 u-boot.itb

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-24 10:10:01 -04:00
Kever Yang
10d887ddfa libfdt: Make fdtdec_get_child_count() available for HOST
The tool need to use fdtdec_get_child_count(), make it available for
HOST_CC.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24 10:10:01 -04:00
Kever Yang
02560b1368 tool: use ALIGN() to align the size
Use the ALIGN() for size align so that the code is more readable.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-24 10:10:00 -04:00
Kever Yang
e5ad99cc99 tools: imx8mimage: remove redundant code
The align for fit_size has been done twice, remove the first one for it
does not make any sense.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-24 10:10:00 -04:00
Kever Yang
e002ee7efc tools: kwbimage: use common ALIGN to do the size align
The ALIGN() is now available at imagetool.h, migrate to use it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-24 10:10:00 -04:00
Kever Yang
29e7ab0186 tools: mkimage: use common ALIGN to do the size align
The ALIGN() is now available at imagetool.h, migrate to use it.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-24 10:10:00 -04:00
Kever Yang
cd1cec6364 tool: aisimage: use ALIGN instead of self defiend macro
The ALIGN() is available at imagetool.h, no need to self define one.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-24 10:10:00 -04:00
Kever Yang
c738adb8db tool: Move ALIGN_MASK to header as common MACRO
The ALIGN code is need by many files who need handle structure or image
align, so move the macro to imagetool.h file.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Punit Agrawal <punit1.agrawal@toshiba.co.jp>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-24 10:10:00 -04:00
Jonathan Corbet
9b544c9eb3 docs: Fix conf.py for Sphinx 2.0
commit 3bc8088464712fdcb078eefb68837ccfcc413c88 upstream.

Our version check in Documentation/conf.py never envisioned a world where
Sphinx moved beyond 1.x.  Now that the unthinkable has happened, fix our
version check to handle higher version numbers correctly.

Signed-off-by: Jonathan Corbet <corbet@lwn.net>
[rebase for u-boot]
Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-04-24 10:10:00 -04:00
Rasmus Villemoes
9e3c94d117 env/sf.c: drop private CMD_SAVEENV logic
Deciding whether to compile the env_sf_save() function based solely on
CONFIG_SPL_BUILD is wrong: For U-Boot proper, it leads to a build
warning in case CONFIG_CMD_SAVEENV=n (because the env_save_ptr() macro
causes the function to indeed not be referenced anywhere). And for
SPL, when one selects CONFIG_SPL_SAVEENV, one obviously expects to
actually be able to save the environment.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-04-24 10:10:00 -04:00
Rasmus Villemoes
1df96a7e76 env/ext4.c: remove CONFIG_CMD_SAVEENV ifdef
Removing this ifdef/endif pair yields a "defined but unused warning"
for CONFIG_CMD_SAVEENV=n, but that vanishes if we use the ENV_SAVE_PTR
macro instead. This gives slightly better compile testing, and
moreover, it's possible to have

  CONFIG_CMD_SAVEENV=n
  CONFIG_SPL_SAVEENV=y
  SPL_ENV_IS_IN_EXT4=y

in which case env_ext4_save would erroneously not be compiled in.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-04-24 10:10:00 -04:00
Rasmus Villemoes
3908bc9344 env/fat.c: remove private CMD_SAVEENV logic
Always compile the env_fat_save() function, and let
CONFIG_IS_ENABLED(SAVEENV) (via the ENV_SAVE_PTR macro) decide whether
it actually ends up being compiled in.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-04-24 10:10:00 -04:00
Rasmus Villemoes
82b2f41357 env_internal.h: add alternative ENV_SAVE_PTR macro
The current definition of the env_save_ptr does not take SPL_SAVEENV
into account. Moreover, the way it is implemented means that drivers
need to guard the definitions of their _save methods with ifdefs to
avoid "defined but unused" warnings in case CMD_SAVEENV=n.

The ifdeffery can be avoided by using a "something ? x : NULL"
construction instead and still have the compiler elide the _save
method when it is not referenced. Unfortunately we can't just switch
the existing env_save_ptr macro, since that would give a lot of build
errors unless all the ifdeffery is removed at the same time.
Conversely, removing that ifdeffery first would merely lead to the
"defined but unused" warnings temporarily, but for some storage
drivers it requires a bit more work than just removing their private
CMD_SAVEENV logic.

So introduce an alternative to env_save_ptr, which for lack of a
better name is simply uppercased, allowing one to update storage
drivers piecemeal to both reduce their ifdeffery and honour
CONFIG_SPL_SAVEENV.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-04-24 10:10:00 -04:00
Rasmus Villemoes
1d0adee45c env: add SAVEENV as an alias of the CMD_SAVEENV symbol
Currently, testing whether to compile in support for saving the
environment is a bit awkward when one needs to take SPL_SAVEENV into
account, and quite a few storage drivers currently do not honour
SPL_SAVEENV.

To make it a bit easier to decide whether environment saving should be
enabled, introduce SAVEENV as an alias for the CMD_SAVEENV
symbol. Then one can simply use

  CONFIG_IS_ENABLED(SAVEENV)

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-04-24 10:10:00 -04:00
Frédéric Danis
df928f8549 bootcount_ext: Add flag to enable/disable bootcount
After a successful upgrade, multiple problem during boot sequence may
trigger the altbootcmd process.
This patch adds a version and an upgrade_available entries to the
bootcount file to enable/disable the bootcount check.
When failing to read the bootcount file it will consider that bootcount is
enabled, acting as previously, and update the file accordingly.

The bootcount file is only saved when `upgrade_available` is true, this
allows to save writes to the filesystem.

Signed-off-by: Frédéric Danis <frederic.danis@collabora.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24 10:10:00 -04:00
Rasmus Villemoes
080019b86c make env_entry::callback conditional on !CONFIG_SPL_BUILD
The callback member of struct env_entry is always NULL for an SPL
build. Removing it thus saves a bit of run-time memory in the
SPL (when CONFIG_SPL_ENV_SUPPORT=y) since struct env_entry is embedded
in struct env_entry_node - i.e. about 2KB for the normal case of
512+change hash table entries.

Two small fixups are needed for this, all other references to the
callback member are already under !CONFIG_SPL_BUILD: Don't initialize
.callback in set_flags() - hsearch_r doesn't use that value
anyway. And make env_callback_init() initialize ->callback to NULL for
a new entry instead of relying on an unused or deleted entry having
NULL in ->callback.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24 10:09:59 -04:00
Rasmus Villemoes
34284970a1 lib/hashtable.c: don't test ->callback in SPL
In SPL, environment callbacks are not supported, so e->callback is
always NULL. Removing this makes the SPL a little smaller (about 400
bytes in my ppc build) with no functional change.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24 10:09:59 -04:00
Rasmus Villemoes
7f529f6585 lib/hashtable.c: create helper for calling env_entry::callback
This is preparation for compiling out the "call the callback" code and
associated error handling for SPL, where ->callback is always NULL.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24 10:09:59 -04:00
Rasmus Villemoes
e13df08a26 env: remove callback.o for an SPL build
env.h says this about about callback declarations (U_BOOT_ENV_CALLBACK):

 * For SPL these are silently dropped to reduce code size, since environment
 * callbacks are not supported with SPL.

So env_callback_init() does a lot of work to not find anything in the
guaranteed empty env_clbk list. Drop callback.o entirely from the link
and stub out the only public function defined in callback.o. This cuts
about 600 bytes from the SPL on my ppc build.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-24 10:09:59 -04:00
Landen Chao
532de8d99c eth: mtk-eth: add mt7531 switch support in mediatek eth driver
mt7531 is a 7-ports switch with 5 embedded giga phys, and uses the same
MAC design of mt7530. The cpu port6 supports SGMII only. The cpu port5
supports RGMII or SGMII in different model.

mt7531 is connected to mt7622 via both RGMII and SGMII interfaces.
In this patch, mt7531 cpu port5 or port6 is configured to maximum
capability to align CPU MAC setting.

The dts has been committed in the commit 6efa450565 ("arm: dts:
mediatek: add ethernet and sgmii dts node for mt7622")

Signed-off-by: Landen Chao <landen.chao@mediatek.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
2020-04-24 10:09:59 -04:00
Charles Frey
ea8de984e5 watchdog: mpc8xx_wdt: Allow selection of watchdog mode through environment
The mpc8xx watchdog can work either in 'reset mode' or 'NMI mode'.
The selection can be done at startup only.
It is desirable to select the mode without rebuilding U-boot.
It is also desirable to disable the watchdog without rebuilding.

At watchdog startup, check environment variable 'watchdog_mode'.
If it is 'off', the watchdog is not started. If it is 'nmi',
the watchdog is started in NMI mode. Otherwise, it is started
in reset mode which is the default mode.

Signed-off-by: Charles Frey <charles.frey@c-s.fr>
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
2020-04-24 10:09:59 -04:00
Marek Vasut
132e5b6898 ARM: dts: stm32: Split AV96 into DHCOR SoM and AV96 board
The AV96 is in fact an assembly of DH Electronics DHCOR SoM on top
of an AV96 reference board. Split the DTs to reflect that and make
sure to DHCOR SoM can be reused on other boards easily.

It is also highly recommended to configure the board for the DHCOM
make stm32mp15_dhcom_basic_defconfig
make DEVICE_TREE=stm32mp15xx-dhcor-avenger96
as that permits reusing the board code for the DH components, like
accessing and reading out the ethernet MAC from EEPROM.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Change-Id: I7db47280d4eb0d668eb4e006355240271154f97f
2020-04-24 15:52:48 +02:00
Marek Vasut
e5899099ab ARM: dts: stm32: Adjust PLL4 settings on AV96
The PLL4 is supplying SDMMC12, SDMMC3 and SPDIF with 120 MHz and
FDCAN with 96 MHz. This isn't good for the SDMMC interfaces, which
can not easily divide the clock down to e.g. 50 MHz for high speed
SD and eMMC devices, so those devices end up running at 30 MHz as
that is 120 MHz / 4. Adjust the PLL4 settings such that both PLL4P
and PLL4R run at 100 MHz instead, which is easy to divide to 50MHz
for optimal operation of both SD and eMMC, SPDIF clock are not that
much slower and FDCAN is also unaffected.

Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-24 15:50:40 +02:00
Patrick Delaunay
e7a0251d50 ARM: dts: stm32mp1: remove file stm32mp157-pinctrl.dtsi
Remove the unnecessary file stm32mp157-pinctrl.dtsi and
solve all issues introduced by the commit 8914831860 ("Merge branch
 'next'") after a conflict on the patch applied in the next branch in
commit 1a4f57c895 ("ARM: dts: stm32mp1: DT alignment with Linux 5.6-rc1")

Need to reapplied on stm32mp15-pinctrl.dtsi the the 3 patches
applied previously on file "stm32mp157-pinctrl.dtsi" in v2020.04
- commit 4fdbe6487d ("ARM: dts: stm32: Add alternate pinmux for SDMMC1
 direction pins")'
- commit 5fdcba6402 ("ARM: dts: stm32: Add alternate pinmux for SDMMC2
 pins 4-7")'
- commit 955de51111 ("ARM: dts: stm32: Add alternate pinmux for ethernet
 RGMII")'

Cc: Marek Vasut <marex@denx.de>

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-04-24 15:50:15 +02:00
Lokesh Vutla
dbfd9e0e61 dm: pinctrl: Use right device pointer for configuring pinctrl
commit 719cab6d2e ("dm: pinctrl: convert pinctrl-single to livetree")
converted pinctrl driver to livetree. In this conversion, the call to
read pinctrl-single,pins/bits property is provided with pinctrl device
pointer instead of pinctrl config pointer. Because of this none of the
pins gets configured. Fix it by passing the right udevice pointer.

Fixes: 719cab6d2e ("dm: pinctrl: convert pinctrl-single to livetree")
Reported-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-04-23 08:25:37 -04:00
Tom Rini
a5f9b8a8b5 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-riscv
- Adds few DT related fixes required for Linux EFI stub to work on
  RISC-V.
- Makes SBI v0.2 the default SBI version to work with OpenSBI v0.7.
- Revert "riscv: qemu: clear kernel-start/-end in device tree as
  workaround for BBL"
- Remove unnecessary CONFIG_IS_ENABLED().
2020-04-23 08:24:47 -04:00
Atish Patra
177c53fe6c riscv: Move all fdt fixups together
Keep all the fdt fixups together for better code management.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-23 10:14:16 +08:00
Atish Patra
73d756fd22 riscv: Copy the reserved-memory nodes to final DT
The DT used by U-Boot may be different from the DT being passed to
the OS if the DT is loaded from external media such as network or
mmc. In that case, the reserved-memory node needs to be copied to
the DT passed to the OS.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-23 10:14:16 +08:00
Atish Patra
0cb27856d1 riscv: Setup reserved-memory node for FU540
FU540 uses OF_SEPARATE instead of OF_PRIOR_STAGE.

Enable OF_BOARD_FIXUP to update the DT with reserved-memory node.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-23 10:14:16 +08:00
Atish Patra
d4ea649f17 riscv: Provide a mechanism to fix DT for reserved memory
In RISC-V, M-mode software can reserve physical memory regions
by setting appropriate physical memory protection (PMP) csr. As the
PMP csr are accessible only in M-mode, S-mode U-Boot can not read
this configuration directly. However, M-mode software can pass this
information via reserved-memory node in device tree so that S-mode
software can access this information.

This patch provides a framework to copy to the reserved-memory node
from one DT to another. This will be used to update the DT used by
U-Boot and the DT passed to the next stage OS.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-23 10:14:16 +08:00
Atish Patra
f614753c4b fdtdec: Fix boundary check
In U-Boot, the reserved memory end address is considered as a inclusive
address. This notion is followed while adding a reserved memory node to
the DT.

For example:
end_address = start_address + size - 1

Follow the same notion and fix the end address computation while checking
for existing nodes.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-23 10:14:16 +08:00
Atish Patra
5370478d1c riscv: Add boot hartid to device tree
Linux booting protocol mandates that register "a0" contains the hartid.
However, U-Boot can not pass the hartid via a0 during standard UEFI
protocol. DT nodes are commonly used to pass such information to the OS.

Add a DT node under chosen node to indicate the boot hartid. EFI stub
in Linux kernel will parse this node and pass it to the real kernel
in "a0" before jumping to it.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-23 10:14:16 +08:00
Bin Meng
fa16ec23bc riscv: Make SBI v0.2 the default SBI version
To work with latest OpenSBI release (v0.7 or above) that has the HSM
extension support, select the SBI v0.2 support by default.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-04-23 10:14:06 +08:00
Bin Meng
ff0fa6c1b3 riscv: Add Kconfig option for SBI v0.2
SBI v0.2 is more scalable and extendable to handle future needs
for RISC-V supervisor interfaces. For example, with SBI v0.2 HSM
extension, only a single hart need to boot and enter operating
system. The booting hart can bring up secondary harts one by one
afterwards.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-04-23 10:14:06 +08:00
Bin Meng
6fa022e8fc riscv: Add SMP Kconfig option dependency for U-Boot proper
U-Boot proper running in S-mode only need SMP support when using
SBI v0.1. With SBI v0.2 HSM extension, it does not need implement
multicore boot in U-Boot proper.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-04-23 10:14:06 +08:00
Bin Meng
191636e448 riscv: Introduce SPL_SMP Kconfig option for U-Boot SPL
With SBI v0.2 HSM extension, only a single hart need to boot and
enter operating system. The booting hart can bring up secondary
harts one by one afterwards.

For U-Boot running in SPL, SMP can be turned on, while in U-Boot
proper, SMP can be optionally turned off if using SBI v0.2 HSM.

Introduce a new SPL_SMP Kconfig option to support this.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-04-23 10:14:06 +08:00
Bin Meng
84dc9d2690 riscv: Merge unnecessary SMP ifdefs in start.S
Two consecutive SMP ifdefs blocks can be combined into one.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-04-23 10:14:06 +08:00
Bin Meng
ed1475e2f4 riscv: qemu: Remove the simple-bus driver for the SoC node
Prior to QEMU v3.1.0, QEMU generated the 'virt' SoC node with a
"riscv-virtio-soc" compatible string, and a "simple-bus" driver
was created to accommodate that special case in U-Boot.

Starting from QEMU v3.1.0, the SoC node was set as a "simple-bus",
hence the special simple-bus driver is no longer needed.

Update the doc to mention the latest tested QEMU version 4.2.0.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-23 10:14:06 +08:00
Lukas Auer
846b612014 Revert "riscv: qemu: clear kernel-start/-end in device tree as workaround for BBL"
The commit was added as a workaround required in QEMU when using BBL as
the supervisor binary interface (SBI) for Linux. We are now using
OpenSBI to provide the SBI, the workaround is therefore not required
anymore and can be removed.

This reverts commit 897206c5cc.

Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-23 10:13:35 +08:00
Pragnesh Patel
5988bb9dbf riscv: ax25: cache: Remove SPL_RISCV_MMODE config check
CONFIG_IS_ENABLED(FOO) will check FOO config option for U-Boot,
SPL and TPL, so remove unnecessary CONFIG_IS_ENABLED()

Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-23 10:13:23 +08:00
Tom Rini
caad316b31 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- mvebu bubt cmd: Add A38x support (Joel)
- Clearfog: Fix SCSI boot duplication (Joel)
- Armada-37xx: Fix DDR PHY clock divider values (Marek)
2020-04-22 13:00:21 -04:00
Tom Rini
2b63959e30 Merge tag 'mmc-2020-4-22' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmc
- iproc_sdhci memory leak fix and enable R1B resp quirk
- more mmc cmds and several mmc updates from Heinirich
- Use bounce buffer for tmio sdhci
- Alignment check for tmio sdhci
2020-04-22 08:58:41 -04:00
Heinrich Schuchardt
2448c34f9f drivers: mmc: rpmb: do not build for SPL
RPMB support is used by the 'mmc rpmb' command and by the OP-TEE support.
We do not need it in SPL.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-22 20:41:57 +08:00
Harald Seiler
c51b751893 spl: mmc: Rename spl_boot_partition() to spl_mmc_boot_partition()
This function is only relevant to the MMC driver so calling it
spl_boot_partition() might be confusing.  Rename it to
spl_mmc_boot_partition() to make its purpose more clear (and bring
it in line with spl_mmc_boot_mode()).

Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-22 20:41:57 +08:00
Harald Seiler
e97590654a spl: mmc: Rename spl_boot_mode() to spl_mmc_boot_mode()
The function's name is misleading as one might think it is used
generally to select the boot-mode when in reality it is only used by the
MMC driver to find out in what way it should try reading U-Boot Proper
from a device (either using a filesystem, a raw sector/partition, or an
eMMC boot partition).

Rename it to spl_mmc_boot_mode() to make it more obvious what this
function is about.

Link: https://lists.denx.de/pipermail/u-boot/2020-April/405979.html
Signed-off-by: Harald Seiler <hws@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-22 20:41:57 +08:00
Marek Vasut
4a66d4ee33 mmc: tmio: sdhi: Implement get_b_max function
Implement get_b_max() for the Renesas R-Car SDHI controller driver, limit
the b_max per hardware capabilities such that select Gen2 controllers have
16bit block transfer limit, the rest has 32bit block transfer limit and on
Gen3, the block transfer limit on addresses above the 32bit boundary is set
to 1/4 of the malloc area.

Originally, on Gen3, the block transfers above the 32bit area were limited
to PIO only, which resulted in (R8A7795 Salvator-X , HS200 eMMC):
  => time mmc read 0x0000000700000000 0 0x10000
  time: 0.151 seconds
  => time mmc read 0x0000000700000000 0 0x100000
  time: 11.090 seconds
with bounce buffer in place and b_max adjustment in place:
  => time mmc read 0x0000000700000000 0 0x10000
  time: 0.156 seconds
  => time mmc read 0x0000000700000000 0 0x100000
  time: 2.349 seconds

Note that the bounce buffer does mallocate and free the bounce buffer
for every transfer. Experiment which removes this results in further
increase of read speed, from 2.349s to 2.156s per 512 MiB of data,
which is not such a significant improvement anymore. It might however
be interesting to have bounce buffer directly in the MMC core or even
block core.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2020-04-22 20:41:56 +08:00
Marek Vasut
145429aac0 mmc: Add option to adjust b_max before long read
Add getter function which permits adjusting the maximum number of
blocks that could be read in a single sustained read transfer based
on the location of the source/target buffer and length, before such
transfer starts.

This is mainly useful on systems which have various DMA restrictions
for different memory locations, e.g. DMA limited to 32bit addresses,
and where a bounce buffer is used to work around such restrictions.
Since the U-Boot bounce buffer is mallocated, it's size is limited
by the malloc area size, and the read transfer to such a buffer must
also be limited. However, as not all areas are limited equally, the
b_max should be adjusted accordinly as needed to avoid degrading
performance unnecessarily.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2020-04-22 20:41:56 +08:00
Marek Vasut
d2661d8e9f mmc: tmio: sdhi: Use bounce buffer to avoid DMA limitations
The R-Car SDHI DMA controller has various restrictions. To work around
those restrictions without falling back to PIO, implement bounce buffer
with custom alignment check function which tests for those limitations.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2020-04-22 20:41:56 +08:00
Marek Vasut
80a624f2f0 ARM: rmobile: Increase malloc area size
Increase the malloc area size significantly to cater for bounce buffer
used by the SDHI driver.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2020-04-22 20:41:56 +08:00
Marek Vasut
8074ffe335 common: bouncebuf: Permit passing custom alignment check function
Add extended version of the bounce_buffer_start(), which permits passing in
a custom alignment checker function for the buffer. This is useful e.g. on
systems with various DMA restrictions and where the checker function might
be more complex than a simple CPU cache alignment check.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2020-04-22 20:41:56 +08:00
Heinrich Schuchardt
453d21381b mmc: adjust Kconfig for mmc sub-commands
All sub-commands of the mmc command should be shown in the Kconfig menu
next to the mmc command. This includes:

* mmc bkops
* mmc rpmb
* mmc swrite

The mmc rpmb sub-command is not usable without CONFIG_SUPPORT_EMMC_RPMB.
Add the missing dependency.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-04-22 20:41:56 +08:00
Rayagonda Kokatanur
29617ca39a drivers: mmc: iproc_sdhci: move host.mmc init before sdhci_setup_cfg
move host.mmc before sdhci_setup_cfg

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
2020-04-22 20:41:55 +08:00
Rayagonda Kokatanur
7a65b8b6bb drivers: mmc: iproc_sdhci: fix compilation warning
set_ios_post return type changed from void to int, correcting
the same to fix compilation warning.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
2020-04-22 20:41:55 +08:00
Bharat Kumar Reddy Gooty
2bb02b1a81 drivers: mmc: iproc_sdhci: enable broken R1B response quirk
Enable SDHCI_QUIRK_BROKEN_R1B quirk.

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
2020-04-22 20:41:55 +08:00
Bharat Kumar Reddy Gooty
d5b8500f03 drivers: mmc: iproc_sdhci: fix possible memory leak
Free the pointer variable 'iproc_sdhci' upon failure to fix
possible memory leak.

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
2020-04-22 20:41:55 +08:00
Heinrich Schuchardt
0469d84636 cmd: mmc: provide boot area protection command
Provide command 'mmc wp' to power on write protect boot areas on eMMC
devices.

The B_PWR_WP_EN bit in the extended CSD register BOOT_WP is set. The boot
area are write protected until the next power cycle occurs.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-22 20:41:55 +08:00
Heinrich Schuchardt
d5210e4589 cmd: mmc: display write protect state of boot partition
Boot partitions of eMMC devices can be power on or permanently write
protected. Let the 'mmc info' command display the protection state.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-22 20:41:55 +08:00
Heinrich Schuchardt
1601ea2126 mmc: export mmc_send_ext_csd()
Export function mmc_send_ext_csd() for reading the extended CSD register.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-22 20:41:54 +08:00
Heinrich Schuchardt
9abfe33d10 mmc: EXT_CSD registers for write protection
Add the EXT_CSD register definition related to write protection.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-22 20:41:54 +08:00
Joel Johnson
f60a66ef5d cmd: mvebu: bubt: show image boot device
When a mismatch is found trying to write an image for one boot method
to a different boot device, print an error message including the image
header marked target boot device type.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-22 14:28:15 +02:00
Joel Johnson
549ba7b440 arm: mvebu: clearfog: enable bubt command
With support added for Armada 38x, include the bubt command in
ClearFog defconfig.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-22 14:28:15 +02:00
Joel Johnson
658854a626 cmd: mvebu: bubt: verify A38x target device type
Ensure that the device to which an image is being written includes
header information indicating boot support for the destination
device.

This is derived from the support in the SolidRun master-a38x vendor
fork.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-22 14:28:15 +02:00
Joel Johnson
f41b85ee6a cmd: mvebu: bubt: correct U-Boot spelling
Replace "U-BOOT" text with correct spelling

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-22 14:28:15 +02:00
Joel Johnson
8ec6db7813 cmd: mvebu: bubt: add A38x support
Add support for Armada 38x devices in bubt flashing utility.
This is based on (and streamlined from) the support in the SolidRun
master-a38x vendor fork.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-22 14:28:15 +02:00
Joel Johnson
ab2f757eb0 arm: mvebu: correct SPL boot configs for SPI/MMC
Update mvebu SPL boot selection mechanism for the move to driver model
usage by ensuring that the required driver support for SPI and MMC
booting is available in SPL when the respective boot method is
selected.

Previously, all mvebu boards selected a boot method (implicitly
MVEBU_SPL_BOOT_DEVICE_SPI for many) even if SPL booting wasn't used.
This changes mvebu boot method selection to depend on SPL usage which
resolves the issue with aarch64 boards which don't use SPL getting an
implicit boot device selection resulting in unmet dependencies. The
32-bit arm boards do use SPL, but I'm led to conclude that most aren't
intentionally using the MVEBU_SPL_BOOT_DEVICE selection since none have
SPL_DM_SPI enabled in their defconfig even though they still implicitly
select the SPI boot method.

This also results in the new addition of SPL_GPIO_SUPPORT to helios4.
The mainline dts for helios4 includes the cd-gpios entry for sdhci with
identical addresses as the clearfog dts. I don't have a helios4 board
to confirm, but based on the current source conclude that the board
itself is either wired to pull the signal low for eMMC, or the default
MMC boot isn't fully functional in mainline. In either case, as far as
I can tell, including the GPIO support will at least cause no
regression.

Tested on SolidRun ClearFog devices.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-22 14:28:15 +02:00
Joel Johnson
36d61a3d0a arm: mvebu: clearfog: adjust SCSI boot duplication
Fix duplication resulting from merging of multiple related series.
Commits cecf38a75, bd02fd29f, and 201a500de added or adjusted SCSI
boot support for ClearFog, but in slightly different locations which
didn't result in a merge conflict.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-22 14:28:15 +02:00
Marek Behún
239f424f49 clk: armada-37xx-periph: fix DDR PHY clock divider values
Register value table for DDR PHY clock divider are wrong. They should be
0 or 1 for divide-by-2 or divide-by-4, respectively. Not 1 or 2. Current
values do not make sense, since 2 cannot be achieved, because the
register is only 1 bit long (mask is set to 1).

This fixes clk dump reporting DDR PHY clock rate differently from Linux.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-22 14:28:15 +02:00
Tom Rini
2f2031e647 Merge tag 'dm-pull-21apr20' of git://git.denx.de/u-boot-dm
Various improvements to buildman summary output
2020-04-21 17:53:23 -04:00
Tom Rini
bdcb29960e Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- Backplane support and bug fixes
2020-04-21 15:20:42 -04:00
Simon Glass
b1e5e6d224 buildman: Change the exit codes
The current exit codes of 128 and 129 are useful in that they do not
conflict with those returned by tools, but they are not actually valid.
It seems better to pick some codes which work with 'bit bisect run'.

Update them to 100 (for errors) and 101 (for warnings).

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
a38930e227 buildman: Update the TODO items
A few of these have been done. Drop those and add some new ideas.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
113a8a5ff3 buildman: Add an option to ignore migration warnings
These are becoming more common now. They cause boards to show warnings
which can be mistaking for compiler warnings.

Add a buildman option to ignore them. This option works only with the
summary option (-s). It does not affect the build process.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
174592b964 buildman: Add an option to ignore device-tree warnings
Unfortunately the plague of device-tree warnings has not lifted. These
warnings infiltrate almost every build, adding noise and confusion.

Add a buildman option to ignore them. This option works only with the
summary option (-s). It does not affect the build process.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
eb70a2c059 buildman: Make -I the default
At present buildman defaults to running 'mrproper' on every thread before
it starts building commits for each board. This can add a delay of about 5
seconds to the start of the process, since the tools and other invariants
must be rebuilt.

In particular, a build without '-b', to build current source, runs much
slower without -I, since any existing build is removed, thus losing the
possibility of an incremental build.

Partly this behaviour was to avoid strange build-system problems caused by
running 'make defconfig' for one board and then one with a different
architecture. But these problems were fixed quite a while ago.

The -I option (which disabled mrproper) was introduced four years ago and
does not seem to cause any problems with builds.

So make -I the default and deprecate the option. To allow use of
'mrproper', add a new -m flag.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
ea09fb5bf1 buildman: Update workflow documentation with more detail
Make a few additions and change some wording in the workflow
documentation.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
9e040b5746 buildman: Add the abbreviation for --boards
This option may be frequency used, so mention that it can be abbreviated
to --bo

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
f972836593 buildman: Update the 'theory of operation' a little
Make a few updates to this important section of the documentation, to
make things clearer.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
7b33f21804 buildman: Show a summary of the build result
When buildman finishes it leaves the last summary line visible, which
shows the number of successful builds, builds with warnings and builds
with errors.

It is useful also to see how many builds were done in total along with
the time taken. Show these on a separate line before buildman finishes.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
95ed0a2dbf buildman: Limit the length of progress messages
If a progress message is longer than the terminal line it will scroll the
terminal. Limit the messages to the terminal width.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
6eb76cac1c buildman: Show the number of builds remaining
It is nice to see the actual number of builds remaining to complete. Add
this in the progress message, using a different colour.

Drop the unnecessary 'name' variable while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
edae4ad3bc buildman: Drop unused output code
The commit counter is a hangover from when buildman processed each board
for a commit. Now buildman processes each commit for a board, so this
output is never triggered.

Delete it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
212c0b8170 buildman: Show a message when fetching a repo
Fetching updated versions of a repo can take time. At present buildman
gives no indication that it is doing this.

Add a message to explain the delay.

Tidy up a few other messages while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
102969bb2c buildman: Drop the line-clearing code in Builder
The new feature in terminal can be used by buildman. Update the Builder
class accordingly.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
1e13047a75 patman: Support limiting output to a single line
When outputing a progress line we don't want it to go past the end of the
current terminal line, or it will not be possible to erase it. Add an
option to Print() which allows limiting the output to the terminal width.

Since ANSI sequences do not take up space on the terminal, these are
removed.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
37b224f9f1 patman: Support erasing a previously unfinished text line
When printing progress it is useful to print a message and leave the
cursor at the end of the line until the operation is finished. When it is
finished, the line needs to be erased so a new line can start in its place.

Add a function to handle clearing a line previously written by
terminal.Print()

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
a84eb16179 patman: Update flushing Print() for Python 3
This does not seem to work on Python 3. Update the code to use the
built-in support.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
9ef0ceb730 buildman: Use spaces in the board list
At present the board names shown with -l are separated by commas. This
makes it hard to double-click to select a particular board. Also it is not
possible to select all boards and paste them as arguments to a subsequent
buildman run, since buildman requires spaces to separate the list on the
command line, not commas.

Change the output format to use spaces instead of commas.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
8c9a2674ee buildman: Show the list of boards in magenta
It is quite hard to see the list of board for each error line since the
colour is the same as the actual error line. Show the board list in
magenta so that it is easier to distinguish them.

There is no point in checking the colour of the overall line, since there
are now multiple colours. So drop those tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
35d696dbe5 buildman: Use an object to hold error lines
At present the string for each error line is created in _CalcErrorDelta()
and used to create the summary output. This is inflexible since all the
information (error/warning character, error line, list of boards with that
error line) is munged together in a string.

Create an object to hold this information and only convert it to a string
when printing the actual output.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
5627bd9d96 buildman: Use yellow consistently for warning lines
At present warnings are shown in yellow in the summary (-s) but magenta in
the detail listing (-e). Use yellow in both.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
e631a2b48a buildman: Test the output with --list-error-boards
Add a test to cover this flag, which adds the name of each board to each
error/warning line.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
c9dd80b3d4 buildman: Add a test helper for creating a line prefix
The split/join code is repeated in a lot of places. Add a function to
handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
ce558db34b buildman: Split out testOutput() into separate functions
We want to add a few more tests similar to testOutput(). Split its logic
into a function which runs buildman to get the output and another which
checks the output. This will make it easier to reuse the code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
af43065f8d buildman: Create temp directory in test setup
Rather than having a few tests handle this themselves, create the
temporary directory in the setUp() method and remove it in tearDown().
This will make it easier to add more tests.

Only testOutput and testGit() actually need it, but it doesn't add to the
test time noticeably to do this for all tests in this file.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
c3bc4f1fca buildman: Use an iterator to check test output
Rather than using the absolute array index, use an interator to work
through the expected output lines. This is easier to follow.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
3c339bbd4c buildman: Add test coverage for error/warning colour
Buildman should output the right colours for each error/warning line. Some
of these checks are missing. Add them.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Simon Glass
b206d87d52 buildman: Refactor error-line output int a function
Reduce the amount of repeated code by creating an _OutputErrLines()
function to hold this code.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-21 06:33:47 -06:00
Tom Rini
1bf65142b3 Merge tag 'for-v2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c
i2c changes for 2020.07
- add new i2c driver for Broadcom iproc-based socs
- fix cmd: eeprom: Staticize eeprom_i2c_bus
- i2c: muxes: pca954x: add PCA9546 variant
2020-04-21 08:28:13 -04:00
Tom Rini
94c03c7c77 Merge tag 'for-v2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-ubi
new ubi command for renaming an UBI volume
2020-04-21 08:27:56 -04:00
Hiroyuki Yokoyama
902af10d67 mmc: tmio: sdhi: Add DMA transfer address alignment check at writing
In R-Car Gen 3, there is a DMA controller restriction of SDHI.
When the transfer exceeding the 4 kByte boundary is performed while
the DRAM address is not 128 byte aligned, the bus is occupied.
This patch avoids this.

Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-04-21 10:12:15 +08:00
Tom Rini
a063758059 Merge branch '2020-04-17-master-imports'
- Further cleanups for 'make refcheckdocs'
- Another BTRFS fix.
- Support for automatic decompression of images with booti as well as
  unlz4 command for manual decompression.
2020-04-20 17:22:47 -04:00
Tom Rini
e4837da782 Merge tag 'u-boot-amlogic-20200420' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- enable DM_RNG on meson boards
- fix SMBIOS info on Odroid-C2
- Fix video output on GXBB/GXL/GXM boards
- add USB gadget support for GXL/GXM boards
2020-04-20 13:44:27 -04:00
Marek Behún
48180e15d3 fs: btrfs: support sparse extents
When logical address of a regular extent is 0, the extent is sparse and
consists of all zeros.

Without this when sparse extents are used in a file reading fails with
  Cannot map logical address 0 to physical

Signed-off-by: Marek Behún <marek.behun@nic.cz>
2020-04-20 12:23:29 -04:00
Tom Rini
62c59545ba Merge tag 'ti-v2020.07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
- Fix boot on am335x guardian board
- Increase OPSI speed on AM65x and J721E devices
- Use JTAD register for identifying K3 devices.
- Update TI entry in MAINTAINERS file.
2020-04-20 11:14:22 -04:00
Tom Rini
d1bbf833aa Merge branch 'master' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx 2020-04-20 08:45:27 -04:00
Neil Armstrong
699a33b938 configs: libretech-s912-pc: Enable USB gadget with Mass Storage function
Enable configs to support USB gadget and Mass Storage

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-20 14:19:10 +02:00
Neil Armstrong
572a8064af configs: libretech-s905d-pc: Enable USB gadget with Mass Storage function
Enable configs to support USB gadget and Mass Storage

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-20 14:19:10 +02:00
Neil Armstrong
2a367d2745 configs: khadas-vim: Enable USB gadget with Mass Storage function
Enable configs to support USB gadget and Mass Storage

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-20 14:19:10 +02:00
Neil Armstrong
269ac202ae configs: khadas-vim2: Enable USB gadget with Mass Storage function
Enable configs to support USB gadget and Mass Storage

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-20 14:19:10 +02:00
Neil Armstrong
7033dbfc72 configs: libretech-ac: Enable USB gadget with Mass Storage function
Enable configs to support USB gadget and Mass Storage

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-20 14:19:10 +02:00
Neil Armstrong
af71bdc030 configs: libretech-cc: Enable USB gadget with Mass Storage function
Enable configs to support USB gadget and Mass Storage

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-20 14:19:10 +02:00
Neil Armstrong
a19e8a0f03 arm: dts: meson-gxl: Add USB Gadget nodes for U-Boot
Add the USB DWC2 node to u-boot specific dtsi files since Gadget
support is not (yet) available in upstream Linux yet.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-20 14:19:10 +02:00
Neil Armstrong
dc999e5759 arm: meson-gx: add board_usb_init()/cleanup() for USB gadget
Add arch code to initialize USB Gadget mode using the DWC2 controller,
and using the previously added set_mode() phy functions.

[narmstrong: fixup board_usb_cleanup call to phy_meson_gxl_usb2_set_mode]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-20 14:19:10 +02:00
Neil Armstrong
838c0af9d2 phy: meson-gxl-usb: add set_mode call to force switch to peripheral mode
Add set_mode function in the Amlogic GXL PHYs that will be called by
the arch code to switch PHYs from/to gadget mode.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-20 14:19:10 +02:00
Neil Armstrong
c2b9aa98bf generic-phy: add generic_phy_get_by_node()
Add generic_phy_get_by_node() to get a PHY phandle from a node instead
of a udevice.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[narmstrong: fixed by including ofnode.h in generic-phy.h]
2020-04-20 14:19:10 +02:00
Florinel Iordache
e174fb7061 t208xqds: add support for backplane kr
Add support for backplane kr on t208xqds: remove board specific fixups
on t208xqds for ethernet interfaces specified in device tree as
supported backplane modes.

Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-20 13:35:11 +05:30
Florinel Iordache
d4694ad86a lx2160aqds: add support for backplane kr
Add support for backplane kr on lx2160aqds: remove board specific fixups
on lx2160aqds for ethernet interfaces specified in device tree as
supported backplane modes.

Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-20 13:35:11 +05:30
Florinel Iordache
d698112fd6 ls1046aqds: add support for backplane kr
Add support for backplane kr on ls1046aqds: remove board specific fixups
on ls1046aqds for ethernet interfaces specified in device tree as
supported backplane modes.

Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-20 13:35:11 +05:30
Florinel Iordache
5d3bcdb12f phy: add support for backplane kr mode
Add generic support for backplane kr modes currently available:
10gbase-kr, 40gbase-kr4. Remove platform generic fixups
(armv8/layerscape and powerpc) for ethernet interfaces specified
in device tree as supported backplane modes.

Signed-off-by: Florinel Iordache <florinel.iordache@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-20 13:35:11 +05:30
Yinbo Zhu
316fc6ff76 armv8: ls1028a: define esdhc_status_fixup
This patch is to define esdhc_status_fixup function for ls1028a to disable
SDHC1/SDHC2 status in device tree node if not selected.

Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
Signed-off-by: Xiaowei Bao <xiaowei.bao@nxp.com>
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-20 13:35:11 +05:30
Heinrich Schuchardt
3460a6bba1 board: fsl: lx2160a: unused variable gic_lpi_base
If the board is configured without CONFIG_GIC_V3_ITS, an error occurs:

board/freescale/lx2160a/lx2160a.c: In function ‘ft_board_setup’:
board/freescale/lx2160a/lx2160a.c:673:6: error: unused variable
‘gic_lpi_base’ [-Werror=unused-variable]
  673 |  u64 gic_lpi_base;
      |      ^~~~~~~~~~~~

Let's define the variable as __maybe_unused.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-20 13:35:11 +05:30
Rayagonda Kokatanur
956d57a8dd drivers: i2c: add brcm iproc I2C driver support
Add I2C driver support for Broadcom iproc-based socs.

Signed-off-by: Arjun Jyothi <arjun.jyothi@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Sheetal Tigadoli <sheetal.tigadoli@broadcom.com>
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-04-20 06:52:28 +02:00
Marek Vasut
ce97607154 cmd: eeprom: Staticize eeprom_i2c_bus
The eeprom_i2c_bus is not used outside of this file, make it static.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-04-20 06:47:54 +02:00
Chris Packham
0b1d7b7271 i2c: muxes: pca954x: add PCA9546 variant
This adds the PCA9546 4-channel i2c bus switch.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Luca Ceresoli <luca@lucaceresoli.net>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-04-20 06:47:35 +02:00
Philippe Reynes
83f7078b68 cmd: ubi: add a command to rename volume
This commit adds the command ubi rename to rename an ubi volume.
The format of the command is: ubi rename <oldname> <newname>.
To enable this command, the option CMD_UBI_RENAME must be selected.

Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-20 06:34:56 +02:00
Lokesh Vutla
e7510d443d arm: mach-k3: Use JTAD_ID register for device identification
JTAG ID register is defined by IEEE 1149.1 for device identification.
Use this JTAG ID register for identifying AM65x[0] and J721E[1] devices
instead of using SoC specific registers.

[0] http://www.ti.com/lit/ug/spruid7e/spruid7e.pdf
[1] http://www.ti.com/lit/ug/spruil1a/spruil1a.pdf

Reported-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-04-19 16:20:53 +05:30
Giulio Benetti
931edc6efb Add support for i.MXRT1020-EVK board
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18 14:55:00 +02:00
Giulio Benetti
7787330200 dt-bindings: pinctrl: add i.MXRT1020 pins definition
Add i.MXRT1020 pins definition.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-04-18 14:54:51 +02:00
Giulio Benetti
63d4dc5846 ARM: dts: imxrt1020: add dtsi file
Add dtsi file for i.MXRT1020.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18 14:54:44 +02:00
Giulio Benetti
07cae0d147 Add i.MXRT1020 support
Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18 14:54:36 +02:00
Giulio Benetti
ac4e7610da clk: imx: add i.IMXRT1020 clk driver
Add i.MXRT1020 clk driver support.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18 14:54:28 +02:00
Lukasz Majewski
7c0fbf2fe3 imx: pmic: Set proper pmic name for iMX53 HSC|DDC boards
After the
commit 4213609cc7 ("drivers: core: use strcmp when find device by name")
the exact DTS node name for PMIC device must be provided.

This patch fixes this issue by providing full DTS node name ('mc34708@8').

Signed-off-by: Lukasz Majewski <lukma@denx.de>
Reviewed-by: Jaehoon Chug <jh80.chung@samsung.com>
2020-04-18 13:08:34 +02:00
Lukasz Majewski
90a3cff53e config: imx: Enable CONFIG_PHY_FIXED on HSC and DDC i.MX53 boards
The CONFIG_PHY_FIXED is necessary to allow DSA switch work in U-Boot after
the
commit 3bf135b6c3 ("drivers: net: phy: Ignore PHY ID 0 during PHY probing").

This particular device - LAN9303 - returns phy_id == 0. With
CONFIG_PHY_FIXED enabled HSC and DDC boards work again with the same U-Boot
binary.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-04-18 13:08:26 +02:00
Lukasz Majewski
4a45f4046b dts: imx: Add fixed-link property to HSC and DDC (imx53) devices
Those two boards are supposed to be run with a single u-boot binary.
There are notable differences though - HSC uses DSA switch (which
phy_id == 0x0) and DCC (DP83848C).

After the commit 3bf135b6c3
("drivers: net: phy: Ignore PHY ID 0 during PHY probing") the PHY devices
with phy_id == 0 are not created in U-Boot anymore. This caused regression
on HSC.

To fix this problem - the fec's 'fixed-link' node has been introduced and
the phy_id is not assessed anymore. This approach works on both boards.

Signed-off-by: Lukasz Majewski <lukma@denx.de>
2020-04-18 13:08:18 +02:00
Harald Seiler
2c8627110e ARM: imx6: DHCOM i.MX6 PDK: Fix usb-otg VBUS regulator
During the conversion of this board to DM_REGULATOR, usb-mass-storage
was broken and started failing with the following error:

        => ums 0 mmc 2
        UMS: LUN 0, dev 2, hwpart 0, sector 0x0, count 0xe90000
        Error enabling VBUS supply
        g_dnl_register: failed!, error: -38
        g_dnl_register failed

Fix this by adding the relevant GPIO to the regulator node.

Fixes: 4ca99fe81a ("ARM: imx: dh-imx6: Enable DM regulator")
Signed-off-by: Harald Seiler <hws@denx.de>
2020-04-18 13:00:35 +02:00
Harald Seiler
15df6b31b6 ARM: imx6: DHCOM i.MX6 PDK: Convert to DM_ETH
Use DM_ETH instead of legacy networking.  Add VIO as a fixed regulator
to the relevant device-trees and augment the FEC node with properties
for the reset GPIO.

It should be noted that the relevant properties for the reset GPIO
already exist in the PHY node (reset-gpios, reset-delay-us,
reset-post-delay-us) but U-Boot currently ignores those and only
supports the bus-level reset properties in the FEC node
(phy-reset-gpios, phy-reset-duration, phy-reset-post-delay).

Signed-off-by: Harald Seiler <hws@denx.de>
2020-04-18 13:00:07 +02:00
Fabio Estevam
fe2f432c1c wandboard: Print the board version in board_late_init()
Since CONFIG_DISPLAY_BOARDINFO_LATE is no longer used,  the checkboard()
function is no longer called.

As it is useful to print the board revision, print it inside
board_late_init() instead.

Also, to avoid GPIO errors related to using a GPIO without requesting it,
move the gpio_request(REV_DETECTION, "REV_DETECT") call prior to its
usage.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Heiko Schocher <hs@denx.de>
2020-04-18 12:59:59 +02:00
Fabio Estevam
06f35583c5 wandboard: Remove CONFIG_DISPLAY_BOARDINFO_LATE
Since we are using revD1 device tree for all board revisions, the
following can be seen on a revB1 board:

Model: Wandboard i.MX6 Quad Board revD1
Board: Wandboard rev B1

To avoid such confusing messages, disable CONFIG_DISPLAY_BOARDINFO_LATE.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Heiko Schocher <hs@denx.de>
2020-04-18 12:59:52 +02:00
Fabio Estevam
b8e74fc8db wandboard: Do not print error when PMIC is not present
On wandboard variants prior to revD1, there is no PMIC populated, so
do not print an error when the reading of the device ID register fails.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Heiko Schocher <hs@denx.de>
2020-04-18 12:59:45 +02:00
Fabio Estevam
417ea635dc pmic: pfuze100: Change error message level to debug
In some cases U-Boot runs the same binary on different board versions.

In wandboard, for example, there are versions with the PFUZE100 PMIC
populated and others without it.

When the PMIC is not present, it is not really useful to get PMIC error,
so change the error message level to debug instead.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Heiko Schocher <hs@denx.de>
2020-04-18 12:59:37 +02:00
Fabio Estevam
4c13a4db60 wandboard: Fix version detection for mx6q/mx6dl revD1
The detection of the revD1 version is based on the presence of the PMIC.

Currently revb1 device trees are used for mx6q/mx6dl variants, which
do not have the PMIC nodes.

This causes revD1 boards to be incorrectly be detected as revB1.

Fix this issue by using the revd1 device trees, so that the PMIC node can be
found and then the PMIC can be detected by reading its register ID.

Imported the revd1 device trees from mainline kernel version 5.7-rc1.

Reported-by: Heiko Schocher <hs@denx.de>
Reported-by: Derek Atkins <derek@ihtfp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Derek Atkins <derek@ihtfp.com>
Tested-by: Heiko Schocher <hs@denx.de>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
2020-04-18 12:59:23 +02:00
Giulio Benetti
84eea6a118 configs: imxrt1050-evk: temporary disable DCACHE
mxsfb needs a dcache function not implemented in cortex-M7, so for the
moment let's keep dcache not enabled.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
7839c71fcc configs: imxrt1050-evk: enable video support/console
Enable DM_VIDEO subsystem and its BACKLIGHT_GPIO. Then enable
SYS_WHITE_ON_BLACK to have classic black background on display. Need
also to enable CONFIG_SYS_CONSOLE_ENV_OVERWRITE to retrieve
stdin/stdout/stderr from CONFIG_EXTRA_ENV_SETTINGS.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
587e09800c arch: arm: dts: imxrt1050-evk: add lcdif node
Add lcdif node and its pinctrl.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
22aa286ef4 ARM: dts: imxrt1050: allow this dtsi file to be compiled in Linux
Linux doesn't provide skeleton.dtsi file so let's remove its include and
provide #address-cells/size-cells = <1> that were defined in
skeleton.dtsi before.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
bb8af5fb6a ARM: dts: i.mxrt1050: add lcdif node
Add lcdif node to SoC.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
7b40b91e72 imxrt1050_evk: add 16bpp video support if video layer enabled
i.MXRT1050 provides mxsfb compatible lcd controller, so let's enable
video mxsfb driver with 16bpp depth if CONFIG_DM_VIDEO is selected since
board has 16bpp only connection.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
76f6bcd742 video: mxsfb: enable setting ENABLE negative polarity
ENABLE signal can now be flipped by writing its bitmask on vdctrl0
register.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
7c30d767b8 video: mxsfb: enable setting PIXDATA on negative edge
DOTCLK signal can now be flipped by writing its bitmask on vdctrl0
register.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
606668af96 video: mxsfb: enable setting VSYNC negative polarity
VSYNC signal can now be flipped by writing its bitmask on vdctrl0
register.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
e121e00352 video: mxsfb: enable setting HSYNC negative polarity
HSYNC signal can now be flipped according to display_flags bitmaks by
writing its bitmask on vdctrl0 register.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
abda0a5a22 video: mxsfb: refactor for using display_timings
struct display_timings provides more informations such clock and DE
polarity, so let's refactor the code to use struct display_timings
instead of struct ctfb_res_modes, so we'll become able to get clock and
DE polarity settings and set register according to them in the next patch.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
aa045701c2 video: mxsfb: add support for i.MXRT
Add support for i.MXRT by adding CONFIG_IMXRT in register structure and
adding .compatible = "fsl,imxrt-lcdif".

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
ceb4ffc74d video: mxsfb: add support for DM CLK
Allow using DM CLK instead of mxs_set_lcdclk() so we can avoid to
implement a special function to set lcd clock on i.MXRT.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
92a68368c0 sunxi: display: use common video_ctfb_mode_to_display_timing()
Since video_ctfb_mode_to_display_timing() has been implemented by moving
sunxi_ctfb_mode_to_display_timing() to video_modes.c and it's meant to be
used by other video subsystem, let's use it instead of local
sunxi_ctfb_mode_to_display_timing().

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
10374da777 videomodes: add helper function to convert from ctfb to display_timing
This function converts from "struct ctf_res_modes" to
"struct display_timing".

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Anatolij Gustschin <agust@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
ecd8497bcb clk: imx: clk-imxrt1050: add set_parent() callback
Need to add set_parent() callback to allow dts assigned-clock-parents to
work so let's add it accordingly.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2020-04-18 12:54:43 +02:00
Giulio Benetti
caac71b725 clk: imx: clk-imxrt1050: setup PLL5 for video in non-SPL
mxsfb needs PLL5 as source, so let's setup it at its default frequency
specified in RM(650Mhz).

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
d303f9c356 clk: imx: clk-imxrt1050: fix typo in clock name "video:"
"video:" must be "video", ":" is a typo.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18 12:54:43 +02:00
Giulio Benetti
8cefbe98b1 clk: imx: pllv3: add enable_bit
pllv3 PLLs have powerdown/up bits but enable bits too. Specifically
"enable bit" enable the pll output, so when dis/enabling pll by
setting/clearing power_bit we must also set/clear enable_bit.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
2020-04-18 12:54:43 +02:00
Igor Opaniuk
a5ed4fa95f colibri_imx6: enable relocation of fdt and initrd
Remove 'fdt_high' and 'initrd_high' environment variables (set to 0xFFFFFFFF)
from default environment which prevents relocation of FDT and initrd.
Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
initrd.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-17 19:00:05 +02:00
Igor Opaniuk
f8a4e0cf4a colibri-imx6ull: enable relocation of fdt and initrd
Remove 'fdt_high' and 'initrd_high' environment variables (set to 0xFFFFFFFF)
from default environment which prevents relocation of FDT and initrd.
Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
initrd.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-17 18:59:56 +02:00
Igor Opaniuk
9df7736fc2 apalis_imx6: enable relocation of fdt and initrd
Remove 'fdt_high' and 'initrd_high' environment variables (set to 0xFFFFFFFF)
from default environment which prevents relocation of FDT and initrd.
Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
initrd.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-17 18:59:41 +02:00
Igor Opaniuk
c7081c42ec colibri_imx7: enable relocation of fdt and initrd
Remove 'fdt_high' and 'initrd_high' environment variables (set to 0xFFFFFFFF)
from default environment which prevents relocation of FDT and initrd.
Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
initrd.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-17 18:59:33 +02:00
Igor Opaniuk
90ca13fb6e colibri_vf: enable relocation of fdt and initrd
Remove 'fdt_high' and 'initrd_high' environment variables (set to 0xFFFFFFFF)
from default environment which prevents relocation of FDT and initrd.
Rely on 'bootm_size' value instead to safely relocate kernel, device tree and
initrd.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-17 18:59:25 +02:00
Igor Opaniuk
2c28c4a280 verdin-imx8mm: add nfsboot wrapper to env
Add nfsboot wrapper to env to boot Linux kernel from TFTP/NFS.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-04-17 18:59:16 +02:00
Igor Opaniuk
47d430baed imx8mm_evk: adjust dram size in case bl32 is used
Adjust DRAM size in case BL32 secure payload is loaded (OP-TEE/Trusty),
so during MMU initialization U-Boot won't touch this mem area.

BL32 is loaded to the end of DRAM, bl32 payload size is read from
rom_pointer[1]. This relates to the issue described in
59efa6b52b("imx8m: Fix MMU table issue for OPTEE memory").

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-04-17 18:59:07 +02:00
Igor Opaniuk
f8ae0bc7c2 verdin-imx8mm: adjust dram size in case bl32 is used
Adjust DRAM size in case BL32 secure payload is loaded (OP-TEE/Trusty),
so during MMU initialization U-Boot won't touch this mem area.

BL32 is loaded to the end of DRAM, bl32 payload size is read from
rom_pointer[1]. This relates to the issue described in
59efa6b52b("imx8m: Fix MMU table issue for OPTEE memory").

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-04-17 18:58:58 +02:00
Fabio Estevam
168fff26a8 imx8qxp_mek: Start with USDHC2 unpowered
After triggering a "reboot" command in Linux the following
hang in SPL is observed:

U-Boot SPL 2020.04 (Apr 15 2020 - 10:49:29 -0300)
Normal Boot
WDT:   Not found!
Trying to boot from MMC2_2
spl: mmc init failed with error: -70
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###

This error happens because the CMD_ERR bit is set in the IRQ status
register after booting from Linux.

To ensure a fresh start, force the VMMC supply to get unpowered first.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-04-17 18:58:48 +02:00
Michael Krummsdorf
8f660ba7bb board: tqc: tqma6_mba6: switch to device model
Ethernet, usdhc2 and i2c1 interfaces are probed by dm drivers.
Therefor init functions in board file are not necessary.

Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
2020-04-17 18:58:39 +02:00
Michael Krummsdorf
b7c1447910 board: tqc: tqma6: hw init code disabled for device model
Keep code for non-dm configuration of baseboard WRU4.
It cannot be upgraded to device model as
we have no suitable device tree for it.
These changes were not run-tested on WRU4,
only compile-tested.

Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
2020-04-17 18:58:30 +02:00
Michael Krummsdorf
e7ae6b5e04 configs: tqma6x_mba6x: update default configs for device model
Fixes compilation for WRU4 board.

Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
2020-04-17 18:58:20 +02:00
Michael Krummsdorf
45fde2ac7a board: tqc: tqma6: mba6: apply default Kconfig for device model
Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
2020-04-17 18:58:11 +02:00
Michael Krummsdorf
41231dac21 arch: arm: tqma6: apply default Kconfig for device model
Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
2020-04-17 18:58:03 +02:00
Michael Krummsdorf
acdbe52674 arm: dt: imx6qdl: add tqma6[qdl] som on mba6 mainboard
The device trees for TQMa6x SOM support variations in
- CPU type: imx6dl- or imx6q-
- MBa6 I2C bus access: -mba6a (i2c1) or -mba6b (i2c3)
  (plus the respective common/module include trees)

- USBH1 is directly connected to a hub
- USBOTG is connected to a separate connector
  and can act as host/device or full OTG port.

Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
2020-04-17 18:57:55 +02:00
Markus Niebel
ac1f2b4987 tqma6: resurrect support by supplying correct SYS_TEXT_BASE
reason: SYS_TEXT_BASE was moved to Kconfig. Give reasonable defaults
in board specific Kconfig.

Signed-off-by: Markus Niebel <Markus.Niebel@tq-group.com>
Signed-off-by: Michael Krummsdorf <michael.krummsdorf@ew.tq-group.com>
2020-04-17 18:57:47 +02:00
Bernhard Messerklinger
7794d889d3 arm: imx6: configure NoC on i.MX6DQP
The i.MX6DP and i.MX6QP incorporate NoC interconnect logic
which needs to be configured in order to use external DDR memory.

This patch enables the SPL to configure the necessary registers
in accordance with the NXP engineering bulletin EB828.

Co-developed-by: Filip Brozović <fbrozovic@gmail.com>

Signed-off-by: Bernhard Messerklinger <bernhard.messerklinger@br-automation.com>
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2020-04-17 18:56:19 +02:00
Fabio Estevam
a0448e5c03 mx6ulz_14x14_evk: Disable CONFIG_NET
Currently the following build warning is seen:

===================== WARNING ======================
This board does not use CONFIG_DM_ETH (Driver Model
for Ethernet drivers). Please update the board to use
CONFIG_DM_ETH before the v2020.07 release. Failure to
update by the deadline may result in board removal.
See doc/driver-model/migration.rst for more info.
===================================================

Since the mx6ulz-evk board does not have networking support, explicitly
disable networking to avoid the board removal.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
2020-04-17 18:56:06 +02:00
Fabio Estevam
03279b7d1f mx6ullevk: Enable Ethernet support
Add Ethernet support using DM_ETH.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-04-17 18:55:55 +02:00
Fabio Estevam
b0b525a942 mx6ul_evk: Remove FEC related board code
mx6ul_evk uses DM_ETH, so there is no need to have board code
to setup the FEC IOMUX and to register the network ports via the
old board_eth_init() method.

Remove these FEC related pieces of code.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-04-17 18:55:44 +02:00
Fabio Estevam
ba83ed5922 mx6ul_evk: Move CONFIG_FEC_MXC to defconfig
CONFIG_FEC_MXC is supported in Kconfig, so it is preferred to
move it to defconfig file.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-04-17 18:55:09 +02:00
Fabio Estevam
cbc81b735e mx7ulp: Only enable LDO if it is not already enabled
LDO mode may be already enabled by the ROM and enabling it again
can cause U-Boot to hang.

Avoid this problem by only enabling LDO mode if it is initially disabled.

Reported-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-04-17 18:54:14 +02:00
Fabio Estevam
2cfdb3bca7 mx7ulp: Remove duplicated definitions
These PMC0 definitions are already defined in the beginning
of the file, so remove the duplication.

Reported-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-04-17 18:54:04 +02:00
Heinrich Schuchardt
f4a1426fd6 ata: sort ATA commands
Sort the ATA commands in include/libata.h by number.
Add a few more comments.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-17 12:32:36 -04:00
Heinrich Schuchardt
22961dc441 include/ata.h: remove invalid links
Remove invalid URLs for "Information Technology - AT Attachment-3 Interface
(ATA-3)", point to ANSI X3.298-1997.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-17 12:32:36 -04:00
Heinrich Schuchardt
0563700672 Kconfig: fix typos in CMD_BEDBUG description
Fix documentation bug reported by 'make refcheckdocs'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-17 12:32:36 -04:00
Heinrich Schuchardt
2799a69ee8 doc: fix references to driver-model
Fix some errors pointed out by 'make refcheckdocs'.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-17 12:32:36 -04:00
Heinrich Schuchardt
ecb3a0a154 README: replace reference to boards.cfg
boards.cfg is not delivered with the U-Boot source. So it is preferable to
look at configs/*_defconfig to identify available deconfigs.

Fix a typo.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-17 12:32:36 -04:00
Atish Patra
414c34ed55 image: Add compressed Image parsing support in booti.
Add compressed Image parsing support so that booti can parse both
flat and compressed Image to boot Linux. Currently, it is difficult
to calculate a safe address for every board where the compressed
image can be decompressed. It is also not possible to figure out the
size of the compressed file as well. Thus, user need to set two
additional environment variables kernel_comp_addr_r and filesize to
make this work.

Following compression methods are supported for now.
lzma, lzo, bzip2, gzip.

lz4 support is not added as ARM64 kernel generates a lz4 compressed
image with legacy header which U-Boot doesn't know how to parse and
decompress.

Tested on HiFive Unleashed and Qemu for RISC-V.
Tested on Qemu for ARM64.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
[trini: Fix minor rST formatting problems]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-17 12:32:36 -04:00
Atish Patra
155d6a3575 image: Add a common compression type detection function.
Currently, there is no method that can detect compression types
given a file. This is very useful where a compressed kernel image
is loaded directly to the memory.

Inspect initial few bytes to figure out compression type of the
image. It will be used in booti method for now but can be reused
any other function in future as well.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-17 12:32:36 -04:00
Atish Patra
2a2119e10c lib: kconfig: Add option to set BZIP2 compression method
There is no way to select BZIP2 compression method.
Add it under library/compression config where all other
compression related configs are present.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-17 12:32:36 -04:00
Stefan Roese
8e434cb705 cmd: mem: Add bitflip memory test to alternate mtest
This additional bitflip memory test is inspired by the bitflip test
in memtester v4.3.0. It show some errors on some problematic GARDENA
MT7688 based boards. The other memory tests usually don't show any
errors here.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-04-17 12:32:36 -04:00
Stefan Roese
f14bfa7ec6 cmd: mem: Use IS_ENABLED instead of alt_test variable
This patch uses the IS_ENABLED() macro to check, which mtest variant
is enabled.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-04-17 12:32:36 -04:00
Stefan Roese
54de244c47 cmd: mem: Drop eldk-4.2 workaround and use cast in unmap_sysmem()
Use a cast instead of the "eldk-4.2" workaround for unmap_sysmem().

Signed-off-by: Stefan Roese <sr@denx.de>
2020-04-17 12:32:36 -04:00
Stefan Roese
a8c708ea9f cmd: mem: Correctly count the errors in mtest
This patch changes mtest to correctly count the overall errors and
print them even in the abort (Ctrl-C) case.

Signed-off-by: Stefan Roese <sr@denx.de>
2020-04-17 12:32:36 -04:00
Patrick Delaunay
71126d53df tee: optee: use dev_info in print_os_revision
Display TEE version at information level; this patch replaces
debug() call to dev_info() in print_os_revision() function.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
2020-04-17 12:32:36 -04:00
Patrick Delaunay
42551f49b3 doc: spl: update reference to driver-model/README.txt
Update the reference in doc/README.SPL to a no more existing file:
"driver-model/README.txt", it is changed to "doc/driver-model/design.rst".

Adding the directory path /doc/ allows to check this reference with
'make refcheckdocs'.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-17 12:32:36 -04:00
Heinrich Schuchardt
5fa8811fc2 scripts: add documentation-file-ref-check
'make refcheckdocs' requires scripts/documentation-file-ref-check.
Adopt script from Linux v5.6-rc3.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-17 12:32:36 -04:00
Thomas Hebb
ab5a2b0f79 mkimage: fit: don't create image with 0700 permissions
commit 7298e42250 ("mkimage: fit: add support to encrypt image with
aes") added a new copyfile() function as part of the FIT image creation
flow. This function as currently written creates the final image with a
mode of 0700 (before umask), differing from the old behavior of 0666.
Since there doesn't seem to be any reason to make the image executable
or non-group, non-other readable, change the mask to 0666 to preserve
the old behavior.

Fixes: 7298e42250 ("mkimage: fit: add support to encrypt image with aes")
Signed-off-by: Thomas Hebb <tommyhebb@gmail.com>
2020-04-17 12:32:36 -04:00
Heinrich Schuchardt
04571bec56 ide: remove duplicate defines form include/ata.h
ATA commands are already defined in include/libata.h. There is no need to
duplicate them in include/ata.h.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-17 12:32:36 -04:00
Heinrich Schuchardt
e6e9a4f0a9 block: ide: use definitions from include/libata.h
Currently ATA commands are defined both in include/libata.h and
include/ata.h. Use the command definitions from include/libata.h where
applicable.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-17 12:32:36 -04:00
Heinrich Schuchardt
fd0e30b43b cmd: fat: remove unused includes
Remove unused includes from cmd/fat.c.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-17 12:32:36 -04:00
Sam Shih
25a1b5efb3 arm: dts: add pwm support for MediaTek SoCs
This patch add pwm support for mt7622, mt7623 and mt7629 SoCs

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2020-04-17 12:32:36 -04:00
Sam Shih
a537fa4da1 mediatek: pwm: add pwm driver for MediaTek SoCs
This driver support the standard PWM API for
MediaTek MT7623, MT7622 and MT7629 SoCs

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2020-04-17 12:32:36 -04:00
Yusuke Ashiduka
a17322329b cmd: Add unlz4 command
This command is a new command called "unlz4" that decompresses from memory
into memory.
Used with the CONFIG_CMD_UNLZ4 optionenabled.

Signed-off-by: Yusuke Ashiduka <ashiduka@fujitsu.com>
[trini: Use %zd / %zX not %ld / %lX in printf]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-17 12:32:12 -04:00
Rasmus Villemoes
46d9d1c306 env: make file-scope env_ptr variables static
The combination ENV_IS_IN_NVRAM=y, ENV_IS_IN_REMOTE=y fails to build:

env/remote.o:/mnt/ext4/devel/u-boot/env/remote.c:17: multiple definition of `env_ptr'
env/nvram.o:/mnt/ext4/devel/u-boot/env/nvram.c:41: first defined here

It's not necessarily a meaningful combination, but for build-testing
it's nice to be able to enable most ENV_IS_IN_* at the same time, and
since these env_ptr are not declared anywhere, they really have no
reason to have external linkage.

nand.c and flash.c similarly already define file-scope static env_ptr
variables.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
2020-04-17 12:29:43 -04:00
Patrice Chotard
8ce1f10cf2 ARM: bootm: take into account gd->ram_top
If gd->ram_top has been tuned using board_get_usable_ram_top(),
it must be taken into account when reserving arch lmb.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-17 12:29:43 -04:00
Tom Rini
8d5d3bcf3c Merge branch '2020-04-16-master-imports'
- DM GPIO improvements
- BTRFS fixes
- Corrections around gd->new_bootstage alignment
- Start documentation improvements to support 'make refcheckdocs'
2020-04-17 11:17:29 -04:00
Biwen Li
5706b9b56e configs: ls1012afrwy: fix board name
Fix board name for ls1012afrwy

Signed-off-by: Biwen Li <biwen.li@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-17 15:13:19 +05:30
Francois Gervais
402ef4d244 net: fm: fix build error when not using nand
If CONFIG_CMD_NAND is disabled, get_nand_dev_by_index() is not
accessible.

This fix allows the build to succeed in this case.

Signed-off-by: Francois Gervais <fgervais@distech-controls.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-04-17 15:13:19 +05:30
Patrick Delaunay
65c141ebbd board_f.c: Ensure 16 alignment of start_addr_sp and reserved memory
Add a function reserve_stack_aligned() to reserved memory with 16 bits
alignment after the stack pointer (gd->start_addr_sp) and use this new
function in board_f.c to reserve all the memory area (malloc, board, gd,
fdt, bootstage, stacks).

This 16 byte alignment is needed for cast on struct pointer
for the reserved memory, for example:
+ x86_64 ABI: https://reviews.llvm.org/D30049: 16 bytes
+ ARMv8 Instruction Set Overview: quad word, 16 bytes

An other alignment value could be needed for other architecture.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
6de299230f arm: set the relocated gd with gd->new_gd
Simplify the arm relocation behavior and get gd directly form new_gd,
as it is already done in crt0_64.S:

	ldr	x18, [x18, #GD_NEW_GD]		/* x18 <- gd->new_gd */

This patch avoid assumption on new GD location (new GD is below bd -
with #GD_SIZE offset).

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
15ac0c7500 Revert "stm32mp1: remove the imply BOOTSTAGE"
This reverts the workaround introduced by the
commit 16fec9b0bc ("stm32mp1: remove the imply BOOTSTAGE")
As the bootstage alignment issue is now solved.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16 23:06:54 -04:00
Patrice Chotard
a6651086a7 board_f.c: Ensure gd->new_bootstage alignment
In reserve_bootstage(), in case size is odd, gd->new_bootstage
is not aligned. In bootstage_relocate(), the platform hangs when
getting access to data->record[i].name.
To avoid this issue, make gd->new_bootstage 16 byte aligned.

To ensure that new_bootstage is 16 byte aligned (at least needed for
x86_64 and ARMv8) and new_bootstage starts down to get enough space,
ALIGN_DOWN macro is used.

Fixes: ac9cd4805c ("bootstage: Correct relocation algorithm")

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas MANOCHA <vikas.manocha@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
9d82cbd39a arm: imx: update reference to README.mxc_hab
Update reference in files detected by
scripts/documentation-file-ref-check

doc/README.mxc_hab  => doc/imx/habv4/*

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
3256afb55e doc: device-tree-bindings: update reference to binding directory
Update reference in files detected by
scripts/documentation-file-ref-check

doc/devicetree/device-tree-bindings/  => doc/device-tree-bindings/

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
add83917cf doc: update reference to README.board
Update reference in files detected by
scripts/documentation-file-ref-check

doc/README.<board>  => board/<board>/README

Files moved in board directory in
commit 702e6014f1 ("doc: cleanup - move board
READMEs into respective board directories")'

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
a0cd1e1965 doc: update reference to README.imx8image
Update reference in many files detected by
scripts/documentation-file-ref-check

README.imx8image  => imx/mkimage/imx8image.txt

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
b09e28fc54 doc: update reference to README.imximage
Update reference in many files detected by
scripts/documentation-file-ref-check

README.imximage => imx/mkimage/imximage.txt

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
480e4115f7 Kconfig: update reference to README.x86
Update reference in Kconfig detected by
scripts/documentation-file-ref-check

README.x86 => doc/arch/x86.rst

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
24bcaec793 README: update reference to *.README
Update some reference in README file detected by
scripts/documentation-file-ref-check

*.README => README.*

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
e5301bac5d test: pinmux: add pincontrol-gpio for pin configuration
Add a simple pincontrol associated to the sandbox gpio driver,
that allows to check pin configuration with the command pinmux.

The pinmux test is also updated to test behavior with 2 pincontrols.

Example to check LED pin configuration:

=> pinmux list
| Device                        | Driver                        | Parent
| pinctrl-gpio                  | sandbox_pinctrl_gpio          | root_driver
| pinctrl                       | sandbox_pinctrl               | root_driver

=> pinmux dev pinctrl-gpio

=> pinmux status

a0        : gpio input .
a1        : gpio input .
a2        : gpio input .
a3        : gpio input .
a4        : gpio input .
a5        : gpio output .
a6        : gpio output .
...

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
ff52665d03 test: dm: update test for pins configuration in gpio
Add tests for new API set_dir_flags and set_dir_flags and associated
code in gpio uclass.

Test support for new flags GPIO_OPEN_DRAIN, GPIO_OPEN_SOURCE
GPIO_PULL_UP and GPIO_PULL_DOWN.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
2c0f782e0f gpio: sandbox: cleanup binding support
Cleanup binding support, use the generic binding by default
(test u-class gpio_xlate_offs_flags function) and add
specific binding for added value.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
d15c05b5d0 test: dm: update test for pins configuration in pinctrl node
Add test for "pins" configuration in gpio uclass with set_state() ops
and test for generic parsing of pinconf_param array).

set_state() is called by:
- pinctrl_generic_set_state
 |- pinctrl_generic_set_state_subnode

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
77ed5692c9 pinctrl: sandbox: Add mux information in get_pin_muxing
Add param information in pin information output.
This update prepare unitary test for pin configuration
in pinctrl node.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
6a0388c5b1 dt-bindings: gpio: alignment with kernel v5.3
Update the binding file for gpio, it is just an alignment
with kernel v5.3.
The U-Boot code example for gpio-hog (not directly linked
to binding) is moved in a new file doc/README.gpio.
[commit 21676b706e99 ("gpio: fixes for gpio-hog support")
& 'commit 4762a9988ede ("gpio: add gpio-hog support")']

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
8fd9daf036 gpio: add ops to set dir flags
Add the ops for GPIO driver set_dir_flags() to set the dir flags.
The user can update the direction and configuration
of each GPIO with a only call to dm_gpio_set_dir_flags() or
dm_gpio_set_dir() and respecting the configuration provided by
device tree (saved in desc->flags).

When these optional ops are absent, the gpio uclass use the mandatory
ops (direction_output, direction_input, get_value) and desc->flags
to manage only the main dir flags:
- GPIOD_IS_IN
- GPIOD_IS_OUT
- GPIOD_IS_OUT_ACTIVE
- GPIOD_ACTIVE_LOW

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
d2c07e56ab gpio: add ops to get dir flags
Add the ops for GPIO driver get_dir_flags(), allows to get dynamically
the current gpio configuration; it is used by the API function
dm_gpio_get_dir_flags().

When these optional ops are absent, the gpio uclass continues to use
the mandatory ops (direction_output, direction_input, get_value) and
value of desc->flags to manage only the main dir flags:
- GPIOD_IS_IN
- GPIOD_IS_OUT
- GPIOD_IS_OUT_ACTIVE
- GPIOD_ACTIVE_LOW

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
477ca57b9a gpio: add support of new GPIO direction flag
This commit manages the new dir flags that can be used in gpio
specifiers to indicate the pull-up or pull-down resistor
configuration for output gpio (GPIO_PULL_UP, GPIO_PULL_DOWN)
or the Open Drain/Open Source configuration for input gpio
(GPIO_OPEN_DRAIN, GPIO_OPEN_SOURCE).

These flags are already supported in Linux kernel in gpio lib.

This patch only parse and save the direction flags in GPIO
descriptor (desc->flags), it prepares the introduction of new ops
to manage them.
The GPIO uclass supports new GPIO flags from device-tree
(GPIO_XXX define in include/dt-bindings/gpio/gpio.h)
and translate them in the dir flags (GPIOD_XXX):
- GPIO_PULL_UP     => GPIOD_PULL_UP
- GPIO_PULL_DOWN   => GPIOD_PULL_DOWN
- GPIO_OPEN_DRAIN  => GPIOD_OPEN_DRAIN
- GPIO_OPEN_SOURCE => GPIOD_OPEN_SOURCE

This patch also adds protection in the check_dir_flags function for
new invalid configuration of the dir flags.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
695e5fd546 gpio: update dir_flags management
Update the flag management in GPIO uclass: the desc->flags is always
combined with the requested flags and the GPIO descriptor is updated
for further call.

Add a function dm_gpio_get_dir_flags to get dynamically
the current dir_flags (configuration and value).

This patch prepare introduction of the dir flags support with new ops.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
9360bb06f1 gpio: add helper GPIOD_FLAGS_OUTPUT
Add a macro to provide the GPIO output value according
the dir flags content.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
4292fb16bf gpio: add function check_dir_flags
Add a dir flags validity check with a new function
check_dir_flags.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
788ea83412 gpio: add function _dm_gpio_set_dir_flags
Introduce the function _dm_gpio_set_dir_flags to set dir flags
without check if the GPIO is reserved.

Separate the reserved check for "set_dir" and "set_dir_flags".

This patch is a preliminary step to add new ops.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
8a9140cd38 gpio: add function _gpio_get_value
Introduce the function _gpio_get_value to get the GPIO value
without check if it is reserved.
This patch prepare new ops introduction.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
9f2b066cda gpio: add gpio descriptor initialization helper
Add a helper function gpio_desc_init() to initialize the gpio descriptor;
with this function the flags will be always set to 0.

It wasn't the case before this patch in dm_gpio_lookup_name.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
e3f3a121d8 gpio: remove the open_drain API and ops
This patch removes the ops get_open_drain/set_open_drain
and the API dm_gpio_get_open_drain/dm_gpio_set_open_drain.

The ops only provided in one driver (mpc8xxx gpio) and the
associated API is never called in boards.

This patch prepare a more generic set/get_dir_flags ops,
including the open drain property.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
277a0ad8f5 gpio: remove GPIOD_REQUESTED
Remove the define GPIOD_REQUESTED as it is never used
and use BIT() macro for other defines.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
1bb257a9b3 dt-bindings: gpio: document the new pull-up/pull-down flags
This commit extends the flags that can be used in GPIO specifiers to
indicate if a pull-up resistor or pull-down resistor should be
enabled.

It is the backport of linux commit ede033e1e863c ('dt-bindings:
gpio: document the new pull-up/pull-down flags')
from Thomas Petazzoni <thomas.petazzoni@bootlin.com>
and integrated in v5.1-rc1
https://github.com/torvalds/linux/commit/ede033e1e863c

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
e93f39213a dm: pinctrl: migrate pinctrl-generic to livetree
Migrate pinctrl-generic to livetree:
- dev_for_each_property
- dev_read_prop_by_prop
- dev_read_string_count
- dev_read_string_index
and get rid of DECLARE_GLOBAL_DATA_PTR.

This patch solves the parsing issue during sandbox tests for pin
configuration (OF_LIVE is activated in sandbox_defconfig
and sub node are not correctly parsed in
pinctrl_generic_set_state_subnode with fdt lib API).

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
ce891fcada dm: core: add ofnode and dev function to iterate on node property
Add functions to iterate on all property with livetree
- dev_read_first_prop
- dev_read_next_prop
- dev_read_prop_by_prop
and
- ofnode_get_first_property
- ofnode_get_next_property
- ofnode_get_property_by_prop

And helper: dev_for_each_property

For example:
struct ofprop property;

dev_for_each_property(property, config) {
	value = dev_read_prop_by_prop(&property, &propname, &len);

or:

for (res = ofnode_get_first_property(node, &property);
     !res;
     res = ofnode_get_next_property(&property))
{
     value = ofnode_get_property_by_prop(&property, &propname, &len);
....
}

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 23:06:54 -04:00
Patrick Delaunay
719cab6d2e dm: pinctrl: convert pinctrl-single to livetree
Convert 'pinctrl-single' using livetree functions
- dev_read_prop
- dev_read_u32_default
- dev_read_u32_array
- dev_read_bool
- dev_read_addr
and get rid of DECLARE_GLOBAL_DATA_PTR.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-16 23:06:54 -04:00
Karl Palsson
f5bd0fb386 README: remove requirement for CHANGELOG entry
As indicated elsewhere in the README, the standalone CHANGELOG file was
removed in 2010.  Drop the instructions for creating patches on creating
a standalone CHANGELOG entry.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
2020-04-16 23:06:54 -04:00
Qu Wenruo
b941d1cd16 fs: btrfs: Fix LZO false decompression error caused by pending zero
For certain btrfs files with compressed file extent, uboot will fail to
load it:

  btrfs_read_extent_reg: disk_bytenr=14229504 disk_len=73728 offset=0 nr_bytes=131
  072
  decompress_lzo: tot_len=70770
  decompress_lzo: in_len=1389
  decompress_lzo: in_len=2400
  decompress_lzo: in_len=3002
  decompress_lzo: in_len=1379
  decompress_lzo: in_len=88539136
  decompress_lzo: header error, in_len=88539136 clen=65534 tot_len=62580

NOTE: except the last line, all other lines are debug output.

Btrfs lzo compression uses its own format to record compressed size
(segment header, LE32).

However to make decompression easier, we never put such segment header
across page boundary.

In above case, the xxd dump of the lzo compressed data looks like this:

00001fe0: 4cdc 02fc 0bfd 02c0 dc02 0d13 0100 0001  L...............
00001ff0: 0000 0008 0300 0000 0000 0011 0000|0000  ................
00002000: 4705 0000 0001 cc02 0000 0000 0000 1e01  G...............

'|' is the "expected" segment header start position.

But in that page, there are only 2 bytes left, can't contain the 4 bytes
segment header.

So btrfs compression will skip that 2 bytes, put the segment header in
next page directly.

Uboot doesn't have such check, and read the header with 2 bytes offset,
result 0x05470000 (88539136), other than the expected result
0x00000547 (1351), resulting above error.

Follow the btrfs-progs restore implementation, by introducing tot_in to
record total processed bytes (including headers), and do proper page
boundary skip to fix it.

Please note that, current code base doesn't parse fs_info thus we can't
grab sector size easily, so it uses PAGE_SIZE, and relying on fs open
time check to exclude unsupported sector size.

Signed-off-by: Qu Wenruo <wqu@suse.com>
Cc: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2020-04-16 22:13:50 -04:00
Qu Wenruo
a62db24526 fs: btrfs: Reject fs with sector size other than PAGE_SIZE
Although in theory u-boot fs driver could easily support more sector
sizes, current code base doesn't have good enough way to grab sector
size yet.

This would cause problem for later LZO fixes which rely on sector size.

And considering that most u-boot boards are using 4K page size, which is
also the most common sector size for btrfs, rejecting fs with
non-page-sized sector size shouldn't cause much problem.

This should only be a quick fix before we implement better sector size
support.

Signed-off-by: Qu Wenruo <wqu@suse.com>
Cc: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2020-04-16 22:13:50 -04:00
Qu Wenruo
25babb7c1b fs: btrfs: Use LZO_LEN to replace immediate number
Just a cleanup. These immediate numbers make my eyes hurt.

Signed-off-by: Qu Wenruo <wqu@suse.com>
Cc: Marek Behun <marek.behun@nic.cz>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
2020-04-16 22:13:50 -04:00
Tom Rini
0f238dab6d Merge tag 'arc-fixes-for-2020.07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-arc
This is pretty minor set of changes mostly touching HSDK board:

 * Enable on-chip reset controller on HSDK
 * Add possibility to turn-on & off L2$ on more
   recent ARC HS processors.
 * AXI tunnel clock calculation on HSDK
2020-04-16 17:14:44 -04:00
Tom Rini
cf87f7cd8c Merge tag 'efi-2020-07-rc1' of https://gitlab.denx.de/u-boot/custodians/u-boot-efi
Pull request for UEFI sub-system for efi-2020-07-rc1

This pull request

* provides an implementation of UEFI secure booting
* fixes a problem with the rsa_mod_exp driver which stops some boards
  from booting when CONFIG_RSA is enabled which is needed for UEFI
  secure booting
* enables the EFI_RNG_PROTOCOL if DM_RNG is enabled
* fixes some function comments
2020-04-16 16:41:40 -04:00
Eugeniy Paltsev
7b50db8242 ARC: HSDK: CGU: fix tunnel clock calculation
We set wrong tunnel PLL frequency when we request 125MHz tunnel clock.
Fix that.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-16 23:37:10 +03:00
Eugeniy Paltsev
a6a0b0244b ARC: HSDK: Enable on-chip reset controller
As the driver of on-chip reset controller became available
we are ready to enable it.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-16 23:36:36 +03:00
Eugeniy Paltsev
04286d073e ARC: CACHE: mark IOC helper functions as inlined_cachefunc
Force inlining of IOC related functions used in other cache
functions. This is preventive change.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-16 23:36:36 +03:00
Eugeniy Paltsev
b15cb0bfe8 ARC: CACHE: add support for SL$ disable
Since version 3.0 ARC HS supports SL$ (L2 system level cache)
disable. So add support for SL$ disable/enable to code.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2020-04-16 23:36:36 +03:00
Tom Rini
f51b4bcf61 Merge tag 'dm-pull-10apr20-take2' of git://git.denx.de/u-boot-dm
Functions for reading indexed values from device tree
Enhancements to 'dm' command
Log test enhancements and syslog driver
DM change to read parent ofdata before children
Minor fixes
2020-04-16 13:45:03 -04:00
Neil Armstrong
c8ccca921a arm64: dts: meson-gx: add back dmc register range until canvas driver is available
The Linux VPU bindings have changed and dropped the dmc register range.

Add it back in the meson-gx-u-boot.dtsi file until a proper canvas driver
is available.

Fixes: dd5f2351e9 ("arm64: dts: meson: sync dt and bindings from v5.6-rc2")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-16 16:25:51 +02:00
Simon Glass
b0dcc87106 dm: core: Read parent ofdata before children
At present a device can read its ofdata before its parent has done the
same. This can cause problems in the case where the parent has a 'ranges'
property, thus affecting the operation of dev_read_addr(), for example.

We already probe parent devices before children so it does not seem to be
a large step to do the same with ofdata.

Make the change and update the documentation in this area.

Signed-off-by: Simon Glass <sjg@chromium.org>
Tested-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-16 08:07:58 -06:00
Laurentiu Tudor
528d6b37ae test: fdtdec: test fdtdec_set_carveout()
Add a new test for fdtdec_set_carveout().

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Drop blank line at EFO:
Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Laurentiu Tudor
b9200b191f fdtdec: support multiple phandles in memory carveout
fdtdec_set_carveout() is limited to only one phandle. Fix this
limitation by adding support for multiple phandles.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Patrick Delaunay
5c9c9bc957 dm: core: remove the duplicated function dm_ofnode_pre_reloc
The content dm_ofnode_pre_reloc() is identical with ofnode_pre_reloc()
defined in drivers/core/ofnode.c and used only three times:
- drivers/core/lists.c:lists_bind_fdt()
- drivers/clk/at91/pmc.c::at91_clk_sub_device_bind
- drivers/clk/altera/clk-arria10.c::socfpga_a10_clk_bind

So this function dm_ofnode_pre_reloc can be removed and replaced
by these function calls by ofnode_pre_reloc().

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Dario Binacchi
59006608d6 dm: core: refactor functions reading an u32 from dt
Now reading a 32 bit value from a device-tree property can be expressed
as reading the first element of an array with a single value.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Dario Binacchi
4bb7075c83 dm: core: support reading a single indexed u32 value
The patch adds helper functions to allow reading a single indexed u32
value from a device-tree property containing multiple u32 values, that
is an array of integers.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Dario Binacchi
70573c6c46 dm: test: add test case for dev_read_u64 function
Add test case to cover dev_read_u64 and dev_read_u64_default functions.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Simon Glass
ced1080489 dm: core: Add a way to skip powering down power domains
When removing a device the power domains it uses are generally powered
off. But when we are trying to unbind all devices (e.g. for running tests)
we don't want to probe a device in the 'remove' path.

Add a new flag to skip this power-down step.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Simon Glass
8474da946f dm: core: Add logging on unbind failure
This failure path is tricky to debug since it continues after failure and
there are a lot of error paths. Add logging to help.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Tom Warren
0688b758a2 fdt: Fix 'system' command
'fdt systemsetup' wasn't working, due to the fact that the 'set' command
was being parsed in do_fdt() by only testing for the leading 's' instead
of "se", which kept the "sys" test further down from executing. Changed
to test for "se" instead, now 'fdt systemsetup' works (to test the
ft_system_setup proc w/o having to boot a kernel).

Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-04-16 08:07:58 -06:00
Heinrich Schuchardt
48e4288aed sandbox: enable CMD_BOOTEFI_HELLO and CMD_EFIDEBUG
'bootefi hello' is used in one of the Python tests.

efidebug can be used to verify the correct initialization of the UEFI
sub-system.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>
2020-04-16 08:07:58 -06:00
Heinrich Schuchardt
1c0bc80ae1 sandbox: implement ft_board_setup()
Currently we are not able to test reservations created by ft_board_setup().

Implement ft_board_setup() to create an arbitrary reservation and enable
OF_BOARD_SETUP.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>
2020-04-16 08:07:58 -06:00
Heinrich Schuchardt
1ecea74e2e sandbox: add reserved-memory node in device tree
For testing the handling of memory reservations create a reserved-memory
node in sandbox.dts and sandbox64.dts.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromum.org>
2020-04-16 08:07:58 -06:00
Simon Glass
cf0ef9317c patman: Apply the cc limit to the cover letter also
Quite often on a series that has clean-up patches, the individual patches
may fit within the cc limit but the cover letter does not. Apply the same
limit to the cover letter.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Chris Packham <judge.packham@gmail.com>
2020-04-16 08:07:58 -06:00
Heinrich Schuchardt
da2fa6d86a doc: driver-model: there is no UCLASS_ETHERNET
%s/UCLASS_ETHERNET/UCLASS_ETH/g

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Heinrich Schuchardt
292defdd2b configs: sandbox: enable LOG_SYSLOG
For testing purposes enable the syslog logging driver.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Heinrich Schuchardt
7b912edcf6 test: log: test syslog logging driver
Provide unit tests for the syslog logging driver.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Heinrich Schuchardt
395041b2fd test: log functions with CONFIG_LOG=n
If CONFIG_LOG=n, we still expect output for log_err(), log_warning(),
log_notice(), log_info() and in case of DEBUG=1 also for log_debug().

Provide unit tests verifying this.

The tests depend on:

	CONFIG_CONSOLE_RECORD=y
	CONFIG_LOG=n
	CONFIG_UT_LOG=y

It may be necessary to increase the value of CONFIG_SYS_MALLOC_F_LEN to
accommodate CONFIG_CONSOLE_RECORD=y.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Heinrich Schuchardt
20fd256deb log: output for CONFIG_LOG=n
If CONFIG_LOG=n, we should still output errors, warnings, notices, infos,
and for DEBUG=1 also debug messages.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Heinrich Schuchardt
befadde0a2 log: syslog driver
Provide a log driver that broadcasts RFC 3164 messages to syslog servers.
rsyslog is one implementation of such a server.

The messages are sent to the local broadcast address 255.255.255.255 on
port 514.

The environment variable log_hostname can be used to provide the HOSTNAME
field for the messages. The optional TIMESTAMP field of RFC 3164 is not
provided.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:58 -06:00
Heinrich Schuchardt
d1a02f53b3 log: correct CONFIG_LOG_TEST prerequisites
An error

	undefined reference to `do_log_test'

occurs for CONFIG_CMD_LOG=y, CONFIG_LOG_TEST=y, CONGIG_UNIT_TEST=n

Make CONFIG_UNIT_TEST a prerequisite.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:57 -06:00
Patrick Delaunay
0544ecbfe9 dm: core: Move "/chosen" and "/firmware" node scan
Use the new function dm_scan_fdt_ofnode_path() to scan all the nodes
which aren't devices themselves but may contain some:
- "/chosen"
- "/clocks"
- "/firmware"

The patch removes the strcmp call in recursive function dm_scan_fdt_live()
and also corrects a conflict with the 2 applied patches in
the commit 1712ca2192 ("dm: core: Scan /firmware node by default")
and in the commit 747558d014 ("dm: fdt: scan for devices under
/firmware too"): the subnodes of "/firmware" (optee for example)
are bound 2 times.

For example the dm tree command result on STM32MP1 is:

STM32MP> dm tree
 Class     Index  Probed  Driver                Name
 -----------------------------------------------------------
 root          0  [ + ]   root_driver           root_driver
 firmware      0  [   ]   psci                  |-- psci
 sysreset      0  [   ]   psci-sysreset         |   `-- psci-sysreset
 simple_bus    0  [ + ]   generic_simple_bus    |-- soc
...
 tee           0  [ + ]   optee                 |-- optee
...
 tee           1  [   ]   optee                 `-- optee

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Tested-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:57 -06:00
Heinrich Schuchardt
67817b3b7a dm: core: remove redundant assignment
Variable count is initialized at the start of every round of the while
loop and it is not used after the while loop. So there is no need to
initialize it beforehand.

Identified by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:57 -06:00
Heinrich Schuchardt
f93a07dd4f dm: core: remove redundant if statement
The value of parent is not changed in the first if statement. So we can
merge the two if statements depending on parent.

Indicated by cppcheck.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:57 -06:00
Rasmus Villemoes
2960107a22 sandbox: also restore terminal settings when killed by SIGINT
Hitting Ctrl-C is a documented way to exit the sandbox, but it is not
actually equivalent to the reset command. The latter, since it follows
normal process exit, takes care to reset terminal settings and
restoring the O_NONBLOCK behaviour of stdin (and, in a terminal, that
is usually the same file description as stdout and stderr, i.e. some
/dev/pts/NN).

Failure to restore (remove) O_NONBLOCK from stdout/stderr can cause
very surprising and hard to debug problems back in the terminal. For
example, I had "make -j8" consistently failing without much
information about just exactly what went wrong, but sometimes I did
get a "echo: write error". I was at first afraid my disk was getting
bad, but then a simple "dmesg" _also_ failed with write error - so it
was writing to the terminal that was buggered. And both "make -j8" and
dmesg in another terminal window worked just fine.

So install a SIGINT handler so that if the chosen terminal
mode (cooked or raw-with-sigs) means Ctrl-C sends a SIGINT, we will
still call os_fd_restore(), then reraise the signal and die as usual
from SIGINT.

Before:

$ grep flags /proc/$$/fdinfo/1
flags:  0102002
$ ./u-boot
# hit Ctrl-C
$ grep flags /proc/$$/fdinfo/1
flags:  0106002

After:

$ grep flags /proc/$$/fdinfo/1
flags:  0102002
$ ./u-boot
# hit Ctrl-C
$ grep flags /proc/$$/fdinfo/1
flags:  0102002

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-16 08:07:57 -06:00
Tom Rini
42c64d1bc9 sandbox: Update PCI nodes in dts files
The way the PCI nodes are written today causes a number of warnings if
we stop disabling some of the warnings we pass to DTC.  As these
warnings aren't disabled in current Linux Kernel builds, we should aim
to not disable them here either, so rewrite these slightly.  Update the
driver model doc as well.

Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-16 08:07:57 -06:00
Simon Glass
8a770f9eb7 sandbox: p2sb: Silence compiler warning
Some compilers produce a warning about 'child' being used before init.
Silence this by setting to NULL at the start.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 08:07:57 -06:00
Sean Anderson
b41d4b83f0 serial: Set baudrate on boot
Currently, the baud rate is never set on boot. This works ok when a previous
bootloader has configured the baudrate properly, or when the baudrate is set to
a reasonable default in the serial driver's probe(). However, when this is not
the case, we could be using a different baud rate than what was configured.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-04-16 08:07:57 -06:00
Tom Rini
dba0a6ae19 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86
- Provide serial base clock speed via getinfo() for ACPI SPCR
- Initial ACPI support from DM core by leveraging existing ACPI support
  in x86
2020-04-16 08:56:37 -04:00
Neil Armstrong
ae9bf79bed ARM: dts: add missing meson-gxl-s805x-libretech-ac-u-boot.dtsi file
The libretech-ac u-boot.dtsi file is missing to enabled DT nodes changes
to enable Video output on U-Boot.

Fixes: 671b1db8f8 ("arm64: dts: meson-gx: vpu should be probed before relocation")
Reported-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Jerome Brunet <jbrunet@baylibre.com>
2020-04-16 09:29:00 +02:00
Simon Glass
1f4431e461 test: Add hexdump.h to the unit test header
Since ut_asserteq_mem() uses bin2hex() we should include this header in
ut.h to avoid errors. Add it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-04-16 14:36:28 +08:00
Simon Glass
bfeb5d460c acpi: Add support for DMAR
The DMA Remapping Reporting (DMAR) table contains information about DMA
remapping.

Add a version simple version of this table with only the minimum fields
filled out. i.e. no entries.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-04-16 14:36:28 +08:00
Simon Glass
91fe8b79f6 acpi: Add a central location for table version numbers
Each ACPI table has its own version number. Add the version numbers in a
single function so we can keep them consistent and easily see what
versions are supported.

Start a new acpi_table file in a generic directory to house this function.
We can move things over to this file from x86 as needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Simon Glass
89c2798f1f acpi: Add an __ACPI__ preprocessor symbol
The ASL compiler cannot handle C structures and the like so needs some
sort of header guard around these.

We already have an __ASSEMBLY__ #define but it seems best to create a new
one for ACPI since the rules may be different.

Add the check to a few files that ACPI always includes.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-04-16 14:36:28 +08:00
Simon Glass
776cc20194 x86: Move acpi_table header to main include/ directory
This file is potentially useful to other architectures saddled with ACPI
so move most of its contents to a common location.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-04-16 14:36:28 +08:00
Simon Glass
3cabcf966d x86: Move acpi_s3.h to include/acpi/
This header relates to ACPI and we are about to add some more ACPI
headers. Move this one into a new directory so they are together.

The header inclusion in pci_rom.c is not specific to x86 anymore, so drop
the #ifdef CONFIG_X86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Simon Glass
f50cc95288 acpi: Add a simple sandbox test
Add a sandbox test for the basic ACPI functionality we have so far.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-04-16 14:36:28 +08:00
Simon Glass
29db946cbf dts: Add a binding for hid-over-i2c
Add this binding from Linux v5.4.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Simon Glass
7ca2850cbc dm: core: Add basic ACPI support
ACPI (Advanced Configuration and Power Interface) is a standard for
specifying information about a platform. It is a little like device
tree but the bindings are part of the specification and it supports an
interpreted bytecode language.

Driver model does not use ACPI for U-Boot's configuration, but it is
convenient to have it support generation of ACPI tables for passing to
Linux, etc.

As a starting point, add an optional set of ACPI operations to each
device. Initially only a single operation is available, to obtain the
ACPI name for the device. More operations are added later.

Enable ACPI for sandbox to ensure build coverage and so that we can add
tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-04-16 14:36:28 +08:00
Simon Glass
b2c3868463 x86: apl: Add Global NVS table header
Add the C version of this header. It includes a few Chrome OS bits which
are disabled for a normal build.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolgang.wallner@br-automation.com>
2020-04-16 14:36:28 +08:00
Simon Glass
9ece4b090f pci: Adjust dm_pci_read_bar32() to return errors correctly
At present if reading a BAR returns 0xffffffff then the value is masked
and a different value is returned. This makes it harder to detect the
problem when debugging.

Update the function to avoid masking in this case.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-04-16 14:36:28 +08:00
Simon Glass
1630853085 x86: apl: Move p2sb ofdata reading to the correct method
With P2SB the initial BAR (base-address register) is set up by TPL and
this is used unchanged right through U-Boot.

At present the reading of this address is split between the ofdata() and
probe() methods. There are a few problems that are unique to the p2sb.
One is that its children need to call pcr_read32(), etc. which needs to
have the p2sb address correct. Also some of its children are pinctrl
devices and pinctrl is used when any device is probed. So p2sb really
needs to get its base address set up in ofdata_to_platdata(), before it is
probed.

Another point is that reading the p2sb BAR will not work if the p2sb is
hidden. The FSP-S seems to hide it, presumably to avoid confusing PCI
enumeration.

Reading ofdata in ofdata_to_platdata() is the correct place anyway, so
this is easy to fix.

Move the code into one place and use the early-regs property in all cases
for simplicity and to avoid needing to probe any PCI devices just to read
the BAR.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-04-16 14:36:28 +08:00
Simon Glass
2831405447 x86: Correct wording of coreboot source code
Some files are taken or modified from coreboot, but the files are
no-longer part of the coreboot project. Fix the wording in a few places.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-04-16 14:36:28 +08:00
Simon Glass
d8c7fb5036 dm: pci: Allow disabling auto-config for a device
Add a means to avoid configuring a device when needed. Add an explanation
of why this is useful to the binding file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Simon Glass
88307654af tpm: Don't cleanup unless an error happens
At present the cleanup() method is called on every transfer. It should
only be called on failing transfers. Fix this and tidy up the error
handling a little.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Simon Glass
32e8ee004a tpm: cr50: Use the correct GPIO binding
This device should use ready-gpios rather than ready-gpio. Fix it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Simon Glass
fe6831dac4 tpm: cr50: Add a comment for cr50_priv
Add a comment for the private structure

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Simon Glass
79b7ade5b5 tpm: cr50: Release locality on exit
At present the cr50 driver claims the locality and does not release it for
Linux. This causes problems. Fix this by tracking what is claimed, and
adding a 'remove' method.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Simon Glass
b14ccfcf09 spi: Add SPI mode enums
With ACPI we need to describe the settings of the SPI bus. Add enums to
handle this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-04-16 14:36:28 +08:00
Simon Glass
600f584d81 cpu: Support querying the address width
Different CPUs may support different address widths, meaning the amount of
memory they can address. Add a property for this to the cpu_info struct.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Andy Shevchenko
98036fbdaf x86: acpi: Let OS know that console already had been initialized
SPCR has no clue if the UART base clock speed is different to
the default one. However, the SPCR 1.04 defines baud rate 0 as
a preconfigured state of UART and OS is supposed not to touch
the configuration of the serial device.

Linux kernel supports that starting from v5.0, see commit
b413b1abeb21 ("ACPI: SPCR: Consider baud rate 0 as preconfigured state")
for the details.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Andy Shevchenko
5db92a0e96 serial: ns16550: Provide UART base clock speed in ->getinfo()
Some callers may need the UART base clock speed value.
Provide it in the ->getinfo() callback.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
Andy Shevchenko
bf4661bcb0 dm: serial: Add clock member to struct serial_device_info
Some callers of serial_getinfo() would like to know the UART base
clock speed in order to make decision what to pass to OS in some
cases. In particular, ACPI SPCR table expects only certain base
clock speed and thus we have to act accordingly.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-16 14:36:28 +08:00
AKASHI Takahiro
b2ace8753d efi_loader: add some description about UEFI secure boot
A small text in docs/uefi/uefi.rst was added to explain how we can
configure and utilise UEFI secure boot feature on U-Boot.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2020-04-16 08:12:47 +02:00
AKASHI Takahiro
5bf1ea63b1 travis: add packages for UEFI secure boot test
Pytest for UEFI secure boot will use several host commands.
In particular, Test setup relies on efitools, whose version must be v1.5.2
or later. So fetch a new version of deb package directly.
Please note it has a dependency on mtools, which must also be installed
along wih efitools.

In addition, the path, '/sbin', is added to PATH for use of sgdisk and
mkfs.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-16 08:12:47 +02:00
AKASHI Takahiro
68a2a84091 sandbox: add extra configurations for UEFI and related tests
Adding those extra configurations allows us to successfully run UEFI
secure boot pytest on Travis CI.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-04-16 08:12:47 +02:00
AKASHI Takahiro
7254ebed0f efi_loader, pytest: add UEFI secure boot tests (image)
Provide test cases for
 * image authentication for signed images
   (test_efi_secboot/test_signed.py)
 * image authentication for unsigned images
   (test_efi_secboot/test_unsigned.py)

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-04-16 08:12:47 +02:00
AKASHI Takahiro
a9d5666d0a efi_loader, pytest: add UEFI secure boot tests (authenticated variables)
Provide a couple of test cases for variable authentication.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-04-16 08:12:47 +02:00
AKASHI Takahiro
fe6ca4d5d2 efi_loader, pytest: set up secure boot environment
A fixture for UEFI secure boot tests (image authentication and variable
authentication) is defined. A small file system with test data in a single
partition formatted in fat is created.

This test requires efitools v1.5.2 or later. If the system's efitools
is older, you have to build it on your own and define EFITOOLS_PATH.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-04-16 08:12:47 +02:00
AKASHI Takahiro
525fc06744 cmd: efidebug: add "test bootmgr" sub-command
This sub-command will be used to test image authentication,
in particular, a case where efi_load_image() failed with
EFI_SECURITY_VIOLATION but we still want to try efi_start_image().
We won't run such a case under normal bootmgr because it simply
refuses to call efi_start_image() if anything but EFI_SUCCESS
is returned when loading an image.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-04-16 08:12:47 +02:00
AKASHI Takahiro
e50e2878b2 cmd: env: add "-at" option to "env set -e" command
With "-at" option, EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS
will be passed to SetVariable() to authenticate the variable.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-04-16 08:12:47 +02:00
AKASHI Takahiro
f757d04598 cmd: env: use appropriate guid for authenticated UEFI variable
A signature database variable is associated with a specific guid.
For convenience, if user doesn't supply any guid info, "env set|print -e"
should complement it.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-04-16 08:12:47 +02:00
AKASHI Takahiro
d0f07949cc efi_loader: set up secure boot
The following variable is exported as UEFI specification defines:
SignatureSupport: array of GUIDs representing the type of signatures
                      supported by the platform firmware

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-04-16 08:12:46 +02:00
AKASHI Takahiro
4540dabdca efi_loader: image_loader: support image authentication
With this commit, image validation can be enforced, as UEFI specification
section 32.5 describes, if CONFIG_EFI_SECURE_BOOT is enabled.

Currently we support
* authentication based on db and dbx,
  so dbx-validated image will always be rejected.
* following signature types:
    EFI_CERT_SHA256_GUID (SHA256 digest for unsigned images)
    EFI_CERT_X509_GUID (x509 certificate for signed images)
Timestamp-based certificate revocation is not supported here.

Internally, authentication data is stored in one of certificates tables
of PE image (See efi_image_parse()) and will be verified by
efi_image_authenticate() before loading a given image.

It seems that UEFI specification defines the verification process
in a bit ambiguous way. I tried to implement it as closely to as
EDK2 does.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-04-16 08:12:46 +02:00
AKASHI Takahiro
8353516f4a efi_loader: variable: add VendorKeys variable
The following variable is exported as UEFI specification defines:
VendorKeys: whether the system is configured to use only vendor-provided
	    keys or not
The value will have to be modified if a platform has its own way of
initializing signature database, in particular, PK.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-04-16 08:12:46 +02:00
AKASHI Takahiro
434ffb6422 efi_loader: variable: add secure boot state transition
UEFI specification defines several global variables which are related to
the current secure boot state. In this commit, those values will be
maintained according to operations. Currently, AuditMode and DeployedMode
are defined but not implemented.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-04-16 08:12:46 +02:00
AKASHI Takahiro
767f6eeb01 efi_loader: variable: support variable authentication
With this commit, EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS
is supported for authenticated variables and the system secure state
will transfer between setup mode and user mode as UEFI specification
section 32.3 describes.

Internally, authentication data is stored as part of authenticated
variable's value. It is nothing but a pkcs7 message (but we need some
wrapper, see efi_variable_parse_signature()) and will be validated by
efi_variable_authenticate(), hence efi_signature_verify_with_db().

Associated time value will be encoded in "{...,time=...}" along with
other UEFI variable's attributes.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-04-16 08:12:46 +02:00
AKASHI Takahiro
be6296d05b efi_loader: add signature database parser
efi_signature_parse_sigdb() is a helper function will be used to parse
signature database variable and instantiate a signature store structure
in later patches.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-04-16 08:12:46 +02:00
AKASHI Takahiro
593e17d673 efi_loader: add signature verification functions
In this commit, implemented are a couple of helper functions which will be
used to materialize variable authentication as well as image authentication
in later patches.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-04-16 08:12:46 +02:00
AKASHI Takahiro
9bf09b5120 efi_loader: add CONFIG_EFI_SECURE_BOOT config option
Under this configuration, UEFI secure boot support will be added
in later patches.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-04-16 08:12:46 +02:00
Heinrich Schuchardt
17e1174085 drivers: crypto: rsa_mod_exp: avoid DM_FLAG_PRE_RELOC
Function rsa_verify_key() is not called before relocation. So there is no
need to load the UCLASS_MOD_EXP drivers before relocation.

This avoid a failure to boot for pine64-lts_defconfig with CONFIG_RSA=y.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-16 08:12:32 +02:00
Heinrich Schuchardt
540faca8a1 efi_loader: function descriptions efi_watchdog.c
Correct function descriptions in efi_watchdog.c.
Add the descriptions to the generated HTML documentation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-16 08:10:02 +02:00
Heinrich Schuchardt
55976b7fae efi_loader: add missing doc comments in efi_disk.c
Add missing descriptions for functions in efi_disk.c.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-16 08:10:01 +02:00
Heinrich Schuchardt
76956556fc efi_loader: function descriptions efi_unicode_collation.c
Correct function descriptions in efi_unicode_collation.c
Add the Unicode collation protocol to the generated HTML documentation.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-16 08:10:01 +02:00
Peter Robinson
bdf329e4a3 efi_loader: enable RNG if DM_RNG is enabled
Enable EFI_RNG_PROTOCOL by default if DM_RNG is set.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Sughosh Ganu <sughosh.ganu@linaro.org>
Remove superfluous 'if DM_RNG'
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-16 08:10:01 +02:00
Tom Rini
66b8669d77 Merge tag 'u-boot-stm32-20200415' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm
- Replace STM32MP1_TRUSTED by TFABOOT flag
- Enable bootd, iminfo, imxtract on ST defconfig
- Rename LEDs to match silkscreen on AV96
- Add KS8851-16MLL ethernet on FMC2
- Define FMC2 base address
- net: dwc_eth_qos: implement reset-gpios for stm32
- net: dwc_eth_qos: implement phy reg and max-speed for stm32
2020-04-15 12:10:51 -04:00
Heinrich Schuchardt
d2235ee56c configs: correct SMBIOS information for ODROID-C2
CONFIG_SMBIOS_MANUFACTURER="amlogic"
CONFIG_SMBIOS_PRODUCT_NAME="p200"

is incorrect for the ODROID-C2.

Show correct board name and manufacturer in SMBIOS.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-15 18:06:39 +02:00
Heinrich Schuchardt
6da749d8b3 arm: meson: imply DM_RNG
All ARCH_MESON boards have a hardware random number generator. So we should
enable building the RNG driver.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-15 18:06:28 +02:00
Tom Rini
9cb3ce2558 Merge branch 'master' of git://git.denx.de/u-boot-marvell
- Common: honour hw_margin_ms property (Rasmus)
- sp805_wdt: get platform clock from dt (Rayagonda)
2020-04-15 08:30:16 -04:00
Patrick Delaunay
71ba2cb0d6 board: stm32mp1: correct CONFIG_IS_ENABLED usage for LED
Use the correct macro to test presence CONFIG_LED:
replace CONFIG_IS_ENABLED(CONFIG_LED) by CONFIG_IS_ENABLED(LED)

Issue see during review unrelated patch
"board: stm32mp1: update management of boot-led"
http://patchwork.ozlabs.org/patch/1264823/

Cc: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-04-15 09:10:12 +02:00
Patrick Delaunay
c5f3c63fb4 ARM: stm32: Enable bootd, iminfo, imxtract on ST defconfig
Enable these standard U-Boot commands for image manipulation and for
starting the default boot command using 'boot' command in U-Boot shell.

Cc: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-15 09:09:39 +02:00
Marek Vasut
9528f8ac81 ARM: dts: stm32: Rename LEDs to match silkscreen on AV96
The LED labels do not match the silkscreen on the board, fix it.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Tom Rini <trini@konsulko.com>
Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2020-04-15 09:09:21 +02:00
Patrick Delaunay
654706be84 configs: stm32mp1: replace STM32MP1_TRUSTED by TFABOOT
Activate ARCH_SUPPORT_TFABOOT and replace the arch stm32mp
specific config CONFIG_STM32MP1_TRUSTED by the generic CONFIG_TFABOOT
introduced by the commit 535d76a121 ("armv8: layerscape: Add TFABOOT
support").
This config CONFIG_TFABOOT is activated for the trusted boot chain,
when U-Boot is loaded by TF-A.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-04-15 09:08:37 +02:00
Marek Vasut
de80a2476a ARM: dts: stm32: Add KS8851-16MLL ethernet on FMC2
Add DT entries, Kconfig entries and board-specific entries to configure
FMC2 bus and make KS8851-16MLL on that bus accessible to U-Boot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-15 09:08:29 +02:00
Marek Vasut
cb25126801 ARM: dts: stm32: Define FMC2 base address
Define FMC2 base address, for use in board files, until there is an
actual FMC2 bus driver.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-15 09:08:29 +02:00
Patrick Delaunay
4f60a51d07 net: dwc_eth_qos: implement phy reg and max-speed for stm32
Add management of property "reg" to configure @ of phy and
also "max-speed" property to specify maximum speed in Mbit/s
supported by the device

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-15 09:08:29 +02:00
Christophe Roullier
5177b31ba6 net: dwc_eth_qos: implement reset-gpios for stm32
Add management of property "reset-gpios" in the node identified by
"phy-handle" to configure any GPIO used to reset the PHY.

Signed-off-by: Christophe Roullier <christophe.roullier@st.com>
Reviewed-by: Patrice CHOTARD <patrice.chotard@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-15 09:08:29 +02:00
Rayagonda Kokatanur
19a159f94a watchdog: sp805_wdt: get platform clock from dt file
Get the watchdog platform clock from the DTS file
using clk subsystem and use the same for calculating
ticks in msec.

Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-15 08:54:07 +02:00
Rasmus Villemoes
40d7f3c8d1 watchdog: honour hw_margin_ms DT property
Some watchdog devices, e.g. external gpio-triggered ones, must be
reset more often than once per second, which means that the current
rate-limiting logic in watchdog_reset() fails to keep the board alive.

gpio-wdt.txt in the linux source tree defines a "hw_margin_ms"
property used to specifiy the maximum time allowed between resetting
the device. Allow any watchdog device to specify such a property, and
then use a reset period of one quarter of that. We keep the current
default of resetting once every 1000ms.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-15 08:54:00 +02:00
Rasmus Villemoes
b4d9452c44 watchdog: move initr_watchdog() to wdt-uclass.c
This function is a bit large for an inline function, and for U-Boot
proper, it is called via a function pointer anyway (in board_r.c), so
cannot be inlined.

It will shortly set a global variable to be used by the
watchdog_reset() function in wdt-uclass.c, so this also allows making
that variable local to wdt-uclass.c.

The WATCHDOG_TIMEOUT_SECS define is not used elsewhere.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-15 08:53:55 +02:00
Rasmus Villemoes
21a0bf7f46 watchdog: remove stale ifndef CONFIG_WATCHDOG_TIMEOUT_MSECS from wdt.h
Since WATCHDOG_TIMEOUT_MSECS was converted to Kconfig (commit
ca51ef7c0c), CONFIG_WATCHDOG_TIMEOUT_MSECS has been guaranteed to be
defined. So remove the dead fallback ifdeffery.

Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-15 08:53:49 +02:00
Tom Rini
142a07f2a4 Merge branch 'master' of git://git.denx.de/u-boot-marvell
- Misc enhancements to Clearfog, including board variant detection
  (Joel)
- Misc enhancements to Turris Mox, including generalization of the
  ARMADA37xx DDR size detection (Marek)
2020-04-14 08:47:07 -04:00
Marek Behún
c64ac3b318 arm: mvebu: turris_mox: fix PCIe ranges in device tree
Use the new a3700_fdt_fix_pcie_regions function in turris_mox.c so that
MOX boards with 4 GB RAM are fully supported.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Marek Behún
cb2ddb291e arm64: mvebu: a37xx: add device-tree fixer for PCIe regions
In case when ARM Trusted Firmware changes the default address of PCIe
regions (which can be done for devices with 4 GB RAM to maximize the
amount of RAM the device can use) we add code that looks at how ATF
changed the PCIe windows in the CPU Address Decoder and changes given
device-tree blob accordingly.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Marek Behún
4e9eb04c8d arm: mvebu: turris_mox: support devices with RAM > 1 GB
In order to support MOX boards with 2 GB or 4 GB RAM, we use the new
Armada-3700 generic code for memory information structures. This is done
by removing dram_init and dram_init_banksize from turris_mox.c, in order
for the generic, weak definitions to be used.

Also for boards with 4 GB RAM it is needed to increase
CONFIG_NR_DRAM_BANKS to 2 in turris_mox_defconfig.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Marek Behún
a129f64fb0 arm64: mvebu: a37xx: improve code determining memory info structures
Currently on Armada-37xx the mem_map structure is statically defined to
map first 2 GB of memory as RAM region, and system registers and PCIe
region device region.

This is insufficient for when there is more RAM or when for example the
PCIe windows is mapped to another address by the CPU Address Decoder.
In the case when the board has 4 GB RAM, on some boards the ARM Trusted
Firmware can move the PCIe window to another address, in order to
maximize possible usable RAM.

Also the dram_init and dram_init_banksize looks for information in
device-tree, and therefore different device trees are needed for boards
with different RAM sizes.

Therefore we add code that looks at how the ARM Trusted Firmware has
configured the CPU Address Decoder windows, and then we update the
mem_map structure and compute gd->ram_size and gd->bd->bi_dram bank
base addresses and sizes accordingly.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Marek Behún
f075b425a7 arm64: mvebu: armada-8k: move dram init code
Move Armada-8k specific DRAM init code into armada-8k specific
directory.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Marek Behún
c8a185a823 arm: mvebu: turris_mox: sort headers alphabetically
Sort #includes alphabetically, the only exception is common.h, which is
included first in most parts of U-Boot.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Marek Behún
9657841010 arm: mvebu: turris_mox: don't use hardcoded addresses
Use macro MVEBU_REGISTER to access register addresses instead of
hardcoded addresses.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Marek Behún
9e4cdbabac arm: mvebu: dts: turris_mox: fix USB3 regulator
Commit e8e9715df2 requires the USB3 regulator node to have the
enable-active-high property for the regulator to work properly. The
GPIO_ACTIVE_HIGH constant is not enough anymore.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Fixes: e8e9715df2 ("regulator: fixed: Modify enable-active-high...")
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Marek Behún
2b3f2dd1ce arm: mvebu: turris_mox: Setup Linux's device tree before boot
Patch Linux's device tree according to which Mox modules are connected.
Linux's device tree has all possible Mox module nodes preprogrammed, but
in disabled state.

If MOX B, MOX F or MOX G module is present, this code enables the PCI
node.

For the network modules (MOX C, MOX D and MOX E) are present, the code
enables corresponding ethernet and swtich nodes and DSA connections.
For the SFP cage the SFP GPIO controller node and SFP node are also
enabled.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Marek Behún
eddd6f90c9 arm: mvebu: dts: turris_mox: update sdhci properties
With recent changes to the mmc subsystem (chip detect code etc) update
the sdhci node of the Turris Mox device tree.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Marek Behún
b80ca8176d arm: mvebu: turris_mox: Fix early SPI communication
The SPI clock signal changes value when the SPI configuration register
is configured. This can sometimes lead to the device misinterpreting
the enablement of the SPI controller as actual clock tick.
This can be solved by first setting the SPI CS1 pin from GPIO to SPI mode,
and only after that writing the SPI configuration register.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Joel Johnson
27f48f7dc4 arm: mvebu: clearfog: Use Pro DT by default
Switch to explicitly using the Pro variant DT, which has been
available since Linux 4.11.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Joel Johnson
c5936cc4f8 arm: mvebu: clearfog: move ENV params to Kconfig
Migrate the values for ENV_SIZE and ENV_OFFSET into board specific
Kconfig defaults so they're more accessible for configuration.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Joel Johnson
b16d7c3216 arm: mvebu: clearfog: add SPI offsets
Add reasonable default SPI offsets and ENV size when configured to
boot from SPI flash.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Joel Johnson
8eccd0dda0 arm: mvebu: clearfog: Unify DT selection paths
Unify the location of DT selection into board_late_init instead of
split between detection and static configuration paths.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Joel Johnson
009d4cfcf2 arm: mvebu: clearfog: Add SATA mode flags
The mPCIe slots on ClearFog Pro and ClearFog Base may be alternately
configured for SATA usage.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Joel Johnson
8a86308a87 arm: mvebu: clearfog: Add option for 2.5 Gbps SFP
While newer Linux kernels provide autoconfiguration of SFP, provide
an option for setting in U-Boot Kconfig for use prior to booting.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Joel Johnson
9f205d658d arm: mvebu: clearfog: initial ClearFog Base variant
Add a unique entry for ClearFog Base variant, reflected in the board
name and adjusted SerDes topology.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Joel Johnson
ee26e8539f arm: mvebu: clearfog: use Pro name by default
Make the board version printed indicate the Pro variant default.
Also adjust static name casing to match what is expected for
EEPROM product name to share string constants.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Joel Johnson
a8d0aa31bd arm: mvebu: solidrun: remove hardcoded DTS MAC address
Using a consistent hardcoded MAC address from the DTS file causes
issues when using multiple devices on the same network segment.
Instead rely on environment configuration or random generation.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Joel Johnson
4f7991ee1c arm: mvebu: fix SerDes table alignment
Tested on Solidrun ClearFog Base. Table alignment was:
 | Lane #  | Speed |  Type       |
 --------------------------------
 |   0    |  3   |  SATA0       |
 |   1    |  0   |  SGMII1      |
 |   2    |  3   |  SATA1       |
 |   3    |  5   |  USB3 HOST1  |
 |   4    |  5   |  USB3 HOST0  |
 |   5    |  4   |  SGMII2      |
 --------------------------------

After the change, it's correctly aligned as:
 | Lane # | Speed |  Type       |
 --------------------------------
 |   0    |   3   | SATA0       |
 |   1    |   0   | SGMII1      |
 |   2    |   5   | PCIe1       |
 |   3    |   5   | USB3 HOST1  |
 |   4    |   5   | PCIe2       |
 |   5    |   0   | SGMII2      |
 --------------------------------

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Joel Johnson
cecf38a755 arm: mvebu: clearfog: support multiple SATA boot
Enable distro bootcmd support for additional SATA ports if enabled.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Joel Johnson
bd02fd29f9 arm: mvebu: clearfog: add SCSI to distro bootcmd
Include attempting to boot from SCSI (SATA) devices within generated
board distro bootcmd environment. The reasoning for boot ordering is
that MMC and USB are external and removable, while when a case is in
use, replacing M.2 or mSATA drives requires disassembly. Therefore,
to boot SCSI, [bootable] external media must be removed. If SCSI were
placed before MMC or USB, then removing a bootable SCSI drive to
enable MMC or USB booting would be more difficult.

Signed-off-by: Joel Johnson <mrjoel@lixil.net>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Chris Packham
ad91fdfff0 arm: mvebu: update RTC values for PCIe memory wrappers
Update the RTC (Read Timing Control) values for PCIe memory wrappers
following an ERRATA (ERRATA# TDB). This means the PCIe accesses will
used slower memory Read Timing, to allow more efficient energy
consumption, in order to lower the minimum VDD of the memory.  Will lead
to more robust memory when voltage drop occurs (VDDSEG)

The code is based on changes from Marvell's U-Boot, specifically:

20cd270407
eb608a7c8d
c4af19ae2b

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Josua Mayer
201a500dec arm: mvebu: clearfog: add scsi target to distro-boot
Support for sata devices via the scsi command is available and already
enabled by default for the Clearfog Base and Pro. This change adds scsi
to the list of boot targets used by distro-boot.

Signed-off-by: Josua Mayer <josua@solid-run.com>
Cc: Stefan Roese <sr@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Heinrich Schuchardt
a1dd1fcb6e arm: mvebu: drivers/ddr: remove redundant assignment
The value of local variable ecc is immediately overwritten. So we can
remove the first assignment.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:16:42 +02:00
Josip Kelecic
5e2de83f71 arm: mvebu: dts: Sort Armada series dts alphabetically
Sort the Armada series dts in the Makefile alphabetically
prior to adding new board support.

Signed-off-by: Josip Kelečić <josip.kelecic@sartura.hr>
Reviewed-by: Luka Kovacic <luka.kovacic@sartura.hr>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-14 13:15:26 +02:00
Lokesh Vutla
16c2a979fc MAINTAINERS: update entry for ARM TI
Add all TI specific drivers, include, arch files under ARM TI entry.
Driver files are added only if there is no entry for the specific
subsystem in MAINTAINERS file.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-04-14 15:44:48 +05:30
Vignesh Raghavendra
aaf55800a3 arm: dts: k3-j721e: Increase OSPI default frequency to 50MHz
In 1 bit mode OSPI can work at upto 50MHz, this provides better write
performance. Therefore increase frequency from 40MHz to 50MHz

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-04-14 15:44:48 +05:30
Vignesh Raghavendra
d5a1f4f551 arm: dts: k3-am654: Increase OSPI default frequency to 50MHz
In 1 bit mode OSPI can work at upto 50MHz, this provides better write
performance. Therefore increase frequency from 40MHz to 50MHz

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-04-14 15:44:48 +05:30
Moses Christopher
360ced61bd am335x, guardian: update boot mechanism
- Add a boot logic in the distro boot command
  - Add fallback mechanism in alternate boot command
  - Keep single boot target -> ubifs0

Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
2020-04-14 15:44:48 +05:30
Moses Christopher
a31216772a am335x, guardian: load env from NAND
- As there is a requirement to store certain data, we need a persistent
    storage in u-boot. Hence, we need to save env in NAND

  - Add default Guardian environment variables

  - Update partition table:
    - Reserve some space for experimentation, this ensures proper
      backwards compatibility

  - Update defconfig accordingly

Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
2020-04-14 15:44:48 +05:30
Moses Christopher
9b76b4c23e am335x, guardian: boot count is stored in AM3352 RTC block
- Move bootlimit to defconfig
  - Store bootcount in RTC block

Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
2020-04-14 15:44:48 +05:30
Moses Christopher
f2330691d9 am335x, guardian: boot stage feedback in headless mode
This patch enables the guardian board to provide feedback
  about the boot stage in headless mode. The on-board led
  would behave in the following pattern

    * U-boot -> GLOW LED
    * Linux  -> BLINK LED [HEART-BEAT PATTERN]

Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
2020-04-14 15:44:48 +05:30
Moses Christopher
b1c95cc704 am335x, guardian: fix spl usb-eth boot
- On Guardian board, usb-eth boot in SPL stage fails due to certain
   misconfiguration. Hence, add the same to fix the issue.

 - configs are set based on the conditional statement present in
   arch/arm/mach-omap2/am33xx/board.c

 - disable tiny printf in SPL stage:
    As the library is optimized, the ability to deal with ethaddr is lost.
    The following message would be printed on the console,

    Error: flags type check failure for "ethaddr" <= "80a81144M" (type: m)
    Error inserting "ethaddr" variable, errno=1

Signed-off-by: Moses Christopher <BollavarapuMoses.Christopher@in.bosch.com>
2020-04-14 15:44:48 +05:30
Chris Packham
236609d93c ddr: marvell: a38x: Allow boards to specify CK_DELAY parameter
For some layouts it is necessary to adjust the CK_DELAY parameter to
successfully complete DDR training. Add the ability to specify the
CK_DELAY in the mv_ddr_topology_map.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2020-04-14 08:59:44 +02:00
Tom Rini
2af31afc7a Merge branch 'master' of git://git.denx.de/u-boot-socfpga 2020-04-13 16:06:51 -04:00
Tom Rini
61819012b6 Merge branch 'master' of git://git.denx.de/u-boot-usb 2020-04-13 16:06:36 -04:00
Tom Rini
8914831860 Merge branch 'next'
Pull in changes that have been pending in our 'next' branch.  This
includes:
- A large number of CI improvements including moving to gcc-9.2 for all
  platforms.
- amlogic, xilinx, stm32, TI SoC updates
- USB and i2c subsystem updtaes
- Re-sync Kbuild/etc logic with v4.19 of the Linux kernel.
- RSA key handling improvements
2020-04-13 11:27:00 -04:00
Ley Foon Tan
3958ef307e arm: socfpga: arria10: Enable cache driver in SPL
Adding "u-boot,dm-pre-reloc" and enable CONFIG_SPL_CACHE
to enable cache driver in SPL.

This fixed error below in SPL:
cache controller driver NOT found!

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-13 13:49:51 +02:00
Ley Foon Tan
5feb5e3215 arm: dts: arria10: Update dtsi/dts from Linux
Update these 3 files from Linux:.
- socfpga_arria10.dtsi (Commit ID c1459a9d7e92)
- socfpga_arria10_socdk.dtsi (Commit ID d9b9f805ee2b)
- socfpga_arria10_socdk_sdmmc.dts (Commit ID 17808d445b6f)

Change in socfpga_arria10.dtsi:
- Add clkmgr label, so that can reference to it in u-boot.dtsi.

Change in socfpga_arria10-u-boot.dtsi:
- Add compatible and altr,sysmgr-syscon for uboot.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-13 13:49:51 +02:00
Ley Foon Tan
f3fccb12c0 arm: dts: arria10: Move uboot specific properties to u-boot.dtsi
Move Uboot specific properties to *u-boot.dtsi files.
Preparation to sync Arria 10 device tree from Linux.

Signed-off-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-13 13:49:51 +02:00
Marek Vasut
8876f89640 ARM: socfpga: Enable DM RTC bootcount on ABB SECU1
Add and enable RTC-backed boot counter on ABB SECU1 platform.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2020-04-13 13:49:51 +02:00
Rayagonda Kokatanur
9cadf05958 drivers: usb: host: Add BRCM xHCI driver
Base driver for Broadcom xHCI controllers

Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com>
Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com>
Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
2020-04-13 13:48:41 +02:00
Kever Yang
2517deafc2 usb: Migrate to support live DT for some driver
Use ofnode_ instead of fdt_ APIs so that the drivers can support live DT.
This patch updates usb_get_dr_mode() and usb_get_maximum_speed() to use
ofnode as parameter instead of fdt offset. And all the drivers who use
these APIs update to use live dt APIs at the same time.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-13 13:48:30 +02:00
Kever Yang
0148bbe8f3 usb: ehci-msm: Use dev interface to get device address
Use dev_read_addr_ptr() instead of devfdt_get_addr() so that we can support
live DT.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2020-04-13 13:48:30 +02:00
Kever Yang
5c17030358 usb: dwc3-of-simple: Drop redundant inclding header file
The fdtdec.h is no use in this file, remove the include code.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-13 13:48:30 +02:00
Tom Rini
67bbc1ecd3 Merge branch '2020-04-11-CI-further-improvements' into next
- Further clean up and improve our Azure/GitLab/Travis CI loops
2020-04-11 11:18:14 -04:00
Simon Glass
4ee7f52781 travis/gitlab/azure: Run cppcheck in parallel
This takes ages to run single-threaded. Adjust it to use all available
processors.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-10 21:36:37 -04:00
Simon Glass
f5ec7eebf7 test/py: Allow using buildman to build U-Boot
It is a pain to have to set the CROSS_COMPILE environment variable when
using test.py's --build option. It is possible to get this using the -A
option from buildman. But it seems better to just use buildman to do the
build when it is available.

However using buildman adds a new dependency to the test system which we
want to avoid. So leave the default as is and add a flag to make it use
buildman.

Note that most of these changes relate to test.py and the parts of the
travis/gitlab/azure scripts which relate to running test and building a
suitable U-Boot to run the tests on.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:36:36 -04:00
Simon Glass
7ec1255cea travis/gitlab/azure: Drop repeated buildman call with test.py
It does not seem to be necessary to run buildman again to show errors,
since any errors can be shown by the first invocation and there is only
a single board being built. Update this to simplify the code, using the
-e flag to make sure errors are shown.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:36:36 -04:00
Simon Glass
cec1e856d3 travis/gitlab/azure: Simplify the exit code for test.py
It seems unnecessary to read the exit code and then check it again. Drop
this and just let the test.py provide the exit code directly.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:33:09 -04:00
Simon Glass
e28e9db69c travis/gitlab/azure: Enable test_handoff
Ensure that this SPL test runs on gitlab.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:33:09 -04:00
Simon Glass
dd5c954e91 travis/gitlab/azure: Use -W to avoid warnings check
We can use the -W flag to tell buildman to ignore warnings. Since we also
have -E defined, compiler warnings are promoted to errors, so they will
still cause a failure. But migration warnings of the form:

    ===================== WARNING ======================
    This board does not use CONFIG_DM. CONFIG_DM will be
    compulsory starting with the v2020.01 release.
    Failure to update may result in board removal.
    See doc/driver-model/migration.rst for more info.

will now be ignored.

Signed-off-by: Simon Glass <sjg@chromium.org>
Fixes: 329f5ef51d (travis.yml: run buildman with option -E)
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:33:09 -04:00
Simon Glass
4080d0970d travis/gitlab/azure: Use bash to avoid a_test_which_does_not_exist
Bash allows for variables to expand only if non-empty:

	$ var=test
	$ echo ${var:+"$var"}
	test
	$ echo ${var:+"-k $var"}
	-k test
	$ var=
	$ echo ${var:+"-k $var"}

Use this feature to avoid the workaround.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:32:53 -04:00
Simon Glass
4e32fed4d3 gitlab/azure: Use -w flag for all test.py builds
Avoid needing to know about the internal .bm-work directory, by passing
the -w flag to buildman.

This is not needed on travis since the -w flag is already used (from a
previous patch).

Drop the -P flag since this has no effect if -w is used.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:32:53 -04:00
Simon Glass
5bd95d63d1 gitlab/azure: Drop unnecessary if..fi when using test.py
Since TEST_PY_BD is always defined we can drop this check.

This does not affect travis since it has a single, unified script.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:32:41 -04:00
Simon Glass
b52f5a1958 travis/gitlab/azure: Drop the buildman -d flag
This has no effect since -S is not given also. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:32:09 -04:00
Simon Glass
573605d441 travis/gitlab/azure: Drop BUILDMAN variable with test.py
This is not needed in the test.py part of the config, now since we use the
same name as the pytests.

Drop BUILDMAN, retaining it only for the 'build' parts of the config, i.e.
where we build multiple boards and don't run any tests.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:32:09 -04:00
Simon Glass
38806650fe travis/gitlab/azure: Use --board buildman flag with test.py
The current method of selecting the board to build with test.py is a bit
error-prone, e.g. with "^sandbox$" it actually builds 5 boards (all of
those in the sandbox architecture).

Use the (newish) --board flag instead, to get the same result.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:28:57 -04:00
Simon Glass
bf0a81330d gitlab/azure: Use the -w option for sandbox_spl
Avoid needing to know about the internal .bm-work directory, by passing
the -w flag to buildman.

This does not affect travis since the previous commit already used the -w
flag.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:24:41 -04:00
Simon Glass
e7c05b1fda travis: Split the building into two parts
Buildman is used in two ways:

- to build a selection of boards (with no testing)
- to build a single board (and run pytest)

The gitlab and azure scrips do this in separate places, but travis does
not. To aid the refactoring process and keep the following patches in sync
across all three environments, split the code out in travis as well.

Use the buildman -w option for the single board. It is easier to
understand since it specifies the output directory directly. Also it
avoids needing to look at the internal .bm-work directory.

This initially creates some duplicate code, but by the end of the series
we have two completely different build paths with different arguments.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:24:01 -04:00
Simon Glass
f08c8ef9b7 travis: Don't copy files into .bm-work/
At present if TEST_PY_BD is empty the script copies various files into a
directory, to no purpose. This happens because UBOOT_TRAVIS_BUILD_DIR is
set before TEST_PY_BD is tested.

Move the 'if' to fix this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:22:45 -04:00
Simon Glass
4e9162d519 buildman: Drop the -a option
There is no point in setting the ARCH environment variable since the
U-Boot build system no-longer uses it.

It seems safe to drop this feature since it was only recently added.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:21:06 -04:00
Simon Glass
b2d89bc538 buildman: Allow building within a subdir of the current dir
This is useful in some situations, in particular with -w and when building
in-tree. Now that we are more careful about what we remove in
_PrepareOutputSpace(), it should be safe to relax this restriction.

Update the progress information also so it is clear what buildman is
doing. Remove files can take a long time.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-10 21:21:06 -04:00
Simon Glass
925f6adfa5 buildman: Be more selective about which directories to remove
At present buildman removes any directory it doesn't intend to write
output into. This is overly expansive since if the output directory
happens to be somewhere with existing files, they may be removed. Using
an existing directory for buildman is not a good practice, but since the
result might be catastrophic, it is best to guard against it.

A previous commit[1] fixed this by refusing to write to a subdirectory
of the current directory, assumed to have U-Boot source code. But we can
do better by only removing directories that look like the ones buildman
creates.

Update the code to do this and add a test.

Signed-off-by: Simon Glass <sjg@chromium.org>

[1] 409fc029c4 tools: buildman: Don't use the working dir as build dir
2020-04-10 21:21:06 -04:00
Simon Glass
7beb43c980 buildman: Allow ignoring warnings in the return code
Sometimes we don't want buildman to return failure if it seems warnings.
Add a -W option to support this. If buildman detects warnings (and no
errors) it will return an exit code of 0 (success).

Note that the definition of 'warnings' includes the migration warnings
produced by U-Boot, such as:

    ===================== WARNING ======================
    This board does not use CONFIG_DM_MMC. Please update
    ...
    ====================================================

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:21:06 -04:00
Simon Glass
f9c094bbce buildman: Update help for -d
This help is a bit ambiguous. It only does anything if asked to show size
changes with -S. Update the help and the function comments.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-10 21:21:06 -04:00
Simon Glass
d829f1217c bulidman: Add support for a simple build
It is useful to run a simple build and put all the output in a single
directory. Add a -w option to support this.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-10 21:21:06 -04:00
Simon Glass
e9fbbf633e buildman: Document the members of BuilderJob
This class has a few more members now. Add documentation for them and fix
a nit in the 'commits' comment.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-10 21:21:06 -04:00
Simon Glass
ed49ea90b7 main: Drop show_boot_progress() prototype
This is defined in bootstage.h and is not called in this file anyway. Drop
it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 21:21:06 -04:00
Simon Glass
a1f49ab6a1 sandbox: Add documentation about required/useful packages
Quite a few packages are used by sandbox or tools. Add a list of these to
help people setting up for the first time.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-04-10 21:21:06 -04:00
Tom Rini
1390c40084 Merge branch '2020-04-10-gitlab-travis-gcc9' into next
- Switch over to using GCC-9.2.0 in our Azure, GitLab and Travis-CI
  instances
2020-04-10 18:28:20 -04:00
Bin Meng
ddd4d99247 travis: Switch to gcc 9.2.0
Use gcc 9.2.0 to do the build testing.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 15:54:16 -04:00
Bin Meng
205254eab8 buildman: Support fetching gcc 9.2.0
This adds support to fetch gcc 9.2.0 toolchains.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 15:54:16 -04:00
Bin Meng
a0c91fe241 video: sunxi: Change sunxi_get_mon_desc() to not return NULL for the default case
When building with gcc 9.2.0, the following build warning was seen:

  drivers/video/sunxi/sunxi_display.c: In function 'video_hw_init':
  drivers/video/sunxi/sunxi_display.c:1217:2:
    error: '%s' directive argument is null [-Werror=format-overflow=]

Change sunxi_get_mon_desc() to not return NULL for the default case,
to fix the compiler warning.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-04-10 15:54:16 -04:00
Bin Meng
49fb28a4b2 azure/gitlab/travis: Add RISC-V SPL testing
This adds QEMU RISC-V 32/64 SPL testing. Unlike QEMU RISC-V 32/64,
we test SPL running in M-mode and U-Boot proper running in S-mode,
with a 4-core SMP configuration.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-10 15:54:16 -04:00
Bin Meng
b2c2608161 test/py: Update u_boot_utils.find_ram_base to bypass the low 2MiB memory
On some RISC-V targets the low memory is protected that prevents
S-mode U-Boot from access.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-10 15:54:16 -04:00
Bin Meng
a379d330a9 azure/gitlab/travis: Add qemu-riscv32 testing
This adds the qemu-riscv32_defconfig test configuration.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-10 15:54:15 -04:00
Bin Meng
9eed8cdd3d travis: Build GRUB image for RISC-V 32-bit and 64-bit
This adds the GRUB image build for RISC-V 32-bit and 64-bit.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-10 15:54:15 -04:00
Bin Meng
091b48e07a travis: Replace pre-built ARM/ARM64 GRUB images with the one built from source
As of today travis uses the pre-built GRUB ARM/ARM64 images from
opensuse. But azure/gitlab are using images built from GRUB 2.04
source. This updates travis to build GRUB ARM/ARM64 UEFI targets
from source, to keep in sync with azure/gitlab.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-04-10 15:54:15 -04:00
Tom Rini
20bc19abb7 Azure/GitLab: Move to latest Docker images
- Based on newer 'bionic' snapshot
- GCC 9.0
- RISCV GRUB binaries

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-10 15:53:01 -04:00
Tom Rini
587e4a4296 kconfig / kbuild: Re-sync with Linux 4.19
Align Kconfig and Kbuild logic to Linux 4.19 release with minimal impact
on files outside of this scope.

Our previous Kconfig sync was done by commit 5972ff077e ("kconfig /
kbuild: re-sync with Linux 4.18").

In this particular re-sync in order to keep clang support working a
number of related changes needed to be pulled in that had been missed
previously.  Not all of these changes we easily traceable and so have
been omitted from the list below.

The imported Linux commits are:
[From prior to v4.18]
9f3f1fd29976 kbuild: Add __cc-option macro
d7f14c66c273 kbuild: Enable Large File Support for hostprogs
6d79a7b424a5 kbuild: suppress warnings from 'getconf LFS_*'
24403874316a Shared library support
86a9df597cdd kbuild: fix linker feature test macros when cross compiling with Clang
0294e6f4a000 kbuild: simplify ld-option implementation

[From v4.18 to v4.19]
96f14fe738b6 kbuild: Rename HOSTCFLAGS to KBUILD_HOSTCFLAGS
10844aebf448 kbuild: Rename HOSTCXXFLAGS to KBUILD_HOSTCXXFLAGS
b90a368000ab kbuild: Rename HOSTLDFLAGS to KBUILD_HOSTLDFLAGS
8377bd2b9ee1 kbuild: Rename HOST_LOADLIBES to KBUILD_HOSTLDLIBS
f92d19e0ef9b kbuild: Use HOST*FLAGS options from the command line
4ab3b80159d4 kconfig: check for pkg-config on make {menu,n,g,x}config
693359f7ac90 kconfig: rename SYMBOL_AUTO to SYMBOL_NO_WRITE
f60b992e30ff kbuild: replace $(LDFLAGS) $(ldflags-y) with $(ld_flags)
2fb9279f2c3e kbuild: change ld_flags to contain LDFLAGS_$(@F)
c931d34ea085 arm64: build with baremetal linker target instead of Linux when available
5accd7f3360e kconfig: handle format string before calling conf_message_callback()
a2ff4040151a kconfig: rename file_write_dep and move it to confdata.c
0608182ad542 kconfig: split out useful helpers in confdata.c
adc18acf42a1 kconfig: remove unneeded directory generation from local*config
79123b1389cc kconfig: create directories needed for syncconfig by itself
16952b77d8b5 kconfig: make syncconfig update .config regardless of sym_change_count
d6c6ab93e17f kbuild: remove deprecated host-progs variable
56869d45e364 kconfig: fix the rule of mainmenu_stmt symbol
c151272d1687 kconfig: remove unused sym_get_env_prop() function
1880861226c1 kconfig: remove P_ENV property type
e3fd9b5384f3 scripts/dtc: consolidate include path options in Makefile
4bf6a9af0e91 kconfig: add build-only configurator targets
f1575595d156 kconfig: error out when seeing recursive dependency
5e8c5299d315 kconfig: report recursive dependency involving 'imply'
f498926c47aa kconfig: improve the recursive dependency report
98a4afbfafd2 kconfig: fix "Can't open ..." in parallel build
9a9ddcf47831 kconfig: suppress "configuration written to .config" for syncconfig
87a32e624037 kbuild: pass LDFLAGS to recordmcount.pl
d503ac531a52 kbuild: rename LDFLAGS to KBUILD_LDFLAGS
217c3e019675 disable stringop truncation warnings for now
bc8d2e20a3eb kconfig: remove a spurious self-assignment
fd65465b7016 kconfig: do not require pkg-config on make {menu,n}config
5a4630aadb9a ftrace: Build with CPPFLAGS to get -Qunused-arguments

Note that this adds new cleanup work to do in that we should adapt the
shared library support we have to what is now upstream.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
2020-04-10 11:18:32 -04:00
Tom Rini
1ebf50d9bb Merge tag 'u-boot-amlogic-20200406' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic into next
- clk: meson-g12a: missing break
- sync all Amlogic DT from Linux v5.6-rc2
- MMC clock fixups
- add support for Libre Computer AML-S905D-PC and AML-S912-PC
2020-04-08 08:48:31 -04:00
Tom Rini
1f47e2aca4 Merge tag 'xilinx-for-v2020.07' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2020.07

common:
- Align ENV_FAT_INTERFACE
- Fix MAC address source print log
- Improve based autodetection code

xilinx:
- Enable netconsole

Microblaze:
- Setup default ENV_OFFSET/ENV_SECT_SIZE

Zynq:
- Multiple DT updates/fixes
- Use DEVICE_TREE environment variable for DTB selection
- Switch to single zynq configuration
- Enable NOR flash via DM
- Minor SPL print removal
- Enable i2c mux driver

ZynqMP:
- Print multiboot register
- Enable cache commands in mini mtest
- Multiple DT updates/fixes
- Fix firmware probing when driver is not enabled
- Specify 3rd backup RAM boot mode in SPL
- Add SPL support for zcu102 v1.1 and zcu111 revA
- Redesign debug uart enabling and psu_init delay
- Enable full u-boot run from EL3
- Enable u-boot.itb generation without ATF with U-Boot in EL3

Versal:
- Enable distro default
- Enable others SPI flashes
- Enable systems without DDR

Drivers:
- Gem:
  - Flush memory after freeing
  - Handle mdio bus separately
- Watchdog:
  - Get rid of unused global data pointer
  - Enable window watchdog timer
- Serial:
  - Change reinitialization logic in zynq serial driver

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-04-07 17:13:35 -04:00
Michal Simek
895a7866c2 serial: zynq: Change uart initialization logic
The commit a673025535 ("serial: zynq: Initialize uart only before
relocation") introduced code which detects relocation which is working for
single uart instance. With multiple instances in place there is a need to
enable and setup every instance. That's why detect if TX is enabled. If it
is then don't initialize uart again.
In post probe setbrg is called to setup baudrate but values should be the
same.

As a side effect of this change is that DECLARE_GLOBAL_DATA_PTR can be
removed completely.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Ashok Reddy Soma
5028358a6a watchdog: versal: Add support for Xilinx window watchdog
Add support for Xilinx window watchdog, which can be found on
Versal platforms.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-04-06 12:52:45 +02:00
Michal Simek
453bb77d09 arm64: xilinx: Never touch DDR if system has no DDR
If DDR is not mapped do not touch it. Default
XILINX_OF_BOARD_DTB_ADDR is pointing to DDR.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
98da86681e arm64: versal: Disable DDR cache mapping if DDR is not enabled
Similar change was done in past by commit 3b644a3c2f
("arm64: zynqmp: Provide a config to not map DDR region in MMU table").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
b8c3d3f45f arm64: zynqmp: Add support for u-boot.itb generation without ATF
If ATF doesn't exist generate u-boot.itb without it and let U-Boot run in
EL3. Still keep warning to let user know that ATF/BL31 is missing.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
3d03752475 arm64: zynqmp: Reorder parameters for zynqmp_mmio_write()
Parameter order is not correct based on zynqmp_mmio_write() declaration.

Fixes: be52372ff1 ("arm64: zynqmp: Use zynqmp_mmio_read/write functions")
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
73319eee87 firmware: zynqmp: Enable IPI code calling also in EL3
U-Boot proper can still run in EL3 without using firmware interface wired
via ATF. For supporting this use case there is a need to check EL level
where U-Boot runs and based on that choose the way how to talk to firmware.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
f8451f144e arm64: zynqmp: Move timeout for clock propagation below psu_init
Delay required for clock propagation is tighly coupled with initialization
done in psu_init(). That's why call it also for u-boot proper with
CONFIG_ZYNQMP_PSU_INIT_ENABLED enabled.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
c0adba5721 arm64: zynqmp: Add support for debug uart also for U-Boot proper
board_early_init_f() is the right location where debug uart can be
configurated (after MIO initialization).
The patch is taking this call from SPL to also make it available for U-Boot
proper.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
0486497e2b lib: Improve _parse_integer_fixup_radix base 16 detection
Base autodetection is failing for this case:
if test 257 -gt 3ae; then echo first; else echo second; fi

It is because base for 3ae is recognized by _parse_integer_fixup_radix() as
10. The code detects the first char which is not between 'a'/'A' or 'f'/'F'
to change base from dec to hex.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Shiril Tichkule <shirilt@xlinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
352f86bf86 arm64: zynqmp: Enable netconsole for ZynqMP
It is nice feature

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
387121c173 arm64: zynqmp Add support for zcu111 revA
Add low level configuration for zcu111 for easier SPL run.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
d4172c9406 net: eth-uclass: Fix message if mac is coming from DT or ROM
When local-mac-address DT property is specified it is reported the same way
as address read from eeprom/ROM. Show properly if mac address is coming
from DT or ROM.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
001ad66324 ARM: zynq: Enable i2c mux support for all boards
zc702/zc706 have pca9548 i2c muxes that's why enable the driver by default.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
47cc45a91c arm64: zynqmp Add support for zcu102 rev1.1
rev1.1 has different DDR sodimm module that's why it requires different DDR
configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
f1433d0dc9 arm64: zynqmp: Add third backup bootmode
I found this issue when was running py/test.py on zcu102 which is for me by
default setup to SD boot mode without any way to change boot mode.
Alternative software bootmode selection to JTAG is not working because JTAG
mode is 0 which also reset value for it. That's why saying SPL to take
u-boot.itb from RAM instead of SD in SD boot mode is not possible via
alternative bootmode selection.
That's why setup third boot mode to JTAG(BOOT_DEVICE_RAM) as final
fallback.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
f7e296d6f5 watchdog: cadence: Remove DECLARE_GLOBAL_DATA_PTR from driver
gd is not used in the driver that's why declaration is not needed at all.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
25de8a8d0f net: zynq-gem: Setup and use mdio base separately
Not all IPs have private MDIO bus and MDIO bus should be shared between
several IPs. In past one patch tried to implement it
(https://lists.denx.de/pipermail/u-boot/2018-February/319285.html)
in pretty raw way but it is not the cleanest solution.
This patch is just taking the part of that solution to be able to handle it
over releases without conflicts.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
88f0dc32a7 ARM: zynq: Do not print message about boot device
This information is shown already that's why there is no reason to print it
again via custom prints.

U-Boot SPL 2020.01-03080-ga6214d033bd0 (Mar 05 2020 - 09:59:05 +0100)
mmc boot
Trying to boot from MMC1

or

U-Boot SPL 2020.01-03080-ga6214d033bd0 (Mar 05 2020 - 10:49:46 +0100)
qspi boot
Trying to boot from SPI

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
66ef85da61 arm64: zynqmp: Check firmware node when driver is enabled
ZynqMP mini configurations works without PMU firmware that's why there is
no reason to enable the driver and check if it was probed properly.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
T Karthik Reddy
36cd899c0c arm64: versal: Enable support for Gigadevice/ISSI flashes
Enable support for Gigadevice/ISSI flash parts for Versal platform.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
8d78211856 env: Make mmc as default option for CONFIG_ENV_FAT_INTERFACE
All configs are using mmc as default fat interface. That's why make it
default for everybody.
The reason for this patch is to make it default for Xilinx Zynq platform
which is not listed there.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
f7375aff95 ARM: zynq: Enable DM for CFI NOR flash
With multi defconfig NOR flash information about NOR should be taken from
DT that's why there is no reason to specify address and sizes via fixed
config.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
5992f25797 ARM: zynq: Do not report NOR flash detection failure
With multi defconfig targeting several board configurations bug report like
below is so verbose.
Flash: ## Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
0 Bytes

Do not report that message and simply say "Flash: 0 Bytes" because most of
Zynq boards are using different type of flashes than NOR.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:52:45 +02:00
Michal Simek
3811746ed9 nand: raw: zynq: Do not try to probe driver if nand flash is disabled
There is no reason to continue when DT status property indicates that NAND
flash is disabled. But that means that NOR flash should be present that's
why try it find it out.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-06 12:52:15 +02:00
Michal Simek
36f1f3b640 nand: raw: Do not free xnand structure
xnand structure is private data structure and it is handled by core and
probe shouldn't touch it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-04-06 12:52:05 +02:00
Michal Simek
7c49a6d08e ARM: zynq: Do not include full zynq-7000.dtsi to cse-nor configuration
There is no real need to include full DT when only some nodes are enough to
use. It will save some space.

Retested with FSBL for initial SoC setup. SPL didn't work.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Ashok Reddy Soma
0f8defd891 net: zynq_gem: Add cache flush to zynq_gem_free_pkt
Add cache flush to zynq_gem_free_pkt. This is necessary
because some net routines would modify this buffer in place.
The cache_invalidate in the zynq_gem_recv function would cause
the modifications to the buffer to overwrite the DMA from the GEM,
if cache coherency is not enabled in the GEM, the next time the
buffer is in use.

Flushing the cache when the buffer is no longer in use by the
net functions ensures that the GEM DMA is going to take place
into a clean buffer.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Michal Simek
f7c6ee7fe7 ARM: zynq: Switch to single zynq configurations
There are a lot of zynq configurations which can be merged together and use
only one for all. The similar change has been done for ZynqMP by commit
be1b6c32d9 ("arm64: zynqmp: Use zynqmp_virt platform")

Build SPL with u-boot.img for zc706 like this.
export DEVICE_TREE=zynq-zc706 && make xilinx_zynq_virt_defconfig && make -j8
u-boot.img is generic for all boards.

Tested on Zybo, zc702, zc706, zc770-xm011-x16, cc108 and microzed.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Michal Simek
dacec83ce0 Makefile: Add environment variable DEVICE_TREE to header
Users have option to overwrite default device tree
(CONFIG_DEFAULT_DEVICE_TREE) via environment variable DEVICE_TREE.

Feature has been added long time ago by commit 74de8c9a16
("dts/Makefile: Build the user specified dts") for a little bit different
reason.

But this variable can be also used for different purpose like choosing
proper configuration from FIT image in SPL.
And this is the functionality I would like to use on Xilinx Zynq devices
that current u-boot.img can be composed in the same way based on OF_LIST
and different configuration is taken based on platform specific SPL.
SPL requires low level ps7_init_gpl configuration that's why different
boards require different SPL with fixed board_fit_config_name_match().

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-04-06 12:51:31 +02:00
Michal Simek
f5a122e2ab ARM: zynq: Change zc770 xm011 Nand x16 configurations
Instead of symlink include origin file and just change model description.
Difference is not in DT but in ps7_init configurations which is taken based
on device tree name that's why the same DT can't be used.

Also update model and update comments to match configurations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Varalaxmi Bingi
63e988ed4e env: Kconfig: Adding default values for Microblaze
This patch will add default values for ENV_OFFSET
and ENV_SECT_SIZE for Microblaze.

Signed-off-by: Varalaxmi Bingi <varalaxmi.bingi@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Michal Simek
00fb945cf5 arm64: zynqmp: Move pinctrl node under firmware node
Pinctrl is handled via firmare interface that's why move it there without
reg property and new compatible string.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Michal Simek
ba19690287 arm64: zynqmp: Fix GIC compatible property
dtbs_check is showing warning around GIC compatible property as
interrupt-controller@f9010000: compatible: ['arm,gic-400', 'arm,cortex-a15-gic']
is not valid under any of the given schemas

Similar change has been done also by Linux kernel commit 5400cdc1410b
("ARM: dts: sunxi: Fix GIC compatible")

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Michal Simek
0ac6500737 ARM: zynq: Fix addresses in partition definitions
Node name should be <name>@<address> which is not how partitions are
described.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Michal Simek
5df63a60aa arm64: zynqmp: Fix addresses in partition definitions
Node name should be <name>@<address> which is not how partitions are
described.

Issue was found by running dtbs_check as:
flash@0: 'partition@qspi-device-tree', 'partition@qspi-fsbl-uboot',
'partition@qspi-linux', 'partition@qspi-rootfs'
do not match any of the regexes: ...

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Michal Simek
04437dea7c arm64: zynqmp: Sync DP subsystem
Sync DP subsystem with the latest state in Xilinx U-Boot repository.
This binding hasn't been approved in mainline Linux but it is much better
than ancient version which this patch removes.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Amit Kumar Mahapatra
0546b1ab06 arm64: zynqmp: Do not duplicate flash partition label property
In kernel 5.4, support has been added for reading MTD devices via
the nvmem API.
For this the mtd devices are registered as read-only NVMEM providers
under sysfs with the same name as the flash partition label property.

So if flash partition label property of multiple flash devices are identical
then the second mtd device fails to get registered as a NVMEM provider.

This patch fixes the issue by having different label property for different
flashes.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Ashok Reddy Soma
d9872d8b47 arm64: dts: zynqmp: Add clk cells for sdhci
Add clock-cells and clock-output-names for sdhci0 and sdhci1.
These are needed for linux sdhci driver from 5.4 version onwards.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Michal Simek
87b0176fbf arm64: zynqmp: Remove second copy of reset-controller
Reset controller is handled via firmware that's why it should be the part
of firmware node. Origin solution hasn't been removed when above change was
applied by commit b07e97b4ba ("arm64: zynqmp: Use reset header in
zynqmp.dtsi").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Manish Narani
12ffe75819 arm64: zynqmp: Add 'no-1-8-v' property for ZynqMP Boards
Modify dts files to add 'no-1-8-v' property for all the ZynqMP boards.
User can remove this property to enable the UHS mode. This is to keep
the same speed (HS) modes across all the stages of the Linux Boot. Due
to power cycling limitation of some of the ZynqMP boards, some SD cards
don't get power cycled and are failing in Linux.

Signed-off-by: Manish Narani <manish.narani@xilinx.com>
2020-04-06 12:51:31 +02:00
Nava kishore Manne
21620990cf arm64: zynqmp: Sync zynqmp fpga manager with mainline
Sync zynqmp fpga manager with mainline.

Signed-off-by: Nava kishore Manne <nava.manne@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Michal Simek
39419c21bf arm64: zynqmp: Remove unused zynqmp-clk.dtsi
All boards have been converted to firmware based driver that's why we can
remove this file now.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Michal Simek
d4fb2d1145 ARM: zynq: Fix spi name node
None name address should be aligned with address. DTC 1.5.1 is reporting
issues related to that.

arch/arm/boot/dts/zynq-zc770-xm010.dts:106.10-119.4: Warning
 (spi_bus_reg): /amba/spi@e0007000/flash@0: SPI bus unit address format
 error, expected "1"
arch/arm/boot/dts/zynq-zc770-xm013.dts:101.19-109.4: Warning
(spi_bus_reg): /amba/spi@e0006000/eeprom@0: SPI bus unit address format
 error, expected "2"

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Michal Simek
d31f1c9236 arm64: zynqmp: Update Copyright years to 2020
Trivial change.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Michal Simek
f695e1c889 arm64: zynqmp: Replace gpio-key,wakeup with wakeup source
The same change has been done for Zynq by commit 1241c72b6db1
("ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source property")
in mainline Linux kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:31 +02:00
Sudeep Holla
6bbe3e6c16 ARM: dts: zynq: replace gpio-key,wakeup with wakeup-source property
Most of the legacy "gpio-key,wakeup" boolean property is already
replaced with "wakeup-source". However few occurrences of old property
has popped up again, probably from the remnants in downstream trees.

Replace the legacy properties with the unified "wakeup-source"
property introduced in the Linux kernel commit 700a38b27eef
("Input: gpio_keys - switch to using generic device properties")

Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:30 +02:00
Quanyang Wang
0b792fd4f1 ARM: dts: zc702: Fix I2C bus warnings
The dtc has new checks for I2C and SPI buses.
Fix the warnings in node names and unit-addresses.

Warning from Linux kernel:
arch/arm/boot/dts/zynq-zc702.dts:187.13-190.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@52: I2C bus unit address format error, expected "34"
arch/arm/boot/dts/zynq-zc702.dts:191.13-194.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@53: I2C bus unit address format error, expected "35"
arch/arm/boot/dts/zynq-zc702.dts:195.13-198.6: Warning (i2c_bus_reg): /amba/i2c@e0004000/i2c-mux@74/i2c@7/hwmon@54: I2C bus unit address format error, expected "36"

Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:30 +02:00
Michal Simek
19de158db1 arm64: zynqmp: Enable cache command for mini mtest configuration
Enable cache commands by default for mtest configuration. It is good to be
able to enable/disable caches when you test memory.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:30 +02:00
T Karthik Reddy
74ce8f47d1 configs: versal: Add CONFIG_DISTRO_DEFAULTS to versal defconfig
Add DISTRO_DEFAULTS config to versal virt defconfig file which is
suitable for booting general purpose Linux distributions. Remove
other configs which are selected by default by DISTRO_DEFAULTS
configuration.

Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:30 +02:00
Michal Simek
c514301337 arm64: zynqmp: Print multiboot register value in EL3
Multi boot register can be used for using different boot images and design
better boot strategy. Let EL3 SPL or U-Boot to read it and print it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-04-06 12:51:30 +02:00
Jerome Brunet
e13e7c9dae arm64: dts: meson: add libretech-pc support
Add support for the Amlogic based libretech-pc platform.
This platform comes with 2 variant, based on the s905d or s912 SoC.

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
[narmstrong: update board/amlogic/q200/MAINTAINERS]
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-06 09:56:35 +02:00
Jerome Brunet
74f50b79e3 arm64: dts: meson: import libretech-pc from linux v5.6-rc2
Sync the libretech-pc device tree from Linux v5.6-rc2
11a48a5a18c6 ("Linux 5.6-rc2")

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-06 09:56:35 +02:00
Jerome Brunet
dd5f2351e9 arm64: dts: meson: sync dt and bindings from v5.6-rc2
Sync the device tree and dt-bindings from Linux v5.6-rc2
11a48a5a18c6 ("Linux 5.6-rc2")

The only exception to this is the mmc pinctrl pin bias of gxl SoC family.
This is a fix which found its way to u-boot but not Linux yet.

Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-06 09:56:35 +02:00
Jerome Brunet
b3d69aa596 clk: meson: reset mmc clock on probe
On some SoCs, depending on the boot device, the MMC clock block may be
left in a weird state by the ROM code, in which no decent clock may be
provided. Reset the related register to make sure a sane MMC clock is
ready for the controller.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Tested-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-06 09:56:35 +02:00
Jerome Brunet
0392416fb1 mmc: meson-gx: enable input clocks
Until now, the mmc clock was left in a good enough state by the ROM
code to be used by the controller. However on some SoC, if the ROM
code finds a bootloader on USB or SPI, it might leave the MMC clock
in state the controller cannot work with.

Enable the input clocks provided to the mmc controller. While the
u-boot mmc controller driver is not doing fancy settings like the Linux,
it at least needs to make these clocks are running.

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-06 09:56:35 +02:00
Jerome Brunet
423aabc436 dt-bindings: leds: import common led bindings from linux v5.5
Import the common leds bindings definition from linux
d5226fa6dbae ("Linux 5.5")

Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-06 09:56:35 +02:00
Heinrich Schuchardt
87a8f96759 clk: meson-g12a: missing break
Add missing break for CLKID_PCIE_PLL in switch statement.

Reported by CppCheck.

Cc: Neil Armstrong <narmstrong@baylibre.com>
Fixes: 08e09c263f ("clk: meson-g12a: Add PCIE PLL support")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Lukasz Majewski <lukma@denx.de>
Acked-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-04-06 09:56:35 +02:00
Tom Rini
2b18b89156 Merge branch 'next' of git://git.denx.de/u-boot-usb into next 2020-03-31 17:24:19 -04:00
Kever Yang
ac28e59a57 usb: Migrate to support live DT for some driver
Use ofnode_ instead of fdt_ APIs so that the drivers can support live DT.
This patch updates usb_get_dr_mode() and usb_get_maximum_speed() to use
ofnode as parameter instead of fdt offset. And all the drivers who use
these APIs update to use live dt APIs at the same time.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-03-30 03:48:53 +02:00
Kever Yang
2be1130a93 usb: ehci-msm: Use dev interface to get device address
Use dev_read_addr_ptr() instead of devfdt_get_addr() so that we can support
live DT.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2020-03-30 03:48:53 +02:00
Kever Yang
eea4810804 usb: dwc3-of-simple: Drop redundant inclding header file
The fdtdec.h is no use in this file, remove the include code.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-03-30 03:48:53 +02:00
Tom Rini
779e6dc6a4 Merge tag 'u-boot-stm32-20200324' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm into next
- stm32mp: fix command stboard
- stm32mp: update kernel device tree according the part number
- stm32mp: add 800 MHz profile support = stm32mp15xd and stm32mp15xf
- stm32mp: set cp15 frequency in psci cpu on
- stm32mp: DT alignment with Linux 5.6-rc1
- stm32mp: clk: add SPI5 support and correct CKSELR masks
- stm32mp: ram: fixes on LPDDR2/LPDDR3 support and on tuning
- stm32: i2c: allows for any bus frequency
- sti: timer: livetree and clk API conversion
2020-03-26 13:18:22 -04:00
Nicolas Heemeryck
5b5699cdc9 timer: sti: use clk API to get timer clock rate
Retrieve clock rate through device tree. This mimics the behavior of
arm_global_timer in Linux.

Signed-off-by: Nicolas Heemeryck <nicolas.heemeryck@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:23:35 +01:00
Nicolas Heemeryck
123123d695 timer: sti: convert to livetree
Update STI timer to support a live tree

Signed-off-by: Nicolas Heemeryck <nicolas.heemeryck@gmail.com>
Cc: Patrice Chotard <patrice.chotard@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:23:33 +01:00
Alain Volmat
c324465576 i2c: stm32f7_i2c: allows for any bus frequency
Do not limit to 3 (100KHz, 400KHz, 1MHz) bus frequencies, but
instead allow for any frequency. Depending on the requested
frequency (via the clock-frequency DT entry), use the spec
data from either Standard, Fast or Fast Plus mode.

In order to do so, the driver do not use anymore spec identifier
by directly handle the requested frequency and from it retrieve
the corresponding spec data to be used for the computation
of the timing register.

Signed-off-by: Alain Volmat <alain.volmat@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:23:32 +01:00
Patrick Delaunay
9368bdfebd ram: stm32mp1: the property st, phy-cal becomes optional
This parameter "st,phy-cal" becomes optional and when it is
absent the built-in PHY calibration is done.

It is the case in the helper dtsi file "stm32mp15-ddr.dtsi"
except if DDR_PHY_CAL_SKIP is defined.

This patch also impact the ddr interactive mode
- the registers of the param 'phy.cal' are initialized to 0 when
  "st,phy-cal" is not present in device tree (default behavior when
  DDR_PHY_CAL_SKIP is not activated)
- the info 'cal' field can be use to change the calibration behavior
  - cal=1 => use param phy.cal to initialize the PHY, built-in training
             is skipped
  - cal=0 => param phy.cal is absent, built-in training is used (default)

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:23:30 +01:00
Patrick Delaunay
d424e6786f ram: stm32mp1: reduce delay after BIST reset for tuning
Reduce the delay after BIST delay, from 1ms to 10us
which is enough accoriding datasheet.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:23:26 +01:00
Patrick Delaunay
b604a41c6b ram: stm32mp1_ddr: fix self refresh disable during DQS training
DDRCTRL_PWRCTL.SELFREF_EN needs to be reset before DQS training step, not
to enter in self refresh mode during the execution of this phase.
Depending on settings, it can be set after the DQS training.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:23:18 +01:00
Patrick Delaunay
8c9ce08075 ram: stm32mp1: update BIST config for tuning
Update the BIST config to compute the real use mask for the real
bank, row and col of the used DDR. The values are get from addrmap
register value.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:20:50 +01:00
Patrick Delaunay
27e7b4edea ram: stm32mp1: tuning: deactivate derating during BIST test
The derating (timing parameter derating using MR4 read value)
can't be activated during BIST test, as the MR4 read answer will
be not understood by BIST (BISTGSR.BDONE bit stay at 0,
BISTWCSR.DXWCNT = 0x206 instead of BISTWCR.BWCNT = 0x200).

This patch only impacts the tuning on LPDDR2/LPDDR3,
if derateen.derate_enable = 1.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:20:50 +01:00
Patrick Delaunay
f711d1f080 ram: stm32mp1: tuning: add timeout for polling BISTGSR.BDDONE
Avoid to block the tuning procedure on BIST error (not finished
BIST procedure) by adding a 1000us timeout on the polling of
BISTGSR.BDDONE executed to detect the end of BIST.

The normal duration of the BIST test is around 5us.

This patch also cleanup comments.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:20:50 +01:00
Patrick Delaunay
1c55a91b9d ram: stm32mp1: don't display the prompt two times
Remove one "DDR>" display on command
- next
- step
- go

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:20:50 +01:00
Patrick Delaunay
c8eb4e038c ram: stm32mp1: display result for software read DQS gating
Display result information for software read DQS gating, the tuning 0
which be used by CubeMX DDR tuning tools.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:20:50 +01:00
Patrick Delaunay
e9a20f8a19 ram: stm32mp1: increase vdd2_ddr: buck2 for 32bits LPDDR
Need to increase the LPDDR2/LPDDR3 the voltage vdd2_ddr: buck2
form 1.2V to 1.25V for 32bits configuration.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:20:50 +01:00
Patrick Delaunay
1a4f57c895 ARM: dts: stm32mp1: DT alignment with Linux 5.6-rc1
This commit manages diversity for STM32M15x SOCs with:
- dedicated files to support all STM32MP15 SOCs family.
  The differences between those SOCs are:
  -STM32MP151 [1]: common file.
  -STM32MP153 [2]: STM32MP151 + CANs + a second CortexA7-CPU.
  -STM32MP157 [3]: STM32MP153 + DSI + GPU.
- new files to manage security diversity on STM32MP15x SOCs.
  On STM32MP15xY, "Y" gives information:
  -Y = A means no cryp IP and no secure boot.
  -Y = C means cryp IP + secure boot.
- stm32mp157 pinctrl files to better manage package diversity.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:18:36 +01:00
Patrick Delaunay
0c90e0cf63 clk: stm32mp1: add SPI5_K support
Add clock support for SPI5, as this instance is available on extension
connector of ST board.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:18:09 +01:00
Patrick Delaunay
69ffb5577a clk: stm32mp1: correct CKSELR masks
Correct three masks used to access on the RCC register
RCC_QSPICKSELR, RCC_FMCCKSELR and RCC_ADCCKSELR: only 3 bits.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:18:09 +01:00
Ludovic Barre
40e70ab885 stm32mp: psci: set cntfrq register of cpu on
This path allows to set the cntfrq register of targeted cpu.

Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:17:38 +01:00
Patrick Delaunay
050fed8a97 stm32mp1: add 800 MHz profile support
The STM32MP1 series is available in 3 different lines which are pin-to-pin
compatible:
- STM32MP157: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz,
              3D GPU, DSI display interface and CAN FD
- STM32MP153: Dual Cortex-A7 cores, Cortex-M4 core @ 209 MHz
              and CAN FD
- STM32MP151: Single Cortex-A7 core, Cortex-M4 core @ 209 MHz

Each line comes with a security option (cryptography & secure boot)
& a Cortex-A frequency option :

- A : Cortex-A7 @ 650 MHz
- C : Secure Boot + HW Crypto + Cortex-A7 @ 650 MHz
- D : Cortex-A7 @ 800 MHz
- F : Secure Boot + HW Crypto + Cortex-A7 @ 800 MHz

This patch adds the support of STM32MP15xD and STM32MP15xF in U-Boot.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:16:33 +01:00
Patrick Delaunay
73306a125c arm: stm32mp: fdt: update kernel device tree according the part number
Update the kernel device tree for STM32MP15x product lines according
the used soc and its part number, when CONFIG_OF_SYSTEM_SETUP is activated:
- STM32MP15XA hasn't Crypto (cryp1/2)
- STM32M151 and STM32M153 hasn't 3D GPU and DSI host
- STM32M151 hasn't CAN FD and has single A7

For example:

FDT: cpu 1 node remove for STM32MP151AAA Rev.B
FDT: can@4400e000 node disabled for STM32MP151AAA Rev.B
FDT: gpu@59000000 node disabled for STM32MP151AAA Rev.B
FDT: dsi@5a000000 node disabled for STM32MP151AAA Rev.B

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:15:11 +01:00
Patrick Delaunay
ac5e4d8af8 arm: stm32mp: add function get_soc_name
Add a function get_soc_name to get a string with the full name
of the SOC "STM32MP15xxx Rev.x"

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:15:08 +01:00
Patrick Delaunay
61f6d46198 board: stm32mp1: display reference only for STMicroelectronics board
Display the reference MBxxxx found in OTP49
only for STMicroelectronics boards when CONFIG_CMD_STBOARD
is activated.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>

# Conflicts:
#	board/st/stm32mp1/stm32mp1.c
2020-03-24 14:15:05 +01:00
Patrick Delaunay
888dc68136 board: stm32mp1: add finished good in board identifier OTP
Update the command stboard to support the updated coding of OTP 59 with
finished good.

The ST product codification have several element
- "Commercial Product Name" (CPN): type of product board (DKX, EVX)
  associated to the board ID "MBxxxx"
- "Finished Good" or "Finish Good" (FG):
  effective content of the product without chip STM32MP1 (LCD, Wifi, …)
- BOM: cost variant for same FG
  (for example, several provider of the same component)

For example
- commercial product = STM32MP157C-EV1
- Finished Good = EVA32MP157A1$AU1

Booth information are written on board and these information is also saved
in OTP59:

bit [31:16] (hex) => Board id, MBxxxx
bit [15:12] (dec) => Variant CPN (1....15)
bit [11:8]  (dec) => Revision board (index with A = 1, Z = 26)
bit [7:4]   (dec) => Variant FG : finished good (NEW)
bit [3:0]   (dec) => BOM (01, .... 255)

The updated command is:
  stboard [-y] <Board> <VarCPN> <Revision> <VarFG> <BOM>

And the displayed STMicroelectronics board identification is:
  Board: MB<Board> Var<VarCPN>.<VarFG> Rev.<Revision>-<BOM>

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:14:40 +01:00
Patrick Delaunay
718f7bf7ca arm: stm32mp: improve the error message for smc
Add the SMC code and operation for trace on errors.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:05:35 +01:00
Patrick Delaunay
658fde8a36 board: stm32mp1: stboard: lock the OTP after programming
Lock the OTP used for board identification for the ST boards after
programming.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:05:35 +01:00
Patrick Delaunay
7ae22d7278 arm: stm32mp: bsec: add permanent lock support in bsec driver
Add BSEC lock access (read / write) at 0xC0000000 offset of misc driver.
The write access only available for Trusted boot mode, based on new
SMC STM32_SMC_WRLOCK_OTP.

With the fuse command, the permanent lock status is accessed with
0x10000000 offset (0xC0000000 - 0x8000000 for OTP sense/program
divided by u32 size), for example:

Read lock status of fuse 57 (0x39)

  STM32MP> fuse sense 0 0x10000039 1

  Sensing bank 0:

  Word 0x10000039: 00000000

Set permanent lock of fuse 57 (0x39)

  STM32MP> fuse prog 0 0x10000039 1

  Sensing bank 0:

  Word 0x10000039: 00000000

WARNING: the OTP lock is updated only after reboot

WARING: Programming lock or fuses is an irreversible operation!
        This may brick your system.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:05:35 +01:00
Patrick Delaunay
df2d1b8fc4 arm: stm32mp: bsec: remove unneeded test
Remove the test offs < 0 , as offs is unsigned.

This patch solves the warnings when compiling with W=1
on stm32mp1 board:

In function ‘stm32mp_bsec_read’:
arch/arm/mach-stm32mp/bsec.c:368:11: warning:
comparison of unsigned expression < 0 is always false [-Wtype-limits]
  368 |  if (offs < 0 || (offs % 4) || (size % 4))
      |           ^
In function ‘stm32mp_bsec_write’:
arch/arm/mach-stm32mp/bsec.c:405:11: warning:
comparison of unsigned expression < 0 is always false [-Wtype-limits]
  405 |  if (offs < 0 || (offs % 4) || (size % 4))
      |           ^

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:05:35 +01:00
Patrick Delaunay
fdabacecf0 board: stm32mp1: read OTP in command stboard
Read the value directly from the OTP and no more of the shadows
to avoid the need of reboot after stboard command to have correct value.

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:05:35 +01:00
Patrick Delaunay
16aa3e3fdc board: stm32mp1: update command stboard on misc_write result
Update management of misc_write, which now return length of data
after the commit 8729b1ae2c ("misc: Update read() and write()
methods to return bytes xfered")

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Acked-by: Patrice Chotard <patrice.chotard@st.com>
2020-03-24 14:05:35 +01:00
Tom Rini
2738f0edea Merge tag 'ti-v2020.07-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti into next
K3 J721E:
* OSPI boot support
* Support for loading remote cores in R5 SPL
* PMIC ESM Support
* Minor fixes for R5F and C7x remoteproc drivers

K3 AM654:
* Update AVS class 0 voltages.
* Add I2C nodes

DRA7xx/AM57xx:
* Fixed Android boot on AM57xx

AM33/AM43/Davinci:
* switch to driver model for the net and mdio driver for baltos
* Add DM/DTS support for omap video driver
* Enable fastboot on am335x-evm
2020-03-17 11:59:58 -04:00
Tom Rini
b180e32ea3 Merge tag '20200316-for-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c into next
i2c: for next
- i2c-gpio: make it possible to run deblock sequence on driver probe
- i2c-gpio: add clock stretching support
- updates the Designware I2C driver for high speed mode,
  fix a bug and add some improvements.
- add DM support for memory based bootcounter driver
2020-03-17 11:33:59 -04:00
Tom Rini
552c3d4c2d Merge branch '2020-03-16-kbuild-etc-resync-v4.18' into next
- Update our Kbuild / Kconfig and relate functionality to be in line
  with the Linux kernel v4.18 release.
2020-03-17 09:54:45 -04:00
Tom Rini
33b40389ea configs: Drop '$(ARCH)' usage in CONFIG_SPL_LDSCRIPT
In a few boards we had overridden, intentionally, the value used for
CONFIG_SPL_LDSCRIPT.  However, rather than using the ARCH value (arm)
they used the $(ARCH) variable in make.  This doesn't help really, so
switch to a hard-coded value.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-03-16 18:54:18 -04:00
Tom Rini
5972ff077e kconfig / kbuild: re-sync with Linux 4.18
Align Kconfig and Kbuild logic to Linux 4.18 release with minimal impact
on files outside of this scope.

Our previous Kconfig sync was done by commit e91610da7c ("kconfig:
re-sync with Linux 4.17-rc4").

A very small number of changes upstream since our sync with v4.17-rc4
that exist in the v4.18 release have already been applied here and have
been omitted from the list in this commit (and are readily available in
our own git history).

The imported Linux commits are:
[From prior to v4.17-rc4]
39a33ff80a25 kbuild: remove cc-option-align
db547ef19064 Kbuild: don't add obj tree in additional includes
b999596b963a Kbuild: don't add ../../ to include path

[From v4.17 to v4.18]
b3aa58d2e85d fixdep: suppress consecutive / from file paths in dependency list files
74656b682902 kbuild: disable new dtc graph and unit-address warnings
74d931716151 genksyms: remove symbol prefix support
e6ecfb45072c kbuild: do not display CHK for filechk
0b669a5076fd kconfig: refactor Qt package checks for building qconf
b464ef583dc7 kconfig: refactor GTK+ package checks for building gconf
1c5af5cf9308 kconfig: refactor ncurses package checks for building mconf and nconf
694c49a7c01c kconfig: drop localization support
96f60dfa5819 trace: Use -mcount-record for dynamic ftrace
bb222ceeb327 kconfig: remove string expansion in file_lookup()
96d8e48da55a kconfig: remove string expansion for mainmenu after yyparse()
5b31a9746756 kconfig: remove sym_expand_string_value()
137c0118a900 kconfig: make default prompt of mainmenu less specific
e298f3b49def kconfig: add built-in function support
2fd5b09c201e kconfig: add 'shell' built-in function
9de071536c87 kconfig: begin PARAM state only when seeing a command keyword
9ced3bddec08 kconfig: support user-defined function and recursively expanded variable
1175c02506ff kconfig: support simply expanded variable
ed2a22f277c6 kconfig: support append assignment operator
82bc8bd82e5c kconfig: expand lefthand side of assignment statement
1d6272e6fe43 kconfig: add 'info', 'warning-if', and 'error-if' built-in functions
a702a6176e2f kconfig: add 'filename' and 'lineno' built-in variables
915f64901eb3 kconfig: error out if a recursive variable references itself
2bece88f89fa kconfig: test: add Kconfig macro language tests
21c54b774744 kconfig: show compiler version text in the top comment
59f7b5847b0c kbuild: $(CHECK) doesnt need NOSTDINC_FLAGS twice
145167650b96 kbuild: add endianness flag to CHEKCFLAGS
1f2f01b122d7 kbuild: add machine size to CHECKFLAGS
d6a0c8a1326b kconfig: Add testconfig into make help output
bb6d83dde191 kbuild: Move last word of nconfig help to the previous line
8593080c0fcf kconfig: fix localmodconfig
ed7d40bc67b8 tracing: Fix SKIP_STACK_VALIDATION=1 build due to bad merge with -mrecord-mcount
b2d00d7c61c8 kconfig: fix line numbers for if-entries in menu tree
ecd53ac2f2c6 kconfig: handle P_SYMBOL in print_symbol()
73d1c580f92b kconfig: loop boundary condition fix
48f6e3cf5bc6 kbuild: do not drop -I without parameter
bd412d81b7ea kbuild: .PHONY is not a variable, but PHONY is
6916162c7308 kbuild: remove duplicated comments about PHONY

Cc: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
2020-03-16 18:54:18 -04:00
Rob Herring
6e916dfd9d scripts/dtc: Update to upstream version v1.4.6-21-g84e414b0b5bc
This adds the following commits from upstream:

84e414b0b5bc tests: Add a test case for the omit-if-no-ref keyword
4038fd90056e dtc: add ability to make nodes conditional on them being referenced
e1f139ea4900 checks: drop warning for missing PCI bridge bus-range
f4eba68d89ee checks: Print duplicate node name instead of parent name
46df1fb1b211 .travis.yml: Run valgrind checks via Travis
14a3002a1aee tests: Update valgrind suppressions for sw_tree1
02c5fe9debc0 tests: Remove valgrind error from tests/get_path
df536831d02c checks: add graph binding checks
2347c96edcbe checks: add a check for duplicate unit-addresses of child nodes
8f1b35f88395 Correct overlay syntactic sugar for generating target-path fragments
afbddcd418fb Suppress warnings on overlay fragments
119e27300359 Improve tests for dtc overlay generation

[From Linux Kernel commit 50aafd60898a8b3edf2f60e014a8288da3b2e5e3]
Signed-off-by: Rob Herring <robh@kernel.org>

[For applying to U-Boot]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-03-16 18:54:18 -04:00
Tom Rini
7261833f36 Azure / GitLab / Travis: Add Kconfig unit tests to a job
The Kconfig language provides a unit test that can be run.  As these
require pytest to be installed and run very quickly, bundle them in to
an existing CI job.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-03-16 18:54:18 -04:00
Tom Rini
2c59412a9f mach-davinci: Hard-code the default SPL_LDSCRIPT path
As there is only one linker script to use in this case, rather than use
the BOARDDIR variable hard-code the path.

Cc: Lokesh Vutla <lokeshvutla@ti.com>
Suggested-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
2020-03-16 18:54:18 -04:00
Tom Rini
38fec8de5f edminiv2: Move CONFIG_SPL_LDSCRIPT to defconfig
As there is only one machine under mach-orion5x, having a Kconfig entry
for SPL_LDSCRIPT is not helpful, move this to the defconfig file.

Suggested-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
2020-03-16 18:54:18 -04:00
Tom Rini
23830e98f5 mx31pdk: Move CONFIG_SPL_LDSCRIPT to defconfig
As there is only one mx31pdk config file and with upcoming updates to
the Kconfig parsing logic, rather than have an entry in
board/freescale/mx31pdk/Kconfig, move this single setting to the
defconfig file.

Cc: Magnus Lilja <lilja.magnus@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by:  Magnus Lilja <lilja.magnus@gmail.com>
2020-03-16 18:54:18 -04:00
Tom Rini
d91cf006ee Kconfig: Remove redundant variable sets
In a few places we have Kconfig entries that set SPL_LDSCRIPT to what is
the default value anyways.  Drop these.

Cc: Michal Simek <monstr@monstr.eu>
Cc: Rick Chen <rick@andestech.com>
Cc: Philippe Reynes <tremyfr@yahoo.fr>
Cc: Eric Jarrige <eric.jarrige@armadeus.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com> (for Microblaze)
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
2020-03-16 16:42:50 -04:00
Tom Rini
a356e7a86b spl: Kconfig: Escape '$(ARCH)' in LDSCRIPT entries
The default SPL / TPL linker script is in the $(ARCH) directory.  The
way we use this today works but isn't ideal.  With an update to Kconfig
to re-sync with the Linux Kernel, we need to escape the '$' here so that
it will end up being evaluated by make.

Cc: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
2020-03-16 16:42:50 -04:00
Masahiro Yamada
ddb87a0b40 kbuild: remove unused dtc-version.sh script
This is U-Boot own code, and no longer used since commit 36dd5f1b8a
("dtc: Switch to building and using our own dtc unless provided").

Prior to that commit, U-Boot relied on an external dtc, so this script
was used to check the dtc version.

Now U-Boot bundles our own dtc in script/dtc/dtc like Linux kernel.

Users are still allowed to pass DTC= option from the command line,
but they are supposed to choose correct version of dtc in this case.
So, we do not check the dtc version any more.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-03-16 16:42:50 -04:00
Masahiro Yamada
271cf2f421 spl.h: make <spl.h> self-contained
The static inline function spl_phase needs <asm/global_data.h>.

Some functions take pointers to struct blk_desc or image_header.
Add forward declarations.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-03-16 16:42:50 -04:00
Masahiro Yamada
77c4ba54c6 debug_uart.h: make <debug_uart.h> self-contained
'uint' is not a primitive type. You need to include <linux/types.h>
or otherwise change it to (unsigned int).

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-03-16 16:42:50 -04:00
Masahiro Yamada
4ca281a56c asm-generic/u-boot.h: make <asm-generic/u-boot.h> self-contained
This header uses 'phys_addr_t' and 'ulong'. Include the definitions.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
[trini: Move include to below __ASSEMBLY__ test]
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-03-16 16:42:33 -04:00
Masahiro Yamada
b36992fb6b global_data.h: make <asm-generic/global_data.h> self-contained
The compiler never knows what 'bd_t' is without including <asm/u-boot.h>.

By changing it to (struct bd_info), the compiler learns it is struct.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-03-16 12:49:09 -04:00
Tom Rini
7a212e5617 scripts/Makefile.lib: Re-add -Wno-simple_bus_reg to DTC_FLAGS
This exists in Linux Kernel with commit 70523a3ce5ff so put it in the
list of DTC_FLAGS that mirror Linux as we will catch up there.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
2020-03-16 12:49:09 -04:00
Tom Rini
aacf264bfd scripts/Makefile.lib: Restore PCI related warnings to DTC_FLAGS
While we are working on correcting usage related to the pci_bridge and
pci_device_bus_num warnings, disable these flags for now.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
2020-03-16 12:49:09 -04:00
Tom Rini
e0d1a89a5b kbuild: Re-sync DTC flag logic with v4.17
The way that we have been handling additional DTC warning flags hasn't
matched the way the Linux Kernel does.  Resync this logic with v4.17.

Signed-off-by: Tom Rini <trini@konsulko.com>
2020-03-16 12:49:09 -04:00
Tom Rini
67f2ee86cc kbuild: fixdep: Resync this with v4.17
The previous kbuild resync of e91610da7c ("kconfig: re-sync with Linux
4.17-rc4") accidentally did not sync the fixdep program.  This commit
brings fixdep in line with the rest of that previous resync.

This includes all of the following Linux kernel commits:
fbfa9be9904e kbuild: move include/config/ksym/* to include/ksym/*
5b8ad96d1a44 fixdep: remove some false CONFIG_ matches
14a596a7e6fd fixdep: remove stale references to uml-config.h
ab9ce9feed36 fixdep: use existing helper to check modular CONFIG options
87b95a81357d fixdep: refactor parse_dep_file()
5d1ef76f5a22 fixdep: move global variables to local variables of main()
ccfe78873c22 fixdep: remove unneeded memcpy() in parse_dep_file()
4003fd80cba9 fixdep: factor out common code for reading files
01b5cbe7012f fixdep: use malloc() and read() to load dep_file to buffer
41f92cffba19 fixdep: remove unnecessary <arpa/inet.h> inclusion
7c2ec43a2154 fixdep: exit with error code in error branches of do_config_file()
4e433fc4d1a9 fixdep: trivial: typo fix and correction
dee81e988674 fixdep: faster CONFIG_ search
c1a95fda2a40 kbuild: add fine grained build dependencies for exported symbols
d8329e35cc08 fixdep: accept extra dependencies on stdin
4c835b57b8de fixdep: constify strrcmp arguments

Of note is that when applying dee81e988674 above our logic in that area
required some careful consideration to continue to apply.

[Fold in bugfix to allow us to include 638e69cf2230 from upstream]
Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>

[Merge everything to U-Boot, rework dee81e988674]
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Masahiro Yamada <masahiroy@kernel.org>
2020-03-16 12:49:09 -04:00
Masahiro Yamada
8a266e5800 fixdep: fix U-Boot own code to handle only valid symbol characters
Currently, fixdep skips parsing include/linux/kconfig.h, but if it
parsed it, it would translate the following code in kconfig.h

  config_enabled(CONFIG_VAL(option##_MODULE)

into:

  $(wildcard include/config/option##/module.h)

When Kbuild includes .*.cmd, it would emit the following error:

  *** unterminated call to function 'wildcard': missing ')'.  Stop.

This issue prevents us from importing the upstream Linux commit
638e69cf2230 ("fixdep: do not ignore kconfig.h").

Fix this by handling only alphanumerical characters and underscores.
This makes sense because they match to the valid character sets in
Kconfig symbols.

As a side-note, you can reproduce this issue only on GNU Make <= 4.2.1

For GNU Make <= 4.2.1, the '#' always means the start of a comment.
Hence, GNU Make thinks the closing ')' is missing.

The following commit in GNU Make changed how it handles '#' in
function invocations. So, this does not happen for GNU Make 4.3

| commit c6966b323811c37acedff05b576b907b06aea5f4
| Author: Paul Smith <psmith@gnu.org>
| Date:   Thu Dec 22 18:47:26 2016 -0500
|
|    [SV 20513] Un-escaped # are not comments in function invocations

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Reported-by: Tom Rini <trini@konsulko.com>
2020-03-16 12:49:09 -04:00
Heiko Schocher
80e8b8add0 bootcounter: add DM support for memory based bootcounter
add DM/DTS support for the memory based bootcounter
in drivers/bootcount/bootcount.c.

Let the old implementation in, so boards which have
not yet convert to DM/DTS do not break.

Signed-off-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-03-16 08:05:00 +01:00
Jun Chen
27d483bfa3 i2c: designware_i2c: add 'hs_hcnt' and 'hs_lcnt' for high speed
Add support for high speed if scl_sda_cfg exist.

Signed-off-by: Jun Chen <ptchentw@gmail.com>
Signed-off-by: Jun Chen <jun.chen@vatics.com>
2020-03-16 08:04:29 +01:00
Jun Chen
be26342314 i2c: designware_i2c: remove 'has_high_speed'
Remove 'has_high_speed' config since we can check high speed support
from IC_COMP_PARAM_1 register.

Signed-off-by: Jun Chen <ptchentw@gmail.com>
Signed-off-by: Jun Chen <jun.chen@vatics.com>
2020-03-16 08:04:17 +01:00
Jun Chen
565e328b95 i2c: designware_i2c: check is high speed possible support
To read IC_COMP_PARAM_1[3:2] to check is high speed possible,
and fall back to fast mode if not.

Signed-off-by: Jun Chen <ptchentw@gmail.com>
Signed-off-by: Jun Chen <jun.chen@vatics.com>
2020-03-16 08:04:09 +01:00
Jun Chen
70c894f85e i2c: designware_i2c: Fix IC_CON register setting for high speed mode
IC_CON[2:1] should be 3 for high speed mode

Signed-off-by: Jun Chen <ptchentw@gmail.com>
Signed-off-by: Jun Chen <jun.chen@vatics.com>
2020-03-16 08:03:53 +01:00
Masahiro Yamada
0c17bb1cbe misc: i2c_eeprom: store pagesize instead of pagewidth in i2c_eeprom_drv_data
Associate the pagesize with compatible strings, and copy it to
priv->pagesize. This is more straight-forward.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-03-16 08:03:29 +01:00
Suman Anna
445b45042c remoteproc: k3-r5: Fix rproc init failure on Split-mode _only_ devices
The R5F subsystem/cluster on K3 SoCs can support both LockStep and
Split-modes (superset) or just Split-mode depending on an eFUSE
capability register. The LockStep configuration bit is Read-only
though on Split-mode _only_ devices and as such the System Firmware
does not allow the LockStep mode bit to be configured on such devices.
The current logic in k3_r5f_rproc_configure() fails on Split-mode
devices because of this unconditional programming of the LockStep
mode bit, and results in the probe failure shown during the
"rproc init" step at U-Boot prompt.

Fix this by limiting the LockStep mode bit clear configuration only on
devices supporting both LockStep/Split-modes.

Fixes: 4c850356a8 ("remoteproc: Introduce K3 remoteproc driver for R5F subsystem")
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-16 12:33:19 +05:30
Masahiro Yamada
ed6dd4e460 misc: i2c_eeprom: remove pagewidth field from i2c_eeprom
This struct member is not used in any effective way. Remove it.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
2020-03-16 08:03:05 +01:00
Suman Anna
0438a0a181 remoteproc: k3-r5: Fix rproc init failure for Main R5FSS0
The Main R5FSS0 cluster is also enabled to probe the R5F remoteproc
driver within R5 SPL for booting the Core0 very early. This results
in a ti_sci_power_domain_on failure during the probe from the A72
U-Boot when "rproc init" is executed at U-Boot prompt, and doesn't
enumerate all the rproc devices.

Fix this by suppressing the power_domain_on altogether using the
flag DM_FLAG_DEFAULT_PD_CTRL_OFF added in commit af94ad418d
("dm: core: Allow for not controlling the power-domain by DM framework").

Fixes: fac6aa817a ("configs: j721e_evm_r5: Enable R5F remoteproc support")
Signed-off-by: Suman Anna <s-anna@ti.com>
2020-03-16 12:33:03 +05:30
Suman Anna
42005817ee remoteproc: k3-dsp: Add support for L2RAM loading on C66x DSPs
The resets for the DSP processors on K3 SoCs are managed through the
Power and Sleep Controller (PSC) module. Each DSP typically has two
resets - a global module reset for powering on the device, and a local
reset that affects only the CPU while allowing access to the other
sub-modules within the DSP processor sub-systems.

The C66x DSPs have two levels of internal RAMs that can be used to
boot from, and the firmware loading into these RAMs require the
local reset to be asserted with the device powered on/enabled using
the module reset. Enhance the K3 DSP remoteproc driver to add support
for loading into the internal RAMs. The local reset is deasserted on
SoC power-on-reset, so logic has to be added in probe in remoteproc
mode to balance the remoteproc state-machine.

Note that the local resets are a no-op on C71x cores, and the hardware
does not supporting loading into its internal RAMs.

Signed-off-by: Suman Anna <s-anna@ti.com>
2020-03-16 12:32:47 +05:30
Suman Anna
8f4109e09d armv8: K3: j721e: Add DSP internal memory regions in MMU table
The A72 U-Boot code supports early load and boot of a number of
remote processors including the C66_0 and C66_1 DSPs. The current
code supports only loading into the DDR regions which were already
given the appropriate memory attributes. The C66 DSPs also have L1
and L2 internal memory regions that can behave as normal-memories.

Add a new entry to the J721E MMU table covering these regions with
the appropriate memory attributes to allow the A72 U-Boot code to
support loading directly into these memory regions.

Signed-off-by: Suman Anna <s-anna@ti.com>
2020-03-16 12:32:47 +05:30
Suman Anna
1e53d5b585 remoteproc: k3-dsp: Add a sanity check for DSP boot address alignment
The DSP remote processors on K3 SoCs require a boot register to be
programmed with a boot address, and these boot addresses need to be
aligned on certain address boundaries. The current code does not have
any error checks, and relies on the System Firmware to perform the
checking. Add logic to perform this sanity check within the remoteproc
driver itself to detect these anomalies specifically, and print a
meaningful trace. This avoids the cumbersome debug of root-causing
such failures from the corresponding TI-SCI failure.

The C66x and C71x DSP cores have different alignment needs and are
as follows:
	C66x DSP = 1 KB (0x400)
	C71x DSP = 2 MB (0x200000)

Signed-off-by: Suman Anna <s-anna@ti.com>
2020-03-16 12:32:47 +05:30
Suman Anna
0020003ef3 remoteproc: k3-dsp: Fix unbalanced state machine in k3_dsp_start
The global module reset is deasserted through the ti_sci_power_domain_on()
call in k3_dsp_start(), but is not asserted back if the local module reset
fails. Fix this.

While at this, remove the stale comment about assigned-clock-rates that
seems to have been copied from the K3 ARM64 Remoteproc driver.

Fixes: ab827b3857 ("remoteproc: Introduce K3 C66 and C71 remoteproc driver")
Signed-off-by: Suman Anna <s-anna@ti.com>
2020-03-16 12:32:47 +05:30
Heiko Schocher
ba6fb2f6ac dm: i2c-gpio: add support for clock stretching
This adds support for clock stretching to the i2c-gpio driver. This is
accomplished by switching the GPIO used for the SCL line to an input
when it should be driven high, and polling on the SCL line value until
it goes high (indicating that the I2C slave is no longer pulling it
low).

This is enabled by default; for gpios which cannot be configured as
inputs, the i2c-gpio,scl-output-only property can be used to fall back
to the previous behavior.

Signed-off-by: Michael Auchter <michael.auchter@ni.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-03-16 07:55:06 +01:00
Michael Auchter
7383edc2fb dm: i2c-gpio: rework gpio get/set functions
This patch reworks i2c-gpio to make it easier to switch out the
implementation of the sda/scl get/set functions. This is in preparation
for a patch to conditionally implement clock stretching support.

Signed-off-by: Michael Auchter <michael.auchter@ni.com>
Cc: Heiko Schocher <hs@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-03-16 07:48:15 +01:00
Marek Vasut
092d9ea26c doc: i2c: gpio: Document deblock sequence on probe
Document the gpio-i2c deblocking sequence binding.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-03-16 07:47:52 +01:00
Marek Vasut
4368c6a2bc i2c: gpio: Run deblock sequence on probe
Add deblock dequence for the I2C bus, needed on some devices. This sequence
is issued once, when probing the driver, and is controlled by DT property,
"i2c-gpio,deblock".

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-03-16 07:46:31 +01:00
Marek Vasut
a191728633 i2c: Add option to send start condition after deblocking
Add option to send start condition after deblocking SDA.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-03-16 07:46:21 +01:00
Marek Vasut
7231522a5e i2c: Export i2c_deblock_gpio_loop()
Export the i2c_deblock_gpio_loop() so it can be used in other places in
U-Boot. In particular, this is useful in the GPIO I2C driver, which claims
the SDA/SCL GPIOs and thus prevents the i2c_deblock() implementation from
claiming the pins as GPIOs again.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-03-16 07:46:04 +01:00
Marek Vasut
1f746a2c82 i2c: Make deblock delay and SCL clock configurable
Make the delay between SCL line changes and the number of SCL clock
changes configurable as a parameter of the deblock function. No
functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Heiko Schocher <hs@denx.de>
2020-03-16 07:45:53 +01:00
Tom Rini
e24f0a39d0 Merge branch '2020-03-12-rsa-improvements' into next
(Description from AKASHI Takahiro)

extend rsa_verify() for UEFI secure boot:

The current rsa_verify() requires five parameters for a RSA public key
for efficiency while RSA, in theory, requires only two. In addition,
those parameters are expected to come from FIT image.

So this function won't fit very well when we want to use it for the
purpose of implementing UEFI secure boot, in particular, image
authentication as well as variable authentication, where the essential
two parameters are set to be retrieved from one of X509 certificates in
signature database.

So, in this patch, additional three parameters will be calculated on the
fly when rsa_verify() is called without fdt which should contain
parameters above.

This calculation heavily relies on "big-number (or multi-precision)
library." Therefore some routines from BearSSL under MIT license are
imported in this implementation.
2020-03-12 12:45:27 -04:00
AKASHI Takahiro
2201fe70d8 test: enable RSA library test on sandbox
We want to always run RSA library test on sandbox build in Travis CI.
Just adding CONFIG_RSA_VERIFY_WITH_PKEY would be good enough for this
purpose.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-03-12 08:20:39 -04:00
AKASHI Takahiro
d090b39ecb test: add rsa_verify() unit test
In this patch, a very simple test is added to verify that rsa_verify()
using rsa_verify_with_pkey() work correctly.

To keep the code simple, all the test data, either public key and
verified binary data, are embedded in the source.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-03-12 08:20:39 -04:00
AKASHI Takahiro
0cc7a7535f lib: rsa: add rsa_verify_with_pkey()
This function, and hence rsa_verify(), will perform RSA verification
with two essential parameters for a RSA public key in contract of
rsa_verify_with_keynode(), which requires additional three parameters
stored in FIT image.

It will be used in implementing UEFI secure boot, i.e. image authentication
and variable authentication.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-03-12 08:20:39 -04:00
AKASHI Takahiro
e0d310b098 lib: rsa: generate additional parameters for public key
In the current implementation of FIT_SIGNATURE, five parameters for
a RSA public key are required while only two of them are essential.
(See rsa-mod-exp.h and uImage.FIT/signature.txt)
This is a result of considering relatively limited computer power
and resources on embedded systems, while such a assumption may not
be quite practical for other use cases.

In this patch, added is a function, rsa_gen_key_prop(), which will
generate additional parameters for other uses, in particular
UEFI secure boot, on the fly.

Note: the current code uses some "big number" routines from BearSSL
for the calculation.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
2020-03-12 08:20:39 -04:00
AKASHI Takahiro
a8fc3df8b9 include: image.h: add key info to image_sign_info
For FIT verification, all the properties of a public key come from
"control fdt" pointed to by fdt_blob. In UEFI secure boot, on the other
hand, a public key is located and retrieved from dedicated signature
database stored as UEFI variables.

Added two fields may hold values of a public key if fdt_blob is NULL, and
will be used in rsa_verify_with_pkey() to verify a signature in UEFI
sub-system.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-03-12 08:20:39 -04:00
AKASHI Takahiro
dd89f5b0fd rsa: add CONFIG_RSA_VERIFY_WITH_PKEY config
In the next couple of commits, under new CONFIG_RSA_VERIFY_WITH_PKEY,
rsa_verify() will be extended to be able to perform RSA decryption without
additional RSA key properties from FIT image, i.e. rr and n0inv.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-03-12 08:20:39 -04:00
AKASHI Takahiro
b983cc2da0 lib: rsa: decouple rsa from FIT image verification
Introduce new configuration, CONFIG_RSA_VERIFY which will decouple building
RSA functions from FIT verification and allow for adding a RSA-based
signature verification for other file formats, in particular PE file
for UEFI secure boot.

Signed-off-by: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-03-12 08:20:38 -04:00
Eugeniu Rosca
d08b16edf8 image.h: isolate android_image_* functions from tooling
On Feb. 16, 2020, Tom reported [1] build failure of U-Boot in-tree
tooling after applying https://patchwork.ozlabs.org/cover/1229663/
("[v6,0/7] rsa: extend rsa_verify() for UEFI secure boot").

Later on, Heinrich stressed the urgency of the issue in
https://patchwork.ozlabs.org/patch/1250858/#2379069:

 >>>>>>>>>
 We should finalize the topic as it stops EFI patches from being merged
 >>>>>>>>>

On the surface, the problem is caused by U-Boot commits [2-3], which
employed 'u32' in 'include/image.h', while historically U-Boot tooling
stayed agnostic on the {u,s}{8,16,32} types.

Thanks to Tom, Yamada-san and Heinrich, the following solutions have
been put head-to-head ('+' pros, '-' cons):

 A. Use an equivalent fixed-size type, i.e. s/u32/uint32_t/ in both
    android function prototypes (image.h) and definitions (c file):
    + quick and low-line-count
    - creates a 'soup' of fixed-sized types in the Android C file
    - will confuse contributors
    - is going against Linux kernel best practices [4]

 B. Guard Android functions by '!defined(USE_HOSTCC)' in image.h:
    + quick and low-line-count
    + reflects the reality (no android function is used by tooling)
    + zero impact on other subsystems
    - ifdeffery may look annoying (pre-existing problem of image.h)

 C. Make {u8,u16,u32} available in U-Boot tooling:
    + quick and low-line-count
    + [Yamada-san][5]:
      * forbidding u32 for tools is questionable to me
      * Linux kernel and Barebox use {u8,u16,u32} for the tools space
    - breaks U-Boot tradition?
    - has larger impact than [A] and [B]
    - adds type complexity/inconsistency in the tooling space

 D. [Yamada-san] Refactor the headers to minimize the code shared
    between U-Boot space and tooling space:
    + probably the long-term solution
    - high effort
    - can be seen/done as an incremental update on top of [B]

Looking at the above, [B] looks like the natural way to go forward.

[1] https://patchwork.ozlabs.org/patch/1238245/#2363052
[2] commit 7f2531502c ("image: android: Add routine to get dtbo params")
[3] commit c3bfad825a ("image: android: Add functions for handling dtb field")
[4] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=e6176fa4728fb6d
    ("checkpatch: add --strict warning for c99 fixed size typedefs : int<size>_t")
[5] https://patchwork.ozlabs.org/patch/1238245/#2363340

Cc: Masahiro Yamada <masahiroy@kernel.org>
Cc: Heinrich Schuchardt <xypron.glpk@gmx.de>
Cc: Sam Protsenko <joe.skb7@gmail.com>
Cc: Lokesh Vutla <lokeshvutla@ti.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: AKASHI Takahiro <takahiro.akashi@linaro.org>
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Eugeniu Rosca <erosca@de.adit-jv.com>
Tested-by: Heinrich Schuchardt <xpyron.glpk@gmx.de>
2020-03-12 08:20:38 -04:00
Lokesh Vutla
6e44aebdbb arm: mach-k3: Add a separate function for printing sysfw version
Add a separate function for printing sysfw version so that it can be
called independently of k3_sysfw_loader.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-11 08:56:49 +05:30
Andrew F. Davis
a98fb62a4c defconfigs: am65x_hs_evm: Sync HS and non-HS defconfigs
Additions have been made to the non-HS defconfig without the same
being made to the HS defconfig, sync them.

Signed-off-by: Andrew F. Davis <afd@ti.com>
2020-03-11 08:56:14 +05:30
Andrew F. Davis
2fcaa84d01 board: ti: README: Update OP-TEE binary name
The OP-TEE binary to use is renamed to v2 as the v1 binary has been
deprecated and is no longer built by default.

Reported-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Andrew F. Davis <afd@ti.com>
2020-03-06 12:53:08 +05:30
Keerthy
6d310ba50c arm: dts: k3-j721e-r5-common-proc-board: Add ospi1 flash node
Add ospi1 flash node required for QSPI boot.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-06 12:53:00 +05:30
Keerthy
769c94263f arm: dts: k3-j721e-mcu-wakeup: Add assigned-clocks/rates properties for ospi1/qspi
Add assigned-clocks/rates properties for ospi1/qspi.
This is the expected rate as per ROM configuration.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-06 12:53:00 +05:30
Keerthy
896cf0e20a arm: dts: k3-j721e: Enable ospi1/qspi
Enable the ospi1/qspi for both r5 and a72 configurations.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-06 12:53:00 +05:30
Sam Protsenko
4ca78154e1 configs: am335x_evm: Enable Fastboot
This config option was present in am335x_boneblack_defconfig, but we
have to use generic am335x_evm_defconfig now, as BBB defconfig was
removed in commit 8fa7f65dd0 ("configs: Remove
am335x_boneblack_defconfig"). So this patch merely brings that option
back.

Tested on BeagleBone Black:

    => fastboot 0
    $ fastboot flash rootfs rootfs.img

Fixes: 8fa7f65dd0 ("configs: Remove am335x_boneblack_defconfig")
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
2020-03-03 13:10:37 +05:30
Sam Protsenko
3d9433e70c configs: am335x_evm: Enable DFU over TFTP support
DFU over TFTP flashing method might be helpful in order to speed-up the
flashing process of big images (as DFU works over USB EP0, which is
quite slow). Also, it's a good backup option in the case when USB got
broken (either in software or hardware), to avoid resorting to SD card
boot.

This config option was present in am335x_boneblack_defconfig, but we
have to use generic am335x_evm_defconfig now, as BBB defconfig was
removed in commit 8fa7f65dd0 ("configs: Remove
am335x_boneblack_defconfig"). So this patch merely brings that option
back.

Tested on BeagleBone Black:

    => setenv dfu_alt_info $dfu_alt_info_emmc
    => setenv ipaddr 192.168.0.100
    => setenv serverip 192.168.0.1
    => setenv updatefile update_uboot.itb
    => dfu tftp mmc 1

Where 'update_uboot.its' file looks like this:

    /dts-v1/;

    / {
        description = "Automatic U-Boot update";
        #address-cells = <1>;

        images {
            u-boot.img.raw-1 {
                description = "U-Boot binary";
                data = /incbin/("u-boot.img");
                compression = "none";
                type = "firmware";
                load = <0x60000>;
                hash-1 {
                    algo = "sha1";
                };
            };
        };
    };

And 'update_uboot.itb' is generated as follows:

    $ mkimage -f update_uboot.its update_uboot.itb

Newly flashed U-Boot works fine.

Fixes: 8fa7f65dd0 ("configs: Remove am335x_boneblack_defconfig")
Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
2020-03-03 13:10:20 +05:30
Lokesh Vutla
57b2712b2b dma: ti: k3-udma: Mark flow id as valid parameter for RX channel config
When flow id is not marked as valid, sysfw reads the register value to
get the range of flow ids that are supported. Then compares the flow range
with the U-Boot's host id. This will definitely fail as board
configuration doesn't assign the full range to U-Boot's host id. In order
to work around this, mark the flow id as valid and pass range as 0.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03 13:08:14 +05:30
Lokesh Vutla
11e47de3c9 firmware: tisci: Drop all deprecated messages
SYSFW v2020.01 and later versions no longer supports the below messages:
- TI_SCI_MSG_RM_RING_GET_CFG
- TISCI_MSG_RM_UDMAP_TX_CH_GET_CFG   0x1206
- TISCI_MSG_RM_UDMAP_RX_CH_GET_CFG   0x1216
- TISCI_MSG_RM_UDMAP_FLOW_GET_CFG        0x1232
- TISCI_MSG_RM_UDMAP_FLOW_SIZE_THRESH_GET_CFG    0x1233

There are no users in U-Boot for any of the above messages, So drop the
support for all the corresponding messages.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03 13:08:14 +05:30
Lokesh Vutla
7e3221d6a4 board: ti: k3: Update the sysfw image gen repository
Now k3-image-gen[0] is the official repository for generating sysfw.itb
Update the same in AM65x and J721e README.

[0] https://git.ti.com/cgit/k3-image-gen/k3-image-gen/

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03 13:08:14 +05:30
Sam Protsenko
41ee72f48b env: ti: boot: Fix Android boot on AM57x EVM
When applying DTBO on top of DTB (with "fdt apply" command) on AM57x EVM
board, there is not enough memory reserved in RAM for DTB blob. Hence,
DTBO can't be merged in DTB. It leads to inability to boot Android with
next error message:

    failed on fdt_overlay_apply(): FDT_ERR_NOSPACE

To overcome that issue let's provide 512 KiB of space to keep DTB and
all merged DTBO blobs. To do so, "length" parameter should be specified
for "fdt addr" command:

    => fdt addr $fdtaddr 0x80000

512 KiB is the maximum size we can use for this, because next address
after $fdtaddr is 512 KiB ahead of it:

    fdtaddr=0x88000000
    rdaddr=0x88080000

Also add size variables to 'adtimg' command invocations, to avoid
cluttering the console with DTBO blob sizes.

Signed-off-by: Sam Protsenko <joe.skb7@gmail.com>
Reviewed-by: Eugeniu Rosca <rosca.eugeniu@gmail.com>
2020-03-03 13:08:14 +05:30
Vignesh Raghavendra
360c86b162 arm: dts: k3-am654-base-board: Enable I2C nodes
Add DT nodes for main domain I2Cs and its slave devices

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:14 +05:30
Dario Binacchi
449c5e5211 board: brxre1: fix building errors
Fix building errors if CONFIG_DM_VIDEO is enabled. This is the only
u-boot board that enables CONFIG_AM335X_LCD and from which I started
to develop the version of the frame buffer driver that supports the
driver model.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Dario Binacchi
0aff8e2615 video: omap: fix pixel-per-line bitfield setting
Fix the macro to set the pplmsb field (bit 3) of the RASTER_TIMING_0
register. It is used in order to support up to 2048 pixels per line.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Dario Binacchi
cb8680a4b8 fdt: video: omap: add framebuffer and panel bindings
Add device-tree binding documentation for ti framebuffer and generic
panel output driver.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Simon Glass <sjg@chromium.org>
2020-03-03 13:08:14 +05:30
Dario Binacchi
72e0a0e1c7 arm: dts: am335x: add 'u-boot, dm-pre-reloc' to panel
Add the "u-boot,dm-pre-reloc" property to the "ti,tilcdc,panel"
compatible node. In this way the video-uclass module can allocate the
amount of memory needed to be assigned to the frame buffer.
For boards that support Linux the property is added to the *-u-boot.dtsi
file since it is a u-boot specific dt flag.

Ran building tests with CONFIG_AM335X_LCD enabled and disabled for the
following configurations:
 - brxre1_defconfig           --> success
 - am335x_guardian_defconfig  --> success
 - am335x_evm_defconfig       --> success
 - da850evm_defconfig         --> failure with CONFIG_AM335X_LCD enabled

Enabling CONFIG_AM335X_LCD in da850evm_defconfig causes building errors
even without applying the patch. The driver has never been enabled on the
da850 and must be adapted for this platform.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Tested-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Felix Brack <fb@ltec.ch>
2020-03-03 13:08:14 +05:30
Dario Binacchi
96b109ba74 video: omap: add support for DM/DTS
Update the driver to support the device tree and the driver model.
Timings and panel parameters are now loaded from the device tree.

The DM code replaces the am335x_lcdpanel structure with
tilcdc_panel_info taken from the linux kernel, as well the management
of additional parameters not covered in the legacy code. In addition,
the am335x_lcdpanel structure contains parameters and operations that
were probably a requirement of the board for which this driver was
developed and which, however, were not developed in the linux kernel.
All this led to rewrite th DM controller initialization code, except
for the pixel clock setting that is executed in a function created in a
previous patch with code taken from the legacy am335xfb_init.

The patch has been tested on a custom board with u-boot 2018.11-rc2 and
the following device-tree configuration:

	panel {
		compatible = "ti,tilcdc,panel";
		pinctrl-names = "default";
		pinctrl-0 = <&lcd_enable_pins>;
		enable-gpios = <&gpio0 31 0>;
		backlight = <&backlight>;
		status = "okay";
		u-boot,dm-pre-reloc;
		panel-info {
			ac-bias           = <255>;
			ac-bias-intrpt    = <0>;
			dma-burst-sz      = <16>;
			bpp               = <16>;
			fdd               = <0x80>;
			sync-edge         = <0>;
			sync-ctrl         = <1>;
			raster-order      = <0>;
			fifo-th           = <0>;
		};
		display-timings {
			native-mode = <&timing0>;
			timing0: 800x480 {
				hactive         = <800>;
				vactive         = <480>;
				hback-porch     = <46>;
				hfront-porch    = <210>;
				hsync-len       = <20>;
				vback-porch     = <23>;
				vfront-porch    = <22>;
				vsync-len       = <10>;
				clock-frequency = <33000000>;
				hsync-active    = <0>;
				vsync-active    = <0>;
			};
		};
	};

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Tested-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Dario Binacchi
a9df3c50ed video: omap: create two routines to set the pixel clock rate
Created in preparation to support driver-model, they can also be called
from legacy code. In this way, code duplication is avoided.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Dario Binacchi
9d7f53c1e5 video: omap: add loop exit conditions to the dpll setup
In case of null error, round rate is equal to target rate, so it is
useless to continue to search the DPLL setup parameters to get the
desidered pixel clock rate.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03 13:08:14 +05:30
Dario Binacchi
9aead9ae09 video: omap: fix debug message
"DISP" -> "DIV"

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03 13:08:14 +05:30
Dario Binacchi
41f76a01f3 video: omap: rename LCD controller registers
Add more clarity by prefixing the name of the register to the bitfields.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Dario Binacchi
017295f31d video: omap: fix bitfields order
Arrange the bitfields of each register in the ascending order.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Dario Binacchi
3af43750df video: omap: fix coding style on use of spaces
Use one space around (on each side of) the binary '-' operator.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Dario Binacchi
e3f82b80cd video: omap: add missing bitfield masks
Add, if missing, the bitfield masks in the setting macros of the LCD
controller registers.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Dario Binacchi
a2f4706479 video: omap: use BIT() and GENMASK() macros
Use the standard BIT() and GENMASK() macros for bitfield definitions.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
2020-03-03 13:08:14 +05:30
Yegor Yefremov
1ecf7d9405 arm: baltos: switch to driver model for the net and mdio driver
Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
3e7b0aa1fd power: mfd: k3_avs: update am65xx MPU_VDD voltage values
The latest data manual SPRSP08I –NOVEMBER 2017–REVISED DECEMBER 2019[1]
for am65xx SoC states the new MPU nominal voltages to be 1.1V (OPP_NOM),
1.2V (OPP_OD) and 1.24V (OPP_TURBO). Update the nominal voltages in the
K3 AVS driver to reflect this.

[1] http://www.ti.com/lit/gpn/am6528

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
54e0ab4d8b configs: j721e_evm_r5_defconfig: Enable ESM modules
Enable ESM modules for both PMIC and SoC side for proper watchdog
handling on the board.

SPL_BOARD_INIT is also enabled so that the board init function
probing the drivers is called.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
fa281f64a1 board: ti: j721e: initialize ESM support
Initialize both ESM and ESM_PMIC support if available for the board.
If support is not available for either, a warning is printed out.

ESM signals are only properly routed on PM2 version of the J721E SOM,
so only probe the drivers on this device.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
91600a6a84 arm: dts: k3-j721e: Add ESM PMIC support for tps659413 based board
The ESM handling on J7 processor board requires routing the
MCU_SAFETY_ERROR signal to the PMIC on the board for critical safety
error handling. The PMIC itself should then reset the board based on
receiving it. Enable the support for the board by adding the esm
node in place.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
7304546071 arm: dts: k3-k721e: Add Main domain ESM support
Main domain ESM support is needed to configure main domain watchdogs
to generate ESM pin events by default. On J7 processor board these
propagate to the PMIC to generate a reset when watchdog expires.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
3b36b38f50 misc: pmic_esm: Add support for PMIC ESM driver
The ESM (Error Signal Monitor) is used on certain PMIC versions to
handle error signals propagating from rest of the system. If these
reach the PMIC, it is typically a last resort fatal error which
requires a system reset. The ESM driver does the proper configuration
for the ESM module to reach this end goal. Initially, only TPS65941
PMIC is supported for this.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
344eb6d572 misc: k3_esm: Add support for Texas Instruments K3 ESM driver
The ESM (Error Signaling Module) is used to route error signals within
the K3 SoCs somewhat similar to interrupts. The handling for these is
different though, and can be routed for hardware error handling, to
be handled by safety processor or just as error interrupts handled
by the main processor. The u-boot level ESM driver is just used to
configure the ESM signals so that they get routed to proper destination.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Tero Kristo
8cd10a494f power: pmic: tps65941: Add support for probing the child devices
TPS65941 can have child devices under it (like the ESM support), so
probe these once the master pmic node completes probe.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
d7de70be41 configs: j721e_evm_r5_defconfig: Remove saving ENV in eMMC
Remove saving ENV in eMMC in R5 as the power domains are not
setup. Environment in eMMC cannot be read if we do not boot from
eMMC.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
fac6aa817a configs: j721e_evm_r5: Enable R5F remoteproc support
Enable R5F remoteproc support in R5 defconfig so that R5s can
be started in SPL. While at it enable the SPL_FS_EXT4 config
option to load the firmwares from file system.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
316c927135 include: configs: j721e_evm: Add env variables for mcu_r5fss0_core0 & main_r5fss0_core0
Add env variables for mcu_r5fss0_core0 & main_r5fss0_core0 firmware
loadaddr and name.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
2984b82b3b arm: dts: k3-j721e-r5: Enable r5fss0 cluster in SPL
Enable MAIN domain r5fss0 cluster and its core0 in R5 spl.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-03-03 13:08:14 +05:30
Keerthy
b14d56f284 arm: dts: k3-j721e-r5-u-boot: Add fs_loader node
Add fs_loader node which will be needed for loading firmwares
from the boot media/filesystem.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-03-03 13:08:14 +05:30
Keerthy
d154252fc9 armv7R: K3: Add support for jumping to firmware
MCU Domain rf50 is currently shutting down after loading the ATF.
Load elf firmware and jump to firmware post loading ATF.

ROM doesn't enable ATCM memory, so make sure that firmware that
is being loaded doesn't use ATCM memory or override SPL.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
6dce1cfa56 armv7R: K3: r5_mpu: Enable execute permission for MCU0 BTCM
Enable execute permission for mcu_r5fss0_core0 BTCM so that we can jump
to a firmware directly from SPL.

Signed-off-by: Keerthy <j-keerthy@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
3ab34bc028 arm: k3: Add support for loading non linux remote cores
Add MAIN domain R5FSS0 remoteproc support from spl. This enables
loading the elf firmware in SPL and starting the remotecore.

In order to start the core, there should be a file with path
"/lib/firmware/j7-main-r5f0_0-fw" under filesystem
of respective boot mode.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
[Guard start_non_linux_remote_cores under CONFIG_FS_LOADER]
Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2020-03-03 13:08:14 +05:30
Keerthy
805b3cac1e lib: elf: Move the generic elf loading/validating functions to lib
Move the generic elf loading/validating functions to lib/
so that they can be re-used and accessed by code existing
outside cmd.

While at it remove the duplicate static version of load_elf_image_phdr
under arch/arm/mach-imx/imx_bootaux.c.

Signed-off-by: Keerthy <j-keerthy@ti.com>
Suggested-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2020-03-03 13:08:14 +05:30
Vignesh Raghavendra
0900254c8c configs: j721e_hs_evm: Enable OSPI related configs
Enable OSPI related configs for J721e HS variant.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:14 +05:30
Vignesh Raghavendra
0b58688e1c configs: ama65x_hs_evm: Enable OSPI related configs
Enable OSPI related defconfigs for AM65x HS variant.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
29ab5d3fb4 board: ti: Update AM65x and J721e READMEs for OSPI boot
Update AM65x and J721e README files with instructions for flashing OSPI
images.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
36a5c8939b configs: am65x_evm_defconfig: Enable OSPI configs
Enable OSPI related defconfigs. Also enable SPL_DMA so that DMA is used
during OSPI boot

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
9c0e1998e5 configs: j721e_evm_defconfig: Enable OSPI configs
Enable OSPI related defconfigs. Also enable SPL_DMA so that DMA is used
during OSPI boot

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
97103b11d7 configs: j721e_evm: Setup mtdparts for OSPI
Set up mtdparts cmdline argument to be passed to kernel

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
33e741c5c2 configs: am65x_evm: Setup mtdparts for OSPI
Set up mtdparts cmdline argument to be passed to kernel

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
224d7fe263 ARM: dts: k3-j721e: Add OSPI DT nodes
Add OSPI DT nodes to enable OSPI at U-Boot prompt and also to support
OSPI boot.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
9e9dfc1fc4 ARM: dts: k3-am65: Add OSPI DT nodes
Add OSPI DT nodes to enable OSPI at U-Boot prompt and also to support
OSPI boot.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Lokesh Vutla
7d0866b9be ARM: mach-k3: sysfw-loader: Use SPI memmapped addr when loading SYSFW
Since ROM configures OSPI controller to be in memory mapped mode in OSPI
boot, R5 SPL can directly pass the memory mapped pointer to ROM. With
this ROM can directly pull the SYSFW image from OSPI.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
8915a40da4 ARM: mach-k3: arm64-mmu: map 64bit FSS MMIO space in A53 MMU
Populate address mapping entries in A53 MMU for 4 GB of MMIO space
reserved for providing MMIO access to multiple flash devices through
OSPI/HBMC IPs within FSS.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2020-03-03 13:08:13 +05:30
Vignesh Raghavendra
28ff144662 drivers: Descend to drivers/soc unconditionally
Descend to drivers/soc directory unconditionally for SPL and U-Boot
builds. Individual drivers can have their own config to check what needs
to be built for SPL. There should be no increase in SPL code size
due to this change.

This is required on K3 SoCs to support DMA in SPL.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2020-03-03 13:08:13 +05:30
1175 changed files with 39189 additions and 14968 deletions

View File

@@ -1,7 +1,7 @@
variables:
windows_vm: vs2017-win2016
ubuntu_vm: ubuntu-18.04
ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20200112-21Feb2020
ci_runner_image: trini/u-boot-gitlab-ci-runner:bionic-20200403-27Apr2020
# Add '-u 0' options for Azure pipelines, otherwise we get "permission
# denied" error when it tries to "useradd -m -u 1001 vsts_azpcontainer",
# since our $(ci_runner_image) user is not root.
@@ -52,7 +52,7 @@ jobs:
image: $(ci_runner_image)
options: $(container_option)
steps:
- script: cppcheck --force --quiet --inline-suppr .
- script: cppcheck -j$(nproc) --force --quiet --inline-suppr .
- job: htmldocs
displayName: 'Build HTML documentation'
@@ -120,7 +120,7 @@ jobs:
make tools-only_config envtools -j$(nproc)
- job: utils
displayName: 'Run binman, buildman, dtoc and patman testsuites'
displayName: 'Run binman, buildman, dtoc, Kconfig and patman testsuites'
pool:
vmImage: $(ubuntu_vm)
steps:
@@ -135,15 +135,16 @@ jobs:
export USER=azure
virtualenv -p /usr/bin/python3 /tmp/venv
. /tmp/venv/bin/activate
pip install pyelftools
export UBOOT_TRAVIS_BUILD_DIR=/tmp/.bm-work/sandbox_spl
pip install pyelftools pytest
export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl
export PYTHONPATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt
export PATH=${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}
./tools/buildman/buildman -o /tmp -P sandbox_spl
./tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w sandbox_spl
./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test
./tools/buildman/buildman -t
./tools/dtoc/dtoc -t
./tools/patman/patman --test
make O=${UBOOT_TRAVIS_BUILD_DIR} testconfig
EOF
cat build.sh
# We cannot use "container" like other jobs above, as buildman
@@ -158,90 +159,78 @@ jobs:
matrix:
sandbox:
TEST_PY_BD: "sandbox"
BUILDMAN: "^sandbox$"
sandbox_clang:
TEST_PY_BD: "sandbox"
BUILDMAN: "^sandbox$"
OVERRIDE: "-O clang-7"
OVERRIDE: "-O clang-10"
sandbox_spl:
TEST_PY_BD: "sandbox_spl"
TEST_PY_TEST_SPEC: "test_ofplatdata"
BUILDMAN: "^sandbox_spl$"
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff"
sandbox_flattree:
TEST_PY_BD: "sandbox_flattree"
BUILDMAN: "^sandbox_flattree$"
evb_ast2500:
TEST_PY_BD: "evb-ast2500"
TEST_PY_ID: "--id qemu"
BUILDMAN: "^evb-ast2500$"
vexpress_ca15_tc2:
TEST_PY_BD: "vexpress_ca15_tc2"
TEST_PY_ID: "--id qemu"
BUILDMAN: "^vexpress_ca15_tc2$"
vexpress_ca9x4:
TEST_PY_BD: "vexpress_ca9x4"
TEST_PY_ID: "--id qemu"
BUILDMAN: "^vexpress_ca9x4$"
integratorcp_cm926ejs:
TEST_PY_BD: "integratorcp_cm926ejs"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^integratorcp_cm926ejs$"
qemu_arm:
TEST_PY_BD: "qemu_arm"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_arm$"
qemu_arm64:
TEST_PY_BD: "qemu_arm64"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_arm64$"
qemu_mips:
TEST_PY_BD: "qemu_mips"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_mips$"
qemu_mipsel:
TEST_PY_BD: "qemu_mipsel"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_mipsel$"
qemu_mips64:
TEST_PY_BD: "qemu_mips64"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_mips64$"
qemu_mips64el:
TEST_PY_BD: "qemu_mips64el"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_mips64el$"
qemu_ppce500:
TEST_PY_BD: "qemu-ppce500"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu-ppce500$"
qemu_riscv32:
TEST_PY_BD: "qemu-riscv32"
TEST_PY_TEST_SPEC: "not sleep"
qemu_riscv64:
TEST_PY_BD: "qemu-riscv64"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu-riscv64$"
qemu_riscv32_spl:
TEST_PY_BD: "qemu-riscv32_spl"
TEST_PY_TEST_SPEC: "not sleep"
qemu_riscv64_spl:
TEST_PY_BD: "qemu-riscv64_spl"
TEST_PY_TEST_SPEC: "not sleep"
qemu_x86:
TEST_PY_BD: "qemu-x86"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu-x86$"
qemu_x86_64:
TEST_PY_BD: "qemu-x86_64"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu-x86_64$"
zynq_zc702:
TEST_PY_BD: "zynq_zc702"
xilinx_zynq_virt:
TEST_PY_BD: "xilinx_zynq_virt"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^zynq_zc702$"
xilinx_versal_virt:
TEST_PY_BD: "xilinx_versal_virt"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^xilinx_versal_virt$"
xtfpga:
TEST_PY_BD: "xtfpga"
TEST_PY_ID: "--id qemu"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^xtfpga$"
steps:
- script: |
cat << EOF > test.sh
@@ -251,7 +240,6 @@ jobs:
export TEST_PY_BD="${TEST_PY_BD}"
export TEST_PY_ID="${TEST_PY_ID}"
export TEST_PY_TEST_SPEC="${TEST_PY_TEST_SPEC}"
export BUILDMAN="${BUILDMAN}"
export OVERRIDE="${OVERRIDE}"
EOF
cat << "EOF" >> test.sh
@@ -263,31 +251,28 @@ jobs:
grub-mkimage --prefix=\"\" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
grub-mkimage --prefix=\"\" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
cp /opt/grub/grubriscv64.efi ~/grub_riscv64.efi
cp /opt/grub/grubriscv32.efi ~/grub_riscv32.efi
cp /opt/grub/grubaa64.efi ~/grub_arm64.efi
cp /opt/grub/grubarm.efi ~/grub_arm.efi
if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
fi
if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
fi
# the below corresponds to .gitlab-ci.yml "script"
cd ${WORK_DIR}
if [[ "${BUILDMAN}" != "" ]]; then
ret=0;
tools/buildman/buildman -o /tmp -P -E ${BUILDMAN} ${OVERRIDE} || ret=$?;
if [[ $ret -ne 0 && $ret -ne 129 ]]; then
tools/buildman/buildman -o /tmp -sdeP ${BUILDMAN};
exit $ret;
fi;
fi
export UBOOT_TRAVIS_BUILD_DIR=/tmp/${TEST_PY_BD};
tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e --board ${TEST_PY_BD} ${OVERRIDE}
virtualenv -p /usr/bin/python3 /tmp/venv
. /tmp/venv/bin/activate
pip install -r test/py/requirements.txt
export UBOOT_TRAVIS_BUILD_DIR=/tmp/.bm-work/${TEST_PY_BD};
export PATH=/opt/qemu/bin:/tmp/uboot-test-hooks/bin:${PATH};
export PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci;
if [[ "${TEST_PY_BD}" != "" ]]; then
./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID} -k "${TEST_PY_TEST_SPEC:-not a_test_which_does_not_exist}" --build-dir "$UBOOT_TRAVIS_BUILD_DIR";
ret=$?;
if [[ $ret -ne 0 ]]; then
exit $ret;
fi;
fi
# "${var:+"-k $var"}" expands to "" if $var is empty, "-k $var" if not
./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID} ${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"} --build-dir "$UBOOT_TRAVIS_BUILD_DIR";
# the below corresponds to .gitlab-ci.yml "after_script"
rm -rf /tmp/uboot-test-hooks /tmp/venv
EOF
@@ -421,9 +406,9 @@ jobs:
cat << "EOF" >> build.sh
if [[ "${BUILDMAN}" != "" ]]; then
ret=0;
tools/buildman/buildman -o /tmp -P -E ${BUILDMAN} ${OVERRIDE} || ret=$?;
if [[ $ret -ne 0 && $ret -ne 129 ]]; then
tools/buildman/buildman -o /tmp -sdeP ${BUILDMAN};
tools/buildman/buildman -o /tmp -P -W ${BUILDMAN} ${OVERRIDE} || ret=$?;
if [[ $ret -ne 0 ]]; then
tools/buildman/buildman -o /tmp -seP ${BUILDMAN};
exit $ret;
fi;
fi

View File

@@ -2,7 +2,7 @@
# Grab our configured image. The source for this is found at:
# https://gitlab.denx.de/u-boot/gitlab-ci-runner
image: trini/u-boot-gitlab-ci-runner:bionic-20200112-21Feb2020
image: trini/u-boot-gitlab-ci-runner:bionic-20200403-27Apr2020
# We run some tests in different order, to catch some failures quicker.
stages:
@@ -21,50 +21,43 @@ stages:
- grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
- grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
- cp /opt/grub/grubriscv64.efi ~/grub_riscv64.efi
- cp /opt/grub/grubriscv32.efi ~/grub_riscv32.efi
- cp /opt/grub/grubaa64.efi ~/grub_arm64.efi
- cp /opt/grub/grubarm.efi ~/grub_arm.efi
- if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
fi
- if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
fi
after_script:
- rm -rf /tmp/uboot-test-hooks /tmp/venv
script:
# From buildman, exit code 129 means warnings only. If we've been asked to
# use clang only do one configuration.
- if [[ "${BUILDMAN}" != "" ]]; then
ret=0;
tools/buildman/buildman -o /tmp -P -E ${BUILDMAN} ${OVERRIDE}|| ret=$?;
if [[ $ret -ne 0 && $ret -ne 129 ]]; then
tools/buildman/buildman -o /tmp -sdeP ${BUILDMAN};
exit $ret;
fi;
fi
# "not a_test_which_does_not_exist" is a dummy -k parameter which will
# never prevent any test from running. That way, we can always pass
# "-k something" even when $TEST_PY_TEST_SPEC doesnt need a custom
# value.
# If we've been asked to use clang only do one configuration.
- export UBOOT_TRAVIS_BUILD_DIR=/tmp/${TEST_PY_BD}
- tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e
--board ${TEST_PY_BD} ${OVERRIDE}
- virtualenv -p /usr/bin/python3 /tmp/venv
- . /tmp/venv/bin/activate
- pip install -r test/py/requirements.txt
- export UBOOT_TRAVIS_BUILD_DIR=/tmp/.bm-work/${TEST_PY_BD};
export PATH=/opt/qemu/bin:/tmp/uboot-test-hooks/bin:${PATH};
# "${var:+"-k $var"}" expands to "" if $var is empty, "-k $var" if not
- export PATH=/opt/qemu/bin:/tmp/uboot-test-hooks/bin:${PATH};
export PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci;
if [[ "${TEST_PY_BD}" != "" ]]; then
./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID}
-k "${TEST_PY_TEST_SPEC:-not a_test_which_does_not_exist}"
--build-dir "$UBOOT_TRAVIS_BUILD_DIR";
ret=$?;
if [[ $ret -ne 0 ]]; then
exit $ret;
fi;
fi;
./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID}
${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"}
--build-dir "$UBOOT_TRAVIS_BUILD_DIR"
build all 32bit ARM platforms:
tags: [ 'all' ]
stage: world build
script:
- ret=0;
./tools/buildman/buildman -o /tmp -P -E arm -x aarch64 || ret=$?;
if [[ $ret -ne 0 && $ret -ne 129 ]]; then
./tools/buildman/buildman -o /tmp -sdeP;
./tools/buildman/buildman -o /tmp -P -E -W arm -x aarch64 || ret=$?;
if [[ $ret -ne 0 ]]; then
./tools/buildman/buildman -o /tmp -seP;
exit $ret;
fi;
@@ -76,9 +69,9 @@ build all 64bit ARM platforms:
- . /tmp/venv/bin/activate
- pip install pyelftools
- ret=0;
./tools/buildman/buildman -o /tmp -P -E aarch64 || ret=$?;
if [[ $ret -ne 0 && $ret -ne 129 ]]; then
./tools/buildman/buildman -o /tmp -sdeP;
./tools/buildman/buildman -o /tmp -P -E -W aarch64 || ret=$?;
if [[ $ret -ne 0 ]]; then
./tools/buildman/buildman -o /tmp -seP;
exit $ret;
fi;
@@ -87,9 +80,9 @@ build all PowerPC platforms:
stage: world build
script:
- ret=0;
./tools/buildman/buildman -o /tmp -P -E powerpc || ret=$?;
if [[ $ret -ne 0 && $ret -ne 129 ]]; then
./tools/buildman/buildman -o /tmp -sdeP;
./tools/buildman/buildman -o /tmp -P -E -W powerpc || ret=$?;
if [[ $ret -ne 0 ]]; then
./tools/buildman/buildman -o /tmp -seP;
exit $ret;
fi;
@@ -98,9 +91,9 @@ build all other platforms:
stage: world build
script:
- ret=0;
./tools/buildman/buildman -o /tmp -P -E -x arm,powerpc || ret=$?;
if [[ $ret -ne 0 && $ret -ne 129 ]]; then
./tools/buildman/buildman -o /tmp -sdeP;
./tools/buildman/buildman -o /tmp -P -E -W -x arm,powerpc || ret=$?;
if [[ $ret -ne 0 ]]; then
./tools/buildman/buildman -o /tmp -seP;
exit $ret;
fi;
@@ -110,7 +103,7 @@ cppcheck:
tags: [ 'all' ]
stage: testsuites
script:
- cppcheck --force --quiet --inline-suppr .
- cppcheck -j$(nproc) --force --quiet --inline-suppr .
# search for TODO within source tree
grep TODO/FIXME/HACK:
@@ -157,7 +150,7 @@ Build envtools:
script:
- make tools-only_config envtools -j$(nproc)
Run binman, buildman, dtoc and patman testsuites:
Run binman, buildman, dtoc, Kconfig and patman testsuites:
tags: [ 'all' ]
stage: testsuites
script:
@@ -166,38 +159,36 @@ Run binman, buildman, dtoc and patman testsuites:
export USER=gitlab;
virtualenv -p /usr/bin/python3 /tmp/venv;
. /tmp/venv/bin/activate;
pip install pyelftools;
export UBOOT_TRAVIS_BUILD_DIR=/tmp/.bm-work/sandbox_spl;
pip install pyelftools pytest;
export UBOOT_TRAVIS_BUILD_DIR=/tmp/sandbox_spl;
export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt";
export PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}";
./tools/buildman/buildman -o /tmp -P sandbox_spl;
./tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w sandbox_spl;
./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test;
./tools/buildman/buildman -t;
./tools/dtoc/dtoc -t;
./tools/patman/patman --test
./tools/patman/patman --test;
make testconfig
# Test sandbox with test.py
sandbox test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "sandbox"
BUILDMAN: "^sandbox$"
<<: *buildman_and_testpy_dfn
sandbox with clang test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "sandbox"
BUILDMAN: "^sandbox$"
OVERRIDE: "-O clang-7"
OVERRIDE: "-O clang-10"
<<: *buildman_and_testpy_dfn
sandbox_spl test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "sandbox_spl"
BUILDMAN: "^sandbox_spl$"
TEST_PY_TEST_SPEC: "test_ofplatdata"
TEST_PY_TEST_SPEC: "test_ofplatdata or test_handoff"
<<: *buildman_and_testpy_dfn
evb-ast2500 test.py:
@@ -205,14 +196,12 @@ evb-ast2500 test.py:
variables:
TEST_PY_BD: "evb-ast2500"
TEST_PY_ID: "--id qemu"
BUILDMAN: "^evb-ast2500$"
<<: *buildman_and_testpy_dfn
sandbox_flattree test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "sandbox_flattree"
BUILDMAN: "^sandbox_flattree$"
<<: *buildman_and_testpy_dfn
vexpress_ca15_tc2 test.py:
@@ -220,7 +209,6 @@ vexpress_ca15_tc2 test.py:
variables:
TEST_PY_BD: "vexpress_ca15_tc2"
TEST_PY_ID: "--id qemu"
BUILDMAN: "^vexpress_ca15_tc2$"
<<: *buildman_and_testpy_dfn
vexpress_ca9x4 test.py:
@@ -228,7 +216,6 @@ vexpress_ca9x4 test.py:
variables:
TEST_PY_BD: "vexpress_ca9x4"
TEST_PY_ID: "--id qemu"
BUILDMAN: "^vexpress_ca9x4$"
<<: *buildman_and_testpy_dfn
integratorcp_cm926ejs test.py:
@@ -237,7 +224,6 @@ integratorcp_cm926ejs test.py:
TEST_PY_BD: "integratorcp_cm926ejs"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
BUILDMAN: "^integratorcp_cm926ejs$"
<<: *buildman_and_testpy_dfn
qemu_arm test.py:
@@ -245,7 +231,6 @@ qemu_arm test.py:
variables:
TEST_PY_BD: "qemu_arm"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_arm$"
<<: *buildman_and_testpy_dfn
qemu_arm64 test.py:
@@ -253,7 +238,6 @@ qemu_arm64 test.py:
variables:
TEST_PY_BD: "qemu_arm64"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_arm64$"
<<: *buildman_and_testpy_dfn
qemu_mips test.py:
@@ -261,7 +245,6 @@ qemu_mips test.py:
variables:
TEST_PY_BD: "qemu_mips"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_mips$"
<<: *buildman_and_testpy_dfn
qemu_mipsel test.py:
@@ -269,7 +252,6 @@ qemu_mipsel test.py:
variables:
TEST_PY_BD: "qemu_mipsel"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_mipsel$"
<<: *buildman_and_testpy_dfn
qemu_mips64 test.py:
@@ -277,7 +259,6 @@ qemu_mips64 test.py:
variables:
TEST_PY_BD: "qemu_mips64"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_mips64$"
<<: *buildman_and_testpy_dfn
qemu_mips64el test.py:
@@ -285,7 +266,6 @@ qemu_mips64el test.py:
variables:
TEST_PY_BD: "qemu_mips64el"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu_mips64el$"
<<: *buildman_and_testpy_dfn
qemu-ppce500 test.py:
@@ -293,7 +273,13 @@ qemu-ppce500 test.py:
variables:
TEST_PY_BD: "qemu-ppce500"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu-ppce500$"
<<: *buildman_and_testpy_dfn
qemu-riscv32 test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "qemu-riscv32"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-riscv64 test.py:
@@ -301,7 +287,20 @@ qemu-riscv64 test.py:
variables:
TEST_PY_BD: "qemu-riscv64"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu-riscv64$"
<<: *buildman_and_testpy_dfn
qemu-riscv32_spl test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "qemu-riscv32_spl"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-riscv64_spl test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "qemu-riscv64_spl"
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
qemu-x86 test.py:
@@ -309,7 +308,6 @@ qemu-x86 test.py:
variables:
TEST_PY_BD: "qemu-x86"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu-x86$"
<<: *buildman_and_testpy_dfn
qemu-x86_64 test.py:
@@ -317,16 +315,14 @@ qemu-x86_64 test.py:
variables:
TEST_PY_BD: "qemu-x86_64"
TEST_PY_TEST_SPEC: "not sleep"
BUILDMAN: "^qemu-x86_64$"
<<: *buildman_and_testpy_dfn
zynq_zc702 test.py:
xilinx_zynq_virt test.py:
tags: [ 'all' ]
variables:
TEST_PY_BD: "zynq_zc702"
TEST_PY_BD: "xilinx_zynq_virt"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
BUILDMAN: "^zynq_zc702$"
<<: *buildman_and_testpy_dfn
xilinx_versal_virt test.py:
@@ -335,7 +331,6 @@ xilinx_versal_virt test.py:
TEST_PY_BD: "xilinx_versal_virt"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
BUILDMAN: "^xilinx_versal_virt$"
<<: *buildman_and_testpy_dfn
xtfpga test.py:
@@ -344,5 +339,4 @@ xtfpga test.py:
TEST_PY_BD: "xtfpga"
TEST_PY_TEST_SPEC: "not sleep"
TEST_PY_ID: "--id qemu"
BUILDMAN: "^xtfpga$"
<<: *buildman_and_testpy_dfn

View File

@@ -36,6 +36,7 @@ Prabhakar Kushwaha <prabhakar@freescale.com>
Rajeshwari Shinde <rajeshwari.s@samsung.com>
Ricardo Ribalda <ricardo@ribalda.com> <ricardo.ribalda@uam.es>
Ricardo Ribalda <ricardo@ribalda.com> <ricardo.ribalda@gmail.com>
Ruchika Gupta <ruchika.gupta@nxp.com> <ruchika.gupta@freescale.com>
Sandeep Paulraj <s-paulraj@ti.com>
Shaohui Xie <Shaohui.Xie@freescale.com>
Stefan Roese <stroese>

19
.readthedocs.yml Normal file
View File

@@ -0,0 +1,19 @@
# .readthedocs.yml
# Read the Docs configuration file
# See https://docs.readthedocs.io/en/stable/config-file/v2.html for details
# Required
version: 2
# Build documentation in the docs/ directory with Sphinx
sphinx:
configuration: docs/conf.py
# Optionally build your docs in additional formats such as PDF and ePub
formats: []
# Optionally set the version of Python and requirements required to build your docs
# python:
# version: 3.7
# install:
# - requirements: docs/requirements.txt

View File

@@ -10,10 +10,12 @@ language: c
addons:
apt:
update: true
sources:
- ubuntu-toolchain-r-test
- llvm-toolchain-bionic-7
- sourceline: 'deb http://apt.llvm.org/bionic/ llvm-toolchain-bionic-10 main'
key_url: 'https://apt.llvm.org/llvm-snapshot.gpg.key'
packages:
- autopoint
- cppcheck
- sloccount
- sparse
@@ -37,9 +39,17 @@ addons:
- liblz4-tool
- lzma-alone
- libisl15
- clang-7
- clang-10
- srecord
- graphviz
- coreutils
- util-linux
- dosfstools
- gdisk
- mount
- mtools
- openssl
- sbsigntool
install:
# Clone uboot-test-hooks
@@ -48,22 +58,19 @@ install:
- ln -s travis-ci /tmp/uboot-test-hooks/py/`hostname`
# prepare buildman environment
- echo -e "[toolchain]\nroot = /usr" > ~/.buildman
- echo -e "arc = /tmp/arc_gnu_2018.09_prebuilt_uclibc_le_archs_linux_install" >> ~/.buildman
- echo -e "arc = /tmp/arc_gnu_2019.09_prebuilt_uclibc_le_archs_linux_install" >> ~/.buildman
- echo -e "\n[toolchain-alias]\nsh = sh2" >> ~/.buildman
- echo -e "x86 = i386" >> ~/.buildman;
- echo -e "riscv = riscv64" >> ~/.buildman;
- cat ~/.buildman
- grub-mkimage --prefix="" -o ~/grub_x86.efi -O i386-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
- grub-mkimage --prefix="" -o ~/grub_x64.efi -O x86_64-efi normal echo lsefimmap lsefi lsefisystab efinet tftp minicmd
- mkdir ~/grub2-arm
- ( cd ~/grub2-arm; wget -O - http://download.opensuse.org/ports/armv7hl/distribution/leap/42.2/repo/oss/suse/armv7hl/grub2-arm-efi-2.02~beta2-87.1.armv7hl.rpm | rpm2cpio | cpio -di )
- mkdir ~/grub2-arm64
- ( cd ~/grub2-arm64; wget -O - http://download.opensuse.org/ports/aarch64/distribution/leap/42.2/repo/oss/suse/aarch64/grub2-arm64-efi-2.02~beta2-87.1.aarch64.rpm | rpm2cpio | cpio -di )
- wget http://mirrors.kernel.org/ubuntu/pool/main/m/mpfr4/libmpfr4_3.1.4-1_amd64.deb && sudo dpkg -i libmpfr4_3.1.4-1_amd64.deb && rm libmpfr4_3.1.4-1_amd64.deb
- wget http://mirrors.kernel.org/ubuntu/pool/universe/e/efitools/efitools_1.8.1-0ubuntu2_amd64.deb && sudo dpkg -i efitools_1.8.1-0ubuntu2_amd64.deb && rm efitools_1.8.1-0ubuntu2_amd64.deb
env:
global:
- PATH=/tmp/qemu-install/bin:/tmp/uboot-test-hooks/bin:/usr/bin:/bin:/usr/local/bin
- PATH=/tmp/qemu-install/bin:/tmp/uboot-test-hooks/bin:/sbin:/usr/bin:/bin:/usr/local/bin
- PYTHONPATH=/tmp/uboot-test-hooks/py/travis-ci
- BUILD_DIR=build
- HOSTCC="cc"
@@ -80,8 +87,8 @@ before_script:
./tools/buildman/buildman --fetch-arch i386;
fi
- if [[ "${TOOLCHAIN}" == arc ]]; then
wget https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-2018.09-release/arc_gnu_2018.09_prebuilt_uclibc_le_archs_linux_install.tar.gz &&
tar -C /tmp -xf arc_gnu_2018.09_prebuilt_uclibc_le_archs_linux_install.tar.gz;
wget https://github.com/foss-for-synopsys-dwc-arc-processors/toolchain/releases/download/arc-2019.09-release/arc_gnu_2019.09_prebuilt_uclibc_le_archs_linux_install.tar.gz &&
tar -C /tmp -xf arc_gnu_2019.09_prebuilt_uclibc_le_archs_linux_install.tar.gz;
fi
- if [[ "${TOOLCHAIN}" == "nds32" ]]; then
wget https://github.com/vincentzwc/prebuilt-nds32-toolchain/releases/download/20180521/nds32le-linux-glibc-v3-upstream.tar.gz &&
@@ -100,6 +107,7 @@ before_script:
fi
- if [[ "${TOOLCHAIN}" == "powerpc" ]]; then ./tools/buildman/buildman --fetch-arch powerpc; fi
- if [[ "${TOOLCHAIN}" == "riscv" ]]; then
./tools/buildman/buildman --fetch-arch riscv32 &&
./tools/buildman/buildman --fetch-arch riscv64;
fi
- if [[ "${QEMU_TARGET}" != "" ]]; then
@@ -112,47 +120,145 @@ before_script:
popd;
fi
# Build GRUB UEFI targets
- if [[ "${QEMU_TARGET}" == "arm-softmmu" ]]; then
git clone git://git.savannah.gnu.org/grub.git /tmp/grub &&
pushd /tmp/grub &&
git checkout grub-2.04 &&
./bootstrap &&
./configure --target=arm --with-platform=efi
CC=gcc
TARGET_CC=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-gcc
TARGET_OBJCOPY=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-objcopy
TARGET_STRIP=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-strip
TARGET_NM=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-nm
TARGET_RANLIB=~/.buildman-toolchains/gcc-9.2.0-nolibc/arm-linux-gnueabi/bin/arm-linux-gnueabi-ranlib &&
make -j4 &&
./grub-mkimage -O arm-efi -o ~/grub_arm.efi --prefix= -d
grub-core cat chain configfile echo efinet ext2 fat halt help linux
lsefisystab loadenv lvm minicmd normal part_msdos part_gpt reboot
search search_fs_file search_fs_uuid search_label serial sleep test
true &&
popd;
fi
- if [[ "${QEMU_TARGET}" == "aarch64-softmmu" ]]; then
git clone git://git.savannah.gnu.org/grub.git /tmp/grub &&
pushd /tmp/grub &&
git checkout grub-2.04 &&
./bootstrap &&
./configure --target=aarch64 --with-platform=efi
CC=gcc
TARGET_CC=~/.buildman-toolchains/gcc-9.2.0-nolibc/aarch64-linux/bin/aarch64-linux-gcc
TARGET_OBJCOPY=~/.buildman-toolchains/gcc-9.2.0-nolibc/aarch64-linux/bin/aarch64-linux-objcopy
TARGET_STRIP=~/.buildman-toolchains/gcc-9.2.0-nolibc/aarch64-linux/bin/aarch64-linux-strip
TARGET_NM=~/.buildman-toolchains/gcc-9.2.0-nolibc/aarch64-linux/bin/aarch64-linux-nm
TARGET_RANLIB=~/.buildman-toolchains/gcc-9.2.0-nolibc/aarch64-linux/bin/aarch64-linux-ranlib &&
make -j4 &&
./grub-mkimage -O arm64-efi -o ~/grub_arm64.efi --prefix= -d
grub-core cat chain configfile echo efinet ext2 fat halt help linux
lsefisystab loadenv lvm minicmd normal part_msdos part_gpt reboot
search search_fs_file search_fs_uuid search_label serial sleep test
true &&
popd;
fi
- if [[ "${QEMU_TARGET}" == "riscv32-softmmu" ]]; then
git clone git://git.savannah.gnu.org/grub.git /tmp/grub &&
pushd /tmp/grub &&
git checkout grub-2.04 &&
./bootstrap &&
./configure --target=riscv32 --with-platform=efi
CC=gcc
TARGET_CC=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv32-linux/bin/riscv32-linux-gcc
TARGET_OBJCOPY=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv32-linux/bin/riscv32-linux-objcopy
TARGET_STRIP=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv32-linux/bin/riscv32-linux-strip
TARGET_NM=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv32-linux/bin/riscv32-linux-nm
TARGET_RANLIB=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv32-linux/bin/riscv32-linux-ranlib &&
make -j4 &&
./grub-mkimage -O riscv32-efi -o ~/grub_riscv32.efi --prefix= -d
grub-core cat chain configfile echo efinet ext2 fat halt help linux
lsefisystab loadenv lvm minicmd normal part_msdos part_gpt reboot
search search_fs_file search_fs_uuid search_label serial sleep test
true &&
popd;
fi
- if [[ "${QEMU_TARGET}" == "riscv64-softmmu" ]]; then
git clone git://git.savannah.gnu.org/grub.git /tmp/grub &&
pushd /tmp/grub &&
git checkout grub-2.04 &&
./bootstrap &&
./configure --target=riscv64 --with-platform=efi
CC=gcc
TARGET_CC=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv64-linux/bin/riscv64-linux-gcc
TARGET_OBJCOPY=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv64-linux/bin/riscv64-linux-objcopy
TARGET_STRIP=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv64-linux/bin/riscv64-linux-strip
TARGET_NM=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv64-linux/bin/riscv64-linux-nm
TARGET_RANLIB=~/.buildman-toolchains/gcc-9.2.0-nolibc/riscv64-linux/bin/riscv64-linux-ranlib &&
make -j4 &&
./grub-mkimage -O riscv64-efi -o ~/grub_riscv64.efi --prefix= -d
grub-core cat chain configfile echo efinet ext2 fat halt help linux
lsefisystab loadenv lvm minicmd normal part_msdos part_gpt reboot
search search_fs_file search_fs_uuid search_label serial sleep test
true &&
popd;
fi
- if [[ "${TEST_PY_BD}" == "qemu-riscv32_spl" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv32-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.6-rv32-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
fi
- if [[ "${TEST_PY_BD}" == "qemu-riscv64_spl" ]]; then
wget -O - https://github.com/riscv/opensbi/releases/download/v0.6/opensbi-0.6-rv64-bin.tar.xz | tar -C /tmp -xJ;
export OPENSBI=/tmp/opensbi-0.6-rv64-bin/platform/qemu/virt/firmware/fw_dynamic.bin;
fi
script:
# Comments must be outside the command strings below, or the Travis parser
# will get confused.
#
# From buildman, exit code 129 means warnings only. If we've been asked to
# use clang only do one configuration.
# If we've been asked to use clang only do one configuration.
#
# Build a selection of boards if TEST_PY_BD is empty
- if [[ "${BUILDMAN}" != "" ]]; then
ret=0;
tools/buildman/buildman -P -E ${BUILDMAN} ${OVERRIDE}|| ret=$?;
if [[ $ret -ne 0 && $ret -ne 129 ]]; then
tools/buildman/buildman -sdeP ${BUILDMAN};
ret=0
tools/buildman/buildman -P -E -W ${BUILDMAN} ${OVERRIDE} || ret=$?;
if [[ $ret -ne 0 ]]; then
tools/buildman/buildman -seP ${BUILDMAN};
exit $ret;
fi;
fi
# "not a_test_which_does_not_exist" is a dummy -k parameter which will
# never prevent any test from running. That way, we can always pass
# "-k something" even when $TEST_PY_TEST_SPEC doesnt need a custom
# value.
- export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/.bm-work/${TEST_PY_BD};
cp ~/grub_x86.efi $UBOOT_TRAVIS_BUILD_DIR/;
cp ~/grub_x64.efi $UBOOT_TRAVIS_BUILD_DIR/;
cp ~/grub2-arm/usr/lib/grub2/arm-efi/grub.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm.efi;
cp ~/grub2-arm64/usr/lib/grub2/arm64-efi/grub.efi $UBOOT_TRAVIS_BUILD_DIR/grub_arm64.efi;
if [[ "${TEST_PY_BD}" != "" ]]; then
# Build just the one board needed for testing, if TEST_PY_BD is non-empty
# Note: "${var:+"-k $var"}" expands to "" if $var is empty, "-k $var" if not
- if [[ "${TEST_PY_BD}" != "" ]]; then
export UBOOT_TRAVIS_BUILD_DIR=`cd .. && pwd`/${TEST_PY_BD};
cp ~/grub_x86.efi $UBOOT_TRAVIS_BUILD_DIR/;
cp ~/grub_x64.efi $UBOOT_TRAVIS_BUILD_DIR/;
if [[ -e ~/grub_arm.efi ]]; then
cp ~/grub_arm.efi $UBOOT_TRAVIS_BUILD_DIR/;
fi;
if [[ -e ~/grub_arm64.efi ]]; then
cp ~/grub_arm64.efi $UBOOT_TRAVIS_BUILD_DIR/;
fi;
if [[ -e ~/grub_riscv32.efi ]]; then
cp ~/grub_riscv32.efi $UBOOT_TRAVIS_BUILD_DIR/;
fi;
if [[ -e ~/grub_riscv64.efi ]]; then
cp ~/grub_riscv64.efi $UBOOT_TRAVIS_BUILD_DIR/;
fi;
tools/buildman/buildman -o ${UBOOT_TRAVIS_BUILD_DIR} -w -E -W -e
--board ${TEST_PY_BD} ${OVERRIDE} || exit;
virtualenv -p /usr/bin/python3 /tmp/venv;
. /tmp/venv/bin/activate;
pip install -r test/py/requirements.txt;
./test/py/test.py --bd ${TEST_PY_BD} ${TEST_PY_ID}
-k "${TEST_PY_TEST_SPEC:-not a_test_which_does_not_exist}"
--build-dir "$UBOOT_TRAVIS_BUILD_DIR";
ret=$?;
if [[ $ret -ne 0 ]]; then
exit $ret;
fi;
${TEST_PY_TEST_SPEC:+"-k ${TEST_PY_TEST_SPEC}"}
--build-dir "$UBOOT_TRAVIS_BUILD_DIR" || exit;
if [[ -n "${TEST_PY_TOOLS}" ]]; then
export PYTHONPATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc/pylibfdt";
export PATH="${UBOOT_TRAVIS_BUILD_DIR}/scripts/dtc:${PATH}";
./tools/binman/binman --toolpath ${UBOOT_TRAVIS_BUILD_DIR}/tools test &&
./tools/patman/patman --test &&
./tools/buildman/buildman -t &&
./tools/dtoc/dtoc -t;
./tools/dtoc/dtoc -t &&
make testconfig;
fi;
fi
@@ -353,7 +459,7 @@ matrix:
# static code analysis with cppcheck (we can add --enable=all later)
- name: "cppcheck"
script:
- cppcheck --force --quiet --inline-suppr .
- cppcheck -j$(nproc) --force --quiet --inline-suppr .
# build HTML documentation
- name: "htmldocs"
script:
@@ -390,110 +496,111 @@ matrix:
- name: "test/py sandbox"
env:
- TEST_PY_BD="sandbox"
BUILDMAN="^sandbox$"
TOOLCHAIN="i386"
- name: "test/py sandbox with clang"
env:
- TEST_PY_BD="sandbox"
BUILDMAN="^sandbox$"
OVERRIDE="-O clang-7"
OVERRIDE="-O clang-10"
- name: "test/py sandbox_spl"
env:
- TEST_PY_BD="sandbox_spl"
TEST_PY_TEST_SPEC="test_ofplatdata"
BUILDMAN="^sandbox$"
TEST_PY_TEST_SPEC="test_ofplatdata or test_handoff"
TOOLCHAIN="i386"
TEST_PY_TOOLS="yes"
- name: "test/py sandbox_flattree"
env:
- TEST_PY_BD="sandbox_flattree"
BUILDMAN="^sandbox_flattree$"
TOOLCHAIN="i386"
- name: "test/py evb-ast2500"
env:
- TEST_PY_BD="evb-ast2500"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^evb-ast2500$"
- name: "test/py vexpress_ca15_tc2"
env:
- TEST_PY_BD="vexpress_ca15_tc2"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^vexpress_ca15_tc2$"
- name: "test/py vexpress_ca9x4"
env:
- TEST_PY_BD="vexpress_ca9x4"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^vexpress_ca9x4$"
- name: "test/py integratorcp_cm926ejs"
env:
- TEST_PY_BD="integratorcp_cm926ejs"
TEST_PY_TEST_SPEC="not sleep"
TEST_PY_ID="--id qemu"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^integratorcp_cm926ejs$"
- name: "test/py qemu_arm"
env:
- TEST_PY_BD="qemu_arm"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="arm-softmmu"
BUILDMAN="^qemu_arm$"
- name: "test/py qemu_arm64"
env:
- TEST_PY_BD="qemu_arm64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="aarch64-softmmu"
BUILDMAN="^qemu_arm64$"
- name: "test/py qemu_mips"
env:
- TEST_PY_BD="qemu_mips"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mips-softmmu"
BUILDMAN="^qemu_mips$"
TOOLCHAIN="mips"
- name: "test/py qemu_mipsel"
env:
- TEST_PY_BD="qemu_mipsel"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mipsel-softmmu"
BUILDMAN="^qemu_mipsel$"
TOOLCHAIN="mips"
- name: "test/py qemu_mips64"
env:
- TEST_PY_BD="qemu_mips64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mips64-softmmu"
BUILDMAN="^qemu_mips64$"
TOOLCHAIN="mips"
- name: "test/py qemu_mips64el"
env:
- TEST_PY_BD="qemu_mips64el"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="mips64el-softmmu"
BUILDMAN="^qemu_mips64el$"
TOOLCHAIN="mips"
- name: "test/py qemu-ppce500"
env:
- TEST_PY_BD="qemu-ppce500"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="ppc-softmmu"
BUILDMAN="^qemu-ppce500$"
TOOLCHAIN="powerpc"
- name: "test/py qemu-riscv32"
env:
- TEST_PY_BD="qemu-riscv32"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="riscv32-softmmu"
TOOLCHAIN="riscv"
- name: "test/py qemu-riscv64"
env:
- TEST_PY_BD="qemu-riscv64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="riscv64-softmmu"
BUILDMAN="^qemu-riscv64$"
TOOLCHAIN="riscv"
- name: "test/py qemu-riscv32_spl"
env:
- TEST_PY_BD="qemu-riscv32_spl"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="riscv32-softmmu"
TOOLCHAIN="riscv"
- name: "test/py qemu-riscv64_spl"
env:
- TEST_PY_BD="qemu-riscv64_spl"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="riscv64-softmmu"
TOOLCHAIN="riscv"
- name: "test/py qemu-x86"
env:
- TEST_PY_BD="qemu-x86"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="i386-softmmu"
BUILDMAN="^qemu-x86$"
TOOLCHAIN="i386"
BUILD_ROM="yes"
- name: "test/py qemu-x86_64"
@@ -501,30 +608,26 @@ matrix:
- TEST_PY_BD="qemu-x86_64"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="x86_64-softmmu"
BUILDMAN="^qemu-x86_64$"
TOOLCHAIN="i386"
BUILD_ROM="yes"
- name: "test/py zynq_zc702"
- name: "test/py xilinx_zynq_virt"
env:
- TEST_PY_BD="zynq_zc702"
- TEST_PY_BD="xilinx_zynq_virt"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="arm-softmmu"
TEST_PY_ID="--id qemu"
BUILDMAN="^zynq_zc702$"
- name: "test/py xilinx_versal_virt"
env:
- TEST_PY_BD="xilinx_versal_virt"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="aarch64-softmmu"
TEST_PY_ID="--id qemu"
BUILDMAN="^xilinx_versal_virt$"
- name: "test/py xtfpga"
env:
- TEST_PY_BD="xtfpga"
TEST_PY_TEST_SPEC="not sleep"
QEMU_TARGET="xtensa-softmmu"
TEST_PY_ID="--id qemu"
BUILDMAN="^xtfpga$"
TOOLCHAIN="xtensa-dc233c-elf"
# TODO make it perfect ;-r

49
Kbuild
View File

@@ -1,54 +1,20 @@
# SPDX-License-Identifier: GPL-2.0
#
# Kbuild for top-level directory of U-Boot
# This file takes care of the following:
# 1) Generate generic-asm-offsets.h
# 2) Generate asm-offsets.h
# Default sed regexp - multiline due to syntax constraints
define sed-y
"s:[[:space:]]*\.ascii[[:space:]]*\"\(.*\)\":\1:; \
/^->/{s:->#\(.*\):/* \1 */:; \
s:^->\([^ ]*\) [\$$#]*\([-0-9]*\) \(.*\):#define \1 \2 /* \3 */:; \
s:^->\([^ ]*\) [\$$#]*\([^ ]*\) \(.*\):#define \1 \2 /* \3 */:; \
s:->::; p;}"
endef
# Use filechk to avoid rebuilds when a header changes, but the resulting file
# does not
define filechk_offsets
(set -e; \
echo "#ifndef $2"; \
echo "#define $2"; \
echo "/*"; \
echo " * DO NOT MODIFY."; \
echo " *"; \
echo " * This file was generated by Kbuild"; \
echo " */"; \
echo ""; \
sed -ne $(sed-y); \
echo ""; \
echo "#endif" )
endef
#####
# 1) Generate generic-asm-offsets.h
# Generate generic-asm-offsets.h
generic-offsets-file := include/generated/generic-asm-offsets.h
always := $(generic-offsets-file)
targets := lib/asm-offsets.s
# We use internal kbuild rules to avoid the "is up to date" message from make
lib/asm-offsets.s: lib/asm-offsets.c FORCE
$(Q)mkdir -p $(dir $@)
$(call if_changed_dep,cc_s_c)
$(obj)/$(generic-offsets-file): lib/asm-offsets.s FORCE
$(obj)/$(generic-offsets-file): $(obj)/lib/asm-offsets.s FORCE
$(call filechk,offsets,__GENERIC_ASM_OFFSETS_H__)
#####
# 2) Generate asm-offsets.h
#
# Generate asm-offsets.h
ifneq ($(wildcard $(srctree)/arch/$(ARCH)/lib/asm-offsets.c),)
offsets-file := include/generated/asm-offsets.h
@@ -59,10 +25,5 @@ targets += arch/$(ARCH)/lib/asm-offsets.s
CFLAGS_asm-offsets.o := -DDO_DEPS_ONLY
# We use internal kbuild rules to avoid the "is up to date" message from make
arch/$(ARCH)/lib/asm-offsets.s: arch/$(ARCH)/lib/asm-offsets.c FORCE
$(Q)mkdir -p $(dir $@)
$(call if_changed_dep,cc_s_c)
$(obj)/$(offsets-file): arch/$(ARCH)/lib/asm-offsets.s FORCE
$(obj)/$(offsets-file): $(obj)/arch/$(ARCH)/lib/asm-offsets.s FORCE
$(call filechk,offsets,__ASM_OFFSETS_H__)

14
Kconfig
View File

@@ -3,11 +3,7 @@
# see the file Documentation/kbuild/kconfig-language.txt in the
# Linux kernel source tree.
#
mainmenu "U-Boot $UBOOTVERSION Configuration"
config UBOOTVERSION
string
option env="UBOOTVERSION"
mainmenu "U-Boot $(UBOOTVERSION) Configuration"
# Allow defaults in arch-specific code to override any given here
source "arch/Kconfig"
@@ -115,7 +111,7 @@ config ENV_VARS_UBOOT_CONFIG
config NR_DRAM_BANKS
int "Number of DRAM banks"
default 1 if ARCH_SUNXI
default 1 if ARCH_SUNXI || ARCH_OWL
default 4
help
This defines the number of DRAM banks.
@@ -237,7 +233,7 @@ config BUILD_ROM
This option allows to build a ROM version of U-Boot.
The build process generally requires several binary blobs
which are not shipped in the U-Boot source tree.
Please, see doc/README.x86 for details.
Please, see doc/arch/x86.rst for details.
config SPL_IMAGE
string "SPL image used in the combined SPL+U-Boot image"
@@ -360,6 +356,8 @@ config FIT_SIGNATURE
depends on DM
select HASH
select RSA
select RSA_VERIFY
select IMAGE_SIGN_INFO
help
This option enables signature verification of FIT uImages,
using a hash signed and verified using RSA. If
@@ -448,6 +446,8 @@ config SPL_FIT_SIGNATURE
depends on SPL_DM
select SPL_FIT
select SPL_RSA
select SPL_RSA_VERIFY
select SPL_IMAGE_SIGN_INFO
config SPL_LOAD_FIT
bool "Enable SPL loading U-Boot as a FIT (basic fitImage features)"

View File

@@ -272,9 +272,11 @@ M: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
S: Maintained
F: arch/arm/include/asm/arch-owl/
F: arch/arm/mach-owl/
F: board/ucRobotics/
F: drivers/clk/owl/
F: drivers/serial/serial_owl.c
F: include/configs/owl-common.h
F: configs/bubblegum_96_defconfig
F: configs/cubieboard7_defconfig
ARM RENESAS RMOBILE/R-CAR
M: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
@@ -423,8 +425,33 @@ T: git https://gitlab.denx.de/u-boot/custodians/u-boot-ti.git
F: arch/arm/mach-davinci/
F: arch/arm/mach-k3/
F: arch/arm/mach-keystone/
F: arch/arm/mach-omap2/
F: arch/arm/include/asm/arch-omap*/
F: arch/arm/include/asm/ti-common/
F: board/ti/
F: drivers/dma/ti*
F: drivers/firmware/ti_sci.*
F: drivers/gpio/omap_gpio.c
F: drivers/memory/ti-aemif.c
F: drivers/misc/k3_avs.c
F: drivers/mailbox/k3-sec-procy.c
F: drivers/pci/pcie_dw_ti.c
F: drivers/phy/keystone-usb-phy.c
F: drivers/phy/omap-usb2-phy.c
F: drivers/phy/phy-ti-am654.c
F: drivers/phy/ti-pipe3-phy.c
F: drivers/ram/k3*
F: drivers/remoteproc/k3_system_controller.c
F: drivers/remoteproc/ti*
F: drivers/reset/reset-ti-sci.c
F: drivers/rtc/davinci.c
F: drivers/serial/serial_omap.c
F: drivers/soc/ti/
F: drivers/sysreset/sysreset-ti-sci.c
F: drivers/thermal/ti-bandgap.c
F: drivers/timer/omap-timer.c
F: drivers/watchdog/omap_wdt.c
F: include/linux/soc/ti/
ARM U8500
M: Stephan Gerhold <stephan@gerhold.net>
@@ -447,6 +474,7 @@ M: Michal Simek <michal.simek@xilinx.com>
S: Maintained
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze.git
F: arch/arm/mach-versal/
F: drivers/watchdog/xilinx_wwdt.c
N: (?<!uni)versal
ARM VERSATILE EXPRESS DRIVERS
@@ -653,9 +681,9 @@ LOGGING
M: Simon Glass <sjg@chromium.org>
S: Maintained
T: git https://gitlab.denx.de/u-boot/u-boot.git
F: common/log.c
F: common/log*
F: cmd/log.c
F: test/log/log_test.c
F: test/log/
F: test/py/tests/test_log.py
MALI DISPLAY PROCESSORS

137
Makefile
View File

@@ -1,9 +1,9 @@
# SPDX-License-Identifier: GPL-2.0+
VERSION = 2020
PATCHLEVEL = 04
PATCHLEVEL = 07
SUBLEVEL =
EXTRAVERSION =
EXTRAVERSION = -rc1
NAME =
# *DOCUMENTATION*
@@ -271,11 +271,17 @@ CONFIG_SHELL := $(shell if [ -x "$$BASH" ]; then echo $$BASH; \
else if [ -x /bin/bash ]; then echo /bin/bash; \
else echo sh; fi ; fi)
HOST_LFS_CFLAGS := $(shell getconf LFS_CFLAGS 2>/dev/null)
HOST_LFS_LDFLAGS := $(shell getconf LFS_LDFLAGS 2>/dev/null)
HOST_LFS_LIBS := $(shell getconf LFS_LIBS 2>/dev/null)
HOSTCC = cc
HOSTCXX = c++
HOSTCFLAGS = -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer \
$(if $(CONFIG_TOOLS_DEBUG),-g)
HOSTCXXFLAGS = -O2
KBUILD_HOSTCFLAGS := -Wall -Wstrict-prototypes -O2 -fomit-frame-pointer \
$(if $(CONFIG_TOOLS_DEBUG),-g) $(HOST_LFS_CFLAGS) $(HOSTCFLAGS)
KBUILD_HOSTCXXFLAGS := -O2 $(HOST_LFS_CFLAGS) $(HOSTCXXFLAGS)
KBUILD_HOSTLDFLAGS := $(HOST_LFS_LDFLAGS) $(HOSTLDFLAGS)
KBUILD_HOSTLDLIBS := $(HOST_LFS_LIBS) $(HOSTLDLIBS)
# With the move to GCC 6, we have implicitly upgraded our language
# standard to GNU11 (see https://gcc.gnu.org/gcc-5/porting_to.html).
@@ -284,11 +290,11 @@ HOSTCXXFLAGS = -O2
# these that our host tools are GNU11 (i.e. C11 w/ GNU extensions).
CSTD_FLAG := -std=gnu11
ifeq ($(HOSTOS),linux)
HOSTCFLAGS += $(CSTD_FLAG)
KBUILD_HOSTCFLAGS += $(CSTD_FLAG)
endif
ifeq ($(HOSTOS),cygwin)
HOSTCFLAGS += -ansi
KBUILD_HOSTCFLAGS += -ansi
endif
# Mac OS X / Darwin's C preprocessor is Apple specific. It
@@ -315,17 +321,17 @@ os_x_after = $(shell if [ $(DARWIN_MAJOR_VERSION) -ge $(1) -a \
# Snow Leopards build environment has no longer restrictions as described above
HOSTCC = $(call os_x_before, 10, 5, "cc", "gcc")
HOSTCFLAGS += $(call os_x_before, 10, 4, "-traditional-cpp")
HOSTLDFLAGS += $(call os_x_before, 10, 5, "-multiply_defined suppress")
KBUILD_HOSTCFLAGS += $(call os_x_before, 10, 4, "-traditional-cpp")
KBUILD_HOSTLDFLAGS += $(call os_x_before, 10, 5, "-multiply_defined suppress")
# since Lion (10.7) ASLR is on by default, but we use linker generated lists
# in some host tools which is a problem then ... so disable ASLR for these
# tools
HOSTLDFLAGS += $(call os_x_before, 10, 7, "", "-Xlinker -no_pie")
KBUILD_HOSTLDFLAGS += $(call os_x_before, 10, 7, "", "-Xlinker -no_pie")
# macOS Mojave (10.14.X)
# Undefined symbols for architecture x86_64: "_PyArg_ParseTuple"
HOSTLDFLAGS += $(call os_x_after, 10, 14, "-lpython -dynamclib", "")
KBUILD_HOSTLDFLAGS += $(call os_x_after, 10, 14, "-lpython -dynamclib", "")
endif
# Decide whether to build built-in, modular, or both.
@@ -417,6 +423,23 @@ KBUILD_CFLAGS := -Wall -Wstrict-prototypes \
-fno-builtin -ffreestanding $(CSTD_FLAG)
KBUILD_CFLAGS += -fshort-wchar -fno-strict-aliasing
KBUILD_AFLAGS := -D__ASSEMBLY__
KBUILD_LDFLAGS :=
ifeq ($(cc-name),clang)
ifneq ($(CROSS_COMPILE),)
CLANG_TARGET := --target=$(notdir $(CROSS_COMPILE:%-=%))
GCC_TOOLCHAIN_DIR := $(dir $(shell which $(LD)))
CLANG_PREFIX := --prefix=$(GCC_TOOLCHAIN_DIR)
GCC_TOOLCHAIN := $(realpath $(GCC_TOOLCHAIN_DIR)/..)
endif
ifneq ($(GCC_TOOLCHAIN),)
CLANG_GCC_TC := --gcc-toolchain=$(GCC_TOOLCHAIN)
endif
KBUILD_CFLAGS += $(CLANG_TARGET) $(CLANG_GCC_TC) $(CLANG_PREFIX)
KBUILD_AFLAGS += $(CLANG_TARGET) $(CLANG_GCC_TC) $(CLANG_PREFIX)
KBUILD_CFLAGS += $(call cc-option, -no-integrated-as)
KBUILD_AFLAGS += $(call cc-option, -no-integrated-as)
endif
# Don't generate position independent code
KBUILD_CFLAGS += $(call cc-option,-fno-PIE)
@@ -428,14 +451,16 @@ UBOOTVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SU
export VERSION PATCHLEVEL SUBLEVEL UBOOTRELEASE UBOOTVERSION
export ARCH CPU BOARD VENDOR SOC CPUDIR BOARDDIR
export CONFIG_SHELL HOSTCC HOSTCFLAGS HOSTLDFLAGS CROSS_COMPILE AS LD CC
export CPP AR NM LDR STRIP OBJCOPY OBJDUMP
export CONFIG_SHELL HOSTCC KBUILD_HOSTCFLAGS CROSS_COMPILE AS LD CC
export CPP AR NM LDR STRIP OBJCOPY OBJDUMP KBUILD_HOSTLDFLAGS KBUILD_HOSTLDLIBS
export MAKE LEX YACC AWK PERL PYTHON PYTHON2 PYTHON3
export HOSTCXX HOSTCXXFLAGS CHECK CHECKFLAGS DTC DTC_FLAGS
export HOSTCXX KBUILD_HOSTCXXFLAGS CHECK CHECKFLAGS DTC DTC_FLAGS
export KBUILD_CPPFLAGS NOSTDINC_FLAGS UBOOTINCLUDE OBJCOPYFLAGS LDFLAGS
export KBUILD_CPPFLAGS NOSTDINC_FLAGS UBOOTINCLUDE OBJCOPYFLAGS KBUILD_LDFLAGS
export KBUILD_CFLAGS KBUILD_AFLAGS
export CC_VERSION_TEXT := $(shell $(CC) --version | head -n 1)
# When compiling out-of-tree modules, put MODVERDIR in the module
# tree rather than in the kernel tree. The kernel tree might
# even be read-only.
@@ -483,10 +508,11 @@ endif
version_h := include/generated/version_autogenerated.h
timestamp_h := include/generated/timestamp_autogenerated.h
defaultenv_h := include/generated/defaultenv_autogenerated.h
dt_h := include/generated/dt.h
no-dot-config-targets := clean clobber mrproper distclean \
help %docs check% coccicheck \
ubootversion backup tests check qcheck
ubootversion backup tests check qcheck tcheck
config-targets := 0
mixed-targets := 0
@@ -654,6 +680,9 @@ endif
KBUILD_CFLAGS += $(call cc-option,-fno-stack-protector)
KBUILD_CFLAGS += $(call cc-option,-fno-delete-null-pointer-checks)
# disable stringop warnings in gcc 8+
KBUILD_CFLAGS += $(call cc-disable-warning, stringop-truncation)
# change __FILE__ to the relative path from the srctree
KBUILD_CFLAGS += $(call cc-option,-fmacro-prefix-map=$(srctree)/=)
@@ -678,7 +707,19 @@ ifeq ($(cc-name),clang)
KBUILD_CPPFLAGS += $(call cc-option,-Qunused-arguments,)
KBUILD_CFLAGS += $(call cc-disable-warning, format-invalid-specifier)
KBUILD_CFLAGS += $(call cc-disable-warning, gnu)
KBUILD_CFLAGS += $(call cc-disable-warning, address-of-packed-member)
# Quiet clang warning: comparison of unsigned expression < 0 is always false
KBUILD_CFLAGS += $(call cc-disable-warning, tautological-compare)
# CLANG uses a _MergedGlobals as optimization, but this breaks modpost, as the
# source of a reference will be _MergedGlobals and not on of the whitelisted names.
# See modpost pattern 2
KBUILD_CFLAGS += $(call cc-option, -mno-global-merge,)
KBUILD_CFLAGS += $(call cc-option, -fcatch-undefined-behavior)
else
# These warnings generated too much noise in a regular build.
# Use make W=1 to enable them (see scripts/Makefile.extrawarn)
KBUILD_CFLAGS += $(call cc-disable-warning, unused-but-set-variable)
endif
# turn jbsr into jsr for m68k
@@ -701,16 +742,17 @@ KBUILD_CFLAGS += $(KCFLAGS)
# Use UBOOTINCLUDE when you must reference the include/ directory.
# Needed to be compatible with the O= option
UBOOTINCLUDE := \
-Iinclude \
$(if $(KBUILD_SRC), -I$(srctree)/include) \
$(if $(CONFIG_$(SPL_)SYS_THUMB_BUILD), \
$(if $(CONFIG_HAS_THUMB2),, \
-I$(srctree)/arch/$(ARCH)/thumb1/include),) \
-I$(srctree)/arch/$(ARCH)/include \
-include $(srctree)/include/linux/kconfig.h
-Iinclude \
$(if $(KBUILD_SRC), -I$(srctree)/include) \
$(if $(CONFIG_$(SPL_)SYS_THUMB_BUILD), \
$(if $(CONFIG_HAS_THUMB2), \
$(if $(CONFIG_CPU_V7M), \
-I$(srctree)/arch/arm/thumb1/include), \
-I$(srctree)/arch/arm/thumb1/include)) \
-I$(srctree)/arch/$(ARCH)/include \
-include $(srctree)/include/linux/kconfig.h
NOSTDINC_FLAGS += -nostdinc -isystem $(shell $(CC) -print-file-name=include)
CHECKFLAGS += $(NOSTDINC_FLAGS)
# FIX ME
cpp_flags := $(KBUILD_CPPFLAGS) $(PLATFORM_CPPFLAGS) $(UBOOTINCLUDE) \
@@ -924,6 +966,12 @@ ifeq ($(CONFIG_ARC)$(CONFIG_NIOS2)$(CONFIG_X86)$(CONFIG_XTENSA),)
LDFLAGS_u-boot += -Ttext $(CONFIG_SYS_TEXT_BASE)
endif
# insure the checker run with the right endianness
CHECKFLAGS += $(if $(CONFIG_CPU_BIG_ENDIAN),-mbig-endian,-mlittle-endian)
# the checker needs the correct machine size
CHECKFLAGS += $(if $(CONFIG_64BIT),-m64,-m32)
# Normally we fill empty space with 0xff
quiet_cmd_objcopy = OBJCOPY $@
cmd_objcopy = $(OBJCOPY) --gap-fill=0xff $(OBJCOPYFLAGS) \
@@ -954,6 +1002,9 @@ append = cat $(filter-out $< $(PHONY), $^) >> $@
quiet_cmd_pad_cat = CAT $@
cmd_pad_cat = $(cmd_objcopy) && $(append) || rm -f $@
quiet_cmd_lzma = LZMA $@
cmd_lzma = lzma -c -z -k -9 $< > $@
cfg: u-boot.cfg
quiet_cmd_cfgcheck = CFGCHK $2
@@ -1274,7 +1325,9 @@ endif
# Boards with more complex image requirements can provide an .its source file
# or a generator script
ifneq ($(CONFIG_SPL_FIT_SOURCE),"")
U_BOOT_ITS = $(subst ",,$(CONFIG_SPL_FIT_SOURCE))
U_BOOT_ITS := u-boot.its
$(U_BOOT_ITS): $(subst ",,$(CONFIG_SPL_FIT_SOURCE))
$(call if_changed,copy)
else
ifneq ($(CONFIG_SPL_FIT_GENERATOR),"")
U_BOOT_ITS := u-boot.its
@@ -1336,6 +1389,16 @@ else
UBOOT_BIN := u-boot.bin
endif
MKIMAGEFLAGS_u-boot-lzma.img = -A $(ARCH) -T standalone -C lzma -O u-boot \
-a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \
-n "U-Boot $(UBOOTRELEASE) for $(BOARD) board"
u-boot.bin.lzma: u-boot.bin FORCE
$(call if_changed,lzma)
u-boot-lzma.img: u-boot.bin.lzma FORCE
$(call if_changed,mkimage)
u-boot-dtb.img u-boot.img u-boot.kwb u-boot.pbl u-boot-ivt.img: \
$(if $(CONFIG_SPL_LOAD_FIT),u-boot-nodtb.bin \
$(if $(CONFIG_OF_SEPARATE)$(CONFIG_OF_EMBED)$(CONFIG_OF_HOSTFILE),dts/dt.dtb) \
@@ -1683,7 +1746,7 @@ ARCH_POSTLINK := $(wildcard $(srctree)/arch/$(ARCH)/Makefile.postlink)
# Rule to link u-boot
# May be overridden by arch/$(ARCH)/config.mk
quiet_cmd_u-boot__ ?= LD $@
cmd_u-boot__ ?= $(LD) $(LDFLAGS) $(LDFLAGS_u-boot) -o $@ \
cmd_u-boot__ ?= $(LD) $(KBUILD_LDFLAGS) $(LDFLAGS_u-boot) -o $@ \
-T u-boot.lds $(u-boot-init) \
--start-group $(u-boot-main) --end-group \
$(PLATFORM_LIBS) -Map u-boot.map; \
@@ -1767,7 +1830,7 @@ endif
# prepare2 creates a makefile if using a separate output directory
prepare2: prepare3 outputmakefile cfg
prepare1: prepare2 $(version_h) $(timestamp_h) \
prepare1: prepare2 $(version_h) $(timestamp_h) $(dt_h) \
include/config/auto.conf
ifeq ($(wildcard $(LDSCRIPT)),)
@echo >&2 " Could not find linker script."
@@ -1833,12 +1896,23 @@ define filechk_defaultenv.h
xxd -i ; echo ", 0x00" ; )
endef
define filechk_dt.h
(if test -n "$${DEVICE_TREE}"; then \
echo \#define DEVICE_TREE \"$(DEVICE_TREE)\"; \
else \
echo \#define DEVICE_TREE CONFIG_DEFAULT_DEVICE_TREE; \
fi)
endef
$(version_h): include/config/uboot.release FORCE
$(call filechk,version.h)
$(timestamp_h): $(srctree)/Makefile FORCE
$(call filechk,timestamp.h)
$(dt_h): $(srctree)/Makefile FORCE
$(call filechk,dt.h)
$(defaultenv_h): $(CONFIG_DEFAULT_ENV_FILE:"%"=%) FORCE
$(call filechk,defaultenv.h)
@@ -2039,6 +2113,7 @@ help:
@echo ''
@echo ' check - Run all automated tests that use sandbox'
@echo ' qcheck - Run quick automated tests that use sandbox'
@echo ' tcheck - Run quick automated tests on tools'
@echo ''
@echo 'Other generic targets:'
@echo ' all - Build all necessary images depending on configuration'
@@ -2084,6 +2159,9 @@ tests check:
qcheck:
$(srctree)/test/run quick
tcheck:
$(srctree)/test/run tools
# Documentation targets
# ---------------------------------------------------------------------------
DOC_TARGETS := xmldocs latexdocs pdfdocs htmldocs epubdocs cleandocs \
@@ -2182,8 +2260,7 @@ quiet_cmd_rmfiles = $(if $(wildcard $(rm-files)),CLEAN $(wildcard $(rm-files))
# read all saved command lines
targets := $(wildcard $(sort $(targets)))
cmd_files := $(wildcard .*.cmd $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
cmd_files := $(wildcard .*.cmd $(foreach f,$(sort $(targets)),$(dir $(f)).$(notdir $(f)).cmd))
ifneq ($(cmd_files),)
$(cmd_files): ; # Do not try to update included dependency files
@@ -2195,6 +2272,6 @@ endif # skip-makefile
PHONY += FORCE
FORCE:
# Declare the contents of the .PHONY variable as phony. We keep that
# Declare the contents of the PHONY variable as phony. We keep that
# information in a variable so we can use it in if_changed and friends.
.PHONY: $(PHONY)

28
README
View File

@@ -1632,16 +1632,6 @@ The following options need to be configured:
- activate this driver with CONFIG_SYS_I2C_RCAR
- This driver adds 4 i2c buses
- CONFIG_SYS_RCAR_I2C0_BASE for setting the register channel 0
- CONFIG_SYS_RCAR_I2C0_SPEED for for the speed channel 0
- CONFIG_SYS_RCAR_I2C1_BASE for setting the register channel 1
- CONFIG_SYS_RCAR_I2C1_SPEED for for the speed channel 1
- CONFIG_SYS_RCAR_I2C2_BASE for setting the register channel 2
- CONFIG_SYS_RCAR_I2C2_SPEED for for the speed channel 2
- CONFIG_SYS_RCAR_I2C3_BASE for setting the register channel 3
- CONFIG_SYS_RCAR_I2C3_SPEED for for the speed channel 3
- CONFIF_SYS_RCAR_I2C_NUM_CONTROLLERS for number of i2c buses
- drivers/i2c/sh_i2c.c:
- activate this driver with CONFIG_SYS_I2C_SH
- This driver adds from 2 to 5 i2c buses
@@ -3186,16 +3176,6 @@ necessary. For example using the ELDK on a 4xx CPU, please enter:
$ CROSS_COMPILE=ppc_4xx-
$ export CROSS_COMPILE
Note: If you wish to generate Windows versions of the utilities in
the tools directory you can use the MinGW toolchain
(http://www.mingw.org). Set your HOST tools to the MinGW
toolchain and execute 'make tools'. For example:
$ make HOSTCC=i586-mingw32msvc-gcc HOSTSTRIP=i586-mingw32msvc-strip tools
Binaries such as tools/mkimage.exe will be created which can
be executed on computers running Windows.
U-Boot is intended to be simple to build. After installing the
sources you must configure U-Boot for one specific board type. This
is done by typing:
@@ -3203,9 +3183,9 @@ is done by typing:
make NAME_defconfig
where "NAME_defconfig" is the name of one of the existing configu-
rations; see boards.cfg for supported names.
rations; see configs/*_defconfig for supported names.
Note: for some board special configuration names may exist; check if
Note: for some boards special configuration names may exist; check if
additional information is available from the board vendor; for
instance, the TQM823L systems are available without (standard)
or with LCD support. You can select such additional "features"
@@ -4639,7 +4619,7 @@ int main(int argc, char *argv[])
while (learning) {
Read the README file in the top level directory;
Read http://www.denx.de/twiki/bin/view/DULG/Manual;
Read applicable doc/*.README;
Read applicable doc/README.*;
Read the source, Luke;
/* find . -name "*.[chS]" | xargs grep -i <keyword> */
}
@@ -4734,8 +4714,6 @@ it:
* For new features: a description of the feature and your
implementation.
* A CHANGELOG entry as plaintext (separate from the patch)
* For major contributions, add a MAINTAINERS file with your
information and associated file and directory references.

View File

@@ -96,6 +96,7 @@ config SANDBOX
select DM_SPI_FLASH
select HAVE_BLOCK_DEVICE
select LZO
select OF_BOARD_SETUP
select PCI_ENDPOINT
select SPI
select SUPPORT_OF_CONTROL

View File

@@ -164,18 +164,16 @@ config TARGET_NSIM
config TARGET_AXS101
bool "Support Synopsys Designware SDP board AXS101"
select BOUNCE_BUFFER if CMD_NAND
config TARGET_AXS103
bool "Support Synopsys Designware SDP board AXS103"
select BOUNCE_BUFFER if CMD_NAND
config TARGET_EMSDP
bool "Synopsys EM Software Development Platform"
select CPU_ARCEM6
config TARGET_HSDK
bool "Support Synpsys HS DevelopmentKit board"
bool "Support Synopsys HSDK or HSDK-4xD board"
config TARGET_IOT_DEVKIT
bool "Synopsys Brite IoT Development kit"

View File

@@ -9,12 +9,12 @@ CONFIG_SYS_BIG_ENDIAN = 1
endif
ifdef CONFIG_SYS_LITTLE_ENDIAN
PLATFORM_LDFLAGS += -EL
KBUILD_LDFLAGS += -EL
PLATFORM_CPPFLAGS += -mlittle-endian
endif
ifdef CONFIG_SYS_BIG_ENDIAN
PLATFORM_LDFLAGS += -EB
KBUILD_LDFLAGS += -EB
PLATFORM_CPPFLAGS += -mbig-endian
endif

View File

@@ -5,7 +5,7 @@ dtb-$(CONFIG_TARGET_AXS103) += axs103.dtb
dtb-$(CONFIG_TARGET_NSIM) += nsim.dtb
dtb-$(CONFIG_TARGET_TB100) += abilis_tb100.dtb
dtb-$(CONFIG_TARGET_EMSDP) += emsdp.dtb
dtb-$(CONFIG_TARGET_HSDK) += hsdk.dtb
dtb-$(CONFIG_TARGET_HSDK) += hsdk.dtb hsdk-4xd.dtb
dtb-$(CONFIG_TARGET_IOT_DEVKIT) += iot_devkit.dtb
targets += $(dtb-y)

12
arch/arc/dts/hsdk-4xd.dts Normal file
View File

@@ -0,0 +1,12 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2020 Synopsys, Inc. All rights reserved.
* Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
*/
/dts-v1/;
#include "hsdk-common.dtsi"
/ {
model = "snps,hsdk-4xd";
};

View File

@@ -0,0 +1,152 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017-2020 Synopsys, Inc. All rights reserved.
* Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
*/
/dts-v1/;
#include "skeleton.dtsi"
#include "dt-bindings/clock/snps,hsdk-cgu.h"
#include "dt-bindings/reset/snps,hsdk-reset.h"
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
spi0 = &spi0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <500000000>;
u-boot,dm-pre-reloc;
};
};
clk-fmeas {
clocks = <&cgu_clk CLK_ARC_PLL>, <&cgu_clk CLK_SYS_PLL>,
<&cgu_clk CLK_TUN_PLL>, <&cgu_clk CLK_DDR_PLL>,
<&cgu_clk CLK_ARC>, <&cgu_clk CLK_HDMI_PLL>,
<&cgu_clk CLK_TUN_TUN>, <&cgu_clk CLK_HDMI>,
<&cgu_clk CLK_SYS_APB>, <&cgu_clk CLK_SYS_AXI>,
<&cgu_clk CLK_SYS_ETH>, <&cgu_clk CLK_SYS_USB>,
<&cgu_clk CLK_SYS_SDIO>, <&cgu_clk CLK_SYS_HDMI>,
<&cgu_clk CLK_SYS_GFX_CORE>, <&cgu_clk CLK_SYS_GFX_DMA>,
<&cgu_clk CLK_SYS_GFX_CFG>, <&cgu_clk CLK_SYS_DMAC_CORE>,
<&cgu_clk CLK_SYS_DMAC_CFG>, <&cgu_clk CLK_SYS_SDIO_REF>,
<&cgu_clk CLK_SYS_SPI_REF>, <&cgu_clk CLK_SYS_I2C_REF>,
<&cgu_clk CLK_SYS_UART_REF>, <&cgu_clk CLK_SYS_EBI_REF>,
<&cgu_clk CLK_TUN_ROM>, <&cgu_clk CLK_TUN_PWM>,
<&cgu_clk CLK_TUN_TIMER>;
clock-names = "cpu-pll", "sys-pll",
"tun-pll", "ddr-clk",
"cpu-clk", "hdmi-pll",
"tun-clk", "hdmi-clk",
"apb-clk", "axi-clk",
"eth-clk", "usb-clk",
"sdio-clk", "hdmi-sys-clk",
"gfx-core-clk", "gfx-dma-clk",
"gfx-cfg-clk", "dmac-core-clk",
"dmac-cfg-clk", "sdio-ref-clk",
"spi-clk", "i2c-clk",
"uart-clk", "ebi-clk",
"rom-clk", "pwm-clk",
"timer-clk";
};
cgu_clk: cgu-clk@f0000000 {
compatible = "snps,hsdk-cgu-clock";
reg = <0xf0000000 0x10>, <0xf00014B8 0x4>;
#clock-cells = <1>;
};
cgu_rst: reset-controller@f00008a0 {
compatible = "snps,hsdk-reset";
#reset-cells = <1>;
reg = <0xf00008a0 0x4>, <0xf0000ff0 0x4>;
};
uart0: serial0@f0005000 {
compatible = "snps,dw-apb-uart";
reg = <0xf0005000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
ethernet@f0008000 {
#interrupt-cells = <1>;
compatible = "snps,arc-dwmac-3.70a";
reg = <0xf0008000 0x2000>;
phy-mode = "gmii";
};
ehci@0xf0040000 {
compatible = "generic-ehci";
reg = <0xf0040000 0x100>;
};
ohci@0xf0060000 {
compatible = "generic-ohci";
reg = <0xf0060000 0x100>;
};
mmcclk_ciu: mmcclk-ciu {
compatible = "fixed-clock";
/*
* DW sdio controller has external ciu clock divider
* controlled via register in SDIO IP. Due to its
* unexpected default value (it should divide by 1
* but it divides by 8) SDIO IP uses wrong clock and
* works unstable (see STAR 9001204800)
* We switched to the minimum possible value of the
* divisor (div-by-2) in HSDK platform code.
* So default mmcclk ciu clock is 50000000 Hz.
*/
clock-frequency = <50000000>;
#clock-cells = <0>;
};
mmc: mmc0@f000a000 {
compatible = "snps,dw-mshc";
reg = <0xf000a000 0x400>;
bus-width = <4>;
fifo-depth = <256>;
clocks = <&cgu_clk CLK_SYS_SDIO>, <&mmcclk_ciu>;
clock-names = "biu", "ciu";
max-frequency = <25000000>;
};
spi0: spi@f0020000 {
compatible = "snps,dw-apb-ssi";
reg = <0xf0020000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <4000000>;
clocks = <&cgu_clk CLK_SYS_SPI_REF>;
clock-names = "spi_clk";
cs-gpio = <&cs_gpio 0>;
spi_flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <4000000>;
};
};
cs_gpio: gpio@f00014b0 {
compatible = "snps,creg-gpio";
reg = <0xf00014b0 0x4>;
gpio-controller;
#gpio-cells = <1>;
gpio-bank-name = "hsdk-spi-cs";
gpio-count = <1>;
gpio-first-shift = <0>;
gpio-bit-per-line = <2>;
gpio-activate-val = <2>;
gpio-deactivate-val = <3>;
gpio-default-val = <1>;
};
};

View File

@@ -1,144 +1,12 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2017 Synopsys, Inc. All rights reserved.
* Copyright (C) 2017-2020 Synopsys, Inc. All rights reserved.
* Author: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
*/
/dts-v1/;
#include "skeleton.dtsi"
#include "dt-bindings/clock/snps,hsdk-cgu.h"
#include "hsdk-common.dtsi"
/ {
model = "snps,hsdk";
#address-cells = <1>;
#size-cells = <1>;
aliases {
console = &uart0;
spi0 = &spi0;
};
cpu_card {
core_clk: core_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <500000000>;
u-boot,dm-pre-reloc;
};
};
clk-fmeas {
clocks = <&cgu_clk CLK_ARC_PLL>, <&cgu_clk CLK_SYS_PLL>,
<&cgu_clk CLK_TUN_PLL>, <&cgu_clk CLK_DDR_PLL>,
<&cgu_clk CLK_ARC>, <&cgu_clk CLK_HDMI_PLL>,
<&cgu_clk CLK_TUN_TUN>, <&cgu_clk CLK_HDMI>,
<&cgu_clk CLK_SYS_APB>, <&cgu_clk CLK_SYS_AXI>,
<&cgu_clk CLK_SYS_ETH>, <&cgu_clk CLK_SYS_USB>,
<&cgu_clk CLK_SYS_SDIO>, <&cgu_clk CLK_SYS_HDMI>,
<&cgu_clk CLK_SYS_GFX_CORE>, <&cgu_clk CLK_SYS_GFX_DMA>,
<&cgu_clk CLK_SYS_GFX_CFG>, <&cgu_clk CLK_SYS_DMAC_CORE>,
<&cgu_clk CLK_SYS_DMAC_CFG>, <&cgu_clk CLK_SYS_SDIO_REF>,
<&cgu_clk CLK_SYS_SPI_REF>, <&cgu_clk CLK_SYS_I2C_REF>,
<&cgu_clk CLK_SYS_UART_REF>, <&cgu_clk CLK_SYS_EBI_REF>,
<&cgu_clk CLK_TUN_ROM>, <&cgu_clk CLK_TUN_PWM>;
clock-names = "cpu-pll", "sys-pll",
"tun-pll", "ddr-clk",
"cpu-clk", "hdmi-pll",
"tun-clk", "hdmi-clk",
"apb-clk", "axi-clk",
"eth-clk", "usb-clk",
"sdio-clk", "hdmi-sys-clk",
"gfx-core-clk", "gfx-dma-clk",
"gfx-cfg-clk", "dmac-core-clk",
"dmac-cfg-clk", "sdio-ref-clk",
"spi-clk", "i2c-clk",
"uart-clk", "ebi-clk",
"rom-clk", "pwm-clk";
};
cgu_clk: cgu-clk@f0000000 {
compatible = "snps,hsdk-cgu-clock";
reg = <0xf0000000 0x10>, <0xf00014B8 0x4>;
#clock-cells = <1>;
};
uart0: serial0@f0005000 {
compatible = "snps,dw-apb-uart";
reg = <0xf0005000 0x1000>;
reg-shift = <2>;
reg-io-width = <4>;
};
ethernet@f0008000 {
#interrupt-cells = <1>;
compatible = "snps,arc-dwmac-3.70a";
reg = <0xf0008000 0x2000>;
phy-mode = "gmii";
};
ehci@0xf0040000 {
compatible = "generic-ehci";
reg = <0xf0040000 0x100>;
};
ohci@0xf0060000 {
compatible = "generic-ohci";
reg = <0xf0060000 0x100>;
};
mmcclk_ciu: mmcclk-ciu {
compatible = "fixed-clock";
/*
* DW sdio controller has external ciu clock divider
* controlled via register in SDIO IP. Due to its
* unexpected default value (it should divide by 1
* but it divides by 8) SDIO IP uses wrong clock and
* works unstable (see STAR 9001204800)
* We switched to the minimum possible value of the
* divisor (div-by-2) in HSDK platform code.
* So default mmcclk ciu clock is 50000000 Hz.
*/
clock-frequency = <50000000>;
#clock-cells = <0>;
};
mmc: mmc0@f000a000 {
compatible = "snps,dw-mshc";
reg = <0xf000a000 0x400>;
bus-width = <4>;
fifo-depth = <256>;
clocks = <&cgu_clk CLK_SYS_SDIO>, <&mmcclk_ciu>;
clock-names = "biu", "ciu";
max-frequency = <25000000>;
};
spi0: spi@f0020000 {
compatible = "snps,dw-apb-ssi";
reg = <0xf0020000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <4000000>;
clocks = <&cgu_clk CLK_SYS_SPI_REF>;
clock-names = "spi_clk";
cs-gpio = <&cs_gpio 0>;
spi_flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <4000000>;
};
};
cs_gpio: gpio@f00014b0 {
compatible = "snps,creg-gpio";
reg = <0xf00014b0 0x4>;
gpio-controller;
#gpio-cells = <1>;
gpio-bank-name = "hsdk-spi-cs";
gpio-count = <1>;
gpio-first-shift = <0>;
gpio-bit-per-line = <2>;
gpio-activate-val = <2>;
gpio-deactivate-val = <3>;
gpio-default-val = <1>;
};
};

View File

@@ -51,6 +51,9 @@
#define ARC_AUX_DCCM_BASE 0x18 /* DCCM Base Addr ARCv2 */
#define ARC_AUX_ICCM_BASE 0x208 /* ICCM Base Addr ARCv2 */
/* CSM auxiliary registers */
#define ARC_AUX_CSM_ENABLE 0x9A0
/* Timer related auxiliary registers */
#define ARC_AUX_TIMER0_CNT 0x21 /* Timer 0 count */
#define ARC_AUX_TIMER0_CTRL 0x22 /* Timer 0 control */
@@ -100,6 +103,7 @@
/* DSP-extensions related auxiliary registers */
#define ARC_AUX_DSP_BUILD 0x7A
#define ARC_AUX_DSP_CTRL 0x59F
/* ARC Subsystems related auxiliary registers */
#define ARC_AUX_SUBSYS_BUILD 0xF0

View File

@@ -40,6 +40,13 @@ static const inline int is_ioc_enabled(void)
return IS_ENABLED(CONFIG_ARC_DBG_IOC_ENABLE);
}
/*
* We export SLC control functions to use them in platform configuration code.
* They maust not be used in any generic code!
*/
void slc_enable(void);
void slc_disable(void);
#endif /* __ASSEMBLY__ */
#endif /* __ASM_ARC_CACHE_H */

View File

@@ -89,8 +89,7 @@
*
* [ NOTE 2 ]:
* As of today we only support the following cache configurations on ARC.
* Other configurations may exist in HW (for example, since version 3.0 HS
* supports SL$ (L2 system level cache) disable) but we don't support it in SW.
* Other configurations may exist in HW but we don't support it in SW.
* Configuration 1:
* ______________________
* | |
@@ -120,7 +119,8 @@
* | |
* | L2 (SL$) |
* |______________________|
* always must be on
* always on (ARCv2, HS < 3.0)
* on/off (ARCv2, HS >= 3.0)
* ___|______________|____
* | |
* | main memory |
@@ -178,6 +178,8 @@ DECLARE_GLOBAL_DATA_PTR;
static inlined_cachefunc void __ic_entire_invalidate(void);
static inlined_cachefunc void __dc_entire_op(const int cacheop);
static inlined_cachefunc void __slc_entire_op(const int op);
static inlined_cachefunc bool ioc_enabled(void);
static inline bool pae_exists(void)
{
@@ -238,6 +240,70 @@ static inlined_cachefunc bool slc_exists(void)
return false;
}
enum slc_dis_status {
ST_SLC_MISSING = 0,
ST_SLC_NO_DISABLE_CTRL,
ST_SLC_DISABLE_CTRL
};
/*
* ARCv1 -> ST_SLC_MISSING
* ARCv2 && SLC absent -> ST_SLC_MISSING
* ARCv2 && SLC exists && SLC version <= 2 -> ST_SLC_NO_DISABLE_CTRL
* ARCv2 && SLC exists && SLC version > 2 -> ST_SLC_DISABLE_CTRL
*/
static inlined_cachefunc enum slc_dis_status slc_disable_supported(void)
{
if (is_isa_arcv2()) {
union bcr_generic sbcr;
sbcr.word = read_aux_reg(ARC_BCR_SLC);
if (sbcr.fields.ver == 0)
return ST_SLC_MISSING;
else if (sbcr.fields.ver <= 2)
return ST_SLC_NO_DISABLE_CTRL;
else
return ST_SLC_DISABLE_CTRL;
}
return ST_SLC_MISSING;
}
static inlined_cachefunc bool __slc_enabled(void)
{
return !(read_aux_reg(ARC_AUX_SLC_CTRL) & SLC_CTRL_DIS);
}
static inlined_cachefunc void __slc_enable(void)
{
unsigned int ctrl;
ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
ctrl &= ~SLC_CTRL_DIS;
write_aux_reg(ARC_AUX_SLC_CTRL, ctrl);
}
static inlined_cachefunc void __slc_disable(void)
{
unsigned int ctrl;
ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
ctrl |= SLC_CTRL_DIS;
write_aux_reg(ARC_AUX_SLC_CTRL, ctrl);
}
static inlined_cachefunc bool slc_enabled(void)
{
enum slc_dis_status slc_status = slc_disable_supported();
if (slc_status == ST_SLC_MISSING)
return false;
else if (slc_status == ST_SLC_NO_DISABLE_CTRL)
return true;
else
return __slc_enabled();
}
static inlined_cachefunc bool slc_data_bypass(void)
{
/*
@@ -247,7 +313,40 @@ static inlined_cachefunc bool slc_data_bypass(void)
return !dcache_enabled();
}
static inline bool ioc_exists(void)
void slc_enable(void)
{
if (slc_disable_supported() != ST_SLC_DISABLE_CTRL)
return;
if (__slc_enabled())
return;
__slc_enable();
}
/* TODO: warn if we are not able to disable SLC */
void slc_disable(void)
{
if (slc_disable_supported() != ST_SLC_DISABLE_CTRL)
return;
/* we don't support SLC disabling if we use IOC */
if (ioc_enabled())
return;
if (!__slc_enabled())
return;
/*
* We need to flush L1D$ to guarantee that we won't have any
* writeback operations during SLC disabling.
*/
__dc_entire_op(OP_FLUSH);
__slc_entire_op(OP_FLUSH_N_INV);
__slc_disable();
}
static inlined_cachefunc bool ioc_exists(void)
{
if (is_isa_arcv2()) {
union bcr_clust_cfg cbcr;
@@ -259,7 +358,7 @@ static inline bool ioc_exists(void)
return false;
}
static inline bool ioc_enabled(void)
static inlined_cachefunc bool ioc_enabled(void)
{
/*
* We check only CONFIG option instead of IOC HW state check as IOC
@@ -275,7 +374,7 @@ static inlined_cachefunc void __slc_entire_op(const int op)
{
unsigned int ctrl;
if (!slc_exists())
if (!slc_enabled())
return;
ctrl = read_aux_reg(ARC_AUX_SLC_CTRL);
@@ -324,7 +423,7 @@ static void __slc_rgn_op(unsigned long paddr, unsigned long sz, const int op)
unsigned int ctrl;
unsigned long end;
if (!slc_exists())
if (!slc_enabled())
return;
/*
@@ -382,6 +481,9 @@ static void arc_ioc_setup(void)
if (!slc_exists())
panic("Try to enable IOC but SLC is not present");
if (!slc_enabled())
panic("Try to enable IOC but SLC is disabled");
/* Unsupported configuration. See [ NOTE 2 ] for more details. */
if (!dcache_enabled())
panic("Try to enable IOC but L1 D$ is disabled");
@@ -517,8 +619,6 @@ void invalidate_icache_all(void)
/*
* If SL$ is bypassed for data it is used only for instructions,
* so we need to invalidate it too.
* TODO: HS 3.0 supports SLC disable so we need to check slc
* enable/disable status here.
*/
if (is_isa_arcv2() && slc_data_bypass())
__slc_entire_op(OP_INV);

View File

@@ -61,6 +61,21 @@ ENTRY(_start)
1:
#endif
#ifdef CONFIG_ISA_ARCV2
; In case of DSP extension presence in HW some instructions
; (related to integer multiply, multiply-accumulate, and divide
; operation) executes on this DSP execution unit. So their
; execution will depend on dsp configuration register (DSP_CTRL)
; As we want these instructions to execute the same way regardless
; of DSP presence we need to set DSP_CTRL properly.
lr r5, [ARC_AUX_DSP_BUILD]
bmsk r5, r5, 7
breq r5, 0, 1f
mov r5, 0
sr r5, [ARC_AUX_DSP_CTRL]
1:
#endif
#ifdef __ARC_UNALIGNED__
/*
* Enable handling of unaligned access in the CPU as by default

View File

@@ -762,6 +762,7 @@ config ARCH_OMAP2PLUS
config ARCH_MESON
bool "Amlogic Meson"
imply DISTRO_DEFAULTS
imply DM_RNG
help
Support for the Meson SoC family developed by Amlogic Inc.,
targeted at media players and tablet computers. We currently
@@ -873,10 +874,13 @@ config ARCH_MX5
config ARCH_OWL
bool "Actions Semi OWL SoCs"
select ARM64
select DM
select DM_SERIAL
select OWL_SERIAL
select CLK
select CLK_OWL
select OF_CONTROL
select CONFIG_SYS_RELOC_GD_ENV_ADDR
imply CMD_DM
config ARCH_QEMU
@@ -1586,6 +1590,7 @@ config ARCH_STI
config ARCH_STM32MP
bool "Support STMicroelectronics STM32MP Socs with cortex A"
select ARCH_MISC_INIT
select ARCH_SUPPORT_TFABOOT
select BOARD_LATE_INIT
select CLK
select DM
@@ -1868,7 +1873,6 @@ source "board/spear/spear600/Kconfig"
source "board/spear/x600/Kconfig"
source "board/st/stv0991/Kconfig"
source "board/tcl/sl50/Kconfig"
source "board/ucRobotics/bubblegum_96/Kconfig"
source "board/birdland/bav335x/Kconfig"
source "board/toradex/colibri_pxa270/Kconfig"
source "board/variscite/dart_6ul/Kconfig"

View File

@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2014-2015 Freescale Semiconductor, Inc.
* Copyright 2020 NXP
*/
#include <common.h>
@@ -31,6 +32,14 @@
int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
{
const char *conn;
/* Do NOT apply fixup for backplane modes specified in DT */
if (phyc == PHY_INTERFACE_MODE_XGMII) {
conn = fdt_getprop(blob, offset, "phy-connection-type", NULL);
if (is_backplane_mode(conn))
return 0;
}
return fdt_setprop_string(blob, offset, "phy-connection-type",
phy_string_for_interface(phyc));
}

View File

@@ -64,8 +64,10 @@ dtb-$(CONFIG_KIRKWOOD) += \
kirkwood-pogo_e02.dtb \
kirkwood-sheevaplug.dtb
dtb-$(CONFIG_ARCH_OWL) += \
dtb-$(CONFIG_MACH_S900) += \
bubblegum_96.dtb
dtb-$(CONFIG_MACH_S700) += \
s700-cubieboard7.dtb
dtb-$(CONFIG_ROCKCHIP_PX30) += \
px30-evb.dtb \
@@ -147,7 +149,9 @@ dtb-$(CONFIG_ARCH_MESON) += \
meson-gxl-s805x-libretech-ac.dtb \
meson-gxl-s905x-libretech-cc.dtb \
meson-gxl-s905x-khadas-vim.dtb \
meson-gxl-s905d-libretech-pc.dtb \
meson-gxm-khadas-vim2.dtb \
meson-gxm-s912-libretech-pc.dtb \
meson-axg-s400.dtb \
meson-g12a-u200.dtb \
meson-g12a-sei510.dtb \
@@ -189,25 +193,25 @@ dtb-$(CONFIG_ARCH_MVEBU) += \
armada-3720-turris-mox.dtb \
armada-3720-uDPU.dtb \
armada-375-db.dtb \
armada-385-atl-x530.dtb \
armada-385-atl-x530DP.dtb \
armada-385-db-88f6820-amc.dtb \
armada-385-turris-omnia.dtb \
armada-388-clearfog.dtb \
armada-388-gp.dtb \
armada-388-helios4.dtb \
armada-385-db-88f6820-amc.dtb \
armada-385-turris-omnia.dtb \
armada-7040-db.dtb \
armada-38x-controlcenterdc.dtb \
armada-7040-db-nand.dtb \
armada-7040-db.dtb \
armada-8040-clearfog-gt-8k.dtb \
armada-8040-db.dtb \
armada-8040-mcbin.dtb \
armada-8040-clearfog-gt-8k.dtb \
armada-xp-crs305-1g-4s.dtb \
armada-xp-db-xc3-24g4xg.dtb \
armada-xp-gp.dtb \
armada-xp-maxbcm.dtb \
armada-xp-synology-ds414.dtb \
armada-xp-theadorable.dtb \
armada-38x-controlcenterdc.dtb \
armada-385-atl-x530.dtb \
armada-385-atl-x530DP.dtb \
armada-xp-db-xc3-24g4xg.dtb \
armada-xp-crs305-1g-4s.dtb
armada-xp-theadorable.dtb
dtb-$(CONFIG_ARCH_UNIPHIER_LD11) += \
uniphier-ld11-global.dtb \
@@ -277,6 +281,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \
zynqmp-zcu102-revA.dtb \
zynqmp-zcu102-revB.dtb \
zynqmp-zcu102-rev1.0.dtb \
zynqmp-zcu102-rev1.1.dtb \
zynqmp-zcu104-revA.dtb \
zynqmp-zcu104-revC.dtb \
zynqmp-zcu106-revA.dtb \
@@ -617,12 +622,14 @@ dtb-y += \
imx6dl-icore.dtb \
imx6dl-icore-mipi.dtb \
imx6dl-icore-rqs.dtb \
imx6dl-mba6a.dtb \
imx6dl-mba6b.dtb \
imx6dl-mamoj.dtb \
imx6dl-nitrogen6x.dtb \
imx6dl-pico.dtb \
imx6dl-sabreauto.dtb \
imx6dl-sabresd.dtb \
imx6dl-wandboard-revb1.dtb \
imx6dl-wandboard-revd1.dtb \
endif
@@ -646,6 +653,8 @@ dtb-y += \
imx6q-icore-rqs.dtb \
imx6q-kp.dtb \
imx6q-logicpd.dtb \
imx6q-mba6a.dtb \
imx6q-mba6b.dtb \
imx6q-mccmon6.dtb\
imx6q-nitrogen6x.dtb \
imx6q-novena.dtb \
@@ -654,7 +663,7 @@ dtb-y += \
imx6q-sabrelite.dtb \
imx6q-sabresd.dtb \
imx6q-tbs2910.dtb \
imx6q-wandboard-revb1.dtb \
imx6q-wandboard-revd1.dtb \
imx6qp-sabreauto.dtb \
imx6qp-sabresd.dtb \
imx6qp-wandboard-revd1.dtb \
@@ -725,7 +734,8 @@ dtb-$(CONFIG_ARCH_IMX8M) += \
imx8mq-evk.dtb \
imx8mp-evk.dtb
dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb
dtb-$(CONFIG_ARCH_IMXRT) += imxrt1050-evk.dtb \
imxrt1020-evk.dtb
dtb-$(CONFIG_RCAR_GEN2) += \
r8a7790-lager-u-boot.dtb \
@@ -885,7 +895,8 @@ dtb-$(CONFIG_STM32MP15x) += \
stm32mp157c-dk2.dtb \
stm32mp157c-ed1.dtb \
stm32mp157c-ev1.dtb \
stm32mp15xx-dhcom-pdk2.dtb
stm32mp15xx-dhcom-pdk2.dtb \
stm32mp15xx-dhcor-avenger96.dtb
dtb-$(CONFIG_SOC_K3_AM6) += k3-am654-base-board.dtb k3-am654-r5-base-board.dtb
dtb-$(CONFIG_SOC_K3_J721E) += k3-j721e-common-proc-board.dtb \

View File

@@ -53,6 +53,8 @@
bkl-pwm = <&pwmbacklight>;
bkl-tps = <&tps_bl>;
u-boot,dm-pre-reloc;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;

View File

@@ -53,6 +53,8 @@
bkl-pwm = <&pwmbacklight>;
bkl-tps = <&tps_bl>;
u-boot,dm-pre-reloc;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;

View File

@@ -54,6 +54,8 @@
bkl-pwm = <&pwmbacklight>;
bkl-tps = <&tps_bl>;
u-boot,dm-pre-reloc;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;

View File

@@ -59,6 +59,7 @@
/*backlight = <&tps_bl>; */
compatible = "ti,tilcdc,panel";
status = "okay";
u-boot,dm-pre-reloc;
panel-info {
ac-bias = <255>;

View File

@@ -79,6 +79,8 @@
backlight = <&tps_bl>;
u-boot,dm-pre-reloc;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;

View File

@@ -3,6 +3,12 @@
* Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
*/
/ {
panel {
u-boot,dm-pre-reloc;
};
};
&mmc3 {
status = "disabled";

View File

@@ -0,0 +1,12 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* am335x-evmsk U-Boot Additions
*
* Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
*/
/ {
panel {
u-boot,dm-pre-reloc;
};
};

View File

@@ -8,6 +8,10 @@
ocp {
u-boot,dm-pre-reloc;
};
panel {
u-boot,dm-pre-reloc;
};
};
&l4_wkup {

View File

@@ -58,7 +58,7 @@
label = "guardian:life-led";
gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
default-state = "on";
};
};
@@ -202,8 +202,33 @@
};
partition@6 {
label = "u-boot-2";
reg = <0x300000 0x100000>;
};
partition@7 {
label = "u-boot-2.backup1";
reg = <0x400000 0x100000>;
};
partition@8 {
label = "u-boot-env";
reg = <0x500000 0x40000>;
};
partition@9 {
label = "u-boot-env.backup1";
reg = <0x540000 0x40000>;
};
partition@10 {
label = "splash-screen";
reg = <0x580000 0x40000>;
};
partition@11 {
label = "UBI";
reg = <0x300000 0x1fd00000>;
reg = <0x5c0000 0x1fa40000>;
};
};
};

View File

@@ -7,6 +7,10 @@
ocp {
u-boot,dm-pre-reloc;
};
panel {
u-boot,dm-pre-reloc;
};
};
&l4_wkup {

View File

@@ -0,0 +1,12 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* am335x-pxm50 U-Boot Additions
*
* Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
*/
/ {
panel {
u-boot,dm-pre-reloc;
};
};

View File

@@ -0,0 +1,12 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* am335x-rut U-Boot Additions
*
* Copyright (C) 2020 Dario Binacchi <dariobin@libero.it>
*/
/ {
panel {
u-boot,dm-pre-reloc;
};
};

View File

@@ -42,9 +42,24 @@
startup-delay-us = <2000000>;
shutdown-delay-us = <1000000>;
gpio = <&gpiosb 0 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-boot-on;
};
vsdc_reg: vsdc-reg {
compatible = "regulator-gpio";
regulator-name = "vsdc";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
gpios = <&gpiosb 23 GPIO_ACTIVE_HIGH>;
gpios-states = <0>;
states = <1800000 0x1
3300000 0x0>;
enable-active-high;
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
@@ -93,7 +108,11 @@
};
&sdhci1 {
wp-inverted;
bus-width = <4>;
cd-gpios = <&gpionb 10 GPIO_ACTIVE_HIGH>;
vqmmc-supply = <&vsdc_reg>;
marvell,pad-type = "sd";
status = "okay";
};

View File

@@ -39,7 +39,6 @@
&eth0 {
/* ethernet@70000 */
mac-address = [00 50 43 02 02 01];
pinctrl-0 = <&ge0_rgmii_pins>;
pinctrl-names = "default";
phy = <&phy_dedicated>;

View File

@@ -2,7 +2,7 @@
/*
* dts file for Avnet Ultra96 rev1
*
* (C) Copyright 2018, Xilinx, Inc.
* (C) Copyright 2018 - 2020, Xilinx, Inc.
*
* Michal Simek <michal.simek@xilinx.com>
*/

View File

@@ -14,6 +14,10 @@
nand {
compatible = "ti,davinci-nand";
};
panel {
u-boot,dm-pre-reloc;
};
};
&eth0 {

View File

@@ -5,6 +5,13 @@
* SPDX-License-Identifier: GPL-2.0+ or X11
*/
&fec {
fixed-link { /* RMII fixed link for both HSC|DDC */
speed = <100>;
full-duplex;
};
};
&pmic {
u-boot,i2c-transaction-bytes = <3>;
};

View File

@@ -0,0 +1,6 @@
// SPDX-License-Identifier: (GPL-2.0+)
/*
* Copyright (C) 2020 Harald Seiler <hws@denx.de>
*/
#include "imx6qdl-dhcom-pdk2-u-boot.dtsi"

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@@ -0,0 +1,18 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
&ethphy {
rxdv-skew-ps = <180>;
txen-skew-ps = <0>;
rxd3-skew-ps = <180>;
rxd2-skew-ps = <180>;
rxd1-skew-ps = <180>;
rxd0-skew-ps = <180>;
txd3-skew-ps = <120>;
txd2-skew-ps = <0>;
txd1-skew-ps = <300>;
txd0-skew-ps = <120>;
txc-skew-ps = <1860>;
rxc-skew-ps = <1860>;
};

View File

@@ -0,0 +1,16 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx6dl-tqma6a.dtsi"
#include "imx6qdl-mba6.dtsi"
#include "imx6qdl-mba6a.dtsi"
#include "imx6dl-mba6.dtsi"
/ {
model = "TQ TQMa6S on MBa6x";
compatible = "tq,mba6a", "tq,tqma6dl", "fsl,imx6dl";
};

View File

@@ -0,0 +1,16 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx6dl-tqma6b.dtsi"
#include "imx6qdl-mba6.dtsi"
#include "imx6qdl-mba6b.dtsi"
#include "imx6dl-mba6.dtsi"
/ {
model = "TQ TQMa6S on MBa6x";
compatible = "tq,mba6b", "tq,tqma6dl", "fsl,imx6dl";
};

View File

@@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
#include "imx6dl.dtsi"
#include "imx6qdl-tqma6a.dtsi"
#include "imx6qdl-tqma6.dtsi"
/ {
memory {
reg = <0x10000000 0x20000000>;
};
};

View File

@@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
#include "imx6dl.dtsi"
#include "imx6qdl-tqma6b.dtsi"
#include "imx6qdl-tqma6.dtsi"
/ {
memory {
reg = <0x10000000 0x20000000>;
};
};

View File

@@ -6,10 +6,10 @@
*/
/dts-v1/;
#include "imx6dl.dtsi"
#include "imx6qdl-wandboard-revb1.dtsi"
#include "imx6qdl-wandboard-revd1.dtsi"
/ {
model = "Wandboard i.MX6 Dual Lite Board rev B1";
model = "Wandboard i.MX6 Dual Lite Board revD1";
compatible = "wand,imx6dl-wandboard", "fsl,imx6dl";
memory@10000000 {

View File

@@ -3,6 +3,8 @@
* Copyright (C) 2019 Claudius Heine <ch@denx.de>
*/
#include "imx6qdl-dhcom-pdk2-u-boot.dtsi"
/ {
wdt-reboot {
compatible = "wdt-reboot";

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@@ -0,0 +1,18 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
&ethphy {
rxdv-skew-ps = <180>;
txen-skew-ps = <120>;
rxd3-skew-ps = <180>;
rxd2-skew-ps = <180>;
rxd1-skew-ps = <180>;
rxd0-skew-ps = <180>;
txd3-skew-ps = <120>;
txd2-skew-ps = <0>;
txd1-skew-ps = <180>;
txd0-skew-ps = <360>;
txc-skew-ps = <1860>;
rxc-skew-ps = <1860>;
};

View File

@@ -0,0 +1,16 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx6q-tqma6a.dtsi"
#include "imx6qdl-mba6.dtsi"
#include "imx6qdl-mba6a.dtsi"
#include "imx6q-mba6.dtsi"
/ {
model = "TQ TQMa6Q on MBa6x";
compatible = "tq,mba6a", "fsl,imx6q";
};

View File

@@ -0,0 +1,16 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx6q-tqma6b.dtsi"
#include "imx6qdl-mba6.dtsi"
#include "imx6qdl-mba6b.dtsi"
#include "imx6q-mba6.dtsi"
/ {
model = "TQ TQMa6Q on MBa6x";
compatible = "tq,mba6b", "fsl,imx6q";
};

View File

@@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
#include "imx6q.dtsi"
#include "imx6qdl-tqma6a.dtsi"
#include "imx6qdl-tqma6.dtsi"
/ {
memory {
reg = <0x10000000 0x40000000>;
};
};

View File

@@ -0,0 +1,14 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
#include "imx6q.dtsi"
#include "imx6qdl-tqma6b.dtsi"
#include "imx6qdl-tqma6.dtsi"
/ {
memory {
reg = <0x10000000 0x40000000>;
};
};

View File

@@ -6,10 +6,10 @@
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-wandboard-revb1.dtsi"
#include "imx6qdl-wandboard-revd1.dtsi"
/ {
model = "Wandboard i.MX6 Quad Board rev B1";
model = "Wandboard i.MX6 Quad Board revD1";
compatible = "wand,imx6q-wandboard", "fsl,imx6q";
memory@10000000 {

View File

@@ -0,0 +1,23 @@
// SPDX-License-Identifier: (GPL-2.0+)
/*
* Copyright (C) 2020 Harald Seiler <hws@denx.de>
*/
#include "imx6qdl-dhcom-u-boot.dtsi"
/ {
fec_vio: regulator-fec {
compatible = "regulator-fixed";
regulator-name = "fec-vio";
gpio = <&gpio1 7 GPIO_ACTIVE_LOW>;
};
};
&fec {
phy-reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
phy-reset-duration = <1>;
phy-reset-post-delay = <10>;
phy-supply = <&fec_vio>;
};

View File

@@ -0,0 +1,9 @@
// SPDX-License-Identifier: (GPL-2.0+)
/*
* Copyright (C) 2020 Harald Seiler <hws@denx.de>
*/
&reg_usb_otg_vbus {
gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
enable-active-high;
};

View File

@@ -0,0 +1,207 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
/ {
aliases {
mmc1 = &usdhc2;
};
chosen {
linux,stdout-path = &uart2;
stdout-path = &uart2;
};
regulators {
reg_mba6_3p3v: regulator@1 {
compatible = "regulator-fixed";
regulator-name = "supply-mba6-3p3v";
reg = <1>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_otgvbus: regulator@2 {
compatible = "regulator-fixed";
reg = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_otgpwr>;
regulator-name = "otg-vbus-supply";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
enable-active-high;
vin_supply = <&reg_3p3v>;
};
};
};
&fec {
phy-mode = "rgmii-id";
phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
phy-reset-duration = <1>;
phy-reset-post-delay = <100>;
phy-handle = <&ethphy>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy: ethernet-phy@3 {
compatible = "ethernet-phy-id0022.1622",
"ethernet-phy-ieee802.3-c22";
reg = <3>;
force-master;
max-speed = <1000>;
interrupt-parent = <&gpio1>;
interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
};
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog>;
mba6 {
pinctrl_enet: enetgrp {
fsl,pins = <
/* FEC phy IRQ */
MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x00011008
/* FEC phy reset */
MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b099
/* DSE = 100, 100k up, SPEED = MED */
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0xb0a0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0xb0a0
/* DSE = 111, pull 100k up */
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0xb038
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0xb038
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0xb038
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0xb038
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0xb038
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0xb038
/* DSE = 111, pull external */
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x0038
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x0038
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x0038
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x0038
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x0038
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x0038
/* HYS = 1, DSE = 111, 100k up, SPEED = HIGH */
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0f0
>;
};
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_16__GPIO7_IO11 0x0001b099 /* LCD.PWR_EN */
MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x0001b099 /* LCD.RESET */
/* LCD.CONTRAST -> Rev 0100 only, not used on Rev.0200*/
MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x0001b099
MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x0001b099
MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x0001b099
MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x0001b099
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x0001b099
MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x0001b099
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x0001b099
MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x0001b099
MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x0001b099
MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x0001b099
MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x0001b099
MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x0001b099
MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x0001b099
MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x0001b099
MX6QDL_PAD_EIM_D28__GPIO3_IO28 0x0001b099
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x0001b099
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x0001b099
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x0001b099
MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x0001b099
MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x0001b099
MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x0001b099
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x0001b099
MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x0001b099
MX6QDL_PAD_NANDF_ALE__GPIO6_IO08 0x0001b099
MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x0001b099
>;
};
pinctrl_reg_otgpwr: regotgpwrgrp {
fsl,pins = <
/* OTG_PWR */
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x0001b099
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b099
MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b099
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
/* CLK: 47k Pup SPD_LOW DSE 40Ohm SRE_FAST HYS */
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x00017071
/* SD2: 47k Pup SPD_LOW DSE 80Ohm SRE_FAST HYS */
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x00017059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x00017059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x00017059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x00017059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x00017059
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x0001b099 /* usdhc2 CD */
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x0001b099 /* usdhc2 WP */
>;
};
pinctrl_usbotg: usbotggrp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x0001b0b0
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x00017059
>;
};
};
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
status = "okay";
};
&usbh1 {
disable-over-current;
status = "okay";
};
&usbotg {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
dr_mode = "otg";
vbus-supply = <&reg_otgvbus>;
status = "okay";
};
&usdhc2 { /* Baseboard Slot */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
vmmc-supply = <&reg_mba6_3p3v>;
bus-width = <4>;
no-1-8-v;
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
status = "okay";
};
&wdog1 {
status = "okay";
};

View File

@@ -0,0 +1,39 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>, <&pinctrl_enet_fix>;
interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>,
<&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
};
&i2c1 {
sensor1: lm75@49 {
compatible = "lm75";
reg = <0x49>;
};
eeprom1: m24c64@57 {
compatible = "st,24c64", "at24";
reg = <0x57>;
pagesize = <32>;
};
rtc1: ds1339@68 {
compatible = "ds1339";
reg = <0x68>;
};
};
&iomuxc {
mba6 {
pinctrl_enet_fix: enetfixgrp {
fsl,pins = <
/* ENET ping patch */
MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
>;
};
};
};

View File

@@ -0,0 +1,45 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
};
&i2c3 {
sensor1: lm75@49 {
compatible = "lm75";
reg = <0x49>;
};
eeprom1: m24c64@57 {
compatible = "st,24c64", "at24";
reg = <0x57>;
pagesize = <32>;
};
rtc1: ds1339@68 {
compatible = "ds1339";
reg = <0x68>;
};
};
&iomuxc {
mba6 {
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b899
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b899
>;
};
};
};

View File

@@ -0,0 +1,211 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
/ {
aliases {
mmc0 = &usdhc3;
/delete-property/ mmc1;
/delete-property/ mmc2;
};
regulators {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <0>;
reg_3p3v: regulator@0 {
compatible = "regulator-fixed";
regulator-name = "supply-3p3v";
reg = <0>;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
&ecspi1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
fsl,spi-num-chipselects = <1>;
cs-gpios = <&gpio3 19 0>;
status = "okay";
flash: m25p80@0 {
status = "okay";
compatible = "micron,n25q128a13", "n25q128a13";
spi-max-frequency = <50000000>;
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
m25p,fast-read;
};
};
&iomuxc {
tqma6 {
pinctrl_ecspi1: ecspi1grp {
fsl,pins = <
/* HYS, SPEED = MED, 100k up, DSE = 011, SRE_FAST */
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x1b099
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0xb099
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0xb099
/* eCSPI1 SS1 */
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0xb099
>;
};
pinctrl_i2c1_tqma6: i2c1-tqma6grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b899
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b899
>;
};
pinctrl_i2c3_tqma6: i2c3-tqma6grp {
fsl,pins = <
MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b899
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b899
>;
};
pinctrl_pmic: pmicgrp {
fsl,pins = <
MX6QDL_PAD_NANDF_RB0__GPIO6_IO10 0x1b099 /* PMIC irq */
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
};
};
};
&pmic {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic>;
interrupt-parent = <&gpio6>;
interrupts = <10 8>;
regulators {
reg_vddcore: sw1ab {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-always-on;
};
reg_vddsoc: sw1c {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-always-on;
};
reg_gen_3v3: sw2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_ddr_1v5a: sw3a {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-always-on;
};
reg_ddr_1v5b: sw3b {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-always-on;
};
sw4_reg: sw4 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_5v_600mA: swbst {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5150000>;
regulator-always-on;
};
reg_snvs_3v: vsnvs {
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <3000000>;
regulator-always-on;
};
reg_vrefddr: vrefddr {
regulator-boot-on;
regulator-always-on;
};
reg_vgen1_1v5: vgen1 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
/* not used */
};
reg_vgen2_1v2_eth: vgen2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
regulator-always-on;
};
reg_vgen3_2v8: vgen3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_vgen4_1v8: vgen4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_vgen5_1v8_eth: vgen5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_vgen6_3v3: vgen6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
/* eMMC */
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
vmmc-supply = <&reg_3p3v>;
non-removable;
disable-wp;
bus-width = <8>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
mmccard: mmccard@0 {
reg = <0>;
compatible = "mmc-card";
broken-hpi;
};
};

View File

@@ -0,0 +1,27 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_tqma6>;
clock-frequency = <100000>;
status = "okay";
pmic: pf0100@08 {
compatible = "fsl,pfuze100";
reg = <0x08>;
};
sensor0: lm75@48 {
compatible = "lm75";
reg = <0x48>;
};
eeprom0: m24c64@50 {
compatible = "st,24c64", "at24";
reg = <0x50>;
pagesize = <32>;
};
};

View File

@@ -0,0 +1,27 @@
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2020 TQ-Systems GmbH
&i2c3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3_tqma6>;
clock-frequency = <100000>;
status = "okay";
pmic: pf0100@08 {
compatible = "fsl,pfuze100";
reg = <0x08>;
};
sensor0: lm75@48 {
compatible = "lm75";
reg = <0x48>;
};
eeprom0: m24c64@50 {
compatible = "st,24c64", "at24";
reg = <0x50>;
pagesize = <32>;
};
};

View File

@@ -0,0 +1,44 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) 2020
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
/ {
chosen {
u-boot,dm-spl;
};
};
&lpuart1 { /* console */
u-boot,dm-spl;
};
&semc {
bank1: bank@0 {
u-boot,dm-spl;
};
};
&iomuxc {
u-boot,dm-spl;
imxrt1020-evk {
u-boot,dm-spl;
pinctrl_lpuart1: lpuart1grp {
u-boot,dm-spl;
};
pinctrl_semc: semcgrp {
u-boot,dm-spl;
};
pinctrl_usdhc0: usdhc0grp {
u-boot,dm-spl;
};
};
};
&usdhc1 {
u-boot,dm-spl;
};

View File

@@ -0,0 +1,198 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) 2020
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
/dts-v1/;
#include "imxrt1020.dtsi"
#include "imxrt1020-evk-u-boot.dtsi"
#include <dt-bindings/pinctrl/pins-imxrt1020.h>
/ {
model = "NXP IMXRT1020-evk board";
compatible = "fsl,imxrt1020-evk", "fsl,imxrt1020";
chosen {
bootargs = "root=/dev/ram";
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x80000000 0x2000000>;
};
};
&lpuart1 { /* console */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpuart1>;
status = "okay";
};
&semc {
/*
* Memory configuration from sdram datasheet IS42S16160J-6TLI
*/
fsl,sdram-mux = /bits/ 8 <MUX_A8_SDRAM_A8
MUX_CSX0_SDRAM_CS1
0
0
0
0>;
fsl,sdram-control = /bits/ 8 <MEM_WIDTH_16BITS
BL_8
COL_9BITS
CL_3>;
fsl,sdram-timing = /bits/ 8 <0x2
0x2
0x9
0x1
0x5
0x6
0x20
0x09
0x01
0x00
0x04
0x0A
0x21
0x50>;
bank1: bank@0 {
fsl,base-address = <0x80000000>;
fsl,memory-size = <MEM_SIZE_32M>;
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lpuart1>;
imxrt1020-evk {
pinctrl_lpuart1: lpuart1grp {
fsl,pins = <
MXRT1020_IOMUXC_GPIO_AD_B0_06_LPUART1_TX
0xf1
MXRT1020_IOMUXC_GPIO_AD_B0_07_LPUART1_RX
0xf1
>;
};
pinctrl_semc: semcgrp {
fsl,pins = <
MXRT1020_IOMUXC_GPIO_EMC_00_SEMC_DA00
0xf1 /* SEMC_D0 */
MXRT1020_IOMUXC_GPIO_EMC_01_SEMC_DA01
0xf1 /* SEMC_D1 */
MXRT1020_IOMUXC_GPIO_EMC_02_SEMC_DA02
0xf1 /* SEMC_D2 */
MXRT1020_IOMUXC_GPIO_EMC_03_SEMC_DA03
0xf1 /* SEMC_D3 */
MXRT1020_IOMUXC_GPIO_EMC_04_SEMC_DA04
0xf1 /* SEMC_D4 */
MXRT1020_IOMUXC_GPIO_EMC_05_SEMC_DA05
0xf1 /* SEMC_D5 */
MXRT1020_IOMUXC_GPIO_EMC_06_SEMC_DA06
0xf1 /* SEMC_D6 */
MXRT1020_IOMUXC_GPIO_EMC_07_SEMC_DA07
0xf1 /* SEMC_D7 */
MXRT1020_IOMUXC_GPIO_EMC_08_SEMC_DM00
0xf1 /* SEMC_DM0 */
MXRT1020_IOMUXC_GPIO_EMC_09_SEMC_ADDR00
0xf1 /* SEMC_A0 */
MXRT1020_IOMUXC_GPIO_EMC_10_SEMC_CAS
0xf1 /* SEMC_CAS */
MXRT1020_IOMUXC_GPIO_EMC_11_SEMC_RAS
0xf1 /* SEMC_RAS */
MXRT1020_IOMUXC_GPIO_EMC_12_SEMC_CS0
0xf1 /* SEMC_CS0 */
MXRT1020_IOMUXC_GPIO_EMC_13_SEMC_BA0
0xf1 /* SEMC_BA0 */
MXRT1020_IOMUXC_GPIO_EMC_14_SEMC_BA1
0xf1 /* SEMC_BA1 */
MXRT1020_IOMUXC_GPIO_EMC_15_SEMC_ADDR10
0xf1 /* SEMC_A10 */
MXRT1020_IOMUXC_GPIO_EMC_16_SEMC_ADDR00
0xf1 /* SEMC_A0 */
MXRT1020_IOMUXC_GPIO_EMC_17_SEMC_ADDR01
0xf1 /* SEMC_A1 */
MXRT1020_IOMUXC_GPIO_EMC_18_SEMC_ADDR02
0xf1 /* SEMC_A2 */
MXRT1020_IOMUXC_GPIO_EMC_19_SEMC_ADDR03
0xf1 /* SEMC_A3 */
MXRT1020_IOMUXC_GPIO_EMC_20_SEMC_ADDR04
0xf1 /* SEMC_A4 */
MXRT1020_IOMUXC_GPIO_EMC_21_SEMC_ADDR05
0xf1 /* SEMC_A5 */
MXRT1020_IOMUXC_GPIO_EMC_22_SEMC_ADDR06
0xf1 /* SEMC_A6 */
MXRT1020_IOMUXC_GPIO_EMC_23_SEMC_ADDR07
0xf1 /* SEMC_A7 */
MXRT1020_IOMUXC_GPIO_EMC_24_SEMC_ADDR08
0xf1 /* SEMC_A8 */
MXRT1020_IOMUXC_GPIO_EMC_25_SEMC_ADDR09
0xf1 /* SEMC_A9 */
MXRT1020_IOMUXC_GPIO_EMC_26_SEMC_ADDR11
0xf1 /* SEMC_A11 */
MXRT1020_IOMUXC_GPIO_EMC_27_SEMC_ADDR12
0xf1 /* SEMC_A12 */
MXRT1020_IOMUXC_GPIO_EMC_28_SEMC_DQS
(IMX_PAD_SION | 0xf1) /* SEMC_DQS */
MXRT1020_IOMUXC_GPIO_EMC_29_SEMC_CKE
0xf1 /* SEMC_CKE */
MXRT1020_IOMUXC_GPIO_EMC_30_SEMC_CLK
0xf1 /* SEMC_CLK */
MXRT1020_IOMUXC_GPIO_EMC_31_SEMC_DM01
0xf1 /* SEMC_DM01 */
MXRT1020_IOMUXC_GPIO_EMC_32_SEMC_DATA08
0xf1 /* SEMC_D8 */
MXRT1020_IOMUXC_GPIO_EMC_33_SEMC_DATA09
0xf1 /* SEMC_D9 */
MXRT1020_IOMUXC_GPIO_EMC_34_SEMC_DATA10
0xf1 /* SEMC_D10 */
MXRT1020_IOMUXC_GPIO_EMC_35_SEMC_DATA11
0xf1 /* SEMC_D11 */
MXRT1020_IOMUXC_GPIO_EMC_36_SEMC_DATA12
0xf1 /* SEMC_D12 */
MXRT1020_IOMUXC_GPIO_EMC_37_SEMC_DATA13
0xf1 /* SEMC_D13 */
MXRT1020_IOMUXC_GPIO_EMC_38_SEMC_DATA14
0xf1 /* SEMC_D14 */
MXRT1020_IOMUXC_GPIO_EMC_39_SEMC_DATA15
0xf1 /* SEMC_D15 */
>;
};
pinctrl_usdhc0: usdhc0grp {
fsl,pins = <
MXRT1020_IOMUXC_GPIO_SD_B0_06_USDHC1_CD_B
0x1B000
MXRT1020_IOMUXC_GPIO_SD_B0_02_USDHC1_CMD
0x17061
MXRT1020_IOMUXC_GPIO_SD_B0_03_USDHC1_CLK
0x17061
MXRT1020_IOMUXC_GPIO_SD_B0_01_USDHC1_DATA3
0x17061
MXRT1020_IOMUXC_GPIO_SD_B0_00_USDHC1_DATA2
0x17061
MXRT1020_IOMUXC_GPIO_SD_B0_05_USDHC1_DATA1
0x17061
MXRT1020_IOMUXC_GPIO_SD_B0_04_USDHC1_DATA0
0x17061
>;
};
};
};
&usdhc1 {
pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
pinctrl-0 = <&pinctrl_usdhc0>;
pinctrl-1 = <&pinctrl_usdhc0>;
pinctrl-2 = <&pinctrl_usdhc0>;
pinctrl-3 = <&pinctrl_usdhc0>;
status = "okay";
cd-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
};

133
arch/arm/dts/imxrt1020.dtsi Normal file
View File

@@ -0,0 +1,133 @@
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
* Copyright (C) 2020
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
#include "armv7-m.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/imxrt1020-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/memory/imxrt-sdram.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
mmc0 = &usdhc1;
serial0 = &lpuart1;
};
clocks {
u-boot,dm-spl;
ckil {
compatible = "fsl,imx-ckil", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
};
ckih1 {
compatible = "fsl,imx-ckih1", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
osc {
u-boot,dm-spl;
compatible = "fsl,imx-osc", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
};
soc {
u-boot,dm-spl;
semc: semc@402f0000 {
u-boot,dm-spl;
compatible = "fsl,imxrt-semc";
reg = <0x402f0000 0x4000>;
clocks = <&clks IMXRT1020_CLK_SEMC>;
pinctrl-0 = <&pinctrl_semc>;
pinctrl-names = "default";
status = "okay";
};
lpuart1: serial@40184000 {
compatible = "fsl,imxrt-lpuart";
reg = <0x40184000 0x4000>;
interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMXRT1020_CLK_LPUART1>;
clock-names = "per";
status = "disabled";
};
iomuxc: iomuxc@401f8000 {
compatible = "fsl,imxrt-iomuxc";
reg = <0x401f8000 0x4000>;
fsl,mux_mask = <0x7>;
};
clks: ccm@400fc000 {
u-boot,dm-spl;
compatible = "fsl,imxrt1020-ccm";
reg = <0x400fc000 0x4000>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
};
usdhc1: usdhc@402c0000 {
u-boot,dm-spl;
compatible = "fsl,imxrt-usdhc";
reg = <0x402c0000 0x10000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMXRT1020_CLK_USDHC1>;
clock-names = "per";
bus-width = <4>;
fsl,tuning-start-tap = <20>;
fsl,tuning-step= <2>;
status = "disabled";
};
gpio1: gpio@401b8000 {
u-boot,dm-spl;
compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
reg = <0x401b8000 0x4000>;
interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio2: gpio@401bc000 {
u-boot,dm-spl;
compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
reg = <0x401bc000 0x4000>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpio3: gpio@401c0000 {
u-boot,dm-spl;
compatible = "fsl,imxrt-gpio", "fsl,imx35-gpio";
reg = <0x401c0000 0x4000>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
};
};

View File

@@ -185,6 +185,33 @@
0x17061
>;
};
pinctrl_lcdif: lcdifgrp {
u-boot,dm-spl;
fsl,pins = <
MXRT1050_IOMUXC_GPIO_B0_00_LCD_CLK 0x1b0b1
MXRT1050_IOMUXC_GPIO_B0_01_LCD_ENABLE 0x1b0b1
MXRT1050_IOMUXC_GPIO_B0_02_LCD_HSYNC 0x1b0b1
MXRT1050_IOMUXC_GPIO_B0_03_LCD_VSYNC 0x1b0b1
MXRT1050_IOMUXC_GPIO_B0_04_LCD_DATA00 0x1b0b1
MXRT1050_IOMUXC_GPIO_B0_05_LCD_DATA01 0x1b0b1
MXRT1050_IOMUXC_GPIO_B0_06_LCD_DATA02 0x1b0b1
MXRT1050_IOMUXC_GPIO_B0_07_LCD_DATA03 0x1b0b1
MXRT1050_IOMUXC_GPIO_B0_08_LCD_DATA04 0x1b0b1
MXRT1050_IOMUXC_GPIO_B0_09_LCD_DATA05 0x1b0b1
MXRT1050_IOMUXC_GPIO_B0_10_LCD_DATA06 0x1b0b1
MXRT1050_IOMUXC_GPIO_B0_11_LCD_DATA07 0x1b0b1
MXRT1050_IOMUXC_GPIO_B0_12_LCD_DATA08 0x1b0b1
MXRT1050_IOMUXC_GPIO_B0_13_LCD_DATA09 0x1b0b1
MXRT1050_IOMUXC_GPIO_B0_14_LCD_DATA10 0x1b0b1
MXRT1050_IOMUXC_GPIO_B0_15_LCD_DATA11 0x1b0b1
MXRT1050_IOMUXC_GPIO_B1_01_LCD_DATA13 0x1b0b1
MXRT1050_IOMUXC_GPIO_B1_02_LCD_DATA14 0x1b0b1
MXRT1050_IOMUXC_GPIO_B1_03_LCD_DATA15 0x1b0b1
MXRT1050_IOMUXC_GPIO_B1_15_GPIO2_IO31 0x0b069
MXRT1050_IOMUXC_GPIO_AD_B0_02_GPIO1_IO02 0x0b069
>;
};
};
};
@@ -198,3 +225,36 @@
cd-gpios = <&gpio2 28 GPIO_ACTIVE_LOW>;
};
&lcdif {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_lcdif>;
display = <&display0>;
status = "okay";
assigned-clocks = <&clks IMXRT1050_CLK_LCDIF_SEL>;
assigned-clock-parents = <&clks IMXRT1050_CLK_PLL5_VIDEO>;
display0: display0 {
bits-per-pixel = <16>;
bus-width = <16>;
display-timings {
timing0: timing0 {
clock-frequency = <9300000>;
hactive = <480>;
vactive = <272>;
hback-porch = <4>;
hfront-porch = <8>;
vback-porch = <4>;
vfront-porch = <8>;
hsync-len = <41>;
vsync-len = <10>;
de-active = <1>;
pixelclk-active = <0>;
hsync-active = <0>;
vsync-active = <0>;
};
};
};
};

View File

@@ -4,7 +4,6 @@
* Author(s): Giulio Benetti <giulio.benetti@benettiengineering.com>
*/
#include "skeleton.dtsi"
#include "armv7-m.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/imxrt1050-clock.h>
@@ -12,7 +11,11 @@
#include <dt-bindings/memory/imxrt-sdram.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
aliases {
display0 = &lcdif;
gpio0 = &gpio1;
gpio1 = &gpio2;
gpio2 = &gpio3;
@@ -142,5 +145,14 @@
interrupt-controller;
#interrupt-cells = <2>;
};
lcdif: lcdif@402b8000 {
compatible = "fsl,imxrt-lcdif";
reg = <0x402b8000 0x10000>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMXRT1050_CLK_LCDIF>;
clock-names = "per";
status = "disabled";
};
};
};

View File

@@ -64,4 +64,42 @@
loczrama = <1>;
};
};
fss: fss@47000000 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;
ranges;
ospi0: spi@47040000 {
compatible = "ti,am654-ospi", "cdns,qspi-nor";
reg = <0x0 0x47040000 0x0 0x100>,
<0x5 0x00000000 0x1 0x0000000>;
interrupts = <GIC_SPI 552 IRQ_TYPE_LEVEL_HIGH>;
cdns,fifo-depth = <256>;
cdns,fifo-width = <4>;
cdns,trigger-address = <0x0>;
clocks = <&k3_clks 248 0>;
assigned-clocks = <&k3_clks 248 0>;
assigned-clock-parents = <&k3_clks 248 2>;
assigned-clock-rates = <166666666>;
power-domains = <&k3_pds 248 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
};
ospi1: spi@47050000 {
compatible = "ti,am654-ospi", "cdns,qspi-nor";
reg = <0x0 0x47050000 0x0 0x100>,
<0x7 0x00000000 0x1 0x00000000>;
interrupts = <GIC_SPI 553 IRQ_TYPE_LEVEL_HIGH>;
cdns,fifo-depth = <256>;
cdns,fifo-width = <4>;
cdns,trigger-address = <0x0>;
clocks = <&k3_clks 249 6>;
power-domains = <&k3_pds 249 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
};
};
};

View File

@@ -30,6 +30,8 @@
i2c3 = &main_i2c1;
i2c4 = &main_i2c2;
i2c5 = &main_i2c3;
spi0 = &ospi0;
spi1 = &ospi1;
};
chosen { };
@@ -79,7 +81,11 @@
<0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>,
<0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>,
<0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>,
<0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>;
<0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>,
<0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>,
<0x00 0x70000000 0x00 0x70000000 0x00 0x200000>,
<0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>,
<0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>;
cbass_mcu: interconnect@28380000 {
compatible = "simple-bus";
@@ -93,7 +99,10 @@
<0x00 0x42040000 0x00 0x42040000 0x00 0x03ac2400>, /* WKUP */
<0x00 0x45100000 0x00 0x45100000 0x00 0x00c24000>, /* MMRs, remaining NAVSS */
<0x00 0x46000000 0x00 0x46000000 0x00 0x00200000>, /* CPSW */
<0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>; /* OSPI space 1 */
<0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, /* OSPI space 1 */
<0x00 0x50000000 0x00 0x50000000 0x00 0x8000000>, /* FSS OSPI0 data region 1 */
<0x05 0x00000000 0x05 0x00000000 0x01 0x0000000>, /* FSS OSPI0 data region 3*/
<0x07 0x00000000 0x07 0x00000000 0x01 0x0000000>; /* FSS OSPI1 data region 3*/
cbass_wakeup: interconnect@42040000 {
compatible = "simple-bus";

View File

@@ -52,6 +52,7 @@
#address-cells = <2>;
#size-cells = <2>;
ranges;
u-boot,dm-spl;
ti,sci-dev-id = <119>;
@@ -68,6 +69,7 @@
ti,dma-ring-reset-quirk;
ti,sci = <&dmsc>;
ti,sci-dev-id = <195>;
u-boot,dm-spl;
};
mcu_udmap: udmap@285c0000 {
@@ -90,6 +92,7 @@
<0x4>; /* RX_CHAN */
ti,sci-rm-range-rflow = <0x5>; /* GP RFLOW */
dma-coherent;
u-boot,dm-spl;
};
};
@@ -314,6 +317,10 @@
AM65X_WKUP_IOPAD(0x0088, PIN_INPUT, 0) /* (L4) MCU_MDIO0_MDIO */
>;
};
mcu-fss0-ospi0-pins-default {
u-boot,dm-spl;
};
};
&main_uart0 {
@@ -374,3 +381,15 @@
&usb1 {
dr_mode = "peripheral";
};
&fss {
u-boot,dm-spl;
};
&ospi0 {
u-boot,dm-spl;
flash@0{
u-boot,dm-spl;
};
};

View File

@@ -64,6 +64,29 @@
AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
>;
};
main_i2c2_pins_default: main-i2c2-pins-default {
pinctrl-single,pins = <
AM65X_IOPAD(0x0074, PIN_INPUT, 5) /* (T27) GPMC0_CSn3.I2C2_SCL */
AM65X_IOPAD(0x0070, PIN_INPUT, 5) /* (R25) GPMC0_CSn2.I2C2_SDA */
>;
};
};
&main_pmx1 {
main_i2c0_pins_default: main-i2c0-pins-default {
pinctrl-single,pins = <
AM65X_IOPAD(0x0000, PIN_INPUT, 0) /* (D20) I2C0_SCL */
AM65X_IOPAD(0x0004, PIN_INPUT, 0) /* (C21) I2C0_SDA */
>;
};
main_i2c1_pins_default: main-i2c1-pins-default {
pinctrl-single,pins = <
AM65X_IOPAD(0x0008, PIN_INPUT, 0) /* (B21) I2C1_SCL */
AM65X_IOPAD(0x000c, PIN_INPUT, 0) /* (E21) I2C1_SDA */
>;
};
};
&wkup_pmx0 {
@@ -73,6 +96,22 @@
AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
>;
};
mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */
AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */
AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */
AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */
AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */
AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */
AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */
AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */
AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */
AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
>;
};
};
&sdhci0 {
@@ -96,6 +135,31 @@
};
};
&main_i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c0_pins_default>;
clock-frequency = <400000>;
pca9555: gpio@21 {
compatible = "nxp,pca9555";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
};
};
&main_i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c1_pins_default>;
clock-frequency = <400000>;
};
&main_i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&main_i2c2_pins_default>;
clock-frequency = <400000>;
};
&dwc3_1 {
status = "okay";
};
@@ -117,3 +181,23 @@
&usb0_phy {
status = "disabled";
};
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
flash@0{
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <8>;
spi-max-frequency = <50000000>;
cdns,tshsl-ns = <60>;
cdns,tsd2d-ns = <60>;
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <0>;
#address-cells = <1>;
#size-cells = <1>;
};
};

View File

@@ -179,6 +179,22 @@
AM65X_WKUP_IOPAD(0x00e4, PIN_INPUT, 0) /* (AD6) WKUP_I2C0_SDA */
>;
};
mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins_default {
pinctrl-single,pins = <
AM65X_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* (V1) MCU_OSPI0_CLK */
AM65X_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* (U2) MCU_OSPI0_DQS */
AM65X_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* (U4) MCU_OSPI0_D0 */
AM65X_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* (U5) MCU_OSPI0_D1 */
AM65X_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* (T2) MCU_OSPI0_D2 */
AM65X_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* (T3) MCU_OSPI0_D3 */
AM65X_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* (T4) MCU_OSPI0_D4 */
AM65X_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* (T5) MCU_OSPI0_D5 */
AM65X_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* (R2) MCU_OSPI0_D6 */
AM65X_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* (R3) MCU_OSPI0_D7 */
AM65X_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* (R4) MCU_OSPI0_CSn0 */
>;
};
};
&main_pmx0 {
@@ -239,3 +255,26 @@
u-boot,dm-spl;
};
};
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
reg = <0x0 0x47040000 0x0 0x100>,
<0x0 0x50000000 0x0 0x8000000>;
flash@0{
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <8>;
spi-max-frequency = <50000000>;
cdns,tshsl-ns = <60>;
cdns,tsd2d-ns = <60>;
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <0>;
#address-cells = <1>;
#size-cells = <1>;
};
};

View File

@@ -349,3 +349,31 @@
&exp2 {
u-boot,dm-spl;
};
&mcu_fss0_ospi0_pins_default {
u-boot,dm-spl;
};
&fss {
u-boot,dm-spl;
};
&ospi0 {
u-boot,dm-spl;
flash@0 {
u-boot,dm-spl;
};
};
&ospi1 {
u-boot,dm-spl;
flash@0 {
u-boot,dm-spl;
};
};
&mcu_fss0_ospi1_pins_default {
u-boot,dm-spl;
};

View File

@@ -123,6 +123,19 @@
J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
>;
};
mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
pinctrl-single,pins = <
J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */
J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */
J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */
J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
>;
};
};
&usbss0 {
@@ -172,3 +185,23 @@
#gpio-cells = <2>;
};
};
&ospi1 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
flash@0{
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <40000000>;
cdns,tshsl-ns = <60>;
cdns,tsd2d-ns = <60>;
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <2>;
#address-cells = <1>;
#size-cells = <1>;
};
};

View File

@@ -143,6 +143,39 @@
assigned-clocks = <&k3_clks 102 0>;
assigned-clock-rates = <250000000>;
};
ospi0: spi@47040000 {
compatible = "ti,am654-ospi";
reg = <0x0 0x47040000 0x0 0x100>,
<0x5 0x00000000 0x1 0x0000000>;
interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>;
cdns,fifo-depth = <256>;
cdns,fifo-width = <4>;
cdns,trigger-address = <0x0>;
clocks = <&k3_clks 103 0>;
assigned-clocks = <&k3_clks 103 0>;
assigned-clock-parents = <&k3_clks 103 2>;
assigned-clock-rates = <166666666>;
power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
};
ospi1: spi@47050000 {
compatible = "ti,am654-ospi";
reg = <0x0 0x47050000 0x0 0x100>,
<0x7 0x00000000 0x1 0x00000000>;
interrupts = <GIC_SPI 841 IRQ_TYPE_LEVEL_HIGH>;
cdns,fifo-depth = <256>;
cdns,fifo-width = <4>;
cdns,trigger-address = <0x0>;
clocks = <&k3_clks 104 0>;
assigned-clocks = <&k3_clks 104 0>;
assigned-clock-rates = <133333333>;
power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <1>;
#size-cells = <0>;
};
};
mcu_i2c0: i2c@40b00000 {

View File

@@ -0,0 +1,34 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
*/
/ {
chosen {
firmware-loader = &fs_loader0;
};
fs_loader0: fs_loader@0 {
u-boot,dm-pre-reloc;
compatible = "u-boot,fs-loader";
};
};
&main_r5fss0 {
u-boot,dm-spl;
};
&main_r5fss0_core0 {
u-boot,dm-spl;
};
&main_r5fss0_core1 {
u-boot,dm-spl;
};
&tps659413a {
esm: esm {
compatible = "ti,tps659413-esm";
u-boot,dm-spl;
};
};

View File

@@ -13,6 +13,8 @@
aliases {
remoteproc0 = &sysctrler;
remoteproc1 = &a72_0;
remoteproc2 = &main_r5fss0_core0;
remoteproc3 = &main_r5fss0_core1;
};
chosen {
@@ -75,6 +77,15 @@
};
};
&cbass_main {
main_esm: esm@700000 {
compatible = "ti,j721e-esm";
reg = <0x0 0x700000 0x0 0x1000>;
ti,esm-pins = <344>, <345>;
u-boot,dm-spl;
};
};
&dmsc {
mboxes= <&mcu_secproxy 8>, <&mcu_secproxy 6>, <&mcu_secproxy 5>;
mbox-names = "tx", "rx", "notify";
@@ -107,6 +118,36 @@
J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
>;
};
mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
pinctrl-single,pins = <
J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */
J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */
J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* MCU_OSPI0_D0 */
J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* MCU_OSPI0_D1 */
J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* MCU_OSPI0_D2 */
J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* MCU_OSPI0_D3 */
J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_OSPI0_D4 */
J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_OSPI0_D5 */
J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */
J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */
J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */
>;
};
mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
u-boot,dm-spl;
pinctrl-single,pins = <
J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */
J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */
J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */
J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
>;
};
};
&main_pmx0 {
@@ -256,4 +297,52 @@
};
};
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
reg = <0x0 0x47040000 0x0 0x100>,
<0x0 0x50000000 0x0 0x8000000>;
flash@0{
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <8>;
spi-max-frequency = <50000000>;
cdns,tshsl-ns = <60>;
cdns,tsd2d-ns = <60>;
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <0>;
#address-cells = <1>;
#size-cells = <1>;
};
};
&ospi1 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
u-boot,dm-spl;
reg = <0x0 0x47050000 0x0 0x100>,
<0x0 0x58000000 0x0 0x8000000>;
flash@0{
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <40000000>;
cdns,tshsl-ns = <60>;
cdns,tsd2d-ns = <60>;
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <2>;
#address-cells = <1>;
#size-cells = <1>;
u-boot,dm-spl;
};
};
#include "k3-j721e-common-proc-board-u-boot.dtsi"

View File

@@ -47,6 +47,22 @@
J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (G21) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */
>;
};
mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
pinctrl-single,pins = <
J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */
J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */
J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* MCU_OSPI0_D0 */
J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* MCU_OSPI0_D1 */
J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* MCU_OSPI0_D2 */
J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* MCU_OSPI0_D3 */
J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_OSPI0_D4 */
J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_OSPI0_D5 */
J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */
J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */
J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */
>;
};
};
&hbmc {
@@ -61,3 +77,23 @@
reg = <0x0 0x0 0x4000000>;
};
};
&ospi0 {
pinctrl-names = "default";
pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
flash@0{
compatible = "jedec,spi-nor";
reg = <0x0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <8>;
spi-max-frequency = <50000000>;
cdns,tshsl-ns = <60>;
cdns,tsd2d-ns = <60>;
cdns,tchsh-ns = <60>;
cdns,tslch-ns = <60>;
cdns,read-delay = <0>;
#address-cells = <1>;
#size-cells = <1>;
};
};

View File

@@ -40,6 +40,8 @@
i2c7 = &main_i2c4;
i2c8 = &main_i2c5;
i2c9 = &main_i2c6;
spi0 = &ospi0;
spi1 = &ospi1;
};
chosen { };
@@ -135,6 +137,7 @@
#size-cells = <2>;
ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
<0x00 0x00600000 0x00 0x00600000 0x00 0x00031100>, /* GPIO */
<0x00 0x00700000 0x00 0x00700000 0x00 0x00001000>, /* ESM */
<0x00 0x00900000 0x00 0x00900000 0x00 0x00012000>, /* serdes */
<0x00 0x00A40000 0x00 0x00A40000 0x00 0x00000800>, /* timesync router */
<0x00 0x01000000 0x00 0x01000000 0x00 0x0af02400>, /* Most peripherals */

View File

@@ -60,7 +60,7 @@
serial1 = &uart_A;
};
linein: audio-codec@0 {
linein: audio-codec-0 {
#sound-dai-cells = <0>;
compatible = "everest,es7241";
VDDA-supply = <&vcc_3v3>;
@@ -70,7 +70,7 @@
sound-name-prefix = "Linein";
};
lineout: audio-codec@1 {
lineout: audio-codec-1 {
#sound-dai-cells = <0>;
compatible = "everest,es7154";
VDD-supply = <&vcc_3v3>;
@@ -79,14 +79,14 @@
sound-name-prefix = "Lineout";
};
spdif_dit: audio-codec@2 {
spdif_dit: audio-codec-2 {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dit";
status = "okay";
sound-name-prefix = "DIT";
};
dmics: audio-codec@3 {
dmics: audio-codec-3 {
#sound-dai-cells = <0>;
compatible = "dmic-codec";
num-channels = <7>;
@@ -95,6 +95,13 @@
sound-name-prefix = "MIC";
};
spdif_dir: audio-codec-4 {
#sound-dai-cells = <0>;
compatible = "linux,spdif-dir";
status = "okay";
sound-name-prefix = "DIR";
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
@@ -249,6 +256,9 @@
"TODDR_A IN 2", "TDMIN_C OUT",
"TODDR_B IN 2", "TDMIN_C OUT",
"TODDR_C IN 2", "TDMIN_C OUT",
"TODDR_A IN 3", "SPDIFIN Capture",
"TODDR_B IN 3", "SPDIFIN Capture",
"TODDR_C IN 3", "SPDIFIN Capture",
"TODDR_A IN 4", "PDM Capture",
"TODDR_B IN 4", "PDM Capture",
"TODDR_C IN 4", "PDM Capture",
@@ -272,52 +282,52 @@
<393216000>;
status = "okay";
dai-link@0 {
dai-link-0 {
sound-dai = <&frddr_a>;
};
dai-link@1 {
dai-link-1 {
sound-dai = <&frddr_b>;
};
dai-link@2 {
dai-link-2 {
sound-dai = <&frddr_c>;
};
dai-link@3 {
dai-link-3 {
sound-dai = <&toddr_a>;
};
dai-link@4 {
dai-link-4 {
sound-dai = <&toddr_b>;
};
dai-link@5 {
dai-link-5 {
sound-dai = <&toddr_c>;
};
dai-link@6 {
dai-link-6 {
sound-dai = <&tdmif_c>;
dai-format = "i2s";
dai-tdm-slot-tx-mask-2 = <1 1>;
dai-tdm-slot-rx-mask-1 = <1 1>;
mclk-fs = <256>;
codec@0 {
codec-0 {
sound-dai = <&lineout>;
};
codec@1 {
codec-1 {
sound-dai = <&speaker_amp1>;
};
codec@2 {
codec-2 {
sound-dai = <&linein>;
};
};
dai-link@7 {
dai-link-7 {
sound-dai = <&spdifout>;
codec {
@@ -325,7 +335,15 @@
};
};
dai-link@8 {
dai-link-8 {
sound-dai = <&spdifin>;
codec {
sound-dai = <&spdif_dir>;
};
};
dai-link-9 {
sound-dai = <&pdm>;
codec {
@@ -357,6 +375,8 @@
eth_phy0: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
interrupt-parent = <&gpio_intc>;
interrupts = <98 IRQ_TYPE_LEVEL_LOW>;
eee-broken-1000t;
};
};
@@ -444,7 +464,8 @@
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <100000000>;
sd-uhs-sdr104;
max-frequency = <200000000>;
non-removable;
disable-wp;
@@ -461,15 +482,14 @@
/* emmc storage */
&sd_emmc_c {
status = "disabled";
pinctrl-0 = <&emmc_pins>;
status = "okay";
pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-sd-highspeed;
cap-mmc-highspeed;
max-frequency = <180000000>;
max-frequency = <200000000>;
non-removable;
disable-wp;
mmc-ddr-1_8v;
@@ -481,6 +501,12 @@
vqmmc-supply = <&vddio_boot>;
};
&spdifin {
pinctrl-0 = <&spdif_in_a19_pins>;
pinctrl-names = "default";
status = "okay";
};
&spdifout {
pinctrl-0 = <&spdif_out_a20_pins>;
pinctrl-names = "default";
@@ -543,8 +569,14 @@
&uart_A {
status = "okay";
pinctrl-0 = <&uart_a_pins>;
pinctrl-0 = <&uart_a_pins>, <&uart_a_cts_rts_pins>;
pinctrl-names = "default";
uart-has-rtscts;
bluetooth {
compatible = "brcm,bcm43438-bt";
shutdown-gpios = <&gpio GPIOX_21 GPIO_ACTIVE_HIGH>;
};
};
&uart_AO {

File diff suppressed because it is too large Load Diff

View File

@@ -5,51 +5,42 @@
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/axg-audio-clkc.h>
#include <dt-bindings/clock/g12a-clkc.h>
#include <dt-bindings/clock/g12a-aoclkc.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
#include <dt-bindings/reset/amlogic,meson-g12a-reset.h>
#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&gic>;
#address-cells = <2>;
#size-cells = <2>;
tdmif_a: audio-controller-0 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_A";
clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
<&clkc_audio AUD_CLKID_MST_A_SCLK>,
<&clkc_audio AUD_CLKID_MST_A_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
tdmif_b: audio-controller-1 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_B";
clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
<&clkc_audio AUD_CLKID_MST_B_SCLK>,
<&clkc_audio AUD_CLKID_MST_B_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
};
simplefb_cvbs: framebuffer-cvbs {
compatible = "amlogic,simple-framebuffer",
"simple-framebuffer";
amlogic,pipeline = "vpu-cvbs";
clocks = <&clkc CLKID_HDMI>,
<&clkc CLKID_HTX_PCLK>,
<&clkc CLKID_VPU_INTR>;
status = "disabled";
};
tdmif_c: audio-controller-2 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_C";
clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
<&clkc_audio AUD_CLKID_MST_C_SCLK>,
<&clkc_audio AUD_CLKID_MST_C_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
simplefb_hdmi: framebuffer-hdmi {
compatible = "amlogic,simple-framebuffer",
"simple-framebuffer";
amlogic,pipeline = "vpu-hdmi";
clocks = <&clkc CLKID_HDMI>,
<&clkc CLKID_HTX_PCLK>,
<&clkc CLKID_VPU_INTR>;
status = "disabled";
};
};
efuse: efuse {
@@ -58,6 +49,7 @@
#address-cells = <1>;
#size-cells = <1>;
read-only;
secure-monitor = <&sm>;
};
psci {
@@ -95,6 +87,94 @@
#size-cells = <2>;
ranges;
pcie: pcie@fc000000 {
compatible = "amlogic,g12a-pcie", "snps,dw-pcie";
reg = <0x0 0xfc000000 0x0 0x400000
0x0 0xff648000 0x0 0x2000
0x0 0xfc400000 0x0 0x200000>;
reg-names = "elbi", "cfg", "config";
interrupts = <GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
bus-range = <0x0 0xff>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
ranges = <0x81000000 0 0 0x0 0xfc600000 0 0x00100000
0x82000000 0 0xfc700000 0x0 0xfc700000 0 0x1900000>;
clocks = <&clkc CLKID_PCIE_PHY
&clkc CLKID_PCIE_COMB
&clkc CLKID_PCIE_PLL>;
clock-names = "general",
"pclk",
"port";
resets = <&reset RESET_PCIE_CTRL_A>,
<&reset RESET_PCIE_APB>;
reset-names = "port",
"apb";
num-lanes = <1>;
phys = <&usb3_pcie_phy PHY_TYPE_PCIE>;
phy-names = "pcie";
status = "disabled";
};
thermal-zones {
cpu_thermal: cpu-thermal {
polling-delay = <1000>;
polling-delay-passive = <100>;
thermal-sensors = <&cpu_temp>;
trips {
cpu_passive: cpu-passive {
temperature = <85000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
cpu_hot: cpu-hot {
temperature = <95000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "hot";
};
cpu_critical: cpu-critical {
temperature = <110000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
};
ddr_thermal: ddr-thermal {
polling-delay = <1000>;
polling-delay-passive = <100>;
thermal-sensors = <&ddr_temp>;
trips {
ddr_passive: ddr-passive {
temperature = <85000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
ddr_critical: ddr-critical {
temperature = <110000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
cooling-maps {
map {
trip = <&ddr_passive>;
cooling-device = <&mali THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
ethmac: ethernet@ff3f0000 {
compatible = "amlogic,meson-axg-dwmac",
"snps,dwmac-3.70a",
@@ -215,17 +295,9 @@
};
};
emmc_pins: emmc {
emmc_ctrl_pins: emmc-ctrl {
mux-0 {
groups = "emmc_nand_d0",
"emmc_nand_d1",
"emmc_nand_d2",
"emmc_nand_d3",
"emmc_nand_d4",
"emmc_nand_d5",
"emmc_nand_d6",
"emmc_nand_d7",
"emmc_cmd";
groups = "emmc_cmd";
function = "emmc";
bias-pull-up;
drive-strength-microamp = <4000>;
@@ -239,6 +311,34 @@
};
};
emmc_data_4b_pins: emmc-data-4b {
mux-0 {
groups = "emmc_nand_d0",
"emmc_nand_d1",
"emmc_nand_d2",
"emmc_nand_d3";
function = "emmc";
bias-pull-up;
drive-strength-microamp = <4000>;
};
};
emmc_data_8b_pins: emmc-data-8b {
mux-0 {
groups = "emmc_nand_d0",
"emmc_nand_d1",
"emmc_nand_d2",
"emmc_nand_d3",
"emmc_nand_d4",
"emmc_nand_d5",
"emmc_nand_d6",
"emmc_nand_d7";
function = "emmc";
bias-pull-up;
drive-strength-microamp = <4000>;
};
};
emmc_ds_pins: emmc-ds {
mux {
groups = "emmc_nand_ds";
@@ -493,6 +593,17 @@
};
};
nor_pins: nor {
mux {
groups = "nor_d",
"nor_q",
"nor_c",
"nor_cs";
function = "nor";
bias-disable;
};
};
pdm_din0_a_pins: pdm-din0-a {
mux {
groups = "pdm_din0_a";
@@ -877,6 +988,57 @@
};
};
spicc0_x_pins: spicc0-x {
mux {
groups = "spi0_mosi_x",
"spi0_miso_x",
"spi0_clk_x";
function = "spi0";
drive-strength-microamp = <4000>;
bias-disable;
};
};
spicc0_ss0_x_pins: spicc0-ss0-x {
mux {
groups = "spi0_ss0_x";
function = "spi0";
drive-strength-microamp = <4000>;
bias-disable;
};
};
spicc0_c_pins: spicc0-c {
mux {
groups = "spi0_mosi_c",
"spi0_miso_c",
"spi0_ss0_c",
"spi0_clk_c";
function = "spi0";
drive-strength-microamp = <4000>;
bias-disable;
};
};
spicc1_pins: spicc1 {
mux {
groups = "spi1_mosi",
"spi1_miso",
"spi1_clk";
function = "spi1";
drive-strength-microamp = <4000>;
};
};
spicc1_ss0_pins: spicc1-ss0 {
mux {
groups = "spi1_ss0";
function = "spi1";
drive-strength-microamp = <4000>;
bias-disable;
};
};
tdm_a_din0_pins: tdm-a-din0 {
mux {
groups = "tdm_a_din0";
@@ -1356,6 +1518,26 @@
};
};
cpu_temp: temperature-sensor@34800 {
compatible = "amlogic,g12a-cpu-thermal",
"amlogic,g12a-thermal";
reg = <0x0 0x34800 0x0 0x50>;
interrupts = <GIC_SPI 35 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_TS>;
#thermal-sensor-cells = <0>;
amlogic,ao-secure = <&sec_AO>;
};
ddr_temp: temperature-sensor@34c00 {
compatible = "amlogic,g12a-ddr-thermal",
"amlogic,g12a-thermal";
reg = <0x0 0x34c00 0x0 0x50>;
interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc CLKID_TS>;
#thermal-sensor-cells = <0>;
amlogic,ao-secure = <&sec_AO>;
};
usb2_phy0: phy@36000 {
compatible = "amlogic,g12a-usb2-phy";
reg = <0x0 0x36000 0x0 0x2000>;
@@ -1457,290 +1639,6 @@
};
};
pdm: audio-controller@40000 {
compatible = "amlogic,g12a-pdm",
"amlogic,axg-pdm";
reg = <0x0 0x40000 0x0 0x34>;
#sound-dai-cells = <0>;
sound-name-prefix = "PDM";
clocks = <&clkc_audio AUD_CLKID_PDM>,
<&clkc_audio AUD_CLKID_PDM_DCLK>,
<&clkc_audio AUD_CLKID_PDM_SYSCLK>;
clock-names = "pclk", "dclk", "sysclk";
status = "disabled";
};
audio: bus@42000 {
compatible = "simple-bus";
reg = <0x0 0x42000 0x0 0x2000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>;
clkc_audio: clock-controller@0 {
status = "disabled";
compatible = "amlogic,g12a-audio-clkc";
reg = <0x0 0x0 0x0 0xb4>;
#clock-cells = <1>;
#reset-cells = <1>;
clocks = <&clkc CLKID_AUDIO>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL3>,
<&clkc CLKID_HIFI_PLL>,
<&clkc CLKID_FCLK_DIV3>,
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_GP0_PLL>;
clock-names = "pclk",
"mst_in0",
"mst_in1",
"mst_in2",
"mst_in3",
"mst_in4",
"mst_in5",
"mst_in6",
"mst_in7";
resets = <&reset RESET_AUDIO>;
};
toddr_a: audio-controller@100 {
compatible = "amlogic,g12a-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x100 0x0 0x1c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_A";
interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
resets = <&arb AXG_ARB_TODDR_A>;
status = "disabled";
};
toddr_b: audio-controller@140 {
compatible = "amlogic,g12a-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x140 0x0 0x1c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_B";
interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
resets = <&arb AXG_ARB_TODDR_B>;
status = "disabled";
};
toddr_c: audio-controller@180 {
compatible = "amlogic,g12a-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x180 0x0 0x1c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_C";
interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
resets = <&arb AXG_ARB_TODDR_C>;
status = "disabled";
};
frddr_a: audio-controller@1c0 {
compatible = "amlogic,g12a-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x1c0 0x0 0x1c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_A";
interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
resets = <&arb AXG_ARB_FRDDR_A>;
status = "disabled";
};
frddr_b: audio-controller@200 {
compatible = "amlogic,g12a-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x200 0x0 0x1c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_B";
interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
resets = <&arb AXG_ARB_FRDDR_B>;
status = "disabled";
};
frddr_c: audio-controller@240 {
compatible = "amlogic,g12a-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x240 0x0 0x1c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_C";
interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
resets = <&arb AXG_ARB_FRDDR_C>;
status = "disabled";
};
arb: reset-controller@280 {
status = "disabled";
compatible = "amlogic,meson-axg-audio-arb";
reg = <0x0 0x280 0x0 0x4>;
#reset-cells = <1>;
clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
};
tdmin_a: audio-controller@300 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x300 0x0 0x40>;
sound-name-prefix = "TDMIN_A";
resets = <&clkc_audio AUD_RESET_TDMIN_A>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
<&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_b: audio-controller@340 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x340 0x0 0x40>;
sound-name-prefix = "TDMIN_B";
resets = <&clkc_audio AUD_RESET_TDMIN_B>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
<&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_c: audio-controller@380 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x380 0x0 0x40>;
sound-name-prefix = "TDMIN_C";
resets = <&clkc_audio AUD_RESET_TDMIN_C>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
<&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_lb: audio-controller@3c0 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x3c0 0x0 0x40>;
sound-name-prefix = "TDMIN_LB";
resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
spdifin: audio-controller@400 {
compatible = "amlogic,g12a-spdifin",
"amlogic,axg-spdifin";
reg = <0x0 0x400 0x0 0x30>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFIN";
interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
<&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
clock-names = "pclk", "refclk";
status = "disabled";
};
spdifout: audio-controller@480 {
compatible = "amlogic,g12a-spdifout",
"amlogic,axg-spdifout";
reg = <0x0 0x480 0x0 0x50>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFOUT";
clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
<&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
clock-names = "pclk", "mclk";
status = "disabled";
};
tdmout_a: audio-controller@500 {
compatible = "amlogic,g12a-tdmout";
reg = <0x0 0x500 0x0 0x40>;
sound-name-prefix = "TDMOUT_A";
resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmout_b: audio-controller@540 {
compatible = "amlogic,g12a-tdmout";
reg = <0x0 0x540 0x0 0x40>;
sound-name-prefix = "TDMOUT_B";
resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmout_c: audio-controller@580 {
compatible = "amlogic,g12a-tdmout";
reg = <0x0 0x580 0x0 0x40>;
sound-name-prefix = "TDMOUT_C";
resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
spdifout_b: audio-controller@680 {
compatible = "amlogic,g12a-spdifout",
"amlogic,axg-spdifout";
reg = <0x0 0x680 0x0 0x50>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFOUT_B";
clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
<&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
clock-names = "pclk", "mclk";
status = "disabled";
};
tohdmitx: audio-controller@744 {
compatible = "amlogic,g12a-tohdmitx";
reg = <0x0 0x744 0x0 0x4>;
#sound-dai-cells = <1>;
sound-name-prefix = "TOHDMITX";
status = "disabled";
};
};
usb3_pcie_phy: phy@46000 {
compatible = "amlogic,g12a-usb3-pcie-phy";
reg = <0x0 0x46000 0x0 0x2000>;
@@ -2152,6 +2050,29 @@
};
};
vdec: video-decoder@ff620000 {
compatible = "amlogic,g12a-vdec";
reg = <0x0 0xff620000 0x0 0x10000>,
<0x0 0xffd0e180 0x0 0xe4>;
reg-names = "dos", "esparser";
interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "vdec", "esparser";
amlogic,ao-sysctrl = <&rti>;
amlogic,canvas = <&canvas>;
clocks = <&clkc CLKID_PARSER>,
<&clkc CLKID_DOS>,
<&clkc CLKID_VDEC_1>,
<&clkc CLKID_VDEC_HEVC>,
<&clkc CLKID_VDEC_HEVCF>;
clock-names = "dos_parser", "dos", "vdec_1",
"vdec_hevc", "vdec_hevcf";
resets = <&reset RESET_PARSER>;
reset-names = "esparser";
};
vpu: vpu@ff900000 {
compatible = "amlogic,meson-g12a-vpu";
reg = <0x0 0xff900000 0x0 0x100000>,
@@ -2212,6 +2133,39 @@
amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
};
spicc0: spi@13000 {
compatible = "amlogic,meson-g12a-spicc";
reg = <0x0 0x13000 0x0 0x44>;
interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc CLKID_SPICC0>,
<&clkc CLKID_SPICC0_SCLK>;
clock-names = "core", "pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spicc1: spi@15000 {
compatible = "amlogic,meson-g12a-spicc";
reg = <0x0 0x15000 0x0 0x44>;
interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc CLKID_SPICC1>,
<&clkc CLKID_SPICC1_SCLK>;
clock-names = "core", "pclk";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
spifc: spi@14000 {
compatible = "amlogic,meson-gxbb-spifc";
status = "disabled";
reg = <0x0 0x14000 0x0 0x80>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clkc CLKID_CLK81>;
};
pwm_ef: pwm@19000 {
compatible = "amlogic,meson-g12a-ee-pwm";
reg = <0x0 0x19000 0x0 0x20>;
@@ -2381,6 +2335,7 @@
dr_mode = "host";
snps,dis_u2_susphy_quirk;
snps,quirk-frame-length-adjustment;
snps,parkmode-disable-ss-quirk;
};
};
@@ -2388,10 +2343,10 @@
compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost";
reg = <0x0 0xffe40000 0x0 0x40000>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>,
interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "gpu", "mmu", "job";
<GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "job", "mmu", "gpu";
clocks = <&clkc CLKID_MALI>;
resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>;
@@ -2409,6 +2364,7 @@
assigned-clock-rates = <0>, /* Do Nothing */
<800000000>,
<0>; /* Do Nothing */
#cooling-cells = <2>;
};
};

399
arch/arm/dts/meson-g12.dtsi Normal file
View File

@@ -0,0 +1,399 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 BayLibre, SAS
* Author: Jerome Brunet <jbrunet@baylibre.com>
*/
#include "meson-g12-common.dtsi"
#include <dt-bindings/clock/axg-audio-clkc.h>
#include <dt-bindings/power/meson-g12a-power.h>
#include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h>
#include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
/ {
tdmif_a: audio-controller-0 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_A";
clocks = <&clkc_audio AUD_CLKID_MST_A_MCLK>,
<&clkc_audio AUD_CLKID_MST_A_SCLK>,
<&clkc_audio AUD_CLKID_MST_A_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
};
tdmif_b: audio-controller-1 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_B";
clocks = <&clkc_audio AUD_CLKID_MST_B_MCLK>,
<&clkc_audio AUD_CLKID_MST_B_SCLK>,
<&clkc_audio AUD_CLKID_MST_B_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
};
tdmif_c: audio-controller-2 {
compatible = "amlogic,axg-tdm-iface";
#sound-dai-cells = <0>;
sound-name-prefix = "TDM_C";
clocks = <&clkc_audio AUD_CLKID_MST_C_MCLK>,
<&clkc_audio AUD_CLKID_MST_C_SCLK>,
<&clkc_audio AUD_CLKID_MST_C_LRCLK>;
clock-names = "mclk", "sclk", "lrclk";
status = "disabled";
};
};
&apb {
pdm: audio-controller@40000 {
compatible = "amlogic,g12a-pdm",
"amlogic,axg-pdm";
reg = <0x0 0x40000 0x0 0x34>;
#sound-dai-cells = <0>;
sound-name-prefix = "PDM";
clocks = <&clkc_audio AUD_CLKID_PDM>,
<&clkc_audio AUD_CLKID_PDM_DCLK>,
<&clkc_audio AUD_CLKID_PDM_SYSCLK>;
clock-names = "pclk", "dclk", "sysclk";
resets = <&clkc_audio AUD_RESET_PDM>;
status = "disabled";
};
audio: bus@42000 {
compatible = "simple-bus";
reg = <0x0 0x42000 0x0 0x2000>;
#address-cells = <2>;
#size-cells = <2>;
ranges = <0x0 0x0 0x0 0x42000 0x0 0x2000>;
clkc_audio: clock-controller@0 {
status = "disabled";
compatible = "amlogic,g12a-audio-clkc";
reg = <0x0 0x0 0x0 0xb4>;
#clock-cells = <1>;
#reset-cells = <1>;
clocks = <&clkc CLKID_AUDIO>,
<&clkc CLKID_MPLL0>,
<&clkc CLKID_MPLL1>,
<&clkc CLKID_MPLL2>,
<&clkc CLKID_MPLL3>,
<&clkc CLKID_HIFI_PLL>,
<&clkc CLKID_FCLK_DIV3>,
<&clkc CLKID_FCLK_DIV4>,
<&clkc CLKID_GP0_PLL>;
clock-names = "pclk",
"mst_in0",
"mst_in1",
"mst_in2",
"mst_in3",
"mst_in4",
"mst_in5",
"mst_in6",
"mst_in7";
resets = <&reset RESET_AUDIO>;
};
toddr_a: audio-controller@100 {
compatible = "amlogic,g12a-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x100 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_A";
interrupts = <GIC_SPI 148 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_A>;
resets = <&arb AXG_ARB_TODDR_A>,
<&clkc_audio AUD_RESET_TODDR_A>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <512>;
status = "disabled";
};
toddr_b: audio-controller@140 {
compatible = "amlogic,g12a-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x140 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_B";
interrupts = <GIC_SPI 149 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_B>;
resets = <&arb AXG_ARB_TODDR_B>,
<&clkc_audio AUD_RESET_TODDR_B>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
toddr_c: audio-controller@180 {
compatible = "amlogic,g12a-toddr",
"amlogic,axg-toddr";
reg = <0x0 0x180 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "TODDR_C";
interrupts = <GIC_SPI 150 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_TODDR_C>;
resets = <&arb AXG_ARB_TODDR_C>,
<&clkc_audio AUD_RESET_TODDR_C>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
frddr_a: audio-controller@1c0 {
compatible = "amlogic,g12a-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x1c0 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_A";
interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_A>;
resets = <&arb AXG_ARB_FRDDR_A>,
<&clkc_audio AUD_RESET_FRDDR_A>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <512>;
status = "disabled";
};
frddr_b: audio-controller@200 {
compatible = "amlogic,g12a-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x200 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_B";
interrupts = <GIC_SPI 153 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_B>;
resets = <&arb AXG_ARB_FRDDR_B>,
<&clkc_audio AUD_RESET_FRDDR_B>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
frddr_c: audio-controller@240 {
compatible = "amlogic,g12a-frddr",
"amlogic,axg-frddr";
reg = <0x0 0x240 0x0 0x2c>;
#sound-dai-cells = <0>;
sound-name-prefix = "FRDDR_C";
interrupts = <GIC_SPI 154 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_FRDDR_C>;
resets = <&arb AXG_ARB_FRDDR_C>,
<&clkc_audio AUD_RESET_FRDDR_C>;
reset-names = "arb", "rst";
amlogic,fifo-depth = <256>;
status = "disabled";
};
arb: reset-controller@280 {
status = "disabled";
compatible = "amlogic,meson-axg-audio-arb";
reg = <0x0 0x280 0x0 0x4>;
#reset-cells = <1>;
clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
};
tdmin_a: audio-controller@300 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x300 0x0 0x40>;
sound-name-prefix = "TDMIN_A";
resets = <&clkc_audio AUD_RESET_TDMIN_A>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_A>,
<&clkc_audio AUD_CLKID_TDMIN_A_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_A_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_A_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_b: audio-controller@340 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x340 0x0 0x40>;
sound-name-prefix = "TDMIN_B";
resets = <&clkc_audio AUD_RESET_TDMIN_B>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_B>,
<&clkc_audio AUD_CLKID_TDMIN_B_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_B_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_B_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_c: audio-controller@380 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x380 0x0 0x40>;
sound-name-prefix = "TDMIN_C";
resets = <&clkc_audio AUD_RESET_TDMIN_C>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_C>,
<&clkc_audio AUD_CLKID_TDMIN_C_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_C_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_C_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmin_lb: audio-controller@3c0 {
compatible = "amlogic,g12a-tdmin",
"amlogic,axg-tdmin";
reg = <0x0 0x3c0 0x0 0x40>;
sound-name-prefix = "TDMIN_LB";
resets = <&clkc_audio AUD_RESET_TDMIN_LB>;
clocks = <&clkc_audio AUD_CLKID_TDMIN_LB>,
<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK>,
<&clkc_audio AUD_CLKID_TDMIN_LB_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>,
<&clkc_audio AUD_CLKID_TDMIN_LB_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
spdifin: audio-controller@400 {
compatible = "amlogic,g12a-spdifin",
"amlogic,axg-spdifin";
reg = <0x0 0x400 0x0 0x30>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFIN";
interrupts = <GIC_SPI 151 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkc_audio AUD_CLKID_SPDIFIN>,
<&clkc_audio AUD_CLKID_SPDIFIN_CLK>;
clock-names = "pclk", "refclk";
resets = <&clkc_audio AUD_RESET_SPDIFIN>;
status = "disabled";
};
spdifout: audio-controller@480 {
compatible = "amlogic,g12a-spdifout",
"amlogic,axg-spdifout";
reg = <0x0 0x480 0x0 0x50>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFOUT";
clocks = <&clkc_audio AUD_CLKID_SPDIFOUT>,
<&clkc_audio AUD_CLKID_SPDIFOUT_CLK>;
clock-names = "pclk", "mclk";
resets = <&clkc_audio AUD_RESET_SPDIFOUT>;
status = "disabled";
};
tdmout_a: audio-controller@500 {
compatible = "amlogic,g12a-tdmout";
reg = <0x0 0x500 0x0 0x40>;
sound-name-prefix = "TDMOUT_A";
resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmout_b: audio-controller@540 {
compatible = "amlogic,g12a-tdmout";
reg = <0x0 0x540 0x0 0x40>;
sound-name-prefix = "TDMOUT_B";
resets = <&clkc_audio AUD_RESET_TDMOUT_B>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_B>,
<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_B_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_B_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
tdmout_c: audio-controller@580 {
compatible = "amlogic,g12a-tdmout";
reg = <0x0 0x580 0x0 0x40>;
sound-name-prefix = "TDMOUT_C";
resets = <&clkc_audio AUD_RESET_TDMOUT_C>;
clocks = <&clkc_audio AUD_CLKID_TDMOUT_C>,
<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_C_SCLK_SEL>,
<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>,
<&clkc_audio AUD_CLKID_TDMOUT_C_LRCLK>;
clock-names = "pclk", "sclk", "sclk_sel",
"lrclk", "lrclk_sel";
status = "disabled";
};
spdifout_b: audio-controller@680 {
compatible = "amlogic,g12a-spdifout",
"amlogic,axg-spdifout";
reg = <0x0 0x680 0x0 0x50>;
#sound-dai-cells = <0>;
sound-name-prefix = "SPDIFOUT_B";
clocks = <&clkc_audio AUD_CLKID_SPDIFOUT_B>,
<&clkc_audio AUD_CLKID_SPDIFOUT_B_CLK>;
clock-names = "pclk", "mclk";
resets = <&clkc_audio AUD_RESET_SPDIFOUT_B>;
status = "disabled";
};
tohdmitx: audio-controller@744 {
compatible = "amlogic,g12a-tohdmitx";
reg = <0x0 0x744 0x0 0x4>;
#sound-dai-cells = <1>;
sound-name-prefix = "TOHDMITX";
resets = <&clkc_audio AUD_RESET_TOHDMITX>;
status = "disabled";
};
};
};
&cpu_thermal {
cooling-maps {
map0 {
trip = <&cpu_passive>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_hot>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu100 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu101 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu102 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu103 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
&ethmac {
power-domains = <&pwrc PWRC_G12A_ETH_ID>;
};
&vpu {
power-domains = <&pwrc PWRC_G12A_VPU_ID>;
};
&sd_emmc_a {
amlogic,dram-access-quirk;
};
&simplefb_cvbs {
power-domains = <&pwrc PWRC_G12A_VPU_ID>;
};
&simplefb_hdmi {
power-domains = <&pwrc PWRC_G12A_VPU_ID>;
};

View File

@@ -129,6 +129,25 @@
enable-active-high;
};
vddcpu: regulator-vddcpu {
/*
* SY8120B1ABC DC/DC Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDCPU";
regulator-min-microvolt = <721000>;
regulator-max-microvolt = <1022000>;
vin-supply = <&dc_in>;
pwms = <&pwm_AO_cd 1 1250 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
vddio_ao1v8: regulator-vddio_ao1v8 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO1V8";
@@ -250,7 +269,7 @@
dai-tdm-slot-tx-mask-3 = <1 1>;
mclk-fs = <256>;
codec@0 {
codec {
sound-dai = <&tohdmitx TOHDMITX_I2S_IN_B>;
};
};
@@ -297,6 +316,34 @@
status = "okay";
};
&cpu0 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu1 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu2 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu3 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
@@ -339,6 +386,20 @@
pinctrl-names = "default";
};
&ir {
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
&pwm_ef {
status = "okay";
pinctrl-0 = <&pwm_e_pins>;
@@ -377,6 +438,9 @@
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddao_3v3>;
@@ -408,7 +472,7 @@
/* eMMC */
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";

View File

@@ -129,6 +129,24 @@
regulator-always-on;
};
vddcpu: regulator-vddcpu {
/*
* MP8756GD Regulator.
*/
compatible = "pwm-regulator";
regulator-name = "VDDCPU";
regulator-min-microvolt = <721000>;
regulator-max-microvolt = <1022000>;
vin-supply = <&main_12v>;
pwms = <&pwm_AO_cd 1 1250 0>;
pwm-dutycycle-range = <100 0>;
regulator-boot-on;
regulator-always-on;
};
};
&cec_AO {
@@ -145,6 +163,34 @@
hdmi-phandle = <&hdmi_tx>;
};
&cpu0 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu1 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu2 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cpu3 {
cpu-supply = <&vddcpu>;
operating-points-v2 = <&cpu_opp_table>;
clocks = <&clkc CLKID_CPU_CLK>;
clock-latency = <50000>;
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
@@ -197,6 +243,14 @@
pinctrl-names = "default";
};
&pwm_AO_cd {
pinctrl-0 = <&pwm_ao_d_e_pins>;
pinctrl-names = "default";
clocks = <&xtal>;
clock-names = "clkin1";
status = "okay";
};
/* SD card */
&sd_emmc_b {
status = "okay";
@@ -217,7 +271,7 @@
/* eMMC */
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";

View File

@@ -3,8 +3,7 @@
* Copyright (c) 2018 Amlogic, Inc. All rights reserved.
*/
#include "meson-g12-common.dtsi"
#include <dt-bindings/power/meson-g12a-power.h>
#include "meson-g12.dtsi"
/ {
compatible = "amlogic,g12a";
@@ -19,6 +18,7 @@
reg = <0x0 0x0>;
enable-method = "psci";
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu1: cpu@1 {
@@ -27,6 +27,7 @@
reg = <0x0 0x1>;
enable-method = "psci";
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu2: cpu@2 {
@@ -35,6 +36,7 @@
reg = <0x0 0x2>;
enable-method = "psci";
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu3: cpu@3 {
@@ -43,6 +45,7 @@
reg = <0x0 0x3>;
enable-method = "psci";
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
l2: l2-cache0 {
@@ -111,14 +114,22 @@
};
};
&ethmac {
power-domains = <&pwrc PWRC_G12A_ETH_ID>;
};
&cpu_thermal {
cooling-maps {
map0 {
trip = <&cpu_passive>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
&vpu {
power-domains = <&pwrc PWRC_G12A_VPU_ID>;
};
&sd_emmc_a {
amlogic,dram-access-quirk;
map1 {
trip = <&cpu_hot>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};

View File

@@ -0,0 +1,7 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 BayLibre, SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include "meson-khadas-vim3-u-boot.dtsi"

View File

@@ -14,3 +14,28 @@
/ {
compatible = "khadas,vim3", "amlogic,a311d", "amlogic,g12b";
};
/*
* The VIM3 on-board MCU can mux the PCIe/USB3.0 shared differential
* lines using a FUSB340TMX USB 3.1 SuperSpeed Data Switch between
* an USB3.0 Type A connector and a M.2 Key M slot.
* The PHY driving these differential lines is shared between
* the USB3.0 controller and the PCIe Controller, thus only
* a single controller can use it.
* If the MCU is configured to mux the PCIe/USB3.0 differential lines
* to the M.2 Key M slot, uncomment the following block to disable
* USB3.0 from the USB Complex and enable the PCIe controller.
* The End User is not expected to uncomment the following except for
* testing purposes, but instead rely on the firmware/bootloader to
* update these nodes accordingly if PCIe mode is selected by the MCU.
*/
/*
&pcie {
status = "okay";
};
&usb {
phys = <&usb2_phy0>, <&usb2_phy1>;
phy-names = "usb2-phy0", "usb2-phy1";
};
*/

View File

@@ -8,6 +8,8 @@
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
model = "Khadas VIM3";
vddcpu_a: regulator-vddcpu-a {
/*
* MP8756GD Regulator.
@@ -48,7 +50,7 @@
sound {
compatible = "amlogic,axg-sound-card";
model = "G12A-KHADAS-VIM3";
model = "G12B-KHADAS-VIM3";
audio-aux-devs = <&tdmout_b>;
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",

View File

@@ -12,7 +12,7 @@
#include <dt-bindings/sound/meson-g12a-tohdmitx.h>
/ {
compatible = "hardkernel,odroid-n2", "amlogic,g12b";
compatible = "hardkernel,odroid-n2", "amlogic,s922x", "amlogic,g12b";
model = "Hardkernel ODROID-N2";
aliases {
@@ -208,7 +208,7 @@
sound {
compatible = "amlogic,axg-sound-card";
model = "G12A-ODROIDN2";
model = "G12B-ODROID-N2";
audio-aux-devs = <&tdmout_b>;
audio-routing = "TDMOUT_B IN 0", "FRDDR_A OUT 1",
"TDMOUT_B IN 1", "FRDDR_B OUT 1",
@@ -435,7 +435,7 @@
/* eMMC */
&sd_emmc_c {
status = "okay";
pinctrl-0 = <&emmc_pins>, <&emmc_ds_pins>;
pinctrl-0 = <&emmc_ctrl_pins>, <&emmc_data_8b_pins>, <&emmc_ds_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
@@ -451,6 +451,27 @@
vqmmc-supply = <&flash_1v8>;
};
/*
* EMMC_D4, EMMC_D5, EMMC_D6 and EMMC_D7 pins are shared between SPI NOR pins
* and eMMC Data 4 to 7 pins.
* Replace emmc_data_8b_pins to emmc_data_4b_pins from sd_emmc_c pinctrl-0,
* and change bus-width to 4 then spifc can be enabled.
* The SW1 slide should also be set to the correct position.
*/
&spifc {
status = "disabled";
pinctrl-0 = <&nor_pins>;
pinctrl-names = "default";
mx25u64: spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mxicy,mx25u6435f", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <104000000>;
};
};
&tdmif_b {
status = "okay";
};

View File

@@ -4,8 +4,7 @@
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include "meson-g12-common.dtsi"
#include <dt-bindings/power/meson-g12a-power.h>
#include "meson-g12.dtsi"
/ {
compatible = "amlogic,g12b";
@@ -49,7 +48,9 @@
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
enable-method = "psci";
capacity-dmips-mhz = <592>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu1: cpu@1 {
@@ -57,7 +58,9 @@
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
enable-method = "psci";
capacity-dmips-mhz = <592>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu100: cpu@100 {
@@ -65,7 +68,9 @@
compatible = "arm,cortex-a73";
reg = <0x0 0x100>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu101: cpu@101 {
@@ -73,7 +78,9 @@
compatible = "arm,cortex-a73";
reg = <0x0 0x101>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu102: cpu@102 {
@@ -81,7 +88,9 @@
compatible = "arm,cortex-a73";
reg = <0x0 0x102>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
cpu103: cpu@103 {
@@ -89,7 +98,9 @@
compatible = "arm,cortex-a73";
reg = <0x0 0x103>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
next-level-cache = <&l2>;
#cooling-cells = <2>;
};
l2: l2-cache0 {
@@ -102,14 +113,3 @@
compatible = "amlogic,g12b-clkc";
};
&ethmac {
power-domains = <&pwrc PWRC_G12A_ETH_ID>;
};
&vpu {
power-domains = <&pwrc PWRC_G12A_VPU_ID>;
};
&sd_emmc_a {
amlogic,dram-access-quirk;
};

View File

@@ -0,0 +1,375 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (c) 2019 BayLibre SAS.
* Author: Jerome Brunet <jbrunet@baylibre.com>
*/
/* Libretech Amlogic GX PC form factor - AKA: Tartiflette */
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
adc-keys {
compatible = "adc-keys";
io-channels = <&saradc 0>;
io-channel-names = "buttons";
keyup-threshold-microvolt = <1800000>;
update-button {
label = "update";
linux,code = <KEY_VENDOR>;
press-threshold-microvolt = <1300000>;
};
};
aliases {
serial0 = &uart_AO;
ethernet0 = &ethmac;
spi0 = &spifc;
};
chosen {
stdout-path = "serial0:115200n8";
};
cvbs-connector {
compatible = "composite-video-connector";
status = "disabled";
port {
cvbs_connector_in: endpoint {
remote-endpoint = <&cvbs_vdac_out>;
};
};
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
};
hdmi-connector {
compatible = "hdmi-connector";
type = "a";
port {
hdmi_connector_in: endpoint {
remote-endpoint = <&hdmi_tx_tmds_out>;
};
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
poll-interval = <100>;
power-button {
label = "power";
linux,code = <KEY_POWER>;
gpios = <&gpio_ao GPIOAO_2 GPIO_ACTIVE_LOW>;
};
};
memory@0 {
device_type = "memory";
reg = <0x0 0x0 0x0 0x80000000>;
};
ao_5v: regulator-ao_5v {
compatible = "regulator-fixed";
regulator-name = "AO_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&dc_in>;
regulator-always-on;
};
dc_in: regulator-dc_in {
compatible = "regulator-fixed";
regulator-name = "DC_IN";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
leds {
compatible = "gpio-leds";
green {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_DISK_ACTIVITY;
gpios = <&gpio_ao GPIOAO_9 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "disk-activity";
};
blue {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
gpios = <&gpio GPIODV_28 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
panic-indicator;
};
};
vcc_card: regulator-vcc_card {
compatible = "regulator-fixed";
regulator-name = "VCC_CARD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vddio_ao3v3>;
gpio = <&gpio GPIODV_4 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
vcc5v: regulator-vcc5v {
compatible = "regulator-fixed";
regulator-name = "VCC5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&ao_5v>;
gpio = <&gpio GPIOH_3 GPIO_OPEN_DRAIN>;
};
vddio_ao18: regulator-vddio_ao18 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&ao_5v>;
regulator-always-on;
};
vddio_ao3v3: regulator-vddio_ao3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&ao_5v>;
regulator-always-on;
};
vddio_boot: regulator-vddio_boot {
compatible = "regulator-fixed";
regulator-name = "VDDIO_BOOT";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vddio_ao3v3>;
regulator-always-on;
};
vddio_card: regulator-vddio-card {
compatible = "regulator-gpio";
regulator-name = "VDDIO_CARD";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
gpios = <&gpio GPIODV_5 GPIO_ACTIVE_HIGH>;
gpios-states = <0>;
states = <3300000 0>,
<1800000 1>;
regulator-settling-time-up-us = <200>;
regulator-settling-time-down-us = <50000>;
};
};
&cec_AO {
pinctrl-0 = <&ao_cec_pins>;
pinctrl-names = "default";
hdmi-phandle = <&hdmi_tx>;
status = "okay";
};
&cvbs_vdac_port {
cvbs_vdac_out: endpoint {
remote-endpoint = <&cvbs_connector_in>;
};
};
&ethmac {
pinctrl-0 = <&eth_pins>, <&eth_phy_irq_pins>;
pinctrl-names = "default";
phy-handle = <&external_phy>;
amlogic,tx-delay-ns = <2>;
phy-mode = "rgmii";
status = "okay";
};
&external_mdio {
external_phy: ethernet-phy@0 {
reg = <0>;
max-speed = <1000>;
reset-assert-us = <10000>;
reset-deassert-us = <30000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
interrupts = <25 IRQ_TYPE_LEVEL_LOW>;
};
};
&pinctrl_periphs {
/*
* Make sure the reset pin of the usb HUB is driven high to take
* it out of reset.
*/
usb1_rst_pins: usb1_rst_irq {
mux {
groups = "GPIODV_3";
function = "gpio_periphs";
bias-disable;
output-high;
};
};
/* Make sure the phy irq pin is properly configured as input */
eth_phy_irq_pins: eth_phy_irq {
mux {
groups = "GPIOZ_15";
function = "gpio_periphs";
bias-disable;
output-disable;
};
};
};
&hdmi_tx {
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
hdmi-supply = <&vcc5v>;
status = "okay";
};
&hdmi_tx_tmds_port {
hdmi_tx_tmds_out: endpoint {
remote-endpoint = <&hdmi_connector_in>;
};
};
&ir {
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
status = "okay";
};
&i2c_C {
pinctrl-0 = <&i2c_c_dv18_pins>;
pinctrl-names = "default";
status = "okay";
rtc: rtc@51 {
reg = <0x51>;
compatible = "nxp,pcf8563";
#clock-cells = <0>;
clock-output-names = "rtc_clkout";
};
};
&pwm_AO_ab {
pinctrl-0 = <&pwm_ao_a_3_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
status = "okay";
};
&pwm_ab {
pinctrl-0 = <&pwm_b_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
status = "okay";
};
&pwm_ef {
pinctrl-0 = <&pwm_e_pins>, <&pwm_f_clk_pins>;
pinctrl-names = "default";
clocks = <&clkc CLKID_FCLK_DIV4>;
clock-names = "clkin0";
status = "okay";
};
&saradc {
vref-supply = <&vddio_ao18>;
status = "okay";
};
/* SD card */
&sd_emmc_b {
pinctrl-0 = <&sdcard_pins>;
pinctrl-1 = <&sdcard_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <4>;
cap-sd-highspeed;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-ddr50;
max-frequency = <200000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vcc_card>;
vqmmc-supply = <&vddio_card>;
status = "okay";
};
/* eMMC */
&sd_emmc_c {
pinctrl-0 = <&emmc_pins>;
pinctrl-1 = <&emmc_clk_gate_pins>;
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
cap-mmc-highspeed;
mmc-ddr-1_8v;
mmc-hs200-1_8v;
max-frequency = <200000000>;
disable-wp;
mmc-pwrseq = <&emmc_pwrseq>;
vmmc-supply = <&vddio_ao3v3>;
vqmmc-supply = <&vddio_boot>;
status = "okay";
};
&spifc {
pinctrl-0 = <&nor_pins>;
pinctrl-names = "default";
status = "okay";
gd25lq128: spi-flash@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <12000000>;
};
};
&uart_AO {
pinctrl-0 = <&uart_ao_a_pins>;
pinctrl-names = "default";
status = "okay";
};
&usb0 {
status = "okay";
};
&usb2_phy0 {
pinctrl-0 = <&usb1_rst_pins>;
pinctrl-names = "default";
phy-supply = <&vcc5v>;
};
&usb2_phy1 {
phy-supply = <&vcc5v>;
};

View File

@@ -11,6 +11,10 @@
};
&vpu {
reg = <0x0 0xd0100000 0x0 0x100000>,
<0x0 0xc883c000 0x0 0x1000>,
<0x0 0xc8838000 0x0 0x1000>;
reg-names = "vpu", "hhi", "dmc";
u-boot,dm-pre-reloc;
};

View File

@@ -12,6 +12,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/thermal/thermal.h>
/ {
interrupt-parent = <&gic>;
@@ -50,44 +51,70 @@
};
};
chosen {
#address-cells = <2>;
#size-cells = <2>;
ranges;
simplefb_cvbs: framebuffer-cvbs {
compatible = "amlogic,simple-framebuffer",
"simple-framebuffer";
amlogic,pipeline = "vpu-cvbs";
power-domains = <&pwrc_vpu>;
status = "disabled";
};
simplefb_hdmi: framebuffer-hdmi {
compatible = "amlogic,simple-framebuffer",
"simple-framebuffer";
amlogic,pipeline = "vpu-hdmi";
power-domains = <&pwrc_vpu>;
status = "disabled";
};
};
cpus {
#address-cells = <0x2>;
#size-cells = <0x0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x0>;
enable-method = "psci";
next-level-cache = <&l2>;
clocks = <&scpi_dvfs 0>;
#cooling-cells = <2>;
};
cpu1: cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x1>;
enable-method = "psci";
next-level-cache = <&l2>;
clocks = <&scpi_dvfs 0>;
#cooling-cells = <2>;
};
cpu2: cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x2>;
enable-method = "psci";
next-level-cache = <&l2>;
clocks = <&scpi_dvfs 0>;
#cooling-cells = <2>;
};
cpu3: cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
compatible = "arm,cortex-a53";
reg = <0x0 0x3>;
enable-method = "psci";
next-level-cache = <&l2>;
clocks = <&scpi_dvfs 0>;
#cooling-cells = <2>;
};
l2: l2-cache0 {
@@ -95,6 +122,53 @@
};
};
thermal-zones {
cpu-thermal {
polling-delay-passive = <250>; /* milliseconds */
polling-delay = <1000>; /* milliseconds */
thermal-sensors = <&scpi_sensors 0>;
trips {
cpu_passive: cpu-passive {
temperature = <80000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "passive";
};
cpu_hot: cpu-hot {
temperature = <90000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "hot";
};
cpu_critical: cpu-critical {
temperature = <110000>; /* millicelsius */
hysteresis = <2000>; /* millicelsius */
type = "critical";
};
};
cpu_cooling_maps: cooling-maps {
map0 {
trip = <&cpu_passive>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu_hot>;
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
};
arm-pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
@@ -139,6 +213,7 @@
#address-cells = <1>;
#size-cells = <1>;
read-only;
secure-monitor = <&sm>;
sn: sn@14 {
reg = <0x14 0x10>;
@@ -198,7 +273,7 @@
};
reset: reset-controller@4404 {
compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset";
compatible = "amlogic,meson-gxbb-reset";
reg = <0x0 0x04404 0x0 0x9c>;
#reset-cells = <1>;
};
@@ -218,7 +293,7 @@
};
i2c_A: i2c@8500 {
compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
compatible = "amlogic,meson-gxbb-i2c";
reg = <0x0 0x08500 0x0 0x20>;
interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
@@ -262,8 +337,13 @@
status = "disabled";
};
clock-measure@8758 {
compatible = "amlogic,meson-gx-clk-measure";
reg = <0x0 0x8758 0x0 0x10>;
};
i2c_B: i2c@87c0 {
compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
compatible = "amlogic,meson-gxbb-i2c";
reg = <0x0 0x087c0 0x0 0x20>;
interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
@@ -272,7 +352,7 @@
};
i2c_C: i2c@87e0 {
compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
compatible = "amlogic,meson-gxbb-i2c";
reg = <0x0 0x087e0 0x0 0x20>;
interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
@@ -290,7 +370,7 @@
};
spifc: spi@8c80 {
compatible = "amlogic,meson-gx-spifc", "amlogic,meson-gxbb-spifc";
compatible = "amlogic,meson-gxbb-spifc";
reg = <0x0 0x08c80 0x0 0x80>;
#address-cells = <1>;
#size-cells = <0>;
@@ -298,7 +378,7 @@
};
watchdog@98d0 {
compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt";
compatible = "amlogic,meson-gxbb-wdt";
reg = <0x0 0x098d0 0x0 0x10>;
clocks = <&xtal>;
};
@@ -364,6 +444,7 @@
compatible = "amlogic,meson-gx-ao-cec";
reg = <0x0 0x00100 0x0 0x14>;
interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
status = "disabled";
};
sec_AO: ao-secure@140 {
@@ -387,7 +468,7 @@
};
i2c_AO: i2c@500 {
compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
compatible = "amlogic,meson-gxbb-i2c";
reg = <0x0 0x500 0x0 0x20>;
interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
@@ -410,7 +491,21 @@
};
};
periphs: periphs@c8834000 {
vdec: video-codec@c8820000 {
compatible = "amlogic,gx-vdec";
reg = <0x0 0xc8820000 0x0 0x10000>,
<0x0 0xc110a580 0x0 0xe4>;
reg-names = "dos", "esparser";
interrupts = <GIC_SPI 44 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 32 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "vdec", "esparser";
amlogic,ao-sysctrl = <&sysctrl_AO>;
amlogic,canvas = <&canvas>;
};
periphs: bus@c8834000 {
compatible = "simple-bus";
reg = <0x0 0xc8834000 0x0 0x2000>;
#address-cells = <2>;
@@ -449,7 +544,7 @@
};
mailbox: mailbox@404 {
compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
compatible = "amlogic,meson-gxbb-mhu";
reg = <0 0x404 0 0x4c>;
interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
@@ -459,11 +554,15 @@
};
ethmac: ethernet@c9410000 {
compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac";
reg = <0x0 0xc9410000 0x0 0x10000
0x0 0xc8834540 0x0 0x4>;
interrupts = <GIC_SPI 8 IRQ_TYPE_EDGE_RISING>;
compatible = "amlogic,meson-gxbb-dwmac",
"snps,dwmac-3.70a",
"snps,dwmac";
reg = <0x0 0xc9410000 0x0 0x10000>,
<0x0 0xc8834540 0x0 0x4>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
rx-fifo-depth = <4096>;
tx-fifo-depth = <2048>;
status = "disabled";
};
@@ -499,12 +598,12 @@
vpu: vpu@d0100000 {
compatible = "amlogic,meson-gx-vpu";
reg = <0x0 0xd0100000 0x0 0x100000>,
<0x0 0xc883c000 0x0 0x1000>,
<0x0 0xc8838000 0x0 0x1000>;
reg-names = "vpu", "hhi", "dmc";
<0x0 0xc883c000 0x0 0x1000>;
reg-names = "vpu", "hhi";
interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
#address-cells = <1>;
#size-cells = <0>;
amlogic,canvas = <&canvas>;
/* CVBS VDAC output port */
cvbs_vdac_port: port@0 {

View File

@@ -10,6 +10,7 @@
/ {
compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
model = "FriendlyARM NanoPi K2";
aliases {
serial0 = &uart_AO;
@@ -154,10 +155,6 @@
amlogic,tx-delay-ns = <2>;
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-active-low;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
@@ -166,6 +163,11 @@
eth_phy0: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
reset-assert-us = <10000>;
reset-deassert-us = <30000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_15 */
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
@@ -191,7 +193,7 @@
pinctrl-names = "default";
};
&pinctrl_aobus {
&gpio_ao {
gpio-line-names = "UART TX", "UART RX", "Power Control", "Power Key In",
"VCCK En", "CON1 Header Pin31",
"I2S Header Pin6", "IR In", "I2S Header Pin7",
@@ -201,7 +203,7 @@
"";
};
&pinctrl_periphs {
&gpio {
gpio-line-names = /* Bank GPIOZ */
"Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
"Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
@@ -273,11 +275,14 @@
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <200000000>;
max-frequency = <50000000>;
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddio_ao3v3>;
@@ -301,12 +306,11 @@
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-sdr104;
max-frequency = <200000000>;
sd-uhs-ddr50;
max-frequency = <100000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
cd-inverted;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&vddio_ao3v3>;
vqmmc-supply = <&vddio_tf>;

View File

@@ -36,8 +36,15 @@
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
/*
* signal name from schematics: PWREN
*/
gpio = <&gpio_ao GPIOAO_5 GPIO_ACTIVE_HIGH>;
enable-active-high;
/*
* signal name from schematics: USB_POWER
*/
vin-supply = <&p5v0>;
};
leds {
@@ -50,18 +57,38 @@
};
};
p5v0: regulator-p5v0 {
compatible = "regulator-fixed";
regulator-name = "P5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
};
hdmi_p5v0: regulator-hdmi_p5v0 {
compatible = "regulator-fixed";
regulator-name = "HDMI_P5V0";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
/* AP2331SA-7 */
vin-supply = <&p5v0>;
};
tflash_vdd: regulator-tflash_vdd {
/*
* signal name from schematics: TFLASH_VDD_EN
*/
compatible = "regulator-fixed";
regulator-name = "TFLASH_VDD";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
/*
* signal name from schematics: TFLASH_VDD_EN
*/
gpio = <&gpio GPIOY_12 GPIO_ACTIVE_HIGH>;
enable-active-high;
/* U16 RT9179GB */
vin-supply = <&vddio_ao3v3>;
};
tf_io: gpio-regulator-tf_io {
@@ -77,8 +104,10 @@
gpios = <&gpio_ao GPIOAO_3 GPIO_ACTIVE_HIGH>;
gpios-states = <0>;
states = <3300000 0
1800000 1>;
states = <3300000 0>,
<1800000 1>;
/* U12/U13 RT9179GB */
vin-supply = <&vddio_ao3v3>;
};
vcc1v8: regulator-vcc1v8 {
@@ -86,6 +115,9 @@
regulator-name = "VCC1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
/* U18 RT9179GB */
vin-supply = <&vddio_ao3v3>;
};
vcc3v3: regulator-vcc3v3 {
@@ -95,6 +127,36 @@
regulator-max-microvolt = <3300000>;
};
vddio_ao1v8: regulator-vddio-ao1v8 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO1V8";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
/* U17 RT9179GB */
vin-supply = <&p5v0>;
};
vddio_ao3v3: regulator-vddio-ao3v3 {
compatible = "regulator-fixed";
regulator-name = "VDDIO_AO3V3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
/* U11 MP2161GJ-C499 */
vin-supply = <&p5v0>;
};
ddr3_1v5: regulator-ddr3_1v5 {
compatible = "regulator-fixed";
regulator-name = "DDR3_1V5";
regulator-min-microvolt = <1500000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
/* U15 MP2161GJ-C499 */
vin-supply = <&p5v0>;
};
emmc_pwrseq: emmc-pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
@@ -126,10 +188,6 @@
phy-handle = <&eth_phy0>;
phy-mode = "rgmii";
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-active-low;
amlogic,tx-delay-ns = <2>;
mdio {
@@ -140,10 +198,14 @@
eth_phy0: ethernet-phy@0 {
/* Realtek RTL8211F (0x001cc916) */
reg = <0>;
reset-assert-us = <10000>;
reset-deassert-us = <30000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_15 */
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;
eee-broken-1000t;
};
};
};
@@ -167,6 +229,7 @@
status = "okay";
pinctrl-0 = <&hdmi_hpd_pins>, <&hdmi_i2c_pins>;
pinctrl-names = "default";
hdmi-supply = <&hdmi_p5v0>;
};
&hdmi_tx_tmds_port {
@@ -185,9 +248,10 @@
status = "okay";
pinctrl-0 = <&remote_input_ao_pins>;
pinctrl-names = "default";
linux,rc-map-name = "rc-odroid";
};
&pinctrl_aobus {
&gpio_ao {
gpio-line-names = "UART TX", "UART RX", "VCCK En", "TF 3V3/1V8 En",
"USB HUB nRESET", "USB OTG Power En",
"J7 Header Pin2", "IR In", "J7 Header Pin4",
@@ -197,7 +261,7 @@
"";
};
&pinctrl_periphs {
&gpio {
gpio-line-names = /* Bank GPIOZ */
"Eth MDIO", "Eth MDC", "Eth RGMII RX Clk",
"Eth RX DV", "Eth RX D0", "Eth RX D1", "Eth RX D2",
@@ -256,11 +320,14 @@
bus-width = <4>;
cap-sd-highspeed;
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
sd-uhs-ddr50;
max-frequency = <100000000>;
disable-wp;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_HIGH>;
cd-inverted;
cd-gpios = <&gpio CARD_6 GPIO_ACTIVE_LOW>;
vmmc-supply = <&tflash_vdd>;
vqmmc-supply = <&tf_io>;
@@ -274,7 +341,7 @@
pinctrl-names = "default", "clk-gate";
bus-width = <8>;
max-frequency = <100000000>;
max-frequency = <200000000>;
non-removable;
disable-wp;
cap-mmc-highspeed;
@@ -293,7 +360,7 @@
};
&usb0_phy {
status = "okay";
status = "disabled";
phy-supply = <&usb_otg_pwr>;
};
@@ -303,7 +370,7 @@
};
&usb0 {
status = "okay";
status = "disabled";
};
&usb1 {

View File

@@ -68,10 +68,6 @@
amlogic,tx-delay-ns = <2>;
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-active-low;
mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
@@ -80,6 +76,11 @@
eth_phy0: ethernet-phy@3 {
/* Micrel KSZ9031 (0x00221620) */
reg = <3>;
reset-assert-us = <10000>;
reset-deassert-us = <30000>;
reset-gpios = <&gpio GPIOZ_14 GPIO_ACTIVE_LOW>;
interrupt-parent = <&gpio_intc>;
/* MAC_INTR on GPIOZ_15 */
interrupts = <29 IRQ_TYPE_LEVEL_LOW>;

View File

@@ -21,6 +21,6 @@
phy-mode = "rmii";
snps,reset-gpio = <&gpio GPIOZ_14 0>;
snps,reset-delays-us = <0 10000 1000000>;
snps,reset-delays-us = <0>, <10000>, <1000000>;
snps,reset-active-low;
};

View File

@@ -46,8 +46,8 @@
gpios-states = <1>;
/* Based on P200 schematics, signal CARD_1.8V/3.3V_CTR */
states = <1800000 0
3300000 1>;
states = <1800000 0>,
<3300000 1>;
regulator-settling-time-up-us = <10000>;
regulator-settling-time-down-us = <150000>;
@@ -165,11 +165,14 @@
bus-width = <4>;
cap-sd-highspeed;
max-frequency = <100000000>;
max-frequency = <50000000>;
non-removable;
disable-wp;
/* WiFi firmware requires power to be kept while in suspend */
keep-power-in-suspend;
mmc-pwrseq = <&sdio_pwrseq>;
vmmc-supply = <&vddao_3v3>;

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