Simon Glass 0450e91c38 rockchip: Ensure memory size is available in RK3399 SPL ...

At present gd->ram_size is 0 in SPL, meaning that it is not possible to
enable the cache. Correct this by always populating the RAM size
correctly.

This increases code size by about 500 bytes in SPL, since it must call
the rather large rockchip_sdram_size() function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>

2024-08-05 12:17:01 -06:00

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Merge branch 'qcom-main' of https://gitlab.denx.de/u-boot/custodians/u-boot-snapdragon

2024-07-26 07:49:36 -06:00

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dm: use list_count_nodes() for counting list nodes

2024-07-31 09:54:53 +02:00

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Merge patch series "led: implement software blinking"

2024-07-30 14:31:24 -06:00

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Merge patch series "Endian Kconfig improvements"

2024-07-31 11:18:43 -06:00

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Merge branch 'qcom-main' of https://gitlab.denx.de/u-boot/custodians/u-boot-snapdragon

2024-07-26 07:49:36 -06:00

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power: regulator: qcom-rpmh-regulator: add build infra

2024-07-26 01:28:13 +02:00

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rockchip: Ensure memory size is available in RK3399 SPL

2024-08-05 12:17:01 -06:00

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