Jagan Teki c016525858 clk: rockchip: rk3328: Handle usb480m phy clock ...

Handle USB480M clock ID in set_rate() and set_parent()
to allow the dt assigned-clocks and assigned-clock-parents
work on rk3328.dtsi

Cc: Lukasz Majewski <lukma@denx.de>
Cc: Sean Anderson <seanga2@gmail.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

2023-07-31 20:33:18 +08:00

..

clk_pll.c

clk: rockchip: pll: Add pll_rk3588 type for rk3588

2023-02-28 18:07:27 +08:00

clk_px30.c

clk: rockchip: correct trivial typo in debug message

2023-05-09 18:28:44 +08:00

clk_rk322x.c

clk: rockchip: correct trivial typo in debug message

2023-05-09 18:28:44 +08:00

clk_rk3036.c

clk: rockchip: correct trivial typo in debug message

2023-05-09 18:28:44 +08:00

clk_rk3066.c

rockchip: rk3066: add clock driver for rk3066 soc

2022-04-18 11:25:13 +08:00

clk_rk3128.c

rockchip: rk3128-cru: sync the clock dt-binding header from Linux

2022-12-19 10:56:12 +08:00

clk_rk3188.c

clk: rockchip: correct trivial typo in debug message

2023-05-09 18:28:44 +08:00

clk_rk3288.c

clk: rockchip: correct trivial typo in debug message

2023-05-09 18:28:44 +08:00

clk_rk3308.c

clk: rockchip: correct trivial typo in debug message

2023-05-09 18:28:44 +08:00

clk_rk3328.c

clk: rockchip: rk3328: Handle usb480m phy clock

2023-07-31 20:33:18 +08:00

clk_rk3368.c

clk: rockchip: correct trivial typo in debug message

2023-05-09 18:28:44 +08:00

clk_rk3399.c

clk: rockchip: correct trivial typo in debug message

2023-05-09 18:28:44 +08:00

clk_rk3568.c

rockchip: clk: clk_rk3568: Add CLK_PCIEPHY2_REF support

2023-07-28 18:45:03 +08:00

clk_rk3588.c

reset: rockchip: implement rk3588 lookup table

2023-05-17 17:36:18 +08:00

clk_rv1108.c

clk: rockchip: correct trivial typo in debug message

2023-05-09 18:28:44 +08:00

clk_rv1126.c

clk: rockchip: correct trivial typo in debug message

2023-05-09 18:28:44 +08:00

Makefile

clk: rockchip: Add rk3588 clk support

2023-02-28 18:07:27 +08:00