Judith Mendez 6067aa66b3 mmc: am654_sdhci: Add am654_sdhci_set_control_reg ...

This patch adds am654_sdhci_set_control_reg to am654_sdhci.

This is required to fix UHS_MODE_SELECT for TI K3 boards.

If any of HIGH_SPEED_ENA, V1P8_SIGNAL_ENA, UHS_MODE_SELECT
are set, then data will be launched on the pos-edge of the
clock.

Since K3 SoCs did not meet timing requirements for High Speed
SDR mode at rising clock edge, none of these three should be
set, therefore limit UHS_MODE_SELECT to only be set for modes
above MMC_HS_52.

This fixes MMC write issue on am64x evm at mode High Speed
SDR.

Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>

2025-04-24 10:44:52 -06:00

15 KiB

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