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Add support for building U-Boot for Cortex-M33 RSIP core in Renesas R-Car Gen5 R8A78000 X5H SoC. The main goal is to start U-Boot on the Cortex-M33 RSIP core, which initializes the hardware and then starts the Cortex-M33 SCP and Cortex-A720 cores which run the SCP firmware and applications software respectively. The SCP is responsible for platform resource management, and is used to start other CPU cores. The Cortex-M33 build contains its own r8a78000_ironhide_cm33_defconfig which configures the build for aarch32 instruction set compatible with the ARMv8M core. The build also uses -cm33 DT and -u-boot.dtsi which are derived from their non-CM33 counterparts, and add CM33 specifics. The arch/arm/mach-renesas/u-boot-rsip.lds is derived from generic arch/arm/cpu/u-boot.lds with adjustments to cater to the RSIP core, those are entrypoint before vectors, __data_start/__data_end symbols for data-only relocation, and placement of BSS into read-write SRAM area. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
9 lines
241 B
Plaintext
9 lines
241 B
Plaintext
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/*
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* Device Tree Source for the Ironhide CM33 board
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*
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* Copyright (C) 2026 Renesas Electronics Corp.
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*/
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#include "../../../dts/upstream/src/arm64/renesas/r8a78000-ironhide.dts"
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