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Add configuration for ARMv8-M aarch32 core, which are currently Cortex-M23/M33 cores. These cores are treated similar to ARMv7-M cores, except the code has to be compiled with matching compiler -march=armv8-m.main flag . These cores have no MMU, they have MPU, which is currently not configured. Unlike ARMv7-M, these cores have 512 interrupt vectors. While the SYS_ARM_ARCH should be set to 8, it is set to 7 because all of the initialization code is built from arch/arm/cpu/armv7m and not armv8. Furthermore, CONFIG_ARM64 must be disabled, although DTs for devices using these cores do come from arch/arm64/boot/dts. To avoid excess duplication in Makefiles, introduce one new Kconfig symbol, CPU_V7M_V8M. The CPU_V7M_V8M cover both ARMv7-M and ARMv8-M cores. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Acked-by: Udit Kumar <u-kumar1@ti.com>
129 lines
2.2 KiB
C
129 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* include/asm-arm/unified.h - Unified Assembler Syntax helper macros
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*
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* Copyright (C) 2008 ARM Limited
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*/
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#ifndef __ASM_UNIFIED_H
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#define __ASM_UNIFIED_H
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#if defined(__ASSEMBLY__) && defined(CONFIG_ARM_ASM_UNIFIED)
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.syntax unified
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#endif
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#ifdef CONFIG_CPU_V7M_V8M
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#define AR_CLASS(x...)
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#define M_CLASS(x...) x
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#else
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#define AR_CLASS(x...) x
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#define M_CLASS(x...)
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#endif
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#ifdef CONFIG_THUMB2_KERNEL
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#if __GNUC__ < 4
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#error Thumb-2 kernel requires gcc >= 4
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#endif
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/* The CPSR bit describing the instruction set (Thumb) */
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#define PSR_ISETSTATE PSR_T_BIT
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#define ARM(x...)
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#define THUMB(x...) x
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#ifdef __ASSEMBLY__
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#define W(instr) instr.w
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#else
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#define WASM(instr) #instr ".w"
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#endif
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#else /* !CONFIG_THUMB2_KERNEL */
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/* The CPSR bit describing the instruction set (ARM) */
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#define PSR_ISETSTATE 0
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#define ARM(x...) x
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#define THUMB(x...)
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#ifdef __ASSEMBLY__
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#define W(instr) instr
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#else
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#define WASM(instr) #instr
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#endif
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#endif /* CONFIG_THUMB2_KERNEL */
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#ifndef CONFIG_ARM_ASM_UNIFIED
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/*
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* If the unified assembly syntax isn't used (in ARM mode), these
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* macros expand to an empty string
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*/
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#ifdef __ASSEMBLY__
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.macro it, cond
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.endm
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.macro itt, cond
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.endm
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.macro ite, cond
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.endm
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.macro ittt, cond
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.endm
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.macro itte, cond
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.endm
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.macro itet, cond
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.endm
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.macro itee, cond
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.endm
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.macro itttt, cond
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.endm
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.macro ittte, cond
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.endm
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.macro ittet, cond
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.endm
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.macro ittee, cond
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.endm
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.macro itett, cond
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.endm
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.macro itete, cond
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.endm
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.macro iteet, cond
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.endm
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.macro iteee, cond
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.endm
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#else /* !__ASSEMBLY__ */
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__asm__(
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" .macro it, cond\n"
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" .endm\n"
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" .macro itt, cond\n"
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" .endm\n"
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" .macro ite, cond\n"
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" .endm\n"
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" .macro ittt, cond\n"
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" .endm\n"
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" .macro itte, cond\n"
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" .endm\n"
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" .macro itet, cond\n"
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" .endm\n"
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" .macro itee, cond\n"
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" .endm\n"
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" .macro itttt, cond\n"
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" .endm\n"
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" .macro ittte, cond\n"
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" .endm\n"
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" .macro ittet, cond\n"
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" .endm\n"
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" .macro ittee, cond\n"
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" .endm\n"
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" .macro itett, cond\n"
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" .endm\n"
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" .macro itete, cond\n"
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" .endm\n"
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" .macro iteet, cond\n"
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" .endm\n"
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" .macro iteee, cond\n"
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" .endm\n");
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#endif /* __ASSEMBLY__ */
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#endif /* CONFIG_ARM_ASM_UNIFIED */
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#endif /* !__ASM_UNIFIED_H */
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