arm: Add ARMv8-M aarch32 support

Add configuration for ARMv8-M aarch32 core, which are currently
Cortex-M23/M33 cores. These cores are treated similar to ARMv7-M
cores, except the code has to be compiled with matching compiler
-march=armv8-m.main flag . These cores have no MMU, they have MPU,
which is currently not configured.

Unlike ARMv7-M, these cores have 512 interrupt vectors. While the
SYS_ARM_ARCH should be set to 8, it is set to 7 because all of the
initialization code is built from arch/arm/cpu/armv7m and not armv8.
Furthermore, CONFIG_ARM64 must be disabled, although DTs for devices
using these cores do come from arch/arm64/boot/dts.

To avoid excess duplication in Makefiles, introduce one new Kconfig
symbol, CPU_V7M_V8M. The CPU_V7M_V8M cover both ARMv7-M and ARMv8-M
cores.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Udit Kumar <u-kumar1@ti.com>
This commit is contained in:
Marek Vasut
2026-03-30 01:14:12 +02:00
committed by Tom Rini
parent c8afe949d3
commit b0d731d956
15 changed files with 50 additions and 19 deletions

View File

@@ -531,7 +531,7 @@ UBOOTINCLUDE := \
-I$(srctree)/lib/mbedtls/external/mbedtls/include) \
$(if $(CONFIG_$(PHASE_)SYS_THUMB_BUILD), \
$(if $(CONFIG_HAS_THUMB2), \
$(if $(CONFIG_CPU_V7M), \
$(if $(CONFIG_CPU_V7M_V8M), \
-I$(srctree)/arch/arm/thumb1/include), \
-I$(srctree)/arch/arm/thumb1/include)) \
-I$(srctree)/arch/$(ARCH)/include \
@@ -1050,7 +1050,7 @@ UBOOTINCLUDE := \
-I$(srctree)/lib/mbedtls/external/mbedtls/include) \
$(if $(CONFIG_$(PHASE_)SYS_THUMB_BUILD), \
$(if $(CONFIG_HAS_THUMB2), \
$(if $(CONFIG_CPU_V7M), \
$(if $(CONFIG_CPU_V7M_V8M), \
-I$(srctree)/arch/arm/thumb1/include), \
-I$(srctree)/arch/arm/thumb1/include)) \
-I$(srctree)/arch/$(ARCH)/include \
@@ -1446,11 +1446,15 @@ quiet_cmd_copy = COPY $@
cmd_copy = cp $< $@
ifeq ($(CONFIG_OF_UPSTREAM),y)
ifeq ($(CONFIG_CPU_V8M),y)
dt_dir := dts/upstream/src/arm64
else
ifeq ($(CONFIG_ARM64),y)
dt_dir := dts/upstream/src/arm64
else
dt_dir := dts/upstream/src/$(ARCH)
endif
endif
else
dt_dir := arch/$(ARCH)/dts
endif

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@@ -363,7 +363,8 @@ config CPU_V7A
select SYS_CACHE_SHIFT_6
imply SYS_ARM_MMU
config CPU_V7M
# ARMv7-M/ARMv8-M
config CPU_V7M_V8M
bool
select HAS_THUMB2
select SYS_ARM_MPU
@@ -372,6 +373,10 @@ config CPU_V7M
select THUMB2_KERNEL
select NVIC
config CPU_V7M
bool
select CPU_V7M_V8M
config CPU_V7R
bool
select HAS_THUMB2
@@ -379,6 +384,10 @@ config CPU_V7R
select SYS_ARM_MPU
select SYS_CACHE_SHIFT_6
config CPU_V8M
bool
select CPU_V7M_V8M
config SYS_CPU
default "arm720t" if CPU_ARM720T
default "arm920t" if CPU_ARM920T
@@ -389,6 +398,7 @@ config SYS_CPU
default "armv7" if CPU_V7A
default "armv7" if CPU_V7R
default "armv7m" if CPU_V7M
default "armv7m" if CPU_V8M
default "armv8" if ARM64
config SYS_ARM_ARCH
@@ -402,6 +412,7 @@ config SYS_ARM_ARCH
default 7 if CPU_V7A
default 7 if CPU_V7M
default 7 if CPU_V7R
default 7 if CPU_V8M
default 8 if ARM64
choice
@@ -445,7 +456,7 @@ config ARCH_CPU_INIT
config SYS_ARCH_TIMER
bool "ARM Generic Timer support"
depends on CPU_V7A || CPU_V7M || ARM64
depends on CPU_V7A || CPU_V7M_V8M || ARM64
default y if ARM64
help
The ARM Generic Timer (aka arch-timer) provides an architected

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@@ -16,6 +16,7 @@ arch-$(CONFIG_CPU_V7A) =$(call cc-option, -march=armv7-a, \
$(call cc-option, -march=armv7))
arch-$(CONFIG_CPU_V7M) =-march=armv7-m
arch-$(CONFIG_CPU_V7R) =-march=armv7-r
arch-$(CONFIG_CPU_V8M) =-march=armv8-m.main
ifeq ($(CONFIG_ARM64_CRC32),y)
arch-$(CONFIG_ARM64) =-march=armv8-a+crc
else
@@ -42,6 +43,7 @@ tune-$(CONFIG_CPU_ARM1136) =
tune-$(CONFIG_CPU_ARM1176) =
tune-$(CONFIG_CPU_V7A) =-mtune=generic-armv7-a
tune-$(CONFIG_CPU_V7R) =
tune-$(CONFIG_CPU_V8M) =
tune-$(CONFIG_ARM64) =
# Evaluate tune cc-option calls now

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@@ -19,6 +19,9 @@
*/
int cleanup_before_linux(void)
{
if (!CONFIG_IS_ENABLED(LIB_BOOTM) && !CONFIG_IS_ENABLED(LIB_BOOTZ))
return 0;
/*
* this function is called just before we call linux
* it prepares the processor for linux
@@ -45,8 +48,9 @@ int cleanup_before_linux(void)
}
/*
* Perform the low-level reset.
* Perform the low-level reset. ARMv7M only.
*/
#if IS_ENABLED(CONFIG_CPU_V7M)
void reset_cpu(void)
{
/*
@@ -56,8 +60,10 @@ void reset_cpu(void)
| (V7M_SCB->aircr & V7M_AIRCR_PRIGROUP_MSK)
| V7M_AIRCR_SYSRESET, &V7M_SCB->aircr);
}
#endif
void spl_perform_arch_fixups(struct spl_image_info *spl_image)
{
spl_image->entry_point |= 0x1;
if (IS_ENABLED(CONFIG_XPL_BUILD))
spl_image->entry_point |= 0x1;
}

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@@ -11,7 +11,7 @@
#include <linux/bitops.h>
#endif
#ifdef CONFIG_CPU_V7M
#ifdef CONFIG_CPU_V7M_V8M
#define AP_SHIFT 24
#define XN_SHIFT 28
#define TEX_SHIFT 19

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@@ -12,7 +12,7 @@
.syntax unified
#endif
#ifdef CONFIG_CPU_V7M
#ifdef CONFIG_CPU_V7M_V8M
#define AR_CLASS(x...)
#define M_CLASS(x...) x
#else

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@@ -11,7 +11,7 @@ obj-$(CONFIG_$(PHASE_)LIB_BOOTI) += image.o
obj-$(CONFIG_$(PHASE_)LIB_BOOTZ) += zimage.o
obj-$(CONFIG_$(PHASE_)LIB_BOOTM) += bootm.o
ifdef CONFIG_CPU_V7M
ifdef CONFIG_CPU_V7M_V8M
obj-y += vectors_m.o crt0.o
else ifdef CONFIG_ARM64
obj-y += crt0_64.o
@@ -32,7 +32,7 @@ else
obj-y += relocate.o
endif
obj-$(CONFIG_CPU_V7M) += cmd_boot.o
obj-$(CONFIG_CPU_V7M_V8M) += cmd_boot.o
obj-$(CONFIG_OF_LIBFDT) += bootm-fdt.o
obj-$(CONFIG_CMD_BOOTM) += bootm.o
else
@@ -62,7 +62,7 @@ obj-y += sections.o
CFLAGS_REMOVE_sections.o := $(LTO_CFLAGS)
obj-y += stack.o
ifdef CONFIG_CPU_V7M
ifdef CONFIG_CPU_V7M_V8M
obj-y += interrupts_m.o
else ifdef CONFIG_ARM64
obj-$(CONFIG_FSL_LAYERSCAPE) += ccn504.o

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@@ -304,7 +304,7 @@ static void boot_jump_linux(struct bootm_headers *images, int flag)
void (*kernel_entry)(int zero, int arch, uint params);
unsigned long r2;
kernel_entry = (void (*)(int, int, uint))images->ep;
#ifdef CONFIG_CPU_V7M
#ifdef CONFIG_CPU_V7M_V8M
ulong addr = (ulong)kernel_entry | 1;
kernel_entry = (void *)addr;
#endif

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@@ -153,7 +153,7 @@ ENTRY(_main)
#endif
ldr r0, [r9, #GD_RELOC_OFF] /* r0 = gd->reloc_off */
add lr, lr, r0
#if defined(CONFIG_CPU_V7M)
#if defined(CONFIG_CPU_V7M_V8M)
orr lr, #1 /* As required by Thumb-only */
#endif
ldr r0, [r9, #GD_RELOCADDR] /* r0 = gd->relocaddr */

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@@ -10,7 +10,7 @@
#include <config.h>
#include <elf.h>
#include <linux/linkage.h>
#ifdef CONFIG_CPU_V7M
#ifdef CONFIG_CPU_V7M_V8M
#include <asm/armv7m.h>
#endif
@@ -26,7 +26,7 @@
WEAK(relocate_vectors)
#ifdef CONFIG_CPU_V7M
#ifdef CONFIG_CPU_V7M_V8M
/*
* On ARMv7-M we only have to write the new vector address
* to VTOR register.

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@@ -13,7 +13,7 @@ ENTRY(smh_trap)
#if defined(CONFIG_ARM64)
hlt #0xf000
#elif defined(CONFIG_CPU_V7M)
#elif defined(CONFIG_CPU_V7M_V8M)
bkpt #0xab
#elif defined(CONFIG_SYS_THUMB_BUILD)
svc #0xab

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@@ -52,6 +52,10 @@ ENTRY(_start)
.long __invalid_entry @ 13 - Reserved
.long __invalid_entry @ 14 - PendSV
.long __invalid_entry @ 15 - SysTick
.rept 255 - 16
#ifdef CONFIG_CPU_V7M
.rept 256 - 16
#else /* V8M / V8R */
.rept 512 - 16
#endif
.long __invalid_entry @ 16..255 - External Interrupts
.endr

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@@ -2101,7 +2101,7 @@ config BOOTP_PXE_DHCP_OPTION
config BOOTP_VCI_STRING
string
depends on CMD_BOOTP
default "U-Boot.armv7" if CPU_V7A || CPU_V7M || CPU_V7R
default "U-Boot.armv7" if CPU_V7A || CPU_V7M_V8M || CPU_V7R
default "U-Boot.armv8" if ARM64
default "U-Boot.arm" if ARM
default "U-Boot"

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@@ -11,11 +11,15 @@ DEVICE_TREE := unset
endif
ifeq ($(CONFIG_OF_UPSTREAM),y)
ifeq ($(CONFIG_CPU_V8M),y)
dt_dir := dts/upstream/src/arm64
else
ifeq ($(CONFIG_ARM64),y)
dt_dir := dts/upstream/src/arm64
else
dt_dir := dts/upstream/src/$(ARCH)
endif
endif
else
dt_dir := arch/$(ARCH)/dts
endif

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@@ -60,7 +60,7 @@ obj-$(CONFIG_EFI_DEVICE_PATH_TO_TEXT) += efi_selftest_devicepath.o
obj-$(CONFIG_EFI_UNICODE_COLLATION_PROTOCOL2) += \
efi_selftest_unicode_collation.o
ifeq ($(CONFIG_CPU_V7A)$(CONFIG_CPU_V7M)$(CONFIG_CPU_V7R),y)
ifeq ($(CONFIG_CPU_V7A)$(CONFIG_CPU_V7M_V8M)$(CONFIG_CPU_V7R),y)
obj-y += efi_selftest_unaligned.o
endif
obj-$(CONFIG_EFI_LOADER_HII) += efi_selftest_hii.o