mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2026-06-12 22:49:43 +03:00
The extcsd read target must be cache aligned in case the controller uses DMA to read the extcsd register, make it so. Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
26 KiB
26 KiB