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Update urclock/stk500 reset times and streamline DTR/RTS twiddling

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This commit is contained in:
Stefan Rueger
2023-03-15 19:42:54 +00:00
parent b1da0b0922
commit 2b04a2e4a7
3 changed files with 13 additions and 12 deletions
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8
src/arduino.c
View File

@@ -88,7 +88,13 @@ static int arduino_open(PROGRAMMER *pgm, const char *port) {
// This code assumes a negative-logic USB to TTL serial adapter
// Set RTS/DTR high to discharge the series-capacitor, if present
serial_set_dtr_rts(&pgm->fd, 0);
usleep(50 * 1000);
/*
* Long wait needed for optiboot: otherwise the second of two bootloader
* calls in quick succession fails:
*
* avrdude -c arduino -qqp m328p -U x.hex; avrdude -c arduino -qqp m328p -U x.hex
*/
usleep(250 * 1000);
// Pull the RTS/DTR line low to reset AVR
serial_set_dtr_rts(&pgm->fd, 1);
usleep(50 * 1000);

8
src/stk500.c
View File

@@ -98,15 +98,11 @@ int stk500_getsync(const PROGRAMMER *pgm) {
// Restart Arduino bootloader for every sync attempt
if (strcmp(pgm->type, "Arduino") == 0 && attempt > 0) {
// This code assumes a negative-logic USB to TTL serial adapter
// Set RTS/DTR high to discharge the series-capacitor, if present
serial_set_dtr_rts(&pgm->fd, 0);
usleep(50 * 1000);
// Pull the RTS/DTR line low to reset AVR
// Pull the RTS/DTR line low to reset AVR: it is still high from open()/last attempt
serial_set_dtr_rts(&pgm->fd, 1);
usleep(50 * 1000);
usleep(20*1000);
// Set the RTS/DTR line back to high
serial_set_dtr_rts(&pgm->fd, 0);
usleep(50 * 1000);
stk500_drain(pgm, 0);
}

9
src/urclock.c
View File

@@ -2240,16 +2240,15 @@ static int urclock_open(PROGRAMMER *pgm, const char *port) {
// This code assumes a negative-logic USB to TTL serial adapter
// Set RTS/DTR high to discharge the series-capacitor, if present
serial_set_dtr_rts(&pgm->fd, 0);
usleep(50 * 1000);
usleep(20*1000);
// Pull the RTS/DTR line low to reset AVR
serial_set_dtr_rts(&pgm->fd, 1);
usleep(50 * 1000);
usleep(20*1000);
// Set the RTS/DTR line back to high
serial_set_dtr_rts(&pgm->fd, 0);
usleep(50 * 1000);
if((70+ur.delay) > 0)
usleep((70+ur.delay)*1000); // Wait until board comes out of reset
if((100+ur.delay) > 0)
usleep((100+ur.delay)*1000); // Wait until board comes out of reset
pmsg_debug("%4ld ms: enter urclock_getsync()\n", avr_mstimestamp());
if(urclock_getsync(pgm) < 0)