Jon Lin
42196c12a1
rv1103b: usbplug-auto-merge: Update to v1.10
...
build from:
f9ecba2b rv1103b: Set gpio2a6 as auto_merge default cs1
update feature:
Set gpio2a6 as auto_merge default cs1.
Change-Id: I73c0d19b7449903411d171a2c57bf923e3cc3413
Signed-off-by: Jon Lin <jon.lin@rock-chips.com >
2024-09-29 16:40:21 +08:00
Jon Lin
ec7e04fb71
rv1103b: usbplug-auto-merge: Add code
...
build from:
a87eca5 configs: rv1103b-usbplug: Add code
update feature:
Support spi nor auto merge.
Change-Id: Ia46fc4eabdeb6099afb751f1dfb50d9a1bd46052
Signed-off-by: Jon Lin <jon.lin@rock-chips.com >
2024-09-25 18:02:19 +08:00
Jon Lin
5189cb1d89
rk3576: fspi1-usbplug: Update to v1.03
...
Build from u-boot:
4546bd092ab5 rk3576: Using eMMC iomux configuration in ROM progress
Build command:
./make.sh rk3576-usbplug
Update feature:
Support GPT backup.
Change-Id: I069acd72c461b6d80af0cf0ea261c59599272126
Signed-off-by: Jon Lin <jon.lin@rock-chips.com >
2024-09-18 21:55:08 +08:00
Wesley Yao
6a0c390ee5
rk3308: ddr: Update DDR bin to v2.09 20240906
...
Build from:
286df080e2 drivers: ram: rk3576: Scan max/min separately in rd_dqs_vref_training
Update feature:
d45546c806 dram_init: rk3308: Updata to v2.09
cda52f8bb0 drivers: ram: rk3308: Disable auto self refresh
9b8791b013 dram_init: common: poll USR.trans_fifo_not_full in uart_write
Change-Id: I519ac7a9759531b3a0ef426ddf81daf0d3122419
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com >
2024-09-18 09:41:03 +08:00
Jon Lin
8396d039bf
rk3308: miniloader: Update to v1.43
...
from commit:
6c04ae99 rk_boot_all
update feature:
Restore iomux after SD detect is invalid to avoid UART 2 M1 exception.
Change-Id: I47ed5b8b3a36caa5296ad61d01e2588712eb22e6
Signed-off-by: Jon Lin <jon.lin@rock-chips.com >
2024-09-18 09:21:50 +08:00
Xuhui Lin
a82ddeb199
rk3576: spl: update to v1.06
...
Build from u-boot:
8532be3569c ufs: rockchip: optimize the MPHY power detection mechanism
Build command:
./make.sh rk3576 --spl-new --spl-fwver v1.06
Some update features:
f2af0778915 rockchip: dts: rk3576: Remove prefetchable from pcie0
b9844a88884 rockchip: dts: rk3576: Add reset for ufs
53762fcc64d ufs: add ufs reset for spl and uboot
411dc86a027 arm: dts: rk3576: Define fspi max-dll
cdb92760954 clk: rockchip: rk3576: add ref_clkout_pll
dfe45d3e7e8 rockchip: fpga: Add SPL_FPGA_ROCKCHIP option
Change-Id: If88c729507f4a42df50754f8a34eb4ecd8bb0990
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com >
2024-09-13 15:12:49 +08:00
Yifeng Zhao
e9715eba45
rk3576: usbplug: update to v1.03
...
Build from u-boot:
8532be3569 ufs: rockchip: optimize the MPHY power detection mechanism
Build command:
./make.sh rk3576-usbplug
Update feature:
8532be3569 ufs: rockchip: optimize the MPHY power detection mechanism
febbdd176e rockusb: modify the erase protection of UFS
5460f593a5 ufs: rockchip: add controller reset
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com >
Change-Id: I6b21ccaee621406faf2c167fc39349b83d6c7901
2024-09-13 15:12:25 +08:00
Jon Lin
0121a0df8c
rk3308: loader: Update to v1.43
...
from commit:
6c04ae99 rk_boot_all
update fiture:
src: rockusb: RK3308 spinor idblock 2 copies
Change-Id: I46ca127a32c1c8bb61bdcafc1264d718c31aa414
Signed-off-by: Jon Lin <jon.lin@rock-chips.com >
2024-09-09 15:03:35 +08:00
Tang Yun ping
fd73dcf277
rk3566: ddr: update ddrbin to v1.23
...
build from:
03ea844c5d dram_init: rk356x: fix ddr4 detect bug
update feature:
1. Fixed probabilistic detection error of DDR type/capacity.
2. Added ddr type detection order configurable through ddrbin tool.
3. Fix ISSI UniIC lp4/lp4x driver strength issue.
Signed-off-by: Tang Yun ping <typ@rock-chips.com >
Change-Id: I3aececcd9f6fcf62b47f8d43d8fd5a4a246cf24b
2024-09-09 10:59:11 +08:00
Tang Yun ping
bd7f055ad3
rk3568: ddr: update ddrbin to v1.23
...
build from:
03ea844c5d dram_init: rk356x: fix ddr4 detect bug
update feature:
1. Fixed probabilistic detection error of DDR type/capacity.
2. Added ddr type detection order configurable through ddrbin tool.
3. Fix ISSI UniIC lp4/lp4x driver strength issue.
Signed-off-by: Tang Yun ping <typ@rock-chips.com >
Change-Id: Ib33eb3bb246a7e671a698dbd9ccdb887517423b3
2024-09-09 10:58:55 +08:00
Tang Yun ping
b9183559ca
rk3588: ddr: update ddr bin to v1.18
...
Build from:
9fa84341ce dram_init: rk3588: update tx eye margin
Update features:
1. Add dvfs/periodic training to improve write signal margin.
2. Support mixed package DRAM.
Warn:
BL31 should be update to V1.47 or above.
Signed-off-by: Tang Yun ping <typ@rock-chips.com >
Change-Id: I14928c3b33ab6a0468f1d4b150c0e7025f04d48b
2024-09-06 10:30:10 +08:00
Joseph Chen
3e5f2374e7
rk3506: RK3506BMINIALL: Add SPL boot params
...
Follow commit:
(088bac40aa rk3506: ddr/spl/tee: Update version to v1.xx)
Signed-off-by: Joseph Chen <chenjh@rock-chips.com >
Change-Id: I95c338004110e26b460e2feebc2ebe7e6f83def2
2024-09-05 16:21:32 +08:00
YouMin Chen
50942f0b05
rv1103b: ddr: update ddrbin to v1.04
...
build from:
ccb664bdcf dram_init: rv1103b: update ddrbin to v1.04
update feature:
1. Improve DDR stability.
Signed-off-by: YouMin Chen <cym@rock-chips.com >
Change-Id: Id682e3ea962b0896f3e9bfb9de1f37c80bdc99a9
2024-09-04 14:37:35 +08:00
Tang Yun ping
088bac40aa
rk3506: ddr/spl/tee: Update version to v1.xx
...
== ddr v1.01
Build from:
404a81a8bf rk3506: ddr: update ddrbin to v1.01
Update features:
1. set atags address to 0x62000.
2. To avoid damaging last_log data, do not check soldering during reboot.
== spl v1.10
Build from:
a106936cd3c rockchip: rk3506: Update memory layout
Update features:
1. set atags address to 0x62000.
2. Update text base addr to 0x3f00000
== tee v1.20
Build from:
6c78a7d8cb3 rk3506: Don't disable vccio4 IE by default
Update features:
1. set atags address to 0x62000.
2. Update text base addr to 0x1000
3. Improve stable for system suspend/resume.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com >
Signed-off-by: Tang Yun ping <typ@rock-chips.com >
Change-Id: I623586fa803944e72b2c77893d1a2320caf0d648
2024-09-03 10:02:57 +08:00
chenfen
570f82de3d
rk3326: miniloader: update to v1.40
...
build from:
9fa2a3da: rk3326: miniloader update to v1.40
update feature:
1. enable rk3326 pwm2-7 function.
Signed-off-by: chenfen <chenfen@rock-chips.com >
Change-Id: I1ec614b1f6a458c7afc13ea9986dbd264cf729c6
2024-09-02 18:23:42 +08:00
YouMin Chen
1c50c0381b
rv1103b: ddr: update ddrbin to v1.03
...
build from:
b991ae72ff dram_init: rv1103b: update ddrbin to v1.03
update feature:
1. set DQS_GATE_TRAIN_CTRL.dll_start_point to 0x8
2. fix isp mipi drop when 4M 60fps
3. setting for DDR power-saving
Signed-off-by: YouMin Chen <cym@rock-chips.com >
Change-Id: I57a5f0ab23aee0ca9fafb87356b09ddf64a081db
2024-08-29 14:44:38 +08:00
Jon Lin
26e53571c2
rk3308: loader: Add spinor only version
...
from commit:
e24e370a src: rockusb: RK3308 spinor idblock 2 copies.
update feature:
Add spinor only version.
Change-Id: I54c63ebf68660e31eb165eb55cc2fda09f8ee906
Signed-off-by: Jon Lin <jon.lin@rock-chips.com >
2024-08-27 10:02:25 +08:00
Liang Chen
cbbc686822
rk3576: RK3576MINIALL: enable 1.0GHz for arch_timer
...
Signed-off-by: Liang Chen <cl@rock-chips.com >
Change-Id: Id9c446c49b7bb015cce0788a0751ce002410529a
2024-08-21 09:33:07 +08:00
Zhihuan He
0106e253c2
rk3326: ddr: Update to DDR 20240819 fwver: v2.11
...
build in:
01f75b4 rk3326/px30: ddr: Update to DDR 20240819 fwver: v2.11
update feature:
0a8027c RK3326/RK3326S: fix ddr4 cap detect error
Signed-off-by: Zhihuan He <huan.he@rock-chips.com >
Change-Id: I15acef72f65b659e4ad1ffc6bf33907fc92aaa8d
2024-08-19 11:31:18 +08:00
Zhihuan He
cfafd41872
px30: ddr: Update to DDR 20240819 fwver: v2.11
...
build in:
01f75b4 rk3326/px30: ddr: Update to DDR 20240819 fwver: v2.11
update feature:
0a8027c RK3326/RK3326S: fix ddr4 cap detect error
Signed-off-by: Zhihuan He <huan.he@rock-chips.com >
Change-Id: I23d8e4d553df7d4275410cdf9fac0f9c8d18af5b
2024-08-19 11:28:45 +08:00
Lin Jianhua
1461c47dba
RK3036: RK3036MINIALL_SLC: use uart0 ddr bin
...
Change-Id: I3e1e1d44d58b2d557873410e1200fa894b9b7cb9
Signed-off-by: Lin Jianhua <linjh@rock-chips.com >
2024-08-16 15:33:19 +08:00
Jon Lin
25c81ddde8
rk3308: usbplug: Update version to v1.43
...
from commit:
e24e370a src: rockusb: RK3308 spinor idblock 2 copies
update feature:
RK3308 spinor idblock 2 copies.
Change-Id: I50e1af109791e8fe499aaf5740fcd148a2015221
Signed-off-by: Jon Lin <jon.lin@rock-chips.com >
2024-08-16 12:03:56 +08:00
Tang Yun ping
0d8adcb05f
rk3562: ddr: update ultra ddrbin to v1.06
...
build from:
33ea841185 rk3562: ddr: add DDR4 Ultra suspend support
build command:
export DRAM_ULTRA_SUSPEND=Y && ./make.sh rk3562
update feature:
Add ddr4 ultra suspend susport
Signed-off-by: Tang Yun ping <typ@rock-chips.com >
Change-Id: I80af1ca309831adbcf3c9771387863fff32d82f5
2024-08-13 19:54:39 +08:00
Tang Yun ping
7a1c213221
rk3506: ddr: add rk3506b support
...
build from:
8bd2e95bb9 rk3506: ddr: update ddrbin to v1.00
build command:
./make.sh rk3506
update feature:
Add RKBOOT/RK3506BMINIALL.ini for rk3506b
Signed-off-by: Tang Yun ping <typ@rock-chips.com >
Change-Id: I284198b9f89a03b7dd07a916240b76a78b3bf3af
2024-08-07 15:06:25 +08:00
Jon Lin
956c94c2ba
rk3308: loader: Update to v1.42
...
from commit:
0494fdae src: spinand: Support new device GSS01GSAM0
update feature:
Support new SPI flash.
Change-Id: Ib8dcb7b717483f318c007681b138dae59d0763eb
Signed-off-by: Jon Lin <jon.lin@rock-chips.com >
2024-08-07 11:26:44 +08:00
Jian zheng
33c076a6e7
rv1103c: add RV1103BMINIALL_FASTBOOT_SPI_NOR_SPI_NAND.ini
...
Signed-off-by: Jian zheng <zj@rock-chips.com >
Change-Id: I447e74ed26ed2a6d8200a780af2ff359a44b7d1b
2024-08-07 11:26:25 +08:00
Weiwen Chen
8fc4cc426d
rv1103b: RKBOOT: rename RV1103BMINIALL_SPI_NOR_SPI_NAND_TB.ini
...
Signed-off-by: Weiwen Chen <cww@rock-chips.com >
Change-Id: If453c7ca5f5704526f418a623a645c715ad29de4
2024-08-05 17:07:43 +08:00
Weiwen Chen
bf20d2f787
rv1103b: RKBOOT: add RV1103BMINIALL_FASTBOOT_EMMC.ini
...
Signed-off-by: Weiwen Chen <cww@rock-chips.com >
Change-Id: I2dcf3ecbbf59b654dc534016b08fdc1bd239fcf0
2024-08-05 17:07:43 +08:00
Weiwen Chen
00d3754ccc
rv1103b: RKBOOT: add RV1103BMINIALL_EMMC_TB.ini
...
Signed-off-by: Weiwen Chen <cww@rock-chips.com >
Change-Id: I06a664b3cdf57816d5cefd986bda49174f029ccc
2024-08-05 17:07:43 +08:00
Zhihuan He
43f2abf7bc
rk3036: ddr: ddr init code update to v1.10
...
form commit:
25df035 rk3036: ddr: update to 20240801 fwver v1.10
update feature:
e4dcdd3 rk3036: ddr: fix ddr2 wr odt latency err
8defd12 rk3036: ddr: fix bw 16 detect err
ccdeab7 rk3036: ddr: add support x8 bw
c8250c7 rk3036: ddr: add PLL power down and up
Change-Id: I8e130a75dfda023beb1be6add001fb1c341ed5ce
Signed-off-by: Zhihuan He <huan.he@rock-chips.com >
2024-08-05 09:46:20 +08:00
Jkand Huang
a8c5eaeb05
rv1103B: RKBOOT: add RV1103BMINIALL_UART0M2_SPI_NOR_SPI_NAND.ini
...
Signed-off-by: Jkand Huang <jkand.huang@rock-chips.com >
Change-Id: Id61fb6b411fc8bd26089c45ce3dde6719e37bb66
2024-08-01 09:49:22 +08:00
Wesley Yao
55daf3d712
rk3576: ddr: Update to v1.06 20240727
...
Build from:
a6303af65c dram_init: rk3576: Updata to v1.06
Update feature:
1f4bed6cd5 dram_init: dram_scan_eye: Add JEDEC Rx Mask for scan_eye
460fd2cd00 drivers: ram: rk3576: Use read_training to do rd_dqs_vref_training
61434c2f84 dram_init: rk3576: set PMU1_GRF_SOC_CON7.uart0rx_low_dly to 1 second
c7e65f408b dram_init: rk3576: ultra suspend support mixed package
376adcf740 drivers: ram: sdram_rk3588: Support mixed package
849f6ada3e dram_init: rk3576: ultra suspend: clear PMIC PWRCTRL1_FUN
9b8791b013 dram_init: common: poll USR.trans_fifo_not_full in uart_write
Change-Id: I877fcb6296dc097e2bbd42c61fb34bada05e5c75
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com >
2024-07-30 10:58:23 +08:00
Xuhui Lin
6ff2322cdf
rv1103b: ddr/spl/usbplug/mcu: Add initial version
...
== ddr v1.02
build from:
1b742cd9d6 dram_init: rv1103b: Update to v1.02
update feature:
51afcca2a0 dram_init: rv1103b: modify uart baudrate
4391b15f69 dram_init: rv1103b: add support DDR2 burst length 4
0b0c03b84a dram_init: rk2118: modify trfc if frequency is less than 400MHz
== spl v1.00
build from:
3687236ab1c spi: rockchip_sfc: Support sclk_x2_bypass
== usbplug v1.00
Build from:
c53c564 src: platform: rv1103b: modify chip name to RV110E
== rv1103b: Add UART0_M2_SPI_NOR_TB configuration
== rv1103b_mcu_tb_v1.00.bin:
build from commit:
rtt:3143c22c#hal:939ec3d5#battery_ipc:06ccc158
build from rt-thread commit in develop branch:
3143c22c: project: rv1103b-mcu: add mkimage.sh
build from hal commit in for-fpga branch:
939ec3d5: project: rk3506-mcu: Remove unneed code and switch to UART4
build from battery-ipc commit in master branch:
06ccc15: first frame params config for 1103b
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com >
Signed-off-by: YouMin Chen <cym@rock-chips.com >
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com >
Signed-off-by: Su Yuefu <yuefu.su@rock-chips.com >
Change-Id: I7ab3c5531b6efa445f672b37f8a52a25f27bbced
2024-07-29 21:16:23 +08:00
Xuhui Lin
ec5f4cbb48
rk3506: ddr/spl/usbplug/tee: Add initial version
...
== ddr v1.00
Build from:
8bd2e95bb9 rk3506: ddr: update ddrbin to v1.00
== spl v1.00
Build from:
c80444b1e9a TEMP: Disable sd card for rk3506
== usbplug v1.00
Build from:
b9b1493 src: platform: rk3506: fix emmc clock error.
== tee v1.00
Build from:
1bfd9b50333 scripts: build_optee_os: Add FW_VERSION_PRINT
Change-Id: I84f22433390e818f47bd7496a40b6d44c0bce48a
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com >
2024-07-29 20:59:57 +08:00
Zhihuan He
d04ca72fb1
rk3528: ddr: update ddrbin to v1.10
...
build from:
44ec2e0a51 dram_init: rk3528: Update to v1.10
update feature:
50ac41ccf3 rk356x: ddr: fix osreg encode bug
2a8512e9eb rk356x: add Manufacturer ID print
0cebc08d48 rk356x: ddr: disable vref training below 600MHz
063d9bffdd DDR4: spec: enable MR2.LPASR saving self-refresh power
Change-Id: I65425646382782a7689b3769e7c1b303df4c84b3
Signed-off-by: Zhihuan He <huan.he@rock-chips.com >
2024-07-29 20:59:57 +08:00
Tang Yun ping
bed3387826
rk3562: ddr: update ddrbin to v1.06
...
build from:
a2efbe6ac4 dram: adjust version format
build command:
./make.sh rk3562
update feature:
1. fix probabilistic read/write training failures under DDR4 2cs
introduced in ddrbin v1.06
2. Undo vref training below 600MHz
3. The CLK/DQS slew rate supports different values at high and low frequencies.
4. Added DRAM Manufacturer ID printing.
5. DDR4 enable LPASR to reduce DDR4 self-refresh power.
Signed-off-by: Tang Yun ping <typ@rock-chips.com >
Change-Id: I405a7505d81df18baea2abf8abcd8d2d9ce5785a
2024-06-28 15:12:47 +08:00
Tang Yun ping
78360f0942
rk3568: ddr: update ddrbin to v1.22
...
build from:
f8ac117e9c rk356x: ddr: fix eyescan build fail
build command:
./make.sh rk3568
update feature:
1. fix probabilistic read/write training failures under DDR4 2cs
introduced in ddrbin v1.21.
2. Fixed some DRAM compatibility issues at LP4x low frequency.
3. Undo vref training below 600MHz
4. The CLK/DQS slew rate supports different values at high and low frequencies.
5. Added DRAM Manufacturer ID printing.
6. DDR4 enable LPASR to reduce DDR4 self-refresh power.
Signed-off-by: Tang Yun ping <typ@rock-chips.com >
Change-Id: I262c513bfcae188c4a6469a4c1c45bd7428e186a
2024-06-28 15:12:47 +08:00
Tang Yun ping
cf34822750
rk3566: ddr: update ddrbin to v1.22
...
build from:
f8ac117e9c rk356x: ddr: fix eyescan build fail
build command:
./make.sh rk3568
update feature:
1. fix probabilistic read/write training failures under DDR4 2cs
introduced in ddrbin v1.21.
2. Fixed some DRAM compatibility issues at LP4x low frequency.
3. Undo vref training below 600MHz
4. The CLK/DQS slew rate supports different values at high and low frequencies.
5. Added DRAM Manufacturer ID printing.
6. DDR4 enable LPASR to reduce DDR4 self-refresh power.
Signed-off-by: Tang Yun ping <typ@rock-chips.com >
Change-Id: I0977c713416a3614ec1b22f40cfb7ba9dbaa188c
2024-06-28 15:12:47 +08:00
Xuhui Lin
13d2874ded
rk3576: spl: update to v1.05
...
Build from u-boot(next-dev):
884f049582f rockchip: spl, usbplug: Add OS_REG0 write or clear support
Build command:
./make.sh rk3576 --spl-new --spl-fwver v1.05
Update feature:
Add spl write OS_REG0 support.
Change-Id: I5821dd52975847afd35fbdf40c289fc4e02175de
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com >
2024-06-26 16:51:53 +08:00
Xuhui Lin
c8fb3bfd21
rk3576: usbplug: update to v1.02
...
Build from u-boot(next-dev):
0fe85c2474 mtd: spinand: print flash id information
Build command:
./make.sh rk3576-usbplug
Update feature:
Add usbplug clear OS_REG0 support.
Change-Id: Ic230ed55350fd3b0bf5a7185ed0d3815b6a039d8
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com >
Signed-off-by: Jon Lin <jon.lin@rock-chips.com >
2024-06-19 18:58:18 +08:00
Wesley Yao
e5a15adec8
rk3576: ddr: Update to v1.05 20240617
...
Build from:
da1087e33f dram_init: rk3576: Updata to v1.05
Update feature:
a43f4e75d1 dram_init: rk3576: ensure VOP bandwidth in extreme situations
486ac1798e drivers: ram: sdram_rk3588: ......
1c3e8c77d2 drivers: ram: sdram_rk3588: Add 1 to x1024 timing
Change-Id: Ia1583d9b9d977aa4ca55180eb1fcdb824fb9e26f
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com >
2024-06-17 14:18:04 +08:00
Xuhui Lin
e232d547c1
rk3568: spl: Update version to v1.14
...
Build from:
606f72bd97a video/drm: vop2: add te config for mipi cmd mode in rk3562
Update features:
5ddf1f49b71 drivers: mmc: rockchip_dw_mmc: set default sample phase for initializate
0953e389873 dw-mmc: spl: modify the timeout for reading data to 50ms
57b8ceed1c3 mmc: rockchip_dw_mmc: Fix compile error
b512fec4ea9 mmc: rockchip_dw_mmc: Add internal phase support
3e4b5e88701 mmc: dw_mmc: add card detect by DWMCI_CDETECT
de03e0e0d1d clk: rockchip: Extend pll timeout value
05891810f6d rockchip: dts: add pinctrl support for spl
2285b68d280 lib: rsa: Add burn-key-hash flag check
9b9c232a050 drivers: crypto: v2: fix switch case fallthrough
3afc76530fc clk: rockchip: fix the 32-bit may overflow
f38030747b8 common: spl_ab: Update slot_set_unbootable from U-Boot
a0f322f5407 dw_mmc: add a delay before reset controller
e09ef32e9e8 mmc: send stop command when tuning error occurs
b77c257eaed lib: rsa: Add support for rsa key repair
Change-Id: I98fc387db187728ce658dce46b7511bed62e59c7
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com >
2024-05-30 16:28:31 +08:00
Wesley Yao
3175505f1f
rk3576: ddr: Update to v1.04 20240528
...
Build from:
27ded95582 dram_init: rk3588: set t_refi_x1_sel=1 when per-bank refresh enable
Update features:
27ded95582 dram_init: rk3588: set t_refi_x1_sel=1 when per-bank refresh enable
150b0a9e1f dram_init: rk3576: Updata to v1.04
4e4f99b482 dram_init: rk3576: config CNTFRQ_EL0 according to the OSC frequency
e071b977b0 Revert "rk3588: ddr: fixed DERATEINT.mr4_read_interval configuration"
27a3c08b05 dram_init: rk3576: fix the tag_ddr_mem error when cs0_row less than cs1_row
20b0fabfa9 dram_init: rk3576: fix ultra suspend error by modify the resume flow
bf0c0a13ec drivers: ram: rk3576: Disable auto clk stop when pd/sr_idle disable
e1bff7719a drivers: ram: rk3576: Modify CTRL_OFFSET_DQ before read training
7dd6853eb2 drivers: ram: sdram_rk3588: Modify the calc of rddata_en (tTOT)
c619ebf7a3 drivers: ram: sdram_rk3588: Print eye_scan resluts of all channels
110186f7c9 dram_init: dram_scan_eye: Store real vref in result
c54cbb7162 dram_init: dram_scan_eye: Set tt_err if def setup memtest fail
c672e6e73c drivers: ram: sdram_rk3588: Fix CS1 addr in eye_scan
b28d838a92 drivers: ram: rk3576: fix the error of pclk_ddr during DMC initialization
3c42a42383 drivers: ram: rk3588: avoid the change of dfi_init_complete single during DLL lock
Change-Id: I4ce7b37308e3288e781ca265defe478391d06e46
Signed-off-by: Wesley Yao <wesley.yao@rock-chips.com >
2024-05-28 18:16:48 +08:00
Zhihuan He
030c9f9e0d
rk3288: ddr: update ddr bin to DDR 20240527 fwver: v1.12
...
build in:
c9991c2 rk3288: update DDR 20240527 fwver: v1.12
update feature:
30829bb rk3288: ddr fix 194MHz DQ/DQS phase not suitable
10b27fc project: move project to Arm Development Studio IDE
Signed-off-by: Zhihuan He <huan.he@rock-chips.com >
Change-Id: I0c5b8fe4f77a1568c2672a053e2ab1702bf56076
2024-05-28 14:30:10 +08:00
chenfen
7e38d7bccd
rk3576: boost: update boost bin to v1.02
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build from:
85a3a9ac98 rk_boost: rk3576: update to v1.02
update feature:
1. Close uart print.
Signed-off-by: chenfen <chenfen@rock-chips.com >
Change-Id: I78edd60641cdf5bed8ac64f32ede70bfc7315457
2024-05-27 14:37:17 +08:00
Zhihuan He
5579d203ec
px30: ddr: Update to DDR 20240527 fwver: v2.10
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build in:
29a6ff7 rk3326/px30: ddr: Update to DDR 20240527 fwver: v2.10
update feature:
1b9746b RK3326/RK3326S: add sram base judge
23b4b9a rk3326s/px30s: set cke low before clk for lp3
Signed-off-by: Zhihuan He <huan.he@rock-chips.com >
Change-Id: Idc674e20d57d332928b73dc34ce0c08f6e66e858
2024-05-27 09:50:38 +08:00
Zhihuan He
82b38c4dd9
rk3326: ddr: Update to DDR 20240527 fwver: v2.10
...
build in:
29a6ff7 rk3326/px30: ddr: Update to DDR 20240527 fwver: v2.10
update feature:
1b9746b RK3326/RK3326S: add sram base judge
23b4b9a rk3326s/px30s: set cke low before clk for lp3
Signed-off-by: Zhihuan He <huan.he@rock-chips.com >
Change-Id: Ic862b16426975123e70441b53dd38029f36ccac6
2024-05-27 09:50:38 +08:00
Xuhui Lin
4fa2c94bef
rk3576: spl: Update version to v1.04
...
Build from U-Boot commit:
3e169ed6d1d dvfs: rockchip_wtemp_dvfs: Check clk_set_rate() before updating voltage
update feature:
04d08ecebbb misc: rockchip decompress: fix RK3576 not support LZ4
8b42c3da266 lib: lz4: Don't bail fail message when no hw decomp device
b2ea6a555cb dts: rockchip: rk3576: the power_en for SD control by the controller
f88a10fc5de dw_mmc: add default power enable config value for rk3576
0953e389873 dw-mmc: spl: modify the timeout for reading data to 50ms
Change-Id: Ie36ea2cbf23eb29950beceacd2a1a400eb9131ce
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com >
2024-05-21 16:31:46 +08:00
Jon Lin
01c0644f4e
rk3036: loader: Update to v2.65
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build from:
5ea1119 src: flash: Filter FE FE flash id
update feature:
Filter wrong flash id
Change-Id: I4aa7791b57d9d39b0fd6f150a534350ee468b7e4
Signed-off-by: Jon Lin <jon.lin@rock-chips.com >
2024-05-07 14:32:55 +08:00
Xuhui Lin
4011aecd89
rk3576: spl: Update version to v1.03
...
Build from:
e53b21c53e6 gpt: re-alloc gpt header buffer for ufs device
Change-Id: I9d5cae00ce1b0317d4469636c4a5d6a535dde67a
Signed-off-by: Xuhui Lin <xuhui.lin@rock-chips.com >
2024-04-30 16:34:51 +08:00