Build from OPTEE commit in develop-next branch:
9f2aca7d1 pta: uboot_storedata_otp: reinit ssk when set security level2
Update features:
9f2aca7d1 pta: uboot_storedata_otp: reinit ssk when set security level2
d038af9d2 pta: uboot_storedata_otp: add check for rpmb key
679d5bd8f core: tee: add func for check rpmb key is written
9be174551 rockchip: uart: Add real uart hw init
6b3714286 Revert "libcrypto: set RSA OAEP MGF1 MD function to SHA1"
6b9b39300 ta.mk: not copy lib/libcrypto/include to host_include
0ca603d39 plat-rockchip: modify conditions for read secure boot flag
fd6b94676 plat-rockchip: vendor_props: fix xtest regression_1006 fail
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: Ibb3e8563fb713a0d5a19ea3072dd22fa3f47296e
Build from ATF commit:
46064b2d5 plat: px30: dram: support 2x/4x refresh for
Extended temperature range
update feature:
46064b2d5 plat: px30: dram: support 2x/4x refresh for
Extended temperature range
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I8237068a156b808f4dcb5a1e99629ccbb9ab89e0
Build from OPTEE commit in develop-next branch:
b5340fd65 rk3528: init hdcp key when bringup
Update features:
b5340fd65 rk3528: init hdcp key when bringup
bcabf953b pta: crypto_service: modify param check in oem otp key cipher
feccaa485 pta: uboot_storedata_otp: support check ta encryption key is written
9e41a3f1e pta: uboot_storedata: support set and get security flag
2e4ec1697 drivers: hal_crypto: fixed CRYPTO crash when using dynamic shared memory
64d17e36f pta: crypto_service: added the address parameter security check
74c6116b9 rk3326: enable user clk before user read
7b8c9847b pta: uboot_storedata_otp: enable kernel read secure boot flag
84db04157 pta: uboot_storedata_otp: enable kernel read vboot key hash
597e4214d core: main: register ddr to enable dynamic SHM
66a458730 core: lpae: increase PGT_CACHE_SIZE when define CFG_WITH_LPAE
ec7e85d54 plat-rockchip: support pstore for optee log
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: Ibec8212499b4fc06b41e429fa7370bd307bc7390
Build from ATF commit:
0152b20d0 plat: px30: add amp support
update feature:
0152b20d0 plat: px30: add amp support
227fafce7 rockchip: gicv2: add functions for amp
098982bcc plat: px30: use common gicv2 save/restore function
1cd72fefa rockchip: fiq-debugger: support separate stack for os callback
05d32f7ef plat: rockchip: scmi: Add struct scmi_clock_t args to callbacks
4a8ea5e6d rockchip: add gicv2 save/restore function
946bbd849 plat: px30: sleep: support to use pll-deep-mode
74005d5d9 plat: px30: sleep: set pmu's count by actual pvtm's frequency
Change-Id: Id3e631a70eaf9b16f2495bedba94807e66f8f37e
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Build from ATF commit:
6f45bba91 plat: px30: do second reset if rbrom in px30s
update feature:
6f45bba91 plat: px30: do second reset if rbrom in px30s
99f86f801 plat: px30: disable reset out if reboot normal
8932810e4 plat: px30: resolve misjudgments about reboot_flag
ad0d2e72c plat: px30: compatible with the old loader
01ab909ae rockchip: support plat_bl31_inner.ld.S
Change-Id: Iaa339cb0b89c642a36f21b096a0f789d1a172221
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Build from OPTEE commit in develop-next branch:
d84087907 plat-rockchip: main: not call rk_uart_init if rk_atags disable serial
Update features:
d84087907 plat-rockchip: main: not call rk_uart_init if rk_atags disable serial
3e2bbe510 rk3326: set user dctrl before key reader init
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I521b9954fa190355bb0e1fc192696eb69ada6095
Build from OPTEE commit in develop-next branch:
3e2bbe510 rk3326: set user dctrl before key reader init
Update features:
3e2bbe510 rk3326: set user dctrl before key reader init
87d94c5ef plat-rockchip: main: support hdcp key init via tee_entry_fast
0af3483b2 pta: crypto_service: support user ta call hard cipher
778974be4 core: tee: calculate node hash with meta default
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: I85ab6c4019c977ac2706100992f47752e2bf67df
Build from ATF commit:
edf5c3fbb plat: px30-s:workaround LP3 can not open cs1 odt in wr train
Update feature:
edf5c3fbb plat: px30-s:workaround LP3 can not open cs1 odt in wr train
05922004b plat: px30-s: suspend: remove ddr_sr_fix_clk_phase() func
c088d3cc9 plat: px30-s: dram: remove phy dfi low power set
aa70ad066 plat: px30: don't init stimer1 if stimer1 is enabled
2877a2c9e plat: px30: support vdd_log off in suspend
Signed-off-by: Zhihuan He <huan.he@rock-chips.com>
Change-Id: I0436f3141234820fd31f959f122b1db1cd60d746
Build from OPTEE commit in develop-next branch:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
Update features:
4167319d3 core: tee: recreate dirf.db if open dirf.db fail
b61fa300d scripts: commit_bin: intercept the first 8 characters for LAST_CM
8e053a881 rockchip: remove duplicate definitions for toybrick seed
91c4147e7 pta: crypto_service: change some return code to be accurate
3167e3733 drivers: rockchip: hal_crypto: mask lockstep interrupt
3f0f0b052 pta: support check oem otp key is written
9af9076b0 rockchip: sys_ctrl: move sys ctrl code to common/ dir
48b7c13e2 pta: uboot_storedata_otp: modify parameter check
65daed964 pta: crypto_service: support oem otp key phys cipher
7a0581630 scripts: commit_bin: support more platforms
f5add58be core: TEE_GenerateKey support RSA key e = 3
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Change-Id: Icafc92b96494b0005a9663578b240b817c5a2bac
Build from optee commit in develop-next branch:
7b4275734 rockchip: sip: add share mem page type define
Update feature:
1. Update OP-TEE version to V3.13.0
2. Add build user info in boot up log
Change-Id: I41948d0538306cdfd1165344f5a747474a2397bc
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop-next branch:
82765277 rk3326 & rk3308: otp: fixed addr error in rk_otp_ns_buf_read
Update feature:
60116db2 console_init: close serial only rely on t->u.serial.enable
0b0a7989 drivers: rockchip: fix compile error on rk1808 and rk3308
Change-Id: Ia887c4578e052a6a22fa85fe24e39906559deff0
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop-next branch:
85f8d2dd static ta: add support write data from user ta
Update feature:
fc24de3f Revert "plat-rockchip: drop align_malloc.c and align_malloc.h"
e65714d1 core: lib: libtomcrypt: mpi_desc: add shift_right function
4a49d838 core: ltc: rsa: fix bug on add algorithms below
Change-Id: I36b4074544adbbcffc4cbb9400716b6e0a73bcd8
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Forgot to update it but it actually makes no effect since
trust_merger parses the reall address from elf header.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I4b4e87c9a684b9f02e30b7ec84859e6493a09b13
Build from ATF commit:
ca3dd02 plat: px30: set all region as secure to all master
update feature:
ca3dd02 plat: px30: set all region as secure to all master
a9dd46e plat: px30: change bl31_base to 0x40000
31ff1d0 plat: rockchip: set "plat_uart_base=0" if uart disable
Change-Id: Ie0db861255ab5f0507ee91302ef23d9dbd175f70
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
Build from optee commit in develop-next branch:
02f0e5be static ta: do not return error if head.magic != TEE_SVC_STORAGE_MAGIC
Update feature:
c24aaddd rk1808: efuse: disable auto mode after R&W efuse
ec94b753 plat-rockchip: fix compile fail for vendor props
55bcc440 plat-rockchip: pta: add OS service pseudo ta
Change-Id: I42c127744c26e28bb60363e8a96a258873beb957
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from optee commit in develop-next branch:
959fbc63 ree fs: do nothing when truncate if file size unchanged
Update feature:
4ab0f33d static ta: return success if seed equal to read
d8225c98 static ta: add write Seed and read cpu id interface
bc2c6448 rk1808: support R&W public key hash in efuse
Change-Id: I52d102103f74f557d0bbf8b19c81075019422776
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from ATF commit:
6e39e59 plat: px30: change some debug info
update feature:
6e39e59 plat: px30: change some debug info
cba4b12 rockchip: svc: add CONFIG_DRAM_POST_SET_RATE sip call
b0cf3d1 rockchip: sram: add pmu_sram section defines
526676a rockchip: i2c: add i2c driver to common directory
c2b0155 plat: rockchip: move the function about dram spec timing to common
e1048e0 rockchip: console: enable/disable depends on atags serial
1f45fd9 rockchip: atags: compatible old preloader without atags support
a211ba1 plat: px30: use plat_uart_xxx to init console
ef42cbc plat: rockchip: support use preloader and kernel serial
f2cbed3 console: add console_simple_init() to initial console base addr
de92d92 plat: rockchip: add rk_atags support
36d01de plat: rockchip: move DIV_ROUND_UP to plat_private.h for common use
b275060 plat: px30: suspend: support pwm remotectl parse
e52f4a9 rockchip: move pwm_remotectl driver to public directory
43a2da1 rockchip: sip: allow SLT to access all memory region
9c6fa6a plat: px30: dfs: add support trigger dfs by vop intr
89a2d33 plat: px30: dfs: reduce the time of DCF wait dma finish
fc8ed34 plat: px30: dfs: update dcf code to V1.02
aebc56c plat: px30: dfs: set MSCH_DdrMode.MwrSize to zero
d964b6b rockchip: ddr_parameter: fix param layout description error
f9721cd plat: px30: dfs: compensate refresh for data_training
7dbdf27 plat: px30: dfs: reduce the execute time of data_training
dc2ca0e px30: pmu: fix compile error when not set DEBUG=1
Change-Id: I877b89a0fb142d9f1d063aca6ab4cb2dbc37590c
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
build from:
369430b2 rk_otp: add time out for key reader init
Update feature:
456caed4 rk1808: update version to 1.1
08bdb557 rk3308: update version to 1.1
007cca0f rk3326: update version to 1.1
28d602d7 user_ta: optee os 3.3 support run ta which compiled by 2.6
bd638478 Revert "core: FS: storage: don't allow the object_id to reside in shared memory"
b35d8dea Revert "core: fs_htree: include meta in root hash"
842611b6 static ta: support store widevine keybox
Change-Id: I6aee947f62f07782960532bcc0d179679fffdfb5
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
build from:
a152c641 static ta: support read data from user ta
Update feature:
c6f29a87 ta verify: support new key to sign TA
9b9d28dd rk_atags: support before mmu enable
899d02e7 console_init: set printf uart from rk_atags
Change-Id: Ifde791e10ecc1e1fee3a708e249e0986bfd4232b
Signed-off-by: Hisping Lin <hisping.lin@rock-chips.com>
Build from ATF commit:
1b8f3f9 plat: px30: suspend: set rk817's RST_FUN to "restart the devices"
update feature:
1b8f3f9 plat: px30: suspend: set rk817's RST_FUN to "restart the devices"
6bc7391 plat: rk3399: dfs: fix get drv_odt_lp_cfg error
a6e1028 plat: px30: dfs: ignore pad oe when enable clock for idle port
Change-Id: I595f584f8a04d423a7f4a7c0b747b451dfaf4703
Signed-off-by: XiaoDong Huang <derrick.huang@rock-chips.com>
